Commit | Line | Data |
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ecdfa446 GKH |
1 | /* |
2 | This is part of the rtl8192 driver | |
3 | released under the GPL (See file COPYING for details). | |
4 | ||
5 | This files contains programming code for the rtl8256 | |
6 | radio frontend. | |
7 | ||
8 | *Many* thanks to Realtek Corp. for their great support! | |
9 | ||
10 | */ | |
11 | ||
12 | #include "r8192E.h" | |
13 | #include "r8192E_hw.h" | |
14 | #include "r819xE_phyreg.h" | |
15 | #include "r819xE_phy.h" | |
16 | #include "r8190_rtl8256.h" | |
17 | ||
18 | /*-------------------------------------------------------------------------- | |
19 | * Overview: set RF band width (20M or 40M) | |
20 | * Input: struct net_device* dev | |
21 | * WIRELESS_BANDWIDTH_E Bandwidth //20M or 40M | |
22 | * Output: NONE | |
23 | * Return: NONE | |
24 | * Note: 8226 support both 20M and 40 MHz | |
25 | *---------------------------------------------------------------------------*/ | |
26 | void PHY_SetRF8256Bandwidth(struct net_device* dev , HT_CHANNEL_WIDTH Bandwidth) //20M or 40M | |
27 | { | |
28 | u8 eRFPath; | |
29 | struct r8192_priv *priv = ieee80211_priv(dev); | |
30 | ||
31 | //for(eRFPath = RF90_PATH_A; eRFPath <pHalData->NumTotalRFPath; eRFPath++) | |
32 | for(eRFPath = 0; eRFPath <priv->NumTotalRFPath; eRFPath++) | |
33 | { | |
34 | if (!rtl8192_phy_CheckIsLegalRFPath(dev, eRFPath)) | |
35 | continue; | |
36 | ||
37 | switch(Bandwidth) | |
38 | { | |
39 | case HT_CHANNEL_WIDTH_20: | |
40 | if(priv->card_8192_version == VERSION_8190_BD || priv->card_8192_version == VERSION_8190_BE)// 8256 D-cut, E-cut, xiong: consider it later! | |
41 | { | |
42 | rtl8192_phy_SetRFReg(dev, (RF90_RADIO_PATH_E)eRFPath, 0x0b, bMask12Bits, 0x100); //phy para:1ba | |
43 | rtl8192_phy_SetRFReg(dev, (RF90_RADIO_PATH_E)eRFPath, 0x2c, bMask12Bits, 0x3d7); | |
44 | rtl8192_phy_SetRFReg(dev, (RF90_RADIO_PATH_E)eRFPath, 0x0e, bMask12Bits, 0x021); | |
45 | ||
46 | //cosa add for sd3's request 01/23/2008 | |
47 | //rtl8192_phy_SetRFReg(dev, (RF90_RADIO_PATH_E)eRFPath, 0x14, bMask12Bits, 0x5ab); | |
48 | } | |
49 | else | |
50 | { | |
51 | RT_TRACE(COMP_ERR, "PHY_SetRF8256Bandwidth(): unknown hardware version\n"); | |
52 | } | |
53 | ||
54 | break; | |
55 | case HT_CHANNEL_WIDTH_20_40: | |
56 | if(priv->card_8192_version == VERSION_8190_BD ||priv->card_8192_version == VERSION_8190_BE)// 8256 D-cut, E-cut, xiong: consider it later! | |
57 | { | |
58 | rtl8192_phy_SetRFReg(dev, (RF90_RADIO_PATH_E)eRFPath, 0x0b, bMask12Bits, 0x300); //phy para:3ba | |
59 | rtl8192_phy_SetRFReg(dev, (RF90_RADIO_PATH_E)eRFPath, 0x2c, bMask12Bits, 0x3ff); | |
60 | rtl8192_phy_SetRFReg(dev, (RF90_RADIO_PATH_E)eRFPath, 0x0e, bMask12Bits, 0x0e1); | |
61 | ||
62 | //cosa add for sd3's request 01/23/2008 | |
63 | #if 0 | |
64 | if(priv->chan == 3 || priv->chan == 9) //I need to set priv->chan whenever current channel changes | |
65 | rtl8192_phy_SetRFReg(dev, (RF90_RADIO_PATH_E)eRFPath, 0x14, bMask12Bits, 0x59b); | |
66 | else | |
67 | rtl8192_phy_SetRFReg(dev, (RF90_RADIO_PATH_E)eRFPath, 0x14, bMask12Bits, 0x5ab); | |
68 | #endif | |
69 | } | |
70 | else | |
71 | { | |
72 | RT_TRACE(COMP_ERR, "PHY_SetRF8256Bandwidth(): unknown hardware version\n"); | |
73 | } | |
74 | ||
75 | ||
76 | break; | |
77 | default: | |
78 | RT_TRACE(COMP_ERR, "PHY_SetRF8256Bandwidth(): unknown Bandwidth: %#X\n",Bandwidth ); | |
79 | break; | |
80 | ||
81 | } | |
82 | } | |
83 | return; | |
84 | } | |
85 | /*-------------------------------------------------------------------------- | |
86 | * Overview: Interface to config 8256 | |
87 | * Input: struct net_device* dev | |
88 | * Output: NONE | |
89 | * Return: NONE | |
90 | *---------------------------------------------------------------------------*/ | |
91 | RT_STATUS PHY_RF8256_Config(struct net_device* dev) | |
92 | { | |
93 | struct r8192_priv *priv = ieee80211_priv(dev); | |
94 | // Initialize general global value | |
95 | // | |
96 | RT_STATUS rtStatus = RT_STATUS_SUCCESS; | |
97 | // TODO: Extend RF_PATH_C and RF_PATH_D in the future | |
98 | priv->NumTotalRFPath = RTL819X_TOTAL_RF_PATH; | |
99 | // Config BB and RF | |
100 | rtStatus = phy_RF8256_Config_ParaFile(dev); | |
101 | ||
102 | return rtStatus; | |
103 | } | |
104 | /*-------------------------------------------------------------------------- | |
105 | * Overview: Interface to config 8256 | |
106 | * Input: struct net_device* dev | |
107 | * Output: NONE | |
108 | * Return: NONE | |
109 | *---------------------------------------------------------------------------*/ | |
110 | RT_STATUS phy_RF8256_Config_ParaFile(struct net_device* dev) | |
111 | { | |
112 | u32 u4RegValue = 0; | |
113 | u8 eRFPath; | |
114 | RT_STATUS rtStatus = RT_STATUS_SUCCESS; | |
115 | BB_REGISTER_DEFINITION_T *pPhyReg; | |
116 | struct r8192_priv *priv = ieee80211_priv(dev); | |
117 | u32 RegOffSetToBeCheck = 0x3; | |
118 | u32 RegValueToBeCheck = 0x7f1; | |
119 | u32 RF3_Final_Value = 0; | |
120 | u8 ConstRetryTimes = 5, RetryTimes = 5; | |
121 | u8 ret = 0; | |
122 | //3//----------------------------------------------------------------- | |
123 | //3// <2> Initialize RF | |
124 | //3//----------------------------------------------------------------- | |
125 | for(eRFPath = (RF90_RADIO_PATH_E)RF90_PATH_A; eRFPath <priv->NumTotalRFPath; eRFPath++) | |
126 | { | |
127 | if (!rtl8192_phy_CheckIsLegalRFPath(dev, eRFPath)) | |
128 | continue; | |
129 | ||
130 | pPhyReg = &priv->PHYRegDef[eRFPath]; | |
131 | ||
132 | // Joseph test for shorten RF config | |
133 | // pHalData->RfReg0Value[eRFPath] = rtl8192_phy_QueryRFReg(dev, (RF90_RADIO_PATH_E)eRFPath, rGlobalCtrl, bMaskDWord); | |
134 | ||
135 | /*----Store original RFENV control type----*/ | |
136 | switch(eRFPath) | |
137 | { | |
138 | case RF90_PATH_A: | |
139 | case RF90_PATH_C: | |
140 | u4RegValue = rtl8192_QueryBBReg(dev, pPhyReg->rfintfs, bRFSI_RFENV); | |
141 | break; | |
142 | case RF90_PATH_B : | |
143 | case RF90_PATH_D: | |
144 | u4RegValue = rtl8192_QueryBBReg(dev, pPhyReg->rfintfs, bRFSI_RFENV<<16); | |
145 | break; | |
146 | } | |
147 | ||
148 | /*----Set RF_ENV enable----*/ | |
149 | rtl8192_setBBreg(dev, pPhyReg->rfintfe, bRFSI_RFENV<<16, 0x1); | |
150 | ||
151 | /*----Set RF_ENV output high----*/ | |
152 | rtl8192_setBBreg(dev, pPhyReg->rfintfo, bRFSI_RFENV, 0x1); | |
153 | ||
154 | /* Set bit number of Address and Data for RF register */ | |
155 | rtl8192_setBBreg(dev, pPhyReg->rfHSSIPara2, b3WireAddressLength, 0x0); // Set 0 to 4 bits for Z-serial and set 1 to 6 bits for 8258 | |
156 | rtl8192_setBBreg(dev, pPhyReg->rfHSSIPara2, b3WireDataLength, 0x0); // Set 0 to 12 bits for Z-serial and 8258, and set 1 to 14 bits for ??? | |
157 | ||
158 | rtl8192_phy_SetRFReg(dev, (RF90_RADIO_PATH_E) eRFPath, 0x0, bMask12Bits, 0xbf); | |
159 | ||
160 | /*----Check RF block (for FPGA platform only)----*/ | |
161 | // TODO: this function should be removed on ASIC , Emily 2007.2.2 | |
162 | rtStatus = rtl8192_phy_checkBBAndRF(dev, HW90_BLOCK_RF, (RF90_RADIO_PATH_E)eRFPath); | |
163 | if(rtStatus!= RT_STATUS_SUCCESS) | |
164 | { | |
165 | RT_TRACE(COMP_ERR, "PHY_RF8256_Config():Check Radio[%d] Fail!!\n", eRFPath); | |
166 | goto phy_RF8256_Config_ParaFile_Fail; | |
167 | } | |
168 | ||
169 | RetryTimes = ConstRetryTimes; | |
170 | RF3_Final_Value = 0; | |
171 | /*----Initialize RF fom connfiguration file----*/ | |
172 | switch(eRFPath) | |
173 | { | |
174 | case RF90_PATH_A: | |
175 | while(RF3_Final_Value!=RegValueToBeCheck && RetryTimes!=0) | |
176 | { | |
177 | ret = rtl8192_phy_ConfigRFWithHeaderFile(dev,(RF90_RADIO_PATH_E)eRFPath); | |
178 | RF3_Final_Value = rtl8192_phy_QueryRFReg(dev, (RF90_RADIO_PATH_E)eRFPath, RegOffSetToBeCheck, bMask12Bits); | |
179 | RT_TRACE(COMP_RF, "RF %d %d register final value: %x\n", eRFPath, RegOffSetToBeCheck, RF3_Final_Value); | |
180 | RetryTimes--; | |
181 | } | |
182 | break; | |
183 | case RF90_PATH_B: | |
184 | while(RF3_Final_Value!=RegValueToBeCheck && RetryTimes!=0) | |
185 | { | |
186 | ret = rtl8192_phy_ConfigRFWithHeaderFile(dev,(RF90_RADIO_PATH_E)eRFPath); | |
187 | RF3_Final_Value = rtl8192_phy_QueryRFReg(dev, (RF90_RADIO_PATH_E)eRFPath, RegOffSetToBeCheck, bMask12Bits); | |
188 | RT_TRACE(COMP_RF, "RF %d %d register final value: %x\n", eRFPath, RegOffSetToBeCheck, RF3_Final_Value); | |
189 | RetryTimes--; | |
190 | } | |
191 | break; | |
192 | case RF90_PATH_C: | |
193 | while(RF3_Final_Value!=RegValueToBeCheck && RetryTimes!=0) | |
194 | { | |
195 | ret = rtl8192_phy_ConfigRFWithHeaderFile(dev,(RF90_RADIO_PATH_E)eRFPath); | |
196 | RF3_Final_Value = rtl8192_phy_QueryRFReg(dev, (RF90_RADIO_PATH_E)eRFPath, RegOffSetToBeCheck, bMask12Bits); | |
197 | RT_TRACE(COMP_RF, "RF %d %d register final value: %x\n", eRFPath, RegOffSetToBeCheck, RF3_Final_Value); | |
198 | RetryTimes--; | |
199 | } | |
200 | break; | |
201 | case RF90_PATH_D: | |
202 | while(RF3_Final_Value!=RegValueToBeCheck && RetryTimes!=0) | |
203 | { | |
204 | ret = rtl8192_phy_ConfigRFWithHeaderFile(dev,(RF90_RADIO_PATH_E)eRFPath); | |
205 | RF3_Final_Value = rtl8192_phy_QueryRFReg(dev, (RF90_RADIO_PATH_E)eRFPath, RegOffSetToBeCheck, bMask12Bits); | |
206 | RT_TRACE(COMP_RF, "RF %d %d register final value: %x\n", eRFPath, RegOffSetToBeCheck, RF3_Final_Value); | |
207 | RetryTimes--; | |
208 | } | |
209 | break; | |
210 | } | |
211 | ||
212 | /*----Restore RFENV control type----*/; | |
213 | switch(eRFPath) | |
214 | { | |
215 | case RF90_PATH_A: | |
216 | case RF90_PATH_C: | |
217 | rtl8192_setBBreg(dev, pPhyReg->rfintfs, bRFSI_RFENV, u4RegValue); | |
218 | break; | |
219 | case RF90_PATH_B : | |
220 | case RF90_PATH_D: | |
221 | rtl8192_setBBreg(dev, pPhyReg->rfintfs, bRFSI_RFENV<<16, u4RegValue); | |
222 | break; | |
223 | } | |
224 | ||
225 | if(ret){ | |
226 | RT_TRACE(COMP_ERR, "phy_RF8256_Config_ParaFile():Radio[%d] Fail!!", eRFPath); | |
227 | goto phy_RF8256_Config_ParaFile_Fail; | |
228 | } | |
229 | ||
230 | } | |
231 | ||
232 | RT_TRACE(COMP_PHY, "PHY Initialization Success\n") ; | |
233 | return RT_STATUS_SUCCESS; | |
234 | ||
235 | phy_RF8256_Config_ParaFile_Fail: | |
236 | RT_TRACE(COMP_ERR, "PHY Initialization failed\n") ; | |
237 | return RT_STATUS_FAILURE; | |
238 | } | |
239 | ||
240 | ||
241 | void PHY_SetRF8256CCKTxPower(struct net_device* dev, u8 powerlevel) | |
242 | { | |
243 | u32 TxAGC=0; | |
244 | struct r8192_priv *priv = ieee80211_priv(dev); | |
245 | #ifdef RTL8190P | |
246 | u8 byte0, byte1; | |
247 | ||
248 | TxAGC |= ((powerlevel<<8)|powerlevel); | |
249 | TxAGC += priv->CCKTxPowerLevelOriginalOffset; | |
250 | ||
251 | if(priv->bDynamicTxLowPower == true //cosa 04282008 for cck long range | |
252 | /*pMgntInfo->bScanInProgress == TRUE*/ ) //cosa 05/22/2008 for scan | |
253 | { | |
254 | if(priv->CustomerID == RT_CID_819x_Netcore) | |
255 | TxAGC = 0x2222; | |
256 | else | |
257 | TxAGC += ((priv->CckPwEnl<<8)|priv->CckPwEnl); | |
258 | } | |
259 | ||
260 | byte0 = (u8)(TxAGC & 0xff); | |
261 | byte1 = (u8)((TxAGC & 0xff00)>>8); | |
262 | if(byte0 > 0x24) | |
263 | byte0 = 0x24; | |
264 | if(byte1 > 0x24) | |
265 | byte1 = 0x24; | |
266 | if(priv->rf_type == RF_2T4R) //Only 2T4R you have to care the Antenna Tx Power offset | |
267 | { // check antenna C over the max index 0x24 | |
268 | if(priv->RF_C_TxPwDiff > 0) | |
269 | { | |
270 | if( (byte0 + (u8)priv->RF_C_TxPwDiff) > 0x24) | |
271 | byte0 = 0x24 - priv->RF_C_TxPwDiff; | |
272 | if( (byte1 + (u8)priv->RF_C_TxPwDiff) > 0x24) | |
273 | byte1 = 0x24 - priv->RF_C_TxPwDiff; | |
274 | } | |
275 | } | |
276 | TxAGC = (byte1<<8) |byte0; | |
277 | write_nic_dword(dev, CCK_TXAGC, TxAGC); | |
278 | #else | |
279 | #ifdef RTL8192E | |
280 | ||
281 | TxAGC = powerlevel; | |
282 | if(priv->bDynamicTxLowPower == true)//cosa 04282008 for cck long range | |
283 | { | |
284 | if(priv->CustomerID == RT_CID_819x_Netcore) | |
285 | TxAGC = 0x22; | |
286 | else | |
287 | TxAGC += priv->CckPwEnl; | |
288 | } | |
289 | if(TxAGC > 0x24) | |
290 | TxAGC = 0x24; | |
291 | rtl8192_setBBreg(dev, rTxAGC_CCK_Mcs32, bTxAGCRateCCK, TxAGC); | |
292 | #endif | |
293 | #endif | |
294 | } | |
295 | ||
296 | ||
297 | void PHY_SetRF8256OFDMTxPower(struct net_device* dev, u8 powerlevel) | |
298 | { | |
299 | struct r8192_priv *priv = ieee80211_priv(dev); | |
300 | //Joseph TxPower for 8192 testing | |
301 | #ifdef RTL8190P | |
302 | u32 TxAGC1=0, TxAGC2=0, TxAGC2_tmp = 0; | |
303 | u8 i, byteVal1[4], byteVal2[4], byteVal3[4]; | |
304 | ||
305 | if(priv->bDynamicTxHighPower == true) //Add by Jacken 2008/03/06 | |
306 | { | |
307 | TxAGC1 |= ((powerlevel<<24)|(powerlevel<<16)|(powerlevel<<8)|powerlevel); | |
308 | //for tx power track | |
309 | TxAGC2_tmp = TxAGC1; | |
310 | ||
311 | TxAGC1 += priv->MCSTxPowerLevelOriginalOffset[0]; | |
312 | TxAGC2 =0x03030303; | |
313 | ||
314 | //for tx power track | |
315 | TxAGC2_tmp += priv->MCSTxPowerLevelOriginalOffset[1]; | |
316 | } | |
317 | else | |
318 | { | |
319 | TxAGC1 |= ((powerlevel<<24)|(powerlevel<<16)|(powerlevel<<8)|powerlevel); | |
320 | TxAGC2 = TxAGC1; | |
321 | ||
322 | TxAGC1 += priv->MCSTxPowerLevelOriginalOffset[0]; | |
323 | TxAGC2 += priv->MCSTxPowerLevelOriginalOffset[1]; | |
324 | ||
325 | TxAGC2_tmp = TxAGC2; | |
326 | ||
327 | } | |
328 | for(i=0; i<4; i++) | |
329 | { | |
330 | byteVal1[i] = (u8)( (TxAGC1 & (0xff<<(i*8))) >>(i*8) ); | |
331 | if(byteVal1[i] > 0x24) | |
332 | byteVal1[i] = 0x24; | |
333 | byteVal2[i] = (u8)( (TxAGC2 & (0xff<<(i*8))) >>(i*8) ); | |
334 | if(byteVal2[i] > 0x24) | |
335 | byteVal2[i] = 0x24; | |
336 | ||
337 | //for tx power track | |
338 | byteVal3[i] = (u8)( (TxAGC2_tmp & (0xff<<(i*8))) >>(i*8) ); | |
339 | if(byteVal3[i] > 0x24) | |
340 | byteVal3[i] = 0x24; | |
341 | } | |
342 | ||
343 | if(priv->rf_type == RF_2T4R) //Only 2T4R you have to care the Antenna Tx Power offset | |
344 | { // check antenna C over the max index 0x24 | |
345 | if(priv->RF_C_TxPwDiff > 0) | |
346 | { | |
347 | for(i=0; i<4; i++) | |
348 | { | |
349 | if( (byteVal1[i] + (u8)priv->RF_C_TxPwDiff) > 0x24) | |
350 | byteVal1[i] = 0x24 - priv->RF_C_TxPwDiff; | |
351 | if( (byteVal2[i] + (u8)priv->RF_C_TxPwDiff) > 0x24) | |
352 | byteVal2[i] = 0x24 - priv->RF_C_TxPwDiff; | |
353 | if( (byteVal3[i] + (u8)priv->RF_C_TxPwDiff) > 0x24) | |
354 | byteVal3[i] = 0x24 - priv->RF_C_TxPwDiff; | |
355 | } | |
356 | } | |
357 | } | |
358 | ||
359 | TxAGC1 = (byteVal1[3]<<24) | (byteVal1[2]<<16) |(byteVal1[1]<<8) |byteVal1[0]; | |
360 | TxAGC2 = (byteVal2[3]<<24) | (byteVal2[2]<<16) |(byteVal2[1]<<8) |byteVal2[0]; | |
361 | ||
362 | //for tx power track | |
363 | TxAGC2_tmp = (byteVal3[3]<<24) | (byteVal3[2]<<16) |(byteVal3[1]<<8) |byteVal3[0]; | |
364 | priv->Pwr_Track = TxAGC2_tmp; | |
365 | //DbgPrint("TxAGC2_tmp = 0x%x\n", TxAGC2_tmp); | |
366 | ||
367 | //DbgPrint("TxAGC1/TxAGC2 = 0x%x/0x%x\n", TxAGC1, TxAGC2); | |
368 | write_nic_dword(dev, MCS_TXAGC, TxAGC1); | |
369 | write_nic_dword(dev, MCS_TXAGC+4, TxAGC2); | |
370 | #else | |
371 | #ifdef RTL8192E | |
372 | u32 writeVal, powerBase0, powerBase1, writeVal_tmp; | |
373 | u8 index = 0; | |
374 | u16 RegOffset[6] = {0xe00, 0xe04, 0xe10, 0xe14, 0xe18, 0xe1c}; | |
375 | u8 byte0, byte1, byte2, byte3; | |
376 | ||
377 | powerBase0 = powerlevel + priv->LegacyHTTxPowerDiff; //OFDM rates | |
378 | powerBase0 = (powerBase0<<24) | (powerBase0<<16) |(powerBase0<<8) |powerBase0; | |
379 | powerBase1 = powerlevel; //MCS rates | |
380 | powerBase1 = (powerBase1<<24) | (powerBase1<<16) |(powerBase1<<8) |powerBase1; | |
381 | ||
382 | for(index=0; index<6; index++) | |
383 | { | |
384 | writeVal = priv->MCSTxPowerLevelOriginalOffset[index] + ((index<2)?powerBase0:powerBase1); | |
385 | byte0 = (u8)(writeVal & 0x7f); | |
386 | byte1 = (u8)((writeVal & 0x7f00)>>8); | |
387 | byte2 = (u8)((writeVal & 0x7f0000)>>16); | |
388 | byte3 = (u8)((writeVal & 0x7f000000)>>24); | |
389 | if(byte0 > 0x24) // Max power index = 0x24 | |
390 | byte0 = 0x24; | |
391 | if(byte1 > 0x24) | |
392 | byte1 = 0x24; | |
393 | if(byte2 > 0x24) | |
394 | byte2 = 0x24; | |
395 | if(byte3 > 0x24) | |
396 | byte3 = 0x24; | |
397 | ||
398 | if(index == 3) | |
399 | { | |
400 | writeVal_tmp = (byte3<<24) | (byte2<<16) |(byte1<<8) |byte0; | |
401 | priv->Pwr_Track = writeVal_tmp; | |
402 | } | |
403 | ||
404 | if(priv->bDynamicTxHighPower == true) //Add by Jacken 2008/03/06 //when DM implement, add this | |
405 | { | |
406 | writeVal = 0x03030303; | |
407 | } | |
408 | else | |
409 | { | |
410 | writeVal = (byte3<<24) | (byte2<<16) |(byte1<<8) |byte0; | |
411 | } | |
412 | rtl8192_setBBreg(dev, RegOffset[index], 0x7f7f7f7f, writeVal); | |
413 | } | |
414 | ||
415 | #endif | |
416 | #endif | |
417 | return; | |
418 | } | |
419 | ||
420 | #define MAX_DOZE_WAITING_TIMES_9x 64 | |
5e1ad18a | 421 | static bool |
ecdfa446 GKH |
422 | SetRFPowerState8190( |
423 | struct net_device* dev, | |
424 | RT_RF_POWER_STATE eRFPowerState | |
425 | ) | |
426 | { | |
427 | struct r8192_priv *priv = ieee80211_priv(dev); | |
428 | PRT_POWER_SAVE_CONTROL pPSC = (PRT_POWER_SAVE_CONTROL)(&(priv->ieee80211->PowerSaveControl)); | |
429 | bool bResult = true; | |
430 | //u8 eRFPath; | |
431 | u8 i = 0, QueueID = 0; | |
65a43784 | 432 | //ptx_ring head=NULL,tail=NULL; |
433 | struct rtl8192_tx_ring *ring = NULL; | |
ecdfa446 GKH |
434 | |
435 | if(priv->SetRFPowerStateInProgress == true) | |
436 | return false; | |
65a43784 | 437 | //RT_TRACE(COMP_PS, "===========> SetRFPowerState8190()!\n"); |
ecdfa446 GKH |
438 | priv->SetRFPowerStateInProgress = true; |
439 | ||
440 | switch(priv->rf_chip) | |
441 | { | |
442 | case RF_8256: | |
443 | switch( eRFPowerState ) | |
444 | { | |
445 | case eRfOn: | |
65a43784 | 446 | //RT_TRACE(COMP_PS, "SetRFPowerState8190() eRfOn !\n"); |
ecdfa446 GKH |
447 | //RXTX enable control: On |
448 | //for(eRFPath = 0; eRFPath <pHalData->NumTotalRFPath; eRFPath++) | |
65a43784 | 449 | // PHY_SetRFReg(dev, (RF90_RADIO_PATH_E)eRFPath, 0x4, 0xC00, 0x2); |
450 | #ifdef RTL8190P | |
ecdfa446 GKH |
451 | if(priv->rf_type == RF_2T4R) |
452 | { | |
453 | //enable RF-Chip A/B | |
454 | rtl8192_setBBreg(dev, rFPGA0_XA_RFInterfaceOE, BIT4, 0x1); // 0x860[4] | |
455 | //enable RF-Chip C/D | |
456 | rtl8192_setBBreg(dev, rFPGA0_XC_RFInterfaceOE, BIT4, 0x1); // 0x868[4] | |
457 | //analog to digital on | |
458 | rtl8192_setBBreg(dev, rFPGA0_AnalogParameter4, 0xf00, 0xf);// 0x88c[11:8] | |
459 | //digital to analog on | |
460 | rtl8192_setBBreg(dev, rFPGA0_AnalogParameter1, 0x1e0, 0xf); // 0x880[8:5] | |
461 | //rx antenna on | |
462 | rtl8192_setBBreg(dev, rOFDM0_TRxPathEnable, 0xf, 0xf);// 0xc04[3:0] | |
463 | //rx antenna on | |
464 | rtl8192_setBBreg(dev, rOFDM1_TRxPathEnable, 0xf, 0xf);// 0xd04[3:0] | |
465 | //analog to digital part2 on | |
466 | rtl8192_setBBreg(dev, rFPGA0_AnalogParameter1, 0x1e00, 0xf); // 0x880[12:9] | |
467 | } | |
468 | else if(priv->rf_type == RF_1T2R) //RF-C, RF-D | |
469 | { | |
470 | //enable RF-Chip C/D | |
471 | rtl8192_setBBreg(dev, rFPGA0_XC_RFInterfaceOE, BIT4, 0x1); // 0x868[4] | |
472 | //analog to digital on | |
473 | rtl8192_setBBreg(dev, rFPGA0_AnalogParameter4, 0xc00, 0x3);// 0x88c[11:10] | |
474 | //digital to analog on | |
475 | rtl8192_setBBreg(dev, rFPGA0_AnalogParameter1, 0x180, 0x3); // 0x880[8:7] | |
476 | //rx antenna on | |
477 | rtl8192_setBBreg(dev, rOFDM0_TRxPathEnable, 0xc, 0x3);// 0xc04[3:2] | |
478 | //rx antenna on | |
479 | rtl8192_setBBreg(dev, rOFDM1_TRxPathEnable, 0xc, 0x3);// 0xd04[3:2] | |
480 | //analog to digital part2 on | |
481 | rtl8192_setBBreg(dev, rFPGA0_AnalogParameter1, 0x1800, 0x3); // 0x880[12:11] | |
482 | } | |
65a43784 | 483 | else if(priv->rf_type == RF_1T1R) //RF-C |
484 | { | |
485 | //enable RF-Chip C/D | |
486 | rtl8192_setBBreg(dev, rFPGA0_XC_RFInterfaceOE, BIT4, 0x1); // 0x868[4] | |
487 | //analog to digital on | |
488 | rtl8192_setBBreg(dev, rFPGA0_AnalogParameter4, 0x400, 0x1);// 0x88c[10] | |
489 | //digital to analog on | |
490 | rtl8192_setBBreg(dev, rFPGA0_AnalogParameter1, 0x80, 0x1); // 0x880[7] | |
491 | //rx antenna on | |
492 | rtl8192_setBBreg(dev, rOFDM0_TRxPathEnable, 0x4, 0x1);// 0xc04[2] | |
493 | //rx antenna on | |
494 | rtl8192_setBBreg(dev, rOFDM1_TRxPathEnable, 0x4, 0x1);// 0xd04[2] | |
495 | //analog to digital part2 on | |
496 | rtl8192_setBBreg(dev, rFPGA0_AnalogParameter1, 0x800, 0x1); // 0x880[11] | |
497 | } | |
498 | ||
499 | #elif defined RTL8192E | |
500 | // turn on RF | |
501 | if((priv->ieee80211->eRFPowerState == eRfOff) && RT_IN_PS_LEVEL(pPSC, RT_RF_OFF_LEVL_HALT_NIC)) | |
502 | { // The current RF state is OFF and the RF OFF level is halting the NIC, re-initialize the NIC. | |
503 | bool rtstatus = true; | |
504 | u32 InitilizeCount = 3; | |
505 | do | |
506 | { | |
507 | InitilizeCount--; | |
508 | priv->RegRfOff = false; | |
509 | rtstatus = NicIFEnableNIC(dev); | |
510 | }while( (rtstatus != true) &&(InitilizeCount >0) ); | |
511 | ||
512 | if(rtstatus != true) | |
513 | { | |
514 | RT_TRACE(COMP_ERR,"%s():Initialize Adapter fail,return\n",__FUNCTION__); | |
515 | priv->SetRFPowerStateInProgress = false; | |
516 | return false; | |
517 | } | |
518 | ||
519 | RT_CLEAR_PS_LEVEL(pPSC, RT_RF_OFF_LEVL_HALT_NIC); | |
520 | } else { | |
521 | write_nic_byte(dev, ANAPAR, 0x37);//160MHz | |
522 | //write_nic_byte(dev, MacBlkCtrl, 0x17); // 0x403 | |
523 | mdelay(1); | |
524 | //enable clock 80/88 MHz | |
525 | rtl8192_setBBreg(dev, rFPGA0_AnalogParameter1, 0x4, 0x1); // 0x880[2] | |
526 | priv->bHwRfOffAction = 0; | |
527 | //} | |
528 | ||
529 | //RF-A, RF-B | |
530 | //enable RF-Chip A/B | |
ecdfa446 | 531 | rtl8192_setBBreg(dev, rFPGA0_XA_RFInterfaceOE, BIT4, 0x1); // 0x860[4] |
65a43784 | 532 | //analog to digital on |
533 | rtl8192_setBBreg(dev, rFPGA0_AnalogParameter4, 0x300, 0x3);// 0x88c[9:8] | |
534 | //digital to analog on | |
535 | rtl8192_setBBreg(dev, rFPGA0_AnalogParameter1, 0x18, 0x3); // 0x880[4:3] | |
536 | //rx antenna on | |
537 | rtl8192_setBBreg(dev, rOFDM0_TRxPathEnable, 0x3, 0x3);// 0xc04[1:0] | |
538 | //rx antenna on | |
539 | rtl8192_setBBreg(dev, rOFDM1_TRxPathEnable, 0x3, 0x3);// 0xd04[1:0] | |
540 | //analog to digital part2 on | |
541 | rtl8192_setBBreg(dev, rFPGA0_AnalogParameter1, 0x60, 0x3); // 0x880[6:5] | |
542 | ||
543 | // Baseband reset 2008.09.30 add | |
544 | //write_nic_byte(dev, BB_RESET, (read_nic_byte(dev, BB_RESET)|BIT0)); | |
545 | ||
546 | //2 AFE | |
547 | // 2008.09.30 add | |
548 | //rtl8192_setBBreg(dev, rFPGA0_AnalogParameter2, 0x20000000, 0x1); // 0x884 | |
549 | //analog to digital part2 on | |
550 | //rtl8192_setBBreg(dev, rFPGA0_AnalogParameter1, 0x60, 0x3); // 0x880[6:5] | |
551 | ||
552 | ||
553 | //digital to analog on | |
554 | //rtl8192_setBBreg(dev, rFPGA0_AnalogParameter1, 0x98, 0x13); // 0x880[4:3] | |
555 | //analog to digital on | |
556 | //rtl8192_setBBreg(dev, rFPGA0_AnalogParameter4, 0xf03, 0xf03);// 0x88c[9:8] | |
557 | //rx antenna on | |
558 | //PHY_SetBBReg(dev, rOFDM0_TRxPathEnable, 0x3, 0x3);// 0xc04[1:0] | |
559 | //rx antenna on 2008.09.30 mark | |
560 | //PHY_SetBBReg(dev, rOFDM1_TRxPathEnable, 0x3, 0x3);// 0xd04[1:0] | |
561 | ||
562 | //2 RF | |
563 | //enable RF-Chip A/B | |
564 | //rtl8192_setBBreg(dev, rFPGA0_XA_RFInterfaceOE, BIT4, 0x1); // 0x860[4] | |
565 | //rtl8192_setBBreg(dev, rFPGA0_XB_RFInterfaceOE, BIT4, 0x1); // 0x864[4] | |
566 | ||
567 | } | |
568 | ||
ecdfa446 GKH |
569 | #endif |
570 | break; | |
571 | ||
572 | // | |
573 | // In current solution, RFSleep=RFOff in order to save power under 802.11 power save. | |
574 | // By Bruce, 2008-01-16. | |
575 | // | |
576 | case eRfSleep: | |
65a43784 | 577 | { |
578 | // HW setting had been configured with deeper mode. | |
579 | if(priv->ieee80211->eRFPowerState == eRfOff) | |
580 | break; | |
581 | ||
582 | // Update current RF state variable. | |
583 | //priv->ieee80211->eRFPowerState = eRFPowerState; | |
584 | ||
585 | //if (pPSC->bLeisurePs) | |
ecdfa446 GKH |
586 | { |
587 | for(QueueID = 0, i = 0; QueueID < MAX_TX_QUEUE; ) | |
588 | { | |
65a43784 | 589 | ring = &priv->tx_ring[QueueID]; |
590 | ||
591 | if(skb_queue_len(&ring->queue) == 0) | |
592 | { | |
593 | QueueID++; | |
594 | continue; | |
595 | } | |
596 | else | |
597 | { | |
598 | RT_TRACE((COMP_POWER|COMP_RF), "eRf Off/Sleep: %d times TcbBusyQueue[%d] !=0 before doze!\n", (i+1), QueueID); | |
599 | udelay(10); | |
600 | i++; | |
601 | } | |
602 | ||
603 | if(i >= MAX_DOZE_WAITING_TIMES_9x) | |
604 | { | |
605 | RT_TRACE(COMP_POWER, "\n\n\n TimeOut!! SetRFPowerState8190(): eRfOff: %d times TcbBusyQueue[%d] != 0 !!!\n\n\n", MAX_DOZE_WAITING_TIMES_9x, QueueID); | |
ecdfa446 | 606 | break; |
65a43784 | 607 | } |
608 | } | |
609 | } | |
ecdfa446 | 610 | |
65a43784 | 611 | //if(Adapter->HardwareType == HARDWARE_TYPE_RTL8190P) |
612 | #ifdef RTL8190P | |
613 | { | |
614 | PHY_SetRtl8190pRfOff(dev); | |
615 | } | |
616 | //else if(Adapter->HardwareType == HARDWARE_TYPE_RTL8192E) | |
617 | #elif defined RTL8192E | |
618 | { | |
619 | PHY_SetRtl8192eRfOff(dev); | |
620 | } | |
621 | #endif | |
622 | } | |
ecdfa446 GKH |
623 | break; |
624 | ||
65a43784 | 625 | case eRfOff: |
626 | //RT_TRACE(COMP_PS, "SetRFPowerState8190() eRfOff/Sleep !\n"); | |
ecdfa446 | 627 | |
65a43784 | 628 | // Update current RF state variable. |
629 | //priv->ieee80211->eRFPowerState = eRFPowerState; | |
ecdfa446 | 630 | |
65a43784 | 631 | // |
632 | // Disconnect with Any AP or STA. | |
633 | // | |
634 | for(QueueID = 0, i = 0; QueueID < MAX_TX_QUEUE; ) | |
635 | { | |
636 | ring = &priv->tx_ring[QueueID]; | |
ecdfa446 | 637 | |
65a43784 | 638 | if(skb_queue_len(&ring->queue) == 0) |
ecdfa446 | 639 | { |
ecdfa446 GKH |
640 | QueueID++; |
641 | continue; | |
642 | } | |
643 | else | |
644 | { | |
65a43784 | 645 | RT_TRACE(COMP_POWER, |
646 | "eRf Off/Sleep: %d times TcbBusyQueue[%d] !=0 before doze!\n", (i+1), QueueID); | |
ecdfa446 GKH |
647 | udelay(10); |
648 | i++; | |
649 | } | |
650 | ||
651 | if(i >= MAX_DOZE_WAITING_TIMES_9x) | |
652 | { | |
65a43784 | 653 | RT_TRACE(COMP_POWER, "\n\n\n SetZebraRFPowerState8185B(): eRfOff: %d times TcbBusyQueue[%d] != 0 !!!\n\n\n", MAX_DOZE_WAITING_TIMES_9x, QueueID); |
ecdfa446 GKH |
654 | break; |
655 | } | |
656 | } | |
65a43784 | 657 | |
658 | //if(Adapter->HardwareType == HARDWARE_TYPE_RTL8190P) | |
659 | #if defined RTL8190P | |
660 | { | |
661 | PHY_SetRtl8190pRfOff(dev); | |
ecdfa446 | 662 | } |
65a43784 | 663 | //else if(Adapter->HardwareType == HARDWARE_TYPE_RTL8192E) |
664 | #elif defined RTL8192E | |
ecdfa446 | 665 | { |
65a43784 | 666 | //if(pPSC->RegRfPsLevel & RT_RF_OFF_LEVL_HALT_NIC && !RT_IN_PS_LEVEL(pPSC, RT_RF_OFF_LEVL_HALT_NIC) && priv->ieee80211->RfOffReason > RF_CHANGE_BY_PS) |
667 | if (pPSC->RegRfPsLevel & RT_RF_OFF_LEVL_HALT_NIC && !RT_IN_PS_LEVEL(pPSC, RT_RF_OFF_LEVL_HALT_NIC)) | |
668 | { // Disable all components. | |
669 | // | |
670 | // Note: | |
671 | // NicIFSetLinkStatus is a big problem when we indicate the status to OS, | |
672 | // the OS(XP) will reset. But now, we cnnot find why the NIC is hard to receive | |
673 | // packets after RF ON. Just keep this function here and still work to find out the root couse. | |
674 | // By Bruce, 2009-05-01. | |
675 | // | |
676 | //NicIFSetLinkStatus( Adapter, RT_MEDIA_DISCONNECT ); | |
677 | //if HW radio of , need to indicate scan complete first for not be reset. | |
678 | //if(MgntScanInProgress(pMgntInfo)) | |
679 | // MgntResetScanProcess( Adapter ); | |
680 | ||
681 | // <1> Disable Interrupt | |
682 | //rtl8192_irq_disable(dev); | |
683 | // <2> Stop all timer | |
684 | //MgntCancelAllTimer(Adapter); | |
685 | // <3> Disable Adapter | |
686 | //NicIFHaltAdapter(Adapter, false); | |
687 | NicIFDisableNIC(dev); | |
688 | RT_SET_PS_LEVEL(pPSC, RT_RF_OFF_LEVL_HALT_NIC); | |
689 | } | |
690 | else if (!(pPSC->RegRfPsLevel & RT_RF_OFF_LEVL_HALT_NIC)) | |
691 | { // Normal case. | |
692 | // IPS should go to this. | |
693 | PHY_SetRtl8192eRfOff(dev); | |
694 | } | |
695 | } | |
696 | #else | |
697 | else | |
698 | { | |
699 | RT_TRACE(COMP_DBG,DBG_TRACE,("It is not 8190Pci and 8192PciE \n")); | |
ecdfa446 | 700 | } |
ecdfa446 | 701 | #endif |
65a43784 | 702 | |
ecdfa446 GKH |
703 | break; |
704 | ||
705 | default: | |
706 | bResult = false; | |
65a43784 | 707 | RT_TRACE(COMP_ERR, "SetRFPowerState8190(): unknow state to set: 0x%X!!!\n", eRFPowerState); |
ecdfa446 GKH |
708 | break; |
709 | } | |
710 | ||
711 | break; | |
712 | ||
713 | default: | |
714 | RT_TRACE(COMP_ERR, "SetRFPowerState8190(): Unknown RF type\n"); | |
715 | break; | |
716 | } | |
717 | ||
718 | if(bResult) | |
719 | { | |
720 | // Update current RF state variable. | |
721 | priv->ieee80211->eRFPowerState = eRFPowerState; | |
ecdfa446 GKH |
722 | } |
723 | ||
65a43784 | 724 | //printk("%s()priv->ieee80211->eRFPowerState:%s\n" ,__func__,priv->ieee80211->eRFPowerState == eRfOn ? "On" : "Off"); |
ecdfa446 | 725 | priv->SetRFPowerStateInProgress = false; |
65a43784 | 726 | //RT_TRACE(COMP_PS, "<=========== SetRFPowerState8190() bResult = %d!\n", bResult); |
ecdfa446 GKH |
727 | return bResult; |
728 | } | |
729 | ||
730 | ||
731 | ||
732 | // | |
733 | // Description: | |
734 | // Change RF power state. | |
735 | // | |
736 | // Assumption: | |
737 | // This function must be executed in re-schdulable context, | |
738 | // ie. PASSIVE_LEVEL. | |
739 | // | |
740 | // 050823, by rcnjko. | |
741 | // | |
5e1ad18a | 742 | static bool |
ecdfa446 GKH |
743 | SetRFPowerState( |
744 | struct net_device* dev, | |
745 | RT_RF_POWER_STATE eRFPowerState | |
746 | ) | |
747 | { | |
748 | struct r8192_priv *priv = ieee80211_priv(dev); | |
749 | ||
750 | bool bResult = false; | |
751 | ||
752 | RT_TRACE(COMP_RF,"---------> SetRFPowerState(): eRFPowerState(%d)\n", eRFPowerState); | |
753 | #ifdef RTL8192E | |
754 | if(eRFPowerState == priv->ieee80211->eRFPowerState && priv->bHwRfOffAction == 0) | |
755 | #else | |
756 | if(eRFPowerState == priv->ieee80211->eRFPowerState) | |
757 | #endif | |
758 | { | |
759 | RT_TRACE(COMP_POWER, "<--------- SetRFPowerState(): discard the request for eRFPowerState(%d) is the same.\n", eRFPowerState); | |
760 | return bResult; | |
761 | } | |
762 | ||
763 | bResult = SetRFPowerState8190(dev, eRFPowerState); | |
764 | ||
765 | RT_TRACE(COMP_POWER, "<--------- SetRFPowerState(): bResult(%d)\n", bResult); | |
766 | ||
767 | return bResult; | |
768 | } | |
769 | ||
5e1ad18a | 770 | static void |
ecdfa446 GKH |
771 | MgntDisconnectIBSS( |
772 | struct net_device* dev | |
773 | ) | |
774 | { | |
775 | struct r8192_priv *priv = ieee80211_priv(dev); | |
776 | //RT_OP_MODE OpMode; | |
777 | u8 i; | |
778 | bool bFilterOutNonAssociatedBSSID = false; | |
779 | ||
780 | //IEEE80211_DEBUG(IEEE80211_DL_TRACE, "XXXXXXXXXX MgntDisconnect IBSS\n"); | |
781 | ||
782 | priv->ieee80211->state = IEEE80211_NOLINK; | |
783 | ||
784 | // PlatformZeroMemory( pMgntInfo->Bssid, 6 ); | |
785 | for(i=0;i<6;i++) priv->ieee80211->current_network.bssid[i]= 0x55; | |
786 | priv->OpMode = RT_OP_MODE_NO_LINK; | |
787 | write_nic_word(dev, BSSIDR, ((u16*)priv->ieee80211->current_network.bssid)[0]); | |
788 | write_nic_dword(dev, BSSIDR+2, ((u32*)(priv->ieee80211->current_network.bssid+2))[0]); | |
789 | { | |
790 | RT_OP_MODE OpMode = priv->OpMode; | |
791 | //LED_CTL_MODE LedAction = LED_CTL_NO_LINK; | |
792 | u8 btMsr = read_nic_byte(dev, MSR); | |
793 | ||
794 | btMsr &= 0xfc; | |
795 | ||
796 | switch(OpMode) | |
797 | { | |
798 | case RT_OP_MODE_INFRASTRUCTURE: | |
799 | btMsr |= MSR_LINK_MANAGED; | |
800 | //LedAction = LED_CTL_LINK; | |
801 | break; | |
802 | ||
803 | case RT_OP_MODE_IBSS: | |
804 | btMsr |= MSR_LINK_ADHOC; | |
935e99fb | 805 | // led link set separate |
ecdfa446 GKH |
806 | break; |
807 | ||
808 | case RT_OP_MODE_AP: | |
809 | btMsr |= MSR_LINK_MASTER; | |
810 | //LedAction = LED_CTL_LINK; | |
811 | break; | |
812 | ||
813 | default: | |
814 | btMsr |= MSR_LINK_NONE; | |
815 | break; | |
816 | } | |
817 | ||
818 | write_nic_byte(dev, MSR, btMsr); | |
819 | ||
820 | // LED control | |
821 | //Adapter->HalFunc.LedControlHandler(Adapter, LedAction); | |
822 | } | |
823 | ieee80211_stop_send_beacons(priv->ieee80211); | |
824 | ||
825 | // If disconnect, clear RCR CBSSID bit | |
826 | bFilterOutNonAssociatedBSSID = false; | |
827 | { | |
828 | u32 RegRCR, Type; | |
829 | Type = bFilterOutNonAssociatedBSSID; | |
830 | RegRCR = read_nic_dword(dev,RCR); | |
831 | priv->ReceiveConfig = RegRCR; | |
832 | if (Type == true) | |
833 | RegRCR |= (RCR_CBSSID); | |
834 | else if (Type == false) | |
835 | RegRCR &= (~RCR_CBSSID); | |
836 | ||
837 | { | |
838 | write_nic_dword(dev, RCR,RegRCR); | |
839 | priv->ReceiveConfig = RegRCR; | |
840 | } | |
841 | ||
842 | } | |
843 | //MgntIndicateMediaStatus( Adapter, RT_MEDIA_DISCONNECT, GENERAL_INDICATE ); | |
844 | notify_wx_assoc_event(priv->ieee80211); | |
845 | ||
846 | } | |
847 | ||
5e1ad18a | 848 | static void |
ecdfa446 GKH |
849 | MlmeDisassociateRequest( |
850 | struct net_device* dev, | |
851 | u8* asSta, | |
852 | u8 asRsn | |
853 | ) | |
854 | { | |
855 | struct r8192_priv *priv = ieee80211_priv(dev); | |
856 | u8 i; | |
857 | ||
858 | RemovePeerTS(priv->ieee80211, asSta); | |
859 | ||
860 | SendDisassociation( priv->ieee80211, asSta, asRsn ); | |
861 | ||
5e1ad18a | 862 | if(memcpy(priv->ieee80211->current_network.bssid,asSta,6) == NULL) |
ecdfa446 GKH |
863 | { |
864 | //ShuChen TODO: change media status. | |
865 | //ShuChen TODO: What to do when disassociate. | |
866 | priv->ieee80211->state = IEEE80211_NOLINK; | |
867 | //pMgntInfo->AsocTimestamp = 0; | |
868 | for(i=0;i<6;i++) priv->ieee80211->current_network.bssid[i] = 0x22; | |
869 | // pMgntInfo->mBrates.Length = 0; | |
870 | // Adapter->HalFunc.SetHwRegHandler( Adapter, HW_VAR_BASIC_RATE, (pu1Byte)(&pMgntInfo->mBrates) ); | |
871 | priv->OpMode = RT_OP_MODE_NO_LINK; | |
872 | { | |
873 | RT_OP_MODE OpMode = priv->OpMode; | |
874 | //LED_CTL_MODE LedAction = LED_CTL_NO_LINK; | |
875 | u8 btMsr = read_nic_byte(dev, MSR); | |
876 | ||
877 | btMsr &= 0xfc; | |
878 | ||
879 | switch(OpMode) | |
880 | { | |
881 | case RT_OP_MODE_INFRASTRUCTURE: | |
882 | btMsr |= MSR_LINK_MANAGED; | |
883 | //LedAction = LED_CTL_LINK; | |
884 | break; | |
885 | ||
886 | case RT_OP_MODE_IBSS: | |
887 | btMsr |= MSR_LINK_ADHOC; | |
935e99fb | 888 | // led link set separate |
ecdfa446 GKH |
889 | break; |
890 | ||
891 | case RT_OP_MODE_AP: | |
892 | btMsr |= MSR_LINK_MASTER; | |
893 | //LedAction = LED_CTL_LINK; | |
894 | break; | |
895 | ||
896 | default: | |
897 | btMsr |= MSR_LINK_NONE; | |
898 | break; | |
899 | } | |
900 | ||
901 | write_nic_byte(dev, MSR, btMsr); | |
902 | ||
903 | // LED control | |
904 | //Adapter->HalFunc.LedControlHandler(Adapter, LedAction); | |
905 | } | |
906 | ieee80211_disassociate(priv->ieee80211); | |
907 | ||
908 | write_nic_word(dev, BSSIDR, ((u16*)priv->ieee80211->current_network.bssid)[0]); | |
909 | write_nic_dword(dev, BSSIDR+2, ((u32*)(priv->ieee80211->current_network.bssid+2))[0]); | |
910 | ||
911 | } | |
912 | ||
913 | } | |
914 | ||
915 | ||
5e1ad18a | 916 | static void |
ecdfa446 GKH |
917 | MgntDisconnectAP( |
918 | struct net_device* dev, | |
919 | u8 asRsn | |
920 | ) | |
921 | { | |
922 | struct r8192_priv *priv = ieee80211_priv(dev); | |
923 | bool bFilterOutNonAssociatedBSSID = false; | |
924 | ||
925 | // | |
926 | // Commented out by rcnjko, 2005.01.27: | |
927 | // I move SecClearAllKeys() to MgntActSet_802_11_DISASSOCIATE(). | |
928 | // | |
929 | // //2004/09/15, kcwu, the key should be cleared, or the new handshaking will not success | |
930 | // SecClearAllKeys(Adapter); | |
931 | ||
932 | // In WPA WPA2 need to Clear all key ... because new key will set after new handshaking. | |
933 | #ifdef TO_DO | |
934 | if( pMgntInfo->SecurityInfo.AuthMode > RT_802_11AuthModeAutoSwitch || | |
935 | (pMgntInfo->bAPSuportCCKM && pMgntInfo->bCCX8021xenable) ) // In CCKM mode will Clear key | |
936 | { | |
937 | SecClearAllKeys(Adapter); | |
938 | RT_TRACE(COMP_SEC, DBG_LOUD,("======>CCKM clear key...")) | |
939 | } | |
940 | #endif | |
941 | // If disconnect, clear RCR CBSSID bit | |
942 | bFilterOutNonAssociatedBSSID = false; | |
943 | { | |
944 | u32 RegRCR, Type; | |
945 | ||
946 | Type = bFilterOutNonAssociatedBSSID; | |
947 | //Adapter->HalFunc.GetHwRegHandler(Adapter, HW_VAR_RCR, (pu1Byte)(&RegRCR)); | |
948 | RegRCR = read_nic_dword(dev,RCR); | |
949 | priv->ReceiveConfig = RegRCR; | |
950 | ||
951 | if (Type == true) | |
952 | RegRCR |= (RCR_CBSSID); | |
953 | else if (Type == false) | |
954 | RegRCR &= (~RCR_CBSSID); | |
955 | ||
956 | write_nic_dword(dev, RCR,RegRCR); | |
957 | priv->ReceiveConfig = RegRCR; | |
958 | ||
959 | ||
960 | } | |
961 | // 2004.10.11, by rcnjko. | |
962 | //MlmeDisassociateRequest( Adapter, pMgntInfo->Bssid, disas_lv_ss ); | |
963 | MlmeDisassociateRequest( dev, priv->ieee80211->current_network.bssid, asRsn ); | |
964 | ||
965 | priv->ieee80211->state = IEEE80211_NOLINK; | |
966 | //pMgntInfo->AsocTimestamp = 0; | |
967 | } | |
968 | ||
969 | ||
5e1ad18a | 970 | static bool |
ecdfa446 GKH |
971 | MgntDisconnect( |
972 | struct net_device* dev, | |
973 | u8 asRsn | |
974 | ) | |
975 | { | |
976 | struct r8192_priv *priv = ieee80211_priv(dev); | |
977 | ||
978 | // | |
979 | // Schedule an workitem to wake up for ps mode, 070109, by rcnjko. | |
980 | // | |
981 | #ifdef TO_DO | |
982 | if(pMgntInfo->mPss != eAwake) | |
983 | { | |
984 | // | |
985 | // Using AwkaeTimer to prevent mismatch ps state. | |
986 | // In the timer the state will be changed according to the RF is being awoke or not. By Bruce, 2007-10-31. | |
987 | // | |
988 | // PlatformScheduleWorkItem( &(pMgntInfo->AwakeWorkItem) ); | |
989 | PlatformSetTimer( Adapter, &(pMgntInfo->AwakeTimer), 0 ); | |
990 | } | |
991 | #endif | |
992 | // Follow 8180 AP mode, 2005.05.30, by rcnjko. | |
993 | #ifdef TO_DO | |
994 | if(pMgntInfo->mActingAsAp) | |
995 | { | |
996 | RT_TRACE(COMP_MLME, DBG_LOUD, ("MgntDisconnect() ===> AP_DisassociateAllStation\n")); | |
997 | AP_DisassociateAllStation(Adapter, unspec_reason); | |
998 | return TRUE; | |
999 | } | |
1000 | #endif | |
1001 | // Indication of disassociation event. | |
1002 | //DrvIFIndicateDisassociation(Adapter, asRsn); | |
1003 | ||
1004 | // In adhoc mode, update beacon frame. | |
1005 | if( priv->ieee80211->state == IEEE80211_LINKED ) | |
1006 | { | |
1007 | if( priv->ieee80211->iw_mode == IW_MODE_ADHOC ) | |
1008 | { | |
1009 | //RT_TRACE(COMP_MLME, "MgntDisconnect() ===> MgntDisconnectIBSS\n"); | |
1010 | MgntDisconnectIBSS(dev); | |
1011 | } | |
1012 | if( priv->ieee80211->iw_mode == IW_MODE_INFRA ) | |
1013 | { | |
1014 | // We clear key here instead of MgntDisconnectAP() because that | |
1015 | // MgntActSet_802_11_DISASSOCIATE() is an interface called by OS, | |
1016 | // e.g. OID_802_11_DISASSOCIATE in Windows while as MgntDisconnectAP() is | |
1017 | // used to handle disassociation related things to AP, e.g. send Disassoc | |
1018 | // frame to AP. 2005.01.27, by rcnjko. | |
1019 | //IEEE80211_DEBUG(IEEE80211_DL_TRACE,"MgntDisconnect() ===> MgntDisconnectAP\n"); | |
1020 | MgntDisconnectAP(dev, asRsn); | |
1021 | } | |
1022 | ||
1023 | // Inidicate Disconnect, 2005.02.23, by rcnjko. | |
1024 | //MgntIndicateMediaStatus( Adapter, RT_MEDIA_DISCONNECT, GENERAL_INDICATE); | |
1025 | } | |
1026 | ||
1027 | return true; | |
1028 | } | |
1029 | ||
1030 | // | |
1031 | // Description: | |
1032 | // Chang RF Power State. | |
1033 | // Note that, only MgntActSet_RF_State() is allowed to set HW_VAR_RF_STATE. | |
1034 | // | |
1035 | // Assumption: | |
1036 | // PASSIVE LEVEL. | |
1037 | // | |
1038 | bool | |
1039 | MgntActSet_RF_State( | |
1040 | struct net_device* dev, | |
1041 | RT_RF_POWER_STATE StateToSet, | |
1042 | RT_RF_CHANGE_SOURCE ChangeSource | |
1043 | ) | |
1044 | { | |
1045 | struct r8192_priv *priv = ieee80211_priv(dev); | |
1046 | bool bActionAllowed = false; | |
1047 | bool bConnectBySSID = false; | |
1048 | RT_RF_POWER_STATE rtState; | |
1049 | u16 RFWaitCounter = 0; | |
1050 | unsigned long flag; | |
1051 | RT_TRACE(COMP_POWER, "===>MgntActSet_RF_State(): StateToSet(%d)\n",StateToSet); | |
1052 | ||
1053 | //1// | |
1054 | //1//<1>Prevent the race condition of RF state change. | |
1055 | //1// | |
1056 | // Only one thread can change the RF state at one time, and others should wait to be executed. By Bruce, 2007-11-28. | |
1057 | ||
1058 | while(true) | |
1059 | { | |
1060 | spin_lock_irqsave(&priv->rf_ps_lock,flag); | |
1061 | if(priv->RFChangeInProgress) | |
1062 | { | |
1063 | spin_unlock_irqrestore(&priv->rf_ps_lock,flag); | |
1064 | RT_TRACE(COMP_POWER, "MgntActSet_RF_State(): RF Change in progress! Wait to set..StateToSet(%d).\n", StateToSet); | |
1065 | ||
1066 | // Set RF after the previous action is done. | |
1067 | while(priv->RFChangeInProgress) | |
1068 | { | |
1069 | RFWaitCounter ++; | |
1070 | RT_TRACE(COMP_POWER, "MgntActSet_RF_State(): Wait 1 ms (%d times)...\n", RFWaitCounter); | |
1071 | udelay(1000); // 1 ms | |
1072 | ||
1073 | // Wait too long, return FALSE to avoid to be stuck here. | |
1074 | if(RFWaitCounter > 100) | |
1075 | { | |
1076 | RT_TRACE(COMP_ERR, "MgntActSet_RF_State(): Wait too logn to set RF\n"); | |
1077 | // TODO: Reset RF state? | |
1078 | return false; | |
1079 | } | |
1080 | } | |
1081 | } | |
1082 | else | |
1083 | { | |
1084 | priv->RFChangeInProgress = true; | |
1085 | spin_unlock_irqrestore(&priv->rf_ps_lock,flag); | |
1086 | break; | |
1087 | } | |
1088 | } | |
1089 | ||
1090 | rtState = priv->ieee80211->eRFPowerState; | |
1091 | ||
1092 | switch(StateToSet) | |
1093 | { | |
1094 | case eRfOn: | |
1095 | // | |
1096 | // Turn On RF no matter the IPS setting because we need to update the RF state to Ndis under Vista, or | |
1097 | // the Windows does not allow the driver to perform site survey any more. By Bruce, 2007-10-02. | |
1098 | // | |
1099 | ||
1100 | priv->ieee80211->RfOffReason &= (~ChangeSource); | |
1101 | ||
1102 | if(! priv->ieee80211->RfOffReason) | |
1103 | { | |
1104 | priv->ieee80211->RfOffReason = 0; | |
1105 | bActionAllowed = true; | |
1106 | ||
1107 | ||
1108 | if(rtState == eRfOff && ChangeSource >=RF_CHANGE_BY_HW ) | |
1109 | { | |
1110 | bConnectBySSID = true; | |
1111 | } | |
1112 | } | |
1113 | else | |
1114 | RT_TRACE(COMP_POWER, "MgntActSet_RF_State - eRfon reject pMgntInfo->RfOffReason= 0x%x, ChangeSource=0x%X\n", priv->ieee80211->RfOffReason, ChangeSource); | |
1115 | ||
1116 | break; | |
1117 | ||
1118 | case eRfOff: | |
1119 | ||
1120 | if (priv->ieee80211->RfOffReason > RF_CHANGE_BY_IPS) | |
1121 | { | |
1122 | // | |
1123 | // 060808, Annie: | |
1124 | // Disconnect to current BSS when radio off. Asked by QuanTa. | |
1125 | // | |
1126 | // Set all link status falg, by Bruce, 2007-06-26. | |
1127 | //MgntActSet_802_11_DISASSOCIATE( Adapter, disas_lv_ss ); | |
1128 | MgntDisconnect(dev, disas_lv_ss); | |
1129 | ||
1130 | // Clear content of bssDesc[] and bssDesc4Query[] to avoid reporting old bss to UI. | |
1131 | // 2007.05.28, by shien chang. | |
1132 | ||
1133 | } | |
1134 | ||
1135 | ||
1136 | priv->ieee80211->RfOffReason |= ChangeSource; | |
1137 | bActionAllowed = true; | |
1138 | break; | |
1139 | ||
1140 | case eRfSleep: | |
1141 | priv->ieee80211->RfOffReason |= ChangeSource; | |
1142 | bActionAllowed = true; | |
1143 | break; | |
1144 | ||
1145 | default: | |
1146 | break; | |
1147 | } | |
1148 | ||
1149 | if(bActionAllowed) | |
1150 | { | |
1151 | RT_TRACE(COMP_POWER, "MgntActSet_RF_State(): Action is allowed.... StateToSet(%d), RfOffReason(%#X)\n", StateToSet, priv->ieee80211->RfOffReason); | |
1152 | // Config HW to the specified mode. | |
1153 | SetRFPowerState(dev, StateToSet); | |
1154 | // Turn on RF. | |
1155 | if(StateToSet == eRfOn) | |
1156 | { | |
1157 | //Adapter->HalFunc.HalEnableRxHandler(Adapter); | |
1158 | if(bConnectBySSID) | |
1159 | { | |
1160 | //MgntActSet_802_11_SSID(Adapter, Adapter->MgntInfo.Ssid.Octet, Adapter->MgntInfo.Ssid.Length, TRUE ); | |
1161 | } | |
1162 | } | |
1163 | // Turn off RF. | |
1164 | else if(StateToSet == eRfOff) | |
1165 | { | |
1166 | //Adapter->HalFunc.HalDisableRxHandler(Adapter); | |
1167 | } | |
1168 | } | |
1169 | else | |
1170 | { | |
1171 | RT_TRACE(COMP_POWER, "MgntActSet_RF_State(): Action is rejected.... StateToSet(%d), ChangeSource(%#X), RfOffReason(%#X)\n", StateToSet, ChangeSource, priv->ieee80211->RfOffReason); | |
1172 | } | |
1173 | ||
1174 | // Release RF spinlock | |
1175 | spin_lock_irqsave(&priv->rf_ps_lock,flag); | |
1176 | priv->RFChangeInProgress = false; | |
1177 | spin_unlock_irqrestore(&priv->rf_ps_lock,flag); | |
1178 | ||
1179 | RT_TRACE(COMP_POWER, "<===MgntActSet_RF_State()\n"); | |
1180 | return bActionAllowed; | |
1181 | } | |
1182 | ||
1183 |