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ecdfa446 GKH |
1 | /****************************************************************************** |
2 | * Copyright(c) 2008 - 2010 Realtek Corporation. All rights reserved. | |
3 | * Linux device driver for RTL8190P / RTL8192E | |
4 | * | |
5 | * Based on the r8180 driver, which is: | |
6 | * Copyright 2004-2005 Andrea Merello <andreamrl@tiscali.it>, et al. | |
7 | * This program is free software; you can redistribute it and/or modify it | |
8 | * under the terms of version 2 of the GNU General Public License as | |
9 | * published by the Free Software Foundation. | |
10 | * | |
11 | * This program is distributed in the hope that it will be useful, but WITHOUT | |
12 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
13 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | |
14 | * more details. | |
15 | * | |
16 | * You should have received a copy of the GNU General Public License along with | |
17 | * this program; if not, write to the Free Software Foundation, Inc., | |
18 | * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA | |
19 | * | |
20 | * The full GNU General Public License is included in this distribution in the | |
21 | * file called LICENSE. | |
22 | * | |
23 | * Contact Information: | |
24 | * Jerry chuang <wlanfae@realtek.com> | |
25 | */ | |
26 | ||
ecdfa446 | 27 | |
ecdfa446 GKH |
28 | #undef RX_DONT_PASS_UL |
29 | #undef DEBUG_EPROM | |
30 | #undef DEBUG_RX_VERBOSE | |
31 | #undef DUMMY_RX | |
32 | #undef DEBUG_ZERO_RX | |
33 | #undef DEBUG_RX_SKB | |
34 | #undef DEBUG_TX_FRAG | |
35 | #undef DEBUG_RX_FRAG | |
36 | #undef DEBUG_TX_FILLDESC | |
37 | #undef DEBUG_TX | |
38 | #undef DEBUG_IRQ | |
39 | #undef DEBUG_RX | |
40 | #undef DEBUG_RXALLOC | |
41 | #undef DEBUG_REGISTERS | |
42 | #undef DEBUG_RING | |
43 | #undef DEBUG_IRQ_TASKLET | |
44 | #undef DEBUG_TX_ALLOC | |
45 | #undef DEBUG_TX_DESC | |
46 | ||
47 | //#define CONFIG_RTL8192_IO_MAP | |
3d14b518 | 48 | #include <linux/vmalloc.h> |
5a0e3ad6 | 49 | #include <linux/slab.h> |
ecdfa446 GKH |
50 | #include <asm/uaccess.h> |
51 | #include "r8192E_hw.h" | |
52 | #include "r8192E.h" | |
53 | #include "r8190_rtl8256.h" /* RTL8225 Radio frontend */ | |
54 | #include "r8180_93cx6.h" /* Card EEPROM */ | |
55 | #include "r8192E_wx.h" | |
56 | #include "r819xE_phy.h" //added by WB 4.30.2008 | |
57 | #include "r819xE_phyreg.h" | |
58 | #include "r819xE_cmdpkt.h" | |
59 | #include "r8192E_dm.h" | |
ecdfa446 | 60 | |
bebdf809 | 61 | #ifdef CONFIG_PM |
ecdfa446 GKH |
62 | #include "r8192_pm.h" |
63 | #endif | |
64 | ||
65 | #ifdef ENABLE_DOT11D | |
65a43784 | 66 | #include "ieee80211/dot11d.h" |
ecdfa446 GKH |
67 | #endif |
68 | ||
69 | //set here to open your trace code. //WB | |
207b58fb | 70 | u32 rt_global_debug_component = |
ecdfa446 GKH |
71 | // COMP_INIT | |
72 | // COMP_EPROM | | |
73 | // COMP_PHY | | |
74 | // COMP_RF | | |
65a43784 | 75 | // COMP_FIRMWARE | |
ecdfa446 GKH |
76 | // COMP_TRACE | |
77 | // COMP_DOWN | | |
78 | // COMP_SWBW | | |
79 | // COMP_SEC | | |
80 | // COMP_QOS | | |
81 | // COMP_RATE | | |
82 | // COMP_RECV | | |
83 | // COMP_SEND | | |
84 | // COMP_POWER | | |
85 | // COMP_EVENTS | | |
86 | // COMP_RESET | | |
87 | // COMP_CMDPKT | | |
88 | // COMP_POWER_TRACKING | | |
89 | // COMP_INTR | | |
90 | COMP_ERR ; //always open err flags on | |
cf3d3d38 | 91 | |
5eaa53de | 92 | static DEFINE_PCI_DEVICE_TABLE(rtl8192_pci_id_tbl) = { |
ecdfa446 GKH |
93 | #ifdef RTL8190P |
94 | /* Realtek */ | |
95 | /* Dlink */ | |
96 | { PCI_DEVICE(0x10ec, 0x8190) }, | |
97 | /* Corega */ | |
98 | { PCI_DEVICE(0x07aa, 0x0045) }, | |
99 | { PCI_DEVICE(0x07aa, 0x0046) }, | |
100 | #else | |
101 | /* Realtek */ | |
102 | { PCI_DEVICE(0x10ec, 0x8192) }, | |
103 | ||
104 | /* Corega */ | |
105 | { PCI_DEVICE(0x07aa, 0x0044) }, | |
106 | { PCI_DEVICE(0x07aa, 0x0047) }, | |
107 | #endif | |
108 | {} | |
109 | }; | |
110 | ||
dca41306 | 111 | static char ifname[IFNAMSIZ] = "wlan%d"; |
ecdfa446 GKH |
112 | static int hwwep = 1; //default use hw. set 0 to use software security |
113 | static int channels = 0x3fff; | |
114 | ||
115 | MODULE_LICENSE("GPL"); | |
ecdfa446 | 116 | MODULE_VERSION("V 1.1"); |
ecdfa446 GKH |
117 | MODULE_DEVICE_TABLE(pci, rtl8192_pci_id_tbl); |
118 | //MODULE_AUTHOR("Andrea Merello <andreamrl@tiscali.it>"); | |
119 | MODULE_DESCRIPTION("Linux driver for Realtek RTL819x WiFi cards"); | |
120 | ||
ecdfa446 | 121 | |
dca41306 | 122 | module_param_string(ifname, ifname, sizeof(ifname), S_IRUGO|S_IWUSR); |
ecdfa446 GKH |
123 | module_param(hwwep,int, S_IRUGO|S_IWUSR); |
124 | module_param(channels,int, S_IRUGO|S_IWUSR); | |
ecdfa446 GKH |
125 | |
126 | MODULE_PARM_DESC(ifname," Net interface name, wlan%d=default"); | |
ecdfa446 GKH |
127 | MODULE_PARM_DESC(hwwep," Try to use hardware WEP support. Still broken and not available on all cards"); |
128 | MODULE_PARM_DESC(channels," Channel bitmask for specific locales. NYI"); | |
129 | ||
130 | static int __devinit rtl8192_pci_probe(struct pci_dev *pdev, | |
131 | const struct pci_device_id *id); | |
132 | static void __devexit rtl8192_pci_disconnect(struct pci_dev *pdev); | |
133 | ||
134 | static struct pci_driver rtl8192_pci_driver = { | |
135 | .name = RTL819xE_MODULE_NAME, /* Driver name */ | |
136 | .id_table = rtl8192_pci_id_tbl, /* PCI_ID table */ | |
137 | .probe = rtl8192_pci_probe, /* probe fn */ | |
138 | .remove = __devexit_p(rtl8192_pci_disconnect), /* remove fn */ | |
bebdf809 | 139 | #ifdef CONFIG_PM |
ecdfa446 GKH |
140 | .suspend = rtl8192E_suspend, /* PM suspend fn */ |
141 | .resume = rtl8192E_resume, /* PM resume fn */ | |
142 | #else | |
143 | .suspend = NULL, /* PM suspend fn */ | |
214985a6 | 144 | .resume = NULL, /* PM resume fn */ |
ecdfa446 | 145 | #endif |
ecdfa446 GKH |
146 | }; |
147 | ||
559fba5e MM |
148 | static void rtl8192_start_beacon(struct net_device *dev); |
149 | static void rtl8192_stop_beacon(struct net_device *dev); | |
150 | static void rtl819x_watchdog_wqcallback(struct work_struct *work); | |
151 | static void rtl8192_irq_rx_tasklet(struct r8192_priv *priv); | |
152 | static void rtl8192_irq_tx_tasklet(struct r8192_priv *priv); | |
153 | static void rtl8192_prepare_beacon(struct r8192_priv *priv); | |
154 | static irqreturn_t rtl8192_interrupt(int irq, void *netdev); | |
881a975b | 155 | static void rtl819xE_tx_cmd(struct net_device *dev, struct sk_buff *skb); |
5b3b1a7b MM |
156 | static void rtl8192_update_ratr_table(struct net_device* dev); |
157 | static void rtl8192_restart(struct work_struct *work); | |
158 | static void watch_dog_timer_callback(unsigned long data); | |
159 | static int _rtl8192_up(struct net_device *dev); | |
160 | static void rtl8192_cancel_deferred_work(struct r8192_priv* priv); | |
559fba5e | 161 | |
ecdfa446 GKH |
162 | #ifdef ENABLE_DOT11D |
163 | ||
164 | typedef struct _CHANNEL_LIST | |
165 | { | |
166 | u8 Channel[32]; | |
167 | u8 Len; | |
168 | }CHANNEL_LIST, *PCHANNEL_LIST; | |
169 | ||
ab2161a0 | 170 | static const CHANNEL_LIST ChannelPlan[] = { |
ecdfa446 GKH |
171 | {{1,2,3,4,5,6,7,8,9,10,11,36,40,44,48,52,56,60,64,149,153,157,161,165},24}, //FCC |
172 | {{1,2,3,4,5,6,7,8,9,10,11},11}, //IC | |
173 | {{1,2,3,4,5,6,7,8,9,10,11,12,13,36,40,44,48,52,56,60,64},21}, //ETSI | |
174 | {{1,2,3,4,5,6,7,8,9,10,11,12,13},13}, //Spain. Change to ETSI. | |
175 | {{1,2,3,4,5,6,7,8,9,10,11,12,13},13}, //France. Change to ETSI. | |
176 | {{1,2,3,4,5,6,7,8,9,10,11,12,13,14,36,40,44,48,52,56,60,64},22}, //MKK //MKK | |
177 | {{1,2,3,4,5,6,7,8,9,10,11,12,13,14,36,40,44,48,52,56,60,64},22},//MKK1 | |
178 | {{1,2,3,4,5,6,7,8,9,10,11,12,13},13}, //Israel. | |
179 | {{1,2,3,4,5,6,7,8,9,10,11,12,13,14,36,40,44,48,52,56,60,64},22}, // For 11a , TELEC | |
180 | {{1,2,3,4,5,6,7,8,9,10,11,12,13,14,36,40,44,48,52,56,60,64}, 22}, //MIC | |
181 | {{1,2,3,4,5,6,7,8,9,10,11,12,13,14},14} //For Global Domain. 1-11:active scan, 12-14 passive scan. //+YJ, 080626 | |
182 | }; | |
183 | ||
184 | static void rtl819x_set_channel_map(u8 channel_plan, struct r8192_priv* priv) | |
185 | { | |
186 | int i, max_chan=-1, min_chan=-1; | |
187 | struct ieee80211_device* ieee = priv->ieee80211; | |
188 | switch (channel_plan) | |
189 | { | |
190 | case COUNTRY_CODE_FCC: | |
191 | case COUNTRY_CODE_IC: | |
192 | case COUNTRY_CODE_ETSI: | |
193 | case COUNTRY_CODE_SPAIN: | |
194 | case COUNTRY_CODE_FRANCE: | |
195 | case COUNTRY_CODE_MKK: | |
196 | case COUNTRY_CODE_MKK1: | |
197 | case COUNTRY_CODE_ISRAEL: | |
198 | case COUNTRY_CODE_TELEC: | |
199 | case COUNTRY_CODE_MIC: | |
200 | { | |
201 | Dot11d_Init(ieee); | |
202 | ieee->bGlobalDomain = false; | |
203 | //acturally 8225 & 8256 rf chip only support B,G,24N mode | |
204 | if ((priv->rf_chip == RF_8225) || (priv->rf_chip == RF_8256)) | |
205 | { | |
206 | min_chan = 1; | |
207 | max_chan = 14; | |
208 | } | |
209 | else | |
210 | { | |
211 | RT_TRACE(COMP_ERR, "unknown rf chip, can't set channel map in function:%s()\n", __FUNCTION__); | |
212 | } | |
213 | if (ChannelPlan[channel_plan].Len != 0){ | |
214 | // Clear old channel map | |
215 | memset(GET_DOT11D_INFO(ieee)->channel_map, 0, sizeof(GET_DOT11D_INFO(ieee)->channel_map)); | |
216 | // Set new channel map | |
217 | for (i=0;i<ChannelPlan[channel_plan].Len;i++) | |
218 | { | |
219 | if (ChannelPlan[channel_plan].Channel[i] < min_chan || ChannelPlan[channel_plan].Channel[i] > max_chan) | |
220 | break; | |
221 | GET_DOT11D_INFO(ieee)->channel_map[ChannelPlan[channel_plan].Channel[i]] = 1; | |
222 | } | |
223 | } | |
224 | break; | |
225 | } | |
226 | case COUNTRY_CODE_GLOBAL_DOMAIN: | |
227 | { | |
228 | GET_DOT11D_INFO(ieee)->bEnabled = 0; //this flag enabled to follow 11d country IE setting, otherwise, it shall follow global domain setting | |
229 | Dot11d_Reset(ieee); | |
230 | ieee->bGlobalDomain = true; | |
231 | break; | |
232 | } | |
233 | default: | |
234 | break; | |
235 | } | |
236 | } | |
237 | #endif | |
238 | ||
52cab756 MM |
239 | static inline bool rx_hal_is_cck_rate(prx_fwinfo_819x_pci pdrvinfo) |
240 | { | |
241 | return (pdrvinfo->RxRate == DESC90_RATE1M || | |
242 | pdrvinfo->RxRate == DESC90_RATE2M || | |
243 | pdrvinfo->RxRate == DESC90_RATE5_5M || | |
244 | pdrvinfo->RxRate == DESC90_RATE11M) && | |
245 | !pdrvinfo->RxHT; | |
246 | } | |
ecdfa446 GKH |
247 | |
248 | void CamResetAllEntry(struct net_device *dev) | |
249 | { | |
c325d980 | 250 | write_nic_dword(dev, RWCAM, BIT31|BIT30); |
ecdfa446 GKH |
251 | } |
252 | ||
253 | ||
254 | void write_cam(struct net_device *dev, u8 addr, u32 data) | |
255 | { | |
256 | write_nic_dword(dev, WCAMI, data); | |
257 | write_nic_dword(dev, RWCAM, BIT31|BIT16|(addr&0xff) ); | |
258 | } | |
259 | u32 read_cam(struct net_device *dev, u8 addr) | |
260 | { | |
261 | write_nic_dword(dev, RWCAM, 0x80000000|(addr&0xff) ); | |
262 | return read_nic_dword(dev, 0xa8); | |
263 | } | |
264 | ||
ecdfa446 GKH |
265 | #ifdef CONFIG_RTL8180_IO_MAP |
266 | ||
267 | u8 read_nic_byte(struct net_device *dev, int x) | |
268 | { | |
269 | return 0xff&inb(dev->base_addr +x); | |
270 | } | |
271 | ||
272 | u32 read_nic_dword(struct net_device *dev, int x) | |
273 | { | |
274 | return inl(dev->base_addr +x); | |
275 | } | |
276 | ||
277 | u16 read_nic_word(struct net_device *dev, int x) | |
278 | { | |
279 | return inw(dev->base_addr +x); | |
280 | } | |
281 | ||
282 | void write_nic_byte(struct net_device *dev, int x,u8 y) | |
283 | { | |
284 | outb(y&0xff,dev->base_addr +x); | |
285 | } | |
286 | ||
287 | void write_nic_word(struct net_device *dev, int x,u16 y) | |
288 | { | |
289 | outw(y,dev->base_addr +x); | |
290 | } | |
291 | ||
292 | void write_nic_dword(struct net_device *dev, int x,u32 y) | |
293 | { | |
294 | outl(y,dev->base_addr +x); | |
295 | } | |
296 | ||
297 | #else /* RTL_IO_MAP */ | |
298 | ||
299 | u8 read_nic_byte(struct net_device *dev, int x) | |
300 | { | |
301 | return 0xff&readb((u8*)dev->mem_start +x); | |
302 | } | |
303 | ||
304 | u32 read_nic_dword(struct net_device *dev, int x) | |
305 | { | |
306 | return readl((u8*)dev->mem_start +x); | |
307 | } | |
308 | ||
309 | u16 read_nic_word(struct net_device *dev, int x) | |
310 | { | |
311 | return readw((u8*)dev->mem_start +x); | |
312 | } | |
313 | ||
314 | void write_nic_byte(struct net_device *dev, int x,u8 y) | |
315 | { | |
316 | writeb(y,(u8*)dev->mem_start +x); | |
317 | udelay(20); | |
318 | } | |
319 | ||
320 | void write_nic_dword(struct net_device *dev, int x,u32 y) | |
321 | { | |
322 | writel(y,(u8*)dev->mem_start +x); | |
323 | udelay(20); | |
324 | } | |
325 | ||
326 | void write_nic_word(struct net_device *dev, int x,u16 y) | |
327 | { | |
328 | writew(y,(u8*)dev->mem_start +x); | |
329 | udelay(20); | |
330 | } | |
331 | ||
332 | #endif /* RTL_IO_MAP */ | |
333 | ||
65a43784 | 334 | u8 rtl8192e_ap_sec_type(struct ieee80211_device *ieee) |
335 | { | |
4a533365 MM |
336 | static const u8 ccmp_ie[4] = {0x00,0x50,0xf2,0x04}; |
337 | static const u8 ccmp_rsn_ie[4] = {0x00, 0x0f, 0xac, 0x04}; | |
65a43784 | 338 | int wpa_ie_len= ieee->wpa_ie_len; |
339 | struct ieee80211_crypt_data* crypt; | |
340 | int encrypt; | |
341 | ||
342 | crypt = ieee->crypt[ieee->tx_keyidx]; | |
343 | ||
207b58fb MM |
344 | encrypt = (ieee->current_network.capability & WLAN_CAPABILITY_PRIVACY) || |
345 | (ieee->host_encrypt && crypt && crypt->ops && | |
65a43784 | 346 | (0 == strcmp(crypt->ops->name,"WEP"))); |
347 | ||
348 | /* simply judge */ | |
349 | if(encrypt && (wpa_ie_len == 0)) { | |
350 | // wep encryption, no N mode setting */ | |
351 | return SEC_ALG_WEP; | |
352 | } else if((wpa_ie_len != 0)) { | |
353 | // parse pairwise key type */ | |
354 | if (((ieee->wpa_ie[0] == 0xdd) && (!memcmp(&(ieee->wpa_ie[14]),ccmp_ie,4))) || | |
355 | ((ieee->wpa_ie[0] == 0x30) && (!memcmp(&ieee->wpa_ie[10],ccmp_rsn_ie, 4)))) | |
356 | return SEC_ALG_CCMP; | |
357 | else | |
358 | return SEC_ALG_TKIP; | |
359 | } else { | |
360 | return SEC_ALG_NONE; | |
361 | } | |
362 | } | |
363 | ||
364 | void | |
365 | rtl8192e_SetHwReg(struct net_device *dev,u8 variable,u8* val) | |
366 | { | |
367 | struct r8192_priv* priv = ieee80211_priv(dev); | |
368 | ||
369 | switch(variable) | |
370 | { | |
371 | ||
372 | case HW_VAR_BSSID: | |
373 | write_nic_dword(dev, BSSIDR, ((u32*)(val))[0]); | |
374 | write_nic_word(dev, BSSIDR+2, ((u16*)(val+2))[0]); | |
375 | break; | |
376 | ||
377 | case HW_VAR_MEDIA_STATUS: | |
378 | { | |
379 | RT_OP_MODE OpMode = *((RT_OP_MODE *)(val)); | |
65a43784 | 380 | u8 btMsr = read_nic_byte(dev, MSR); |
381 | ||
382 | btMsr &= 0xfc; | |
383 | ||
384 | switch(OpMode) | |
385 | { | |
386 | case RT_OP_MODE_INFRASTRUCTURE: | |
387 | btMsr |= MSR_INFRA; | |
65a43784 | 388 | break; |
389 | ||
390 | case RT_OP_MODE_IBSS: | |
391 | btMsr |= MSR_ADHOC; | |
65a43784 | 392 | break; |
393 | ||
394 | case RT_OP_MODE_AP: | |
395 | btMsr |= MSR_AP; | |
65a43784 | 396 | break; |
397 | ||
398 | default: | |
399 | btMsr |= MSR_NOLINK; | |
400 | break; | |
401 | } | |
402 | ||
403 | write_nic_byte(dev, MSR, btMsr); | |
65a43784 | 404 | } |
405 | break; | |
406 | ||
951fc8ed | 407 | case HW_VAR_CHECK_BSSID: |
65a43784 | 408 | { |
409 | u32 RegRCR, Type; | |
410 | ||
411 | Type = ((u8*)(val))[0]; | |
65a43784 | 412 | RegRCR = read_nic_dword(dev,RCR); |
413 | priv->ReceiveConfig = RegRCR; | |
414 | ||
415 | if (Type == true) | |
416 | RegRCR |= (RCR_CBSSID); | |
417 | else if (Type == false) | |
418 | RegRCR &= (~RCR_CBSSID); | |
419 | ||
65a43784 | 420 | write_nic_dword(dev, RCR,RegRCR); |
421 | priv->ReceiveConfig = RegRCR; | |
422 | ||
423 | } | |
424 | break; | |
425 | ||
426 | case HW_VAR_SLOT_TIME: | |
427 | { | |
65a43784 | 428 | priv->slot_time = val[0]; |
429 | write_nic_byte(dev, SLOT_TIME, val[0]); | |
430 | ||
431 | } | |
432 | break; | |
433 | ||
434 | case HW_VAR_ACK_PREAMBLE: | |
435 | { | |
436 | u32 regTmp = 0; | |
437 | priv->short_preamble = (bool)(*(u8*)val ); | |
438 | regTmp = priv->basic_rate; | |
439 | if (priv->short_preamble) | |
440 | regTmp |= BRSR_AckShortPmb; | |
441 | write_nic_dword(dev, RRSR, regTmp); | |
442 | } | |
443 | break; | |
444 | ||
445 | case HW_VAR_CPU_RST: | |
446 | write_nic_dword(dev, CPU_GEN, ((u32*)(val))[0]); | |
447 | break; | |
448 | ||
449 | default: | |
450 | break; | |
451 | } | |
452 | ||
453 | } | |
454 | ||
ecdfa446 GKH |
455 | static struct proc_dir_entry *rtl8192_proc = NULL; |
456 | ||
ecdfa446 GKH |
457 | static int proc_get_stats_ap(char *page, char **start, |
458 | off_t offset, int count, | |
459 | int *eof, void *data) | |
460 | { | |
461 | struct net_device *dev = data; | |
462 | struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev); | |
463 | struct ieee80211_device *ieee = priv->ieee80211; | |
464 | struct ieee80211_network *target; | |
ecdfa446 GKH |
465 | int len = 0; |
466 | ||
467 | list_for_each_entry(target, &ieee->network_list, list) { | |
468 | ||
469 | len += snprintf(page + len, count - len, | |
470 | "%s ", target->ssid); | |
471 | ||
472 | if(target->wpa_ie_len>0 || target->rsn_ie_len>0){ | |
473 | len += snprintf(page + len, count - len, | |
474 | "WPA\n"); | |
475 | } | |
476 | else{ | |
477 | len += snprintf(page + len, count - len, | |
478 | "non_WPA\n"); | |
479 | } | |
480 | ||
481 | } | |
482 | ||
483 | *eof = 1; | |
484 | return len; | |
485 | } | |
486 | ||
487 | static int proc_get_registers(char *page, char **start, | |
488 | off_t offset, int count, | |
489 | int *eof, void *data) | |
490 | { | |
491 | struct net_device *dev = data; | |
ecdfa446 GKH |
492 | int len = 0; |
493 | int i,n; | |
ecdfa446 GKH |
494 | int max=0xff; |
495 | ||
496 | /* This dump the current register page */ | |
497 | len += snprintf(page + len, count - len, | |
498 | "\n####################page 0##################\n "); | |
499 | ||
500 | for(n=0;n<=max;) | |
501 | { | |
ecdfa446 GKH |
502 | len += snprintf(page + len, count - len, |
503 | "\nD: %2x > ",n); | |
504 | ||
505 | for(i=0;i<16 && n<=max;i++,n++) | |
506 | len += snprintf(page + len, count - len, | |
507 | "%2x ",read_nic_byte(dev,n)); | |
ecdfa446 GKH |
508 | } |
509 | len += snprintf(page + len, count - len,"\n"); | |
510 | len += snprintf(page + len, count - len, | |
511 | "\n####################page 1##################\n "); | |
512 | for(n=0;n<=max;) | |
513 | { | |
ecdfa446 GKH |
514 | len += snprintf(page + len, count - len, |
515 | "\nD: %2x > ",n); | |
516 | ||
517 | for(i=0;i<16 && n<=max;i++,n++) | |
518 | len += snprintf(page + len, count - len, | |
519 | "%2x ",read_nic_byte(dev,0x100|n)); | |
ecdfa446 GKH |
520 | } |
521 | ||
522 | len += snprintf(page + len, count - len, | |
523 | "\n####################page 3##################\n "); | |
524 | for(n=0;n<=max;) | |
525 | { | |
ecdfa446 GKH |
526 | len += snprintf(page + len, count - len, |
527 | "\nD: %2x > ",n); | |
528 | ||
529 | for(i=0;i<16 && n<=max;i++,n++) | |
530 | len += snprintf(page + len, count - len, | |
531 | "%2x ",read_nic_byte(dev,0x300|n)); | |
ecdfa446 GKH |
532 | } |
533 | ||
ecdfa446 GKH |
534 | *eof = 1; |
535 | return len; | |
536 | ||
537 | } | |
538 | ||
ecdfa446 GKH |
539 | static int proc_get_stats_tx(char *page, char **start, |
540 | off_t offset, int count, | |
541 | int *eof, void *data) | |
542 | { | |
543 | struct net_device *dev = data; | |
544 | struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev); | |
545 | ||
546 | int len = 0; | |
547 | ||
548 | len += snprintf(page + len, count - len, | |
549 | "TX VI priority ok int: %lu\n" | |
ecdfa446 | 550 | "TX VO priority ok int: %lu\n" |
ecdfa446 | 551 | "TX BE priority ok int: %lu\n" |
ecdfa446 | 552 | "TX BK priority ok int: %lu\n" |
ecdfa446 | 553 | "TX MANAGE priority ok int: %lu\n" |
ecdfa446 GKH |
554 | "TX BEACON priority ok int: %lu\n" |
555 | "TX BEACON priority error int: %lu\n" | |
556 | "TX CMDPKT priority ok int: %lu\n" | |
ecdfa446 GKH |
557 | "TX queue stopped?: %d\n" |
558 | "TX fifo overflow: %lu\n" | |
ecdfa446 GKH |
559 | "TX total data packets %lu\n" |
560 | "TX total data bytes :%lu\n", | |
ecdfa446 | 561 | priv->stats.txviokint, |
ecdfa446 | 562 | priv->stats.txvookint, |
ecdfa446 | 563 | priv->stats.txbeokint, |
ecdfa446 | 564 | priv->stats.txbkokint, |
ecdfa446 | 565 | priv->stats.txmanageokint, |
ecdfa446 GKH |
566 | priv->stats.txbeaconokint, |
567 | priv->stats.txbeaconerr, | |
568 | priv->stats.txcmdpktokint, | |
ecdfa446 GKH |
569 | netif_queue_stopped(dev), |
570 | priv->stats.txoverflow, | |
ecdfa446 | 571 | priv->ieee80211->stats.tx_packets, |
3059f2de | 572 | priv->ieee80211->stats.tx_bytes); |
ecdfa446 GKH |
573 | |
574 | *eof = 1; | |
575 | return len; | |
576 | } | |
577 | ||
578 | ||
579 | ||
580 | static int proc_get_stats_rx(char *page, char **start, | |
581 | off_t offset, int count, | |
582 | int *eof, void *data) | |
583 | { | |
584 | struct net_device *dev = data; | |
585 | struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev); | |
586 | ||
587 | int len = 0; | |
588 | ||
589 | len += snprintf(page + len, count - len, | |
590 | "RX packets: %lu\n" | |
591 | "RX desc err: %lu\n" | |
c282f2e3 | 592 | "RX rx overflow error: %lu\n", |
ecdfa446 GKH |
593 | priv->stats.rxint, |
594 | priv->stats.rxrdu, | |
c282f2e3 | 595 | priv->stats.rxoverflow); |
ecdfa446 GKH |
596 | |
597 | *eof = 1; | |
598 | return len; | |
599 | } | |
600 | ||
5e1ad18a | 601 | static void rtl8192_proc_module_init(void) |
ecdfa446 GKH |
602 | { |
603 | RT_TRACE(COMP_INIT, "Initializing proc filesystem"); | |
ecdfa446 | 604 | rtl8192_proc=create_proc_entry(RTL819xE_MODULE_NAME, S_IFDIR, init_net.proc_net); |
ecdfa446 GKH |
605 | } |
606 | ||
607 | ||
5e1ad18a | 608 | static void rtl8192_proc_module_remove(void) |
ecdfa446 | 609 | { |
ecdfa446 | 610 | remove_proc_entry(RTL819xE_MODULE_NAME, init_net.proc_net); |
ecdfa446 GKH |
611 | } |
612 | ||
613 | ||
5e1ad18a | 614 | static void rtl8192_proc_remove_one(struct net_device *dev) |
ecdfa446 GKH |
615 | { |
616 | struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev); | |
617 | ||
618 | printk("dev name=======> %s\n",dev->name); | |
619 | ||
620 | if (priv->dir_dev) { | |
621 | // remove_proc_entry("stats-hw", priv->dir_dev); | |
622 | remove_proc_entry("stats-tx", priv->dir_dev); | |
623 | remove_proc_entry("stats-rx", priv->dir_dev); | |
624 | // remove_proc_entry("stats-ieee", priv->dir_dev); | |
625 | remove_proc_entry("stats-ap", priv->dir_dev); | |
626 | remove_proc_entry("registers", priv->dir_dev); | |
627 | // remove_proc_entry("cck-registers",priv->dir_dev); | |
628 | // remove_proc_entry("ofdm-registers",priv->dir_dev); | |
629 | //remove_proc_entry(dev->name, rtl8192_proc); | |
630 | remove_proc_entry("wlan0", rtl8192_proc); | |
631 | priv->dir_dev = NULL; | |
632 | } | |
633 | } | |
634 | ||
635 | ||
5e1ad18a | 636 | static void rtl8192_proc_init_one(struct net_device *dev) |
ecdfa446 GKH |
637 | { |
638 | struct proc_dir_entry *e; | |
639 | struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev); | |
640 | priv->dir_dev = create_proc_entry(dev->name, | |
641 | S_IFDIR | S_IRUGO | S_IXUGO, | |
642 | rtl8192_proc); | |
643 | if (!priv->dir_dev) { | |
644 | RT_TRACE(COMP_ERR, "Unable to initialize /proc/net/rtl8192/%s\n", | |
645 | dev->name); | |
646 | return; | |
647 | } | |
ecdfa446 GKH |
648 | e = create_proc_read_entry("stats-rx", S_IFREG | S_IRUGO, |
649 | priv->dir_dev, proc_get_stats_rx, dev); | |
650 | ||
651 | if (!e) { | |
652 | RT_TRACE(COMP_ERR,"Unable to initialize " | |
653 | "/proc/net/rtl8192/%s/stats-rx\n", | |
654 | dev->name); | |
655 | } | |
656 | ||
657 | ||
658 | e = create_proc_read_entry("stats-tx", S_IFREG | S_IRUGO, | |
659 | priv->dir_dev, proc_get_stats_tx, dev); | |
660 | ||
661 | if (!e) { | |
662 | RT_TRACE(COMP_ERR, "Unable to initialize " | |
663 | "/proc/net/rtl8192/%s/stats-tx\n", | |
664 | dev->name); | |
665 | } | |
ecdfa446 GKH |
666 | |
667 | e = create_proc_read_entry("stats-ap", S_IFREG | S_IRUGO, | |
668 | priv->dir_dev, proc_get_stats_ap, dev); | |
669 | ||
670 | if (!e) { | |
671 | RT_TRACE(COMP_ERR, "Unable to initialize " | |
672 | "/proc/net/rtl8192/%s/stats-ap\n", | |
673 | dev->name); | |
674 | } | |
675 | ||
676 | e = create_proc_read_entry("registers", S_IFREG | S_IRUGO, | |
677 | priv->dir_dev, proc_get_registers, dev); | |
678 | if (!e) { | |
679 | RT_TRACE(COMP_ERR, "Unable to initialize " | |
680 | "/proc/net/rtl8192/%s/registers\n", | |
681 | dev->name); | |
682 | } | |
ecdfa446 | 683 | } |
ecdfa446 | 684 | |
ecdfa446 GKH |
685 | short check_nic_enough_desc(struct net_device *dev, int prio) |
686 | { | |
687 | struct r8192_priv *priv = ieee80211_priv(dev); | |
688 | struct rtl8192_tx_ring *ring = &priv->tx_ring[prio]; | |
689 | ||
690 | /* for now we reserve two free descriptor as a safety boundary | |
691 | * between the tail and the head | |
692 | */ | |
285f660c | 693 | return (ring->entries - skb_queue_len(&ring->queue) >= 2); |
ecdfa446 GKH |
694 | } |
695 | ||
5e1ad18a | 696 | static void tx_timeout(struct net_device *dev) |
ecdfa446 GKH |
697 | { |
698 | struct r8192_priv *priv = ieee80211_priv(dev); | |
ecdfa446 | 699 | |
ecdfa446 | 700 | schedule_work(&priv->reset_wq); |
ecdfa446 GKH |
701 | printk("TXTIMEOUT"); |
702 | } | |
703 | ||
5e1ad18a | 704 | static void rtl8192_irq_enable(struct net_device *dev) |
ecdfa446 GKH |
705 | { |
706 | struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev); | |
707 | priv->irq_enabled = 1; | |
708 | write_nic_dword(dev,INTA_MASK, priv->irq_mask); | |
709 | } | |
710 | ||
65a43784 | 711 | void rtl8192_irq_disable(struct net_device *dev) |
ecdfa446 GKH |
712 | { |
713 | struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev); | |
714 | ||
715 | write_nic_dword(dev,INTA_MASK,0); | |
ecdfa446 GKH |
716 | priv->irq_enabled = 0; |
717 | } | |
718 | ||
ecdfa446 GKH |
719 | void rtl8192_update_msr(struct net_device *dev) |
720 | { | |
721 | struct r8192_priv *priv = ieee80211_priv(dev); | |
722 | u8 msr; | |
723 | ||
724 | msr = read_nic_byte(dev, MSR); | |
725 | msr &= ~ MSR_LINK_MASK; | |
726 | ||
727 | /* do not change in link_state != WLAN_LINK_ASSOCIATED. | |
728 | * msr must be updated if the state is ASSOCIATING. | |
729 | * this is intentional and make sense for ad-hoc and | |
730 | * master (see the create BSS/IBSS func) | |
731 | */ | |
732 | if (priv->ieee80211->state == IEEE80211_LINKED){ | |
733 | ||
734 | if (priv->ieee80211->iw_mode == IW_MODE_INFRA) | |
735 | msr |= (MSR_LINK_MANAGED<<MSR_LINK_SHIFT); | |
736 | else if (priv->ieee80211->iw_mode == IW_MODE_ADHOC) | |
737 | msr |= (MSR_LINK_ADHOC<<MSR_LINK_SHIFT); | |
738 | else if (priv->ieee80211->iw_mode == IW_MODE_MASTER) | |
739 | msr |= (MSR_LINK_MASTER<<MSR_LINK_SHIFT); | |
740 | ||
741 | }else | |
742 | msr |= (MSR_LINK_NONE<<MSR_LINK_SHIFT); | |
743 | ||
744 | write_nic_byte(dev, MSR, msr); | |
745 | } | |
746 | ||
747 | void rtl8192_set_chan(struct net_device *dev,short ch) | |
748 | { | |
61d0e67a | 749 | struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev); |
ecdfa446 | 750 | |
61d0e67a | 751 | priv->chan = ch; |
ecdfa446 | 752 | |
61d0e67a | 753 | /* need to implement rf set channel here WB */ |
ecdfa446 | 754 | |
61d0e67a MM |
755 | if (priv->rf_set_chan) |
756 | priv->rf_set_chan(dev, priv->chan); | |
ecdfa446 GKH |
757 | } |
758 | ||
759 | void rtl8192_rx_enable(struct net_device *dev) | |
760 | { | |
7aed48d9 MM |
761 | struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev); |
762 | ||
763 | write_nic_dword(dev, RDQDA,priv->rx_ring_dma); | |
ecdfa446 GKH |
764 | } |
765 | ||
766 | /* the TX_DESC_BASE setting is according to the following queue index | |
767 | * BK_QUEUE ===> 0 | |
768 | * BE_QUEUE ===> 1 | |
769 | * VI_QUEUE ===> 2 | |
770 | * VO_QUEUE ===> 3 | |
771 | * HCCA_QUEUE ===> 4 | |
772 | * TXCMD_QUEUE ===> 5 | |
773 | * MGNT_QUEUE ===> 6 | |
774 | * HIGH_QUEUE ===> 7 | |
775 | * BEACON_QUEUE ===> 8 | |
776 | * */ | |
881a975b | 777 | static const u32 TX_DESC_BASE[] = {BKQDA, BEQDA, VIQDA, VOQDA, HCCAQDA, CQDA, MQDA, HQDA, BQDA}; |
ecdfa446 GKH |
778 | void rtl8192_tx_enable(struct net_device *dev) |
779 | { | |
7aed48d9 MM |
780 | struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev); |
781 | u32 i; | |
ecdfa446 | 782 | |
7aed48d9 MM |
783 | for (i = 0; i < MAX_TX_QUEUE_COUNT; i++) |
784 | write_nic_dword(dev, TX_DESC_BASE[i], priv->tx_ring[i].dma); | |
785 | ||
786 | ieee80211_reset_queue(priv->ieee80211); | |
ecdfa446 GKH |
787 | } |
788 | ||
ecdfa446 GKH |
789 | |
790 | static void rtl8192_free_rx_ring(struct net_device *dev) | |
791 | { | |
7aed48d9 MM |
792 | struct r8192_priv *priv = ieee80211_priv(dev); |
793 | int i; | |
ecdfa446 | 794 | |
7aed48d9 MM |
795 | for (i = 0; i < priv->rxringcount; i++) { |
796 | struct sk_buff *skb = priv->rx_buf[i]; | |
797 | if (!skb) | |
798 | continue; | |
ecdfa446 | 799 | |
7aed48d9 MM |
800 | pci_unmap_single(priv->pdev, |
801 | *((dma_addr_t *)skb->cb), | |
802 | priv->rxbuffersize, PCI_DMA_FROMDEVICE); | |
803 | kfree_skb(skb); | |
804 | } | |
ecdfa446 | 805 | |
7aed48d9 MM |
806 | pci_free_consistent(priv->pdev, sizeof(*priv->rx_ring) * priv->rxringcount, |
807 | priv->rx_ring, priv->rx_ring_dma); | |
808 | priv->rx_ring = NULL; | |
ecdfa446 GKH |
809 | } |
810 | ||
811 | static void rtl8192_free_tx_ring(struct net_device *dev, unsigned int prio) | |
812 | { | |
7aed48d9 MM |
813 | struct r8192_priv *priv = ieee80211_priv(dev); |
814 | struct rtl8192_tx_ring *ring = &priv->tx_ring[prio]; | |
ecdfa446 | 815 | |
7aed48d9 MM |
816 | while (skb_queue_len(&ring->queue)) { |
817 | tx_desc_819x_pci *entry = &ring->desc[ring->idx]; | |
818 | struct sk_buff *skb = __skb_dequeue(&ring->queue); | |
ecdfa446 | 819 | |
7aed48d9 MM |
820 | pci_unmap_single(priv->pdev, le32_to_cpu(entry->TxBuffAddr), |
821 | skb->len, PCI_DMA_TODEVICE); | |
822 | kfree_skb(skb); | |
823 | ring->idx = (ring->idx + 1) % ring->entries; | |
824 | } | |
ecdfa446 | 825 | |
7aed48d9 MM |
826 | pci_free_consistent(priv->pdev, sizeof(*ring->desc)*ring->entries, |
827 | ring->desc, ring->dma); | |
828 | ring->desc = NULL; | |
ecdfa446 GKH |
829 | } |
830 | ||
16d74da0 | 831 | void PHY_SetRtl8192eRfOff(struct net_device* dev) |
ecdfa446 | 832 | { |
65a43784 | 833 | //disable RF-Chip A/B |
834 | rtl8192_setBBreg(dev, rFPGA0_XA_RFInterfaceOE, BIT4, 0x0); | |
835 | //analog to digital off, for power save | |
836 | rtl8192_setBBreg(dev, rFPGA0_AnalogParameter4, 0x300, 0x0); | |
837 | //digital to analog off, for power save | |
838 | rtl8192_setBBreg(dev, rFPGA0_AnalogParameter1, 0x18, 0x0); | |
839 | //rx antenna off | |
840 | rtl8192_setBBreg(dev, rOFDM0_TRxPathEnable, 0xf, 0x0); | |
841 | //rx antenna off | |
842 | rtl8192_setBBreg(dev, rOFDM1_TRxPathEnable, 0xf, 0x0); | |
843 | //analog to digital part2 off, for power save | |
844 | rtl8192_setBBreg(dev, rFPGA0_AnalogParameter1, 0x60, 0x0); | |
845 | rtl8192_setBBreg(dev, rFPGA0_AnalogParameter1, 0x4, 0x0); | |
846 | // Analog parameter!!Change bias and Lbus control. | |
847 | write_nic_byte(dev, ANAPAR_FOR_8192PciE, 0x07); | |
848 | ||
849 | } | |
ecdfa446 | 850 | |
65a43784 | 851 | void rtl8192_halt_adapter(struct net_device *dev, bool reset) |
ecdfa446 | 852 | { |
ecdfa446 | 853 | struct r8192_priv *priv = ieee80211_priv(dev); |
65a43784 | 854 | int i; |
932f4b3a MM |
855 | u8 OpMode; |
856 | u32 ulRegRead; | |
65a43784 | 857 | |
858 | OpMode = RT_OP_MODE_NO_LINK; | |
859 | priv->ieee80211->SetHwRegHandler(dev, HW_VAR_MEDIA_STATUS, &OpMode); | |
ecdfa446 | 860 | |
932f4b3a MM |
861 | if (!priv->ieee80211->bSupportRemoteWakeUp) { |
862 | /* | |
863 | * disable tx/rx. In 8185 we write 0x10 (Reset bit), | |
864 | * but here we make reference to WMAC and wirte 0x0 | |
865 | */ | |
866 | write_nic_byte(dev, CMDR, 0); | |
65a43784 | 867 | } |
ecdfa446 | 868 | |
65a43784 | 869 | mdelay(20); |
ecdfa446 | 870 | |
932f4b3a | 871 | if (!reset) { |
65a43784 | 872 | mdelay(150); |
873 | ||
874 | #ifdef RTL8192E | |
932f4b3a | 875 | priv->bHwRfOffAction = 2; |
65a43784 | 876 | #endif |
877 | ||
932f4b3a MM |
878 | /* |
879 | * Call MgntActSet_RF_State instead to | |
880 | * prevent RF config race condition. | |
881 | */ | |
882 | if (!priv->ieee80211->bSupportRemoteWakeUp) { | |
65a43784 | 883 | PHY_SetRtl8192eRfOff(dev); |
65a43784 | 884 | ulRegRead = read_nic_dword(dev,CPU_GEN); |
932f4b3a | 885 | ulRegRead |= CPU_GEN_SYSTEM_RESET; |
65a43784 | 886 | write_nic_dword(dev,CPU_GEN, ulRegRead); |
932f4b3a MM |
887 | } else { |
888 | /* for WOL */ | |
65a43784 | 889 | write_nic_dword(dev, WFCRC0, 0xffffffff); |
890 | write_nic_dword(dev, WFCRC1, 0xffffffff); | |
891 | write_nic_dword(dev, WFCRC2, 0xffffffff); | |
892 | ||
932f4b3a | 893 | /* Write PMR register */ |
65a43784 | 894 | write_nic_byte(dev, PMR, 0x5); |
932f4b3a | 895 | /* Disable tx, enanble rx */ |
65a43784 | 896 | write_nic_byte(dev, MacBlkCtrl, 0xa); |
897 | } | |
898 | } | |
899 | ||
900 | for(i = 0; i < MAX_QUEUE_SIZE; i++) { | |
901 | skb_queue_purge(&priv->ieee80211->skb_waitQ [i]); | |
902 | } | |
903 | for(i = 0; i < MAX_QUEUE_SIZE; i++) { | |
904 | skb_queue_purge(&priv->ieee80211->skb_aggQ [i]); | |
905 | } | |
ecdfa446 GKH |
906 | |
907 | skb_queue_purge(&priv->skb_queue); | |
ecdfa446 GKH |
908 | } |
909 | ||
881a975b | 910 | static const u16 rtl_rate[] = {10,20,55,110,60,90,120,180,240,360,480,540}; |
ecdfa446 GKH |
911 | inline u16 rtl8192_rate2rate(short rate) |
912 | { | |
913 | if (rate >11) return 0; | |
914 | return rtl_rate[rate]; | |
915 | } | |
916 | ||
5e1ad18a | 917 | static void rtl8192_data_hard_stop(struct net_device *dev) |
ecdfa446 | 918 | { |
ecdfa446 GKH |
919 | } |
920 | ||
5e1ad18a | 921 | static void rtl8192_data_hard_resume(struct net_device *dev) |
ecdfa446 | 922 | { |
ecdfa446 GKH |
923 | } |
924 | ||
214985a6 MM |
925 | /* |
926 | * this function TX data frames when the ieee80211 stack requires this. | |
ecdfa446 GKH |
927 | * It checks also if we need to stop the ieee tx queue, eventually do it |
928 | */ | |
5e1ad18a | 929 | static void rtl8192_hard_data_xmit(struct sk_buff *skb, struct net_device *dev, int rate) |
ecdfa446 GKH |
930 | { |
931 | struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev); | |
932 | int ret; | |
ecdfa446 GKH |
933 | cb_desc *tcb_desc = (cb_desc *)(skb->cb + MAX_DEV_ADDR_SIZE); |
934 | u8 queue_index = tcb_desc->queue_index; | |
dcf663fb | 935 | |
ecdfa446 | 936 | /* shall not be referred by command packet */ |
5d33549a | 937 | BUG_ON(queue_index == TXCMD_QUEUE); |
ecdfa446 | 938 | |
dcf663fb | 939 | if (priv->bHwRadioOff || (!priv->up)) |
65a43784 | 940 | { |
941 | kfree_skb(skb); | |
942 | return; | |
943 | } | |
944 | ||
dcf663fb | 945 | memcpy(skb->cb, &dev, sizeof(dev)); |
ecdfa446 | 946 | |
ecdfa446 GKH |
947 | skb_push(skb, priv->ieee80211->tx_headroom); |
948 | ret = rtl8192_tx(dev, skb); | |
dcf663fb | 949 | if (ret != 0) { |
ecdfa446 | 950 | kfree_skb(skb); |
ecdfa446 GKH |
951 | } |
952 | ||
dcf663fb MM |
953 | if (queue_index != MGNT_QUEUE) { |
954 | priv->ieee80211->stats.tx_bytes += (skb->len - priv->ieee80211->tx_headroom); | |
955 | priv->ieee80211->stats.tx_packets++; | |
956 | } | |
ecdfa446 GKH |
957 | } |
958 | ||
214985a6 MM |
959 | /* |
960 | * This is a rough attempt to TX a frame | |
ecdfa446 GKH |
961 | * This is called by the ieee 80211 stack to TX management frames. |
962 | * If the ring is full packet are dropped (for data frame the queue | |
963 | * is stopped before this can happen). | |
964 | */ | |
5e1ad18a | 965 | static int rtl8192_hard_start_xmit(struct sk_buff *skb,struct net_device *dev) |
ecdfa446 GKH |
966 | { |
967 | struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev); | |
ecdfa446 | 968 | int ret; |
ecdfa446 GKH |
969 | cb_desc *tcb_desc = (cb_desc *)(skb->cb + MAX_DEV_ADDR_SIZE); |
970 | u8 queue_index = tcb_desc->queue_index; | |
971 | ||
162f535f MM |
972 | if (queue_index != TXCMD_QUEUE) { |
973 | if (priv->bHwRadioOff || (!priv->up)) | |
65a43784 | 974 | { |
162f535f MM |
975 | kfree_skb(skb); |
976 | return 0; | |
977 | } | |
65a43784 | 978 | } |
ecdfa446 | 979 | |
162f535f MM |
980 | memcpy(skb->cb, &dev, sizeof(dev)); |
981 | if (queue_index == TXCMD_QUEUE) { | |
ecdfa446 GKH |
982 | rtl819xE_tx_cmd(dev, skb); |
983 | ret = 0; | |
ecdfa446 GKH |
984 | return ret; |
985 | } else { | |
ecdfa446 GKH |
986 | tcb_desc->RATRIndex = 7; |
987 | tcb_desc->bTxDisableRateFallBack = 1; | |
988 | tcb_desc->bTxUseDriverAssingedRate = 1; | |
989 | tcb_desc->bTxEnableFwCalcDur = 1; | |
990 | skb_push(skb, priv->ieee80211->tx_headroom); | |
991 | ret = rtl8192_tx(dev, skb); | |
162f535f | 992 | if (ret != 0) { |
ecdfa446 | 993 | kfree_skb(skb); |
162f535f | 994 | } |
ecdfa446 GKH |
995 | } |
996 | ||
ecdfa446 | 997 | return ret; |
ecdfa446 GKH |
998 | } |
999 | ||
1000 | ||
5e1ad18a | 1001 | static void rtl8192_tx_isr(struct net_device *dev, int prio) |
ecdfa446 | 1002 | { |
a922a4b7 MM |
1003 | struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev); |
1004 | struct rtl8192_tx_ring *ring = &priv->tx_ring[prio]; | |
ecdfa446 | 1005 | |
a922a4b7 MM |
1006 | while (skb_queue_len(&ring->queue)) { |
1007 | tx_desc_819x_pci *entry = &ring->desc[ring->idx]; | |
1008 | struct sk_buff *skb; | |
ecdfa446 | 1009 | |
a922a4b7 MM |
1010 | /* |
1011 | * beacon packet will only use the first descriptor defaultly, | |
1012 | * and the OWN may not be cleared by the hardware | |
1013 | */ | |
1014 | if (prio != BEACON_QUEUE) { | |
1015 | if (entry->OWN) | |
1016 | return; | |
1017 | ring->idx = (ring->idx + 1) % ring->entries; | |
1018 | } | |
ecdfa446 | 1019 | |
a922a4b7 MM |
1020 | skb = __skb_dequeue(&ring->queue); |
1021 | pci_unmap_single(priv->pdev, le32_to_cpu(entry->TxBuffAddr), | |
1022 | skb->len, PCI_DMA_TODEVICE); | |
ecdfa446 | 1023 | |
a922a4b7 MM |
1024 | kfree_skb(skb); |
1025 | } | |
1026 | if (prio == MGNT_QUEUE) { | |
1027 | if (priv->ieee80211->ack_tx_to_ieee) { | |
1028 | if (rtl8192_is_tx_queue_empty(dev)) { | |
1029 | priv->ieee80211->ack_tx_to_ieee = 0; | |
1030 | ieee80211_ps_tx_ack(priv->ieee80211, 1); | |
1031 | } | |
1032 | } | |
1033 | } | |
ecdfa446 | 1034 | |
a922a4b7 MM |
1035 | if (prio != BEACON_QUEUE) { |
1036 | /* try to deal with the pending packets */ | |
1037 | tasklet_schedule(&priv->irq_tx_tasklet); | |
1038 | } | |
ecdfa446 GKH |
1039 | } |
1040 | ||
5e1ad18a | 1041 | static void rtl8192_stop_beacon(struct net_device *dev) |
ecdfa446 | 1042 | { |
ecdfa446 GKH |
1043 | } |
1044 | ||
5e1ad18a | 1045 | static void rtl8192_config_rate(struct net_device* dev, u16* rate_config) |
ecdfa446 GKH |
1046 | { |
1047 | struct r8192_priv *priv = ieee80211_priv(dev); | |
1048 | struct ieee80211_network *net; | |
1049 | u8 i=0, basic_rate = 0; | |
1050 | net = & priv->ieee80211->current_network; | |
1051 | ||
1052 | for (i=0; i<net->rates_len; i++) | |
1053 | { | |
1054 | basic_rate = net->rates[i]&0x7f; | |
1055 | switch(basic_rate) | |
1056 | { | |
1057 | case MGN_1M: *rate_config |= RRSR_1M; break; | |
1058 | case MGN_2M: *rate_config |= RRSR_2M; break; | |
1059 | case MGN_5_5M: *rate_config |= RRSR_5_5M; break; | |
1060 | case MGN_11M: *rate_config |= RRSR_11M; break; | |
1061 | case MGN_6M: *rate_config |= RRSR_6M; break; | |
1062 | case MGN_9M: *rate_config |= RRSR_9M; break; | |
1063 | case MGN_12M: *rate_config |= RRSR_12M; break; | |
1064 | case MGN_18M: *rate_config |= RRSR_18M; break; | |
1065 | case MGN_24M: *rate_config |= RRSR_24M; break; | |
1066 | case MGN_36M: *rate_config |= RRSR_36M; break; | |
1067 | case MGN_48M: *rate_config |= RRSR_48M; break; | |
1068 | case MGN_54M: *rate_config |= RRSR_54M; break; | |
1069 | } | |
1070 | } | |
1071 | for (i=0; i<net->rates_ex_len; i++) | |
1072 | { | |
1073 | basic_rate = net->rates_ex[i]&0x7f; | |
1074 | switch(basic_rate) | |
1075 | { | |
1076 | case MGN_1M: *rate_config |= RRSR_1M; break; | |
1077 | case MGN_2M: *rate_config |= RRSR_2M; break; | |
1078 | case MGN_5_5M: *rate_config |= RRSR_5_5M; break; | |
1079 | case MGN_11M: *rate_config |= RRSR_11M; break; | |
1080 | case MGN_6M: *rate_config |= RRSR_6M; break; | |
1081 | case MGN_9M: *rate_config |= RRSR_9M; break; | |
1082 | case MGN_12M: *rate_config |= RRSR_12M; break; | |
1083 | case MGN_18M: *rate_config |= RRSR_18M; break; | |
1084 | case MGN_24M: *rate_config |= RRSR_24M; break; | |
1085 | case MGN_36M: *rate_config |= RRSR_36M; break; | |
1086 | case MGN_48M: *rate_config |= RRSR_48M; break; | |
1087 | case MGN_54M: *rate_config |= RRSR_54M; break; | |
1088 | } | |
1089 | } | |
1090 | } | |
1091 | ||
1092 | ||
1093 | #define SHORT_SLOT_TIME 9 | |
1094 | #define NON_SHORT_SLOT_TIME 20 | |
1095 | ||
5e1ad18a | 1096 | static void rtl8192_update_cap(struct net_device* dev, u16 cap) |
ecdfa446 GKH |
1097 | { |
1098 | u32 tmp = 0; | |
1099 | struct r8192_priv *priv = ieee80211_priv(dev); | |
1100 | struct ieee80211_network *net = &priv->ieee80211->current_network; | |
1101 | priv->short_preamble = cap & WLAN_CAPABILITY_SHORT_PREAMBLE; | |
1102 | tmp = priv->basic_rate; | |
1103 | if (priv->short_preamble) | |
1104 | tmp |= BRSR_AckShortPmb; | |
1105 | write_nic_dword(dev, RRSR, tmp); | |
1106 | ||
1107 | if (net->mode & (IEEE_G|IEEE_N_24G)) | |
1108 | { | |
1109 | u8 slot_time = 0; | |
1110 | if ((cap & WLAN_CAPABILITY_SHORT_SLOT)&&(!priv->ieee80211->pHTInfo->bCurrentRT2RTLongSlotTime)) | |
1111 | {//short slot time | |
1112 | slot_time = SHORT_SLOT_TIME; | |
1113 | } | |
1114 | else //long slot time | |
1115 | slot_time = NON_SHORT_SLOT_TIME; | |
1116 | priv->slot_time = slot_time; | |
1117 | write_nic_byte(dev, SLOT_TIME, slot_time); | |
1118 | } | |
1119 | ||
1120 | } | |
5e1ad18a GKH |
1121 | |
1122 | static void rtl8192_net_update(struct net_device *dev) | |
ecdfa446 | 1123 | { |
ecdfa446 GKH |
1124 | struct r8192_priv *priv = ieee80211_priv(dev); |
1125 | struct ieee80211_network *net; | |
1126 | u16 BcnTimeCfg = 0, BcnCW = 6, BcnIFS = 0xf; | |
1127 | u16 rate_config = 0; | |
1128 | net = &priv->ieee80211->current_network; | |
eb40aeac MM |
1129 | |
1130 | /* update Basic rate: RR, BRSR */ | |
ecdfa446 | 1131 | rtl8192_config_rate(dev, &rate_config); |
ecdfa446 | 1132 | |
eb40aeac MM |
1133 | /* |
1134 | * Select RRSR (in Legacy-OFDM and CCK) | |
1135 | * For 8190, we select only 24M, 12M, 6M, 11M, 5.5M, | |
1136 | * 2M, and 1M from the Basic rate. | |
1137 | * We do not use other rates. | |
1138 | */ | |
1139 | priv->basic_rate = rate_config &= 0x15f; | |
1140 | ||
1141 | /* BSSID */ | |
1142 | write_nic_dword(dev, BSSIDR, ((u32 *)net->bssid)[0]); | |
1143 | write_nic_word(dev, BSSIDR+4, ((u16 *)net->bssid)[2]); | |
ecdfa446 | 1144 | |
ecdfa446 GKH |
1145 | if (priv->ieee80211->iw_mode == IW_MODE_ADHOC) |
1146 | { | |
1147 | write_nic_word(dev, ATIMWND, 2); | |
1148 | write_nic_word(dev, BCN_DMATIME, 256); | |
1149 | write_nic_word(dev, BCN_INTERVAL, net->beacon_interval); | |
eb40aeac MM |
1150 | /* |
1151 | * BIT15 of BCN_DRV_EARLY_INT will indicate | |
1152 | * whether software beacon or hw beacon is applied. | |
1153 | */ | |
ecdfa446 GKH |
1154 | write_nic_word(dev, BCN_DRV_EARLY_INT, 10); |
1155 | write_nic_byte(dev, BCN_ERR_THRESH, 100); | |
1156 | ||
1157 | BcnTimeCfg |= (BcnCW<<BCN_TCFG_CW_SHIFT); | |
eb40aeac MM |
1158 | /* TODO: BcnIFS may required to be changed on ASIC */ |
1159 | BcnTimeCfg |= BcnIFS<<BCN_TCFG_IFS; | |
ecdfa446 GKH |
1160 | write_nic_word(dev, BCN_TCFG, BcnTimeCfg); |
1161 | } | |
ecdfa446 GKH |
1162 | } |
1163 | ||
ecdfa446 GKH |
1164 | void rtl819xE_tx_cmd(struct net_device *dev, struct sk_buff *skb) |
1165 | { | |
1166 | struct r8192_priv *priv = ieee80211_priv(dev); | |
1167 | struct rtl8192_tx_ring *ring; | |
1168 | tx_desc_819x_pci *entry; | |
1169 | unsigned int idx; | |
1170 | dma_addr_t mapping; | |
1171 | cb_desc *tcb_desc; | |
1172 | unsigned long flags; | |
1173 | ||
1174 | ring = &priv->tx_ring[TXCMD_QUEUE]; | |
1175 | mapping = pci_map_single(priv->pdev, skb->data, skb->len, PCI_DMA_TODEVICE); | |
1176 | ||
1177 | spin_lock_irqsave(&priv->irq_th_lock,flags); | |
1178 | idx = (ring->idx + skb_queue_len(&ring->queue)) % ring->entries; | |
1179 | entry = &ring->desc[idx]; | |
1180 | ||
1181 | tcb_desc = (cb_desc *)(skb->cb + MAX_DEV_ADDR_SIZE); | |
1182 | memset(entry,0,12); | |
1183 | entry->LINIP = tcb_desc->bLastIniPkt; | |
1184 | entry->FirstSeg = 1;//first segment | |
1185 | entry->LastSeg = 1; //last segment | |
1186 | if(tcb_desc->bCmdOrInit == DESC_PACKET_TYPE_INIT) { | |
1187 | entry->CmdInit = DESC_PACKET_TYPE_INIT; | |
1188 | } else { | |
1189 | entry->CmdInit = DESC_PACKET_TYPE_NORMAL; | |
1190 | entry->Offset = sizeof(TX_FWINFO_8190PCI) + 8; | |
1191 | entry->PktSize = (u16)(tcb_desc->pkt_size + entry->Offset); | |
1192 | entry->QueueSelect = QSLT_CMD; | |
1193 | entry->TxFWInfoSize = 0x08; | |
1194 | entry->RATid = (u8)DESC_PACKET_TYPE_INIT; | |
1195 | } | |
1196 | entry->TxBufferSize = skb->len; | |
1197 | entry->TxBuffAddr = cpu_to_le32(mapping); | |
1198 | entry->OWN = 1; | |
1199 | ||
ecdfa446 GKH |
1200 | __skb_queue_tail(&ring->queue, skb); |
1201 | spin_unlock_irqrestore(&priv->irq_th_lock,flags); | |
1202 | ||
1203 | write_nic_byte(dev, TPPoll, TPPoll_CQ); | |
1204 | ||
1205 | return; | |
1206 | } | |
1207 | ||
1208 | /* | |
1209 | * Mapping Software/Hardware descriptor queue id to "Queue Select Field" | |
1210 | * in TxFwInfo data structure | |
214985a6 | 1211 | */ |
5e1ad18a | 1212 | static u8 MapHwQueueToFirmwareQueue(u8 QueueID) |
ecdfa446 | 1213 | { |
f72b6a50 | 1214 | u8 QueueSelect = 0; |
ecdfa446 | 1215 | |
f72b6a50 MM |
1216 | switch (QueueID) { |
1217 | case BE_QUEUE: | |
1218 | QueueSelect = QSLT_BE; | |
1219 | break; | |
ecdfa446 | 1220 | |
f72b6a50 MM |
1221 | case BK_QUEUE: |
1222 | QueueSelect = QSLT_BK; | |
1223 | break; | |
ecdfa446 | 1224 | |
f72b6a50 MM |
1225 | case VO_QUEUE: |
1226 | QueueSelect = QSLT_VO; | |
1227 | break; | |
ecdfa446 | 1228 | |
f72b6a50 MM |
1229 | case VI_QUEUE: |
1230 | QueueSelect = QSLT_VI; | |
1231 | break; | |
ecdfa446 | 1232 | |
f72b6a50 MM |
1233 | case MGNT_QUEUE: |
1234 | QueueSelect = QSLT_MGNT; | |
1235 | break; | |
ecdfa446 | 1236 | |
f72b6a50 MM |
1237 | case BEACON_QUEUE: |
1238 | QueueSelect = QSLT_BEACON; | |
1239 | break; | |
ecdfa446 | 1240 | |
f72b6a50 MM |
1241 | case TXCMD_QUEUE: |
1242 | QueueSelect = QSLT_CMD; | |
1243 | break; | |
1244 | ||
1245 | case HIGH_QUEUE: | |
1246 | default: | |
1247 | RT_TRACE(COMP_ERR, "Impossible Queue Selection: %d\n", QueueID); | |
1248 | break; | |
ecdfa446 GKH |
1249 | } |
1250 | return QueueSelect; | |
1251 | } | |
1252 | ||
5e1ad18a | 1253 | static u8 MRateToHwRate8190Pci(u8 rate) |
ecdfa446 GKH |
1254 | { |
1255 | u8 ret = DESC90_RATE1M; | |
1256 | ||
1257 | switch(rate) { | |
1258 | case MGN_1M: ret = DESC90_RATE1M; break; | |
1259 | case MGN_2M: ret = DESC90_RATE2M; break; | |
1260 | case MGN_5_5M: ret = DESC90_RATE5_5M; break; | |
1261 | case MGN_11M: ret = DESC90_RATE11M; break; | |
1262 | case MGN_6M: ret = DESC90_RATE6M; break; | |
1263 | case MGN_9M: ret = DESC90_RATE9M; break; | |
1264 | case MGN_12M: ret = DESC90_RATE12M; break; | |
1265 | case MGN_18M: ret = DESC90_RATE18M; break; | |
1266 | case MGN_24M: ret = DESC90_RATE24M; break; | |
1267 | case MGN_36M: ret = DESC90_RATE36M; break; | |
1268 | case MGN_48M: ret = DESC90_RATE48M; break; | |
1269 | case MGN_54M: ret = DESC90_RATE54M; break; | |
1270 | ||
1271 | // HT rate since here | |
1272 | case MGN_MCS0: ret = DESC90_RATEMCS0; break; | |
1273 | case MGN_MCS1: ret = DESC90_RATEMCS1; break; | |
1274 | case MGN_MCS2: ret = DESC90_RATEMCS2; break; | |
1275 | case MGN_MCS3: ret = DESC90_RATEMCS3; break; | |
1276 | case MGN_MCS4: ret = DESC90_RATEMCS4; break; | |
1277 | case MGN_MCS5: ret = DESC90_RATEMCS5; break; | |
1278 | case MGN_MCS6: ret = DESC90_RATEMCS6; break; | |
1279 | case MGN_MCS7: ret = DESC90_RATEMCS7; break; | |
1280 | case MGN_MCS8: ret = DESC90_RATEMCS8; break; | |
1281 | case MGN_MCS9: ret = DESC90_RATEMCS9; break; | |
1282 | case MGN_MCS10: ret = DESC90_RATEMCS10; break; | |
1283 | case MGN_MCS11: ret = DESC90_RATEMCS11; break; | |
1284 | case MGN_MCS12: ret = DESC90_RATEMCS12; break; | |
1285 | case MGN_MCS13: ret = DESC90_RATEMCS13; break; | |
1286 | case MGN_MCS14: ret = DESC90_RATEMCS14; break; | |
1287 | case MGN_MCS15: ret = DESC90_RATEMCS15; break; | |
1288 | case (0x80|0x20): ret = DESC90_RATEMCS32; break; | |
1289 | ||
1290 | default: break; | |
1291 | } | |
1292 | return ret; | |
1293 | } | |
1294 | ||
1295 | ||
5e1ad18a | 1296 | static u8 QueryIsShort(u8 TxHT, u8 TxRate, cb_desc *tcb_desc) |
ecdfa446 GKH |
1297 | { |
1298 | u8 tmp_Short; | |
1299 | ||
1300 | tmp_Short = (TxHT==1)?((tcb_desc->bUseShortGI)?1:0):((tcb_desc->bUseShortPreamble)?1:0); | |
1301 | ||
1302 | if(TxHT==1 && TxRate != DESC90_RATEMCS15) | |
1303 | tmp_Short = 0; | |
1304 | ||
1305 | return tmp_Short; | |
1306 | } | |
1307 | ||
1308 | /* | |
1309 | * The tx procedure is just as following, | |
1310 | * skb->cb will contain all the following information, | |
1311 | * priority, morefrag, rate, &dev. | |
214985a6 | 1312 | */ |
ecdfa446 GKH |
1313 | short rtl8192_tx(struct net_device *dev, struct sk_buff* skb) |
1314 | { | |
067ba6cf MM |
1315 | struct r8192_priv *priv = ieee80211_priv(dev); |
1316 | struct rtl8192_tx_ring *ring; | |
1317 | unsigned long flags; | |
1318 | cb_desc *tcb_desc = (cb_desc *)(skb->cb + MAX_DEV_ADDR_SIZE); | |
1319 | tx_desc_819x_pci *pdesc = NULL; | |
1320 | TX_FWINFO_8190PCI *pTxFwInfo = NULL; | |
1321 | dma_addr_t mapping; | |
1322 | bool multi_addr = false, broad_addr = false, uni_addr = false; | |
1323 | u8 *pda_addr = NULL; | |
1324 | int idx; | |
1325 | ||
1326 | if (priv->bdisable_nic) { | |
1327 | RT_TRACE(COMP_ERR, "Nic is disabled! Can't tx packet len=%d qidx=%d!!!\n", | |
1328 | skb->len, tcb_desc->queue_index); | |
65a43784 | 1329 | return skb->len; |
067ba6cf | 1330 | } |
65a43784 | 1331 | |
1332 | #ifdef ENABLE_LPS | |
1333 | priv->ieee80211->bAwakePktSent = true; | |
1334 | #endif | |
1335 | ||
067ba6cf MM |
1336 | mapping = pci_map_single(priv->pdev, skb->data, skb->len, PCI_DMA_TODEVICE); |
1337 | ||
1338 | /* collect the tx packets statitcs */ | |
1339 | pda_addr = ((u8 *)skb->data) + sizeof(TX_FWINFO_8190PCI); | |
1340 | if (is_multicast_ether_addr(pda_addr)) | |
1341 | multi_addr = true; | |
1342 | else if (is_broadcast_ether_addr(pda_addr)) | |
1343 | broad_addr = true; | |
1344 | else | |
1345 | uni_addr = true; | |
1346 | ||
1347 | if (uni_addr) | |
1348 | priv->stats.txbytesunicast += (u8)(skb->len) - sizeof(TX_FWINFO_8190PCI); | |
067ba6cf MM |
1349 | |
1350 | /* fill tx firmware */ | |
1351 | pTxFwInfo = (PTX_FWINFO_8190PCI)skb->data; | |
1352 | memset(pTxFwInfo, 0, sizeof(TX_FWINFO_8190PCI)); | |
1353 | pTxFwInfo->TxHT = (tcb_desc->data_rate&0x80) ? 1 : 0; | |
1354 | pTxFwInfo->TxRate = MRateToHwRate8190Pci((u8)tcb_desc->data_rate); | |
1355 | pTxFwInfo->EnableCPUDur = tcb_desc->bTxEnableFwCalcDur; | |
1356 | pTxFwInfo->Short = QueryIsShort(pTxFwInfo->TxHT, pTxFwInfo->TxRate, tcb_desc); | |
1357 | ||
1358 | /* Aggregation related */ | |
1359 | if (tcb_desc->bAMPDUEnable) { | |
1360 | pTxFwInfo->AllowAggregation = 1; | |
1361 | pTxFwInfo->RxMF = tcb_desc->ampdu_factor; | |
1362 | pTxFwInfo->RxAMD = tcb_desc->ampdu_density; | |
1363 | } else { | |
1364 | pTxFwInfo->AllowAggregation = 0; | |
1365 | pTxFwInfo->RxMF = 0; | |
1366 | pTxFwInfo->RxAMD = 0; | |
1367 | } | |
ecdfa446 | 1368 | |
067ba6cf MM |
1369 | /* Protection mode related */ |
1370 | pTxFwInfo->RtsEnable = (tcb_desc->bRTSEnable) ? 1 : 0; | |
1371 | pTxFwInfo->CtsEnable = (tcb_desc->bCTSEnable) ? 1 : 0; | |
1372 | pTxFwInfo->RtsSTBC = (tcb_desc->bRTSSTBC) ? 1 : 0; | |
1373 | pTxFwInfo->RtsHT = (tcb_desc->rts_rate&0x80) ? 1 : 0; | |
1374 | pTxFwInfo->RtsRate = MRateToHwRate8190Pci((u8)tcb_desc->rts_rate); | |
1375 | pTxFwInfo->RtsBandwidth = 0; | |
1376 | pTxFwInfo->RtsSubcarrier = tcb_desc->RTSSC; | |
1377 | pTxFwInfo->RtsShort = (pTxFwInfo->RtsHT == 0) ? (tcb_desc->bRTSUseShortPreamble ? 1 : 0) : (tcb_desc->bRTSUseShortGI? 1 : 0); | |
1378 | ||
1379 | /* Set Bandwidth and sub-channel settings. */ | |
1380 | if (priv->CurrentChannelBW == HT_CHANNEL_WIDTH_20_40) { | |
1381 | if (tcb_desc->bPacketBW) { | |
1382 | pTxFwInfo->TxBandwidth = 1; | |
ecdfa446 | 1383 | #ifdef RTL8190P |
067ba6cf | 1384 | pTxFwInfo->TxSubCarrier = 3; |
ecdfa446 | 1385 | #else |
067ba6cf MM |
1386 | /* use duplicated mode */ |
1387 | pTxFwInfo->TxSubCarrier = 0; | |
ecdfa446 | 1388 | #endif |
067ba6cf MM |
1389 | } else { |
1390 | pTxFwInfo->TxBandwidth = 0; | |
1391 | pTxFwInfo->TxSubCarrier = priv->nCur40MhzPrimeSC; | |
1392 | } | |
1393 | } else { | |
1394 | pTxFwInfo->TxBandwidth = 0; | |
1395 | pTxFwInfo->TxSubCarrier = 0; | |
1396 | } | |
ecdfa446 | 1397 | |
067ba6cf MM |
1398 | spin_lock_irqsave(&priv->irq_th_lock, flags); |
1399 | ring = &priv->tx_ring[tcb_desc->queue_index]; | |
1400 | if (tcb_desc->queue_index != BEACON_QUEUE) | |
1401 | idx = (ring->idx + skb_queue_len(&ring->queue)) % ring->entries; | |
1402 | else | |
1403 | idx = 0; | |
1404 | ||
1405 | pdesc = &ring->desc[idx]; | |
1406 | if ((pdesc->OWN == 1) && (tcb_desc->queue_index != BEACON_QUEUE)) { | |
1407 | RT_TRACE(COMP_ERR, "No more TX desc@%d, ring->idx = %d,idx = %d,%x", | |
1408 | tcb_desc->queue_index, ring->idx, idx, skb->len); | |
1409 | spin_unlock_irqrestore(&priv->irq_th_lock, flags); | |
1410 | return skb->len; | |
1411 | } | |
ecdfa446 | 1412 | |
067ba6cf MM |
1413 | /* fill tx descriptor */ |
1414 | memset(pdesc, 0, 12); | |
1415 | ||
1416 | /*DWORD 0*/ | |
1417 | pdesc->LINIP = 0; | |
1418 | pdesc->CmdInit = 1; | |
1419 | pdesc->Offset = sizeof(TX_FWINFO_8190PCI) + 8; /* We must add 8!! */ | |
1420 | pdesc->PktSize = (u16)skb->len-sizeof(TX_FWINFO_8190PCI); | |
1421 | ||
1422 | /*DWORD 1*/ | |
1423 | pdesc->SecCAMID = 0; | |
1424 | pdesc->RATid = tcb_desc->RATRIndex; | |
1425 | ||
1426 | pdesc->NoEnc = 1; | |
1427 | pdesc->SecType = 0x0; | |
1428 | if (tcb_desc->bHwSec) { | |
1429 | switch (priv->ieee80211->pairwise_key_type) { | |
1430 | case KEY_TYPE_WEP40: | |
1431 | case KEY_TYPE_WEP104: | |
1432 | pdesc->SecType = 0x1; | |
1433 | pdesc->NoEnc = 0; | |
1434 | break; | |
1435 | case KEY_TYPE_TKIP: | |
1436 | pdesc->SecType = 0x2; | |
1437 | pdesc->NoEnc = 0; | |
1438 | break; | |
1439 | case KEY_TYPE_CCMP: | |
1440 | pdesc->SecType = 0x3; | |
1441 | pdesc->NoEnc = 0; | |
1442 | break; | |
1443 | case KEY_TYPE_NA: | |
1444 | pdesc->SecType = 0x0; | |
1445 | pdesc->NoEnc = 1; | |
1446 | break; | |
1447 | } | |
1448 | } | |
ecdfa446 | 1449 | |
067ba6cf MM |
1450 | /* Set Packet ID */ |
1451 | pdesc->PktId = 0x0; | |
ecdfa446 | 1452 | |
067ba6cf MM |
1453 | pdesc->QueueSelect = MapHwQueueToFirmwareQueue(tcb_desc->queue_index); |
1454 | pdesc->TxFWInfoSize = sizeof(TX_FWINFO_8190PCI); | |
ecdfa446 | 1455 | |
067ba6cf MM |
1456 | pdesc->DISFB = tcb_desc->bTxDisableRateFallBack; |
1457 | pdesc->USERATE = tcb_desc->bTxUseDriverAssingedRate; | |
ecdfa446 | 1458 | |
067ba6cf MM |
1459 | pdesc->FirstSeg = 1; |
1460 | pdesc->LastSeg = 1; | |
1461 | pdesc->TxBufferSize = skb->len; | |
ecdfa446 | 1462 | |
067ba6cf MM |
1463 | pdesc->TxBuffAddr = cpu_to_le32(mapping); |
1464 | __skb_queue_tail(&ring->queue, skb); | |
1465 | pdesc->OWN = 1; | |
1466 | spin_unlock_irqrestore(&priv->irq_th_lock, flags); | |
1467 | dev->trans_start = jiffies; | |
1468 | write_nic_word(dev, TPPoll, 0x01<<tcb_desc->queue_index); | |
1469 | return 0; | |
ecdfa446 GKH |
1470 | } |
1471 | ||
5e1ad18a | 1472 | static short rtl8192_alloc_rx_desc_ring(struct net_device *dev) |
ecdfa446 GKH |
1473 | { |
1474 | struct r8192_priv *priv = ieee80211_priv(dev); | |
1475 | rx_desc_819x_pci *entry = NULL; | |
1476 | int i; | |
1477 | ||
1478 | priv->rx_ring = pci_alloc_consistent(priv->pdev, | |
1479 | sizeof(*priv->rx_ring) * priv->rxringcount, &priv->rx_ring_dma); | |
1480 | ||
1481 | if (!priv->rx_ring || (unsigned long)priv->rx_ring & 0xFF) { | |
1482 | RT_TRACE(COMP_ERR,"Cannot allocate RX ring\n"); | |
1483 | return -ENOMEM; | |
1484 | } | |
1485 | ||
1486 | memset(priv->rx_ring, 0, sizeof(*priv->rx_ring) * priv->rxringcount); | |
1487 | priv->rx_idx = 0; | |
1488 | ||
1489 | for (i = 0; i < priv->rxringcount; i++) { | |
1490 | struct sk_buff *skb = dev_alloc_skb(priv->rxbuffersize); | |
1491 | dma_addr_t *mapping; | |
1492 | entry = &priv->rx_ring[i]; | |
1493 | if (!skb) | |
1494 | return 0; | |
1495 | priv->rx_buf[i] = skb; | |
1496 | mapping = (dma_addr_t *)skb->cb; | |
1c7ec2e8 | 1497 | *mapping = pci_map_single(priv->pdev, skb_tail_pointer(skb), |
ecdfa446 GKH |
1498 | priv->rxbuffersize, PCI_DMA_FROMDEVICE); |
1499 | ||
1500 | entry->BufferAddress = cpu_to_le32(*mapping); | |
1501 | ||
1502 | entry->Length = priv->rxbuffersize; | |
1503 | entry->OWN = 1; | |
1504 | } | |
1505 | ||
1506 | entry->EOR = 1; | |
1507 | return 0; | |
1508 | } | |
1509 | ||
1510 | static int rtl8192_alloc_tx_desc_ring(struct net_device *dev, | |
1511 | unsigned int prio, unsigned int entries) | |
1512 | { | |
1513 | struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev); | |
1514 | tx_desc_819x_pci *ring; | |
1515 | dma_addr_t dma; | |
1516 | int i; | |
1517 | ||
1518 | ring = pci_alloc_consistent(priv->pdev, sizeof(*ring) * entries, &dma); | |
1519 | if (!ring || (unsigned long)ring & 0xFF) { | |
1520 | RT_TRACE(COMP_ERR, "Cannot allocate TX ring (prio = %d)\n", prio); | |
1521 | return -ENOMEM; | |
1522 | } | |
1523 | ||
1524 | memset(ring, 0, sizeof(*ring)*entries); | |
1525 | priv->tx_ring[prio].desc = ring; | |
1526 | priv->tx_ring[prio].dma = dma; | |
1527 | priv->tx_ring[prio].idx = 0; | |
1528 | priv->tx_ring[prio].entries = entries; | |
1529 | skb_queue_head_init(&priv->tx_ring[prio].queue); | |
1530 | ||
1531 | for (i = 0; i < entries; i++) | |
1532 | ring[i].NextDescAddress = | |
1533 | cpu_to_le32((u32)dma + ((i + 1) % entries) * sizeof(*ring)); | |
1534 | ||
1535 | return 0; | |
1536 | } | |
1537 | ||
5e1ad18a | 1538 | static short rtl8192_pci_initdescring(struct net_device *dev) |
ecdfa446 | 1539 | { |
1f1f19ff MM |
1540 | u32 ret; |
1541 | int i; | |
1542 | struct r8192_priv *priv = ieee80211_priv(dev); | |
ecdfa446 | 1543 | |
1f1f19ff MM |
1544 | ret = rtl8192_alloc_rx_desc_ring(dev); |
1545 | if (ret) | |
1546 | return ret; | |
ecdfa446 | 1547 | |
1f1f19ff MM |
1548 | /* general process for other queue */ |
1549 | for (i = 0; i < MAX_TX_QUEUE_COUNT; i++) { | |
1550 | ret = rtl8192_alloc_tx_desc_ring(dev, i, priv->txringcount); | |
1551 | if (ret) | |
1552 | goto err_free_rings; | |
1553 | } | |
ecdfa446 | 1554 | |
1f1f19ff | 1555 | return 0; |
ecdfa446 GKH |
1556 | |
1557 | err_free_rings: | |
1f1f19ff MM |
1558 | rtl8192_free_rx_ring(dev); |
1559 | for (i = 0; i < MAX_TX_QUEUE_COUNT; i++) | |
1560 | if (priv->tx_ring[i].desc) | |
1561 | rtl8192_free_tx_ring(dev, i); | |
1562 | return 1; | |
ecdfa446 GKH |
1563 | } |
1564 | ||
5e1ad18a | 1565 | static void rtl8192_pci_resetdescring(struct net_device *dev) |
ecdfa446 GKH |
1566 | { |
1567 | struct r8192_priv *priv = ieee80211_priv(dev); | |
1568 | int i; | |
1569 | ||
1570 | /* force the rx_idx to the first one */ | |
1571 | if(priv->rx_ring) { | |
1572 | rx_desc_819x_pci *entry = NULL; | |
1573 | for (i = 0; i < priv->rxringcount; i++) { | |
1574 | entry = &priv->rx_ring[i]; | |
1575 | entry->OWN = 1; | |
1576 | } | |
1577 | priv->rx_idx = 0; | |
1578 | } | |
1579 | ||
1580 | /* after reset, release previous pending packet, and force the | |
1581 | * tx idx to the first one */ | |
1582 | for (i = 0; i < MAX_TX_QUEUE_COUNT; i++) { | |
1583 | if (priv->tx_ring[i].desc) { | |
1584 | struct rtl8192_tx_ring *ring = &priv->tx_ring[i]; | |
1585 | ||
1586 | while (skb_queue_len(&ring->queue)) { | |
1587 | tx_desc_819x_pci *entry = &ring->desc[ring->idx]; | |
1588 | struct sk_buff *skb = __skb_dequeue(&ring->queue); | |
1589 | ||
1590 | pci_unmap_single(priv->pdev, le32_to_cpu(entry->TxBuffAddr), | |
1591 | skb->len, PCI_DMA_TODEVICE); | |
1592 | kfree_skb(skb); | |
1593 | ring->idx = (ring->idx + 1) % ring->entries; | |
1594 | } | |
1595 | ring->idx = 0; | |
1596 | } | |
1597 | } | |
1598 | } | |
1599 | ||
5e1ad18a | 1600 | static void rtl8192_link_change(struct net_device *dev) |
ecdfa446 | 1601 | { |
ecdfa446 GKH |
1602 | struct r8192_priv *priv = ieee80211_priv(dev); |
1603 | struct ieee80211_device* ieee = priv->ieee80211; | |
1604 | //write_nic_word(dev, BCN_INTR_ITV, net->beacon_interval); | |
1605 | if (ieee->state == IEEE80211_LINKED) | |
1606 | { | |
1607 | rtl8192_net_update(dev); | |
1608 | rtl8192_update_ratr_table(dev); | |
11aacc28 | 1609 | |
ecdfa446 GKH |
1610 | //add this as in pure N mode, wep encryption will use software way, but there is no chance to set this as wep will not set group key in wext. WB.2008.07.08 |
1611 | if ((KEY_TYPE_WEP40 == ieee->pairwise_key_type) || (KEY_TYPE_WEP104 == ieee->pairwise_key_type)) | |
1612 | EnableHWSecurityConfig8192(dev); | |
ecdfa446 GKH |
1613 | } |
1614 | else | |
1615 | { | |
1616 | write_nic_byte(dev, 0x173, 0); | |
1617 | } | |
1618 | /*update timing params*/ | |
1619 | //rtl8192_set_chan(dev, priv->chan); | |
1620 | //MSR | |
1621 | rtl8192_update_msr(dev); | |
1622 | ||
1623 | // 2007/10/16 MH MAC Will update TSF according to all received beacon, so we have | |
1624 | // // To set CBSSID bit when link with any AP or STA. | |
1625 | if (ieee->iw_mode == IW_MODE_INFRA || ieee->iw_mode == IW_MODE_ADHOC) | |
1626 | { | |
1627 | u32 reg = 0; | |
1628 | reg = read_nic_dword(dev, RCR); | |
1629 | if (priv->ieee80211->state == IEEE80211_LINKED) | |
1630 | priv->ReceiveConfig = reg |= RCR_CBSSID; | |
1631 | else | |
1632 | priv->ReceiveConfig = reg &= ~RCR_CBSSID; | |
1633 | write_nic_dword(dev, RCR, reg); | |
1634 | } | |
1635 | } | |
ecdfa446 GKH |
1636 | |
1637 | ||
5b3b1a7b | 1638 | static const struct ieee80211_qos_parameters def_qos_parameters = { |
ecdfa446 GKH |
1639 | {3,3,3,3},/* cw_min */ |
1640 | {7,7,7,7},/* cw_max */ | |
1641 | {2,2,2,2},/* aifs */ | |
1642 | {0,0,0,0},/* flags */ | |
1643 | {0,0,0,0} /* tx_op_limit */ | |
1644 | }; | |
1645 | ||
5e1ad18a | 1646 | static void rtl8192_update_beacon(struct work_struct * work) |
ecdfa446 GKH |
1647 | { |
1648 | struct r8192_priv *priv = container_of(work, struct r8192_priv, update_beacon_wq.work); | |
1649 | struct net_device *dev = priv->ieee80211->dev; | |
ecdfa446 GKH |
1650 | struct ieee80211_device* ieee = priv->ieee80211; |
1651 | struct ieee80211_network* net = &ieee->current_network; | |
1652 | ||
1653 | if (ieee->pHTInfo->bCurrentHTSupport) | |
1654 | HTUpdateSelfAndPeerSetting(ieee, net); | |
1655 | ieee->pHTInfo->bCurrentRT2RTLongSlotTime = net->bssht.bdRT2RTLongSlotTime; | |
1656 | rtl8192_update_cap(dev, net->capability); | |
1657 | } | |
214985a6 | 1658 | |
ecdfa446 GKH |
1659 | /* |
1660 | * background support to run QoS activate functionality | |
1661 | */ | |
881a975b | 1662 | static const int WDCAPARA_ADD[] = {EDCAPARA_BE,EDCAPARA_BK,EDCAPARA_VI,EDCAPARA_VO}; |
5e1ad18a | 1663 | static void rtl8192_qos_activate(struct work_struct * work) |
ecdfa446 GKH |
1664 | { |
1665 | struct r8192_priv *priv = container_of(work, struct r8192_priv, qos_activate); | |
1666 | struct net_device *dev = priv->ieee80211->dev; | |
ecdfa446 GKH |
1667 | struct ieee80211_qos_parameters *qos_parameters = &priv->ieee80211->current_network.qos_data.parameters; |
1668 | u8 mode = priv->ieee80211->current_network.mode; | |
ecdfa446 GKH |
1669 | u8 u1bAIFS; |
1670 | u32 u4bAcParam; | |
1671 | int i; | |
ecdfa446 | 1672 | |
ecdfa446 | 1673 | mutex_lock(&priv->mutex); |
ecdfa446 GKH |
1674 | if(priv->ieee80211->state != IEEE80211_LINKED) |
1675 | goto success; | |
1676 | RT_TRACE(COMP_QOS,"qos active process with associate response received\n"); | |
1677 | /* It better set slot time at first */ | |
1678 | /* For we just support b/g mode at present, let the slot time at 9/20 selection */ | |
1679 | /* update the ac parameter to related registers */ | |
1680 | for(i = 0; i < QOS_QUEUE_NUM; i++) { | |
1681 | //Mode G/A: slotTimeTimer = 9; Mode B: 20 | |
1682 | u1bAIFS = qos_parameters->aifs[i] * ((mode&(IEEE_G|IEEE_N_24G)) ?9:20) + aSifsTime; | |
1683 | u4bAcParam = ((((u32)(qos_parameters->tx_op_limit[i]))<< AC_PARAM_TXOP_LIMIT_OFFSET)| | |
1684 | (((u32)(qos_parameters->cw_max[i]))<< AC_PARAM_ECW_MAX_OFFSET)| | |
1685 | (((u32)(qos_parameters->cw_min[i]))<< AC_PARAM_ECW_MIN_OFFSET)| | |
1686 | ((u32)u1bAIFS << AC_PARAM_AIFS_OFFSET)); | |
ecdfa446 GKH |
1687 | write_nic_dword(dev, WDCAPARA_ADD[i], u4bAcParam); |
1688 | //write_nic_dword(dev, WDCAPARA_ADD[i], 0x005e4332); | |
1689 | } | |
1690 | ||
1691 | success: | |
ecdfa446 | 1692 | mutex_unlock(&priv->mutex); |
ecdfa446 GKH |
1693 | } |
1694 | ||
1695 | static int rtl8192_qos_handle_probe_response(struct r8192_priv *priv, | |
1696 | int active_network, | |
1697 | struct ieee80211_network *network) | |
1698 | { | |
1699 | int ret = 0; | |
1700 | u32 size = sizeof(struct ieee80211_qos_parameters); | |
1701 | ||
1702 | if(priv->ieee80211->state !=IEEE80211_LINKED) | |
1703 | return ret; | |
1704 | ||
1705 | if ((priv->ieee80211->iw_mode != IW_MODE_INFRA)) | |
1706 | return ret; | |
1707 | ||
1708 | if (network->flags & NETWORK_HAS_QOS_MASK) { | |
1709 | if (active_network && | |
1710 | (network->flags & NETWORK_HAS_QOS_PARAMETERS)) | |
1711 | network->qos_data.active = network->qos_data.supported; | |
1712 | ||
1713 | if ((network->qos_data.active == 1) && (active_network == 1) && | |
1714 | (network->flags & NETWORK_HAS_QOS_PARAMETERS) && | |
1715 | (network->qos_data.old_param_count != | |
1716 | network->qos_data.param_count)) { | |
1717 | network->qos_data.old_param_count = | |
1718 | network->qos_data.param_count; | |
ecdfa446 | 1719 | queue_work(priv->priv_wq, &priv->qos_activate); |
ecdfa446 GKH |
1720 | RT_TRACE (COMP_QOS, "QoS parameters change call " |
1721 | "qos_activate\n"); | |
1722 | } | |
1723 | } else { | |
207b58fb | 1724 | memcpy(&priv->ieee80211->current_network.qos_data.parameters, |
ecdfa446 GKH |
1725 | &def_qos_parameters, size); |
1726 | ||
1727 | if ((network->qos_data.active == 1) && (active_network == 1)) { | |
ecdfa446 | 1728 | queue_work(priv->priv_wq, &priv->qos_activate); |
ecdfa446 GKH |
1729 | RT_TRACE(COMP_QOS, "QoS was disabled call qos_activate \n"); |
1730 | } | |
1731 | network->qos_data.active = 0; | |
1732 | network->qos_data.supported = 0; | |
1733 | } | |
1734 | ||
1735 | return 0; | |
1736 | } | |
1737 | ||
1738 | /* handle manage frame frame beacon and probe response */ | |
1739 | static int rtl8192_handle_beacon(struct net_device * dev, | |
1740 | struct ieee80211_beacon * beacon, | |
1741 | struct ieee80211_network * network) | |
1742 | { | |
1743 | struct r8192_priv *priv = ieee80211_priv(dev); | |
1744 | ||
1745 | rtl8192_qos_handle_probe_response(priv,1,network); | |
1746 | ||
ecdfa446 | 1747 | queue_delayed_work(priv->priv_wq, &priv->update_beacon_wq, 0); |
ecdfa446 GKH |
1748 | return 0; |
1749 | ||
1750 | } | |
1751 | ||
1752 | /* | |
214985a6 MM |
1753 | * handling the beaconing responses. if we get different QoS setting |
1754 | * off the network from the associated setting, adjust the QoS setting | |
1755 | */ | |
ecdfa446 GKH |
1756 | static int rtl8192_qos_association_resp(struct r8192_priv *priv, |
1757 | struct ieee80211_network *network) | |
1758 | { | |
b72cb94f MM |
1759 | int ret = 0; |
1760 | unsigned long flags; | |
1761 | u32 size = sizeof(struct ieee80211_qos_parameters); | |
1762 | int set_qos_param = 0; | |
ecdfa446 | 1763 | |
b72cb94f MM |
1764 | if ((priv == NULL) || (network == NULL)) |
1765 | return ret; | |
ecdfa446 | 1766 | |
b72cb94f MM |
1767 | if (priv->ieee80211->state != IEEE80211_LINKED) |
1768 | return ret; | |
ecdfa446 | 1769 | |
b72cb94f MM |
1770 | if ((priv->ieee80211->iw_mode != IW_MODE_INFRA)) |
1771 | return ret; | |
ecdfa446 | 1772 | |
b72cb94f MM |
1773 | spin_lock_irqsave(&priv->ieee80211->lock, flags); |
1774 | if (network->flags & NETWORK_HAS_QOS_PARAMETERS) { | |
207b58fb MM |
1775 | memcpy(&priv->ieee80211->current_network.qos_data.parameters, |
1776 | &network->qos_data.parameters, | |
ecdfa446 GKH |
1777 | sizeof(struct ieee80211_qos_parameters)); |
1778 | priv->ieee80211->current_network.qos_data.active = 1; | |
b72cb94f MM |
1779 | set_qos_param = 1; |
1780 | /* update qos parameter for current network */ | |
1781 | priv->ieee80211->current_network.qos_data.old_param_count = | |
1782 | priv->ieee80211->current_network.qos_data.param_count; | |
1783 | priv->ieee80211->current_network.qos_data.param_count = | |
1784 | network->qos_data.param_count; | |
1785 | ||
1786 | } else { | |
207b58fb | 1787 | memcpy(&priv->ieee80211->current_network.qos_data.parameters, |
ecdfa446 GKH |
1788 | &def_qos_parameters, size); |
1789 | priv->ieee80211->current_network.qos_data.active = 0; | |
1790 | priv->ieee80211->current_network.qos_data.supported = 0; | |
b72cb94f MM |
1791 | set_qos_param = 1; |
1792 | } | |
ecdfa446 | 1793 | |
b72cb94f | 1794 | spin_unlock_irqrestore(&priv->ieee80211->lock, flags); |
ecdfa446 | 1795 | |
b72cb94f MM |
1796 | RT_TRACE(COMP_QOS, "%s: network->flags = %d,%d\n", __FUNCTION__, |
1797 | network->flags, priv->ieee80211->current_network.qos_data.active); | |
ecdfa446 | 1798 | if (set_qos_param == 1) |
ecdfa446 | 1799 | queue_work(priv->priv_wq, &priv->qos_activate); |
ecdfa446 | 1800 | |
b72cb94f | 1801 | return ret; |
ecdfa446 GKH |
1802 | } |
1803 | ||
1804 | ||
1805 | static int rtl8192_handle_assoc_response(struct net_device *dev, | |
1806 | struct ieee80211_assoc_response_frame *resp, | |
1807 | struct ieee80211_network *network) | |
1808 | { | |
1809 | struct r8192_priv *priv = ieee80211_priv(dev); | |
1810 | rtl8192_qos_association_resp(priv, network); | |
1811 | return 0; | |
1812 | } | |
1813 | ||
1814 | ||
214985a6 | 1815 | /* updateRATRTabel for MCS only. Basic rate is not implemented. */ |
5b3b1a7b | 1816 | static void rtl8192_update_ratr_table(struct net_device* dev) |
ecdfa446 GKH |
1817 | { |
1818 | struct r8192_priv* priv = ieee80211_priv(dev); | |
1819 | struct ieee80211_device* ieee = priv->ieee80211; | |
1820 | u8* pMcsRate = ieee->dot11HTOperationalRateSet; | |
ecdfa446 GKH |
1821 | u32 ratr_value = 0; |
1822 | u8 rate_index = 0; | |
1823 | ||
1824 | rtl8192_config_rate(dev, (u16*)(&ratr_value)); | |
1825 | ratr_value |= (*(u16*)(pMcsRate)) << 12; | |
16d74da0 | 1826 | |
ecdfa446 GKH |
1827 | switch (ieee->mode) |
1828 | { | |
1829 | case IEEE_A: | |
1830 | ratr_value &= 0x00000FF0; | |
1831 | break; | |
1832 | case IEEE_B: | |
1833 | ratr_value &= 0x0000000F; | |
1834 | break; | |
1835 | case IEEE_G: | |
1836 | ratr_value &= 0x00000FF7; | |
1837 | break; | |
1838 | case IEEE_N_24G: | |
1839 | case IEEE_N_5G: | |
1840 | if (ieee->pHTInfo->PeerMimoPs == 0) //MIMO_PS_STATIC | |
1841 | ratr_value &= 0x0007F007; | |
1842 | else{ | |
1843 | if (priv->rf_type == RF_1T2R) | |
1844 | ratr_value &= 0x000FF007; | |
1845 | else | |
1846 | ratr_value &= 0x0F81F007; | |
1847 | } | |
1848 | break; | |
1849 | default: | |
1850 | break; | |
1851 | } | |
1852 | ratr_value &= 0x0FFFFFFF; | |
1853 | if(ieee->pHTInfo->bCurTxBW40MHz && ieee->pHTInfo->bCurShortGI40MHz){ | |
1854 | ratr_value |= 0x80000000; | |
1855 | }else if(!ieee->pHTInfo->bCurTxBW40MHz && ieee->pHTInfo->bCurShortGI20MHz){ | |
1856 | ratr_value |= 0x80000000; | |
1857 | } | |
1858 | write_nic_dword(dev, RATR0+rate_index*4, ratr_value); | |
1859 | write_nic_byte(dev, UFWP, 1); | |
1860 | } | |
1861 | ||
5e1ad18a | 1862 | static bool GetNmodeSupportBySecCfg8190Pci(struct net_device*dev) |
ecdfa446 | 1863 | { |
65a43784 | 1864 | struct r8192_priv *priv = ieee80211_priv(dev); |
1865 | struct ieee80211_device *ieee = priv->ieee80211; | |
ecdfa446 | 1866 | |
f8acdc3d MM |
1867 | return !(ieee->rtllib_ap_sec_type && |
1868 | (ieee->rtllib_ap_sec_type(ieee)&(SEC_ALG_WEP|SEC_ALG_TKIP))); | |
ecdfa446 GKH |
1869 | } |
1870 | ||
5e1ad18a | 1871 | static void rtl8192_refresh_supportrate(struct r8192_priv* priv) |
ecdfa446 GKH |
1872 | { |
1873 | struct ieee80211_device* ieee = priv->ieee80211; | |
1874 | //we donot consider set support rate for ABG mode, only HT MCS rate is set here. | |
1875 | if (ieee->mode == WIRELESS_MODE_N_24G || ieee->mode == WIRELESS_MODE_N_5G) | |
1876 | { | |
1877 | memcpy(ieee->Regdot11HTOperationalRateSet, ieee->RegHTSuppRateSet, 16); | |
ecdfa446 GKH |
1878 | } |
1879 | else | |
1880 | memset(ieee->Regdot11HTOperationalRateSet, 0, 16); | |
ecdfa446 GKH |
1881 | } |
1882 | ||
5e1ad18a | 1883 | static u8 rtl8192_getSupportedWireleeMode(struct net_device*dev) |
ecdfa446 GKH |
1884 | { |
1885 | struct r8192_priv *priv = ieee80211_priv(dev); | |
1886 | u8 ret = 0; | |
1887 | switch(priv->rf_chip) | |
1888 | { | |
1889 | case RF_8225: | |
1890 | case RF_8256: | |
1891 | case RF_PSEUDO_11N: | |
1892 | ret = (WIRELESS_MODE_N_24G|WIRELESS_MODE_G|WIRELESS_MODE_B); | |
1893 | break; | |
1894 | case RF_8258: | |
1895 | ret = (WIRELESS_MODE_A|WIRELESS_MODE_N_5G); | |
1896 | break; | |
1897 | default: | |
1898 | ret = WIRELESS_MODE_B; | |
1899 | break; | |
1900 | } | |
1901 | return ret; | |
1902 | } | |
5e1ad18a GKH |
1903 | |
1904 | static void rtl8192_SetWirelessMode(struct net_device* dev, u8 wireless_mode) | |
ecdfa446 GKH |
1905 | { |
1906 | struct r8192_priv *priv = ieee80211_priv(dev); | |
1907 | u8 bSupportMode = rtl8192_getSupportedWireleeMode(dev); | |
1908 | ||
ecdfa446 GKH |
1909 | if ((wireless_mode == WIRELESS_MODE_AUTO) || ((wireless_mode&bSupportMode)==0)) |
1910 | { | |
1911 | if(bSupportMode & WIRELESS_MODE_N_24G) | |
1912 | { | |
1913 | wireless_mode = WIRELESS_MODE_N_24G; | |
1914 | } | |
1915 | else if(bSupportMode & WIRELESS_MODE_N_5G) | |
1916 | { | |
1917 | wireless_mode = WIRELESS_MODE_N_5G; | |
1918 | } | |
1919 | else if((bSupportMode & WIRELESS_MODE_A)) | |
1920 | { | |
1921 | wireless_mode = WIRELESS_MODE_A; | |
1922 | } | |
1923 | else if((bSupportMode & WIRELESS_MODE_G)) | |
1924 | { | |
1925 | wireless_mode = WIRELESS_MODE_G; | |
1926 | } | |
1927 | else if((bSupportMode & WIRELESS_MODE_B)) | |
1928 | { | |
1929 | wireless_mode = WIRELESS_MODE_B; | |
1930 | } | |
1931 | else{ | |
1932 | RT_TRACE(COMP_ERR, "%s(), No valid wireless mode supported, SupportedWirelessMode(%x)!!!\n", __FUNCTION__,bSupportMode); | |
1933 | wireless_mode = WIRELESS_MODE_B; | |
1934 | } | |
1935 | } | |
ecdfa446 GKH |
1936 | priv->ieee80211->mode = wireless_mode; |
1937 | ||
1938 | if ((wireless_mode == WIRELESS_MODE_N_24G) || (wireless_mode == WIRELESS_MODE_N_5G)) | |
1939 | priv->ieee80211->pHTInfo->bEnableHT = 1; | |
1940 | else | |
1941 | priv->ieee80211->pHTInfo->bEnableHT = 0; | |
1942 | RT_TRACE(COMP_INIT, "Current Wireless Mode is %x\n", wireless_mode); | |
1943 | rtl8192_refresh_supportrate(priv); | |
ecdfa446 | 1944 | } |
ecdfa446 | 1945 | |
5e1ad18a | 1946 | static bool GetHalfNmodeSupportByAPs819xPci(struct net_device* dev) |
ecdfa446 | 1947 | { |
ecdfa446 GKH |
1948 | struct r8192_priv* priv = ieee80211_priv(dev); |
1949 | struct ieee80211_device* ieee = priv->ieee80211; | |
1950 | ||
285f660c | 1951 | return ieee->bHalfWirelessN24GMode; |
ecdfa446 GKH |
1952 | } |
1953 | ||
1954 | short rtl8192_is_tx_queue_empty(struct net_device *dev) | |
1955 | { | |
1956 | int i=0; | |
1957 | struct r8192_priv *priv = ieee80211_priv(dev); | |
1958 | for (i=0; i<=MGNT_QUEUE; i++) | |
1959 | { | |
1960 | if ((i== TXCMD_QUEUE) || (i == HCCA_QUEUE) ) | |
1961 | continue; | |
1962 | if (skb_queue_len(&(&priv->tx_ring[i])->queue) > 0){ | |
1963 | printk("===>tx queue is not empty:%d, %d\n", i, skb_queue_len(&(&priv->tx_ring[i])->queue)); | |
1964 | return 0; | |
1965 | } | |
1966 | } | |
1967 | return 1; | |
1968 | } | |
16d74da0 | 1969 | |
5e1ad18a | 1970 | static void rtl8192_hw_sleep_down(struct net_device *dev) |
ecdfa446 | 1971 | { |
65a43784 | 1972 | struct r8192_priv *priv = ieee80211_priv(dev); |
1973 | unsigned long flags = 0; | |
1974 | ||
1975 | spin_lock_irqsave(&priv->rf_ps_lock,flags); | |
1976 | if (priv->RFChangeInProgress) { | |
1977 | spin_unlock_irqrestore(&priv->rf_ps_lock,flags); | |
1978 | RT_TRACE(COMP_RF, "rtl8192_hw_sleep_down(): RF Change in progress! \n"); | |
1979 | printk("rtl8192_hw_sleep_down(): RF Change in progress!\n"); | |
1980 | return; | |
1981 | } | |
1982 | spin_unlock_irqrestore(&priv->rf_ps_lock,flags); | |
65a43784 | 1983 | |
ecdfa446 GKH |
1984 | MgntActSet_RF_State(dev, eRfSleep, RF_CHANGE_BY_PS); |
1985 | } | |
16d74da0 | 1986 | |
5e1ad18a | 1987 | static void rtl8192_hw_sleep_wq (struct work_struct *work) |
ecdfa446 | 1988 | { |
ecdfa446 GKH |
1989 | struct delayed_work *dwork = container_of(work,struct delayed_work,work); |
1990 | struct ieee80211_device *ieee = container_of(dwork,struct ieee80211_device,hw_sleep_wq); | |
1991 | struct net_device *dev = ieee->dev; | |
65a43784 | 1992 | |
ecdfa446 GKH |
1993 | rtl8192_hw_sleep_down(dev); |
1994 | } | |
65a43784 | 1995 | |
5e1ad18a | 1996 | static void rtl8192_hw_wakeup(struct net_device* dev) |
ecdfa446 | 1997 | { |
65a43784 | 1998 | struct r8192_priv *priv = ieee80211_priv(dev); |
1999 | unsigned long flags = 0; | |
2000 | ||
2001 | spin_lock_irqsave(&priv->rf_ps_lock,flags); | |
2002 | if (priv->RFChangeInProgress) { | |
2003 | spin_unlock_irqrestore(&priv->rf_ps_lock,flags); | |
2004 | RT_TRACE(COMP_RF, "rtl8192_hw_wakeup(): RF Change in progress! \n"); | |
2005 | printk("rtl8192_hw_wakeup(): RF Change in progress! schedule wake up task again\n"); | |
2006 | queue_delayed_work(priv->ieee80211->wq,&priv->ieee80211->hw_wakeup_wq,MSECS(10));//PowerSave is not supported if kernel version is below 2.6.20 | |
2007 | return; | |
2008 | } | |
2009 | spin_unlock_irqrestore(&priv->rf_ps_lock,flags); | |
ecdfa446 | 2010 | |
ecdfa446 | 2011 | MgntActSet_RF_State(dev, eRfOn, RF_CHANGE_BY_PS); |
ecdfa446 | 2012 | } |
65a43784 | 2013 | |
ecdfa446 GKH |
2014 | void rtl8192_hw_wakeup_wq (struct work_struct *work) |
2015 | { | |
ecdfa446 GKH |
2016 | struct delayed_work *dwork = container_of(work,struct delayed_work,work); |
2017 | struct ieee80211_device *ieee = container_of(dwork,struct ieee80211_device,hw_wakeup_wq); | |
2018 | struct net_device *dev = ieee->dev; | |
ecdfa446 GKH |
2019 | rtl8192_hw_wakeup(dev); |
2020 | ||
2021 | } | |
2022 | ||
2023 | #define MIN_SLEEP_TIME 50 | |
2024 | #define MAX_SLEEP_TIME 10000 | |
5e1ad18a | 2025 | static void rtl8192_hw_to_sleep(struct net_device *dev, u32 th, u32 tl) |
ecdfa446 | 2026 | { |
ecdfa446 GKH |
2027 | struct r8192_priv *priv = ieee80211_priv(dev); |
2028 | ||
2029 | u32 rb = jiffies; | |
2030 | unsigned long flags; | |
2031 | ||
2032 | spin_lock_irqsave(&priv->ps_lock,flags); | |
2033 | ||
65a43784 | 2034 | // Writing HW register with 0 equals to disable |
2035 | // the timer, that is not really what we want | |
2036 | // | |
2037 | tl -= MSECS(8+16+7); | |
ecdfa446 | 2038 | |
65a43784 | 2039 | // If the interval in witch we are requested to sleep is too |
2040 | // short then give up and remain awake | |
2041 | // when we sleep after send null frame, the timer will be too short to sleep. | |
2042 | // | |
ecdfa446 | 2043 | if(((tl>=rb)&& (tl-rb) <= MSECS(MIN_SLEEP_TIME)) |
65a43784 | 2044 | ||((rb>tl)&& (rb-tl) < MSECS(MIN_SLEEP_TIME))) { |
ecdfa446 | 2045 | spin_unlock_irqrestore(&priv->ps_lock,flags); |
65a43784 | 2046 | printk("too short to sleep::%x, %x, %lx\n",tl, rb, MSECS(MIN_SLEEP_TIME)); |
ecdfa446 GKH |
2047 | return; |
2048 | } | |
2049 | ||
ecdfa446 | 2050 | if(((tl > rb) && ((tl-rb) > MSECS(MAX_SLEEP_TIME)))|| |
65a43784 | 2051 | ((tl < rb) && (tl>MSECS(69)) && ((rb-tl) > MSECS(MAX_SLEEP_TIME)))|| |
2052 | ((tl<rb)&&(tl<MSECS(69))&&((tl+0xffffffff-rb)>MSECS(MAX_SLEEP_TIME)))) { | |
ecdfa446 GKH |
2053 | printk("========>too long to sleep:%x, %x, %lx\n", tl, rb, MSECS(MAX_SLEEP_TIME)); |
2054 | spin_unlock_irqrestore(&priv->ps_lock,flags); | |
2055 | return; | |
2056 | } | |
65a43784 | 2057 | { |
2058 | u32 tmp = (tl>rb)?(tl-rb):(rb-tl); | |
2059 | queue_delayed_work(priv->ieee80211->wq, | |
2060 | &priv->ieee80211->hw_wakeup_wq,tmp); | |
2061 | //PowerSave not supported when kernel version less 2.6.20 | |
2062 | } | |
2063 | queue_delayed_work(priv->ieee80211->wq, | |
2064 | (void *)&priv->ieee80211->hw_sleep_wq,0); | |
ecdfa446 | 2065 | spin_unlock_irqrestore(&priv->ps_lock,flags); |
65a43784 | 2066 | |
ecdfa446 | 2067 | } |
214985a6 | 2068 | |
ecdfa446 GKH |
2069 | static void rtl8192_init_priv_variable(struct net_device* dev) |
2070 | { | |
2071 | struct r8192_priv *priv = ieee80211_priv(dev); | |
2072 | u8 i; | |
65a43784 | 2073 | PRT_POWER_SAVE_CONTROL pPSC = (PRT_POWER_SAVE_CONTROL)(&(priv->ieee80211->PowerSaveControl)); |
2074 | ||
2075 | // Default Halt the NIC if RF is OFF. | |
2076 | pPSC->RegRfPsLevel |= RT_RF_OFF_LEVL_HALT_NIC; | |
2077 | pPSC->RegRfPsLevel |= RT_RF_OFF_LEVL_CLK_REQ; | |
2078 | pPSC->RegRfPsLevel |= RT_RF_OFF_LEVL_ASPM; | |
2079 | pPSC->RegRfPsLevel |= RT_RF_LPS_LEVEL_ASPM; | |
2080 | pPSC->bLeisurePs = true; | |
2081 | pPSC->RegMaxLPSAwakeIntvl = 5; | |
2082 | priv->bHwRadioOff = false; | |
2083 | ||
ecdfa446 | 2084 | priv->being_init_adapter = false; |
ecdfa446 | 2085 | priv->txringcount = 64;//32; |
ecdfa446 GKH |
2086 | priv->rxbuffersize = 9100;//2048;//1024; |
2087 | priv->rxringcount = MAX_RX_COUNT;//64; | |
2088 | priv->irq_enabled=0; | |
ecdfa446 GKH |
2089 | priv->rx_skb_complete = 1; |
2090 | priv->chan = 1; //set to channel 1 | |
2091 | priv->RegWirelessMode = WIRELESS_MODE_AUTO; | |
2092 | priv->RegChannelPlan = 0xf; | |
ecdfa446 GKH |
2093 | priv->ieee80211->mode = WIRELESS_MODE_AUTO; //SET AUTO |
2094 | priv->ieee80211->iw_mode = IW_MODE_INFRA; | |
2095 | priv->ieee80211->ieee_up=0; | |
2096 | priv->retry_rts = DEFAULT_RETRY_RTS; | |
2097 | priv->retry_data = DEFAULT_RETRY_DATA; | |
2098 | priv->ieee80211->rts = DEFAULT_RTS_THRESHOLD; | |
2099 | priv->ieee80211->rate = 110; //11 mbps | |
2100 | priv->ieee80211->short_slot = 1; | |
2101 | priv->promisc = (dev->flags & IFF_PROMISC) ? 1:0; | |
2102 | priv->bcck_in_ch14 = false; | |
ecdfa446 GKH |
2103 | priv->CCKPresentAttentuation = 0; |
2104 | priv->rfa_txpowertrackingindex = 0; | |
2105 | priv->rfc_txpowertrackingindex = 0; | |
2106 | priv->CckPwEnl = 6; | |
ecdfa446 GKH |
2107 | //added by amy for silent reset |
2108 | priv->ResetProgress = RESET_TYPE_NORESET; | |
2109 | priv->bForcedSilentReset = 0; | |
2110 | priv->bDisableNormalResetCheck = false; | |
2111 | priv->force_reset = false; | |
2112 | //added by amy for power save | |
ecdfa446 GKH |
2113 | priv->ieee80211->RfOffReason = 0; |
2114 | priv->RFChangeInProgress = false; | |
2115 | priv->bHwRfOffAction = 0; | |
2116 | priv->SetRFPowerStateInProgress = false; | |
2117 | priv->ieee80211->PowerSaveControl.bInactivePs = true; | |
2118 | priv->ieee80211->PowerSaveControl.bIPSModeBackup = false; | |
ecdfa446 GKH |
2119 | |
2120 | priv->ieee80211->current_network.beacon_interval = DEFAULT_BEACONINTERVAL; | |
2121 | priv->ieee80211->iw_mode = IW_MODE_INFRA; | |
2122 | priv->ieee80211->softmac_features = IEEE_SOFTMAC_SCAN | | |
2123 | IEEE_SOFTMAC_ASSOCIATE | IEEE_SOFTMAC_PROBERQ | | |
2124 | IEEE_SOFTMAC_PROBERS | IEEE_SOFTMAC_TX_QUEUE;/* | | |
2125 | IEEE_SOFTMAC_BEACONS;*///added by amy 080604 //| //IEEE_SOFTMAC_SINGLE_QUEUE; | |
2126 | ||
2127 | priv->ieee80211->active_scan = 1; | |
2128 | priv->ieee80211->modulation = IEEE80211_CCK_MODULATION | IEEE80211_OFDM_MODULATION; | |
2129 | priv->ieee80211->host_encrypt = 1; | |
2130 | priv->ieee80211->host_decrypt = 1; | |
2131 | //priv->ieee80211->start_send_beacons = NULL;//rtl819xusb_beacon_tx;//-by amy 080604 | |
2132 | //priv->ieee80211->stop_send_beacons = NULL;//rtl8192_beacon_stop;//-by amy 080604 | |
2133 | priv->ieee80211->start_send_beacons = rtl8192_start_beacon;//+by david 081107 | |
2134 | priv->ieee80211->stop_send_beacons = rtl8192_stop_beacon;//+by david 081107 | |
2135 | priv->ieee80211->softmac_hard_start_xmit = rtl8192_hard_start_xmit; | |
2136 | priv->ieee80211->set_chan = rtl8192_set_chan; | |
2137 | priv->ieee80211->link_change = rtl8192_link_change; | |
2138 | priv->ieee80211->softmac_data_hard_start_xmit = rtl8192_hard_data_xmit; | |
2139 | priv->ieee80211->data_hard_stop = rtl8192_data_hard_stop; | |
2140 | priv->ieee80211->data_hard_resume = rtl8192_data_hard_resume; | |
2141 | priv->ieee80211->init_wmmparam_flag = 0; | |
2142 | priv->ieee80211->fts = DEFAULT_FRAG_THRESHOLD; | |
2143 | priv->ieee80211->check_nic_enough_desc = check_nic_enough_desc; | |
2144 | priv->ieee80211->tx_headroom = sizeof(TX_FWINFO_8190PCI); | |
2145 | priv->ieee80211->qos_support = 1; | |
2146 | priv->ieee80211->dot11PowerSaveMode = 0; | |
2147 | //added by WB | |
2148 | // priv->ieee80211->SwChnlByTimerHandler = rtl8192_phy_SwChnl; | |
2149 | priv->ieee80211->SetBWModeHandler = rtl8192_SetBWMode; | |
2150 | priv->ieee80211->handle_assoc_response = rtl8192_handle_assoc_response; | |
2151 | priv->ieee80211->handle_beacon = rtl8192_handle_beacon; | |
2152 | ||
2153 | priv->ieee80211->sta_wake_up = rtl8192_hw_wakeup; | |
2154 | // priv->ieee80211->ps_request_tx_ack = rtl8192_rq_tx_ack; | |
2155 | priv->ieee80211->enter_sleep_state = rtl8192_hw_to_sleep; | |
2156 | priv->ieee80211->ps_is_queue_empty = rtl8192_is_tx_queue_empty; | |
2157 | //added by david | |
2158 | priv->ieee80211->GetNmodeSupportBySecCfg = GetNmodeSupportBySecCfg8190Pci; | |
2159 | priv->ieee80211->SetWirelessMode = rtl8192_SetWirelessMode; | |
2160 | priv->ieee80211->GetHalfNmodeSupportByAPsHandler = GetHalfNmodeSupportByAPs819xPci; | |
2161 | ||
2162 | //added by amy | |
2163 | priv->ieee80211->InitialGainHandler = InitialGain819xPci; | |
2164 | ||
65a43784 | 2165 | #ifdef ENABLE_IPS |
2166 | priv->ieee80211->ieee80211_ips_leave_wq = ieee80211_ips_leave_wq; | |
2167 | priv->ieee80211->ieee80211_ips_leave = ieee80211_ips_leave; | |
2168 | #endif | |
2169 | #ifdef ENABLE_LPS | |
2170 | priv->ieee80211->LeisurePSLeave = LeisurePSLeave; | |
16d74da0 | 2171 | #endif |
65a43784 | 2172 | |
2173 | priv->ieee80211->SetHwRegHandler = rtl8192e_SetHwReg; | |
2174 | priv->ieee80211->rtllib_ap_sec_type = rtl8192e_ap_sec_type; | |
2175 | ||
395aa640 MM |
2176 | priv->ShortRetryLimit = 0x30; |
2177 | priv->LongRetryLimit = 0x30; | |
ecdfa446 GKH |
2178 | |
2179 | priv->ReceiveConfig = RCR_ADD3 | | |
2180 | RCR_AMF | RCR_ADF | //accept management/data | |
2181 | RCR_AICV | //accept control frame for SW AP needs PS-poll, 2005.07.07, by rcnjko. | |
2182 | RCR_AB | RCR_AM | RCR_APM | //accept BC/MC/UC | |
2183 | RCR_AAP | ((u32)7<<RCR_MXDMA_OFFSET) | | |
2184 | ((u32)7 << RCR_FIFO_OFFSET) | RCR_ONLYERLPKT; | |
2185 | ||
207b58fb MM |
2186 | priv->irq_mask = (u32)(IMR_ROK | IMR_VODOK | IMR_VIDOK | IMR_BEDOK | IMR_BKDOK | |
2187 | IMR_HCCADOK | IMR_MGNTDOK | IMR_COMDOK | IMR_HIGHDOK | | |
2188 | IMR_BDOK | IMR_RXCMDOK | IMR_TIMEOUT0 | IMR_RDU | IMR_RXFOVW | | |
ecdfa446 GKH |
2189 | IMR_TXFOVW | IMR_BcnInt | IMR_TBDOK | IMR_TBDER); |
2190 | ||
5b84cc78 | 2191 | priv->pFirmware = vzalloc(sizeof(rt_firmware)); |
ecdfa446 GKH |
2192 | |
2193 | /* rx related queue */ | |
ecdfa446 GKH |
2194 | skb_queue_head_init(&priv->skb_queue); |
2195 | ||
2196 | /* Tx related queue */ | |
2197 | for(i = 0; i < MAX_QUEUE_SIZE; i++) { | |
2198 | skb_queue_head_init(&priv->ieee80211->skb_waitQ [i]); | |
2199 | } | |
2200 | for(i = 0; i < MAX_QUEUE_SIZE; i++) { | |
2201 | skb_queue_head_init(&priv->ieee80211->skb_aggQ [i]); | |
2202 | } | |
2203 | priv->rf_set_chan = rtl8192_phy_SwChnl; | |
2204 | } | |
2205 | ||
ecdfa446 GKH |
2206 | static void rtl8192_init_priv_lock(struct r8192_priv* priv) |
2207 | { | |
2208 | spin_lock_init(&priv->tx_lock); | |
ecdfa446 GKH |
2209 | spin_lock_init(&priv->irq_th_lock); |
2210 | spin_lock_init(&priv->rf_ps_lock); | |
2211 | spin_lock_init(&priv->ps_lock); | |
ecdfa446 GKH |
2212 | sema_init(&priv->wx_sem,1); |
2213 | sema_init(&priv->rf_sem,1); | |
ecdfa446 | 2214 | mutex_init(&priv->mutex); |
ecdfa446 GKH |
2215 | } |
2216 | ||
214985a6 | 2217 | /* init tasklet and wait_queue here */ |
ecdfa446 GKH |
2218 | #define DRV_NAME "wlan0" |
2219 | static void rtl8192_init_priv_task(struct net_device* dev) | |
2220 | { | |
2221 | struct r8192_priv *priv = ieee80211_priv(dev); | |
2222 | ||
ecdfa446 | 2223 | priv->priv_wq = create_workqueue(DRV_NAME); |
ecdfa446 | 2224 | |
65a43784 | 2225 | #ifdef ENABLE_IPS |
2226 | INIT_WORK(&priv->ieee80211->ips_leave_wq, (void*)IPSLeave_wq); | |
2227 | #endif | |
2228 | ||
ecdfa446 GKH |
2229 | // INIT_WORK(&priv->reset_wq, (void(*)(void*)) rtl8192_restart); |
2230 | INIT_WORK(&priv->reset_wq, rtl8192_restart); | |
2231 | // INIT_DELAYED_WORK(&priv->watch_dog_wq, hal_dm_watchdog); | |
2232 | INIT_DELAYED_WORK(&priv->watch_dog_wq, rtl819x_watchdog_wqcallback); | |
2233 | INIT_DELAYED_WORK(&priv->txpower_tracking_wq, dm_txpower_trackingcallback); | |
2234 | INIT_DELAYED_WORK(&priv->rfpath_check_wq, dm_rf_pathcheck_workitemcallback); | |
2235 | INIT_DELAYED_WORK(&priv->update_beacon_wq, rtl8192_update_beacon); | |
2236 | //INIT_WORK(&priv->SwChnlWorkItem, rtl8192_SwChnl_WorkItem); | |
2237 | //INIT_WORK(&priv->SetBWModeWorkItem, rtl8192_SetBWModeWorkItem); | |
2238 | INIT_WORK(&priv->qos_activate, rtl8192_qos_activate); | |
2239 | INIT_DELAYED_WORK(&priv->ieee80211->hw_wakeup_wq,(void*) rtl8192_hw_wakeup_wq); | |
2240 | INIT_DELAYED_WORK(&priv->ieee80211->hw_sleep_wq,(void*) rtl8192_hw_sleep_wq); | |
2241 | ||
ecdfa446 GKH |
2242 | tasklet_init(&priv->irq_rx_tasklet, |
2243 | (void(*)(unsigned long))rtl8192_irq_rx_tasklet, | |
2244 | (unsigned long)priv); | |
2245 | tasklet_init(&priv->irq_tx_tasklet, | |
2246 | (void(*)(unsigned long))rtl8192_irq_tx_tasklet, | |
2247 | (unsigned long)priv); | |
2248 | tasklet_init(&priv->irq_prepare_beacon_tasklet, | |
2249 | (void(*)(unsigned long))rtl8192_prepare_beacon, | |
2250 | (unsigned long)priv); | |
2251 | } | |
2252 | ||
2253 | static void rtl8192_get_eeprom_size(struct net_device* dev) | |
2254 | { | |
2255 | u16 curCR = 0; | |
2256 | struct r8192_priv *priv = ieee80211_priv(dev); | |
2257 | RT_TRACE(COMP_INIT, "===========>%s()\n", __FUNCTION__); | |
2258 | curCR = read_nic_dword(dev, EPROM_CMD); | |
2259 | RT_TRACE(COMP_INIT, "read from Reg Cmd9346CR(%x):%x\n", EPROM_CMD, curCR); | |
2260 | //whether need I consider BIT5? | |
2261 | priv->epromtype = (curCR & EPROM_CMD_9356SEL) ? EPROM_93c56 : EPROM_93c46; | |
2262 | RT_TRACE(COMP_INIT, "<===========%s(), epromtype:%d\n", __FUNCTION__, priv->epromtype); | |
2263 | } | |
2264 | ||
ecdfa446 | 2265 | /* |
214985a6 MM |
2266 | * Adapter->EEPROMAddressSize should be set before this function call. |
2267 | * EEPROM address size can be got through GetEEPROMSize8185() | |
2268 | */ | |
ecdfa446 GKH |
2269 | static void rtl8192_read_eeprom_info(struct net_device* dev) |
2270 | { | |
2271 | struct r8192_priv *priv = ieee80211_priv(dev); | |
2272 | ||
2273 | u8 tempval; | |
2274 | #ifdef RTL8192E | |
2275 | u8 ICVer8192, ICVer8256; | |
2276 | #endif | |
2277 | u16 i,usValue, IC_Version; | |
2278 | u16 EEPROMId; | |
2279 | #ifdef RTL8190P | |
16d74da0 | 2280 | u8 offset; |
ecdfa446 GKH |
2281 | u8 EepromTxPower[100]; |
2282 | #endif | |
2283 | u8 bMac_Tmp_Addr[6] = {0x00, 0xe0, 0x4c, 0x00, 0x00, 0x01}; | |
2284 | RT_TRACE(COMP_INIT, "====> rtl8192_read_eeprom_info\n"); | |
2285 | ||
2286 | ||
2287 | // TODO: I don't know if we need to apply EF function to EEPROM read function | |
2288 | ||
2289 | //2 Read EEPROM ID to make sure autoload is success | |
2290 | EEPROMId = eprom_read(dev, 0); | |
2291 | if( EEPROMId != RTL8190_EEPROM_ID ) | |
2292 | { | |
2293 | RT_TRACE(COMP_ERR, "EEPROM ID is invalid:%x, %x\n", EEPROMId, RTL8190_EEPROM_ID); | |
2294 | priv->AutoloadFailFlag=true; | |
2295 | } | |
2296 | else | |
2297 | { | |
2298 | priv->AutoloadFailFlag=false; | |
2299 | } | |
2300 | ||
2301 | // | |
2302 | // Assign Chip Version ID | |
2303 | // | |
2304 | // Read IC Version && Channel Plan | |
2305 | if(!priv->AutoloadFailFlag) | |
2306 | { | |
2307 | // VID, PID | |
2308 | priv->eeprom_vid = eprom_read(dev, (EEPROM_VID >> 1)); | |
2309 | priv->eeprom_did = eprom_read(dev, (EEPROM_DID >> 1)); | |
2310 | ||
2311 | usValue = eprom_read(dev, (u16)(EEPROM_Customer_ID>>1)) >> 8 ; | |
2312 | priv->eeprom_CustomerID = (u8)( usValue & 0xff); | |
2313 | usValue = eprom_read(dev, (EEPROM_ICVersion_ChannelPlan>>1)); | |
2314 | priv->eeprom_ChannelPlan = usValue&0xff; | |
2315 | IC_Version = ((usValue&0xff00)>>8); | |
2316 | ||
2317 | #ifdef RTL8190P | |
2318 | priv->card_8192_version = (VERSION_8190)(IC_Version); | |
2319 | #else | |
2320 | #ifdef RTL8192E | |
2321 | ICVer8192 = (IC_Version&0xf); //bit0~3; 1:A cut, 2:B cut, 3:C cut... | |
2322 | ICVer8256 = ((IC_Version&0xf0)>>4);//bit4~6, bit7 reserved for other RF chip; 1:A cut, 2:B cut, 3:C cut... | |
2323 | RT_TRACE(COMP_INIT, "\nICVer8192 = 0x%x\n", ICVer8192); | |
2324 | RT_TRACE(COMP_INIT, "\nICVer8256 = 0x%x\n", ICVer8256); | |
2325 | if(ICVer8192 == 0x2) //B-cut | |
2326 | { | |
2327 | if(ICVer8256 == 0x5) //E-cut | |
2328 | priv->card_8192_version= VERSION_8190_BE; | |
2329 | } | |
2330 | #endif | |
2331 | #endif | |
2332 | switch(priv->card_8192_version) | |
2333 | { | |
2334 | case VERSION_8190_BD: | |
2335 | case VERSION_8190_BE: | |
2336 | break; | |
2337 | default: | |
2338 | priv->card_8192_version = VERSION_8190_BD; | |
2339 | break; | |
2340 | } | |
2341 | RT_TRACE(COMP_INIT, "\nIC Version = 0x%x\n", priv->card_8192_version); | |
2342 | } | |
2343 | else | |
2344 | { | |
2345 | priv->card_8192_version = VERSION_8190_BD; | |
2346 | priv->eeprom_vid = 0; | |
2347 | priv->eeprom_did = 0; | |
2348 | priv->eeprom_CustomerID = 0; | |
2349 | priv->eeprom_ChannelPlan = 0; | |
2350 | RT_TRACE(COMP_INIT, "\nIC Version = 0x%x\n", 0xff); | |
2351 | } | |
2352 | ||
2353 | RT_TRACE(COMP_INIT, "EEPROM VID = 0x%4x\n", priv->eeprom_vid); | |
2354 | RT_TRACE(COMP_INIT, "EEPROM DID = 0x%4x\n", priv->eeprom_did); | |
2355 | RT_TRACE(COMP_INIT,"EEPROM Customer ID: 0x%2x\n", priv->eeprom_CustomerID); | |
2356 | ||
2357 | //2 Read Permanent MAC address | |
2358 | if(!priv->AutoloadFailFlag) | |
2359 | { | |
2360 | for(i = 0; i < 6; i += 2) | |
2361 | { | |
2362 | usValue = eprom_read(dev, (u16) ((EEPROM_NODE_ADDRESS_BYTE_0+i)>>1)); | |
2363 | *(u16*)(&dev->dev_addr[i]) = usValue; | |
2364 | } | |
2365 | } else { | |
2366 | // when auto load failed, the last address byte set to be a random one. | |
2367 | // added by david woo.2007/11/7 | |
2368 | memcpy(dev->dev_addr, bMac_Tmp_Addr, 6); | |
ecdfa446 GKH |
2369 | } |
2370 | ||
820793c3 | 2371 | RT_TRACE(COMP_INIT, "Permanent Address = %pM\n", dev->dev_addr); |
ecdfa446 GKH |
2372 | |
2373 | //2 TX Power Check EEPROM Fail or not | |
2374 | if(priv->card_8192_version > VERSION_8190_BD) { | |
2375 | priv->bTXPowerDataReadFromEEPORM = true; | |
2376 | } else { | |
2377 | priv->bTXPowerDataReadFromEEPORM = false; | |
2378 | } | |
2379 | ||
bbc9a991 | 2380 | // 2007/11/15 MH 8190PCI Default=2T4R, 8192PCIE default=1T2R |
ecdfa446 GKH |
2381 | priv->rf_type = RTL819X_DEFAULT_RF_TYPE; |
2382 | ||
2383 | if(priv->card_8192_version > VERSION_8190_BD) | |
2384 | { | |
2385 | // Read RF-indication and Tx Power gain index diff of legacy to HT OFDM rate. | |
2386 | if(!priv->AutoloadFailFlag) | |
2387 | { | |
2388 | tempval = (eprom_read(dev, (EEPROM_RFInd_PowerDiff>>1))) & 0xff; | |
2389 | priv->EEPROMLegacyHTTxPowerDiff = tempval & 0xf; // bit[3:0] | |
2390 | ||
2391 | if (tempval&0x80) //RF-indication, bit[7] | |
2392 | priv->rf_type = RF_1T2R; | |
2393 | else | |
2394 | priv->rf_type = RF_2T4R; | |
2395 | } | |
2396 | else | |
2397 | { | |
2398 | priv->EEPROMLegacyHTTxPowerDiff = EEPROM_Default_LegacyHTTxPowerDiff; | |
2399 | } | |
2400 | RT_TRACE(COMP_INIT, "EEPROMLegacyHTTxPowerDiff = %d\n", | |
2401 | priv->EEPROMLegacyHTTxPowerDiff); | |
2402 | ||
2403 | // Read ThermalMeter from EEPROM | |
2404 | if(!priv->AutoloadFailFlag) | |
2405 | { | |
2406 | priv->EEPROMThermalMeter = (u8)(((eprom_read(dev, (EEPROM_ThermalMeter>>1))) & 0xff00)>>8); | |
2407 | } | |
2408 | else | |
2409 | { | |
2410 | priv->EEPROMThermalMeter = EEPROM_Default_ThermalMeter; | |
2411 | } | |
2412 | RT_TRACE(COMP_INIT, "ThermalMeter = %d\n", priv->EEPROMThermalMeter); | |
2413 | //vivi, for tx power track | |
2414 | priv->TSSI_13dBm = priv->EEPROMThermalMeter *100; | |
2415 | ||
2416 | if(priv->epromtype == EPROM_93c46) | |
2417 | { | |
2418 | // Read antenna tx power offset of B/C/D to A and CrystalCap from EEPROM | |
2419 | if(!priv->AutoloadFailFlag) | |
2420 | { | |
2421 | usValue = eprom_read(dev, (EEPROM_TxPwDiff_CrystalCap>>1)); | |
2422 | priv->EEPROMAntPwDiff = (usValue&0x0fff); | |
2423 | priv->EEPROMCrystalCap = (u8)((usValue&0xf000)>>12); | |
2424 | } | |
2425 | else | |
2426 | { | |
2427 | priv->EEPROMAntPwDiff = EEPROM_Default_AntTxPowerDiff; | |
2428 | priv->EEPROMCrystalCap = EEPROM_Default_TxPwDiff_CrystalCap; | |
2429 | } | |
2430 | RT_TRACE(COMP_INIT, "EEPROMAntPwDiff = %d\n", priv->EEPROMAntPwDiff); | |
2431 | RT_TRACE(COMP_INIT, "EEPROMCrystalCap = %d\n", priv->EEPROMCrystalCap); | |
2432 | ||
2433 | // | |
2434 | // Get per-channel Tx Power Level | |
2435 | // | |
2436 | for(i=0; i<14; i+=2) | |
2437 | { | |
2438 | if(!priv->AutoloadFailFlag) | |
2439 | { | |
2440 | usValue = eprom_read(dev, (u16) ((EEPROM_TxPwIndex_CCK+i)>>1) ); | |
2441 | } | |
2442 | else | |
2443 | { | |
2444 | usValue = EEPROM_Default_TxPower; | |
2445 | } | |
2446 | *((u16*)(&priv->EEPROMTxPowerLevelCCK[i])) = usValue; | |
2447 | RT_TRACE(COMP_INIT,"CCK Tx Power Level, Index %d = 0x%02x\n", i, priv->EEPROMTxPowerLevelCCK[i]); | |
2448 | RT_TRACE(COMP_INIT, "CCK Tx Power Level, Index %d = 0x%02x\n", i+1, priv->EEPROMTxPowerLevelCCK[i+1]); | |
2449 | } | |
2450 | for(i=0; i<14; i+=2) | |
2451 | { | |
2452 | if(!priv->AutoloadFailFlag) | |
2453 | { | |
2454 | usValue = eprom_read(dev, (u16) ((EEPROM_TxPwIndex_OFDM_24G+i)>>1) ); | |
2455 | } | |
2456 | else | |
2457 | { | |
2458 | usValue = EEPROM_Default_TxPower; | |
2459 | } | |
2460 | *((u16*)(&priv->EEPROMTxPowerLevelOFDM24G[i])) = usValue; | |
2461 | RT_TRACE(COMP_INIT, "OFDM 2.4G Tx Power Level, Index %d = 0x%02x\n", i, priv->EEPROMTxPowerLevelOFDM24G[i]); | |
2462 | RT_TRACE(COMP_INIT, "OFDM 2.4G Tx Power Level, Index %d = 0x%02x\n", i+1, priv->EEPROMTxPowerLevelOFDM24G[i+1]); | |
2463 | } | |
2464 | } | |
2465 | else if(priv->epromtype== EPROM_93c56) | |
2466 | { | |
2467 | #ifdef RTL8190P | |
2468 | // Read CrystalCap from EEPROM | |
2469 | if(!priv->AutoloadFailFlag) | |
2470 | { | |
2471 | priv->EEPROMAntPwDiff = EEPROM_Default_AntTxPowerDiff; | |
2472 | priv->EEPROMCrystalCap = (u8)(((eprom_read(dev, (EEPROM_C56_CrystalCap>>1))) & 0xf000)>>12); | |
2473 | } | |
2474 | else | |
2475 | { | |
2476 | priv->EEPROMAntPwDiff = EEPROM_Default_AntTxPowerDiff; | |
2477 | priv->EEPROMCrystalCap = EEPROM_Default_TxPwDiff_CrystalCap; | |
2478 | } | |
2479 | RT_TRACE(COMP_INIT,"EEPROMAntPwDiff = %d\n", priv->EEPROMAntPwDiff); | |
2480 | RT_TRACE(COMP_INIT, "EEPROMCrystalCap = %d\n", priv->EEPROMCrystalCap); | |
2481 | ||
2482 | // Get Tx Power Level by Channel | |
2483 | if(!priv->AutoloadFailFlag) | |
2484 | { | |
2485 | // Read Tx power of Channel 1 ~ 14 from EEPROM. | |
2486 | for(i = 0; i < 12; i+=2) | |
2487 | { | |
2488 | if (i <6) | |
2489 | offset = EEPROM_C56_RfA_CCK_Chnl1_TxPwIndex + i; | |
2490 | else | |
2491 | offset = EEPROM_C56_RfC_CCK_Chnl1_TxPwIndex + i - 6; | |
2492 | usValue = eprom_read(dev, (offset>>1)); | |
2493 | *((u16*)(&EepromTxPower[i])) = usValue; | |
2494 | } | |
2495 | ||
2496 | for(i = 0; i < 12; i++) | |
2497 | { | |
2498 | if (i <= 2) | |
2499 | priv->EEPROMRfACCKChnl1TxPwLevel[i] = EepromTxPower[i]; | |
2500 | else if ((i >=3 )&&(i <= 5)) | |
2501 | priv->EEPROMRfAOfdmChnlTxPwLevel[i-3] = EepromTxPower[i]; | |
2502 | else if ((i >=6 )&&(i <= 8)) | |
2503 | priv->EEPROMRfCCCKChnl1TxPwLevel[i-6] = EepromTxPower[i]; | |
2504 | else | |
2505 | priv->EEPROMRfCOfdmChnlTxPwLevel[i-9] = EepromTxPower[i]; | |
2506 | } | |
2507 | } | |
2508 | else | |
2509 | { | |
2510 | priv->EEPROMRfACCKChnl1TxPwLevel[0] = EEPROM_Default_TxPowerLevel; | |
2511 | priv->EEPROMRfACCKChnl1TxPwLevel[1] = EEPROM_Default_TxPowerLevel; | |
2512 | priv->EEPROMRfACCKChnl1TxPwLevel[2] = EEPROM_Default_TxPowerLevel; | |
2513 | ||
2514 | priv->EEPROMRfAOfdmChnlTxPwLevel[0] = EEPROM_Default_TxPowerLevel; | |
2515 | priv->EEPROMRfAOfdmChnlTxPwLevel[1] = EEPROM_Default_TxPowerLevel; | |
2516 | priv->EEPROMRfAOfdmChnlTxPwLevel[2] = EEPROM_Default_TxPowerLevel; | |
2517 | ||
2518 | priv->EEPROMRfCCCKChnl1TxPwLevel[0] = EEPROM_Default_TxPowerLevel; | |
2519 | priv->EEPROMRfCCCKChnl1TxPwLevel[1] = EEPROM_Default_TxPowerLevel; | |
2520 | priv->EEPROMRfCCCKChnl1TxPwLevel[2] = EEPROM_Default_TxPowerLevel; | |
2521 | ||
2522 | priv->EEPROMRfCOfdmChnlTxPwLevel[0] = EEPROM_Default_TxPowerLevel; | |
2523 | priv->EEPROMRfCOfdmChnlTxPwLevel[1] = EEPROM_Default_TxPowerLevel; | |
2524 | priv->EEPROMRfCOfdmChnlTxPwLevel[2] = EEPROM_Default_TxPowerLevel; | |
2525 | } | |
2526 | RT_TRACE(COMP_INIT, "priv->EEPROMRfACCKChnl1TxPwLevel[0] = 0x%x\n", priv->EEPROMRfACCKChnl1TxPwLevel[0]); | |
2527 | RT_TRACE(COMP_INIT, "priv->EEPROMRfACCKChnl1TxPwLevel[1] = 0x%x\n", priv->EEPROMRfACCKChnl1TxPwLevel[1]); | |
2528 | RT_TRACE(COMP_INIT, "priv->EEPROMRfACCKChnl1TxPwLevel[2] = 0x%x\n", priv->EEPROMRfACCKChnl1TxPwLevel[2]); | |
2529 | RT_TRACE(COMP_INIT, "priv->EEPROMRfAOfdmChnlTxPwLevel[0] = 0x%x\n", priv->EEPROMRfAOfdmChnlTxPwLevel[0]); | |
2530 | RT_TRACE(COMP_INIT, "priv->EEPROMRfAOfdmChnlTxPwLevel[1] = 0x%x\n", priv->EEPROMRfAOfdmChnlTxPwLevel[1]); | |
2531 | RT_TRACE(COMP_INIT, "priv->EEPROMRfAOfdmChnlTxPwLevel[2] = 0x%x\n", priv->EEPROMRfAOfdmChnlTxPwLevel[2]); | |
2532 | RT_TRACE(COMP_INIT, "priv->EEPROMRfCCCKChnl1TxPwLevel[0] = 0x%x\n", priv->EEPROMRfCCCKChnl1TxPwLevel[0]); | |
2533 | RT_TRACE(COMP_INIT, "priv->EEPROMRfCCCKChnl1TxPwLevel[1] = 0x%x\n", priv->EEPROMRfCCCKChnl1TxPwLevel[1]); | |
2534 | RT_TRACE(COMP_INIT, "priv->EEPROMRfCCCKChnl1TxPwLevel[2] = 0x%x\n", priv->EEPROMRfCCCKChnl1TxPwLevel[2]); | |
2535 | RT_TRACE(COMP_INIT, "priv->EEPROMRfCOfdmChnlTxPwLevel[0] = 0x%x\n", priv->EEPROMRfCOfdmChnlTxPwLevel[0]); | |
2536 | RT_TRACE(COMP_INIT, "priv->EEPROMRfCOfdmChnlTxPwLevel[1] = 0x%x\n", priv->EEPROMRfCOfdmChnlTxPwLevel[1]); | |
2537 | RT_TRACE(COMP_INIT, "priv->EEPROMRfCOfdmChnlTxPwLevel[2] = 0x%x\n", priv->EEPROMRfCOfdmChnlTxPwLevel[2]); | |
2538 | #endif | |
2539 | ||
2540 | } | |
2541 | // | |
2542 | // Update HAL variables. | |
2543 | // | |
2544 | if(priv->epromtype == EPROM_93c46) | |
2545 | { | |
2546 | for(i=0; i<14; i++) | |
2547 | { | |
2548 | priv->TxPowerLevelCCK[i] = priv->EEPROMTxPowerLevelCCK[i]; | |
2549 | priv->TxPowerLevelOFDM24G[i] = priv->EEPROMTxPowerLevelOFDM24G[i]; | |
2550 | } | |
2551 | priv->LegacyHTTxPowerDiff = priv->EEPROMLegacyHTTxPowerDiff; | |
2552 | // Antenna B gain offset to antenna A, bit0~3 | |
2553 | priv->AntennaTxPwDiff[0] = (priv->EEPROMAntPwDiff & 0xf); | |
2554 | // Antenna C gain offset to antenna A, bit4~7 | |
2555 | priv->AntennaTxPwDiff[1] = ((priv->EEPROMAntPwDiff & 0xf0)>>4); | |
2556 | // Antenna D gain offset to antenna A, bit8~11 | |
2557 | priv->AntennaTxPwDiff[2] = ((priv->EEPROMAntPwDiff & 0xf00)>>8); | |
2558 | // CrystalCap, bit12~15 | |
2559 | priv->CrystalCap = priv->EEPROMCrystalCap; | |
2560 | // ThermalMeter, bit0~3 for RFIC1, bit4~7 for RFIC2 | |
2561 | priv->ThermalMeter[0] = (priv->EEPROMThermalMeter & 0xf); | |
2562 | priv->ThermalMeter[1] = ((priv->EEPROMThermalMeter & 0xf0)>>4); | |
2563 | } | |
2564 | else if(priv->epromtype == EPROM_93c56) | |
2565 | { | |
2566 | //char cck_pwr_diff_a=0, cck_pwr_diff_c=0; | |
2567 | ||
2568 | //cck_pwr_diff_a = pHalData->EEPROMRfACCKChnl7TxPwLevel - pHalData->EEPROMRfAOfdmChnlTxPwLevel[1]; | |
2569 | //cck_pwr_diff_c = pHalData->EEPROMRfCCCKChnl7TxPwLevel - pHalData->EEPROMRfCOfdmChnlTxPwLevel[1]; | |
2570 | for(i=0; i<3; i++) // channel 1~3 use the same Tx Power Level. | |
2571 | { | |
2572 | priv->TxPowerLevelCCK_A[i] = priv->EEPROMRfACCKChnl1TxPwLevel[0]; | |
2573 | priv->TxPowerLevelOFDM24G_A[i] = priv->EEPROMRfAOfdmChnlTxPwLevel[0]; | |
2574 | priv->TxPowerLevelCCK_C[i] = priv->EEPROMRfCCCKChnl1TxPwLevel[0]; | |
2575 | priv->TxPowerLevelOFDM24G_C[i] = priv->EEPROMRfCOfdmChnlTxPwLevel[0]; | |
2576 | } | |
2577 | for(i=3; i<9; i++) // channel 4~9 use the same Tx Power Level | |
2578 | { | |
2579 | priv->TxPowerLevelCCK_A[i] = priv->EEPROMRfACCKChnl1TxPwLevel[1]; | |
2580 | priv->TxPowerLevelOFDM24G_A[i] = priv->EEPROMRfAOfdmChnlTxPwLevel[1]; | |
2581 | priv->TxPowerLevelCCK_C[i] = priv->EEPROMRfCCCKChnl1TxPwLevel[1]; | |
2582 | priv->TxPowerLevelOFDM24G_C[i] = priv->EEPROMRfCOfdmChnlTxPwLevel[1]; | |
2583 | } | |
2584 | for(i=9; i<14; i++) // channel 10~14 use the same Tx Power Level | |
2585 | { | |
2586 | priv->TxPowerLevelCCK_A[i] = priv->EEPROMRfACCKChnl1TxPwLevel[2]; | |
2587 | priv->TxPowerLevelOFDM24G_A[i] = priv->EEPROMRfAOfdmChnlTxPwLevel[2]; | |
2588 | priv->TxPowerLevelCCK_C[i] = priv->EEPROMRfCCCKChnl1TxPwLevel[2]; | |
2589 | priv->TxPowerLevelOFDM24G_C[i] = priv->EEPROMRfCOfdmChnlTxPwLevel[2]; | |
2590 | } | |
2591 | for(i=0; i<14; i++) | |
2592 | RT_TRACE(COMP_INIT, "priv->TxPowerLevelCCK_A[%d] = 0x%x\n", i, priv->TxPowerLevelCCK_A[i]); | |
2593 | for(i=0; i<14; i++) | |
2594 | RT_TRACE(COMP_INIT,"priv->TxPowerLevelOFDM24G_A[%d] = 0x%x\n", i, priv->TxPowerLevelOFDM24G_A[i]); | |
2595 | for(i=0; i<14; i++) | |
2596 | RT_TRACE(COMP_INIT, "priv->TxPowerLevelCCK_C[%d] = 0x%x\n", i, priv->TxPowerLevelCCK_C[i]); | |
2597 | for(i=0; i<14; i++) | |
2598 | RT_TRACE(COMP_INIT, "priv->TxPowerLevelOFDM24G_C[%d] = 0x%x\n", i, priv->TxPowerLevelOFDM24G_C[i]); | |
2599 | priv->LegacyHTTxPowerDiff = priv->EEPROMLegacyHTTxPowerDiff; | |
2600 | priv->AntennaTxPwDiff[0] = 0; | |
2601 | priv->AntennaTxPwDiff[1] = 0; | |
2602 | priv->AntennaTxPwDiff[2] = 0; | |
2603 | priv->CrystalCap = priv->EEPROMCrystalCap; | |
2604 | // ThermalMeter, bit0~3 for RFIC1, bit4~7 for RFIC2 | |
2605 | priv->ThermalMeter[0] = (priv->EEPROMThermalMeter & 0xf); | |
2606 | priv->ThermalMeter[1] = ((priv->EEPROMThermalMeter & 0xf0)>>4); | |
2607 | } | |
2608 | } | |
2609 | ||
2610 | if(priv->rf_type == RF_1T2R) | |
2611 | { | |
2612 | RT_TRACE(COMP_INIT, "\n1T2R config\n"); | |
2613 | } | |
2614 | else if (priv->rf_type == RF_2T4R) | |
2615 | { | |
2616 | RT_TRACE(COMP_INIT, "\n2T4R config\n"); | |
2617 | } | |
2618 | ||
2619 | // 2008/01/16 MH We can only know RF type in the function. So we have to init | |
2620 | // DIG RATR table again. | |
2621 | init_rate_adaptive(dev); | |
2622 | ||
2623 | //1 Make a copy for following variables and we can change them if we want | |
2624 | ||
2625 | priv->rf_chip= RF_8256; | |
2626 | ||
2627 | if(priv->RegChannelPlan == 0xf) | |
2628 | { | |
2629 | priv->ChannelPlan = priv->eeprom_ChannelPlan; | |
2630 | } | |
2631 | else | |
2632 | { | |
2633 | priv->ChannelPlan = priv->RegChannelPlan; | |
2634 | } | |
2635 | ||
2636 | // | |
2637 | // Used PID and DID to Set CustomerID | |
2638 | // | |
2639 | if( priv->eeprom_vid == 0x1186 && priv->eeprom_did == 0x3304 ) | |
2640 | { | |
2641 | priv->CustomerID = RT_CID_DLINK; | |
2642 | } | |
2643 | ||
2644 | switch(priv->eeprom_CustomerID) | |
2645 | { | |
2646 | case EEPROM_CID_DEFAULT: | |
2647 | priv->CustomerID = RT_CID_DEFAULT; | |
2648 | break; | |
2649 | case EEPROM_CID_CAMEO: | |
2650 | priv->CustomerID = RT_CID_819x_CAMEO; | |
2651 | break; | |
2652 | case EEPROM_CID_RUNTOP: | |
2653 | priv->CustomerID = RT_CID_819x_RUNTOP; | |
2654 | break; | |
2655 | case EEPROM_CID_NetCore: | |
2656 | priv->CustomerID = RT_CID_819x_Netcore; | |
2657 | break; | |
2658 | case EEPROM_CID_TOSHIBA: // Merge by Jacken, 2008/01/31 | |
2659 | priv->CustomerID = RT_CID_TOSHIBA; | |
2660 | if(priv->eeprom_ChannelPlan&0x80) | |
2661 | priv->ChannelPlan = priv->eeprom_ChannelPlan&0x7f; | |
2662 | else | |
2663 | priv->ChannelPlan = 0x0; | |
2664 | RT_TRACE(COMP_INIT, "Toshiba ChannelPlan = 0x%x\n", | |
2665 | priv->ChannelPlan); | |
2666 | break; | |
2667 | case EEPROM_CID_Nettronix: | |
ecdfa446 GKH |
2668 | priv->CustomerID = RT_CID_Nettronix; |
2669 | break; | |
2670 | case EEPROM_CID_Pronet: | |
2671 | priv->CustomerID = RT_CID_PRONET; | |
2672 | break; | |
2673 | case EEPROM_CID_DLINK: | |
2674 | priv->CustomerID = RT_CID_DLINK; | |
2675 | break; | |
2676 | ||
2677 | case EEPROM_CID_WHQL: | |
2678 | //Adapter->bInHctTest = TRUE;//do not supported | |
2679 | ||
2680 | //priv->bSupportTurboMode = FALSE; | |
2681 | //priv->bAutoTurboBy8186 = FALSE; | |
2682 | ||
2683 | //pMgntInfo->PowerSaveControl.bInactivePs = FALSE; | |
2684 | //pMgntInfo->PowerSaveControl.bIPSModeBackup = FALSE; | |
2685 | //pMgntInfo->PowerSaveControl.bLeisurePs = FALSE; | |
2686 | ||
2687 | break; | |
2688 | default: | |
2689 | // value from RegCustomerID | |
2690 | break; | |
2691 | } | |
2692 | ||
2693 | //Avoid the channel plan array overflow, by Bruce, 2007-08-27. | |
2694 | if(priv->ChannelPlan > CHANNEL_PLAN_LEN - 1) | |
2695 | priv->ChannelPlan = 0; //FCC | |
2696 | ||
2697 | switch(priv->CustomerID) | |
2698 | { | |
2699 | case RT_CID_DEFAULT: | |
2700 | #ifdef RTL8190P | |
2701 | priv->LedStrategy = HW_LED; | |
2702 | #else | |
2703 | #ifdef RTL8192E | |
2704 | priv->LedStrategy = SW_LED_MODE1; | |
2705 | #endif | |
2706 | #endif | |
2707 | break; | |
2708 | ||
2709 | case RT_CID_819x_CAMEO: | |
2710 | priv->LedStrategy = SW_LED_MODE2; | |
2711 | break; | |
2712 | ||
2713 | case RT_CID_819x_RUNTOP: | |
2714 | priv->LedStrategy = SW_LED_MODE3; | |
2715 | break; | |
2716 | ||
2717 | case RT_CID_819x_Netcore: | |
2718 | priv->LedStrategy = SW_LED_MODE4; | |
2719 | break; | |
2720 | ||
2721 | case RT_CID_Nettronix: | |
2722 | priv->LedStrategy = SW_LED_MODE5; | |
2723 | break; | |
2724 | ||
2725 | case RT_CID_PRONET: | |
2726 | priv->LedStrategy = SW_LED_MODE6; | |
2727 | break; | |
2728 | ||
2729 | case RT_CID_TOSHIBA: //Modify by Jacken 2008/01/31 | |
2730 | // Do nothing. | |
2731 | //break; | |
2732 | ||
2733 | default: | |
2734 | #ifdef RTL8190P | |
2735 | priv->LedStrategy = HW_LED; | |
2736 | #else | |
2737 | #ifdef RTL8192E | |
2738 | priv->LedStrategy = SW_LED_MODE1; | |
2739 | #endif | |
2740 | #endif | |
2741 | break; | |
2742 | } | |
65a43784 | 2743 | |
2744 | ||
ecdfa446 | 2745 | if( priv->eeprom_vid == 0x1186 && priv->eeprom_did == 0x3304) |
65a43784 | 2746 | priv->ieee80211->bSupportRemoteWakeUp = true; |
ecdfa446 | 2747 | else |
65a43784 | 2748 | priv->ieee80211->bSupportRemoteWakeUp = false; |
2749 | ||
2750 | ||
ecdfa446 GKH |
2751 | RT_TRACE(COMP_INIT, "RegChannelPlan(%d)\n", priv->RegChannelPlan); |
2752 | RT_TRACE(COMP_INIT, "ChannelPlan = %d \n", priv->ChannelPlan); | |
2753 | RT_TRACE(COMP_INIT, "LedStrategy = %d \n", priv->LedStrategy); | |
2754 | RT_TRACE(COMP_TRACE, "<==== ReadAdapterInfo\n"); | |
2755 | ||
2756 | return ; | |
2757 | } | |
2758 | ||
2759 | ||
5e1ad18a | 2760 | static short rtl8192_get_channel_map(struct net_device * dev) |
ecdfa446 GKH |
2761 | { |
2762 | struct r8192_priv *priv = ieee80211_priv(dev); | |
2763 | #ifdef ENABLE_DOT11D | |
2764 | if(priv->ChannelPlan> COUNTRY_CODE_GLOBAL_DOMAIN){ | |
2765 | printk("rtl8180_init:Error channel plan! Set to default.\n"); | |
2766 | priv->ChannelPlan= 0; | |
2767 | } | |
2768 | RT_TRACE(COMP_INIT, "Channel plan is %d\n",priv->ChannelPlan); | |
2769 | ||
2770 | rtl819x_set_channel_map(priv->ChannelPlan, priv); | |
2771 | #else | |
2772 | int ch,i; | |
2773 | //Set Default Channel Plan | |
2774 | if(!channels){ | |
2775 | DMESG("No channels, aborting"); | |
2776 | return -1; | |
2777 | } | |
2778 | ch=channels; | |
2779 | priv->ChannelPlan= 0;//hikaru | |
2780 | // set channels 1..14 allowed in given locale | |
2781 | for (i=1; i<=14; i++) { | |
2782 | (priv->ieee80211->channel_map)[i] = (u8)(ch & 0x01); | |
2783 | ch >>= 1; | |
2784 | } | |
2785 | #endif | |
2786 | return 0; | |
2787 | } | |
5e1ad18a GKH |
2788 | |
2789 | static short rtl8192_init(struct net_device *dev) | |
ecdfa446 GKH |
2790 | { |
2791 | struct r8192_priv *priv = ieee80211_priv(dev); | |
2792 | memset(&(priv->stats),0,sizeof(struct Stats)); | |
2793 | rtl8192_init_priv_variable(dev); | |
2794 | rtl8192_init_priv_lock(priv); | |
2795 | rtl8192_init_priv_task(dev); | |
2796 | rtl8192_get_eeprom_size(dev); | |
2797 | rtl8192_read_eeprom_info(dev); | |
2798 | rtl8192_get_channel_map(dev); | |
2799 | init_hal_dm(dev); | |
2800 | init_timer(&priv->watch_dog_timer); | |
2801 | priv->watch_dog_timer.data = (unsigned long)dev; | |
2802 | priv->watch_dog_timer.function = watch_dog_timer_callback; | |
7bb5e823 | 2803 | if (request_irq(dev->irq, rtl8192_interrupt, IRQF_SHARED, dev->name, dev)) { |
ecdfa446 GKH |
2804 | printk("Error allocating IRQ %d",dev->irq); |
2805 | return -1; | |
2806 | }else{ | |
2807 | priv->irq=dev->irq; | |
2808 | printk("IRQ %d",dev->irq); | |
2809 | } | |
2810 | if(rtl8192_pci_initdescring(dev)!=0){ | |
2811 | printk("Endopoints initialization failed"); | |
2812 | return -1; | |
2813 | } | |
2814 | ||
2815 | //rtl8192_rx_enable(dev); | |
2816 | //rtl8192_adapter_start(dev); | |
ecdfa446 GKH |
2817 | return 0; |
2818 | } | |
2819 | ||
214985a6 MM |
2820 | /* |
2821 | * Actually only set RRSR, RATR and BW_OPMODE registers | |
2822 | * not to do all the hw config as its name says | |
2823 | * This part need to modified according to the rate set we filtered | |
2824 | */ | |
5e1ad18a | 2825 | static void rtl8192_hwconfig(struct net_device* dev) |
ecdfa446 GKH |
2826 | { |
2827 | u32 regRATR = 0, regRRSR = 0; | |
2828 | u8 regBwOpMode = 0, regTmp = 0; | |
2829 | struct r8192_priv *priv = ieee80211_priv(dev); | |
2830 | ||
2831 | // Set RRSR, RATR, and BW_OPMODE registers | |
2832 | // | |
2833 | switch(priv->ieee80211->mode) | |
2834 | { | |
2835 | case WIRELESS_MODE_B: | |
2836 | regBwOpMode = BW_OPMODE_20MHZ; | |
2837 | regRATR = RATE_ALL_CCK; | |
2838 | regRRSR = RATE_ALL_CCK; | |
2839 | break; | |
2840 | case WIRELESS_MODE_A: | |
2841 | regBwOpMode = BW_OPMODE_5G |BW_OPMODE_20MHZ; | |
2842 | regRATR = RATE_ALL_OFDM_AG; | |
2843 | regRRSR = RATE_ALL_OFDM_AG; | |
2844 | break; | |
2845 | case WIRELESS_MODE_G: | |
2846 | regBwOpMode = BW_OPMODE_20MHZ; | |
2847 | regRATR = RATE_ALL_CCK | RATE_ALL_OFDM_AG; | |
2848 | regRRSR = RATE_ALL_CCK | RATE_ALL_OFDM_AG; | |
2849 | break; | |
2850 | case WIRELESS_MODE_AUTO: | |
2851 | case WIRELESS_MODE_N_24G: | |
2852 | // It support CCK rate by default. | |
2853 | // CCK rate will be filtered out only when associated AP does not support it. | |
2854 | regBwOpMode = BW_OPMODE_20MHZ; | |
2855 | regRATR = RATE_ALL_CCK | RATE_ALL_OFDM_AG | RATE_ALL_OFDM_1SS | RATE_ALL_OFDM_2SS; | |
2856 | regRRSR = RATE_ALL_CCK | RATE_ALL_OFDM_AG; | |
2857 | break; | |
2858 | case WIRELESS_MODE_N_5G: | |
2859 | regBwOpMode = BW_OPMODE_5G; | |
2860 | regRATR = RATE_ALL_OFDM_AG | RATE_ALL_OFDM_1SS | RATE_ALL_OFDM_2SS; | |
2861 | regRRSR = RATE_ALL_OFDM_AG; | |
2862 | break; | |
2863 | } | |
2864 | ||
2865 | write_nic_byte(dev, BW_OPMODE, regBwOpMode); | |
2866 | { | |
2867 | u32 ratr_value = 0; | |
2868 | ratr_value = regRATR; | |
2869 | if (priv->rf_type == RF_1T2R) | |
2870 | { | |
2871 | ratr_value &= ~(RATE_ALL_OFDM_2SS); | |
2872 | } | |
2873 | write_nic_dword(dev, RATR0, ratr_value); | |
2874 | write_nic_byte(dev, UFWP, 1); | |
2875 | } | |
2876 | regTmp = read_nic_byte(dev, 0x313); | |
2877 | regRRSR = ((regTmp) << 24) | (regRRSR & 0x00ffffff); | |
2878 | write_nic_dword(dev, RRSR, regRRSR); | |
2879 | ||
2880 | // | |
2881 | // Set Retry Limit here | |
2882 | // | |
2883 | write_nic_word(dev, RETRY_LIMIT, | |
207b58fb | 2884 | priv->ShortRetryLimit << RETRY_LIMIT_SHORT_SHIFT | |
ecdfa446 GKH |
2885 | priv->LongRetryLimit << RETRY_LIMIT_LONG_SHIFT); |
2886 | // Set Contention Window here | |
2887 | ||
2888 | // Set Tx AGC | |
2889 | ||
2890 | // Set Tx Antenna including Feedback control | |
2891 | ||
2892 | // Set Auto Rate fallback control | |
2893 | ||
2894 | ||
2895 | } | |
2896 | ||
2897 | ||
5e1ad18a | 2898 | static RT_STATUS rtl8192_adapter_start(struct net_device *dev) |
ecdfa446 GKH |
2899 | { |
2900 | struct r8192_priv *priv = ieee80211_priv(dev); | |
2901 | // struct ieee80211_device *ieee = priv->ieee80211; | |
2902 | u32 ulRegRead; | |
2903 | RT_STATUS rtStatus = RT_STATUS_SUCCESS; | |
ecdfa446 GKH |
2904 | //u8 eRFPath; |
2905 | u8 tmpvalue; | |
2906 | #ifdef RTL8192E | |
2907 | u8 ICVersion,SwitchingRegulatorOutput; | |
2908 | #endif | |
2909 | bool bfirmwareok = true; | |
2910 | #ifdef RTL8190P | |
2911 | u8 ucRegRead; | |
2912 | #endif | |
2913 | u32 tmpRegA, tmpRegC, TempCCk; | |
2914 | int i =0; | |
ecdfa446 GKH |
2915 | |
2916 | RT_TRACE(COMP_INIT, "====>%s()\n", __FUNCTION__); | |
2917 | priv->being_init_adapter = true; | |
2918 | rtl8192_pci_resetdescring(dev); | |
2919 | // 2007/11/02 MH Before initalizing RF. We can not use FW to do RF-R/W. | |
2920 | priv->Rf_Mode = RF_OP_By_SW_3wire; | |
2921 | #ifdef RTL8192E | |
2922 | //dPLL on | |
2923 | if(priv->ResetProgress == RESET_TYPE_NORESET) | |
2924 | { | |
2925 | write_nic_byte(dev, ANAPAR, 0x37); | |
2926 | // Accordign to designer's explain, LBUS active will never > 10ms. We delay 10ms | |
2927 | // Joseph increae the time to prevent firmware download fail | |
2928 | mdelay(500); | |
2929 | } | |
2930 | #endif | |
2931 | //PlatformSleepUs(10000); | |
2932 | // For any kind of InitializeAdapter process, we shall use system now!! | |
2933 | priv->pFirmware->firmware_status = FW_STATUS_0_INIT; | |
2934 | ||
ecdfa446 GKH |
2935 | // |
2936 | //3 //Config CPUReset Register | |
2937 | //3// | |
2938 | //3 Firmware Reset Or Not | |
2939 | ulRegRead = read_nic_dword(dev, CPU_GEN); | |
2940 | if(priv->pFirmware->firmware_status == FW_STATUS_0_INIT) | |
2941 | { //called from MPInitialized. do nothing | |
2942 | ulRegRead |= CPU_GEN_SYSTEM_RESET; | |
2943 | }else if(priv->pFirmware->firmware_status == FW_STATUS_5_READY) | |
2944 | ulRegRead |= CPU_GEN_FIRMWARE_RESET; // Called from MPReset | |
2945 | else | |
2946 | RT_TRACE(COMP_ERR, "ERROR in %s(): undefined firmware state(%d)\n", __FUNCTION__, priv->pFirmware->firmware_status); | |
2947 | ||
2948 | #ifdef RTL8190P | |
2949 | //2008.06.03, for WOL 90 hw bug | |
2950 | ulRegRead &= (~(CPU_GEN_GPIO_UART)); | |
2951 | #endif | |
2952 | ||
2953 | write_nic_dword(dev, CPU_GEN, ulRegRead); | |
2954 | //mdelay(100); | |
2955 | ||
2956 | #ifdef RTL8192E | |
2957 | ||
2958 | //3// | |
2959 | //3 //Fix the issue of E-cut high temperature issue | |
2960 | //3// | |
2961 | // TODO: E cut only | |
2962 | ICVersion = read_nic_byte(dev, IC_VERRSION); | |
2963 | if(ICVersion >= 0x4) //E-cut only | |
2964 | { | |
2965 | // HW SD suggest that we should not wirte this register too often, so driver | |
2966 | // should readback this register. This register will be modified only when | |
2967 | // power on reset | |
2968 | SwitchingRegulatorOutput = read_nic_byte(dev, SWREGULATOR); | |
2969 | if(SwitchingRegulatorOutput != 0xb8) | |
2970 | { | |
2971 | write_nic_byte(dev, SWREGULATOR, 0xa8); | |
2972 | mdelay(1); | |
2973 | write_nic_byte(dev, SWREGULATOR, 0xb8); | |
2974 | } | |
2975 | } | |
2976 | #endif | |
2977 | ||
2978 | ||
2979 | //3// | |
2980 | //3// Initialize BB before MAC | |
2981 | //3// | |
ecdfa446 GKH |
2982 | RT_TRACE(COMP_INIT, "BB Config Start!\n"); |
2983 | rtStatus = rtl8192_BBConfig(dev); | |
2984 | if(rtStatus != RT_STATUS_SUCCESS) | |
2985 | { | |
2986 | RT_TRACE(COMP_ERR, "BB Config failed\n"); | |
2987 | return rtStatus; | |
2988 | } | |
2989 | RT_TRACE(COMP_INIT,"BB Config Finished!\n"); | |
2990 | ||
ecdfa446 GKH |
2991 | //3//Set Loopback mode or Normal mode |
2992 | //3// | |
2993 | //2006.12.13 by emily. Note!We should not merge these two CPU_GEN register writings | |
2994 | // because setting of System_Reset bit reset MAC to default transmission mode. | |
2995 | //Loopback mode or not | |
2996 | priv->LoopbackMode = RTL819X_NO_LOOPBACK; | |
2997 | //priv->LoopbackMode = RTL819X_MAC_LOOPBACK; | |
2998 | if(priv->ResetProgress == RESET_TYPE_NORESET) | |
2999 | { | |
3000 | ulRegRead = read_nic_dword(dev, CPU_GEN); | |
3001 | if(priv->LoopbackMode == RTL819X_NO_LOOPBACK) | |
3002 | { | |
3003 | ulRegRead = ((ulRegRead & CPU_GEN_NO_LOOPBACK_MSK) | CPU_GEN_NO_LOOPBACK_SET); | |
3004 | } | |
3005 | else if (priv->LoopbackMode == RTL819X_MAC_LOOPBACK ) | |
3006 | { | |
3007 | ulRegRead |= CPU_CCK_LOOPBACK; | |
3008 | } | |
3009 | else | |
3010 | { | |
3011 | RT_TRACE(COMP_ERR,"Serious error: wrong loopback mode setting\n"); | |
3012 | } | |
3013 | ||
3014 | //2008.06.03, for WOL | |
3015 | //ulRegRead &= (~(CPU_GEN_GPIO_UART)); | |
3016 | write_nic_dword(dev, CPU_GEN, ulRegRead); | |
3017 | ||
3018 | // 2006.11.29. After reset cpu, we sholud wait for a second, otherwise, it may fail to write registers. Emily | |
3019 | udelay(500); | |
3020 | } | |
3021 | //3Set Hardware(Do nothing now) | |
3022 | rtl8192_hwconfig(dev); | |
3023 | //2======================================================= | |
3024 | // Common Setting for all of the FPGA platform. (part 1) | |
3025 | //2======================================================= | |
3026 | // If there is changes, please make sure it applies to all of the FPGA version | |
3027 | //3 Turn on Tx/Rx | |
3028 | write_nic_byte(dev, CMDR, CR_RE|CR_TE); | |
3029 | ||
3030 | //2Set Tx dma burst | |
3031 | #ifdef RTL8190P | |
207b58fb MM |
3032 | write_nic_byte(dev, PCIF, ((MXDMA2_NoLimit<<MXDMA2_RX_SHIFT) | |
3033 | (MXDMA2_NoLimit<<MXDMA2_TX_SHIFT) | | |
3034 | (1<<MULRW_SHIFT))); | |
ecdfa446 GKH |
3035 | #else |
3036 | #ifdef RTL8192E | |
207b58fb | 3037 | write_nic_byte(dev, PCIF, ((MXDMA2_NoLimit<<MXDMA2_RX_SHIFT) | |
ecdfa446 GKH |
3038 | (MXDMA2_NoLimit<<MXDMA2_TX_SHIFT) )); |
3039 | #endif | |
3040 | #endif | |
3041 | //set IDR0 here | |
3042 | write_nic_dword(dev, MAC0, ((u32*)dev->dev_addr)[0]); | |
3043 | write_nic_word(dev, MAC4, ((u16*)(dev->dev_addr + 4))[0]); | |
3044 | //set RCR | |
3045 | write_nic_dword(dev, RCR, priv->ReceiveConfig); | |
3046 | ||
3047 | //3 Initialize Number of Reserved Pages in Firmware Queue | |
3048 | #ifdef TO_DO_LIST | |
3049 | if(priv->bInHctTest) | |
3050 | { | |
207b58fb MM |
3051 | PlatformEFIOWrite4Byte(Adapter, RQPN1, NUM_OF_PAGE_IN_FW_QUEUE_BK_DTM << RSVD_FW_QUEUE_PAGE_BK_SHIFT | |
3052 | NUM_OF_PAGE_IN_FW_QUEUE_BE_DTM << RSVD_FW_QUEUE_PAGE_BE_SHIFT | | |
3053 | NUM_OF_PAGE_IN_FW_QUEUE_VI_DTM << RSVD_FW_QUEUE_PAGE_VI_SHIFT | | |
ecdfa446 GKH |
3054 | NUM_OF_PAGE_IN_FW_QUEUE_VO_DTM <<RSVD_FW_QUEUE_PAGE_VO_SHIFT); |
3055 | PlatformEFIOWrite4Byte(Adapter, RQPN2, NUM_OF_PAGE_IN_FW_QUEUE_MGNT << RSVD_FW_QUEUE_PAGE_MGNT_SHIFT); | |
207b58fb MM |
3056 | PlatformEFIOWrite4Byte(Adapter, RQPN3, APPLIED_RESERVED_QUEUE_IN_FW| |
3057 | NUM_OF_PAGE_IN_FW_QUEUE_BCN<<RSVD_FW_QUEUE_PAGE_BCN_SHIFT| | |
ecdfa446 GKH |
3058 | NUM_OF_PAGE_IN_FW_QUEUE_PUB_DTM<<RSVD_FW_QUEUE_PAGE_PUB_SHIFT); |
3059 | } | |
3060 | else | |
3061 | #endif | |
3062 | { | |
207b58fb MM |
3063 | write_nic_dword(dev, RQPN1, NUM_OF_PAGE_IN_FW_QUEUE_BK << RSVD_FW_QUEUE_PAGE_BK_SHIFT | |
3064 | NUM_OF_PAGE_IN_FW_QUEUE_BE << RSVD_FW_QUEUE_PAGE_BE_SHIFT | | |
3065 | NUM_OF_PAGE_IN_FW_QUEUE_VI << RSVD_FW_QUEUE_PAGE_VI_SHIFT | | |
ecdfa446 GKH |
3066 | NUM_OF_PAGE_IN_FW_QUEUE_VO <<RSVD_FW_QUEUE_PAGE_VO_SHIFT); |
3067 | write_nic_dword(dev, RQPN2, NUM_OF_PAGE_IN_FW_QUEUE_MGNT << RSVD_FW_QUEUE_PAGE_MGNT_SHIFT); | |
207b58fb MM |
3068 | write_nic_dword(dev, RQPN3, APPLIED_RESERVED_QUEUE_IN_FW| |
3069 | NUM_OF_PAGE_IN_FW_QUEUE_BCN<<RSVD_FW_QUEUE_PAGE_BCN_SHIFT| | |
ecdfa446 GKH |
3070 | NUM_OF_PAGE_IN_FW_QUEUE_PUB<<RSVD_FW_QUEUE_PAGE_PUB_SHIFT); |
3071 | } | |
3072 | ||
3073 | rtl8192_tx_enable(dev); | |
3074 | rtl8192_rx_enable(dev); | |
3075 | //3Set Response Rate Setting Register | |
3076 | // CCK rate is supported by default. | |
3077 | // CCK rate will be filtered out only when associated AP does not support it. | |
3078 | ulRegRead = (0xFFF00000 & read_nic_dword(dev, RRSR)) | RATE_ALL_OFDM_AG | RATE_ALL_CCK; | |
3079 | write_nic_dword(dev, RRSR, ulRegRead); | |
3080 | write_nic_dword(dev, RATR0+4*7, (RATE_ALL_OFDM_AG | RATE_ALL_CCK)); | |
3081 | ||
3082 | //2Set AckTimeout | |
3083 | // TODO: (it value is only for FPGA version). need to be changed!!2006.12.18, by Emily | |
3084 | write_nic_byte(dev, ACK_TIMEOUT, 0x30); | |
3085 | ||
3086 | //rtl8192_actset_wirelessmode(dev,priv->RegWirelessMode); | |
3087 | if(priv->ResetProgress == RESET_TYPE_NORESET) | |
3088 | rtl8192_SetWirelessMode(dev, priv->ieee80211->mode); | |
3089 | //----------------------------------------------------------------------------- | |
3090 | // Set up security related. 070106, by rcnjko: | |
3091 | // 1. Clear all H/W keys. | |
3092 | // 2. Enable H/W encryption/decryption. | |
3093 | //----------------------------------------------------------------------------- | |
3094 | CamResetAllEntry(dev); | |
3095 | { | |
3096 | u8 SECR_value = 0x0; | |
3097 | SECR_value |= SCR_TxEncEnable; | |
3098 | SECR_value |= SCR_RxDecEnable; | |
3099 | SECR_value |= SCR_NoSKMC; | |
3100 | write_nic_byte(dev, SECR, SECR_value); | |
3101 | } | |
3102 | //3Beacon related | |
3103 | write_nic_word(dev, ATIMWND, 2); | |
3104 | write_nic_word(dev, BCN_INTERVAL, 100); | |
5e1ad18a | 3105 | for (i=0; i<QOS_QUEUE_NUM; i++) |
ecdfa446 | 3106 | write_nic_dword(dev, WDCAPARA_ADD[i], 0x005e4332); |
ecdfa446 GKH |
3107 | // |
3108 | // Switching regulator controller: This is set temporarily. | |
3109 | // It's not sure if this can be removed in the future. | |
3110 | // PJ advised to leave it by default. | |
3111 | // | |
3112 | write_nic_byte(dev, 0xbe, 0xc0); | |
3113 | ||
3114 | //2======================================================= | |
3115 | // Set PHY related configuration defined in MAC register bank | |
3116 | //2======================================================= | |
3117 | rtl8192_phy_configmac(dev); | |
3118 | ||
3119 | if (priv->card_8192_version > (u8) VERSION_8190_BD) { | |
3120 | rtl8192_phy_getTxPower(dev); | |
3121 | rtl8192_phy_setTxPower(dev, priv->chan); | |
3122 | } | |
3123 | ||
3124 | //if D or C cut | |
3125 | tmpvalue = read_nic_byte(dev, IC_VERRSION); | |
3126 | priv->IC_Cut = tmpvalue; | |
3127 | RT_TRACE(COMP_INIT, "priv->IC_Cut = 0x%x\n", priv->IC_Cut); | |
3128 | if(priv->IC_Cut >= IC_VersionCut_D) | |
3129 | { | |
3130 | //pHalData->bDcut = TRUE; | |
3131 | if(priv->IC_Cut == IC_VersionCut_D) | |
3132 | RT_TRACE(COMP_INIT, "D-cut\n"); | |
3133 | if(priv->IC_Cut == IC_VersionCut_E) | |
3134 | { | |
3135 | RT_TRACE(COMP_INIT, "E-cut\n"); | |
3136 | // HW SD suggest that we should not wirte this register too often, so driver | |
3137 | // should readback this register. This register will be modified only when | |
3138 | // power on reset | |
3139 | } | |
3140 | } | |
3141 | else | |
3142 | { | |
3143 | //pHalData->bDcut = FALSE; | |
3144 | RT_TRACE(COMP_INIT, "Before C-cut\n"); | |
3145 | } | |
3146 | ||
ecdfa446 GKH |
3147 | //Firmware download |
3148 | RT_TRACE(COMP_INIT, "Load Firmware!\n"); | |
3149 | bfirmwareok = init_firmware(dev); | |
3150 | if(bfirmwareok != true) { | |
3151 | rtStatus = RT_STATUS_FAILURE; | |
3152 | return rtStatus; | |
3153 | } | |
3154 | RT_TRACE(COMP_INIT, "Load Firmware finished!\n"); | |
11aacc28 | 3155 | |
ecdfa446 GKH |
3156 | //RF config |
3157 | if(priv->ResetProgress == RESET_TYPE_NORESET) | |
3158 | { | |
3159 | RT_TRACE(COMP_INIT, "RF Config Started!\n"); | |
3160 | rtStatus = rtl8192_phy_RFConfig(dev); | |
3161 | if(rtStatus != RT_STATUS_SUCCESS) | |
3162 | { | |
3163 | RT_TRACE(COMP_ERR, "RF Config failed\n"); | |
3164 | return rtStatus; | |
3165 | } | |
3166 | RT_TRACE(COMP_INIT, "RF Config Finished!\n"); | |
3167 | } | |
3168 | rtl8192_phy_updateInitGain(dev); | |
3169 | ||
3170 | /*---- Set CCK and OFDM Block "ON"----*/ | |
3171 | rtl8192_setBBreg(dev, rFPGA0_RFMOD, bCCKEn, 0x1); | |
3172 | rtl8192_setBBreg(dev, rFPGA0_RFMOD, bOFDMEn, 0x1); | |
3173 | ||
3174 | #ifdef RTL8192E | |
3175 | //Enable Led | |
3176 | write_nic_byte(dev, 0x87, 0x0); | |
3177 | #endif | |
3178 | #ifdef RTL8190P | |
3179 | //2008.06.03, for WOL | |
3180 | ucRegRead = read_nic_byte(dev, GPE); | |
3181 | ucRegRead |= BIT0; | |
3182 | write_nic_byte(dev, GPE, ucRegRead); | |
3183 | ||
3184 | ucRegRead = read_nic_byte(dev, GPO); | |
3185 | ucRegRead &= ~BIT0; | |
3186 | write_nic_byte(dev, GPO, ucRegRead); | |
3187 | #endif | |
3188 | ||
3189 | //2======================================================= | |
3190 | // RF Power Save | |
3191 | //2======================================================= | |
3192 | #ifdef ENABLE_IPS | |
3193 | ||
3194 | { | |
0157a2b9 | 3195 | if(priv->ieee80211->RfOffReason > RF_CHANGE_BY_PS) |
ecdfa446 GKH |
3196 | { // H/W or S/W RF OFF before sleep. |
3197 | RT_TRACE((COMP_INIT|COMP_RF|COMP_POWER), "%s(): Turn off RF for RfOffReason(%d) ----------\n", __FUNCTION__,priv->ieee80211->RfOffReason); | |
3198 | MgntActSet_RF_State(dev, eRfOff, priv->ieee80211->RfOffReason); | |
3199 | } | |
3200 | else if(priv->ieee80211->RfOffReason >= RF_CHANGE_BY_IPS) | |
3201 | { // H/W or S/W RF OFF before sleep. | |
3202 | RT_TRACE((COMP_INIT|COMP_RF|COMP_POWER), "%s(): Turn off RF for RfOffReason(%d) ----------\n", __FUNCTION__,priv->ieee80211->RfOffReason); | |
3203 | MgntActSet_RF_State(dev, eRfOff, priv->ieee80211->RfOffReason); | |
3204 | } | |
3205 | else | |
3206 | { | |
3207 | RT_TRACE((COMP_INIT|COMP_RF|COMP_POWER), "%s(): RF-ON \n",__FUNCTION__); | |
3208 | priv->ieee80211->eRFPowerState = eRfOn; | |
3209 | priv->ieee80211->RfOffReason = 0; | |
3210 | //DrvIFIndicateCurrentPhyStatus(Adapter); | |
3211 | // LED control | |
3212 | //Adapter->HalFunc.LedControlHandler(Adapter, LED_CTL_POWER_ON); | |
3213 | ||
3214 | // | |
3215 | // If inactive power mode is enabled, disable rf while in disconnected state. | |
3216 | // But we should still tell upper layer we are in rf on state. | |
3217 | // 2007.07.16, by shien chang. | |
3218 | // | |
3219 | //if(!Adapter->bInHctTest) | |
3220 | //IPSEnter(Adapter); | |
3221 | ||
3222 | } | |
3223 | } | |
3224 | #endif | |
3225 | if(1){ | |
3226 | #ifdef RTL8192E | |
3227 | // We can force firmware to do RF-R/W | |
3228 | if(priv->ieee80211->FwRWRF) | |
3229 | priv->Rf_Mode = RF_OP_By_FW; | |
3230 | else | |
3231 | priv->Rf_Mode = RF_OP_By_SW_3wire; | |
3232 | #else | |
3233 | priv->Rf_Mode = RF_OP_By_SW_3wire; | |
3234 | #endif | |
3235 | } | |
3236 | #ifdef RTL8190P | |
3237 | if(priv->ResetProgress == RESET_TYPE_NORESET) | |
3238 | { | |
3239 | dm_initialize_txpower_tracking(dev); | |
3240 | ||
3241 | tmpRegA= rtl8192_QueryBBReg(dev,rOFDM0_XATxIQImbalance,bMaskDWord); | |
3242 | tmpRegC= rtl8192_QueryBBReg(dev,rOFDM0_XCTxIQImbalance,bMaskDWord); | |
3243 | ||
3244 | if(priv->rf_type == RF_2T4R){ | |
3245 | for(i = 0; i<TxBBGainTableLength; i++) | |
3246 | { | |
3247 | if(tmpRegA == priv->txbbgain_table[i].txbbgain_value) | |
3248 | { | |
3249 | priv->rfa_txpowertrackingindex= (u8)i; | |
3250 | priv->rfa_txpowertrackingindex_real= (u8)i; | |
3251 | priv->rfa_txpowertracking_default = priv->rfa_txpowertrackingindex; | |
3252 | break; | |
3253 | } | |
3254 | } | |
3255 | } | |
3256 | for(i = 0; i<TxBBGainTableLength; i++) | |
3257 | { | |
3258 | if(tmpRegC == priv->txbbgain_table[i].txbbgain_value) | |
3259 | { | |
3260 | priv->rfc_txpowertrackingindex= (u8)i; | |
3261 | priv->rfc_txpowertrackingindex_real= (u8)i; | |
3262 | priv->rfc_txpowertracking_default = priv->rfc_txpowertrackingindex; | |
3263 | break; | |
3264 | } | |
3265 | } | |
3266 | TempCCk = rtl8192_QueryBBReg(dev, rCCK0_TxFilter1, bMaskByte2); | |
3267 | ||
3268 | for(i=0 ; i<CCKTxBBGainTableLength ; i++) | |
3269 | { | |
3270 | if(TempCCk == priv->cck_txbbgain_table[i].ccktxbb_valuearray[0]) | |
3271 | { | |
3272 | priv->CCKPresentAttentuation_20Mdefault =(u8) i; | |
3273 | break; | |
3274 | } | |
3275 | } | |
3276 | priv->CCKPresentAttentuation_40Mdefault = 0; | |
3277 | priv->CCKPresentAttentuation_difference = 0; | |
3278 | priv->CCKPresentAttentuation = priv->CCKPresentAttentuation_20Mdefault; | |
3279 | RT_TRACE(COMP_POWER_TRACKING, "priv->rfa_txpowertrackingindex_initial = %d\n", priv->rfa_txpowertrackingindex); | |
3280 | RT_TRACE(COMP_POWER_TRACKING, "priv->rfa_txpowertrackingindex_real__initial = %d\n", priv->rfa_txpowertrackingindex_real); | |
3281 | RT_TRACE(COMP_POWER_TRACKING, "priv->rfc_txpowertrackingindex_initial = %d\n", priv->rfc_txpowertrackingindex); | |
3282 | RT_TRACE(COMP_POWER_TRACKING, "priv->rfc_txpowertrackingindex_real_initial = %d\n", priv->rfc_txpowertrackingindex_real); | |
3283 | RT_TRACE(COMP_POWER_TRACKING, "priv->CCKPresentAttentuation_difference_initial = %d\n", priv->CCKPresentAttentuation_difference); | |
3284 | RT_TRACE(COMP_POWER_TRACKING, "priv->CCKPresentAttentuation_initial = %d\n", priv->CCKPresentAttentuation); | |
3285 | } | |
3286 | #else | |
3287 | #ifdef RTL8192E | |
3288 | if(priv->ResetProgress == RESET_TYPE_NORESET) | |
3289 | { | |
3290 | dm_initialize_txpower_tracking(dev); | |
3291 | ||
3292 | if(priv->IC_Cut >= IC_VersionCut_D) | |
3293 | { | |
3294 | tmpRegA= rtl8192_QueryBBReg(dev,rOFDM0_XATxIQImbalance,bMaskDWord); | |
3295 | tmpRegC= rtl8192_QueryBBReg(dev,rOFDM0_XCTxIQImbalance,bMaskDWord); | |
3296 | for(i = 0; i<TxBBGainTableLength; i++) | |
3297 | { | |
3298 | if(tmpRegA == priv->txbbgain_table[i].txbbgain_value) | |
3299 | { | |
3300 | priv->rfa_txpowertrackingindex= (u8)i; | |
3301 | priv->rfa_txpowertrackingindex_real= (u8)i; | |
3302 | priv->rfa_txpowertracking_default = priv->rfa_txpowertrackingindex; | |
3303 | break; | |
3304 | } | |
3305 | } | |
3306 | ||
3307 | TempCCk = rtl8192_QueryBBReg(dev, rCCK0_TxFilter1, bMaskByte2); | |
3308 | ||
3309 | for(i=0 ; i<CCKTxBBGainTableLength ; i++) | |
3310 | { | |
3311 | if(TempCCk == priv->cck_txbbgain_table[i].ccktxbb_valuearray[0]) | |
3312 | { | |
3313 | priv->CCKPresentAttentuation_20Mdefault =(u8) i; | |
3314 | break; | |
3315 | } | |
3316 | } | |
3317 | priv->CCKPresentAttentuation_40Mdefault = 0; | |
3318 | priv->CCKPresentAttentuation_difference = 0; | |
3319 | priv->CCKPresentAttentuation = priv->CCKPresentAttentuation_20Mdefault; | |
3320 | RT_TRACE(COMP_POWER_TRACKING, "priv->rfa_txpowertrackingindex_initial = %d\n", priv->rfa_txpowertrackingindex); | |
3321 | RT_TRACE(COMP_POWER_TRACKING, "priv->rfa_txpowertrackingindex_real__initial = %d\n", priv->rfa_txpowertrackingindex_real); | |
3322 | RT_TRACE(COMP_POWER_TRACKING, "priv->CCKPresentAttentuation_difference_initial = %d\n", priv->CCKPresentAttentuation_difference); | |
3323 | RT_TRACE(COMP_POWER_TRACKING, "priv->CCKPresentAttentuation_initial = %d\n", priv->CCKPresentAttentuation); | |
3324 | priv->btxpower_tracking = FALSE;//TEMPLY DISABLE | |
3325 | } | |
3326 | } | |
3327 | #endif | |
3328 | #endif | |
3329 | rtl8192_irq_enable(dev); | |
3330 | priv->being_init_adapter = false; | |
3331 | return rtStatus; | |
3332 | ||
3333 | } | |
3334 | ||
559fba5e | 3335 | static void rtl8192_prepare_beacon(struct r8192_priv *priv) |
ecdfa446 GKH |
3336 | { |
3337 | struct sk_buff *skb; | |
3338 | //unsigned long flags; | |
3339 | cb_desc *tcb_desc; | |
3340 | ||
3341 | skb = ieee80211_get_beacon(priv->ieee80211); | |
3342 | tcb_desc = (cb_desc *)(skb->cb + 8); | |
ecdfa446 GKH |
3343 | //spin_lock_irqsave(&priv->tx_lock,flags); |
3344 | /* prepare misc info for the beacon xmit */ | |
3345 | tcb_desc->queue_index = BEACON_QUEUE; | |
bbc9a991 | 3346 | /* IBSS does not support HT yet, use 1M defaultly */ |
ecdfa446 GKH |
3347 | tcb_desc->data_rate = 2; |
3348 | tcb_desc->RATRIndex = 7; | |
3349 | tcb_desc->bTxDisableRateFallBack = 1; | |
3350 | tcb_desc->bTxUseDriverAssingedRate = 1; | |
3351 | ||
3352 | skb_push(skb, priv->ieee80211->tx_headroom); | |
3353 | if(skb){ | |
3354 | rtl8192_tx(priv->ieee80211->dev,skb); | |
3355 | } | |
3356 | //spin_unlock_irqrestore (&priv->tx_lock, flags); | |
3357 | } | |
3358 | ||
ecdfa446 | 3359 | |
214985a6 MM |
3360 | /* |
3361 | * configure registers for beacon tx and enables it via | |
ecdfa446 GKH |
3362 | * rtl8192_beacon_tx_enable(). rtl8192_beacon_tx_disable() might |
3363 | * be used to stop beacon transmission | |
3364 | */ | |
559fba5e | 3365 | static void rtl8192_start_beacon(struct net_device *dev) |
ecdfa446 GKH |
3366 | { |
3367 | struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev); | |
3368 | struct ieee80211_network *net = &priv->ieee80211->current_network; | |
3369 | u16 BcnTimeCfg = 0; | |
3370 | u16 BcnCW = 6; | |
3371 | u16 BcnIFS = 0xf; | |
3372 | ||
3373 | DMESG("Enabling beacon TX"); | |
3374 | //rtl8192_prepare_beacon(dev); | |
3375 | rtl8192_irq_disable(dev); | |
3376 | //rtl8192_beacon_tx_enable(dev); | |
3377 | ||
3378 | /* ATIM window */ | |
3379 | write_nic_word(dev, ATIMWND, 2); | |
3380 | ||
3381 | /* Beacon interval (in unit of TU) */ | |
3382 | write_nic_word(dev, BCN_INTERVAL, net->beacon_interval); | |
3383 | ||
3384 | /* | |
3385 | * DrvErlyInt (in unit of TU). | |
3386 | * (Time to send interrupt to notify driver to c | |
3387 | * hange beacon content) | |
3388 | * */ | |
3389 | write_nic_word(dev, BCN_DRV_EARLY_INT, 10); | |
3390 | ||
3391 | /* | |
3392 | * BcnDMATIM(in unit of us). | |
3393 | * Indicates the time before TBTT to perform beacon queue DMA | |
3394 | * */ | |
3395 | write_nic_word(dev, BCN_DMATIME, 256); | |
3396 | ||
3397 | /* | |
3398 | * Force beacon frame transmission even after receiving | |
3399 | * beacon frame from other ad hoc STA | |
3400 | * */ | |
3401 | write_nic_byte(dev, BCN_ERR_THRESH, 100); | |
3402 | ||
3403 | /* Set CW and IFS */ | |
3404 | BcnTimeCfg |= BcnCW<<BCN_TCFG_CW_SHIFT; | |
3405 | BcnTimeCfg |= BcnIFS<<BCN_TCFG_IFS; | |
3406 | write_nic_word(dev, BCN_TCFG, BcnTimeCfg); | |
3407 | ||
3408 | ||
3409 | /* enable the interrupt for ad-hoc process */ | |
3410 | rtl8192_irq_enable(dev); | |
3411 | } | |
ecdfa446 | 3412 | |
5e1ad18a | 3413 | static bool HalTxCheckStuck8190Pci(struct net_device *dev) |
ecdfa446 GKH |
3414 | { |
3415 | u16 RegTxCounter = read_nic_word(dev, 0x128); | |
3416 | struct r8192_priv *priv = ieee80211_priv(dev); | |
3417 | bool bStuck = FALSE; | |
3418 | RT_TRACE(COMP_RESET,"%s():RegTxCounter is %d,TxCounter is %d\n",__FUNCTION__,RegTxCounter,priv->TxCounter); | |
3419 | if(priv->TxCounter==RegTxCounter) | |
3420 | bStuck = TRUE; | |
3421 | ||
3422 | priv->TxCounter = RegTxCounter; | |
3423 | ||
3424 | return bStuck; | |
3425 | } | |
3426 | ||
3427 | /* | |
214985a6 MM |
3428 | * Assumption: RT_TX_SPINLOCK is acquired. |
3429 | */ | |
5e1ad18a | 3430 | static RESET_TYPE |
ecdfa446 GKH |
3431 | TxCheckStuck(struct net_device *dev) |
3432 | { | |
3433 | struct r8192_priv *priv = ieee80211_priv(dev); | |
ecdfa446 GKH |
3434 | u8 ResetThreshold = NIC_SEND_HANG_THRESHOLD_POWERSAVE; |
3435 | bool bCheckFwTxCnt = false; | |
ecdfa446 GKH |
3436 | |
3437 | // | |
3438 | // Decide Stuch threshold according to current power save mode | |
3439 | // | |
ecdfa446 GKH |
3440 | switch (priv->ieee80211->dot11PowerSaveMode) |
3441 | { | |
3442 | // The threshold value may required to be adjusted . | |
3443 | case eActive: // Active/Continuous access. | |
3444 | ResetThreshold = NIC_SEND_HANG_THRESHOLD_NORMAL; | |
3445 | break; | |
3446 | case eMaxPs: // Max power save mode. | |
3447 | ResetThreshold = NIC_SEND_HANG_THRESHOLD_POWERSAVE; | |
3448 | break; | |
3449 | case eFastPs: // Fast power save mode. | |
3450 | ResetThreshold = NIC_SEND_HANG_THRESHOLD_POWERSAVE; | |
3451 | break; | |
3452 | } | |
3453 | ||
ecdfa446 GKH |
3454 | if(bCheckFwTxCnt) |
3455 | { | |
3456 | if(HalTxCheckStuck8190Pci(dev)) | |
3457 | { | |
3458 | RT_TRACE(COMP_RESET, "TxCheckStuck(): Fw indicates no Tx condition! \n"); | |
3459 | return RESET_TYPE_SILENT; | |
3460 | } | |
3461 | } | |
11aacc28 | 3462 | |
ecdfa446 GKH |
3463 | return RESET_TYPE_NORESET; |
3464 | } | |
3465 | ||
3466 | ||
5e1ad18a | 3467 | static bool HalRxCheckStuck8190Pci(struct net_device *dev) |
ecdfa446 GKH |
3468 | { |
3469 | struct r8192_priv *priv = ieee80211_priv(dev); | |
3470 | u16 RegRxCounter = read_nic_word(dev, 0x130); | |
3471 | bool bStuck = FALSE; | |
935ce899 | 3472 | |
ecdfa446 GKH |
3473 | RT_TRACE(COMP_RESET,"%s(): RegRxCounter is %d,RxCounter is %d\n",__FUNCTION__,RegRxCounter,priv->RxCounter); |
3474 | // If rssi is small, we should check rx for long time because of bad rx. | |
3475 | // or maybe it will continuous silent reset every 2 seconds. | |
935ce899 | 3476 | priv->rx_chk_cnt++; |
ecdfa446 GKH |
3477 | if(priv->undecorated_smoothed_pwdb >= (RateAdaptiveTH_High+5)) |
3478 | { | |
935ce899 | 3479 | priv->rx_chk_cnt = 0; /* high rssi, check rx stuck right now. */ |
ecdfa446 GKH |
3480 | } |
3481 | else if(priv->undecorated_smoothed_pwdb < (RateAdaptiveTH_High+5) && | |
3482 | ((priv->CurrentChannelBW!=HT_CHANNEL_WIDTH_20&&priv->undecorated_smoothed_pwdb>=RateAdaptiveTH_Low_40M) || | |
3483 | (priv->CurrentChannelBW==HT_CHANNEL_WIDTH_20&&priv->undecorated_smoothed_pwdb>=RateAdaptiveTH_Low_20M)) ) | |
3484 | ||
3485 | { | |
935ce899 | 3486 | if(priv->rx_chk_cnt < 2) |
ecdfa446 GKH |
3487 | { |
3488 | return bStuck; | |
3489 | } | |
3490 | else | |
3491 | { | |
935ce899 | 3492 | priv->rx_chk_cnt = 0; |
ecdfa446 GKH |
3493 | } |
3494 | } | |
3495 | else if(((priv->CurrentChannelBW!=HT_CHANNEL_WIDTH_20&&priv->undecorated_smoothed_pwdb<RateAdaptiveTH_Low_40M) || | |
3496 | (priv->CurrentChannelBW==HT_CHANNEL_WIDTH_20&&priv->undecorated_smoothed_pwdb<RateAdaptiveTH_Low_20M)) && | |
3497 | priv->undecorated_smoothed_pwdb >= VeryLowRSSI) | |
3498 | { | |
935ce899 | 3499 | if(priv->rx_chk_cnt < 4) |
ecdfa446 | 3500 | { |
ecdfa446 GKH |
3501 | return bStuck; |
3502 | } | |
3503 | else | |
3504 | { | |
935ce899 | 3505 | priv->rx_chk_cnt = 0; |
ecdfa446 GKH |
3506 | } |
3507 | } | |
3508 | else | |
3509 | { | |
935ce899 | 3510 | if(priv->rx_chk_cnt < 8) |
ecdfa446 | 3511 | { |
ecdfa446 GKH |
3512 | return bStuck; |
3513 | } | |
3514 | else | |
3515 | { | |
935ce899 | 3516 | priv->rx_chk_cnt = 0; |
ecdfa446 GKH |
3517 | } |
3518 | } | |
ecdfa446 GKH |
3519 | if(priv->RxCounter==RegRxCounter) |
3520 | bStuck = TRUE; | |
3521 | ||
3522 | priv->RxCounter = RegRxCounter; | |
3523 | ||
3524 | return bStuck; | |
3525 | } | |
3526 | ||
5e1ad18a | 3527 | static RESET_TYPE RxCheckStuck(struct net_device *dev) |
ecdfa446 GKH |
3528 | { |
3529 | ||
3530 | if(HalRxCheckStuck8190Pci(dev)) | |
3531 | { | |
3532 | RT_TRACE(COMP_RESET, "RxStuck Condition\n"); | |
3533 | return RESET_TYPE_SILENT; | |
3534 | } | |
3535 | ||
3536 | return RESET_TYPE_NORESET; | |
3537 | } | |
3538 | ||
5e1ad18a | 3539 | static RESET_TYPE |
ecdfa446 GKH |
3540 | rtl819x_ifcheck_resetornot(struct net_device *dev) |
3541 | { | |
3542 | struct r8192_priv *priv = ieee80211_priv(dev); | |
3543 | RESET_TYPE TxResetType = RESET_TYPE_NORESET; | |
3544 | RESET_TYPE RxResetType = RESET_TYPE_NORESET; | |
3545 | RT_RF_POWER_STATE rfState; | |
3546 | ||
3547 | rfState = priv->ieee80211->eRFPowerState; | |
3548 | ||
3549 | TxResetType = TxCheckStuck(dev); | |
11aacc28 | 3550 | |
ecdfa446 GKH |
3551 | if( rfState != eRfOff && |
3552 | /*ADAPTER_TEST_STATUS_FLAG(Adapter, ADAPTER_STATUS_FW_DOWNLOAD_FAILURE)) &&*/ | |
3553 | (priv->ieee80211->iw_mode != IW_MODE_ADHOC)) | |
3554 | { | |
3555 | // If driver is in the status of firmware download failure , driver skips RF initialization and RF is | |
3556 | // in turned off state. Driver should check whether Rx stuck and do silent reset. And | |
3557 | // if driver is in firmware download failure status, driver should initialize RF in the following | |
3558 | // silent reset procedure Emily, 2008.01.21 | |
3559 | ||
3560 | // Driver should not check RX stuck in IBSS mode because it is required to | |
3561 | // set Check BSSID in order to send beacon, however, if check BSSID is | |
3562 | // set, STA cannot hear any packet a all. Emily, 2008.04.12 | |
3563 | RxResetType = RxCheckStuck(dev); | |
3564 | } | |
ecdfa446 GKH |
3565 | |
3566 | RT_TRACE(COMP_RESET,"%s(): TxResetType is %d, RxResetType is %d\n",__FUNCTION__,TxResetType,RxResetType); | |
3567 | if(TxResetType==RESET_TYPE_NORMAL || RxResetType==RESET_TYPE_NORMAL) | |
3568 | return RESET_TYPE_NORMAL; | |
3569 | else if(TxResetType==RESET_TYPE_SILENT || RxResetType==RESET_TYPE_SILENT) | |
3570 | return RESET_TYPE_SILENT; | |
3571 | else | |
3572 | return RESET_TYPE_NORESET; | |
3573 | ||
3574 | } | |
3575 | ||
3576 | ||
5e1ad18a | 3577 | static void CamRestoreAllEntry(struct net_device *dev) |
ecdfa446 GKH |
3578 | { |
3579 | u8 EntryId = 0; | |
3580 | struct r8192_priv *priv = ieee80211_priv(dev); | |
881a975b | 3581 | const u8* MacAddr = priv->ieee80211->current_network.bssid; |
ecdfa446 | 3582 | |
881a975b | 3583 | static const u8 CAM_CONST_ADDR[4][6] = { |
ecdfa446 GKH |
3584 | {0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, |
3585 | {0x00, 0x00, 0x00, 0x00, 0x00, 0x01}, | |
3586 | {0x00, 0x00, 0x00, 0x00, 0x00, 0x02}, | |
3587 | {0x00, 0x00, 0x00, 0x00, 0x00, 0x03}}; | |
881a975b | 3588 | static const u8 CAM_CONST_BROAD[] = |
ecdfa446 GKH |
3589 | {0xff, 0xff, 0xff, 0xff, 0xff, 0xff}; |
3590 | ||
3591 | RT_TRACE(COMP_SEC, "CamRestoreAllEntry: \n"); | |
3592 | ||
3593 | ||
3594 | if ((priv->ieee80211->pairwise_key_type == KEY_TYPE_WEP40)|| | |
3595 | (priv->ieee80211->pairwise_key_type == KEY_TYPE_WEP104)) | |
3596 | { | |
3597 | ||
3598 | for(EntryId=0; EntryId<4; EntryId++) | |
3599 | { | |
3600 | { | |
3601 | MacAddr = CAM_CONST_ADDR[EntryId]; | |
3602 | setKey(dev, | |
3603 | EntryId , | |
3604 | EntryId, | |
3605 | priv->ieee80211->pairwise_key_type, | |
3606 | MacAddr, | |
3607 | 0, | |
3608 | NULL); | |
3609 | } | |
3610 | } | |
3611 | ||
3612 | } | |
3613 | else if(priv->ieee80211->pairwise_key_type == KEY_TYPE_TKIP) | |
3614 | { | |
3615 | ||
3616 | { | |
3617 | if(priv->ieee80211->iw_mode == IW_MODE_ADHOC) | |
3618 | setKey(dev, | |
3619 | 4, | |
3620 | 0, | |
3621 | priv->ieee80211->pairwise_key_type, | |
3622 | (u8*)dev->dev_addr, | |
3623 | 0, | |
3624 | NULL); | |
3625 | else | |
3626 | setKey(dev, | |
3627 | 4, | |
3628 | 0, | |
3629 | priv->ieee80211->pairwise_key_type, | |
3630 | MacAddr, | |
3631 | 0, | |
3632 | NULL); | |
3633 | } | |
3634 | } | |
3635 | else if(priv->ieee80211->pairwise_key_type == KEY_TYPE_CCMP) | |
3636 | { | |
3637 | ||
3638 | { | |
3639 | if(priv->ieee80211->iw_mode == IW_MODE_ADHOC) | |
3640 | setKey(dev, | |
3641 | 4, | |
3642 | 0, | |
3643 | priv->ieee80211->pairwise_key_type, | |
3644 | (u8*)dev->dev_addr, | |
3645 | 0, | |
3646 | NULL); | |
3647 | else | |
3648 | setKey(dev, | |
3649 | 4, | |
3650 | 0, | |
3651 | priv->ieee80211->pairwise_key_type, | |
3652 | MacAddr, | |
3653 | 0, | |
3654 | NULL); | |
3655 | } | |
3656 | } | |
3657 | ||
3658 | ||
3659 | ||
3660 | if(priv->ieee80211->group_key_type == KEY_TYPE_TKIP) | |
3661 | { | |
3662 | MacAddr = CAM_CONST_BROAD; | |
3663 | for(EntryId=1 ; EntryId<4 ; EntryId++) | |
3664 | { | |
3665 | { | |
3666 | setKey(dev, | |
3667 | EntryId, | |
3668 | EntryId, | |
3669 | priv->ieee80211->group_key_type, | |
3670 | MacAddr, | |
3671 | 0, | |
3672 | NULL); | |
3673 | } | |
3674 | } | |
3675 | if(priv->ieee80211->iw_mode == IW_MODE_ADHOC) | |
3676 | setKey(dev, | |
3677 | 0, | |
3678 | 0, | |
3679 | priv->ieee80211->group_key_type, | |
3680 | CAM_CONST_ADDR[0], | |
3681 | 0, | |
3682 | NULL); | |
3683 | } | |
3684 | else if(priv->ieee80211->group_key_type == KEY_TYPE_CCMP) | |
3685 | { | |
3686 | MacAddr = CAM_CONST_BROAD; | |
3687 | for(EntryId=1; EntryId<4 ; EntryId++) | |
3688 | { | |
3689 | { | |
3690 | setKey(dev, | |
3691 | EntryId , | |
3692 | EntryId, | |
3693 | priv->ieee80211->group_key_type, | |
3694 | MacAddr, | |
3695 | 0, | |
3696 | NULL); | |
3697 | } | |
3698 | } | |
3699 | ||
3700 | if(priv->ieee80211->iw_mode == IW_MODE_ADHOC) | |
3701 | setKey(dev, | |
3702 | 0 , | |
3703 | 0, | |
3704 | priv->ieee80211->group_key_type, | |
3705 | CAM_CONST_ADDR[0], | |
3706 | 0, | |
3707 | NULL); | |
3708 | } | |
3709 | } | |
3710 | ||
ecdfa446 GKH |
3711 | /* |
3712 | * This function is used to fix Tx/Rx stop bug temporarily. | |
3713 | * This function will do "system reset" to NIC when Tx or Rx is stuck. | |
3714 | * The method checking Tx/Rx stuck of this function is supported by FW, | |
3715 | * which reports Tx and Rx counter to register 0x128 and 0x130. | |
214985a6 | 3716 | */ |
5e1ad18a | 3717 | static void rtl819x_ifsilentreset(struct net_device *dev) |
ecdfa446 GKH |
3718 | { |
3719 | struct r8192_priv *priv = ieee80211_priv(dev); | |
3720 | u8 reset_times = 0; | |
3721 | int reset_status = 0; | |
3722 | struct ieee80211_device *ieee = priv->ieee80211; | |
3723 | ||
3724 | ||
65a43784 | 3725 | return; |
3726 | ||
ecdfa446 GKH |
3727 | // 2007.07.20. If we need to check CCK stop, please uncomment this line. |
3728 | //bStuck = Adapter->HalFunc.CheckHWStopHandler(Adapter); | |
3729 | ||
3730 | if(priv->ResetProgress==RESET_TYPE_NORESET) | |
3731 | { | |
3732 | RESET_START: | |
65a43784 | 3733 | #ifdef ENABLE_LPS |
3734 | //LZM for PS-Poll AID issue. 090429 | |
3735 | if(priv->ieee80211->state == IEEE80211_LINKED) | |
3736 | LeisurePSLeave(dev); | |
3737 | #endif | |
ecdfa446 GKH |
3738 | |
3739 | RT_TRACE(COMP_RESET,"=========>Reset progress!! \n"); | |
3740 | ||
3741 | // Set the variable for reset. | |
3742 | priv->ResetProgress = RESET_TYPE_SILENT; | |
3743 | // rtl8192_close(dev); | |
11aacc28 | 3744 | |
ecdfa446 GKH |
3745 | down(&priv->wx_sem); |
3746 | if(priv->up == 0) | |
3747 | { | |
3748 | RT_TRACE(COMP_ERR,"%s():the driver is not up! return\n",__FUNCTION__); | |
3749 | up(&priv->wx_sem); | |
3750 | return ; | |
3751 | } | |
3752 | priv->up = 0; | |
3753 | RT_TRACE(COMP_RESET,"%s():======>start to down the driver\n",__FUNCTION__); | |
3754 | if(!netif_queue_stopped(dev)) | |
3755 | netif_stop_queue(dev); | |
3756 | ||
3757 | dm_backup_dynamic_mechanism_state(dev); | |
3758 | ||
3759 | rtl8192_irq_disable(dev); | |
3760 | rtl8192_cancel_deferred_work(priv); | |
3761 | deinit_hal_dm(dev); | |
3762 | del_timer_sync(&priv->watch_dog_timer); | |
3763 | ieee->sync_scan_hurryup = 1; | |
3764 | if(ieee->state == IEEE80211_LINKED) | |
3765 | { | |
3766 | down(&ieee->wx_sem); | |
3767 | printk("ieee->state is IEEE80211_LINKED\n"); | |
3768 | ieee80211_stop_send_beacons(priv->ieee80211); | |
3769 | del_timer_sync(&ieee->associate_timer); | |
ecdfa446 | 3770 | cancel_delayed_work(&ieee->associate_retry_wq); |
ecdfa446 | 3771 | ieee80211_stop_scan(ieee); |
ecdfa446 GKH |
3772 | up(&ieee->wx_sem); |
3773 | } | |
3774 | else{ | |
3775 | printk("ieee->state is NOT LINKED\n"); | |
65a43784 | 3776 | ieee80211_softmac_stop_protocol(priv->ieee80211,true); |
ecdfa446 | 3777 | } |
65a43784 | 3778 | rtl8192_halt_adapter(dev, true); |
ecdfa446 GKH |
3779 | up(&priv->wx_sem); |
3780 | RT_TRACE(COMP_RESET,"%s():<==========down process is finished\n",__FUNCTION__); | |
3781 | RT_TRACE(COMP_RESET,"%s():===========>start to up the driver\n",__FUNCTION__); | |
3782 | reset_status = _rtl8192_up(dev); | |
3783 | ||
3784 | RT_TRACE(COMP_RESET,"%s():<===========up process is finished\n",__FUNCTION__); | |
3785 | if(reset_status == -1) | |
3786 | { | |
3787 | if(reset_times < 3) | |
3788 | { | |
3789 | reset_times++; | |
3790 | goto RESET_START; | |
3791 | } | |
3792 | else | |
3793 | { | |
3794 | RT_TRACE(COMP_ERR," ERR!!! %s(): Reset Failed!!\n",__FUNCTION__); | |
3795 | } | |
3796 | } | |
ecdfa446 | 3797 | ieee->is_silent_reset = 1; |
ecdfa446 | 3798 | EnableHWSecurityConfig8192(dev); |
ecdfa446 GKH |
3799 | if(ieee->state == IEEE80211_LINKED && ieee->iw_mode == IW_MODE_INFRA) |
3800 | { | |
3801 | ieee->set_chan(ieee->dev, ieee->current_network.channel); | |
3802 | ||
ecdfa446 | 3803 | queue_work(ieee->wq, &ieee->associate_complete_wq); |
ecdfa446 GKH |
3804 | |
3805 | } | |
3806 | else if(ieee->state == IEEE80211_LINKED && ieee->iw_mode == IW_MODE_ADHOC) | |
3807 | { | |
3808 | ieee->set_chan(ieee->dev, ieee->current_network.channel); | |
3809 | ieee->link_change(ieee->dev); | |
3810 | ||
3811 | // notify_wx_assoc_event(ieee); | |
3812 | ||
3813 | ieee80211_start_send_beacons(ieee); | |
3814 | ||
3815 | if (ieee->data_hard_resume) | |
3816 | ieee->data_hard_resume(ieee->dev); | |
3817 | netif_carrier_on(ieee->dev); | |
3818 | } | |
ecdfa446 GKH |
3819 | |
3820 | CamRestoreAllEntry(dev); | |
3821 | ||
3822 | // Restore the previous setting for all dynamic mechanism | |
3823 | dm_restore_dynamic_mechanism_state(dev); | |
3824 | ||
3825 | priv->ResetProgress = RESET_TYPE_NORESET; | |
3826 | priv->reset_count++; | |
3827 | ||
3828 | priv->bForcedSilentReset =false; | |
3829 | priv->bResetInProgress = false; | |
3830 | ||
3831 | // For test --> force write UFWP. | |
3832 | write_nic_byte(dev, UFWP, 1); | |
3833 | RT_TRACE(COMP_RESET, "Reset finished!! ====>[%d]\n", priv->reset_count); | |
ecdfa446 GKH |
3834 | } |
3835 | } | |
3836 | ||
3837 | #ifdef ENABLE_IPS | |
3838 | void InactivePsWorkItemCallback(struct net_device *dev) | |
3839 | { | |
3840 | struct r8192_priv *priv = ieee80211_priv(dev); | |
3841 | PRT_POWER_SAVE_CONTROL pPSC = (PRT_POWER_SAVE_CONTROL)(&(priv->ieee80211->PowerSaveControl)); | |
ecdfa446 GKH |
3842 | |
3843 | RT_TRACE(COMP_POWER, "InactivePsWorkItemCallback() ---------> \n"); | |
3844 | // | |
3845 | // This flag "bSwRfProcessing", indicates the status of IPS procedure, should be set if the IPS workitem | |
3846 | // is really scheduled. | |
3847 | // The old code, sets this flag before scheduling the IPS workitem and however, at the same time the | |
3848 | // previous IPS workitem did not end yet, fails to schedule the current workitem. Thus, bSwRfProcessing | |
3849 | // blocks the IPS procedure of switching RF. | |
3850 | // By Bruce, 2007-12-25. | |
3851 | // | |
3852 | pPSC->bSwRfProcessing = TRUE; | |
3853 | ||
207b58fb | 3854 | RT_TRACE(COMP_RF, "InactivePsWorkItemCallback(): Set RF to %s.\n", |
ecdfa446 GKH |
3855 | pPSC->eInactivePowerState == eRfOff?"OFF":"ON"); |
3856 | ||
3857 | ||
3858 | MgntActSet_RF_State(dev, pPSC->eInactivePowerState, RF_CHANGE_BY_IPS); | |
3859 | ||
3860 | // | |
3861 | // To solve CAM values miss in RF OFF, rewrite CAM values after RF ON. By Bruce, 2007-09-20. | |
3862 | // | |
ecdfa446 GKH |
3863 | pPSC->bSwRfProcessing = FALSE; |
3864 | RT_TRACE(COMP_POWER, "InactivePsWorkItemCallback() <--------- \n"); | |
3865 | } | |
3866 | ||
65a43784 | 3867 | #ifdef ENABLE_LPS |
214985a6 | 3868 | /* Change current and default preamble mode. */ |
65a43784 | 3869 | bool MgntActSet_802_11_PowerSaveMode(struct net_device *dev, u8 rtPsMode) |
3870 | { | |
3871 | struct r8192_priv *priv = ieee80211_priv(dev); | |
65a43784 | 3872 | |
3873 | // Currently, we do not change power save mode on IBSS mode. | |
3874 | if(priv->ieee80211->iw_mode == IW_MODE_ADHOC) | |
3875 | { | |
3876 | return false; | |
3877 | } | |
3878 | ||
3879 | // | |
3880 | // <RJ_NOTE> If we make HW to fill up the PwrMgt bit for us, | |
3881 | // some AP will not response to our mgnt frames with PwrMgt bit set, | |
3882 | // e.g. cannot associate the AP. | |
3883 | // So I commented out it. 2005.02.16, by rcnjko. | |
3884 | // | |
3885 | // // Change device's power save mode. | |
3886 | // Adapter->HalFunc.SetPSModeHandler( Adapter, rtPsMode ); | |
3887 | ||
3888 | // Update power save mode configured. | |
3889 | //RT_TRACE(COMP_LPS,"%s(): set ieee->ps = %x\n",__FUNCTION__,rtPsMode); | |
3890 | if(!priv->ps_force) { | |
3891 | priv->ieee80211->ps = rtPsMode; | |
3892 | } | |
3893 | ||
3894 | // Awake immediately | |
3895 | if(priv->ieee80211->sta_sleep != 0 && rtPsMode == IEEE80211_PS_DISABLED) | |
3896 | { | |
3897 | unsigned long flags; | |
3898 | ||
3899 | //PlatformSetTimer(Adapter, &(pMgntInfo->AwakeTimer), 0); | |
3900 | // Notify the AP we awke. | |
3901 | rtl8192_hw_wakeup(dev); | |
3902 | priv->ieee80211->sta_sleep = 0; | |
3903 | ||
3904 | spin_lock_irqsave(&(priv->ieee80211->mgmt_tx_lock), flags); | |
3905 | printk("LPS leave: notify AP we are awaked ++++++++++ SendNullFunctionData\n"); | |
3906 | ieee80211_sta_ps_send_null_frame(priv->ieee80211, 0); | |
3907 | spin_unlock_irqrestore(&(priv->ieee80211->mgmt_tx_lock), flags); | |
3908 | } | |
3909 | ||
3910 | return true; | |
3911 | } | |
3912 | ||
214985a6 | 3913 | /* Enter the leisure power save mode. */ |
65a43784 | 3914 | void LeisurePSEnter(struct net_device *dev) |
3915 | { | |
3916 | struct r8192_priv *priv = ieee80211_priv(dev); | |
3917 | PRT_POWER_SAVE_CONTROL pPSC = (PRT_POWER_SAVE_CONTROL)(&(priv->ieee80211->PowerSaveControl)); | |
3918 | ||
3919 | //RT_TRACE(COMP_PS, "LeisurePSEnter()...\n"); | |
3920 | //RT_TRACE(COMP_PS, "pPSC->bLeisurePs = %d, ieee->ps = %d,pPSC->LpsIdleCount is %d,RT_CHECK_FOR_HANG_PERIOD is %d\n", | |
3921 | // pPSC->bLeisurePs, priv->ieee80211->ps,pPSC->LpsIdleCount,RT_CHECK_FOR_HANG_PERIOD); | |
3922 | ||
3923 | if(!((priv->ieee80211->iw_mode == IW_MODE_INFRA) && | |
3924 | (priv->ieee80211->state == IEEE80211_LINKED)) || | |
3925 | (priv->ieee80211->iw_mode == IW_MODE_ADHOC) || | |
3926 | (priv->ieee80211->iw_mode == IW_MODE_MASTER)) | |
3927 | return; | |
3928 | ||
3929 | if (pPSC->bLeisurePs) | |
3930 | { | |
3931 | // Idle for a while if we connect to AP a while ago. | |
3932 | if(pPSC->LpsIdleCount >= RT_CHECK_FOR_HANG_PERIOD) // 4 Sec | |
3933 | { | |
3934 | ||
3935 | if(priv->ieee80211->ps == IEEE80211_PS_DISABLED) | |
3936 | { | |
3937 | ||
3938 | //RT_TRACE(COMP_LPS, "LeisurePSEnter(): Enter 802.11 power save mode...\n"); | |
3939 | MgntActSet_802_11_PowerSaveMode(dev, IEEE80211_PS_MBCAST|IEEE80211_PS_UNICAST); | |
3940 | ||
3941 | } | |
3942 | } | |
3943 | else | |
3944 | pPSC->LpsIdleCount++; | |
3945 | } | |
3946 | } | |
3947 | ||
3948 | ||
214985a6 | 3949 | /* Leave leisure power save mode. */ |
65a43784 | 3950 | void LeisurePSLeave(struct net_device *dev) |
3951 | { | |
3952 | struct r8192_priv *priv = ieee80211_priv(dev); | |
3953 | PRT_POWER_SAVE_CONTROL pPSC = (PRT_POWER_SAVE_CONTROL)(&(priv->ieee80211->PowerSaveControl)); | |
3954 | ||
65a43784 | 3955 | if (pPSC->bLeisurePs) |
3956 | { | |
3957 | if(priv->ieee80211->ps != IEEE80211_PS_DISABLED) | |
3958 | { | |
3959 | // move to lps_wakecomplete() | |
3960 | //RT_TRACE(COMP_LPS, "LeisurePSLeave(): Busy Traffic , Leave 802.11 power save..\n"); | |
3961 | MgntActSet_802_11_PowerSaveMode(dev, IEEE80211_PS_DISABLED); | |
3962 | ||
3963 | } | |
3964 | } | |
3965 | } | |
3966 | #endif | |
3967 | ||
3968 | ||
214985a6 | 3969 | /* Enter the inactive power save mode. RF will be off */ |
ecdfa446 GKH |
3970 | void |
3971 | IPSEnter(struct net_device *dev) | |
3972 | { | |
3973 | struct r8192_priv *priv = ieee80211_priv(dev); | |
3974 | PRT_POWER_SAVE_CONTROL pPSC = (PRT_POWER_SAVE_CONTROL)(&(priv->ieee80211->PowerSaveControl)); | |
3975 | RT_RF_POWER_STATE rtState; | |
3976 | ||
3977 | if (pPSC->bInactivePs) | |
3978 | { | |
3979 | rtState = priv->ieee80211->eRFPowerState; | |
3980 | // | |
3981 | // Added by Bruce, 2007-12-25. | |
3982 | // Do not enter IPS in the following conditions: | |
3983 | // (1) RF is already OFF or Sleep | |
3984 | // (2) bSwRfProcessing (indicates the IPS is still under going) | |
3985 | // (3) Connectted (only disconnected can trigger IPS) | |
3986 | // (4) IBSS (send Beacon) | |
3987 | // (5) AP mode (send Beacon) | |
3988 | // | |
3989 | if (rtState == eRfOn && !pPSC->bSwRfProcessing | |
3990 | && (priv->ieee80211->state != IEEE80211_LINKED) ) | |
3991 | { | |
3992 | RT_TRACE(COMP_RF,"IPSEnter(): Turn off RF.\n"); | |
3993 | pPSC->eInactivePowerState = eRfOff; | |
3994 | // queue_work(priv->priv_wq,&(pPSC->InactivePsWorkItem)); | |
3995 | InactivePsWorkItemCallback(dev); | |
3996 | } | |
3997 | } | |
3998 | } | |
3999 | ||
4000 | // | |
4001 | // Description: | |
4002 | // Leave the inactive power save mode, RF will be on. | |
4003 | // 2007.08.17, by shien chang. | |
4004 | // | |
4005 | void | |
4006 | IPSLeave(struct net_device *dev) | |
4007 | { | |
4008 | struct r8192_priv *priv = ieee80211_priv(dev); | |
4009 | PRT_POWER_SAVE_CONTROL pPSC = (PRT_POWER_SAVE_CONTROL)(&(priv->ieee80211->PowerSaveControl)); | |
4010 | RT_RF_POWER_STATE rtState; | |
4011 | ||
4012 | if (pPSC->bInactivePs) | |
4013 | { | |
4014 | rtState = priv->ieee80211->eRFPowerState; | |
4015 | if (rtState != eRfOn && !pPSC->bSwRfProcessing && priv->ieee80211->RfOffReason <= RF_CHANGE_BY_IPS) | |
4016 | { | |
4017 | RT_TRACE(COMP_POWER, "IPSLeave(): Turn on RF.\n"); | |
4018 | pPSC->eInactivePowerState = eRfOn; | |
4019 | // queue_work(priv->priv_wq,&(pPSC->InactivePsWorkItem)); | |
4020 | InactivePsWorkItemCallback(dev); | |
4021 | } | |
4022 | } | |
4023 | } | |
65a43784 | 4024 | |
4025 | void IPSLeave_wq(void *data) | |
4026 | { | |
4027 | struct ieee80211_device *ieee = container_of(data,struct ieee80211_device,ips_leave_wq); | |
4028 | struct net_device *dev = ieee->dev; | |
4029 | ||
4030 | struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev); | |
4031 | down(&priv->ieee80211->ips_sem); | |
4032 | IPSLeave(dev); | |
4033 | up(&priv->ieee80211->ips_sem); | |
4034 | } | |
4035 | ||
4036 | void ieee80211_ips_leave_wq(struct net_device *dev) | |
4037 | { | |
4038 | struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev); | |
4039 | RT_RF_POWER_STATE rtState; | |
4040 | rtState = priv->ieee80211->eRFPowerState; | |
4041 | ||
4042 | if(priv->ieee80211->PowerSaveControl.bInactivePs){ | |
4043 | if(rtState == eRfOff){ | |
4044 | if(priv->ieee80211->RfOffReason > RF_CHANGE_BY_IPS) | |
4045 | { | |
4046 | RT_TRACE(COMP_ERR, "%s(): RF is OFF.\n",__FUNCTION__); | |
4047 | return; | |
4048 | } | |
4049 | else{ | |
4050 | printk("=========>%s(): IPSLeave\n",__FUNCTION__); | |
4051 | queue_work(priv->ieee80211->wq,&priv->ieee80211->ips_leave_wq); | |
4052 | } | |
4053 | } | |
4054 | } | |
4055 | } | |
4056 | //added by amy 090331 end | |
4057 | void ieee80211_ips_leave(struct net_device *dev) | |
4058 | { | |
4059 | struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev); | |
4060 | down(&priv->ieee80211->ips_sem); | |
4061 | IPSLeave(dev); | |
4062 | up(&priv->ieee80211->ips_sem); | |
4063 | } | |
ecdfa446 | 4064 | #endif |
ecdfa446 | 4065 | |
5e1ad18a | 4066 | static void rtl819x_update_rxcounts( |
ecdfa446 GKH |
4067 | struct r8192_priv *priv, |
4068 | u32* TotalRxBcnNum, | |
4069 | u32* TotalRxDataNum | |
4070 | ) | |
4071 | { | |
4072 | u16 SlotIndex; | |
4073 | u8 i; | |
4074 | ||
4075 | *TotalRxBcnNum = 0; | |
4076 | *TotalRxDataNum = 0; | |
4077 | ||
4078 | SlotIndex = (priv->ieee80211->LinkDetectInfo.SlotIndex++)%(priv->ieee80211->LinkDetectInfo.SlotNum); | |
4079 | priv->ieee80211->LinkDetectInfo.RxBcnNum[SlotIndex] = priv->ieee80211->LinkDetectInfo.NumRecvBcnInPeriod; | |
4080 | priv->ieee80211->LinkDetectInfo.RxDataNum[SlotIndex] = priv->ieee80211->LinkDetectInfo.NumRecvDataInPeriod; | |
4081 | for( i=0; i<priv->ieee80211->LinkDetectInfo.SlotNum; i++ ){ | |
4082 | *TotalRxBcnNum += priv->ieee80211->LinkDetectInfo.RxBcnNum[i]; | |
4083 | *TotalRxDataNum += priv->ieee80211->LinkDetectInfo.RxDataNum[i]; | |
4084 | } | |
4085 | } | |
4086 | ||
4087 | ||
559fba5e | 4088 | static void rtl819x_watchdog_wqcallback(struct work_struct *work) |
ecdfa446 GKH |
4089 | { |
4090 | struct delayed_work *dwork = container_of(work,struct delayed_work,work); | |
4091 | struct r8192_priv *priv = container_of(dwork,struct r8192_priv,watch_dog_wq); | |
4092 | struct net_device *dev = priv->ieee80211->dev; | |
ecdfa446 GKH |
4093 | struct ieee80211_device* ieee = priv->ieee80211; |
4094 | RESET_TYPE ResetType = RESET_TYPE_NORESET; | |
ecdfa446 GKH |
4095 | unsigned long flags; |
4096 | bool bBusyTraffic = false; | |
65a43784 | 4097 | bool bEnterPS = false; |
4098 | ||
f500e256 | 4099 | if ((!priv->up) || priv->bHwRadioOff) |
65a43784 | 4100 | return; |
4101 | ||
ecdfa446 GKH |
4102 | if(!priv->up) |
4103 | return; | |
4104 | hal_dm_watchdog(dev); | |
4105 | #ifdef ENABLE_IPS | |
ecdfa446 | 4106 | if(ieee->actscanning == false){ |
207b58fb MM |
4107 | if((ieee->iw_mode == IW_MODE_INFRA) && (ieee->state == IEEE80211_NOLINK) && |
4108 | (ieee->eRFPowerState == eRfOn)&&!ieee->is_set_key && | |
65a43784 | 4109 | (!ieee->proto_stoppping) && !ieee->wx_set_enc){ |
ecdfa446 | 4110 | if(ieee->PowerSaveControl.ReturnPoint == IPS_CALLBACK_NONE){ |
ecdfa446 GKH |
4111 | IPSEnter(dev); |
4112 | //ieee80211_stop_scan(priv->ieee80211); | |
4113 | } | |
4114 | } | |
4115 | } | |
4116 | #endif | |
4117 | {//to get busy traffic condition | |
4118 | if(ieee->state == IEEE80211_LINKED) | |
4119 | { | |
65a43784 | 4120 | if( ieee->LinkDetectInfo.NumRxOkInPeriod> 100 || |
4121 | ieee->LinkDetectInfo.NumTxOkInPeriod> 100 ) { | |
ecdfa446 GKH |
4122 | bBusyTraffic = true; |
4123 | } | |
4124 | ||
65a43784 | 4125 | #ifdef ENABLE_LPS |
4126 | //added by amy for Leisure PS | |
4127 | if( ((ieee->LinkDetectInfo.NumRxUnicastOkInPeriod + ieee->LinkDetectInfo.NumTxOkInPeriod) > 8 ) || | |
4128 | (ieee->LinkDetectInfo.NumRxUnicastOkInPeriod > 2) ) | |
4129 | { | |
65a43784 | 4130 | bEnterPS= false; |
4131 | } | |
4132 | else | |
4133 | { | |
4134 | bEnterPS= true; | |
4135 | } | |
4136 | ||
65a43784 | 4137 | // LeisurePS only work in infra mode. |
4138 | if(bEnterPS) | |
4139 | { | |
4140 | LeisurePSEnter(dev); | |
4141 | } | |
4142 | else | |
4143 | { | |
4144 | LeisurePSLeave(dev); | |
4145 | } | |
4146 | #endif | |
4147 | ||
4148 | } | |
4149 | else | |
4150 | { | |
4151 | #ifdef ENABLE_LPS | |
4152 | //RT_TRACE(COMP_LPS,"====>no link LPS leave\n"); | |
4153 | LeisurePSLeave(dev); | |
4154 | #endif | |
ecdfa446 | 4155 | } |
65a43784 | 4156 | |
ecdfa446 GKH |
4157 | ieee->LinkDetectInfo.NumRxOkInPeriod = 0; |
4158 | ieee->LinkDetectInfo.NumTxOkInPeriod = 0; | |
65a43784 | 4159 | ieee->LinkDetectInfo.NumRxUnicastOkInPeriod = 0; |
ecdfa446 GKH |
4160 | ieee->LinkDetectInfo.bBusyTraffic = bBusyTraffic; |
4161 | } | |
4162 | ||
4163 | ||
4164 | //added by amy for AP roaming | |
4165 | if (1) | |
4166 | { | |
4167 | if(ieee->state == IEEE80211_LINKED && ieee->iw_mode == IW_MODE_INFRA) | |
4168 | { | |
4169 | u32 TotalRxBcnNum = 0; | |
4170 | u32 TotalRxDataNum = 0; | |
4171 | ||
4172 | rtl819x_update_rxcounts(priv, &TotalRxBcnNum, &TotalRxDataNum); | |
4173 | if((TotalRxBcnNum+TotalRxDataNum) == 0) | |
4174 | { | |
4175 | if( ieee->eRFPowerState == eRfOff) | |
4176 | RT_TRACE(COMP_ERR,"========>%s()\n",__FUNCTION__); | |
4177 | printk("===>%s(): AP is power off,connect another one\n",__FUNCTION__); | |
65a43784 | 4178 | // Dot11d_Reset(dev); |
ecdfa446 GKH |
4179 | ieee->state = IEEE80211_ASSOCIATING; |
4180 | notify_wx_assoc_event(priv->ieee80211); | |
65a43784 | 4181 | RemovePeerTS(priv->ieee80211,priv->ieee80211->current_network.bssid); |
ecdfa446 GKH |
4182 | ieee->is_roaming = true; |
4183 | ieee->is_set_key = false; | |
65a43784 | 4184 | ieee->link_change(dev); |
4185 | queue_work(ieee->wq, &ieee->associate_procedure_wq); | |
ecdfa446 GKH |
4186 | } |
4187 | } | |
4188 | ieee->LinkDetectInfo.NumRecvBcnInPeriod=0; | |
4189 | ieee->LinkDetectInfo.NumRecvDataInPeriod=0; | |
4190 | ||
4191 | } | |
ecdfa446 GKH |
4192 | //check if reset the driver |
4193 | spin_lock_irqsave(&priv->tx_lock,flags); | |
d5fdaa3a MM |
4194 | if (priv->watchdog_check_reset_cnt++ >= 3 && !ieee->is_roaming && |
4195 | priv->watchdog_last_time != 1) | |
ecdfa446 GKH |
4196 | { |
4197 | ResetType = rtl819x_ifcheck_resetornot(dev); | |
d5fdaa3a | 4198 | priv->watchdog_check_reset_cnt = 3; |
ecdfa446 GKH |
4199 | } |
4200 | spin_unlock_irqrestore(&priv->tx_lock,flags); | |
4201 | if(!priv->bDisableNormalResetCheck && ResetType == RESET_TYPE_NORMAL) | |
4202 | { | |
4203 | priv->ResetProgress = RESET_TYPE_NORMAL; | |
4204 | RT_TRACE(COMP_RESET,"%s(): NOMAL RESET\n",__FUNCTION__); | |
4205 | return; | |
4206 | } | |
4207 | /* disable silent reset temply 2008.9.11*/ | |
11aacc28 | 4208 | |
ecdfa446 GKH |
4209 | if( ((priv->force_reset) || (!priv->bDisableNormalResetCheck && ResetType==RESET_TYPE_SILENT))) // This is control by OID set in Pomelo |
4210 | { | |
d5fdaa3a | 4211 | priv->watchdog_last_time = 1; |
ecdfa446 GKH |
4212 | rtl819x_ifsilentreset(dev); |
4213 | } | |
4214 | else | |
d5fdaa3a | 4215 | priv->watchdog_last_time = 0; |
11aacc28 | 4216 | |
ecdfa446 GKH |
4217 | priv->force_reset = false; |
4218 | priv->bForcedSilentReset = false; | |
4219 | priv->bResetInProgress = false; | |
4220 | RT_TRACE(COMP_TRACE, " <==RtUsbCheckForHangWorkItemCallback()\n"); | |
4221 | ||
4222 | } | |
4223 | ||
4224 | void watch_dog_timer_callback(unsigned long data) | |
4225 | { | |
4226 | struct r8192_priv *priv = ieee80211_priv((struct net_device *) data); | |
ecdfa446 | 4227 | queue_delayed_work(priv->priv_wq,&priv->watch_dog_wq,0); |
ecdfa446 GKH |
4228 | mod_timer(&priv->watch_dog_timer, jiffies + MSECS(IEEE80211_WATCH_DOG_TIME)); |
4229 | ||
4230 | } | |
5b3b1a7b MM |
4231 | |
4232 | static int _rtl8192_up(struct net_device *dev) | |
ecdfa446 GKH |
4233 | { |
4234 | struct r8192_priv *priv = ieee80211_priv(dev); | |
4235 | //int i; | |
4236 | RT_STATUS init_status = RT_STATUS_SUCCESS; | |
4237 | priv->up=1; | |
4238 | priv->ieee80211->ieee_up=1; | |
65a43784 | 4239 | priv->bdisable_nic = false; //YJ,add,091111 |
ecdfa446 GKH |
4240 | RT_TRACE(COMP_INIT, "Bringing up iface"); |
4241 | ||
4242 | init_status = rtl8192_adapter_start(dev); | |
4243 | if(init_status != RT_STATUS_SUCCESS) | |
4244 | { | |
4245 | RT_TRACE(COMP_ERR,"ERR!!! %s(): initialization is failed!\n",__FUNCTION__); | |
4246 | return -1; | |
4247 | } | |
4248 | RT_TRACE(COMP_INIT, "start adapter finished\n"); | |
4249 | #ifdef RTL8192E | |
4250 | if(priv->ieee80211->eRFPowerState!=eRfOn) | |
4251 | MgntActSet_RF_State(dev, eRfOn, priv->ieee80211->RfOffReason); | |
4252 | #endif | |
4253 | if(priv->ieee80211->state != IEEE80211_LINKED) | |
4254 | ieee80211_softmac_start_protocol(priv->ieee80211); | |
4255 | ieee80211_reset_queue(priv->ieee80211); | |
4256 | watch_dog_timer_callback((unsigned long) dev); | |
4257 | if(!netif_queue_stopped(dev)) | |
4258 | netif_start_queue(dev); | |
4259 | else | |
4260 | netif_wake_queue(dev); | |
4261 | ||
4262 | return 0; | |
4263 | } | |
4264 | ||
4265 | ||
5e1ad18a | 4266 | static int rtl8192_open(struct net_device *dev) |
ecdfa446 GKH |
4267 | { |
4268 | struct r8192_priv *priv = ieee80211_priv(dev); | |
4269 | int ret; | |
4270 | ||
4271 | down(&priv->wx_sem); | |
4272 | ret = rtl8192_up(dev); | |
4273 | up(&priv->wx_sem); | |
4274 | return ret; | |
4275 | ||
4276 | } | |
4277 | ||
4278 | ||
4279 | int rtl8192_up(struct net_device *dev) | |
4280 | { | |
4281 | struct r8192_priv *priv = ieee80211_priv(dev); | |
4282 | ||
4283 | if (priv->up == 1) return -1; | |
4284 | ||
4285 | return _rtl8192_up(dev); | |
4286 | } | |
4287 | ||
4288 | ||
5e1ad18a | 4289 | static int rtl8192_close(struct net_device *dev) |
ecdfa446 GKH |
4290 | { |
4291 | struct r8192_priv *priv = ieee80211_priv(dev); | |
4292 | int ret; | |
4293 | ||
4294 | down(&priv->wx_sem); | |
4295 | ||
4296 | ret = rtl8192_down(dev); | |
4297 | ||
4298 | up(&priv->wx_sem); | |
4299 | ||
4300 | return ret; | |
4301 | ||
4302 | } | |
4303 | ||
4304 | int rtl8192_down(struct net_device *dev) | |
4305 | { | |
4306 | struct r8192_priv *priv = ieee80211_priv(dev); | |
16d74da0 | 4307 | |
ecdfa446 GKH |
4308 | if (priv->up == 0) return -1; |
4309 | ||
65a43784 | 4310 | #ifdef ENABLE_LPS |
4311 | //LZM for PS-Poll AID issue. 090429 | |
4312 | if(priv->ieee80211->state == IEEE80211_LINKED) | |
4313 | LeisurePSLeave(dev); | |
4314 | #endif | |
4315 | ||
ecdfa446 GKH |
4316 | priv->up=0; |
4317 | priv->ieee80211->ieee_up = 0; | |
4318 | RT_TRACE(COMP_DOWN, "==========>%s()\n", __FUNCTION__); | |
4319 | /* FIXME */ | |
4320 | if (!netif_queue_stopped(dev)) | |
4321 | netif_stop_queue(dev); | |
4322 | ||
4323 | rtl8192_irq_disable(dev); | |
ecdfa446 GKH |
4324 | rtl8192_cancel_deferred_work(priv); |
4325 | deinit_hal_dm(dev); | |
4326 | del_timer_sync(&priv->watch_dog_timer); | |
4327 | ||
65a43784 | 4328 | ieee80211_softmac_stop_protocol(priv->ieee80211,true); |
4329 | ||
4330 | rtl8192_halt_adapter(dev,false); | |
ecdfa446 GKH |
4331 | memset(&priv->ieee80211->current_network, 0 , offsetof(struct ieee80211_network, list)); |
4332 | ||
4333 | RT_TRACE(COMP_DOWN, "<==========%s()\n", __FUNCTION__); | |
4334 | ||
16d74da0 | 4335 | return 0; |
ecdfa446 GKH |
4336 | } |
4337 | ||
4338 | ||
4339 | void rtl8192_commit(struct net_device *dev) | |
4340 | { | |
4341 | struct r8192_priv *priv = ieee80211_priv(dev); | |
4342 | ||
4343 | if (priv->up == 0) return ; | |
4344 | ||
4345 | ||
65a43784 | 4346 | ieee80211_softmac_stop_protocol(priv->ieee80211,true); |
ecdfa446 GKH |
4347 | |
4348 | rtl8192_irq_disable(dev); | |
65a43784 | 4349 | rtl8192_halt_adapter(dev,true); |
ecdfa446 GKH |
4350 | _rtl8192_up(dev); |
4351 | } | |
4352 | ||
5b3b1a7b | 4353 | static void rtl8192_restart(struct work_struct *work) |
ecdfa446 GKH |
4354 | { |
4355 | struct r8192_priv *priv = container_of(work, struct r8192_priv, reset_wq); | |
4356 | struct net_device *dev = priv->ieee80211->dev; | |
ecdfa446 GKH |
4357 | |
4358 | down(&priv->wx_sem); | |
4359 | ||
4360 | rtl8192_commit(dev); | |
4361 | ||
4362 | up(&priv->wx_sem); | |
4363 | } | |
4364 | ||
4365 | static void r8192_set_multicast(struct net_device *dev) | |
4366 | { | |
4367 | struct r8192_priv *priv = ieee80211_priv(dev); | |
4368 | short promisc; | |
4369 | ||
4370 | //down(&priv->wx_sem); | |
4371 | ||
4372 | /* FIXME FIXME */ | |
4373 | ||
4374 | promisc = (dev->flags & IFF_PROMISC) ? 1:0; | |
4375 | ||
4376 | if (promisc != priv->promisc) { | |
4377 | ; | |
4378 | // rtl8192_commit(dev); | |
4379 | } | |
4380 | ||
4381 | priv->promisc = promisc; | |
4382 | ||
4383 | //schedule_work(&priv->reset_wq); | |
4384 | //up(&priv->wx_sem); | |
4385 | } | |
4386 | ||
4387 | ||
5e1ad18a | 4388 | static int r8192_set_mac_adr(struct net_device *dev, void *mac) |
ecdfa446 GKH |
4389 | { |
4390 | struct r8192_priv *priv = ieee80211_priv(dev); | |
4391 | struct sockaddr *addr = mac; | |
4392 | ||
4393 | down(&priv->wx_sem); | |
4394 | ||
4395 | memcpy(dev->dev_addr, addr->sa_data, ETH_ALEN); | |
4396 | ||
ecdfa446 | 4397 | schedule_work(&priv->reset_wq); |
ecdfa446 GKH |
4398 | up(&priv->wx_sem); |
4399 | ||
4400 | return 0; | |
4401 | } | |
4402 | ||
4403 | /* based on ipw2200 driver */ | |
5e1ad18a | 4404 | static int rtl8192_ioctl(struct net_device *dev, struct ifreq *rq, int cmd) |
ecdfa446 GKH |
4405 | { |
4406 | struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev); | |
4407 | struct iwreq *wrq = (struct iwreq *)rq; | |
4408 | int ret=-1; | |
4409 | struct ieee80211_device *ieee = priv->ieee80211; | |
4410 | u32 key[4]; | |
4411 | u8 broadcast_addr[6] = {0xff,0xff,0xff,0xff,0xff,0xff}; | |
4412 | struct iw_point *p = &wrq->u.data; | |
4413 | struct ieee_param *ipw = NULL;//(struct ieee_param *)wrq->u.data.pointer; | |
4414 | ||
4415 | down(&priv->wx_sem); | |
4416 | ||
4417 | ||
4418 | if (p->length < sizeof(struct ieee_param) || !p->pointer){ | |
4419 | ret = -EINVAL; | |
4420 | goto out; | |
4421 | } | |
4422 | ||
32414878 | 4423 | ipw = kmalloc(p->length, GFP_KERNEL); |
ecdfa446 GKH |
4424 | if (ipw == NULL){ |
4425 | ret = -ENOMEM; | |
4426 | goto out; | |
4427 | } | |
4428 | if (copy_from_user(ipw, p->pointer, p->length)) { | |
4429 | kfree(ipw); | |
4430 | ret = -EFAULT; | |
4431 | goto out; | |
4432 | } | |
4433 | ||
4434 | switch (cmd) { | |
4435 | case RTL_IOCTL_WPA_SUPPLICANT: | |
4436 | //parse here for HW security | |
4437 | if (ipw->cmd == IEEE_CMD_SET_ENCRYPTION) | |
4438 | { | |
4439 | if (ipw->u.crypt.set_tx) | |
4440 | { | |
4441 | if (strcmp(ipw->u.crypt.alg, "CCMP") == 0) | |
4442 | ieee->pairwise_key_type = KEY_TYPE_CCMP; | |
4443 | else if (strcmp(ipw->u.crypt.alg, "TKIP") == 0) | |
4444 | ieee->pairwise_key_type = KEY_TYPE_TKIP; | |
4445 | else if (strcmp(ipw->u.crypt.alg, "WEP") == 0) | |
4446 | { | |
4447 | if (ipw->u.crypt.key_len == 13) | |
4448 | ieee->pairwise_key_type = KEY_TYPE_WEP104; | |
4449 | else if (ipw->u.crypt.key_len == 5) | |
4450 | ieee->pairwise_key_type = KEY_TYPE_WEP40; | |
4451 | } | |
4452 | else | |
4453 | ieee->pairwise_key_type = KEY_TYPE_NA; | |
4454 | ||
4455 | if (ieee->pairwise_key_type) | |
4456 | { | |
4457 | memcpy((u8*)key, ipw->u.crypt.key, 16); | |
4458 | EnableHWSecurityConfig8192(dev); | |
4459 | //we fill both index entry and 4th entry for pairwise key as in IPW interface, adhoc will only get here, so we need index entry for its default key serching! | |
4460 | //added by WB. | |
4461 | setKey(dev, 4, ipw->u.crypt.idx, ieee->pairwise_key_type, (u8*)ieee->ap_mac_addr, 0, key); | |
4462 | if (ieee->auth_mode != 2) //LEAP WEP will never set this. | |
4463 | setKey(dev, ipw->u.crypt.idx, ipw->u.crypt.idx, ieee->pairwise_key_type, (u8*)ieee->ap_mac_addr, 0, key); | |
4464 | } | |
4465 | if ((ieee->pairwise_key_type == KEY_TYPE_CCMP) && ieee->pHTInfo->bCurrentHTSupport){ | |
4466 | write_nic_byte(dev, 0x173, 1); //fix aes bug | |
4467 | } | |
4468 | ||
4469 | } | |
4470 | else //if (ipw->u.crypt.idx) //group key use idx > 0 | |
4471 | { | |
4472 | memcpy((u8*)key, ipw->u.crypt.key, 16); | |
4473 | if (strcmp(ipw->u.crypt.alg, "CCMP") == 0) | |
4474 | ieee->group_key_type= KEY_TYPE_CCMP; | |
4475 | else if (strcmp(ipw->u.crypt.alg, "TKIP") == 0) | |
4476 | ieee->group_key_type = KEY_TYPE_TKIP; | |
4477 | else if (strcmp(ipw->u.crypt.alg, "WEP") == 0) | |
4478 | { | |
4479 | if (ipw->u.crypt.key_len == 13) | |
4480 | ieee->group_key_type = KEY_TYPE_WEP104; | |
4481 | else if (ipw->u.crypt.key_len == 5) | |
4482 | ieee->group_key_type = KEY_TYPE_WEP40; | |
4483 | } | |
4484 | else | |
4485 | ieee->group_key_type = KEY_TYPE_NA; | |
4486 | ||
4487 | if (ieee->group_key_type) | |
4488 | { | |
4489 | setKey( dev, | |
4490 | ipw->u.crypt.idx, | |
4491 | ipw->u.crypt.idx, //KeyIndex | |
4492 | ieee->group_key_type, //KeyType | |
4493 | broadcast_addr, //MacAddr | |
4494 | 0, //DefaultKey | |
4495 | key); //KeyContent | |
4496 | } | |
4497 | } | |
4498 | } | |
ecdfa446 GKH |
4499 | ret = ieee80211_wpa_supplicant_ioctl(priv->ieee80211, &wrq->u.data); |
4500 | break; | |
4501 | ||
4502 | default: | |
4503 | ret = -EOPNOTSUPP; | |
4504 | break; | |
4505 | } | |
4506 | ||
4507 | kfree(ipw); | |
4508 | out: | |
4509 | up(&priv->wx_sem); | |
4510 | ||
4511 | return ret; | |
4512 | } | |
4513 | ||
5e1ad18a | 4514 | static u8 HwRateToMRate90(bool bIsHT, u8 rate) |
ecdfa446 GKH |
4515 | { |
4516 | u8 ret_rate = 0x02; | |
4517 | ||
4518 | if(!bIsHT) { | |
4519 | switch(rate) { | |
4520 | case DESC90_RATE1M: ret_rate = MGN_1M; break; | |
4521 | case DESC90_RATE2M: ret_rate = MGN_2M; break; | |
4522 | case DESC90_RATE5_5M: ret_rate = MGN_5_5M; break; | |
4523 | case DESC90_RATE11M: ret_rate = MGN_11M; break; | |
4524 | case DESC90_RATE6M: ret_rate = MGN_6M; break; | |
4525 | case DESC90_RATE9M: ret_rate = MGN_9M; break; | |
4526 | case DESC90_RATE12M: ret_rate = MGN_12M; break; | |
4527 | case DESC90_RATE18M: ret_rate = MGN_18M; break; | |
4528 | case DESC90_RATE24M: ret_rate = MGN_24M; break; | |
4529 | case DESC90_RATE36M: ret_rate = MGN_36M; break; | |
4530 | case DESC90_RATE48M: ret_rate = MGN_48M; break; | |
4531 | case DESC90_RATE54M: ret_rate = MGN_54M; break; | |
4532 | ||
4533 | default: | |
4534 | RT_TRACE(COMP_RECV, "HwRateToMRate90(): Non supported Rate [%x], bIsHT = %d!!!\n", rate, bIsHT); | |
4535 | break; | |
4536 | } | |
4537 | ||
4538 | } else { | |
4539 | switch(rate) { | |
4540 | case DESC90_RATEMCS0: ret_rate = MGN_MCS0; break; | |
4541 | case DESC90_RATEMCS1: ret_rate = MGN_MCS1; break; | |
4542 | case DESC90_RATEMCS2: ret_rate = MGN_MCS2; break; | |
4543 | case DESC90_RATEMCS3: ret_rate = MGN_MCS3; break; | |
4544 | case DESC90_RATEMCS4: ret_rate = MGN_MCS4; break; | |
4545 | case DESC90_RATEMCS5: ret_rate = MGN_MCS5; break; | |
4546 | case DESC90_RATEMCS6: ret_rate = MGN_MCS6; break; | |
4547 | case DESC90_RATEMCS7: ret_rate = MGN_MCS7; break; | |
4548 | case DESC90_RATEMCS8: ret_rate = MGN_MCS8; break; | |
4549 | case DESC90_RATEMCS9: ret_rate = MGN_MCS9; break; | |
4550 | case DESC90_RATEMCS10: ret_rate = MGN_MCS10; break; | |
4551 | case DESC90_RATEMCS11: ret_rate = MGN_MCS11; break; | |
4552 | case DESC90_RATEMCS12: ret_rate = MGN_MCS12; break; | |
4553 | case DESC90_RATEMCS13: ret_rate = MGN_MCS13; break; | |
4554 | case DESC90_RATEMCS14: ret_rate = MGN_MCS14; break; | |
4555 | case DESC90_RATEMCS15: ret_rate = MGN_MCS15; break; | |
4556 | case DESC90_RATEMCS32: ret_rate = (0x80|0x20); break; | |
4557 | ||
4558 | default: | |
4559 | RT_TRACE(COMP_RECV, "HwRateToMRate90(): Non supported Rate [%x], bIsHT = %d!!!\n",rate, bIsHT); | |
4560 | break; | |
4561 | } | |
4562 | } | |
4563 | ||
4564 | return ret_rate; | |
4565 | } | |
4566 | ||
214985a6 | 4567 | /* Record the TSF time stamp when receiving a packet */ |
5e1ad18a | 4568 | static void UpdateRxPktTimeStamp8190 (struct net_device *dev, struct ieee80211_rx_stats *stats) |
ecdfa446 GKH |
4569 | { |
4570 | struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev); | |
4571 | ||
4572 | if(stats->bIsAMPDU && !stats->bFirstMPDU) { | |
4573 | stats->mac_time[0] = priv->LastRxDescTSFLow; | |
4574 | stats->mac_time[1] = priv->LastRxDescTSFHigh; | |
4575 | } else { | |
4576 | priv->LastRxDescTSFLow = stats->mac_time[0]; | |
4577 | priv->LastRxDescTSFHigh = stats->mac_time[1]; | |
4578 | } | |
4579 | } | |
4580 | ||
5e1ad18a | 4581 | static long rtl819x_translate_todbm(u8 signal_strength_index)// 0-100 index. |
ecdfa446 GKH |
4582 | { |
4583 | long signal_power; // in dBm. | |
4584 | ||
4585 | // Translate to dBm (x=0.5y-95). | |
4586 | signal_power = (long)((signal_strength_index + 1) >> 1); | |
4587 | signal_power -= 95; | |
4588 | ||
4589 | return signal_power; | |
4590 | } | |
4591 | ||
5e1ad18a | 4592 | static void |
ecdfa446 GKH |
4593 | rtl8190_process_cck_rxpathsel( |
4594 | struct r8192_priv * priv, | |
4595 | struct ieee80211_rx_stats * pprevious_stats | |
4596 | ) | |
4597 | { | |
4598 | #ifdef RTL8190P //Only 90P 2T4R need to check | |
4599 | char last_cck_adc_pwdb[4]={0,0,0,0}; | |
4600 | u8 i; | |
4601 | //cosa add for Rx path selection | |
4602 | if(priv->rf_type == RF_2T4R && DM_RxPathSelTable.Enable) | |
4603 | { | |
4604 | if(pprevious_stats->bIsCCK && | |
4605 | (pprevious_stats->bPacketToSelf ||pprevious_stats->bPacketBeacon)) | |
4606 | { | |
4607 | /* record the cck adc_pwdb to the sliding window. */ | |
4608 | if(priv->stats.cck_adc_pwdb.TotalNum++ >= PHY_RSSI_SLID_WIN_MAX) | |
4609 | { | |
4610 | priv->stats.cck_adc_pwdb.TotalNum = PHY_RSSI_SLID_WIN_MAX; | |
4611 | for(i=RF90_PATH_A; i<RF90_PATH_MAX; i++) | |
4612 | { | |
4613 | last_cck_adc_pwdb[i] = priv->stats.cck_adc_pwdb.elements[i][priv->stats.cck_adc_pwdb.index]; | |
4614 | priv->stats.cck_adc_pwdb.TotalVal[i] -= last_cck_adc_pwdb[i]; | |
4615 | } | |
4616 | } | |
4617 | for(i=RF90_PATH_A; i<RF90_PATH_MAX; i++) | |
4618 | { | |
4619 | priv->stats.cck_adc_pwdb.TotalVal[i] += pprevious_stats->cck_adc_pwdb[i]; | |
4620 | priv->stats.cck_adc_pwdb.elements[i][priv->stats.cck_adc_pwdb.index] = pprevious_stats->cck_adc_pwdb[i]; | |
4621 | } | |
4622 | priv->stats.cck_adc_pwdb.index++; | |
4623 | if(priv->stats.cck_adc_pwdb.index >= PHY_RSSI_SLID_WIN_MAX) | |
4624 | priv->stats.cck_adc_pwdb.index = 0; | |
4625 | ||
4626 | for(i=RF90_PATH_A; i<RF90_PATH_MAX; i++) | |
4627 | { | |
4628 | DM_RxPathSelTable.cck_pwdb_sta[i] = priv->stats.cck_adc_pwdb.TotalVal[i]/priv->stats.cck_adc_pwdb.TotalNum; | |
4629 | } | |
4630 | ||
4631 | for(i=RF90_PATH_A; i<RF90_PATH_MAX; i++) | |
4632 | { | |
4633 | if(pprevious_stats->cck_adc_pwdb[i] > (char)priv->undecorated_smoothed_cck_adc_pwdb[i]) | |
4634 | { | |
4635 | priv->undecorated_smoothed_cck_adc_pwdb[i] = | |
4636 | ( (priv->undecorated_smoothed_cck_adc_pwdb[i]*(Rx_Smooth_Factor-1)) + | |
4637 | (pprevious_stats->cck_adc_pwdb[i])) /(Rx_Smooth_Factor); | |
4638 | priv->undecorated_smoothed_cck_adc_pwdb[i] = priv->undecorated_smoothed_cck_adc_pwdb[i] + 1; | |
4639 | } | |
4640 | else | |
4641 | { | |
4642 | priv->undecorated_smoothed_cck_adc_pwdb[i] = | |
4643 | ( (priv->undecorated_smoothed_cck_adc_pwdb[i]*(Rx_Smooth_Factor-1)) + | |
4644 | (pprevious_stats->cck_adc_pwdb[i])) /(Rx_Smooth_Factor); | |
4645 | } | |
4646 | } | |
4647 | } | |
4648 | } | |
4649 | #endif | |
4650 | } | |
4651 | ||
4652 | ||
4653 | /* 2008/01/22 MH We can not delcare RSSI/EVM total value of sliding window to | |
4654 | be a local static. Otherwise, it may increase when we return from S3/S4. The | |
4655 | value will be kept in memory or disk. We must delcare the value in adapter | |
4656 | and it will be reinitialized when return from S3/S4. */ | |
5e1ad18a | 4657 | static void rtl8192_process_phyinfo(struct r8192_priv * priv, u8* buffer,struct ieee80211_rx_stats * pprevious_stats, struct ieee80211_rx_stats * pcurrent_stats) |
ecdfa446 GKH |
4658 | { |
4659 | bool bcheck = false; | |
4660 | u8 rfpath; | |
4661 | u32 nspatial_stream, tmp_val; | |
4662 | //u8 i; | |
4663 | static u32 slide_rssi_index=0, slide_rssi_statistics=0; | |
4664 | static u32 slide_evm_index=0, slide_evm_statistics=0; | |
4665 | static u32 last_rssi=0, last_evm=0; | |
4666 | //cosa add for rx path selection | |
4667 | // static long slide_cck_adc_pwdb_index=0, slide_cck_adc_pwdb_statistics=0; | |
4668 | // static char last_cck_adc_pwdb[4]={0,0,0,0}; | |
4669 | //cosa add for beacon rssi smoothing | |
4670 | static u32 slide_beacon_adc_pwdb_index=0, slide_beacon_adc_pwdb_statistics=0; | |
4671 | static u32 last_beacon_adc_pwdb=0; | |
4672 | ||
4673 | struct ieee80211_hdr_3addr *hdr; | |
4674 | u16 sc ; | |
4675 | unsigned int frag,seq; | |
4676 | hdr = (struct ieee80211_hdr_3addr *)buffer; | |
4677 | sc = le16_to_cpu(hdr->seq_ctl); | |
4678 | frag = WLAN_GET_SEQ_FRAG(sc); | |
4679 | seq = WLAN_GET_SEQ_SEQ(sc); | |
4680 | //cosa add 04292008 to record the sequence number | |
4681 | pcurrent_stats->Seq_Num = seq; | |
4682 | // | |
4683 | // Check whether we should take the previous packet into accounting | |
4684 | // | |
4685 | if(!pprevious_stats->bIsAMPDU) | |
4686 | { | |
4687 | // if previous packet is not aggregated packet | |
4688 | bcheck = true; | |
ecdfa446 GKH |
4689 | } |
4690 | ||
4691 | if(slide_rssi_statistics++ >= PHY_RSSI_SLID_WIN_MAX) | |
4692 | { | |
4693 | slide_rssi_statistics = PHY_RSSI_SLID_WIN_MAX; | |
4694 | last_rssi = priv->stats.slide_signal_strength[slide_rssi_index]; | |
4695 | priv->stats.slide_rssi_total -= last_rssi; | |
4696 | } | |
4697 | priv->stats.slide_rssi_total += pprevious_stats->SignalStrength; | |
4698 | ||
4699 | priv->stats.slide_signal_strength[slide_rssi_index++] = pprevious_stats->SignalStrength; | |
4700 | if(slide_rssi_index >= PHY_RSSI_SLID_WIN_MAX) | |
4701 | slide_rssi_index = 0; | |
4702 | ||
4703 | // <1> Showed on UI for user, in dbm | |
4704 | tmp_val = priv->stats.slide_rssi_total/slide_rssi_statistics; | |
4705 | priv->stats.signal_strength = rtl819x_translate_todbm((u8)tmp_val); | |
4706 | pcurrent_stats->rssi = priv->stats.signal_strength; | |
4707 | // | |
4708 | // If the previous packet does not match the criteria, neglect it | |
4709 | // | |
4710 | if(!pprevious_stats->bPacketMatchBSSID) | |
4711 | { | |
4712 | if(!pprevious_stats->bToSelfBA) | |
4713 | return; | |
4714 | } | |
4715 | ||
4716 | if(!bcheck) | |
4717 | return; | |
4718 | ||
4719 | rtl8190_process_cck_rxpathsel(priv,pprevious_stats); | |
4720 | ||
ecdfa446 GKH |
4721 | // <2> Showed on UI for engineering |
4722 | // hardware does not provide rssi information for each rf path in CCK | |
4723 | if(!pprevious_stats->bIsCCK && pprevious_stats->bPacketToSelf) | |
4724 | { | |
4725 | for (rfpath = RF90_PATH_A; rfpath < RF90_PATH_C; rfpath++) | |
4726 | { | |
4727 | if (!rtl8192_phy_CheckIsLegalRFPath(priv->ieee80211->dev, rfpath)) | |
4728 | continue; | |
4729 | RT_TRACE(COMP_DBG,"Jacken -> pPreviousstats->RxMIMOSignalStrength[rfpath] = %d \n" ,pprevious_stats->RxMIMOSignalStrength[rfpath] ); | |
4730 | //Fixed by Jacken 2008-03-20 | |
4731 | if(priv->stats.rx_rssi_percentage[rfpath] == 0) | |
4732 | { | |
4733 | priv->stats.rx_rssi_percentage[rfpath] = pprevious_stats->RxMIMOSignalStrength[rfpath]; | |
ecdfa446 GKH |
4734 | } |
4735 | if(pprevious_stats->RxMIMOSignalStrength[rfpath] > priv->stats.rx_rssi_percentage[rfpath]) | |
4736 | { | |
4737 | priv->stats.rx_rssi_percentage[rfpath] = | |
4738 | ( (priv->stats.rx_rssi_percentage[rfpath]*(Rx_Smooth_Factor-1)) + | |
4739 | (pprevious_stats->RxMIMOSignalStrength[rfpath])) /(Rx_Smooth_Factor); | |
4740 | priv->stats.rx_rssi_percentage[rfpath] = priv->stats.rx_rssi_percentage[rfpath] + 1; | |
4741 | } | |
4742 | else | |
4743 | { | |
4744 | priv->stats.rx_rssi_percentage[rfpath] = | |
4745 | ( (priv->stats.rx_rssi_percentage[rfpath]*(Rx_Smooth_Factor-1)) + | |
4746 | (pprevious_stats->RxMIMOSignalStrength[rfpath])) /(Rx_Smooth_Factor); | |
4747 | } | |
4748 | RT_TRACE(COMP_DBG,"Jacken -> priv->RxStats.RxRSSIPercentage[rfPath] = %d \n" ,priv->stats.rx_rssi_percentage[rfpath] ); | |
4749 | } | |
4750 | } | |
4751 | ||
4752 | ||
4753 | // | |
4754 | // Check PWDB. | |
4755 | // | |
4756 | //cosa add for beacon rssi smoothing by average. | |
4757 | if(pprevious_stats->bPacketBeacon) | |
4758 | { | |
4759 | /* record the beacon pwdb to the sliding window. */ | |
4760 | if(slide_beacon_adc_pwdb_statistics++ >= PHY_Beacon_RSSI_SLID_WIN_MAX) | |
4761 | { | |
4762 | slide_beacon_adc_pwdb_statistics = PHY_Beacon_RSSI_SLID_WIN_MAX; | |
4763 | last_beacon_adc_pwdb = priv->stats.Slide_Beacon_pwdb[slide_beacon_adc_pwdb_index]; | |
4764 | priv->stats.Slide_Beacon_Total -= last_beacon_adc_pwdb; | |
ecdfa446 GKH |
4765 | // slide_beacon_adc_pwdb_index, last_beacon_adc_pwdb, Adapter->RxStats.Slide_Beacon_Total); |
4766 | } | |
4767 | priv->stats.Slide_Beacon_Total += pprevious_stats->RxPWDBAll; | |
4768 | priv->stats.Slide_Beacon_pwdb[slide_beacon_adc_pwdb_index] = pprevious_stats->RxPWDBAll; | |
ecdfa446 GKH |
4769 | slide_beacon_adc_pwdb_index++; |
4770 | if(slide_beacon_adc_pwdb_index >= PHY_Beacon_RSSI_SLID_WIN_MAX) | |
4771 | slide_beacon_adc_pwdb_index = 0; | |
4772 | pprevious_stats->RxPWDBAll = priv->stats.Slide_Beacon_Total/slide_beacon_adc_pwdb_statistics; | |
4773 | if(pprevious_stats->RxPWDBAll >= 3) | |
4774 | pprevious_stats->RxPWDBAll -= 3; | |
4775 | } | |
4776 | ||
4777 | RT_TRACE(COMP_RXDESC, "Smooth %s PWDB = %d\n", | |
4778 | pprevious_stats->bIsCCK? "CCK": "OFDM", | |
4779 | pprevious_stats->RxPWDBAll); | |
4780 | ||
4781 | if(pprevious_stats->bPacketToSelf || pprevious_stats->bPacketBeacon || pprevious_stats->bToSelfBA) | |
4782 | { | |
4783 | if(priv->undecorated_smoothed_pwdb < 0) // initialize | |
4784 | { | |
4785 | priv->undecorated_smoothed_pwdb = pprevious_stats->RxPWDBAll; | |
ecdfa446 | 4786 | } |
11aacc28 | 4787 | |
ecdfa446 GKH |
4788 | if(pprevious_stats->RxPWDBAll > (u32)priv->undecorated_smoothed_pwdb) |
4789 | { | |
4790 | priv->undecorated_smoothed_pwdb = | |
4791 | ( ((priv->undecorated_smoothed_pwdb)*(Rx_Smooth_Factor-1)) + | |
4792 | (pprevious_stats->RxPWDBAll)) /(Rx_Smooth_Factor); | |
4793 | priv->undecorated_smoothed_pwdb = priv->undecorated_smoothed_pwdb + 1; | |
4794 | } | |
4795 | else | |
4796 | { | |
4797 | priv->undecorated_smoothed_pwdb = | |
4798 | ( ((priv->undecorated_smoothed_pwdb)*(Rx_Smooth_Factor-1)) + | |
4799 | (pprevious_stats->RxPWDBAll)) /(Rx_Smooth_Factor); | |
4800 | } | |
ecdfa446 GKH |
4801 | } |
4802 | ||
4803 | // | |
4804 | // Check EVM | |
4805 | // | |
4806 | /* record the general EVM to the sliding window. */ | |
4807 | if(pprevious_stats->SignalQuality == 0) | |
4808 | { | |
4809 | } | |
4810 | else | |
4811 | { | |
4812 | if(pprevious_stats->bPacketToSelf || pprevious_stats->bPacketBeacon || pprevious_stats->bToSelfBA){ | |
4813 | if(slide_evm_statistics++ >= PHY_RSSI_SLID_WIN_MAX){ | |
4814 | slide_evm_statistics = PHY_RSSI_SLID_WIN_MAX; | |
4815 | last_evm = priv->stats.slide_evm[slide_evm_index]; | |
4816 | priv->stats.slide_evm_total -= last_evm; | |
4817 | } | |
4818 | ||
4819 | priv->stats.slide_evm_total += pprevious_stats->SignalQuality; | |
4820 | ||
4821 | priv->stats.slide_evm[slide_evm_index++] = pprevious_stats->SignalQuality; | |
4822 | if(slide_evm_index >= PHY_RSSI_SLID_WIN_MAX) | |
4823 | slide_evm_index = 0; | |
4824 | ||
4825 | // <1> Showed on UI for user, in percentage. | |
4826 | tmp_val = priv->stats.slide_evm_total/slide_evm_statistics; | |
ecdfa446 | 4827 | //cosa add 10/11/2007, Showed on UI for user in Windows Vista, for Link quality. |
ecdfa446 GKH |
4828 | } |
4829 | ||
4830 | // <2> Showed on UI for engineering | |
4831 | if(pprevious_stats->bPacketToSelf || pprevious_stats->bPacketBeacon || pprevious_stats->bToSelfBA) | |
4832 | { | |
4833 | for(nspatial_stream = 0; nspatial_stream<2 ; nspatial_stream++) // 2 spatial stream | |
4834 | { | |
4835 | if(pprevious_stats->RxMIMOSignalQuality[nspatial_stream] != -1) | |
4836 | { | |
4837 | if(priv->stats.rx_evm_percentage[nspatial_stream] == 0) // initialize | |
4838 | { | |
4839 | priv->stats.rx_evm_percentage[nspatial_stream] = pprevious_stats->RxMIMOSignalQuality[nspatial_stream]; | |
4840 | } | |
4841 | priv->stats.rx_evm_percentage[nspatial_stream] = | |
4842 | ( (priv->stats.rx_evm_percentage[nspatial_stream]* (Rx_Smooth_Factor-1)) + | |
4843 | (pprevious_stats->RxMIMOSignalQuality[nspatial_stream]* 1)) / (Rx_Smooth_Factor); | |
4844 | } | |
4845 | } | |
4846 | } | |
4847 | } | |
4848 | ||
4849 | } | |
4850 | ||
ecdfa446 GKH |
4851 | static u8 rtl819x_query_rxpwrpercentage( |
4852 | char antpower | |
4853 | ) | |
4854 | { | |
4855 | if ((antpower <= -100) || (antpower >= 20)) | |
4856 | { | |
4857 | return 0; | |
4858 | } | |
4859 | else if (antpower >= 0) | |
4860 | { | |
4861 | return 100; | |
4862 | } | |
4863 | else | |
4864 | { | |
4865 | return (100+antpower); | |
4866 | } | |
4867 | ||
d5abdf72 | 4868 | } |
ecdfa446 GKH |
4869 | |
4870 | static u8 | |
4871 | rtl819x_evm_dbtopercentage( | |
4872 | char value | |
4873 | ) | |
4874 | { | |
4875 | char ret_val; | |
4876 | ||
4877 | ret_val = value; | |
4878 | ||
4879 | if(ret_val >= 0) | |
4880 | ret_val = 0; | |
4881 | if(ret_val <= -33) | |
4882 | ret_val = -33; | |
4883 | ret_val = 0 - ret_val; | |
4884 | ret_val*=3; | |
4885 | if(ret_val == 99) | |
4886 | ret_val = 100; | |
c6eae677 | 4887 | return ret_val; |
ecdfa446 GKH |
4888 | } |
4889 | ||
214985a6 | 4890 | /* We want good-looking for signal strength/quality */ |
5e1ad18a | 4891 | static long rtl819x_signal_scale_mapping(long currsig) |
ecdfa446 GKH |
4892 | { |
4893 | long retsig; | |
4894 | ||
4895 | // Step 1. Scale mapping. | |
4896 | if(currsig >= 61 && currsig <= 100) | |
4897 | { | |
4898 | retsig = 90 + ((currsig - 60) / 4); | |
4899 | } | |
4900 | else if(currsig >= 41 && currsig <= 60) | |
4901 | { | |
4902 | retsig = 78 + ((currsig - 40) / 2); | |
4903 | } | |
4904 | else if(currsig >= 31 && currsig <= 40) | |
4905 | { | |
4906 | retsig = 66 + (currsig - 30); | |
4907 | } | |
4908 | else if(currsig >= 21 && currsig <= 30) | |
4909 | { | |
4910 | retsig = 54 + (currsig - 20); | |
4911 | } | |
4912 | else if(currsig >= 5 && currsig <= 20) | |
4913 | { | |
4914 | retsig = 42 + (((currsig - 5) * 2) / 3); | |
4915 | } | |
4916 | else if(currsig == 4) | |
4917 | { | |
4918 | retsig = 36; | |
4919 | } | |
4920 | else if(currsig == 3) | |
4921 | { | |
4922 | retsig = 27; | |
4923 | } | |
4924 | else if(currsig == 2) | |
4925 | { | |
4926 | retsig = 18; | |
4927 | } | |
4928 | else if(currsig == 1) | |
4929 | { | |
4930 | retsig = 9; | |
4931 | } | |
4932 | else | |
4933 | { | |
4934 | retsig = currsig; | |
4935 | } | |
4936 | ||
4937 | return retsig; | |
4938 | } | |
4939 | ||
4940 | static void rtl8192_query_rxphystatus( | |
4941 | struct r8192_priv * priv, | |
4942 | struct ieee80211_rx_stats * pstats, | |
4943 | prx_desc_819x_pci pdesc, | |
4944 | prx_fwinfo_819x_pci pdrvinfo, | |
4945 | struct ieee80211_rx_stats * precord_stats, | |
4946 | bool bpacket_match_bssid, | |
4947 | bool bpacket_toself, | |
4948 | bool bPacketBeacon, | |
4949 | bool bToSelfBA | |
4950 | ) | |
4951 | { | |
4952 | //PRT_RFD_STATUS pRtRfdStatus = &(pRfd->Status); | |
4953 | phy_sts_ofdm_819xpci_t* pofdm_buf; | |
4954 | phy_sts_cck_819xpci_t * pcck_buf; | |
4955 | phy_ofdm_rx_status_rxsc_sgien_exintfflag* prxsc; | |
4956 | u8 *prxpkt; | |
4957 | u8 i,max_spatial_stream, tmp_rxsnr, tmp_rxevm, rxsc_sgien_exflg; | |
4958 | char rx_pwr[4], rx_pwr_all=0; | |
4959 | //long rx_avg_pwr = 0; | |
4960 | char rx_snrX, rx_evmX; | |
4961 | u8 evm, pwdb_all; | |
4962 | u32 RSSI, total_rssi=0;//, total_evm=0; | |
4963 | // long signal_strength_index = 0; | |
4964 | u8 is_cck_rate=0; | |
4965 | u8 rf_rx_num = 0; | |
4966 | ||
ecdfa446 GKH |
4967 | is_cck_rate = rx_hal_is_cck_rate(pdrvinfo); |
4968 | ||
4969 | // Record it for next packet processing | |
4970 | memset(precord_stats, 0, sizeof(struct ieee80211_rx_stats)); | |
4971 | pstats->bPacketMatchBSSID = precord_stats->bPacketMatchBSSID = bpacket_match_bssid; | |
4972 | pstats->bPacketToSelf = precord_stats->bPacketToSelf = bpacket_toself; | |
4973 | pstats->bIsCCK = precord_stats->bIsCCK = is_cck_rate;//RX_HAL_IS_CCK_RATE(pDrvInfo); | |
4974 | pstats->bPacketBeacon = precord_stats->bPacketBeacon = bPacketBeacon; | |
4975 | pstats->bToSelfBA = precord_stats->bToSelfBA = bToSelfBA; | |
4976 | /*2007.08.30 requested by SD3 Jerry */ | |
d163f324 | 4977 | if (priv->phy_check_reg824 == 0) |
ecdfa446 | 4978 | { |
d163f324 MM |
4979 | priv->phy_reg824_bit9 = rtl8192_QueryBBReg(priv->ieee80211->dev, rFPGA0_XA_HSSIParameter2, 0x200); |
4980 | priv->phy_check_reg824 = 1; | |
ecdfa446 GKH |
4981 | } |
4982 | ||
4983 | ||
4984 | prxpkt = (u8*)pdrvinfo; | |
4985 | ||
4986 | /* Move pointer to the 16th bytes. Phy status start address. */ | |
4987 | prxpkt += sizeof(rx_fwinfo_819x_pci); | |
4988 | ||
4989 | /* Initial the cck and ofdm buffer pointer */ | |
4990 | pcck_buf = (phy_sts_cck_819xpci_t *)prxpkt; | |
4991 | pofdm_buf = (phy_sts_ofdm_819xpci_t *)prxpkt; | |
4992 | ||
4993 | pstats->RxMIMOSignalQuality[0] = -1; | |
4994 | pstats->RxMIMOSignalQuality[1] = -1; | |
4995 | precord_stats->RxMIMOSignalQuality[0] = -1; | |
4996 | precord_stats->RxMIMOSignalQuality[1] = -1; | |
4997 | ||
4998 | if(is_cck_rate) | |
4999 | { | |
5000 | // | |
5001 | // (1)Hardware does not provide RSSI for CCK | |
5002 | // | |
5003 | ||
5004 | // | |
5005 | // (2)PWDB, Average PWDB cacluated by hardware (for rate adaptive) | |
5006 | // | |
5007 | u8 report;//, cck_agc_rpt; | |
5008 | #ifdef RTL8190P | |
5009 | u8 tmp_pwdb; | |
5010 | char cck_adc_pwdb[4]; | |
5011 | #endif | |
ecdfa446 GKH |
5012 | |
5013 | #ifdef RTL8190P //Only 90P 2T4R need to check | |
5014 | if(priv->rf_type == RF_2T4R && DM_RxPathSelTable.Enable && bpacket_match_bssid) | |
5015 | { | |
5016 | for(i=RF90_PATH_A; i<RF90_PATH_MAX; i++) | |
5017 | { | |
5018 | tmp_pwdb = pcck_buf->adc_pwdb_X[i]; | |
5019 | cck_adc_pwdb[i] = (char)tmp_pwdb; | |
5020 | cck_adc_pwdb[i] /= 2; | |
5021 | pstats->cck_adc_pwdb[i] = precord_stats->cck_adc_pwdb[i] = cck_adc_pwdb[i]; | |
ecdfa446 GKH |
5022 | } |
5023 | } | |
5024 | #endif | |
5025 | ||
d163f324 | 5026 | if (!priv->phy_reg824_bit9) |
ecdfa446 GKH |
5027 | { |
5028 | report = pcck_buf->cck_agc_rpt & 0xc0; | |
5029 | report = report>>6; | |
5030 | switch(report) | |
5031 | { | |
5032 | //Fixed by Jacken from Bryant 2008-03-20 | |
5033 | //Original value is -38 , -26 , -14 , -2 | |
5034 | //Fixed value is -35 , -23 , -11 , 6 | |
5035 | case 0x3: | |
5036 | rx_pwr_all = -35 - (pcck_buf->cck_agc_rpt & 0x3e); | |
5037 | break; | |
5038 | case 0x2: | |
5039 | rx_pwr_all = -23 - (pcck_buf->cck_agc_rpt & 0x3e); | |
5040 | break; | |
5041 | case 0x1: | |
5042 | rx_pwr_all = -11 - (pcck_buf->cck_agc_rpt & 0x3e); | |
5043 | break; | |
5044 | case 0x0: | |
5045 | rx_pwr_all = 8 - (pcck_buf->cck_agc_rpt & 0x3e); | |
5046 | break; | |
5047 | } | |
5048 | } | |
5049 | else | |
5050 | { | |
5051 | report = pcck_buf->cck_agc_rpt & 0x60; | |
5052 | report = report>>5; | |
5053 | switch(report) | |
5054 | { | |
5055 | case 0x3: | |
5056 | rx_pwr_all = -35 - ((pcck_buf->cck_agc_rpt & 0x1f)<<1) ; | |
5057 | break; | |
5058 | case 0x2: | |
5059 | rx_pwr_all = -23 - ((pcck_buf->cck_agc_rpt & 0x1f)<<1); | |
5060 | break; | |
5061 | case 0x1: | |
5062 | rx_pwr_all = -11 - ((pcck_buf->cck_agc_rpt & 0x1f)<<1) ; | |
5063 | break; | |
5064 | case 0x0: | |
5065 | rx_pwr_all = -8 - ((pcck_buf->cck_agc_rpt & 0x1f)<<1) ; | |
5066 | break; | |
5067 | } | |
5068 | } | |
5069 | ||
5070 | pwdb_all = rtl819x_query_rxpwrpercentage(rx_pwr_all); | |
5071 | pstats->RxPWDBAll = precord_stats->RxPWDBAll = pwdb_all; | |
5072 | pstats->RecvSignalPower = rx_pwr_all; | |
5073 | ||
5074 | // | |
5075 | // (3) Get Signal Quality (EVM) | |
5076 | // | |
5077 | if(bpacket_match_bssid) | |
5078 | { | |
5079 | u8 sq; | |
5080 | ||
5081 | if(pstats->RxPWDBAll > 40) | |
5082 | { | |
5083 | sq = 100; | |
5084 | }else | |
5085 | { | |
5086 | sq = pcck_buf->sq_rpt; | |
5087 | ||
5088 | if(pcck_buf->sq_rpt > 64) | |
5089 | sq = 0; | |
5090 | else if (pcck_buf->sq_rpt < 20) | |
5091 | sq = 100; | |
5092 | else | |
5093 | sq = ((64-sq) * 100) / 44; | |
5094 | } | |
5095 | pstats->SignalQuality = precord_stats->SignalQuality = sq; | |
5096 | pstats->RxMIMOSignalQuality[0] = precord_stats->RxMIMOSignalQuality[0] = sq; | |
5097 | pstats->RxMIMOSignalQuality[1] = precord_stats->RxMIMOSignalQuality[1] = -1; | |
5098 | } | |
5099 | } | |
5100 | else | |
5101 | { | |
ecdfa446 GKH |
5102 | // |
5103 | // (1)Get RSSI for HT rate | |
5104 | // | |
5105 | for(i=RF90_PATH_A; i<RF90_PATH_MAX; i++) | |
5106 | { | |
5107 | // 2008/01/30 MH we will judge RF RX path now. | |
5108 | if (priv->brfpath_rxenable[i]) | |
5109 | rf_rx_num++; | |
5110 | //else | |
5111 | //continue; | |
5112 | ||
5113 | //Fixed by Jacken from Bryant 2008-03-20 | |
5114 | //Original value is 106 | |
5115 | #ifdef RTL8190P //Modify by Jacken 2008/03/31 | |
5116 | rx_pwr[i] = ((pofdm_buf->trsw_gain_X[i]&0x3F)*2) - 106; | |
5117 | #else | |
5118 | rx_pwr[i] = ((pofdm_buf->trsw_gain_X[i]&0x3F)*2) - 110; | |
5119 | #endif | |
5120 | ||
5121 | //Get Rx snr value in DB | |
5122 | tmp_rxsnr = pofdm_buf->rxsnr_X[i]; | |
5123 | rx_snrX = (char)(tmp_rxsnr); | |
5124 | rx_snrX /= 2; | |
ecdfa446 GKH |
5125 | |
5126 | /* Translate DBM to percentage. */ | |
5127 | RSSI = rtl819x_query_rxpwrpercentage(rx_pwr[i]); | |
5128 | if (priv->brfpath_rxenable[i]) | |
5129 | total_rssi += RSSI; | |
5130 | ||
5131 | /* Record Signal Strength for next packet */ | |
5132 | if(bpacket_match_bssid) | |
5133 | { | |
5134 | pstats->RxMIMOSignalStrength[i] =(u8) RSSI; | |
5135 | precord_stats->RxMIMOSignalStrength[i] =(u8) RSSI; | |
5136 | } | |
5137 | } | |
5138 | ||
5139 | ||
5140 | // | |
5141 | // (2)PWDB, Average PWDB cacluated by hardware (for rate adaptive) | |
5142 | // | |
5143 | //Fixed by Jacken from Bryant 2008-03-20 | |
5144 | //Original value is 106 | |
5145 | rx_pwr_all = (((pofdm_buf->pwdb_all ) >> 1 )& 0x7f) -106; | |
5146 | pwdb_all = rtl819x_query_rxpwrpercentage(rx_pwr_all); | |
5147 | ||
5148 | pstats->RxPWDBAll = precord_stats->RxPWDBAll = pwdb_all; | |
5149 | pstats->RxPower = precord_stats->RxPower = rx_pwr_all; | |
5150 | pstats->RecvSignalPower = rx_pwr_all; | |
5151 | // | |
5152 | // (3)EVM of HT rate | |
5153 | // | |
5154 | if(pdrvinfo->RxHT && pdrvinfo->RxRate>=DESC90_RATEMCS8 && | |
5155 | pdrvinfo->RxRate<=DESC90_RATEMCS15) | |
5156 | max_spatial_stream = 2; //both spatial stream make sense | |
5157 | else | |
5158 | max_spatial_stream = 1; //only spatial stream 1 makes sense | |
5159 | ||
5160 | for(i=0; i<max_spatial_stream; i++) | |
5161 | { | |
5162 | tmp_rxevm = pofdm_buf->rxevm_X[i]; | |
5163 | rx_evmX = (char)(tmp_rxevm); | |
5164 | ||
5165 | // Do not use shift operation like "rx_evmX >>= 1" because the compilor of free build environment | |
5166 | // fill most significant bit to "zero" when doing shifting operation which may change a negative | |
5167 | // value to positive one, then the dbm value (which is supposed to be negative) is not correct anymore. | |
5168 | rx_evmX /= 2; //dbm | |
5169 | ||
5170 | evm = rtl819x_evm_dbtopercentage(rx_evmX); | |
ecdfa446 GKH |
5171 | if(bpacket_match_bssid) |
5172 | { | |
5173 | if(i==0) // Fill value in RFD, Get the first spatial stream only | |
5174 | pstats->SignalQuality = precord_stats->SignalQuality = (u8)(evm & 0xff); | |
5175 | pstats->RxMIMOSignalQuality[i] = precord_stats->RxMIMOSignalQuality[i] = (u8)(evm & 0xff); | |
5176 | } | |
5177 | } | |
5178 | ||
5179 | ||
5180 | /* record rx statistics for debug */ | |
5181 | rxsc_sgien_exflg = pofdm_buf->rxsc_sgien_exflg; | |
5182 | prxsc = (phy_ofdm_rx_status_rxsc_sgien_exintfflag *)&rxsc_sgien_exflg; | |
ecdfa446 GKH |
5183 | } |
5184 | ||
5185 | //UI BSS List signal strength(in percentage), make it good looking, from 0~100. | |
5186 | //It is assigned to the BSS List in GetValueFromBeaconOrProbeRsp(). | |
5187 | if(is_cck_rate) | |
5188 | { | |
5189 | pstats->SignalStrength = precord_stats->SignalStrength = (u8)(rtl819x_signal_scale_mapping((long)pwdb_all));//PWDB_ALL; | |
5190 | ||
5191 | } | |
5192 | else | |
5193 | { | |
5194 | //pRfd->Status.SignalStrength = pRecordRfd->Status.SignalStrength = (u1Byte)(SignalScaleMapping(total_rssi/=RF90_PATH_MAX));//(u1Byte)(total_rssi/=RF90_PATH_MAX); | |
5195 | // We can judge RX path number now. | |
5196 | if (rf_rx_num != 0) | |
5197 | pstats->SignalStrength = precord_stats->SignalStrength = (u8)(rtl819x_signal_scale_mapping((long)(total_rssi/=rf_rx_num))); | |
5198 | } | |
d5abdf72 | 5199 | } |
ecdfa446 | 5200 | |
5e1ad18a | 5201 | static void |
ecdfa446 GKH |
5202 | rtl8192_record_rxdesc_forlateruse( |
5203 | struct ieee80211_rx_stats * psrc_stats, | |
5204 | struct ieee80211_rx_stats * ptarget_stats | |
5205 | ) | |
5206 | { | |
5207 | ptarget_stats->bIsAMPDU = psrc_stats->bIsAMPDU; | |
5208 | ptarget_stats->bFirstMPDU = psrc_stats->bFirstMPDU; | |
5209 | //ptarget_stats->Seq_Num = psrc_stats->Seq_Num; | |
5210 | } | |
5211 | ||
5212 | ||
5213 | ||
5e1ad18a | 5214 | static void TranslateRxSignalStuff819xpci(struct net_device *dev, |
ecdfa446 GKH |
5215 | struct sk_buff *skb, |
5216 | struct ieee80211_rx_stats * pstats, | |
5217 | prx_desc_819x_pci pdesc, | |
5218 | prx_fwinfo_819x_pci pdrvinfo) | |
5219 | { | |
5220 | // TODO: We must only check packet for current MAC address. Not finish | |
5221 | struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev); | |
5222 | bool bpacket_match_bssid, bpacket_toself; | |
5223 | bool bPacketBeacon=false, bToSelfBA=false; | |
ecdfa446 GKH |
5224 | struct ieee80211_hdr_3addr *hdr; |
5225 | u16 fc,type; | |
5226 | ||
5227 | // Get Signal Quality for only RX data queue (but not command queue) | |
5228 | ||
5229 | u8* tmp_buf; | |
5230 | u8 *praddr; | |
5231 | ||
5232 | /* Get MAC frame start address. */ | |
5233 | tmp_buf = skb->data; | |
5234 | ||
5235 | hdr = (struct ieee80211_hdr_3addr *)tmp_buf; | |
5236 | fc = le16_to_cpu(hdr->frame_ctl); | |
5237 | type = WLAN_FC_GET_TYPE(fc); | |
5238 | praddr = hdr->addr1; | |
5239 | ||
5240 | /* Check if the received packet is acceptabe. */ | |
5241 | bpacket_match_bssid = ((IEEE80211_FTYPE_CTL != type) && | |
03996954 | 5242 | (!compare_ether_addr(priv->ieee80211->current_network.bssid, (fc & IEEE80211_FCTL_TODS)? hdr->addr1 : (fc & IEEE80211_FCTL_FROMDS )? hdr->addr2 : hdr->addr3)) |
ecdfa446 | 5243 | && (!pstats->bHwError) && (!pstats->bCRC)&& (!pstats->bICV)); |
03996954 | 5244 | bpacket_toself = bpacket_match_bssid & (!compare_ether_addr(praddr, priv->ieee80211->dev->dev_addr)); |
11aacc28 | 5245 | |
ecdfa446 GKH |
5246 | if(WLAN_FC_GET_FRAMETYPE(fc)== IEEE80211_STYPE_BEACON) |
5247 | { | |
5248 | bPacketBeacon = true; | |
ecdfa446 GKH |
5249 | } |
5250 | if(WLAN_FC_GET_FRAMETYPE(fc) == IEEE80211_STYPE_BLOCKACK) | |
5251 | { | |
03996954 | 5252 | if((!compare_ether_addr(praddr,dev->dev_addr))) |
ecdfa446 | 5253 | bToSelfBA = true; |
ecdfa446 GKH |
5254 | } |
5255 | ||
ecdfa446 GKH |
5256 | // |
5257 | // Process PHY information for previous packet (RSSI/PWDB/EVM) | |
5258 | // | |
5259 | // Because phy information is contained in the last packet of AMPDU only, so driver | |
5260 | // should process phy information of previous packet | |
83184e69 MM |
5261 | rtl8192_process_phyinfo(priv, tmp_buf, &priv->previous_stats, pstats); |
5262 | rtl8192_query_rxphystatus(priv, pstats, pdesc, pdrvinfo, &priv->previous_stats, bpacket_match_bssid, | |
ecdfa446 | 5263 | bpacket_toself ,bPacketBeacon, bToSelfBA); |
83184e69 | 5264 | rtl8192_record_rxdesc_forlateruse(pstats, &priv->previous_stats); |
ecdfa446 GKH |
5265 | |
5266 | } | |
5267 | ||
5268 | ||
5e1ad18a | 5269 | static void rtl8192_tx_resume(struct net_device *dev) |
ecdfa446 GKH |
5270 | { |
5271 | struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev); | |
5272 | struct ieee80211_device *ieee = priv->ieee80211; | |
5273 | struct sk_buff *skb; | |
5274 | int queue_index; | |
5275 | ||
5276 | for(queue_index = BK_QUEUE; queue_index < TXCMD_QUEUE;queue_index++) { | |
5277 | while((!skb_queue_empty(&ieee->skb_waitQ[queue_index]))&& | |
5278 | (priv->ieee80211->check_nic_enough_desc(dev,queue_index) > 0)) { | |
5279 | /* 1. dequeue the packet from the wait queue */ | |
5280 | skb = skb_dequeue(&ieee->skb_waitQ[queue_index]); | |
5281 | /* 2. tx the packet directly */ | |
5282 | ieee->softmac_data_hard_start_xmit(skb,dev,0/* rate useless now*/); | |
ecdfa446 GKH |
5283 | } |
5284 | } | |
5285 | } | |
5286 | ||
559fba5e | 5287 | static void rtl8192_irq_tx_tasklet(struct r8192_priv *priv) |
ecdfa446 GKH |
5288 | { |
5289 | rtl8192_tx_resume(priv->ieee80211->dev); | |
5290 | } | |
5291 | ||
214985a6 | 5292 | /* Record the received data rate */ |
5e1ad18a | 5293 | static void UpdateReceivedRateHistogramStatistics8190( |
ecdfa446 GKH |
5294 | struct net_device *dev, |
5295 | struct ieee80211_rx_stats* pstats | |
5296 | ) | |
5297 | { | |
5298 | struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev); | |
5299 | u32 rcvType=1; //0: Total, 1:OK, 2:CRC, 3:ICV | |
5300 | u32 rateIndex; | |
5301 | u32 preamble_guardinterval; //1: short preamble/GI, 0: long preamble/GI | |
5302 | ||
ecdfa446 GKH |
5303 | if(pstats->bCRC) |
5304 | rcvType = 2; | |
5305 | else if(pstats->bICV) | |
5306 | rcvType = 3; | |
5307 | ||
5308 | if(pstats->bShortPreamble) | |
5309 | preamble_guardinterval = 1;// short | |
5310 | else | |
5311 | preamble_guardinterval = 0;// long | |
5312 | ||
5313 | switch(pstats->rate) | |
5314 | { | |
5315 | // | |
5316 | // CCK rate | |
5317 | // | |
5318 | case MGN_1M: rateIndex = 0; break; | |
5319 | case MGN_2M: rateIndex = 1; break; | |
5320 | case MGN_5_5M: rateIndex = 2; break; | |
5321 | case MGN_11M: rateIndex = 3; break; | |
5322 | // | |
5323 | // Legacy OFDM rate | |
5324 | // | |
5325 | case MGN_6M: rateIndex = 4; break; | |
5326 | case MGN_9M: rateIndex = 5; break; | |
5327 | case MGN_12M: rateIndex = 6; break; | |
5328 | case MGN_18M: rateIndex = 7; break; | |
5329 | case MGN_24M: rateIndex = 8; break; | |
5330 | case MGN_36M: rateIndex = 9; break; | |
5331 | case MGN_48M: rateIndex = 10; break; | |
5332 | case MGN_54M: rateIndex = 11; break; | |
5333 | // | |
5334 | // 11n High throughput rate | |
5335 | // | |
5336 | case MGN_MCS0: rateIndex = 12; break; | |
5337 | case MGN_MCS1: rateIndex = 13; break; | |
5338 | case MGN_MCS2: rateIndex = 14; break; | |
5339 | case MGN_MCS3: rateIndex = 15; break; | |
5340 | case MGN_MCS4: rateIndex = 16; break; | |
5341 | case MGN_MCS5: rateIndex = 17; break; | |
5342 | case MGN_MCS6: rateIndex = 18; break; | |
5343 | case MGN_MCS7: rateIndex = 19; break; | |
5344 | case MGN_MCS8: rateIndex = 20; break; | |
5345 | case MGN_MCS9: rateIndex = 21; break; | |
5346 | case MGN_MCS10: rateIndex = 22; break; | |
5347 | case MGN_MCS11: rateIndex = 23; break; | |
5348 | case MGN_MCS12: rateIndex = 24; break; | |
5349 | case MGN_MCS13: rateIndex = 25; break; | |
5350 | case MGN_MCS14: rateIndex = 26; break; | |
5351 | case MGN_MCS15: rateIndex = 27; break; | |
5352 | default: rateIndex = 28; break; | |
5353 | } | |
ecdfa446 GKH |
5354 | priv->stats.received_rate_histogram[0][rateIndex]++; //total |
5355 | priv->stats.received_rate_histogram[rcvType][rateIndex]++; | |
5356 | } | |
5357 | ||
5e1ad18a | 5358 | static void rtl8192_rx(struct net_device *dev) |
ecdfa446 GKH |
5359 | { |
5360 | struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev); | |
5361 | struct ieee80211_hdr_1addr *ieee80211_hdr = NULL; | |
5362 | bool unicast_packet = false; | |
5363 | struct ieee80211_rx_stats stats = { | |
5364 | .signal = 0, | |
5365 | .noise = -98, | |
5366 | .rate = 0, | |
5367 | .freq = IEEE80211_24GHZ_BAND, | |
5368 | }; | |
5369 | unsigned int count = priv->rxringcount; | |
5370 | ||
ecdfa446 GKH |
5371 | while (count--) { |
5372 | rx_desc_819x_pci *pdesc = &priv->rx_ring[priv->rx_idx];//rx descriptor | |
5373 | struct sk_buff *skb = priv->rx_buf[priv->rx_idx];//rx pkt | |
5374 | ||
5375 | if (pdesc->OWN){ | |
5376 | /* wait data to be filled by hardware */ | |
5377 | return; | |
5378 | } else { | |
5379 | stats.bICV = pdesc->ICV; | |
5380 | stats.bCRC = pdesc->CRC32; | |
5381 | stats.bHwError = pdesc->CRC32 | pdesc->ICV; | |
5382 | ||
5383 | stats.Length = pdesc->Length; | |
5384 | if(stats.Length < 24) | |
5385 | stats.bHwError |= 1; | |
5386 | ||
5387 | if(stats.bHwError) { | |
5388 | stats.bShift = false; | |
ecdfa446 GKH |
5389 | goto done; |
5390 | } else { | |
5391 | prx_fwinfo_819x_pci pDrvInfo = NULL; | |
5392 | struct sk_buff *new_skb = dev_alloc_skb(priv->rxbuffersize); | |
5393 | ||
5394 | if (unlikely(!new_skb)) { | |
5395 | goto done; | |
5396 | } | |
5397 | ||
5398 | stats.RxDrvInfoSize = pdesc->RxDrvInfoSize; | |
5399 | stats.RxBufShift = ((pdesc->Shift)&0x03); | |
5400 | stats.Decrypted = !pdesc->SWDec; | |
5401 | ||
ecdfa446 | 5402 | pci_dma_sync_single_for_cpu(priv->pdev, |
ecdfa446 GKH |
5403 | *((dma_addr_t *)skb->cb), |
5404 | priv->rxbuffersize, | |
5405 | PCI_DMA_FROMDEVICE); | |
5406 | skb_put(skb, pdesc->Length); | |
5407 | pDrvInfo = (rx_fwinfo_819x_pci *)(skb->data + stats.RxBufShift); | |
5408 | skb_reserve(skb, stats.RxDrvInfoSize + stats.RxBufShift); | |
5409 | ||
5410 | stats.rate = HwRateToMRate90((bool)pDrvInfo->RxHT, (u8)pDrvInfo->RxRate); | |
5411 | stats.bShortPreamble = pDrvInfo->SPLCP; | |
5412 | ||
5413 | /* it is debug only. It should be disabled in released driver. | |
5414 | * 2007.1.11 by Emily | |
5415 | * */ | |
5416 | UpdateReceivedRateHistogramStatistics8190(dev, &stats); | |
5417 | ||
5418 | stats.bIsAMPDU = (pDrvInfo->PartAggr==1); | |
5419 | stats.bFirstMPDU = (pDrvInfo->PartAggr==1) && (pDrvInfo->FirstAGGR==1); | |
5420 | ||
5421 | stats.TimeStampLow = pDrvInfo->TSFL; | |
5422 | stats.TimeStampHigh = read_nic_dword(dev, TSFR+4); | |
5423 | ||
5424 | UpdateRxPktTimeStamp8190(dev, &stats); | |
5425 | ||
5426 | // | |
5427 | // Get Total offset of MPDU Frame Body | |
5428 | // | |
5429 | if((stats.RxBufShift + stats.RxDrvInfoSize) > 0) | |
5430 | stats.bShift = 1; | |
5431 | ||
5432 | stats.RxIs40MHzPacket = pDrvInfo->BW; | |
5433 | ||
5434 | /* ???? */ | |
5435 | TranslateRxSignalStuff819xpci(dev,skb, &stats, pdesc, pDrvInfo); | |
5436 | ||
5437 | /* Rx A-MPDU */ | |
5438 | if(pDrvInfo->FirstAGGR==1 || pDrvInfo->PartAggr == 1) | |
5439 | RT_TRACE(COMP_RXDESC, "pDrvInfo->FirstAGGR = %d, pDrvInfo->PartAggr = %d\n", | |
5440 | pDrvInfo->FirstAGGR, pDrvInfo->PartAggr); | |
5441 | skb_trim(skb, skb->len - 4/*sCrcLng*/); | |
5442 | /* rx packets statistics */ | |
5443 | ieee80211_hdr = (struct ieee80211_hdr_1addr *)skb->data; | |
5444 | unicast_packet = false; | |
5445 | ||
5446 | if(is_broadcast_ether_addr(ieee80211_hdr->addr1)) { | |
5447 | //TODO | |
5448 | }else if(is_multicast_ether_addr(ieee80211_hdr->addr1)){ | |
5449 | //TODO | |
5450 | }else { | |
5451 | /* unicast packet */ | |
5452 | unicast_packet = true; | |
5453 | } | |
5454 | ||
5455 | stats.packetlength = stats.Length-4; | |
5456 | stats.fraglength = stats.packetlength; | |
5457 | stats.fragoffset = 0; | |
5458 | stats.ntotalfrag = 1; | |
5459 | ||
fb5fe277 | 5460 | if(!ieee80211_rtl_rx(priv->ieee80211, skb, &stats)){ |
ecdfa446 GKH |
5461 | dev_kfree_skb_any(skb); |
5462 | } else { | |
5463 | priv->stats.rxok++; | |
5464 | if(unicast_packet) { | |
5465 | priv->stats.rxbytesunicast += skb->len; | |
5466 | } | |
5467 | } | |
5468 | ||
43f88d53 DL |
5469 | pci_unmap_single(priv->pdev, *((dma_addr_t *) skb->cb), |
5470 | priv->rxbuffersize, PCI_DMA_FROMDEVICE); | |
5471 | ||
ecdfa446 GKH |
5472 | skb = new_skb; |
5473 | priv->rx_buf[priv->rx_idx] = skb; | |
1c7ec2e8 | 5474 | *((dma_addr_t *) skb->cb) = pci_map_single(priv->pdev, skb_tail_pointer(skb), priv->rxbuffersize, PCI_DMA_FROMDEVICE); |
ecdfa446 GKH |
5475 | } |
5476 | ||
5477 | } | |
5478 | done: | |
5479 | pdesc->BufferAddress = cpu_to_le32(*((dma_addr_t *)skb->cb)); | |
5480 | pdesc->OWN = 1; | |
5481 | pdesc->Length = priv->rxbuffersize; | |
5482 | if (priv->rx_idx == priv->rxringcount-1) | |
5483 | pdesc->EOR = 1; | |
5484 | priv->rx_idx = (priv->rx_idx + 1) % priv->rxringcount; | |
5485 | } | |
5486 | ||
5487 | } | |
5488 | ||
559fba5e | 5489 | static void rtl8192_irq_rx_tasklet(struct r8192_priv *priv) |
ecdfa446 GKH |
5490 | { |
5491 | rtl8192_rx(priv->ieee80211->dev); | |
5492 | /* unmask RDU */ | |
5493 | write_nic_dword(priv->ieee80211->dev, INTA_MASK,read_nic_dword(priv->ieee80211->dev, INTA_MASK) | IMR_RDU); | |
5494 | } | |
5495 | ||
5496 | static const struct net_device_ops rtl8192_netdev_ops = { | |
5497 | .ndo_open = rtl8192_open, | |
5498 | .ndo_stop = rtl8192_close, | |
ecdfa446 GKH |
5499 | .ndo_tx_timeout = tx_timeout, |
5500 | .ndo_do_ioctl = rtl8192_ioctl, | |
5501 | .ndo_set_multicast_list = r8192_set_multicast, | |
5502 | .ndo_set_mac_address = r8192_set_mac_adr, | |
fb5fe277 | 5503 | .ndo_start_xmit = ieee80211_rtl_xmit, |
ecdfa446 GKH |
5504 | }; |
5505 | ||
ecdfa446 GKH |
5506 | static int __devinit rtl8192_pci_probe(struct pci_dev *pdev, |
5507 | const struct pci_device_id *id) | |
5508 | { | |
5509 | unsigned long ioaddr = 0; | |
5510 | struct net_device *dev = NULL; | |
5511 | struct r8192_priv *priv= NULL; | |
5512 | u8 unit = 0; | |
3a8f2d3c | 5513 | int ret = -ENODEV; |
ecdfa446 GKH |
5514 | |
5515 | #ifdef CONFIG_RTL8192_IO_MAP | |
5516 | unsigned long pio_start, pio_len, pio_flags; | |
5517 | #else | |
5518 | unsigned long pmem_start, pmem_len, pmem_flags; | |
5519 | #endif //end #ifdef RTL_IO_MAP | |
5520 | ||
5521 | RT_TRACE(COMP_INIT,"Configuring chip resources"); | |
5522 | ||
5523 | if( pci_enable_device (pdev) ){ | |
5524 | RT_TRACE(COMP_ERR,"Failed to enable PCI device"); | |
5525 | return -EIO; | |
5526 | } | |
5527 | ||
5528 | pci_set_master(pdev); | |
5529 | //pci_set_wmi(pdev); | |
5530 | pci_set_dma_mask(pdev, 0xffffff00ULL); | |
ecdfa446 | 5531 | pci_set_consistent_dma_mask(pdev,0xffffff00ULL); |
ecdfa446 | 5532 | dev = alloc_ieee80211(sizeof(struct r8192_priv)); |
3a8f2d3c KV |
5533 | if (!dev) { |
5534 | ret = -ENOMEM; | |
5535 | goto fail_free; | |
5536 | } | |
ecdfa446 | 5537 | |
ecdfa446 | 5538 | pci_set_drvdata(pdev, dev); |
ecdfa446 | 5539 | SET_NETDEV_DEV(dev, &pdev->dev); |
ecdfa446 | 5540 | priv = ieee80211_priv(dev); |
ecdfa446 | 5541 | priv->ieee80211 = netdev_priv(dev); |
ecdfa446 | 5542 | priv->pdev=pdev; |
ecdfa446 GKH |
5543 | if((pdev->subsystem_vendor == PCI_VENDOR_ID_DLINK)&&(pdev->subsystem_device == 0x3304)){ |
5544 | priv->ieee80211->bSupportRemoteWakeUp = 1; | |
5545 | } else | |
ecdfa446 GKH |
5546 | { |
5547 | priv->ieee80211->bSupportRemoteWakeUp = 0; | |
5548 | } | |
5549 | ||
5550 | #ifdef CONFIG_RTL8192_IO_MAP | |
5551 | ||
5552 | pio_start = (unsigned long)pci_resource_start (pdev, 0); | |
5553 | pio_len = (unsigned long)pci_resource_len (pdev, 0); | |
5554 | pio_flags = (unsigned long)pci_resource_flags (pdev, 0); | |
5555 | ||
5556 | if (!(pio_flags & IORESOURCE_IO)) { | |
5557 | RT_TRACE(COMP_ERR,"region #0 not a PIO resource, aborting"); | |
5558 | goto fail; | |
5559 | } | |
5560 | ||
5561 | //DMESG("IO space @ 0x%08lx", pio_start ); | |
5562 | if( ! request_region( pio_start, pio_len, RTL819xE_MODULE_NAME ) ){ | |
5563 | RT_TRACE(COMP_ERR,"request_region failed!"); | |
5564 | goto fail; | |
5565 | } | |
5566 | ||
5567 | ioaddr = pio_start; | |
5568 | dev->base_addr = ioaddr; // device I/O address | |
5569 | ||
5570 | #else | |
5571 | ||
5572 | pmem_start = pci_resource_start(pdev, 1); | |
5573 | pmem_len = pci_resource_len(pdev, 1); | |
5574 | pmem_flags = pci_resource_flags (pdev, 1); | |
5575 | ||
5576 | if (!(pmem_flags & IORESOURCE_MEM)) { | |
5577 | RT_TRACE(COMP_ERR,"region #1 not a MMIO resource, aborting"); | |
5578 | goto fail; | |
5579 | } | |
5580 | ||
5581 | //DMESG("Memory mapped space @ 0x%08lx ", pmem_start); | |
5582 | if( ! request_mem_region(pmem_start, pmem_len, RTL819xE_MODULE_NAME)) { | |
5583 | RT_TRACE(COMP_ERR,"request_mem_region failed!"); | |
5584 | goto fail; | |
5585 | } | |
5586 | ||
5587 | ||
5588 | ioaddr = (unsigned long)ioremap_nocache( pmem_start, pmem_len); | |
5589 | if( ioaddr == (unsigned long)NULL ){ | |
5590 | RT_TRACE(COMP_ERR,"ioremap failed!"); | |
5591 | // release_mem_region( pmem_start, pmem_len ); | |
5592 | goto fail1; | |
5593 | } | |
5594 | ||
5595 | dev->mem_start = ioaddr; // shared mem start | |
5596 | dev->mem_end = ioaddr + pci_resource_len(pdev, 0); // shared mem end | |
5597 | ||
5598 | #endif //end #ifdef RTL_IO_MAP | |
5599 | ||
5600 | /* We disable the RETRY_TIMEOUT register (0x41) to keep | |
5601 | * PCI Tx retries from interfering with C3 CPU state */ | |
5602 | pci_write_config_byte(pdev, 0x41, 0x00); | |
5603 | ||
5604 | ||
5605 | pci_read_config_byte(pdev, 0x05, &unit); | |
5606 | pci_write_config_byte(pdev, 0x05, unit & (~0x04)); | |
5607 | ||
5608 | dev->irq = pdev->irq; | |
5609 | priv->irq = 0; | |
5610 | ||
5611 | dev->netdev_ops = &rtl8192_netdev_ops; | |
ecdfa446 | 5612 | |
890a6850 | 5613 | dev->wireless_handlers = &r8192_wx_handlers_def; |
ecdfa446 GKH |
5614 | dev->type=ARPHRD_ETHER; |
5615 | ||
890a6850 | 5616 | dev->watchdog_timeo = HZ*3; |
ecdfa446 GKH |
5617 | |
5618 | if (dev_alloc_name(dev, ifname) < 0){ | |
5619 | RT_TRACE(COMP_INIT, "Oops: devname already taken! Trying wlan%%d...\n"); | |
dca41306 | 5620 | strcpy(ifname, "wlan%d"); |
ecdfa446 GKH |
5621 | dev_alloc_name(dev, ifname); |
5622 | } | |
5623 | ||
5624 | RT_TRACE(COMP_INIT, "Driver probe completed1\n"); | |
5625 | if(rtl8192_init(dev)!=0){ | |
5626 | RT_TRACE(COMP_ERR, "Initialization failed"); | |
5627 | goto fail; | |
5628 | } | |
5629 | ||
ecdfa446 GKH |
5630 | register_netdev(dev); |
5631 | RT_TRACE(COMP_INIT, "dev name=======> %s\n",dev->name); | |
5632 | rtl8192_proc_init_one(dev); | |
5633 | ||
5634 | ||
5635 | RT_TRACE(COMP_INIT, "Driver probe completed\n"); | |
ecdfa446 | 5636 | return 0; |
ecdfa446 GKH |
5637 | |
5638 | fail1: | |
5639 | ||
5640 | #ifdef CONFIG_RTL8180_IO_MAP | |
5641 | ||
5642 | if( dev->base_addr != 0 ){ | |
5643 | ||
5644 | release_region(dev->base_addr, | |
5645 | pci_resource_len(pdev, 0) ); | |
5646 | } | |
5647 | #else | |
5648 | if( dev->mem_start != (unsigned long)NULL ){ | |
5649 | iounmap( (void *)dev->mem_start ); | |
5650 | release_mem_region( pci_resource_start(pdev, 1), | |
5651 | pci_resource_len(pdev, 1) ); | |
5652 | } | |
5653 | #endif //end #ifdef RTL_IO_MAP | |
5654 | ||
5655 | fail: | |
5656 | if(dev){ | |
5657 | ||
5658 | if (priv->irq) { | |
5659 | free_irq(dev->irq, dev); | |
5660 | dev->irq=0; | |
5661 | } | |
5662 | free_ieee80211(dev); | |
5663 | } | |
5664 | ||
3a8f2d3c | 5665 | fail_free: |
ecdfa446 GKH |
5666 | pci_disable_device(pdev); |
5667 | ||
5668 | DMESG("wlan driver load failed\n"); | |
5669 | pci_set_drvdata(pdev, NULL); | |
3a8f2d3c | 5670 | return ret; |
ecdfa446 GKH |
5671 | |
5672 | } | |
5673 | ||
5674 | /* detach all the work and timer structure declared or inititialized | |
5675 | * in r8192_init function. | |
5676 | * */ | |
5b3b1a7b | 5677 | static void rtl8192_cancel_deferred_work(struct r8192_priv* priv) |
ecdfa446 GKH |
5678 | { |
5679 | /* call cancel_work_sync instead of cancel_delayed_work if and only if Linux_version_code | |
5680 | * is or is newer than 2.6.20 and work structure is defined to be struct work_struct. | |
5681 | * Otherwise call cancel_delayed_work is enough. | |
39cfb97b | 5682 | * FIXME (2.6.20 should 2.6.22, work_struct should not cancel) |
ecdfa446 | 5683 | * */ |
ecdfa446 GKH |
5684 | cancel_delayed_work(&priv->watch_dog_wq); |
5685 | cancel_delayed_work(&priv->update_beacon_wq); | |
5686 | cancel_delayed_work(&priv->ieee80211->hw_wakeup_wq); | |
5687 | cancel_delayed_work(&priv->ieee80211->hw_sleep_wq); | |
5688 | #ifdef RTL8192E | |
5689 | cancel_delayed_work(&priv->gpio_change_rf_wq); | |
5690 | #endif | |
ecdfa446 GKH |
5691 | cancel_work_sync(&priv->reset_wq); |
5692 | cancel_work_sync(&priv->qos_activate); | |
5693 | //cancel_work_sync(&priv->SetBWModeWorkItem); | |
5694 | //cancel_work_sync(&priv->SwChnlWorkItem); | |
ecdfa446 GKH |
5695 | |
5696 | } | |
5697 | ||
5698 | ||
5699 | static void __devexit rtl8192_pci_disconnect(struct pci_dev *pdev) | |
5700 | { | |
5701 | struct net_device *dev = pci_get_drvdata(pdev); | |
5702 | struct r8192_priv *priv ; | |
5703 | ||
5704 | if(dev){ | |
5705 | ||
5706 | unregister_netdev(dev); | |
5707 | ||
5708 | priv=ieee80211_priv(dev); | |
5709 | ||
5710 | rtl8192_proc_remove_one(dev); | |
5711 | ||
5712 | rtl8192_down(dev); | |
5713 | if (priv->pFirmware) | |
5714 | { | |
5715 | vfree(priv->pFirmware); | |
5716 | priv->pFirmware = NULL; | |
5717 | } | |
5718 | // priv->rf_close(dev); | |
5719 | // rtl8192_usb_deleteendpoints(dev); | |
ecdfa446 | 5720 | destroy_workqueue(priv->priv_wq); |
ecdfa446 GKH |
5721 | /* redundant with rtl8192_down */ |
5722 | // rtl8192_irq_disable(dev); | |
5723 | // rtl8192_reset(dev); | |
5724 | // mdelay(10); | |
5725 | { | |
5726 | u32 i; | |
5727 | /* free tx/rx rings */ | |
5728 | rtl8192_free_rx_ring(dev); | |
5729 | for (i = 0; i < MAX_TX_QUEUE_COUNT; i++) { | |
5730 | rtl8192_free_tx_ring(dev, i); | |
5731 | } | |
5732 | } | |
5733 | if(priv->irq){ | |
5734 | ||
5735 | printk("Freeing irq %d\n",dev->irq); | |
5736 | free_irq(dev->irq, dev); | |
5737 | priv->irq=0; | |
5738 | ||
5739 | } | |
5740 | ||
ecdfa446 GKH |
5741 | #ifdef CONFIG_RTL8180_IO_MAP |
5742 | ||
5743 | if( dev->base_addr != 0 ){ | |
5744 | ||
5745 | release_region(dev->base_addr, | |
5746 | pci_resource_len(pdev, 0) ); | |
5747 | } | |
5748 | #else | |
5749 | if( dev->mem_start != (unsigned long)NULL ){ | |
5750 | iounmap( (void *)dev->mem_start ); | |
5751 | release_mem_region( pci_resource_start(pdev, 1), | |
5752 | pci_resource_len(pdev, 1) ); | |
5753 | } | |
5754 | #endif /*end #ifdef RTL_IO_MAP*/ | |
5755 | free_ieee80211(dev); | |
5756 | ||
5757 | } | |
5758 | ||
5759 | pci_disable_device(pdev); | |
5760 | RT_TRACE(COMP_DOWN, "wlan driver removed\n"); | |
5761 | } | |
5762 | ||
fb5fe277 GK |
5763 | extern int ieee80211_rtl_init(void); |
5764 | extern void ieee80211_rtl_exit(void); | |
ecdfa446 GKH |
5765 | |
5766 | static int __init rtl8192_pci_module_init(void) | |
5767 | { | |
5768 | int retval; | |
5769 | ||
fb5fe277 | 5770 | retval = ieee80211_rtl_init(); |
ecdfa446 GKH |
5771 | if (retval) |
5772 | return retval; | |
5773 | ||
5774 | printk(KERN_INFO "\nLinux kernel driver for RTL8192 based WLAN cards\n"); | |
5775 | printk(KERN_INFO "Copyright (c) 2007-2008, Realsil Wlan\n"); | |
5776 | RT_TRACE(COMP_INIT, "Initializing module"); | |
ecdfa446 | 5777 | rtl8192_proc_module_init(); |
ecdfa446 | 5778 | if(0!=pci_register_driver(&rtl8192_pci_driver)) |
ecdfa446 GKH |
5779 | { |
5780 | DMESG("No device found"); | |
5781 | /*pci_unregister_driver (&rtl8192_pci_driver);*/ | |
5782 | return -ENODEV; | |
5783 | } | |
5784 | return 0; | |
5785 | } | |
5786 | ||
5787 | ||
5788 | static void __exit rtl8192_pci_module_exit(void) | |
5789 | { | |
5790 | pci_unregister_driver(&rtl8192_pci_driver); | |
5791 | ||
5792 | RT_TRACE(COMP_DOWN, "Exiting"); | |
5793 | rtl8192_proc_module_remove(); | |
fb5fe277 | 5794 | ieee80211_rtl_exit(); |
ecdfa446 GKH |
5795 | } |
5796 | ||
559fba5e | 5797 | static irqreturn_t rtl8192_interrupt(int irq, void *netdev) |
ecdfa446 | 5798 | { |
b2cf8d48 MM |
5799 | struct net_device *dev = (struct net_device *) netdev; |
5800 | struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev); | |
5801 | unsigned long flags; | |
5802 | u32 inta; | |
f8129a95 MM |
5803 | irqreturn_t ret = IRQ_HANDLED; |
5804 | ||
5805 | spin_lock_irqsave(&priv->irq_th_lock, flags); | |
ecdfa446 | 5806 | |
b2cf8d48 MM |
5807 | /* We should return IRQ_NONE, but for now let me keep this */ |
5808 | if (priv->irq_enabled == 0) | |
f8129a95 | 5809 | goto out_unlock; |
ecdfa446 | 5810 | |
b2cf8d48 | 5811 | /* ISR: 4bytes */ |
ecdfa446 | 5812 | |
b2cf8d48 MM |
5813 | inta = read_nic_dword(dev, ISR); /* & priv->IntrMask; */ |
5814 | write_nic_dword(dev, ISR, inta); /* reset int situation */ | |
ecdfa446 | 5815 | |
b2cf8d48 | 5816 | if (!inta) { |
b2cf8d48 MM |
5817 | /* |
5818 | * most probably we can safely return IRQ_NONE, | |
5819 | * but for now is better to avoid problems | |
5820 | */ | |
f8129a95 | 5821 | goto out_unlock; |
b2cf8d48 | 5822 | } |
ecdfa446 | 5823 | |
b2cf8d48 MM |
5824 | if (inta == 0xffff) { |
5825 | /* HW disappared */ | |
f8129a95 | 5826 | goto out_unlock; |
b2cf8d48 MM |
5827 | } |
5828 | ||
f8129a95 MM |
5829 | if (!netif_running(dev)) |
5830 | goto out_unlock; | |
ecdfa446 | 5831 | |
b2cf8d48 MM |
5832 | if (inta & IMR_TBDOK) { |
5833 | RT_TRACE(COMP_INTR, "beacon ok interrupt!\n"); | |
5834 | rtl8192_tx_isr(dev, BEACON_QUEUE); | |
5835 | priv->stats.txbeaconokint++; | |
5836 | } | |
ecdfa446 | 5837 | |
b2cf8d48 MM |
5838 | if (inta & IMR_TBDER) { |
5839 | RT_TRACE(COMP_INTR, "beacon ok interrupt!\n"); | |
5840 | rtl8192_tx_isr(dev, BEACON_QUEUE); | |
5841 | priv->stats.txbeaconerr++; | |
5842 | } | |
ecdfa446 | 5843 | |
b2cf8d48 MM |
5844 | if (inta & IMR_MGNTDOK ) { |
5845 | RT_TRACE(COMP_INTR, "Manage ok interrupt!\n"); | |
5846 | priv->stats.txmanageokint++; | |
5847 | rtl8192_tx_isr(dev,MGNT_QUEUE); | |
5848 | } | |
ecdfa446 | 5849 | |
b2cf8d48 MM |
5850 | if (inta & IMR_COMDOK) |
5851 | { | |
5852 | priv->stats.txcmdpktokint++; | |
5853 | rtl8192_tx_isr(dev, TXCMD_QUEUE); | |
5854 | } | |
ecdfa446 | 5855 | |
b2cf8d48 | 5856 | if (inta & IMR_ROK) { |
b2cf8d48 MM |
5857 | priv->stats.rxint++; |
5858 | tasklet_schedule(&priv->irq_rx_tasklet); | |
5859 | } | |
ecdfa446 | 5860 | |
b2cf8d48 MM |
5861 | if (inta & IMR_BcnInt) { |
5862 | RT_TRACE(COMP_INTR, "prepare beacon for interrupt!\n"); | |
5863 | tasklet_schedule(&priv->irq_prepare_beacon_tasklet); | |
5864 | } | |
ecdfa446 | 5865 | |
b2cf8d48 MM |
5866 | if (inta & IMR_RDU) { |
5867 | RT_TRACE(COMP_INTR, "rx descriptor unavailable!\n"); | |
5868 | priv->stats.rxrdu++; | |
5869 | /* reset int situation */ | |
5870 | write_nic_dword(dev, INTA_MASK, read_nic_dword(dev, INTA_MASK) & ~IMR_RDU); | |
5871 | tasklet_schedule(&priv->irq_rx_tasklet); | |
5872 | } | |
ecdfa446 | 5873 | |
b2cf8d48 MM |
5874 | if (inta & IMR_RXFOVW) { |
5875 | RT_TRACE(COMP_INTR, "rx overflow !\n"); | |
5876 | priv->stats.rxoverflow++; | |
5877 | tasklet_schedule(&priv->irq_rx_tasklet); | |
5878 | } | |
ecdfa446 | 5879 | |
b2cf8d48 MM |
5880 | if (inta & IMR_TXFOVW) |
5881 | priv->stats.txoverflow++; | |
ecdfa446 | 5882 | |
b2cf8d48 MM |
5883 | if (inta & IMR_BKDOK) { |
5884 | RT_TRACE(COMP_INTR, "BK Tx OK interrupt!\n"); | |
5885 | priv->stats.txbkokint++; | |
5886 | priv->ieee80211->LinkDetectInfo.NumTxOkInPeriod++; | |
5887 | rtl8192_tx_isr(dev, BK_QUEUE); | |
5888 | } | |
ecdfa446 | 5889 | |
b2cf8d48 MM |
5890 | if (inta & IMR_BEDOK) { |
5891 | RT_TRACE(COMP_INTR, "BE TX OK interrupt!\n"); | |
5892 | priv->stats.txbeokint++; | |
5893 | priv->ieee80211->LinkDetectInfo.NumTxOkInPeriod++; | |
5894 | rtl8192_tx_isr(dev, BE_QUEUE); | |
5895 | } | |
ecdfa446 | 5896 | |
b2cf8d48 MM |
5897 | if (inta & IMR_VIDOK) { |
5898 | RT_TRACE(COMP_INTR, "VI TX OK interrupt!\n"); | |
5899 | priv->stats.txviokint++; | |
5900 | priv->ieee80211->LinkDetectInfo.NumTxOkInPeriod++; | |
5901 | rtl8192_tx_isr(dev, VI_QUEUE); | |
5902 | } | |
ecdfa446 | 5903 | |
b2cf8d48 MM |
5904 | if (inta & IMR_VODOK) { |
5905 | priv->stats.txvookint++; | |
5906 | priv->ieee80211->LinkDetectInfo.NumTxOkInPeriod++; | |
5907 | rtl8192_tx_isr(dev, VO_QUEUE); | |
5908 | } | |
ecdfa446 | 5909 | |
f8129a95 | 5910 | out_unlock: |
b2cf8d48 | 5911 | spin_unlock_irqrestore(&priv->irq_th_lock, flags); |
ecdfa446 | 5912 | |
f8129a95 | 5913 | return ret; |
ecdfa446 GKH |
5914 | } |
5915 | ||
ecdfa446 GKH |
5916 | void EnableHWSecurityConfig8192(struct net_device *dev) |
5917 | { | |
5918 | u8 SECR_value = 0x0; | |
ecdfa446 | 5919 | struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev); |
16d74da0 MM |
5920 | struct ieee80211_device* ieee = priv->ieee80211; |
5921 | ||
ecdfa446 | 5922 | SECR_value = SCR_TxEncEnable | SCR_RxDecEnable; |
11aacc28 | 5923 | |
ecdfa446 GKH |
5924 | if (((KEY_TYPE_WEP40 == ieee->pairwise_key_type) || (KEY_TYPE_WEP104 == ieee->pairwise_key_type)) && (priv->ieee80211->auth_mode != 2)) |
5925 | { | |
5926 | SECR_value |= SCR_RxUseDK; | |
5927 | SECR_value |= SCR_TxUseDK; | |
5928 | } | |
5929 | else if ((ieee->iw_mode == IW_MODE_ADHOC) && (ieee->pairwise_key_type & (KEY_TYPE_CCMP | KEY_TYPE_TKIP))) | |
5930 | { | |
5931 | SECR_value |= SCR_RxUseDK; | |
5932 | SECR_value |= SCR_TxUseDK; | |
5933 | } | |
5934 | ||
ecdfa446 GKH |
5935 | //add HWSec active enable here. |
5936 | //default using hwsec. when peer AP is in N mode only and pairwise_key_type is none_aes(which HT_IOT_ACT_PURE_N_MODE indicates it), use software security. when peer AP is in b,g,n mode mixed and pairwise_key_type is none_aes, use g mode hw security. WB on 2008.7.4 | |
5937 | ieee->hwsec_active = 1; | |
5938 | ||
5939 | if ((ieee->pHTInfo->IOTAction&HT_IOT_ACT_PURE_N_MODE) || !hwwep)//!ieee->hwsec_support) //add hwsec_support flag to totol control hw_sec on/off | |
5940 | { | |
5941 | ieee->hwsec_active = 0; | |
5942 | SECR_value &= ~SCR_RxDecEnable; | |
5943 | } | |
5944 | ||
207b58fb | 5945 | RT_TRACE(COMP_SEC,"%s:, hwsec:%d, pairwise_key:%d, SECR_value:%x\n", __FUNCTION__, |
ecdfa446 GKH |
5946 | ieee->hwsec_active, ieee->pairwise_key_type, SECR_value); |
5947 | { | |
5948 | write_nic_byte(dev, SECR, SECR_value);//SECR_value | SCR_UseDK ); | |
5949 | } | |
5950 | ||
5951 | } | |
5952 | #define TOTAL_CAM_ENTRY 32 | |
5953 | //#define CAM_CONTENT_COUNT 8 | |
5954 | void setKey( struct net_device *dev, | |
5955 | u8 EntryNo, | |
5956 | u8 KeyIndex, | |
5957 | u16 KeyType, | |
881a975b | 5958 | const u8 *MacAddr, |
ecdfa446 GKH |
5959 | u8 DefaultKey, |
5960 | u32 *KeyContent ) | |
5961 | { | |
5962 | u32 TargetCommand = 0; | |
5963 | u32 TargetContent = 0; | |
5964 | u16 usConfig = 0; | |
5965 | u8 i; | |
5966 | #ifdef ENABLE_IPS | |
5967 | struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev); | |
5968 | RT_RF_POWER_STATE rtState; | |
5969 | rtState = priv->ieee80211->eRFPowerState; | |
5970 | if(priv->ieee80211->PowerSaveControl.bInactivePs){ | |
5971 | if(rtState == eRfOff){ | |
5972 | if(priv->ieee80211->RfOffReason > RF_CHANGE_BY_IPS) | |
5973 | { | |
5974 | RT_TRACE(COMP_ERR, "%s(): RF is OFF.\n",__FUNCTION__); | |
65a43784 | 5975 | //up(&priv->wx_sem); |
ecdfa446 GKH |
5976 | return ; |
5977 | } | |
5978 | else{ | |
65a43784 | 5979 | down(&priv->ieee80211->ips_sem); |
ecdfa446 | 5980 | IPSLeave(dev); |
65a43784 | 5981 | up(&priv->ieee80211->ips_sem); |
ecdfa446 GKH |
5982 | } |
5983 | } | |
5984 | } | |
5985 | priv->ieee80211->is_set_key = true; | |
5986 | #endif | |
5987 | if (EntryNo >= TOTAL_CAM_ENTRY) | |
5988 | RT_TRACE(COMP_ERR, "cam entry exceeds in setKey()\n"); | |
5989 | ||
0ee9f67c | 5990 | RT_TRACE(COMP_SEC, "====>to setKey(), dev:%p, EntryNo:%d, KeyIndex:%d, KeyType:%d, MacAddr%pM\n", dev,EntryNo, KeyIndex, KeyType, MacAddr); |
ecdfa446 GKH |
5991 | |
5992 | if (DefaultKey) | |
5993 | usConfig |= BIT15 | (KeyType<<2); | |
5994 | else | |
5995 | usConfig |= BIT15 | (KeyType<<2) | KeyIndex; | |
5996 | // usConfig |= BIT15 | (KeyType<<2) | (DefaultKey<<5) | KeyIndex; | |
5997 | ||
5998 | ||
5999 | for(i=0 ; i<CAM_CONTENT_COUNT; i++){ | |
6000 | TargetCommand = i+CAM_CONTENT_COUNT*EntryNo; | |
6001 | TargetCommand |= BIT31|BIT16; | |
6002 | ||
6003 | if(i==0){//MAC|Config | |
6004 | TargetContent = (u32)(*(MacAddr+0)) << 16| | |
6005 | (u32)(*(MacAddr+1)) << 24| | |
6006 | (u32)usConfig; | |
6007 | ||
6008 | write_nic_dword(dev, WCAMI, TargetContent); | |
6009 | write_nic_dword(dev, RWCAM, TargetCommand); | |
ecdfa446 GKH |
6010 | } |
6011 | else if(i==1){//MAC | |
6012 | TargetContent = (u32)(*(MacAddr+2)) | | |
6013 | (u32)(*(MacAddr+3)) << 8| | |
6014 | (u32)(*(MacAddr+4)) << 16| | |
6015 | (u32)(*(MacAddr+5)) << 24; | |
6016 | write_nic_dword(dev, WCAMI, TargetContent); | |
6017 | write_nic_dword(dev, RWCAM, TargetCommand); | |
6018 | } | |
6019 | else { //Key Material | |
6020 | if(KeyContent != NULL) | |
6021 | { | |
6022 | write_nic_dword(dev, WCAMI, (u32)(*(KeyContent+i-2)) ); | |
6023 | write_nic_dword(dev, RWCAM, TargetCommand); | |
6024 | } | |
6025 | } | |
6026 | } | |
6027 | RT_TRACE(COMP_SEC,"=========>after set key, usconfig:%x\n", usConfig); | |
ecdfa446 | 6028 | } |
ecdfa446 | 6029 | |
65a43784 | 6030 | bool NicIFEnableNIC(struct net_device* dev) |
6031 | { | |
6032 | RT_STATUS init_status = RT_STATUS_SUCCESS; | |
6033 | struct r8192_priv* priv = ieee80211_priv(dev); | |
6034 | PRT_POWER_SAVE_CONTROL pPSC = (PRT_POWER_SAVE_CONTROL)(&(priv->ieee80211->PowerSaveControl)); | |
6035 | ||
6036 | //YJ,add,091109 | |
6037 | if (priv->up == 0){ | |
6038 | RT_TRACE(COMP_ERR, "ERR!!! %s(): Driver is already down!\n",__FUNCTION__); | |
6039 | priv->bdisable_nic = false; //YJ,add,091111 | |
6040 | return false; | |
6041 | } | |
6042 | // <1> Reset memory: descriptor, buffer,.. | |
6043 | //NicIFResetMemory(Adapter); | |
6044 | ||
6045 | // <2> Enable Adapter | |
65a43784 | 6046 | //priv->bfirst_init = true; |
6047 | init_status = rtl8192_adapter_start(dev); | |
6048 | if (init_status != RT_STATUS_SUCCESS) { | |
6049 | RT_TRACE(COMP_ERR,"ERR!!! %s(): initialization is failed!\n",__FUNCTION__); | |
6050 | priv->bdisable_nic = false; //YJ,add,091111 | |
6051 | return -1; | |
6052 | } | |
65a43784 | 6053 | RT_CLEAR_PS_LEVEL(pPSC, RT_RF_OFF_LEVL_HALT_NIC); |
6054 | //priv->bfirst_init = false; | |
6055 | ||
6056 | // <3> Enable Interrupt | |
6057 | rtl8192_irq_enable(dev); | |
6058 | priv->bdisable_nic = false; | |
16d74da0 | 6059 | |
c6eae677 | 6060 | return (init_status == RT_STATUS_SUCCESS); |
65a43784 | 6061 | } |
214985a6 | 6062 | |
65a43784 | 6063 | bool NicIFDisableNIC(struct net_device* dev) |
6064 | { | |
6065 | bool status = true; | |
6066 | struct r8192_priv* priv = ieee80211_priv(dev); | |
6067 | u8 tmp_state = 0; | |
6068 | // <1> Disable Interrupt | |
16d74da0 | 6069 | |
65a43784 | 6070 | priv->bdisable_nic = true; //YJ,move,091109 |
6071 | tmp_state = priv->ieee80211->state; | |
6072 | ||
6073 | ieee80211_softmac_stop_protocol(priv->ieee80211, false); | |
6074 | ||
6075 | priv->ieee80211->state = tmp_state; | |
6076 | rtl8192_cancel_deferred_work(priv); | |
6077 | rtl8192_irq_disable(dev); | |
6078 | // <2> Stop all timer | |
6079 | ||
6080 | // <3> Disable Adapter | |
6081 | rtl8192_halt_adapter(dev, false); | |
6082 | // priv->bdisable_nic = true; | |
65a43784 | 6083 | |
6084 | return status; | |
6085 | } | |
6086 | ||
ecdfa446 GKH |
6087 | module_init(rtl8192_pci_module_init); |
6088 | module_exit(rtl8192_pci_module_exit); |