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staging: rtl8192e: Make functions static
[deliverable/linux.git] / drivers / staging / rtl8192e / r8192E_core.c
CommitLineData
ecdfa446
GKH		 1/******************************************************************************
2 * Copyright(c) 2008 - 2010 Realtek Corporation. All rights reserved.
4803ef77 3 * Linux device driver for RTL8192E
ecdfa446
GKH		 4 *
5 * Based on the r8180 driver, which is:
6 * Copyright 2004-2005 Andrea Merello <andreamrl@tiscali.it>, et al.
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of version 2 of the GNU General Public License as
9 * published by the Free Software Foundation.
10 *
11 * This program is distributed in the hope that it will be useful, but WITHOUT
12 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 * more details.
15 *
16 * You should have received a copy of the GNU General Public License along with
17 * this program; if not, write to the Free Software Foundation, Inc.,
18 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
19 *
20 * The full GNU General Public License is included in this distribution in the
21 * file called LICENSE.
22 *
23 * Contact Information:
24 * Jerry chuang <wlanfae@realtek.com>
25 */
26
97a6688a 27
3d14b518 28#include <linux/vmalloc.h>
5a0e3ad6 29#include <linux/slab.h>
ecdfa446
GKH		 30#include <asm/uaccess.h>
31#include "r8192E_hw.h"
32#include "r8192E.h"
33#include "r8190_rtl8256.h" /* RTL8225 Radio frontend */
34#include "r8180_93cx6.h" /* Card EEPROM */
35#include "r8192E_wx.h"
36#include "r819xE_phy.h" //added by WB 4.30.2008
37#include "r819xE_phyreg.h"
38#include "r819xE_cmdpkt.h"
39#include "r8192E_dm.h"
ecdfa446 40
bebdf809 41#ifdef CONFIG_PM
ecdfa446
GKH		 42#include "r8192_pm.h"
43#endif
44
45#ifdef ENABLE_DOT11D
65a43784 46#include "ieee80211/dot11d.h"
ecdfa446
GKH		 47#endif
48
49//set here to open your trace code. //WB
57be9583 50u32 rt_global_debug_component = COMP_ERR ; //always open err flags on
cf3d3d38 51
5eaa53de 52static DEFINE_PCI_DEVICE_TABLE(rtl8192_pci_id_tbl) = {
ecdfa446
GKH		 53 /* Realtek */
54 { PCI_DEVICE(0x10ec, 0x8192) },
55
56 /* Corega */
57 { PCI_DEVICE(0x07aa, 0x0044) },
58 { PCI_DEVICE(0x07aa, 0x0047) },
ecdfa446
GKH		 59 {}
60};
61
dca41306 62static char ifname[IFNAMSIZ] = "wlan%d";
ecdfa446
GKH		 63static int hwwep = 1; //default use hw. set 0 to use software security
64static int channels = 0x3fff;
65
66MODULE_LICENSE("GPL");
ecdfa446 67MODULE_VERSION("V 1.1");
ecdfa446
GKH		 68MODULE_DEVICE_TABLE(pci, rtl8192_pci_id_tbl);
69//MODULE_AUTHOR("Andrea Merello <andreamrl@tiscali.it>");
70MODULE_DESCRIPTION("Linux driver for Realtek RTL819x WiFi cards");
71
ecdfa446 72
dca41306 73module_param_string(ifname, ifname, sizeof(ifname), S_IRUGO|S_IWUSR);
ecdfa446
GKH		 74module_param(hwwep,int, S_IRUGO|S_IWUSR);
75module_param(channels,int, S_IRUGO|S_IWUSR);
ecdfa446
GKH		 76
77MODULE_PARM_DESC(ifname," Net interface name, wlan%d=default");
ecdfa446
GKH		 78MODULE_PARM_DESC(hwwep," Try to use hardware WEP support. Still broken and not available on all cards");
79MODULE_PARM_DESC(channels," Channel bitmask for specific locales. NYI");
80
81static int __devinit rtl8192_pci_probe(struct pci_dev *pdev,
82 const struct pci_device_id *id);
83static void __devexit rtl8192_pci_disconnect(struct pci_dev *pdev);
84
85static struct pci_driver rtl8192_pci_driver = {
86 .name = RTL819xE_MODULE_NAME, /* Driver name */
87 .id_table = rtl8192_pci_id_tbl, /* PCI_ID table */
88 .probe = rtl8192_pci_probe, /* probe fn */
89 .remove = __devexit_p(rtl8192_pci_disconnect), /* remove fn */
bebdf809 90#ifdef CONFIG_PM
ecdfa446
GKH		 91 .suspend = rtl8192E_suspend, /* PM suspend fn */
92 .resume = rtl8192E_resume, /* PM resume fn */
93#else
94 .suspend = NULL, /* PM suspend fn */
214985a6 95 .resume = NULL, /* PM resume fn */
ecdfa446 96#endif
ecdfa446
GKH		 97};
98
559fba5e
MM		 99static void rtl8192_start_beacon(struct net_device *dev);
100static void rtl8192_stop_beacon(struct net_device *dev);
101static void rtl819x_watchdog_wqcallback(struct work_struct *work);
80a4dead
MM		 102static void rtl8192_irq_rx_tasklet(unsigned long arg);
103static void rtl8192_irq_tx_tasklet(unsigned long arg);
104static void rtl8192_prepare_beacon(unsigned long arg);
559fba5e 105static irqreturn_t rtl8192_interrupt(int irq, void *netdev);
881a975b 106static void rtl819xE_tx_cmd(struct net_device *dev, struct sk_buff *skb);
5b3b1a7b
MM		 107static void rtl8192_update_ratr_table(struct net_device* dev);
108static void rtl8192_restart(struct work_struct *work);
109static void watch_dog_timer_callback(unsigned long data);
110static int _rtl8192_up(struct net_device *dev);
111static void rtl8192_cancel_deferred_work(struct r8192_priv* priv);
3b10c0a4 112static short rtl8192_tx(struct net_device *dev, struct sk_buff* skb);
559fba5e 113
ecdfa446
GKH		 114#ifdef ENABLE_DOT11D
115
116typedef struct _CHANNEL_LIST
117{
118 u8 Channel[32];
119 u8 Len;
120}CHANNEL_LIST, *PCHANNEL_LIST;
121
ab2161a0 122static const CHANNEL_LIST ChannelPlan[] = {
ecdfa446
GKH		 123 {{1,2,3,4,5,6,7,8,9,10,11,36,40,44,48,52,56,60,64,149,153,157,161,165},24}, //FCC
124 {{1,2,3,4,5,6,7,8,9,10,11},11}, //IC
125 {{1,2,3,4,5,6,7,8,9,10,11,12,13,36,40,44,48,52,56,60,64},21}, //ETSI
126 {{1,2,3,4,5,6,7,8,9,10,11,12,13},13}, //Spain. Change to ETSI.
127 {{1,2,3,4,5,6,7,8,9,10,11,12,13},13}, //France. Change to ETSI.
128 {{1,2,3,4,5,6,7,8,9,10,11,12,13,14,36,40,44,48,52,56,60,64},22}, //MKK //MKK
129 {{1,2,3,4,5,6,7,8,9,10,11,12,13,14,36,40,44,48,52,56,60,64},22},//MKK1
130 {{1,2,3,4,5,6,7,8,9,10,11,12,13},13}, //Israel.
131 {{1,2,3,4,5,6,7,8,9,10,11,12,13,14,36,40,44,48,52,56,60,64},22}, // For 11a , TELEC
132 {{1,2,3,4,5,6,7,8,9,10,11,12,13,14,36,40,44,48,52,56,60,64}, 22}, //MIC
133 {{1,2,3,4,5,6,7,8,9,10,11,12,13,14},14} //For Global Domain. 1-11:active scan, 12-14 passive scan. //+YJ, 080626
134};
135
136static void rtl819x_set_channel_map(u8 channel_plan, struct r8192_priv* priv)
137{
138 int i, max_chan=-1, min_chan=-1;
139 struct ieee80211_device* ieee = priv->ieee80211;
140 switch (channel_plan)
141 {
142 case COUNTRY_CODE_FCC:
143 case COUNTRY_CODE_IC:
144 case COUNTRY_CODE_ETSI:
145 case COUNTRY_CODE_SPAIN:
146 case COUNTRY_CODE_FRANCE:
147 case COUNTRY_CODE_MKK:
148 case COUNTRY_CODE_MKK1:
149 case COUNTRY_CODE_ISRAEL:
150 case COUNTRY_CODE_TELEC:
151 case COUNTRY_CODE_MIC:
152 {
153 Dot11d_Init(ieee);
154 ieee->bGlobalDomain = false;
155 //acturally 8225 & 8256 rf chip only support B,G,24N mode
6f304eb2
MM		 156 min_chan = 1;
157 max_chan = 14;
158
ecdfa446
GKH		 159 if (ChannelPlan[channel_plan].Len != 0){
160 // Clear old channel map
161 memset(GET_DOT11D_INFO(ieee)->channel_map, 0, sizeof(GET_DOT11D_INFO(ieee)->channel_map));
162 // Set new channel map
163 for (i=0;i<ChannelPlan[channel_plan].Len;i++)
164 {
165 if (ChannelPlan[channel_plan].Channel[i] < min_chan || ChannelPlan[channel_plan].Channel[i] > max_chan)
166 break;
167 GET_DOT11D_INFO(ieee)->channel_map[ChannelPlan[channel_plan].Channel[i]] = 1;
168 }
169 }
170 break;
171 }
172 case COUNTRY_CODE_GLOBAL_DOMAIN:
173 {
174 GET_DOT11D_INFO(ieee)->bEnabled = 0; //this flag enabled to follow 11d country IE setting, otherwise, it shall follow global domain setting
175 Dot11d_Reset(ieee);
176 ieee->bGlobalDomain = true;
177 break;
178 }
179 default:
180 break;
181 }
182}
183#endif
184
52cab756
MM		 185static inline bool rx_hal_is_cck_rate(prx_fwinfo_819x_pci pdrvinfo)
186{
187 return (pdrvinfo->RxRate == DESC90_RATE1M ||
188 pdrvinfo->RxRate == DESC90_RATE2M ||
189 pdrvinfo->RxRate == DESC90_RATE5_5M ||
190 pdrvinfo->RxRate == DESC90_RATE11M) &&
191 !pdrvinfo->RxHT;
192}
ecdfa446
GKH		 193
194void CamResetAllEntry(struct net_device *dev)
195{
3f9ab1ee
MM		 196 struct r8192_priv* priv = ieee80211_priv(dev);
197 write_nic_dword(priv, RWCAM, BIT31|BIT30);
ecdfa446
GKH		 198}
199
3f9ab1ee 200void write_cam(struct r8192_priv *priv, u8 addr, u32 data)
ecdfa446 201{
3f9ab1ee
MM		 202 write_nic_dword(priv, WCAMI, data);
203 write_nic_dword(priv, RWCAM, BIT31|BIT16|(addr&0xff) );
ecdfa446 204}
3f9ab1ee
MM		 205
206u32 read_cam(struct r8192_priv *priv, u8 addr)
ecdfa446 207{
3f9ab1ee
MM		 208 write_nic_dword(priv, RWCAM, 0x80000000|(addr&0xff) );
209 return read_nic_dword(priv, 0xa8);
ecdfa446
GKH		 210}
211
3f9ab1ee 212u8 read_nic_byte(struct r8192_priv *priv, int x)
ecdfa446 213{
3f9ab1ee 214 struct net_device *dev = priv->ieee80211->dev;
ecdfa446
GKH		 215 return 0xff&readb((u8*)dev->mem_start +x);
216}
217
3f9ab1ee 218u32 read_nic_dword(struct r8192_priv *priv, int x)
ecdfa446 219{
3f9ab1ee 220 struct net_device *dev = priv->ieee80211->dev;
ecdfa446
GKH		 221 return readl((u8*)dev->mem_start +x);
222}
223
3f9ab1ee 224u16 read_nic_word(struct r8192_priv *priv, int x)
ecdfa446 225{
3f9ab1ee 226 struct net_device *dev = priv->ieee80211->dev;
ecdfa446
GKH		 227 return readw((u8*)dev->mem_start +x);
228}
229
3f9ab1ee 230void write_nic_byte(struct r8192_priv *priv, int x,u8 y)
ecdfa446 231{
3f9ab1ee 232 struct net_device *dev = priv->ieee80211->dev;
ecdfa446
GKH		 233 writeb(y,(u8*)dev->mem_start +x);
234 udelay(20);
235}
236
3f9ab1ee 237void write_nic_dword(struct r8192_priv *priv, int x,u32 y)
ecdfa446 238{
3f9ab1ee 239 struct net_device *dev = priv->ieee80211->dev;
ecdfa446
GKH		 240 writel(y,(u8*)dev->mem_start +x);
241 udelay(20);
242}
243
3f9ab1ee 244void write_nic_word(struct r8192_priv *priv, int x,u16 y)
ecdfa446 245{
3f9ab1ee 246 struct net_device *dev = priv->ieee80211->dev;
ecdfa446
GKH		 247 writew(y,(u8*)dev->mem_start +x);
248 udelay(20);
249}
250
65a43784 251u8 rtl8192e_ap_sec_type(struct ieee80211_device *ieee)
252{
4a533365
MM		 253 static const u8 ccmp_ie[4] = {0x00,0x50,0xf2,0x04};
254 static const u8 ccmp_rsn_ie[4] = {0x00, 0x0f, 0xac, 0x04};
65a43784 255 int wpa_ie_len= ieee->wpa_ie_len;
256 struct ieee80211_crypt_data* crypt;
257 int encrypt;
258
259 crypt = ieee->crypt[ieee->tx_keyidx];
260
207b58fb
MM		 261 encrypt = (ieee->current_network.capability & WLAN_CAPABILITY_PRIVACY) ||
262 (ieee->host_encrypt && crypt && crypt->ops &&
65a43784 263 (0 == strcmp(crypt->ops->name,"WEP")));
264
265 /* simply judge */
266 if(encrypt && (wpa_ie_len == 0)) {
267 // wep encryption, no N mode setting */
268 return SEC_ALG_WEP;
269 } else if((wpa_ie_len != 0)) {
270 // parse pairwise key type */
271 if (((ieee->wpa_ie[0] == 0xdd) && (!memcmp(&(ieee->wpa_ie[14]),ccmp_ie,4))) ||
272 ((ieee->wpa_ie[0] == 0x30) && (!memcmp(&ieee->wpa_ie[10],ccmp_rsn_ie, 4))))
273 return SEC_ALG_CCMP;
274 else
275 return SEC_ALG_TKIP;
276 } else {
277 return SEC_ALG_NONE;
278 }
279}
280
281void
282rtl8192e_SetHwReg(struct net_device *dev,u8 variable,u8* val)
283{
284 struct r8192_priv* priv = ieee80211_priv(dev);
285
286 switch(variable)
287 {
288
289 case HW_VAR_BSSID:
3f9ab1ee
MM		 290 write_nic_dword(priv, BSSIDR, ((u32*)(val))[0]);
291 write_nic_word(priv, BSSIDR+2, ((u16*)(val+2))[0]);
65a43784 292 break;
293
294 case HW_VAR_MEDIA_STATUS:
295 {
296 RT_OP_MODE OpMode = *((RT_OP_MODE *)(val));
3f9ab1ee 297 u8 btMsr = read_nic_byte(priv, MSR);
65a43784 298
299 btMsr &= 0xfc;
300
301 switch(OpMode)
302 {
303 case RT_OP_MODE_INFRASTRUCTURE:
304 btMsr |= MSR_INFRA;
65a43784 305 break;
306
307 case RT_OP_MODE_IBSS:
308 btMsr |= MSR_ADHOC;
65a43784 309 break;
310
311 case RT_OP_MODE_AP:
312 btMsr |= MSR_AP;
65a43784 313 break;
314
315 default:
316 btMsr |= MSR_NOLINK;
317 break;
318 }
319
3f9ab1ee 320 write_nic_byte(priv, MSR, btMsr);
65a43784 321 }
322 break;
323
951fc8ed 324 case HW_VAR_CHECK_BSSID:
65a43784 325 {
326 u32 RegRCR, Type;
327
328 Type = ((u8*)(val))[0];
3f9ab1ee 329 RegRCR = read_nic_dword(priv, RCR);
65a43784 330 priv->ReceiveConfig = RegRCR;
331
332 if (Type == true)
333 RegRCR |= (RCR_CBSSID);
334 else if (Type == false)
335 RegRCR &= (~RCR_CBSSID);
336
3f9ab1ee 337 write_nic_dword(priv, RCR,RegRCR);
65a43784 338 priv->ReceiveConfig = RegRCR;
339
340 }
341 break;
342
343 case HW_VAR_SLOT_TIME:
344 {
65a43784 345 priv->slot_time = val[0];
3f9ab1ee 346 write_nic_byte(priv, SLOT_TIME, val[0]);
65a43784 347
348 }
349 break;
350
351 case HW_VAR_ACK_PREAMBLE:
352 {
353 u32 regTmp = 0;
354 priv->short_preamble = (bool)(*(u8*)val );
355 regTmp = priv->basic_rate;
356 if (priv->short_preamble)
357 regTmp |= BRSR_AckShortPmb;
3f9ab1ee 358 write_nic_dword(priv, RRSR, regTmp);
65a43784 359 }
360 break;
361
362 case HW_VAR_CPU_RST:
3f9ab1ee 363 write_nic_dword(priv, CPU_GEN, ((u32*)(val))[0]);
65a43784 364 break;
365
366 default:
367 break;
368 }
369
370}
371
ecdfa446
GKH		 372static struct proc_dir_entry *rtl8192_proc = NULL;
373
ecdfa446
GKH		 374static int proc_get_stats_ap(char *page, char **start,
375 off_t offset, int count,
376 int *eof, void *data)
377{
378 struct net_device *dev = data;
379 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
380 struct ieee80211_device *ieee = priv->ieee80211;
381 struct ieee80211_network *target;
ecdfa446
GKH		 382 int len = 0;
383
384 list_for_each_entry(target, &ieee->network_list, list) {
385
386 len += snprintf(page + len, count - len,
387 "%s ", target->ssid);
388
389 if(target->wpa_ie_len>0 || target->rsn_ie_len>0){
390 len += snprintf(page + len, count - len,
391 "WPA\n");
392 }
393 else{
394 len += snprintf(page + len, count - len,
395 "non_WPA\n");
396 }
397
398 }
399
400 *eof = 1;
401 return len;
402}
403
404static int proc_get_registers(char *page, char **start,
405 off_t offset, int count,
406 int *eof, void *data)
407{
408 struct net_device *dev = data;
3f9ab1ee 409 struct r8192_priv *priv = ieee80211_priv(dev);
ecdfa446
GKH		 410 int len = 0;
411 int i,n;
ecdfa446
GKH		 412 int max=0xff;
413
414 /* This dump the current register page */
415 len += snprintf(page + len, count - len,
416 "\n####################page 0##################\n ");
417
418 for(n=0;n<=max;)
419 {
ecdfa446
GKH		 420 len += snprintf(page + len, count - len,
421 "\nD: %2x > ",n);
422
423 for(i=0;i<16 && n<=max;i++,n++)
424 len += snprintf(page + len, count - len,
3f9ab1ee 425 "%2x ",read_nic_byte(priv,n));
ecdfa446
GKH		 426 }
427 len += snprintf(page + len, count - len,"\n");
428 len += snprintf(page + len, count - len,
429 "\n####################page 1##################\n ");
430 for(n=0;n<=max;)
431 {
ecdfa446
GKH		 432 len += snprintf(page + len, count - len,
433 "\nD: %2x > ",n);
434
435 for(i=0;i<16 && n<=max;i++,n++)
436 len += snprintf(page + len, count - len,
3f9ab1ee 437 "%2x ",read_nic_byte(priv,0x100|n));
ecdfa446
GKH		 438 }
439
440 len += snprintf(page + len, count - len,
441 "\n####################page 3##################\n ");
442 for(n=0;n<=max;)
443 {
ecdfa446
GKH		 444 len += snprintf(page + len, count - len,
445 "\nD: %2x > ",n);
446
447 for(i=0;i<16 && n<=max;i++,n++)
448 len += snprintf(page + len, count - len,
3f9ab1ee 449 "%2x ",read_nic_byte(priv,0x300|n));
ecdfa446
GKH		 450 }
451
ecdfa446
GKH		 452 *eof = 1;
453 return len;
454
455}
456
ecdfa446
GKH		 457static int proc_get_stats_tx(char *page, char **start,
458 off_t offset, int count,
459 int *eof, void *data)
460{
461 struct net_device *dev = data;
462 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
463
464 int len = 0;
465
466 len += snprintf(page + len, count - len,
467 "TX VI priority ok int: %lu\n"
ecdfa446 468 "TX VO priority ok int: %lu\n"
ecdfa446 469 "TX BE priority ok int: %lu\n"
ecdfa446 470 "TX BK priority ok int: %lu\n"
ecdfa446 471 "TX MANAGE priority ok int: %lu\n"
ecdfa446
GKH		 472 "TX BEACON priority ok int: %lu\n"
473 "TX BEACON priority error int: %lu\n"
474 "TX CMDPKT priority ok int: %lu\n"
ecdfa446
GKH		 475 "TX queue stopped?: %d\n"
476 "TX fifo overflow: %lu\n"
ecdfa446
GKH		 477 "TX total data packets %lu\n"
478 "TX total data bytes :%lu\n",
ecdfa446 479 priv->stats.txviokint,
ecdfa446 480 priv->stats.txvookint,
ecdfa446 481 priv->stats.txbeokint,
ecdfa446 482 priv->stats.txbkokint,
ecdfa446 483 priv->stats.txmanageokint,
ecdfa446
GKH		 484 priv->stats.txbeaconokint,
485 priv->stats.txbeaconerr,
486 priv->stats.txcmdpktokint,
ecdfa446
GKH		 487 netif_queue_stopped(dev),
488 priv->stats.txoverflow,
ecdfa446 489 priv->ieee80211->stats.tx_packets,
3059f2de 490 priv->ieee80211->stats.tx_bytes);
ecdfa446
GKH		 491
492 *eof = 1;
493 return len;
494}
495
496
497
498static int proc_get_stats_rx(char *page, char **start,
499 off_t offset, int count,
500 int *eof, void *data)
501{
502 struct net_device *dev = data;
503 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
504
505 int len = 0;
506
507 len += snprintf(page + len, count - len,
508 "RX packets: %lu\n"
509 "RX desc err: %lu\n"
c282f2e3 510 "RX rx overflow error: %lu\n",
ecdfa446
GKH		 511 priv->stats.rxint,
512 priv->stats.rxrdu,
c282f2e3 513 priv->stats.rxoverflow);
ecdfa446
GKH		 514
515 *eof = 1;
516 return len;
517}
518
5e1ad18a 519static void rtl8192_proc_module_init(void)
ecdfa446
GKH		 520{
521 RT_TRACE(COMP_INIT, "Initializing proc filesystem");
ecdfa446 522 rtl8192_proc=create_proc_entry(RTL819xE_MODULE_NAME, S_IFDIR, init_net.proc_net);
ecdfa446
GKH		 523}
524
525
5e1ad18a 526static void rtl8192_proc_module_remove(void)
ecdfa446 527{
ecdfa446 528 remove_proc_entry(RTL819xE_MODULE_NAME, init_net.proc_net);
ecdfa446
GKH		 529}
530
531
5e1ad18a 532static void rtl8192_proc_remove_one(struct net_device *dev)
ecdfa446
GKH		 533{
534 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
535
536 printk("dev name=======> %s\n",dev->name);
537
538 if (priv->dir_dev) {
ecdfa446
GKH		 539 remove_proc_entry("stats-tx", priv->dir_dev);
540 remove_proc_entry("stats-rx", priv->dir_dev);
ecdfa446
GKH		 541 remove_proc_entry("stats-ap", priv->dir_dev);
542 remove_proc_entry("registers", priv->dir_dev);
ecdfa446
GKH		 543 remove_proc_entry("wlan0", rtl8192_proc);
544 priv->dir_dev = NULL;
545 }
546}
547
548
5e1ad18a 549static void rtl8192_proc_init_one(struct net_device *dev)
ecdfa446
GKH		 550{
551 struct proc_dir_entry *e;
552 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
553 priv->dir_dev = create_proc_entry(dev->name,
554 S_IFDIR | S_IRUGO | S_IXUGO,
555 rtl8192_proc);
556 if (!priv->dir_dev) {
557 RT_TRACE(COMP_ERR, "Unable to initialize /proc/net/rtl8192/%s\n",
558 dev->name);
559 return;
560 }
ecdfa446
GKH		 561 e = create_proc_read_entry("stats-rx", S_IFREG | S_IRUGO,
562 priv->dir_dev, proc_get_stats_rx, dev);
563
564 if (!e) {
565 RT_TRACE(COMP_ERR,"Unable to initialize "
566 "/proc/net/rtl8192/%s/stats-rx\n",
567 dev->name);
568 }
569
570
571 e = create_proc_read_entry("stats-tx", S_IFREG | S_IRUGO,
572 priv->dir_dev, proc_get_stats_tx, dev);
573
574 if (!e) {
575 RT_TRACE(COMP_ERR, "Unable to initialize "
576 "/proc/net/rtl8192/%s/stats-tx\n",
577 dev->name);
578 }
ecdfa446
GKH		 579
580 e = create_proc_read_entry("stats-ap", S_IFREG | S_IRUGO,
581 priv->dir_dev, proc_get_stats_ap, dev);
582
583 if (!e) {
584 RT_TRACE(COMP_ERR, "Unable to initialize "
585 "/proc/net/rtl8192/%s/stats-ap\n",
586 dev->name);
587 }
588
589 e = create_proc_read_entry("registers", S_IFREG | S_IRUGO,
590 priv->dir_dev, proc_get_registers, dev);
591 if (!e) {
592 RT_TRACE(COMP_ERR, "Unable to initialize "
593 "/proc/net/rtl8192/%s/registers\n",
594 dev->name);
595 }
ecdfa446 596}
ecdfa446 597
9f17b076 598static short check_nic_enough_desc(struct net_device *dev, int prio)
ecdfa446
GKH		 599{
600 struct r8192_priv *priv = ieee80211_priv(dev);
601 struct rtl8192_tx_ring *ring = &priv->tx_ring[prio];
602
603 /* for now we reserve two free descriptor as a safety boundary
604 * between the tail and the head
605 */
285f660c 606 return (ring->entries - skb_queue_len(&ring->queue) >= 2);
ecdfa446
GKH		 607}
608
5e1ad18a 609static void tx_timeout(struct net_device *dev)
ecdfa446
GKH		 610{
611 struct r8192_priv *priv = ieee80211_priv(dev);
ecdfa446 612
ecdfa446 613 schedule_work(&priv->reset_wq);
ecdfa446
GKH		 614 printk("TXTIMEOUT");
615}
616
5e1ad18a 617static void rtl8192_irq_enable(struct net_device *dev)
ecdfa446
GKH		 618{
619 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
3f9ab1ee 620 write_nic_dword(priv, INTA_MASK, priv->irq_mask);
ecdfa446
GKH		 621}
622
9f17b076 623static void rtl8192_irq_disable(struct net_device *dev)
ecdfa446
GKH		 624{
625 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
626
3f9ab1ee 627 write_nic_dword(priv, INTA_MASK, 0);
4bbedb27 628 synchronize_irq(dev->irq);
ecdfa446
GKH		 629}
630
9f17b076 631static void rtl8192_update_msr(struct net_device *dev)
ecdfa446
GKH		 632{
633 struct r8192_priv *priv = ieee80211_priv(dev);
634 u8 msr;
635
3f9ab1ee 636 msr = read_nic_byte(priv, MSR);
ecdfa446
GKH		 637 msr &= ~ MSR_LINK_MASK;
638
639 /* do not change in link_state != WLAN_LINK_ASSOCIATED.
640 * msr must be updated if the state is ASSOCIATING.
641 * this is intentional and make sense for ad-hoc and
642 * master (see the create BSS/IBSS func)
643 */
644 if (priv->ieee80211->state == IEEE80211_LINKED){
645
646 if (priv->ieee80211->iw_mode == IW_MODE_INFRA)
647 msr |= (MSR_LINK_MANAGED<<MSR_LINK_SHIFT);
648 else if (priv->ieee80211->iw_mode == IW_MODE_ADHOC)
649 msr |= (MSR_LINK_ADHOC<<MSR_LINK_SHIFT);
650 else if (priv->ieee80211->iw_mode == IW_MODE_MASTER)
651 msr |= (MSR_LINK_MASTER<<MSR_LINK_SHIFT);
652
653 }else
654 msr |= (MSR_LINK_NONE<<MSR_LINK_SHIFT);
655
3f9ab1ee 656 write_nic_byte(priv, MSR, msr);
ecdfa446
GKH		 657}
658
9f17b076 659static void rtl8192_set_chan(struct net_device *dev,short ch)
ecdfa446 660{
61d0e67a 661 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
ecdfa446 662
61d0e67a 663 priv->chan = ch;
ecdfa446 664
61d0e67a 665 /* need to implement rf set channel here WB */
ecdfa446 666
61d0e67a
MM		 667 if (priv->rf_set_chan)
668 priv->rf_set_chan(dev, priv->chan);
ecdfa446
GKH		 669}
670
9f17b076 671static void rtl8192_rx_enable(struct net_device *dev)
ecdfa446 672{
7aed48d9
MM		 673 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
674
3f9ab1ee 675 write_nic_dword(priv, RDQDA,priv->rx_ring_dma);
ecdfa446
GKH		 676}
677
678/* the TX_DESC_BASE setting is according to the following queue index
679 * BK_QUEUE ===> 0
680 * BE_QUEUE ===> 1
681 * VI_QUEUE ===> 2
682 * VO_QUEUE ===> 3
683 * HCCA_QUEUE ===> 4
684 * TXCMD_QUEUE ===> 5
685 * MGNT_QUEUE ===> 6
686 * HIGH_QUEUE ===> 7
687 * BEACON_QUEUE ===> 8
688 * */
881a975b 689static const u32 TX_DESC_BASE[] = {BKQDA, BEQDA, VIQDA, VOQDA, HCCAQDA, CQDA, MQDA, HQDA, BQDA};
9f17b076 690static void rtl8192_tx_enable(struct net_device *dev)
ecdfa446 691{
7aed48d9
MM		 692 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
693 u32 i;
ecdfa446 694
7aed48d9 695 for (i = 0; i < MAX_TX_QUEUE_COUNT; i++)
3f9ab1ee 696 write_nic_dword(priv, TX_DESC_BASE[i], priv->tx_ring[i].dma);
7aed48d9
MM		 697
698 ieee80211_reset_queue(priv->ieee80211);
ecdfa446
GKH		 699}
700
ecdfa446
GKH		 701
702static void rtl8192_free_rx_ring(struct net_device *dev)
703{
7aed48d9
MM		 704 struct r8192_priv *priv = ieee80211_priv(dev);
705 int i;
ecdfa446 706
7aed48d9
MM		 707 for (i = 0; i < priv->rxringcount; i++) {
708 struct sk_buff *skb = priv->rx_buf[i];
709 if (!skb)
710 continue;
ecdfa446 711
7aed48d9
MM		 712 pci_unmap_single(priv->pdev,
713 *((dma_addr_t *)skb->cb),
714 priv->rxbuffersize, PCI_DMA_FROMDEVICE);
715 kfree_skb(skb);
716 }
ecdfa446 717
7aed48d9
MM		 718 pci_free_consistent(priv->pdev, sizeof(*priv->rx_ring) * priv->rxringcount,
719 priv->rx_ring, priv->rx_ring_dma);
720 priv->rx_ring = NULL;
ecdfa446
GKH		 721}
722
723static void rtl8192_free_tx_ring(struct net_device *dev, unsigned int prio)
724{
7aed48d9
MM		 725 struct r8192_priv *priv = ieee80211_priv(dev);
726 struct rtl8192_tx_ring *ring = &priv->tx_ring[prio];
ecdfa446 727
7aed48d9
MM		 728 while (skb_queue_len(&ring->queue)) {
729 tx_desc_819x_pci *entry = &ring->desc[ring->idx];
730 struct sk_buff *skb = __skb_dequeue(&ring->queue);
ecdfa446 731
7aed48d9
MM		 732 pci_unmap_single(priv->pdev, le32_to_cpu(entry->TxBuffAddr),
733 skb->len, PCI_DMA_TODEVICE);
734 kfree_skb(skb);
735 ring->idx = (ring->idx + 1) % ring->entries;
736 }
ecdfa446 737
7aed48d9
MM		 738 pci_free_consistent(priv->pdev, sizeof(*ring->desc)*ring->entries,
739 ring->desc, ring->dma);
740 ring->desc = NULL;
ecdfa446
GKH		 741}
742
16d74da0 743void PHY_SetRtl8192eRfOff(struct net_device* dev)
ecdfa446 744{
3f9ab1ee
MM		 745 struct r8192_priv *priv = ieee80211_priv(dev);
746
65a43784 747 //disable RF-Chip A/B
748 rtl8192_setBBreg(dev, rFPGA0_XA_RFInterfaceOE, BIT4, 0x0);
749 //analog to digital off, for power save
750 rtl8192_setBBreg(dev, rFPGA0_AnalogParameter4, 0x300, 0x0);
751 //digital to analog off, for power save
752 rtl8192_setBBreg(dev, rFPGA0_AnalogParameter1, 0x18, 0x0);
753 //rx antenna off
754 rtl8192_setBBreg(dev, rOFDM0_TRxPathEnable, 0xf, 0x0);
755 //rx antenna off
756 rtl8192_setBBreg(dev, rOFDM1_TRxPathEnable, 0xf, 0x0);
757 //analog to digital part2 off, for power save
758 rtl8192_setBBreg(dev, rFPGA0_AnalogParameter1, 0x60, 0x0);
759 rtl8192_setBBreg(dev, rFPGA0_AnalogParameter1, 0x4, 0x0);
760 // Analog parameter!!Change bias and Lbus control.
3f9ab1ee 761 write_nic_byte(priv, ANAPAR_FOR_8192PciE, 0x07);
65a43784 762
763}
ecdfa446 764
9f17b076 765static void rtl8192_halt_adapter(struct net_device *dev, bool reset)
ecdfa446 766{
ecdfa446 767 struct r8192_priv *priv = ieee80211_priv(dev);
65a43784 768 int i;
932f4b3a
MM		 769 u8 OpMode;
770 u32 ulRegRead;
65a43784 771
772 OpMode = RT_OP_MODE_NO_LINK;
773 priv->ieee80211->SetHwRegHandler(dev, HW_VAR_MEDIA_STATUS, &OpMode);
ecdfa446 774
932f4b3a
MM		 775 if (!priv->ieee80211->bSupportRemoteWakeUp) {
776 /*
777 * disable tx/rx. In 8185 we write 0x10 (Reset bit),
778 * but here we make reference to WMAC and wirte 0x0
779 */
3f9ab1ee 780 write_nic_byte(priv, CMDR, 0);
65a43784 781 }
ecdfa446 782
65a43784 783 mdelay(20);
ecdfa446 784
932f4b3a 785 if (!reset) {
65a43784 786 mdelay(150);
787
932f4b3a 788 priv->bHwRfOffAction = 2;
65a43784 789
932f4b3a
MM		 790 /*
791 * Call MgntActSet_RF_State instead to
792 * prevent RF config race condition.
793 */
794 if (!priv->ieee80211->bSupportRemoteWakeUp) {
65a43784 795 PHY_SetRtl8192eRfOff(dev);
3f9ab1ee 796 ulRegRead = read_nic_dword(priv, CPU_GEN);
932f4b3a 797 ulRegRead |= CPU_GEN_SYSTEM_RESET;
3f9ab1ee 798 write_nic_dword(priv,CPU_GEN, ulRegRead);
932f4b3a
MM		 799 } else {
800 /* for WOL */
3f9ab1ee
MM		 801 write_nic_dword(priv, WFCRC0, 0xffffffff);
802 write_nic_dword(priv, WFCRC1, 0xffffffff);
803 write_nic_dword(priv, WFCRC2, 0xffffffff);
65a43784 804
932f4b3a 805 /* Write PMR register */
3f9ab1ee 806 write_nic_byte(priv, PMR, 0x5);
932f4b3a 807 /* Disable tx, enanble rx */
3f9ab1ee 808 write_nic_byte(priv, MacBlkCtrl, 0xa);
65a43784 809 }
810 }
811
812 for(i = 0; i < MAX_QUEUE_SIZE; i++) {
813 skb_queue_purge(&priv->ieee80211->skb_waitQ [i]);
814 }
815 for(i = 0; i < MAX_QUEUE_SIZE; i++) {
816 skb_queue_purge(&priv->ieee80211->skb_aggQ [i]);
817 }
ecdfa446
GKH		 818
819 skb_queue_purge(&priv->skb_queue);
ecdfa446
GKH		 820}
821
5e1ad18a 822static void rtl8192_data_hard_stop(struct net_device *dev)
ecdfa446 823{
ecdfa446
GKH		 824}
825
5e1ad18a 826static void rtl8192_data_hard_resume(struct net_device *dev)
ecdfa446 827{
ecdfa446
GKH		 828}
829
214985a6
MM		 830/*
831 * this function TX data frames when the ieee80211 stack requires this.
ecdfa446
GKH		 832 * It checks also if we need to stop the ieee tx queue, eventually do it
833 */
5e1ad18a 834static void rtl8192_hard_data_xmit(struct sk_buff *skb, struct net_device *dev, int rate)
ecdfa446
GKH		 835{
836 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
837 int ret;
ecdfa446
GKH		 838 cb_desc *tcb_desc = (cb_desc *)(skb->cb + MAX_DEV_ADDR_SIZE);
839 u8 queue_index = tcb_desc->queue_index;
dcf663fb 840
ecdfa446 841 /* shall not be referred by command packet */
5d33549a 842 BUG_ON(queue_index == TXCMD_QUEUE);
ecdfa446 843
dcf663fb 844 if (priv->bHwRadioOff || (!priv->up))
65a43784 845 {
846 kfree_skb(skb);
847 return;
848 }
849
dcf663fb 850 memcpy(skb->cb, &dev, sizeof(dev));
ecdfa446 851
ecdfa446
GKH		 852 skb_push(skb, priv->ieee80211->tx_headroom);
853 ret = rtl8192_tx(dev, skb);
dcf663fb 854 if (ret != 0) {
ecdfa446 855 kfree_skb(skb);
ecdfa446
GKH		 856 }
857
dcf663fb
MM		 858 if (queue_index != MGNT_QUEUE) {
859 priv->ieee80211->stats.tx_bytes += (skb->len - priv->ieee80211->tx_headroom);
860 priv->ieee80211->stats.tx_packets++;
861 }
ecdfa446
GKH		 862}
863
214985a6
MM		 864/*
865 * This is a rough attempt to TX a frame
ecdfa446
GKH		 866 * This is called by the ieee 80211 stack to TX management frames.
867 * If the ring is full packet are dropped (for data frame the queue
868 * is stopped before this can happen).
869 */
5e1ad18a 870static int rtl8192_hard_start_xmit(struct sk_buff *skb,struct net_device *dev)
ecdfa446
GKH		 871{
872 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
ecdfa446 873 int ret;
ecdfa446
GKH		 874 cb_desc *tcb_desc = (cb_desc *)(skb->cb + MAX_DEV_ADDR_SIZE);
875 u8 queue_index = tcb_desc->queue_index;
876
162f535f
MM		 877 if (queue_index != TXCMD_QUEUE) {
878 if (priv->bHwRadioOff || (!priv->up))
65a43784 879 {
162f535f
MM		 880 kfree_skb(skb);
881 return 0;
882 }
65a43784 883 }
ecdfa446 884
162f535f
MM		 885 memcpy(skb->cb, &dev, sizeof(dev));
886 if (queue_index == TXCMD_QUEUE) {
ecdfa446
GKH		 887 rtl819xE_tx_cmd(dev, skb);
888 ret = 0;
ecdfa446
GKH		 889 return ret;
890 } else {
ecdfa446
GKH		 891 tcb_desc->RATRIndex = 7;
892 tcb_desc->bTxDisableRateFallBack = 1;
893 tcb_desc->bTxUseDriverAssingedRate = 1;
894 tcb_desc->bTxEnableFwCalcDur = 1;
895 skb_push(skb, priv->ieee80211->tx_headroom);
896 ret = rtl8192_tx(dev, skb);
162f535f 897 if (ret != 0) {
ecdfa446 898 kfree_skb(skb);
162f535f 899 }
ecdfa446
GKH		 900 }
901
ecdfa446 902 return ret;
ecdfa446
GKH		 903}
904
905
5e1ad18a 906static void rtl8192_tx_isr(struct net_device *dev, int prio)
ecdfa446 907{
a922a4b7
MM		 908 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
909 struct rtl8192_tx_ring *ring = &priv->tx_ring[prio];
ecdfa446 910
a922a4b7
MM		 911 while (skb_queue_len(&ring->queue)) {
912 tx_desc_819x_pci *entry = &ring->desc[ring->idx];
913 struct sk_buff *skb;
ecdfa446 914
a922a4b7
MM		 915 /*
916 * beacon packet will only use the first descriptor defaultly,
917 * and the OWN may not be cleared by the hardware
918 */
919 if (prio != BEACON_QUEUE) {
920 if (entry->OWN)
921 return;
922 ring->idx = (ring->idx + 1) % ring->entries;
923 }
ecdfa446 924
a922a4b7
MM		 925 skb = __skb_dequeue(&ring->queue);
926 pci_unmap_single(priv->pdev, le32_to_cpu(entry->TxBuffAddr),
927 skb->len, PCI_DMA_TODEVICE);
ecdfa446 928
a922a4b7
MM		 929 kfree_skb(skb);
930 }
ecdfa446 931
a922a4b7
MM		 932 if (prio != BEACON_QUEUE) {
933 /* try to deal with the pending packets */
934 tasklet_schedule(&priv->irq_tx_tasklet);
935 }
ecdfa446
GKH		 936}
937
5e1ad18a 938static void rtl8192_stop_beacon(struct net_device *dev)
ecdfa446 939{
ecdfa446
GKH		 940}
941
5e1ad18a 942static void rtl8192_config_rate(struct net_device* dev, u16* rate_config)
ecdfa446
GKH		 943{
944 struct r8192_priv *priv = ieee80211_priv(dev);
945 struct ieee80211_network *net;
946 u8 i=0, basic_rate = 0;
947 net = & priv->ieee80211->current_network;
948
949 for (i=0; i<net->rates_len; i++)
950 {
951 basic_rate = net->rates[i]&0x7f;
952 switch(basic_rate)
953 {
954 case MGN_1M: *rate_config |= RRSR_1M; break;
955 case MGN_2M: *rate_config |= RRSR_2M; break;
956 case MGN_5_5M: *rate_config |= RRSR_5_5M; break;
957 case MGN_11M: *rate_config |= RRSR_11M; break;
958 case MGN_6M: *rate_config |= RRSR_6M; break;
959 case MGN_9M: *rate_config |= RRSR_9M; break;
960 case MGN_12M: *rate_config |= RRSR_12M; break;
961 case MGN_18M: *rate_config |= RRSR_18M; break;
962 case MGN_24M: *rate_config |= RRSR_24M; break;
963 case MGN_36M: *rate_config |= RRSR_36M; break;
964 case MGN_48M: *rate_config |= RRSR_48M; break;
965 case MGN_54M: *rate_config |= RRSR_54M; break;
966 }
967 }
968 for (i=0; i<net->rates_ex_len; i++)
969 {
970 basic_rate = net->rates_ex[i]&0x7f;
971 switch(basic_rate)
972 {
973 case MGN_1M: *rate_config |= RRSR_1M; break;
974 case MGN_2M: *rate_config |= RRSR_2M; break;
975 case MGN_5_5M: *rate_config |= RRSR_5_5M; break;
976 case MGN_11M: *rate_config |= RRSR_11M; break;
977 case MGN_6M: *rate_config |= RRSR_6M; break;
978 case MGN_9M: *rate_config |= RRSR_9M; break;
979 case MGN_12M: *rate_config |= RRSR_12M; break;
980 case MGN_18M: *rate_config |= RRSR_18M; break;
981 case MGN_24M: *rate_config |= RRSR_24M; break;
982 case MGN_36M: *rate_config |= RRSR_36M; break;
983 case MGN_48M: *rate_config |= RRSR_48M; break;
984 case MGN_54M: *rate_config |= RRSR_54M; break;
985 }
986 }
987}
988
989
990#define SHORT_SLOT_TIME 9
991#define NON_SHORT_SLOT_TIME 20
992
5e1ad18a 993static void rtl8192_update_cap(struct net_device* dev, u16 cap)
ecdfa446
GKH		 994{
995 u32 tmp = 0;
996 struct r8192_priv *priv = ieee80211_priv(dev);
997 struct ieee80211_network *net = &priv->ieee80211->current_network;
998 priv->short_preamble = cap & WLAN_CAPABILITY_SHORT_PREAMBLE;
999 tmp = priv->basic_rate;
1000 if (priv->short_preamble)
1001 tmp |= BRSR_AckShortPmb;
3f9ab1ee 1002 write_nic_dword(priv, RRSR, tmp);
ecdfa446
GKH		 1003
1004 if (net->mode & (IEEE_G|IEEE_N_24G))
1005 {
1006 u8 slot_time = 0;
1007 if ((cap & WLAN_CAPABILITY_SHORT_SLOT)&&(!priv->ieee80211->pHTInfo->bCurrentRT2RTLongSlotTime))
1008 {//short slot time
1009 slot_time = SHORT_SLOT_TIME;
1010 }
1011 else //long slot time
1012 slot_time = NON_SHORT_SLOT_TIME;
1013 priv->slot_time = slot_time;
3f9ab1ee 1014 write_nic_byte(priv, SLOT_TIME, slot_time);
ecdfa446
GKH		 1015 }
1016
1017}
5e1ad18a
GKH		 1018
1019static void rtl8192_net_update(struct net_device *dev)
ecdfa446 1020{
ecdfa446
GKH		 1021 struct r8192_priv *priv = ieee80211_priv(dev);
1022 struct ieee80211_network *net;
1023 u16 BcnTimeCfg = 0, BcnCW = 6, BcnIFS = 0xf;
1024 u16 rate_config = 0;
1025 net = &priv->ieee80211->current_network;
eb40aeac
MM		 1026
1027 /* update Basic rate: RR, BRSR */
ecdfa446 1028 rtl8192_config_rate(dev, &rate_config);
ecdfa446 1029
eb40aeac
MM		 1030 /*
1031 * Select RRSR (in Legacy-OFDM and CCK)
1032 * For 8190, we select only 24M, 12M, 6M, 11M, 5.5M,
1033 * 2M, and 1M from the Basic rate.
1034 * We do not use other rates.
1035 */
1036 priv->basic_rate = rate_config &= 0x15f;
1037
1038 /* BSSID */
3f9ab1ee
MM		 1039 write_nic_dword(priv, BSSIDR, ((u32 *)net->bssid)[0]);
1040 write_nic_word(priv, BSSIDR+4, ((u16 *)net->bssid)[2]);
ecdfa446 1041
ecdfa446
GKH		 1042 if (priv->ieee80211->iw_mode == IW_MODE_ADHOC)
1043 {
3f9ab1ee
MM		 1044 write_nic_word(priv, ATIMWND, 2);
1045 write_nic_word(priv, BCN_DMATIME, 256);
1046 write_nic_word(priv, BCN_INTERVAL, net->beacon_interval);
eb40aeac
MM		 1047 /*
1048 * BIT15 of BCN_DRV_EARLY_INT will indicate
1049 * whether software beacon or hw beacon is applied.
1050 */
3f9ab1ee
MM		 1051 write_nic_word(priv, BCN_DRV_EARLY_INT, 10);
1052 write_nic_byte(priv, BCN_ERR_THRESH, 100);
ecdfa446
GKH		 1053
1054 BcnTimeCfg |= (BcnCW<<BCN_TCFG_CW_SHIFT);
eb40aeac
MM		 1055 /* TODO: BcnIFS may required to be changed on ASIC */
1056 BcnTimeCfg |= BcnIFS<<BCN_TCFG_IFS;
3f9ab1ee 1057 write_nic_word(priv, BCN_TCFG, BcnTimeCfg);
ecdfa446 1058 }
ecdfa446
GKH		 1059}
1060
9f17b076 1061static void rtl819xE_tx_cmd(struct net_device *dev, struct sk_buff *skb)
ecdfa446
GKH		 1062{
1063 struct r8192_priv *priv = ieee80211_priv(dev);
1064 struct rtl8192_tx_ring *ring;
1065 tx_desc_819x_pci *entry;
1066 unsigned int idx;
1067 dma_addr_t mapping;
1068 cb_desc *tcb_desc;
1069 unsigned long flags;
1070
1071 ring = &priv->tx_ring[TXCMD_QUEUE];
1072 mapping = pci_map_single(priv->pdev, skb->data, skb->len, PCI_DMA_TODEVICE);
1073
1074 spin_lock_irqsave(&priv->irq_th_lock,flags);
1075 idx = (ring->idx + skb_queue_len(&ring->queue)) % ring->entries;
1076 entry = &ring->desc[idx];
1077
1078 tcb_desc = (cb_desc *)(skb->cb + MAX_DEV_ADDR_SIZE);
1079 memset(entry,0,12);
1080 entry->LINIP = tcb_desc->bLastIniPkt;
1081 entry->FirstSeg = 1;//first segment
1082 entry->LastSeg = 1; //last segment
1083 if(tcb_desc->bCmdOrInit == DESC_PACKET_TYPE_INIT) {
1084 entry->CmdInit = DESC_PACKET_TYPE_INIT;
1085 } else {
1086 entry->CmdInit = DESC_PACKET_TYPE_NORMAL;
1087 entry->Offset = sizeof(TX_FWINFO_8190PCI) + 8;
1088 entry->PktSize = (u16)(tcb_desc->pkt_size + entry->Offset);
1089 entry->QueueSelect = QSLT_CMD;
1090 entry->TxFWInfoSize = 0x08;
1091 entry->RATid = (u8)DESC_PACKET_TYPE_INIT;
1092 }
1093 entry->TxBufferSize = skb->len;
1094 entry->TxBuffAddr = cpu_to_le32(mapping);
1095 entry->OWN = 1;
1096
ecdfa446
GKH		 1097 __skb_queue_tail(&ring->queue, skb);
1098 spin_unlock_irqrestore(&priv->irq_th_lock,flags);
1099
3f9ab1ee 1100 write_nic_byte(priv, TPPoll, TPPoll_CQ);
ecdfa446
GKH		 1101
1102 return;
1103}
1104
1105/*
1106 * Mapping Software/Hardware descriptor queue id to "Queue Select Field"
1107 * in TxFwInfo data structure
214985a6 1108 */
5e1ad18a 1109static u8 MapHwQueueToFirmwareQueue(u8 QueueID)
ecdfa446 1110{
f72b6a50 1111 u8 QueueSelect = 0;
ecdfa446 1112
f72b6a50
MM		 1113 switch (QueueID) {
1114 case BE_QUEUE:
1115 QueueSelect = QSLT_BE;
1116 break;
ecdfa446 1117
f72b6a50
MM		 1118 case BK_QUEUE:
1119 QueueSelect = QSLT_BK;
1120 break;
ecdfa446 1121
f72b6a50
MM		 1122 case VO_QUEUE:
1123 QueueSelect = QSLT_VO;
1124 break;
ecdfa446 1125
f72b6a50
MM		 1126 case VI_QUEUE:
1127 QueueSelect = QSLT_VI;
1128 break;
ecdfa446 1129
f72b6a50
MM		 1130 case MGNT_QUEUE:
1131 QueueSelect = QSLT_MGNT;
1132 break;
ecdfa446 1133
f72b6a50
MM		 1134 case BEACON_QUEUE:
1135 QueueSelect = QSLT_BEACON;
1136 break;
ecdfa446 1137
f72b6a50
MM		 1138 case TXCMD_QUEUE:
1139 QueueSelect = QSLT_CMD;
1140 break;
1141
1142 case HIGH_QUEUE:
1143 default:
1144 RT_TRACE(COMP_ERR, "Impossible Queue Selection: %d\n", QueueID);
1145 break;
ecdfa446
GKH		 1146 }
1147 return QueueSelect;
1148}
1149
5e1ad18a 1150static u8 MRateToHwRate8190Pci(u8 rate)
ecdfa446
GKH		 1151{
1152 u8 ret = DESC90_RATE1M;
1153
1154 switch(rate) {
1155 case MGN_1M: ret = DESC90_RATE1M; break;
1156 case MGN_2M: ret = DESC90_RATE2M; break;
1157 case MGN_5_5M: ret = DESC90_RATE5_5M; break;
1158 case MGN_11M: ret = DESC90_RATE11M; break;
1159 case MGN_6M: ret = DESC90_RATE6M; break;
1160 case MGN_9M: ret = DESC90_RATE9M; break;
1161 case MGN_12M: ret = DESC90_RATE12M; break;
1162 case MGN_18M: ret = DESC90_RATE18M; break;
1163 case MGN_24M: ret = DESC90_RATE24M; break;
1164 case MGN_36M: ret = DESC90_RATE36M; break;
1165 case MGN_48M: ret = DESC90_RATE48M; break;
1166 case MGN_54M: ret = DESC90_RATE54M; break;
1167
1168 // HT rate since here
1169 case MGN_MCS0: ret = DESC90_RATEMCS0; break;
1170 case MGN_MCS1: ret = DESC90_RATEMCS1; break;
1171 case MGN_MCS2: ret = DESC90_RATEMCS2; break;
1172 case MGN_MCS3: ret = DESC90_RATEMCS3; break;
1173 case MGN_MCS4: ret = DESC90_RATEMCS4; break;
1174 case MGN_MCS5: ret = DESC90_RATEMCS5; break;
1175 case MGN_MCS6: ret = DESC90_RATEMCS6; break;
1176 case MGN_MCS7: ret = DESC90_RATEMCS7; break;
1177 case MGN_MCS8: ret = DESC90_RATEMCS8; break;
1178 case MGN_MCS9: ret = DESC90_RATEMCS9; break;
1179 case MGN_MCS10: ret = DESC90_RATEMCS10; break;
1180 case MGN_MCS11: ret = DESC90_RATEMCS11; break;
1181 case MGN_MCS12: ret = DESC90_RATEMCS12; break;
1182 case MGN_MCS13: ret = DESC90_RATEMCS13; break;
1183 case MGN_MCS14: ret = DESC90_RATEMCS14; break;
1184 case MGN_MCS15: ret = DESC90_RATEMCS15; break;
1185 case (0x80|0x20): ret = DESC90_RATEMCS32; break;
1186
1187 default: break;
1188 }
1189 return ret;
1190}
1191
1192
5e1ad18a 1193static u8 QueryIsShort(u8 TxHT, u8 TxRate, cb_desc *tcb_desc)
ecdfa446
GKH		 1194{
1195 u8 tmp_Short;
1196
1197 tmp_Short = (TxHT==1)?((tcb_desc->bUseShortGI)?1:0):((tcb_desc->bUseShortPreamble)?1:0);
1198
1199 if(TxHT==1 && TxRate != DESC90_RATEMCS15)
1200 tmp_Short = 0;
1201
1202 return tmp_Short;
1203}
1204
1205/*
1206 * The tx procedure is just as following,
1207 * skb->cb will contain all the following information,
1208 * priority, morefrag, rate, &dev.
214985a6 1209 */
3b10c0a4 1210static short rtl8192_tx(struct net_device *dev, struct sk_buff* skb)
ecdfa446 1211{
067ba6cf
MM		 1212 struct r8192_priv *priv = ieee80211_priv(dev);
1213 struct rtl8192_tx_ring *ring;
1214 unsigned long flags;
1215 cb_desc *tcb_desc = (cb_desc *)(skb->cb + MAX_DEV_ADDR_SIZE);
1216 tx_desc_819x_pci *pdesc = NULL;
1217 TX_FWINFO_8190PCI *pTxFwInfo = NULL;
1218 dma_addr_t mapping;
1219 bool multi_addr = false, broad_addr = false, uni_addr = false;
1220 u8 *pda_addr = NULL;
1221 int idx;
1222
1223 if (priv->bdisable_nic) {
1224 RT_TRACE(COMP_ERR, "Nic is disabled! Can't tx packet len=%d qidx=%d!!!\n",
1225 skb->len, tcb_desc->queue_index);
65a43784 1226 return skb->len;
067ba6cf 1227 }
65a43784 1228
1229#ifdef ENABLE_LPS
1230 priv->ieee80211->bAwakePktSent = true;
1231#endif
1232
067ba6cf
MM		 1233 mapping = pci_map_single(priv->pdev, skb->data, skb->len, PCI_DMA_TODEVICE);
1234
1235 /* collect the tx packets statitcs */
1236 pda_addr = ((u8 *)skb->data) + sizeof(TX_FWINFO_8190PCI);
1237 if (is_multicast_ether_addr(pda_addr))
1238 multi_addr = true;
1239 else if (is_broadcast_ether_addr(pda_addr))
1240 broad_addr = true;
1241 else
1242 uni_addr = true;
1243
1244 if (uni_addr)
1245 priv->stats.txbytesunicast += (u8)(skb->len) - sizeof(TX_FWINFO_8190PCI);
067ba6cf
MM		 1246
1247 /* fill tx firmware */
1248 pTxFwInfo = (PTX_FWINFO_8190PCI)skb->data;
1249 memset(pTxFwInfo, 0, sizeof(TX_FWINFO_8190PCI));
1250 pTxFwInfo->TxHT = (tcb_desc->data_rate&0x80) ? 1 : 0;
1251 pTxFwInfo->TxRate = MRateToHwRate8190Pci((u8)tcb_desc->data_rate);
1252 pTxFwInfo->EnableCPUDur = tcb_desc->bTxEnableFwCalcDur;
1253 pTxFwInfo->Short = QueryIsShort(pTxFwInfo->TxHT, pTxFwInfo->TxRate, tcb_desc);
1254
1255 /* Aggregation related */
1256 if (tcb_desc->bAMPDUEnable) {
1257 pTxFwInfo->AllowAggregation = 1;
1258 pTxFwInfo->RxMF = tcb_desc->ampdu_factor;
1259 pTxFwInfo->RxAMD = tcb_desc->ampdu_density;
1260 } else {
1261 pTxFwInfo->AllowAggregation = 0;
1262 pTxFwInfo->RxMF = 0;
1263 pTxFwInfo->RxAMD = 0;
1264 }
ecdfa446 1265
067ba6cf
MM		 1266 /* Protection mode related */
1267 pTxFwInfo->RtsEnable = (tcb_desc->bRTSEnable) ? 1 : 0;
1268 pTxFwInfo->CtsEnable = (tcb_desc->bCTSEnable) ? 1 : 0;
1269 pTxFwInfo->RtsSTBC = (tcb_desc->bRTSSTBC) ? 1 : 0;
1270 pTxFwInfo->RtsHT = (tcb_desc->rts_rate&0x80) ? 1 : 0;
1271 pTxFwInfo->RtsRate = MRateToHwRate8190Pci((u8)tcb_desc->rts_rate);
1272 pTxFwInfo->RtsBandwidth = 0;
1273 pTxFwInfo->RtsSubcarrier = tcb_desc->RTSSC;
1274 pTxFwInfo->RtsShort = (pTxFwInfo->RtsHT == 0) ? (tcb_desc->bRTSUseShortPreamble ? 1 : 0) : (tcb_desc->bRTSUseShortGI? 1 : 0);
1275
1276 /* Set Bandwidth and sub-channel settings. */
1277 if (priv->CurrentChannelBW == HT_CHANNEL_WIDTH_20_40) {
1278 if (tcb_desc->bPacketBW) {
1279 pTxFwInfo->TxBandwidth = 1;
067ba6cf
MM		 1280 /* use duplicated mode */
1281 pTxFwInfo->TxSubCarrier = 0;
067ba6cf
MM		 1282 } else {
1283 pTxFwInfo->TxBandwidth = 0;
1284 pTxFwInfo->TxSubCarrier = priv->nCur40MhzPrimeSC;
1285 }
1286 } else {
1287 pTxFwInfo->TxBandwidth = 0;
1288 pTxFwInfo->TxSubCarrier = 0;
1289 }
ecdfa446 1290
067ba6cf
MM		 1291 spin_lock_irqsave(&priv->irq_th_lock, flags);
1292 ring = &priv->tx_ring[tcb_desc->queue_index];
1293 if (tcb_desc->queue_index != BEACON_QUEUE)
1294 idx = (ring->idx + skb_queue_len(&ring->queue)) % ring->entries;
1295 else
1296 idx = 0;
1297
1298 pdesc = &ring->desc[idx];
1299 if ((pdesc->OWN == 1) && (tcb_desc->queue_index != BEACON_QUEUE)) {
1300 RT_TRACE(COMP_ERR, "No more TX desc@%d, ring->idx = %d,idx = %d,%x",
1301 tcb_desc->queue_index, ring->idx, idx, skb->len);
1302 spin_unlock_irqrestore(&priv->irq_th_lock, flags);
1303 return skb->len;
1304 }
ecdfa446 1305
067ba6cf
MM		 1306 /* fill tx descriptor */
1307 memset(pdesc, 0, 12);
1308
1309 /*DWORD 0*/
1310 pdesc->LINIP = 0;
1311 pdesc->CmdInit = 1;
1312 pdesc->Offset = sizeof(TX_FWINFO_8190PCI) + 8; /* We must add 8!! */
1313 pdesc->PktSize = (u16)skb->len-sizeof(TX_FWINFO_8190PCI);
1314
1315 /*DWORD 1*/
1316 pdesc->SecCAMID = 0;
1317 pdesc->RATid = tcb_desc->RATRIndex;
1318
1319 pdesc->NoEnc = 1;
1320 pdesc->SecType = 0x0;
1321 if (tcb_desc->bHwSec) {
1322 switch (priv->ieee80211->pairwise_key_type) {
1323 case KEY_TYPE_WEP40:
1324 case KEY_TYPE_WEP104:
1325 pdesc->SecType = 0x1;
1326 pdesc->NoEnc = 0;
1327 break;
1328 case KEY_TYPE_TKIP:
1329 pdesc->SecType = 0x2;
1330 pdesc->NoEnc = 0;
1331 break;
1332 case KEY_TYPE_CCMP:
1333 pdesc->SecType = 0x3;
1334 pdesc->NoEnc = 0;
1335 break;
1336 case KEY_TYPE_NA:
1337 pdesc->SecType = 0x0;
1338 pdesc->NoEnc = 1;
1339 break;
1340 }
1341 }
ecdfa446 1342
067ba6cf
MM		 1343 /* Set Packet ID */
1344 pdesc->PktId = 0x0;
ecdfa446 1345
067ba6cf
MM		 1346 pdesc->QueueSelect = MapHwQueueToFirmwareQueue(tcb_desc->queue_index);
1347 pdesc->TxFWInfoSize = sizeof(TX_FWINFO_8190PCI);
ecdfa446 1348
067ba6cf
MM		 1349 pdesc->DISFB = tcb_desc->bTxDisableRateFallBack;
1350 pdesc->USERATE = tcb_desc->bTxUseDriverAssingedRate;
ecdfa446 1351
067ba6cf
MM		 1352 pdesc->FirstSeg = 1;
1353 pdesc->LastSeg = 1;
1354 pdesc->TxBufferSize = skb->len;
ecdfa446 1355
067ba6cf
MM		 1356 pdesc->TxBuffAddr = cpu_to_le32(mapping);
1357 __skb_queue_tail(&ring->queue, skb);
1358 pdesc->OWN = 1;
1359 spin_unlock_irqrestore(&priv->irq_th_lock, flags);
1360 dev->trans_start = jiffies;
3f9ab1ee 1361 write_nic_word(priv, TPPoll, 0x01<<tcb_desc->queue_index);
067ba6cf 1362 return 0;
ecdfa446
GKH		 1363}
1364
5e1ad18a 1365static short rtl8192_alloc_rx_desc_ring(struct net_device *dev)
ecdfa446
GKH		 1366{
1367 struct r8192_priv *priv = ieee80211_priv(dev);
1368 rx_desc_819x_pci *entry = NULL;
1369 int i;
1370
1371 priv->rx_ring = pci_alloc_consistent(priv->pdev,
1372 sizeof(*priv->rx_ring) * priv->rxringcount, &priv->rx_ring_dma);
1373
1374 if (!priv->rx_ring || (unsigned long)priv->rx_ring & 0xFF) {
1375 RT_TRACE(COMP_ERR,"Cannot allocate RX ring\n");
1376 return -ENOMEM;
1377 }
1378
1379 memset(priv->rx_ring, 0, sizeof(*priv->rx_ring) * priv->rxringcount);
1380 priv->rx_idx = 0;
1381
1382 for (i = 0; i < priv->rxringcount; i++) {
1383 struct sk_buff *skb = dev_alloc_skb(priv->rxbuffersize);
1384 dma_addr_t *mapping;
1385 entry = &priv->rx_ring[i];
1386 if (!skb)
1387 return 0;
1388 priv->rx_buf[i] = skb;
1389 mapping = (dma_addr_t *)skb->cb;
1c7ec2e8 1390 *mapping = pci_map_single(priv->pdev, skb_tail_pointer(skb),
ecdfa446
GKH		 1391 priv->rxbuffersize, PCI_DMA_FROMDEVICE);
1392
1393 entry->BufferAddress = cpu_to_le32(*mapping);
1394
1395 entry->Length = priv->rxbuffersize;
1396 entry->OWN = 1;
1397 }
1398
1399 entry->EOR = 1;
1400 return 0;
1401}
1402
1403static int rtl8192_alloc_tx_desc_ring(struct net_device *dev,
1404 unsigned int prio, unsigned int entries)
1405{
1406 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
1407 tx_desc_819x_pci *ring;
1408 dma_addr_t dma;
1409 int i;
1410
1411 ring = pci_alloc_consistent(priv->pdev, sizeof(*ring) * entries, &dma);
1412 if (!ring || (unsigned long)ring & 0xFF) {
1413 RT_TRACE(COMP_ERR, "Cannot allocate TX ring (prio = %d)\n", prio);
1414 return -ENOMEM;
1415 }
1416
1417 memset(ring, 0, sizeof(*ring)*entries);
1418 priv->tx_ring[prio].desc = ring;
1419 priv->tx_ring[prio].dma = dma;
1420 priv->tx_ring[prio].idx = 0;
1421 priv->tx_ring[prio].entries = entries;
1422 skb_queue_head_init(&priv->tx_ring[prio].queue);
1423
1424 for (i = 0; i < entries; i++)
1425 ring[i].NextDescAddress =
1426 cpu_to_le32((u32)dma + ((i + 1) % entries) * sizeof(*ring));
1427
1428 return 0;
1429}
1430
5e1ad18a 1431static short rtl8192_pci_initdescring(struct net_device *dev)
ecdfa446 1432{
1f1f19ff
MM		 1433 u32 ret;
1434 int i;
1435 struct r8192_priv *priv = ieee80211_priv(dev);
ecdfa446 1436
1f1f19ff
MM		 1437 ret = rtl8192_alloc_rx_desc_ring(dev);
1438 if (ret)
1439 return ret;
ecdfa446 1440
1f1f19ff
MM		 1441 /* general process for other queue */
1442 for (i = 0; i < MAX_TX_QUEUE_COUNT; i++) {
1443 ret = rtl8192_alloc_tx_desc_ring(dev, i, priv->txringcount);
1444 if (ret)
1445 goto err_free_rings;
1446 }
ecdfa446 1447
1f1f19ff 1448 return 0;
ecdfa446
GKH		 1449
1450err_free_rings:
1f1f19ff
MM		 1451 rtl8192_free_rx_ring(dev);
1452 for (i = 0; i < MAX_TX_QUEUE_COUNT; i++)
1453 if (priv->tx_ring[i].desc)
1454 rtl8192_free_tx_ring(dev, i);
1455 return 1;
ecdfa446
GKH		 1456}
1457
5e1ad18a 1458static void rtl8192_pci_resetdescring(struct net_device *dev)
ecdfa446
GKH		 1459{
1460 struct r8192_priv *priv = ieee80211_priv(dev);
1461 int i;
1462
1463 /* force the rx_idx to the first one */
1464 if(priv->rx_ring) {
1465 rx_desc_819x_pci *entry = NULL;
1466 for (i = 0; i < priv->rxringcount; i++) {
1467 entry = &priv->rx_ring[i];
1468 entry->OWN = 1;
1469 }
1470 priv->rx_idx = 0;
1471 }
1472
1473 /* after reset, release previous pending packet, and force the
1474 * tx idx to the first one */
1475 for (i = 0; i < MAX_TX_QUEUE_COUNT; i++) {
1476 if (priv->tx_ring[i].desc) {
1477 struct rtl8192_tx_ring *ring = &priv->tx_ring[i];
1478
1479 while (skb_queue_len(&ring->queue)) {
1480 tx_desc_819x_pci *entry = &ring->desc[ring->idx];
1481 struct sk_buff *skb = __skb_dequeue(&ring->queue);
1482
1483 pci_unmap_single(priv->pdev, le32_to_cpu(entry->TxBuffAddr),
1484 skb->len, PCI_DMA_TODEVICE);
1485 kfree_skb(skb);
1486 ring->idx = (ring->idx + 1) % ring->entries;
1487 }
1488 ring->idx = 0;
1489 }
1490 }
1491}
1492
5e1ad18a 1493static void rtl8192_link_change(struct net_device *dev)
ecdfa446 1494{
ecdfa446
GKH		 1495 struct r8192_priv *priv = ieee80211_priv(dev);
1496 struct ieee80211_device* ieee = priv->ieee80211;
11a861d9 1497
ecdfa446
GKH		 1498 if (ieee->state == IEEE80211_LINKED)
1499 {
1500 rtl8192_net_update(dev);
1501 rtl8192_update_ratr_table(dev);
11aacc28 1502
ecdfa446
GKH		 1503 //add this as in pure N mode, wep encryption will use software way, but there is no chance to set this as wep will not set group key in wext. WB.2008.07.08
1504 if ((KEY_TYPE_WEP40 == ieee->pairwise_key_type) || (KEY_TYPE_WEP104 == ieee->pairwise_key_type))
1505 EnableHWSecurityConfig8192(dev);
ecdfa446
GKH		 1506 }
1507 else
1508 {
3f9ab1ee 1509 write_nic_byte(priv, 0x173, 0);
ecdfa446 1510 }
11a861d9 1511
ecdfa446
GKH		 1512 rtl8192_update_msr(dev);
1513
1514 // 2007/10/16 MH MAC Will update TSF according to all received beacon, so we have
1515 // // To set CBSSID bit when link with any AP or STA.
1516 if (ieee->iw_mode == IW_MODE_INFRA || ieee->iw_mode == IW_MODE_ADHOC)
1517 {
1518 u32 reg = 0;
3f9ab1ee 1519 reg = read_nic_dword(priv, RCR);
ecdfa446
GKH		 1520 if (priv->ieee80211->state == IEEE80211_LINKED)
1521 priv->ReceiveConfig = reg |= RCR_CBSSID;
1522 else
1523 priv->ReceiveConfig = reg &= ~RCR_CBSSID;
3f9ab1ee 1524 write_nic_dword(priv, RCR, reg);
ecdfa446
GKH		 1525 }
1526}
ecdfa446
GKH		 1527
1528
5b3b1a7b 1529static const struct ieee80211_qos_parameters def_qos_parameters = {
ecdfa446
GKH		 1530 {3,3,3,3},/* cw_min */
1531 {7,7,7,7},/* cw_max */
1532 {2,2,2,2},/* aifs */
1533 {0,0,0,0},/* flags */
1534 {0,0,0,0} /* tx_op_limit */
1535};
1536
5e1ad18a 1537static void rtl8192_update_beacon(struct work_struct * work)
ecdfa446
GKH		 1538{
1539 struct r8192_priv *priv = container_of(work, struct r8192_priv, update_beacon_wq.work);
1540 struct net_device *dev = priv->ieee80211->dev;
ecdfa446
GKH		 1541 struct ieee80211_device* ieee = priv->ieee80211;
1542 struct ieee80211_network* net = &ieee->current_network;
1543
1544 if (ieee->pHTInfo->bCurrentHTSupport)
1545 HTUpdateSelfAndPeerSetting(ieee, net);
1546 ieee->pHTInfo->bCurrentRT2RTLongSlotTime = net->bssht.bdRT2RTLongSlotTime;
1547 rtl8192_update_cap(dev, net->capability);
1548}
214985a6 1549
ecdfa446
GKH		 1550/*
1551* background support to run QoS activate functionality
1552*/
881a975b 1553static const int WDCAPARA_ADD[] = {EDCAPARA_BE,EDCAPARA_BK,EDCAPARA_VI,EDCAPARA_VO};
5e1ad18a 1554static void rtl8192_qos_activate(struct work_struct * work)
ecdfa446
GKH		 1555{
1556 struct r8192_priv *priv = container_of(work, struct r8192_priv, qos_activate);
ecdfa446
GKH		 1557 struct ieee80211_qos_parameters *qos_parameters = &priv->ieee80211->current_network.qos_data.parameters;
1558 u8 mode = priv->ieee80211->current_network.mode;
ecdfa446
GKH		 1559 u8 u1bAIFS;
1560 u32 u4bAcParam;
1561 int i;
ecdfa446 1562
ecdfa446 1563 mutex_lock(&priv->mutex);
ecdfa446
GKH		 1564 if(priv->ieee80211->state != IEEE80211_LINKED)
1565 goto success;
1566 RT_TRACE(COMP_QOS,"qos active process with associate response received\n");
1567 /* It better set slot time at first */
1568 /* For we just support b/g mode at present, let the slot time at 9/20 selection */
1569 /* update the ac parameter to related registers */
1570 for(i = 0; i < QOS_QUEUE_NUM; i++) {
1571 //Mode G/A: slotTimeTimer = 9; Mode B: 20
1572 u1bAIFS = qos_parameters->aifs[i] * ((mode&(IEEE_G|IEEE_N_24G)) ?9:20) + aSifsTime;
1573 u4bAcParam = ((((u32)(qos_parameters->tx_op_limit[i]))<< AC_PARAM_TXOP_LIMIT_OFFSET)|
1574 (((u32)(qos_parameters->cw_max[i]))<< AC_PARAM_ECW_MAX_OFFSET)|
1575 (((u32)(qos_parameters->cw_min[i]))<< AC_PARAM_ECW_MIN_OFFSET)|
1576 ((u32)u1bAIFS << AC_PARAM_AIFS_OFFSET));
3f9ab1ee 1577 write_nic_dword(priv, WDCAPARA_ADD[i], u4bAcParam);
ecdfa446
GKH		 1578 }
1579
1580success:
ecdfa446 1581 mutex_unlock(&priv->mutex);
ecdfa446
GKH		 1582}
1583
1584static int rtl8192_qos_handle_probe_response(struct r8192_priv *priv,
1585 int active_network,
1586 struct ieee80211_network *network)
1587{
1588 int ret = 0;
1589 u32 size = sizeof(struct ieee80211_qos_parameters);
1590
1591 if(priv->ieee80211->state !=IEEE80211_LINKED)
1592 return ret;
1593
1594 if ((priv->ieee80211->iw_mode != IW_MODE_INFRA))
1595 return ret;
1596
1597 if (network->flags & NETWORK_HAS_QOS_MASK) {
1598 if (active_network &&
1599 (network->flags & NETWORK_HAS_QOS_PARAMETERS))
1600 network->qos_data.active = network->qos_data.supported;
1601
1602 if ((network->qos_data.active == 1) && (active_network == 1) &&
1603 (network->flags & NETWORK_HAS_QOS_PARAMETERS) &&
1604 (network->qos_data.old_param_count !=
1605 network->qos_data.param_count)) {
1606 network->qos_data.old_param_count =
1607 network->qos_data.param_count;
ecdfa446 1608 queue_work(priv->priv_wq, &priv->qos_activate);
ecdfa446
GKH		 1609 RT_TRACE (COMP_QOS, "QoS parameters change call "
1610 "qos_activate\n");
1611 }
1612 } else {
207b58fb 1613 memcpy(&priv->ieee80211->current_network.qos_data.parameters,
ecdfa446
GKH		 1614 &def_qos_parameters, size);
1615
1616 if ((network->qos_data.active == 1) && (active_network == 1)) {
ecdfa446 1617 queue_work(priv->priv_wq, &priv->qos_activate);
ecdfa446
GKH		 1618 RT_TRACE(COMP_QOS, "QoS was disabled call qos_activate \n");
1619 }
1620 network->qos_data.active = 0;
1621 network->qos_data.supported = 0;
1622 }
1623
1624 return 0;
1625}
1626
1627/* handle manage frame frame beacon and probe response */
1628static int rtl8192_handle_beacon(struct net_device * dev,
1629 struct ieee80211_beacon * beacon,
1630 struct ieee80211_network * network)
1631{
1632 struct r8192_priv *priv = ieee80211_priv(dev);
1633
1634 rtl8192_qos_handle_probe_response(priv,1,network);
1635
ecdfa446 1636 queue_delayed_work(priv->priv_wq, &priv->update_beacon_wq, 0);
ecdfa446
GKH		 1637 return 0;
1638
1639}
1640
1641/*
214985a6
MM		 1642 * handling the beaconing responses. if we get different QoS setting
1643 * off the network from the associated setting, adjust the QoS setting
1644 */
ecdfa446
GKH		 1645static int rtl8192_qos_association_resp(struct r8192_priv *priv,
1646 struct ieee80211_network *network)
1647{
b72cb94f
MM		 1648 int ret = 0;
1649 unsigned long flags;
1650 u32 size = sizeof(struct ieee80211_qos_parameters);
1651 int set_qos_param = 0;
ecdfa446 1652
b72cb94f
MM		 1653 if ((priv == NULL) || (network == NULL))
1654 return ret;
ecdfa446 1655
b72cb94f
MM		 1656 if (priv->ieee80211->state != IEEE80211_LINKED)
1657 return ret;
ecdfa446 1658
b72cb94f
MM		 1659 if ((priv->ieee80211->iw_mode != IW_MODE_INFRA))
1660 return ret;
ecdfa446 1661
b72cb94f
MM		 1662 spin_lock_irqsave(&priv->ieee80211->lock, flags);
1663 if (network->flags & NETWORK_HAS_QOS_PARAMETERS) {
207b58fb
MM		 1664 memcpy(&priv->ieee80211->current_network.qos_data.parameters,
1665 &network->qos_data.parameters,
ecdfa446
GKH		 1666 sizeof(struct ieee80211_qos_parameters));
1667 priv->ieee80211->current_network.qos_data.active = 1;
b72cb94f
MM		 1668 set_qos_param = 1;
1669 /* update qos parameter for current network */
1670 priv->ieee80211->current_network.qos_data.old_param_count =
1671 priv->ieee80211->current_network.qos_data.param_count;
1672 priv->ieee80211->current_network.qos_data.param_count =
1673 network->qos_data.param_count;
1674
1675 } else {
207b58fb 1676 memcpy(&priv->ieee80211->current_network.qos_data.parameters,
ecdfa446
GKH		 1677 &def_qos_parameters, size);
1678 priv->ieee80211->current_network.qos_data.active = 0;
1679 priv->ieee80211->current_network.qos_data.supported = 0;
b72cb94f
MM		 1680 set_qos_param = 1;
1681 }
ecdfa446 1682
b72cb94f 1683 spin_unlock_irqrestore(&priv->ieee80211->lock, flags);
ecdfa446 1684
b72cb94f
MM		 1685 RT_TRACE(COMP_QOS, "%s: network->flags = %d,%d\n", __FUNCTION__,
1686 network->flags, priv->ieee80211->current_network.qos_data.active);
ecdfa446 1687 if (set_qos_param == 1)
ecdfa446 1688 queue_work(priv->priv_wq, &priv->qos_activate);
ecdfa446 1689
b72cb94f 1690 return ret;
ecdfa446
GKH		 1691}
1692
1693
1694static int rtl8192_handle_assoc_response(struct net_device *dev,
1695 struct ieee80211_assoc_response_frame *resp,
1696 struct ieee80211_network *network)
1697{
1698 struct r8192_priv *priv = ieee80211_priv(dev);
1699 rtl8192_qos_association_resp(priv, network);
1700 return 0;
1701}
1702
1703
214985a6 1704/* updateRATRTabel for MCS only. Basic rate is not implemented. */
5b3b1a7b 1705static void rtl8192_update_ratr_table(struct net_device* dev)
ecdfa446
GKH		 1706{
1707 struct r8192_priv* priv = ieee80211_priv(dev);
1708 struct ieee80211_device* ieee = priv->ieee80211;
1709 u8* pMcsRate = ieee->dot11HTOperationalRateSet;
ecdfa446
GKH		 1710 u32 ratr_value = 0;
1711 u8 rate_index = 0;
1712
1713 rtl8192_config_rate(dev, (u16*)(&ratr_value));
1714 ratr_value |= (*(u16*)(pMcsRate)) << 12;
16d74da0 1715
ecdfa446
GKH		 1716 switch (ieee->mode)
1717 {
1718 case IEEE_A:
1719 ratr_value &= 0x00000FF0;
1720 break;
1721 case IEEE_B:
1722 ratr_value &= 0x0000000F;
1723 break;
1724 case IEEE_G:
1725 ratr_value &= 0x00000FF7;
1726 break;
1727 case IEEE_N_24G:
1728 case IEEE_N_5G:
1729 if (ieee->pHTInfo->PeerMimoPs == 0) //MIMO_PS_STATIC
1730 ratr_value &= 0x0007F007;
1731 else{
1732 if (priv->rf_type == RF_1T2R)
1733 ratr_value &= 0x000FF007;
1734 else
1735 ratr_value &= 0x0F81F007;
1736 }
1737 break;
1738 default:
1739 break;
1740 }
1741 ratr_value &= 0x0FFFFFFF;
1742 if(ieee->pHTInfo->bCurTxBW40MHz && ieee->pHTInfo->bCurShortGI40MHz){
1743 ratr_value |= 0x80000000;
1744 }else if(!ieee->pHTInfo->bCurTxBW40MHz && ieee->pHTInfo->bCurShortGI20MHz){
1745 ratr_value |= 0x80000000;
1746 }
3f9ab1ee
MM		 1747 write_nic_dword(priv, RATR0+rate_index*4, ratr_value);
1748 write_nic_byte(priv, UFWP, 1);
ecdfa446
GKH		 1749}
1750
5e1ad18a 1751static bool GetNmodeSupportBySecCfg8190Pci(struct net_device*dev)
ecdfa446 1752{
65a43784 1753 struct r8192_priv *priv = ieee80211_priv(dev);
1754 struct ieee80211_device *ieee = priv->ieee80211;
ecdfa446 1755
f8acdc3d
MM		 1756 return !(ieee->rtllib_ap_sec_type &&
1757 (ieee->rtllib_ap_sec_type(ieee)&(SEC_ALG_WEP|SEC_ALG_TKIP)));
ecdfa446
GKH		 1758}
1759
5e1ad18a 1760static void rtl8192_refresh_supportrate(struct r8192_priv* priv)
ecdfa446
GKH		 1761{
1762 struct ieee80211_device* ieee = priv->ieee80211;
1763 //we donot consider set support rate for ABG mode, only HT MCS rate is set here.
1764 if (ieee->mode == WIRELESS_MODE_N_24G || ieee->mode == WIRELESS_MODE_N_5G)
1765 {
1766 memcpy(ieee->Regdot11HTOperationalRateSet, ieee->RegHTSuppRateSet, 16);
ecdfa446
GKH		 1767 }
1768 else
1769 memset(ieee->Regdot11HTOperationalRateSet, 0, 16);
ecdfa446
GKH		 1770}
1771
6f304eb2 1772static u8 rtl8192_getSupportedWireleeMode(struct net_device *dev)
ecdfa446 1773{
6f304eb2 1774 return (WIRELESS_MODE_N_24G|WIRELESS_MODE_G|WIRELESS_MODE_B);
ecdfa446 1775}
5e1ad18a
GKH		 1776
1777static void rtl8192_SetWirelessMode(struct net_device* dev, u8 wireless_mode)
ecdfa446
GKH		 1778{
1779 struct r8192_priv *priv = ieee80211_priv(dev);
1780 u8 bSupportMode = rtl8192_getSupportedWireleeMode(dev);
1781
ecdfa446
GKH		 1782 if ((wireless_mode == WIRELESS_MODE_AUTO) || ((wireless_mode&bSupportMode)==0))
1783 {
1784 if(bSupportMode & WIRELESS_MODE_N_24G)
1785 {
1786 wireless_mode = WIRELESS_MODE_N_24G;
1787 }
1788 else if(bSupportMode & WIRELESS_MODE_N_5G)
1789 {
1790 wireless_mode = WIRELESS_MODE_N_5G;
1791 }
1792 else if((bSupportMode & WIRELESS_MODE_A))
1793 {
1794 wireless_mode = WIRELESS_MODE_A;
1795 }
1796 else if((bSupportMode & WIRELESS_MODE_G))
1797 {
1798 wireless_mode = WIRELESS_MODE_G;
1799 }
1800 else if((bSupportMode & WIRELESS_MODE_B))
1801 {
1802 wireless_mode = WIRELESS_MODE_B;
1803 }
1804 else{
1805 RT_TRACE(COMP_ERR, "%s(), No valid wireless mode supported, SupportedWirelessMode(%x)!!!\n", __FUNCTION__,bSupportMode);
1806 wireless_mode = WIRELESS_MODE_B;
1807 }
1808 }
ecdfa446
GKH		 1809 priv->ieee80211->mode = wireless_mode;
1810
1811 if ((wireless_mode == WIRELESS_MODE_N_24G) || (wireless_mode == WIRELESS_MODE_N_5G))
1812 priv->ieee80211->pHTInfo->bEnableHT = 1;
1813 else
1814 priv->ieee80211->pHTInfo->bEnableHT = 0;
1815 RT_TRACE(COMP_INIT, "Current Wireless Mode is %x\n", wireless_mode);
1816 rtl8192_refresh_supportrate(priv);
ecdfa446 1817}
ecdfa446 1818
5e1ad18a 1819static bool GetHalfNmodeSupportByAPs819xPci(struct net_device* dev)
ecdfa446 1820{
ecdfa446
GKH		 1821 struct r8192_priv* priv = ieee80211_priv(dev);
1822 struct ieee80211_device* ieee = priv->ieee80211;
1823
285f660c 1824 return ieee->bHalfWirelessN24GMode;
ecdfa446
GKH		 1825}
1826
9f17b076 1827static short rtl8192_is_tx_queue_empty(struct net_device *dev)
ecdfa446
GKH		 1828{
1829 int i=0;
1830 struct r8192_priv *priv = ieee80211_priv(dev);
1831 for (i=0; i<=MGNT_QUEUE; i++)
1832 {
1833 if ((i== TXCMD_QUEUE) || (i == HCCA_QUEUE) )
1834 continue;
1835 if (skb_queue_len(&(&priv->tx_ring[i])->queue) > 0){
1836 printk("===>tx queue is not empty:%d, %d\n", i, skb_queue_len(&(&priv->tx_ring[i])->queue));
1837 return 0;
1838 }
1839 }
1840 return 1;
1841}
16d74da0 1842
5e1ad18a 1843static void rtl8192_hw_sleep_down(struct net_device *dev)
ecdfa446 1844{
65a43784 1845 struct r8192_priv *priv = ieee80211_priv(dev);
65a43784 1846
48f02106 1847 spin_lock(&priv->rf_ps_lock);
65a43784 1848 if (priv->RFChangeInProgress) {
48f02106 1849 spin_unlock(&priv->rf_ps_lock);
65a43784 1850 RT_TRACE(COMP_RF, "rtl8192_hw_sleep_down(): RF Change in progress! \n");
1851 printk("rtl8192_hw_sleep_down(): RF Change in progress!\n");
1852 return;
1853 }
48f02106 1854 spin_unlock(&priv->rf_ps_lock);
65a43784 1855
ecdfa446
GKH		 1856 MgntActSet_RF_State(dev, eRfSleep, RF_CHANGE_BY_PS);
1857}
16d74da0 1858
5e1ad18a 1859static void rtl8192_hw_sleep_wq (struct work_struct *work)
ecdfa446 1860{
ecdfa446
GKH		 1861 struct delayed_work *dwork = container_of(work,struct delayed_work,work);
1862 struct ieee80211_device *ieee = container_of(dwork,struct ieee80211_device,hw_sleep_wq);
1863 struct net_device *dev = ieee->dev;
65a43784 1864
ecdfa446
GKH		 1865 rtl8192_hw_sleep_down(dev);
1866}
65a43784 1867
5e1ad18a 1868static void rtl8192_hw_wakeup(struct net_device* dev)
ecdfa446 1869{
65a43784 1870 struct r8192_priv *priv = ieee80211_priv(dev);
65a43784 1871
48f02106 1872 spin_lock(&priv->rf_ps_lock);
65a43784 1873 if (priv->RFChangeInProgress) {
48f02106 1874 spin_unlock(&priv->rf_ps_lock);
65a43784 1875 RT_TRACE(COMP_RF, "rtl8192_hw_wakeup(): RF Change in progress! \n");
1876 printk("rtl8192_hw_wakeup(): RF Change in progress! schedule wake up task again\n");
1877 queue_delayed_work(priv->ieee80211->wq,&priv->ieee80211->hw_wakeup_wq,MSECS(10));//PowerSave is not supported if kernel version is below 2.6.20
1878 return;
1879 }
48f02106 1880 spin_unlock(&priv->rf_ps_lock);
ecdfa446 1881
ecdfa446 1882 MgntActSet_RF_State(dev, eRfOn, RF_CHANGE_BY_PS);
ecdfa446 1883}
65a43784 1884
9f17b076 1885static void rtl8192_hw_wakeup_wq (struct work_struct *work)
ecdfa446 1886{
ecdfa446
GKH		 1887 struct delayed_work *dwork = container_of(work,struct delayed_work,work);
1888 struct ieee80211_device *ieee = container_of(dwork,struct ieee80211_device,hw_wakeup_wq);
1889 struct net_device *dev = ieee->dev;
ecdfa446
GKH		 1890 rtl8192_hw_wakeup(dev);
1891
1892}
1893
1894#define MIN_SLEEP_TIME 50
1895#define MAX_SLEEP_TIME 10000
5e1ad18a 1896static void rtl8192_hw_to_sleep(struct net_device *dev, u32 th, u32 tl)
ecdfa446 1897{
ecdfa446 1898 struct r8192_priv *priv = ieee80211_priv(dev);
9236928f 1899 u32 tmp;
ecdfa446 1900 u32 rb = jiffies;
ecdfa446 1901
9236928f 1902 spin_lock(&priv->ps_lock);
ecdfa446 1903
65a43784 1904 // Writing HW register with 0 equals to disable
1905 // the timer, that is not really what we want
1906 //
1907 tl -= MSECS(8+16+7);
ecdfa446 1908
65a43784 1909 // If the interval in witch we are requested to sleep is too
1910 // short then give up and remain awake
1911 // when we sleep after send null frame, the timer will be too short to sleep.
1912 //
ecdfa446 1913 if(((tl>=rb)&& (tl-rb) <= MSECS(MIN_SLEEP_TIME))
65a43784 1914 ||((rb>tl)&& (rb-tl) < MSECS(MIN_SLEEP_TIME))) {
65a43784 1915 printk("too short to sleep::%x, %x, %lx\n",tl, rb, MSECS(MIN_SLEEP_TIME));
9236928f 1916 goto out_unlock;
ecdfa446
GKH		 1917 }
1918
ecdfa446 1919 if(((tl > rb) && ((tl-rb) > MSECS(MAX_SLEEP_TIME)))||
65a43784 1920 ((tl < rb) && (tl>MSECS(69)) && ((rb-tl) > MSECS(MAX_SLEEP_TIME)))||
1921 ((tl<rb)&&(tl<MSECS(69))&&((tl+0xffffffff-rb)>MSECS(MAX_SLEEP_TIME)))) {
ecdfa446 1922 printk("========>too long to sleep:%x, %x, %lx\n", tl, rb, MSECS(MAX_SLEEP_TIME));
9236928f 1923 goto out_unlock;
65a43784 1924 }
9236928f
MM		 1925
1926 tmp = (tl>rb)?(tl-rb):(rb-tl);
65a43784 1927 queue_delayed_work(priv->ieee80211->wq,
9236928f 1928 &priv->ieee80211->hw_wakeup_wq,tmp);
65a43784 1929
9236928f
MM		 1930 queue_delayed_work(priv->ieee80211->wq,
1931 (void *)&priv->ieee80211->hw_sleep_wq,0);
1932out_unlock:
1933 spin_unlock(&priv->ps_lock);
ecdfa446 1934}
214985a6 1935
ecdfa446
GKH		 1936static void rtl8192_init_priv_variable(struct net_device* dev)
1937{
1938 struct r8192_priv *priv = ieee80211_priv(dev);
1939 u8 i;
65a43784 1940 PRT_POWER_SAVE_CONTROL pPSC = (PRT_POWER_SAVE_CONTROL)(&(priv->ieee80211->PowerSaveControl));
1941
1942 // Default Halt the NIC if RF is OFF.
1943 pPSC->RegRfPsLevel |= RT_RF_OFF_LEVL_HALT_NIC;
1944 pPSC->RegRfPsLevel |= RT_RF_OFF_LEVL_CLK_REQ;
1945 pPSC->RegRfPsLevel |= RT_RF_OFF_LEVL_ASPM;
1946 pPSC->RegRfPsLevel |= RT_RF_LPS_LEVEL_ASPM;
1947 pPSC->bLeisurePs = true;
1948 pPSC->RegMaxLPSAwakeIntvl = 5;
1949 priv->bHwRadioOff = false;
1950
ecdfa446 1951 priv->being_init_adapter = false;
ecdfa446 1952 priv->txringcount = 64;//32;
ecdfa446
GKH		 1953 priv->rxbuffersize = 9100;//2048;//1024;
1954 priv->rxringcount = MAX_RX_COUNT;//64;
ecdfa446
GKH		 1955 priv->rx_skb_complete = 1;
1956 priv->chan = 1; //set to channel 1
1957 priv->RegWirelessMode = WIRELESS_MODE_AUTO;
1958 priv->RegChannelPlan = 0xf;
ecdfa446
GKH		 1959 priv->ieee80211->mode = WIRELESS_MODE_AUTO; //SET AUTO
1960 priv->ieee80211->iw_mode = IW_MODE_INFRA;
1961 priv->ieee80211->ieee_up=0;
1962 priv->retry_rts = DEFAULT_RETRY_RTS;
1963 priv->retry_data = DEFAULT_RETRY_DATA;
1964 priv->ieee80211->rts = DEFAULT_RTS_THRESHOLD;
1965 priv->ieee80211->rate = 110; //11 mbps
1966 priv->ieee80211->short_slot = 1;
1967 priv->promisc = (dev->flags & IFF_PROMISC) ? 1:0;
1968 priv->bcck_in_ch14 = false;
ecdfa446
GKH		 1969 priv->CCKPresentAttentuation = 0;
1970 priv->rfa_txpowertrackingindex = 0;
1971 priv->rfc_txpowertrackingindex = 0;
1972 priv->CckPwEnl = 6;
ecdfa446
GKH		 1973 //added by amy for silent reset
1974 priv->ResetProgress = RESET_TYPE_NORESET;
1975 priv->bForcedSilentReset = 0;
1976 priv->bDisableNormalResetCheck = false;
1977 priv->force_reset = false;
1978 //added by amy for power save
ecdfa446
GKH		 1979 priv->ieee80211->RfOffReason = 0;
1980 priv->RFChangeInProgress = false;
1981 priv->bHwRfOffAction = 0;
1982 priv->SetRFPowerStateInProgress = false;
1983 priv->ieee80211->PowerSaveControl.bInactivePs = true;
1984 priv->ieee80211->PowerSaveControl.bIPSModeBackup = false;
ecdfa446
GKH		 1985
1986 priv->ieee80211->current_network.beacon_interval = DEFAULT_BEACONINTERVAL;
1987 priv->ieee80211->iw_mode = IW_MODE_INFRA;
1988 priv->ieee80211->softmac_features = IEEE_SOFTMAC_SCAN |
1989 IEEE_SOFTMAC_ASSOCIATE | IEEE_SOFTMAC_PROBERQ |
1990 IEEE_SOFTMAC_PROBERS | IEEE_SOFTMAC_TX_QUEUE;/* |
1991 IEEE_SOFTMAC_BEACONS;*///added by amy 080604 //| //IEEE_SOFTMAC_SINGLE_QUEUE;
1992
1993 priv->ieee80211->active_scan = 1;
1994 priv->ieee80211->modulation = IEEE80211_CCK_MODULATION | IEEE80211_OFDM_MODULATION;
1995 priv->ieee80211->host_encrypt = 1;
1996 priv->ieee80211->host_decrypt = 1;
ecdfa446
GKH		 1997 priv->ieee80211->start_send_beacons = rtl8192_start_beacon;//+by david 081107
1998 priv->ieee80211->stop_send_beacons = rtl8192_stop_beacon;//+by david 081107
1999 priv->ieee80211->softmac_hard_start_xmit = rtl8192_hard_start_xmit;
2000 priv->ieee80211->set_chan = rtl8192_set_chan;
2001 priv->ieee80211->link_change = rtl8192_link_change;
2002 priv->ieee80211->softmac_data_hard_start_xmit = rtl8192_hard_data_xmit;
2003 priv->ieee80211->data_hard_stop = rtl8192_data_hard_stop;
2004 priv->ieee80211->data_hard_resume = rtl8192_data_hard_resume;
2005 priv->ieee80211->init_wmmparam_flag = 0;
2006 priv->ieee80211->fts = DEFAULT_FRAG_THRESHOLD;
2007 priv->ieee80211->check_nic_enough_desc = check_nic_enough_desc;
2008 priv->ieee80211->tx_headroom = sizeof(TX_FWINFO_8190PCI);
2009 priv->ieee80211->qos_support = 1;
2010 priv->ieee80211->dot11PowerSaveMode = 0;
ecdfa446
GKH		 2011 priv->ieee80211->SetBWModeHandler = rtl8192_SetBWMode;
2012 priv->ieee80211->handle_assoc_response = rtl8192_handle_assoc_response;
2013 priv->ieee80211->handle_beacon = rtl8192_handle_beacon;
2014
2015 priv->ieee80211->sta_wake_up = rtl8192_hw_wakeup;
ecdfa446
GKH		 2016 priv->ieee80211->enter_sleep_state = rtl8192_hw_to_sleep;
2017 priv->ieee80211->ps_is_queue_empty = rtl8192_is_tx_queue_empty;
ecdfa446
GKH		 2018 priv->ieee80211->GetNmodeSupportBySecCfg = GetNmodeSupportBySecCfg8190Pci;
2019 priv->ieee80211->SetWirelessMode = rtl8192_SetWirelessMode;
2020 priv->ieee80211->GetHalfNmodeSupportByAPsHandler = GetHalfNmodeSupportByAPs819xPci;
2021
ecdfa446
GKH		 2022 priv->ieee80211->InitialGainHandler = InitialGain819xPci;
2023
65a43784 2024#ifdef ENABLE_IPS
2025 priv->ieee80211->ieee80211_ips_leave_wq = ieee80211_ips_leave_wq;
2026 priv->ieee80211->ieee80211_ips_leave = ieee80211_ips_leave;
2027#endif
2028#ifdef ENABLE_LPS
2029 priv->ieee80211->LeisurePSLeave = LeisurePSLeave;
16d74da0 2030#endif
65a43784 2031
2032 priv->ieee80211->SetHwRegHandler = rtl8192e_SetHwReg;
2033 priv->ieee80211->rtllib_ap_sec_type = rtl8192e_ap_sec_type;
2034
395aa640
MM		 2035 priv->ShortRetryLimit = 0x30;
2036 priv->LongRetryLimit = 0x30;
ecdfa446
GKH		 2037
2038 priv->ReceiveConfig = RCR_ADD3 |
2039 RCR_AMF | RCR_ADF | //accept management/data
2040 RCR_AICV | //accept control frame for SW AP needs PS-poll, 2005.07.07, by rcnjko.
2041 RCR_AB | RCR_AM | RCR_APM | //accept BC/MC/UC
2042 RCR_AAP | ((u32)7<<RCR_MXDMA_OFFSET) |
2043 ((u32)7 << RCR_FIFO_OFFSET) | RCR_ONLYERLPKT;
2044
207b58fb
MM		 2045 priv->irq_mask = (u32)(IMR_ROK | IMR_VODOK | IMR_VIDOK | IMR_BEDOK | IMR_BKDOK |
2046 IMR_HCCADOK | IMR_MGNTDOK | IMR_COMDOK | IMR_HIGHDOK |
2047 IMR_BDOK | IMR_RXCMDOK | IMR_TIMEOUT0 | IMR_RDU | IMR_RXFOVW |
ecdfa446
GKH		 2048 IMR_TXFOVW | IMR_BcnInt | IMR_TBDOK | IMR_TBDER);
2049
5b84cc78 2050 priv->pFirmware = vzalloc(sizeof(rt_firmware));
ecdfa446
GKH		 2051
2052 /* rx related queue */
ecdfa446
GKH		 2053 skb_queue_head_init(&priv->skb_queue);
2054
2055 /* Tx related queue */
2056 for(i = 0; i < MAX_QUEUE_SIZE; i++) {
2057 skb_queue_head_init(&priv->ieee80211->skb_waitQ [i]);
2058 }
2059 for(i = 0; i < MAX_QUEUE_SIZE; i++) {
2060 skb_queue_head_init(&priv->ieee80211->skb_aggQ [i]);
2061 }
2062 priv->rf_set_chan = rtl8192_phy_SwChnl;
2063}
2064
ecdfa446
GKH		 2065static void rtl8192_init_priv_lock(struct r8192_priv* priv)
2066{
ecdfa446
GKH		 2067 spin_lock_init(&priv->irq_th_lock);
2068 spin_lock_init(&priv->rf_ps_lock);
2069 spin_lock_init(&priv->ps_lock);
ecdfa446
GKH		 2070 sema_init(&priv->wx_sem,1);
2071 sema_init(&priv->rf_sem,1);
ecdfa446 2072 mutex_init(&priv->mutex);
ecdfa446
GKH		 2073}
2074
214985a6 2075/* init tasklet and wait_queue here */
ecdfa446
GKH		 2076#define DRV_NAME "wlan0"
2077static void rtl8192_init_priv_task(struct net_device* dev)
2078{
2079 struct r8192_priv *priv = ieee80211_priv(dev);
2080
ecdfa446 2081 priv->priv_wq = create_workqueue(DRV_NAME);
ecdfa446 2082
65a43784 2083#ifdef ENABLE_IPS
80a4dead 2084 INIT_WORK(&priv->ieee80211->ips_leave_wq, IPSLeave_wq);
65a43784 2085#endif
2086
ecdfa446 2087 INIT_WORK(&priv->reset_wq, rtl8192_restart);
ecdfa446
GKH		 2088 INIT_DELAYED_WORK(&priv->watch_dog_wq, rtl819x_watchdog_wqcallback);
2089 INIT_DELAYED_WORK(&priv->txpower_tracking_wq, dm_txpower_trackingcallback);
2090 INIT_DELAYED_WORK(&priv->rfpath_check_wq, dm_rf_pathcheck_workitemcallback);
2091 INIT_DELAYED_WORK(&priv->update_beacon_wq, rtl8192_update_beacon);
ecdfa446 2092 INIT_WORK(&priv->qos_activate, rtl8192_qos_activate);
80a4dead
MM		 2093 INIT_DELAYED_WORK(&priv->ieee80211->hw_wakeup_wq, rtl8192_hw_wakeup_wq);
2094 INIT_DELAYED_WORK(&priv->ieee80211->hw_sleep_wq, rtl8192_hw_sleep_wq);
ecdfa446 2095
80a4dead
MM		 2096 tasklet_init(&priv->irq_rx_tasklet, rtl8192_irq_rx_tasklet,
2097 (unsigned long) priv);
2098 tasklet_init(&priv->irq_tx_tasklet, rtl8192_irq_tx_tasklet,
2099 (unsigned long) priv);
2100 tasklet_init(&priv->irq_prepare_beacon_tasklet, rtl8192_prepare_beacon,
2101 (unsigned long) priv);
ecdfa446
GKH		 2102}
2103
2104static void rtl8192_get_eeprom_size(struct net_device* dev)
2105{
2106 u16 curCR = 0;
2107 struct r8192_priv *priv = ieee80211_priv(dev);
2108 RT_TRACE(COMP_INIT, "===========>%s()\n", __FUNCTION__);
3f9ab1ee 2109 curCR = read_nic_dword(priv, EPROM_CMD);
ecdfa446
GKH		 2110 RT_TRACE(COMP_INIT, "read from Reg Cmd9346CR(%x):%x\n", EPROM_CMD, curCR);
2111 //whether need I consider BIT5?
2112 priv->epromtype = (curCR & EPROM_CMD_9356SEL) ? EPROM_93c56 : EPROM_93c46;
2113 RT_TRACE(COMP_INIT, "<===========%s(), epromtype:%d\n", __FUNCTION__, priv->epromtype);
2114}
2115
ecdfa446 2116/*
214985a6
MM		 2117 * Adapter->EEPROMAddressSize should be set before this function call.
2118 * EEPROM address size can be got through GetEEPROMSize8185()
2119 */
3f9ab1ee 2120static void rtl8192_read_eeprom_info(struct r8192_priv *priv)
ecdfa446 2121{
3f9ab1ee 2122 struct net_device *dev = priv->ieee80211->dev;
ecdfa446 2123 u8 tempval;
ecdfa446 2124 u8 ICVer8192, ICVer8256;
ecdfa446
GKH		 2125 u16 i,usValue, IC_Version;
2126 u16 EEPROMId;
ecdfa446
GKH		 2127 u8 bMac_Tmp_Addr[6] = {0x00, 0xe0, 0x4c, 0x00, 0x00, 0x01};
2128 RT_TRACE(COMP_INIT, "====> rtl8192_read_eeprom_info\n");
2129
2130
2131 // TODO: I don't know if we need to apply EF function to EEPROM read function
2132
2133 //2 Read EEPROM ID to make sure autoload is success
2134 EEPROMId = eprom_read(dev, 0);
2135 if( EEPROMId != RTL8190_EEPROM_ID )
2136 {
2137 RT_TRACE(COMP_ERR, "EEPROM ID is invalid:%x, %x\n", EEPROMId, RTL8190_EEPROM_ID);
2138 priv->AutoloadFailFlag=true;
2139 }
2140 else
2141 {
2142 priv->AutoloadFailFlag=false;
2143 }
2144
2145 //
2146 // Assign Chip Version ID
2147 //
2148 // Read IC Version && Channel Plan
2149 if(!priv->AutoloadFailFlag)
2150 {
2151 // VID, PID
2152 priv->eeprom_vid = eprom_read(dev, (EEPROM_VID >> 1));
2153 priv->eeprom_did = eprom_read(dev, (EEPROM_DID >> 1));
2154
2155 usValue = eprom_read(dev, (u16)(EEPROM_Customer_ID>>1)) >> 8 ;
2156 priv->eeprom_CustomerID = (u8)( usValue & 0xff);
2157 usValue = eprom_read(dev, (EEPROM_ICVersion_ChannelPlan>>1));
2158 priv->eeprom_ChannelPlan = usValue&0xff;
2159 IC_Version = ((usValue&0xff00)>>8);
2160
ecdfa446
GKH		 2161 ICVer8192 = (IC_Version&0xf); //bit0~3; 1:A cut, 2:B cut, 3:C cut...
2162 ICVer8256 = ((IC_Version&0xf0)>>4);//bit4~6, bit7 reserved for other RF chip; 1:A cut, 2:B cut, 3:C cut...
2163 RT_TRACE(COMP_INIT, "\nICVer8192 = 0x%x\n", ICVer8192);
2164 RT_TRACE(COMP_INIT, "\nICVer8256 = 0x%x\n", ICVer8256);
2165 if(ICVer8192 == 0x2) //B-cut
2166 {
2167 if(ICVer8256 == 0x5) //E-cut
2168 priv->card_8192_version= VERSION_8190_BE;
2169 }
4803ef77 2170
ecdfa446
GKH		 2171 switch(priv->card_8192_version)
2172 {
2173 case VERSION_8190_BD:
2174 case VERSION_8190_BE:
2175 break;
2176 default:
2177 priv->card_8192_version = VERSION_8190_BD;
2178 break;
2179 }
2180 RT_TRACE(COMP_INIT, "\nIC Version = 0x%x\n", priv->card_8192_version);
2181 }
2182 else
2183 {
2184 priv->card_8192_version = VERSION_8190_BD;
2185 priv->eeprom_vid = 0;
2186 priv->eeprom_did = 0;
2187 priv->eeprom_CustomerID = 0;
2188 priv->eeprom_ChannelPlan = 0;
2189 RT_TRACE(COMP_INIT, "\nIC Version = 0x%x\n", 0xff);
2190 }
2191
2192 RT_TRACE(COMP_INIT, "EEPROM VID = 0x%4x\n", priv->eeprom_vid);
2193 RT_TRACE(COMP_INIT, "EEPROM DID = 0x%4x\n", priv->eeprom_did);
2194 RT_TRACE(COMP_INIT,"EEPROM Customer ID: 0x%2x\n", priv->eeprom_CustomerID);
2195
2196 //2 Read Permanent MAC address
2197 if(!priv->AutoloadFailFlag)
2198 {
2199 for(i = 0; i < 6; i += 2)
2200 {
2201 usValue = eprom_read(dev, (u16) ((EEPROM_NODE_ADDRESS_BYTE_0+i)>>1));
2202 *(u16*)(&dev->dev_addr[i]) = usValue;
2203 }
2204 } else {
2205 // when auto load failed, the last address byte set to be a random one.
2206 // added by david woo.2007/11/7
2207 memcpy(dev->dev_addr, bMac_Tmp_Addr, 6);
ecdfa446
GKH		 2208 }
2209
820793c3 2210 RT_TRACE(COMP_INIT, "Permanent Address = %pM\n", dev->dev_addr);
ecdfa446
GKH		 2211
2212 //2 TX Power Check EEPROM Fail or not
2213 if(priv->card_8192_version > VERSION_8190_BD) {
2214 priv->bTXPowerDataReadFromEEPORM = true;
2215 } else {
2216 priv->bTXPowerDataReadFromEEPORM = false;
2217 }
2218
bbc9a991 2219 // 2007/11/15 MH 8190PCI Default=2T4R, 8192PCIE default=1T2R
ecdfa446
GKH		 2220 priv->rf_type = RTL819X_DEFAULT_RF_TYPE;
2221
2222 if(priv->card_8192_version > VERSION_8190_BD)
2223 {
2224 // Read RF-indication and Tx Power gain index diff of legacy to HT OFDM rate.
2225 if(!priv->AutoloadFailFlag)
2226 {
2227 tempval = (eprom_read(dev, (EEPROM_RFInd_PowerDiff>>1))) & 0xff;
2228 priv->EEPROMLegacyHTTxPowerDiff = tempval & 0xf; // bit[3:0]
2229
2230 if (tempval&0x80) //RF-indication, bit[7]
2231 priv->rf_type = RF_1T2R;
2232 else
2233 priv->rf_type = RF_2T4R;
2234 }
2235 else
2236 {
2237 priv->EEPROMLegacyHTTxPowerDiff = EEPROM_Default_LegacyHTTxPowerDiff;
2238 }
2239 RT_TRACE(COMP_INIT, "EEPROMLegacyHTTxPowerDiff = %d\n",
2240 priv->EEPROMLegacyHTTxPowerDiff);
2241
2242 // Read ThermalMeter from EEPROM
2243 if(!priv->AutoloadFailFlag)
2244 {
2245 priv->EEPROMThermalMeter = (u8)(((eprom_read(dev, (EEPROM_ThermalMeter>>1))) & 0xff00)>>8);
2246 }
2247 else
2248 {
2249 priv->EEPROMThermalMeter = EEPROM_Default_ThermalMeter;
2250 }
2251 RT_TRACE(COMP_INIT, "ThermalMeter = %d\n", priv->EEPROMThermalMeter);
2252 //vivi, for tx power track
2253 priv->TSSI_13dBm = priv->EEPROMThermalMeter *100;
2254
2255 if(priv->epromtype == EPROM_93c46)
2256 {
2257 // Read antenna tx power offset of B/C/D to A and CrystalCap from EEPROM
2258 if(!priv->AutoloadFailFlag)
2259 {
2260 usValue = eprom_read(dev, (EEPROM_TxPwDiff_CrystalCap>>1));
2261 priv->EEPROMAntPwDiff = (usValue&0x0fff);
2262 priv->EEPROMCrystalCap = (u8)((usValue&0xf000)>>12);
2263 }
2264 else
2265 {
2266 priv->EEPROMAntPwDiff = EEPROM_Default_AntTxPowerDiff;
2267 priv->EEPROMCrystalCap = EEPROM_Default_TxPwDiff_CrystalCap;
2268 }
2269 RT_TRACE(COMP_INIT, "EEPROMAntPwDiff = %d\n", priv->EEPROMAntPwDiff);
2270 RT_TRACE(COMP_INIT, "EEPROMCrystalCap = %d\n", priv->EEPROMCrystalCap);
2271
2272 //
2273 // Get per-channel Tx Power Level
2274 //
2275 for(i=0; i<14; i+=2)
2276 {
2277 if(!priv->AutoloadFailFlag)
2278 {
2279 usValue = eprom_read(dev, (u16) ((EEPROM_TxPwIndex_CCK+i)>>1) );
2280 }
2281 else
2282 {
2283 usValue = EEPROM_Default_TxPower;
2284 }
2285 *((u16*)(&priv->EEPROMTxPowerLevelCCK[i])) = usValue;
2286 RT_TRACE(COMP_INIT,"CCK Tx Power Level, Index %d = 0x%02x\n", i, priv->EEPROMTxPowerLevelCCK[i]);
2287 RT_TRACE(COMP_INIT, "CCK Tx Power Level, Index %d = 0x%02x\n", i+1, priv->EEPROMTxPowerLevelCCK[i+1]);
2288 }
2289 for(i=0; i<14; i+=2)
2290 {
2291 if(!priv->AutoloadFailFlag)
2292 {
2293 usValue = eprom_read(dev, (u16) ((EEPROM_TxPwIndex_OFDM_24G+i)>>1) );
2294 }
2295 else
2296 {
2297 usValue = EEPROM_Default_TxPower;
2298 }
2299 *((u16*)(&priv->EEPROMTxPowerLevelOFDM24G[i])) = usValue;
2300 RT_TRACE(COMP_INIT, "OFDM 2.4G Tx Power Level, Index %d = 0x%02x\n", i, priv->EEPROMTxPowerLevelOFDM24G[i]);
2301 RT_TRACE(COMP_INIT, "OFDM 2.4G Tx Power Level, Index %d = 0x%02x\n", i+1, priv->EEPROMTxPowerLevelOFDM24G[i+1]);
2302 }
2303 }
ecdfa446 2304
ecdfa446
GKH		 2305 //
2306 // Update HAL variables.
2307 //
2308 if(priv->epromtype == EPROM_93c46)
2309 {
2310 for(i=0; i<14; i++)
2311 {
2312 priv->TxPowerLevelCCK[i] = priv->EEPROMTxPowerLevelCCK[i];
2313 priv->TxPowerLevelOFDM24G[i] = priv->EEPROMTxPowerLevelOFDM24G[i];
2314 }
2315 priv->LegacyHTTxPowerDiff = priv->EEPROMLegacyHTTxPowerDiff;
2316 // Antenna B gain offset to antenna A, bit0~3
2317 priv->AntennaTxPwDiff[0] = (priv->EEPROMAntPwDiff & 0xf);
2318 // Antenna C gain offset to antenna A, bit4~7
2319 priv->AntennaTxPwDiff[1] = ((priv->EEPROMAntPwDiff & 0xf0)>>4);
2320 // Antenna D gain offset to antenna A, bit8~11
2321 priv->AntennaTxPwDiff[2] = ((priv->EEPROMAntPwDiff & 0xf00)>>8);
2322 // CrystalCap, bit12~15
2323 priv->CrystalCap = priv->EEPROMCrystalCap;
2324 // ThermalMeter, bit0~3 for RFIC1, bit4~7 for RFIC2
2325 priv->ThermalMeter[0] = (priv->EEPROMThermalMeter & 0xf);
2326 priv->ThermalMeter[1] = ((priv->EEPROMThermalMeter & 0xf0)>>4);
2327 }
2328 else if(priv->epromtype == EPROM_93c56)
2329 {
ecdfa446
GKH		 2330 for(i=0; i<3; i++) // channel 1~3 use the same Tx Power Level.
2331 {
2332 priv->TxPowerLevelCCK_A[i] = priv->EEPROMRfACCKChnl1TxPwLevel[0];
2333 priv->TxPowerLevelOFDM24G_A[i] = priv->EEPROMRfAOfdmChnlTxPwLevel[0];
2334 priv->TxPowerLevelCCK_C[i] = priv->EEPROMRfCCCKChnl1TxPwLevel[0];
2335 priv->TxPowerLevelOFDM24G_C[i] = priv->EEPROMRfCOfdmChnlTxPwLevel[0];
2336 }
2337 for(i=3; i<9; i++) // channel 4~9 use the same Tx Power Level
2338 {
2339 priv->TxPowerLevelCCK_A[i] = priv->EEPROMRfACCKChnl1TxPwLevel[1];
2340 priv->TxPowerLevelOFDM24G_A[i] = priv->EEPROMRfAOfdmChnlTxPwLevel[1];
2341 priv->TxPowerLevelCCK_C[i] = priv->EEPROMRfCCCKChnl1TxPwLevel[1];
2342 priv->TxPowerLevelOFDM24G_C[i] = priv->EEPROMRfCOfdmChnlTxPwLevel[1];
2343 }
2344 for(i=9; i<14; i++) // channel 10~14 use the same Tx Power Level
2345 {
2346 priv->TxPowerLevelCCK_A[i] = priv->EEPROMRfACCKChnl1TxPwLevel[2];
2347 priv->TxPowerLevelOFDM24G_A[i] = priv->EEPROMRfAOfdmChnlTxPwLevel[2];
2348 priv->TxPowerLevelCCK_C[i] = priv->EEPROMRfCCCKChnl1TxPwLevel[2];
2349 priv->TxPowerLevelOFDM24G_C[i] = priv->EEPROMRfCOfdmChnlTxPwLevel[2];
2350 }
2351 for(i=0; i<14; i++)
2352 RT_TRACE(COMP_INIT, "priv->TxPowerLevelCCK_A[%d] = 0x%x\n", i, priv->TxPowerLevelCCK_A[i]);
2353 for(i=0; i<14; i++)
2354 RT_TRACE(COMP_INIT,"priv->TxPowerLevelOFDM24G_A[%d] = 0x%x\n", i, priv->TxPowerLevelOFDM24G_A[i]);
2355 for(i=0; i<14; i++)
2356 RT_TRACE(COMP_INIT, "priv->TxPowerLevelCCK_C[%d] = 0x%x\n", i, priv->TxPowerLevelCCK_C[i]);
2357 for(i=0; i<14; i++)
2358 RT_TRACE(COMP_INIT, "priv->TxPowerLevelOFDM24G_C[%d] = 0x%x\n", i, priv->TxPowerLevelOFDM24G_C[i]);
2359 priv->LegacyHTTxPowerDiff = priv->EEPROMLegacyHTTxPowerDiff;
2360 priv->AntennaTxPwDiff[0] = 0;
2361 priv->AntennaTxPwDiff[1] = 0;
2362 priv->AntennaTxPwDiff[2] = 0;
2363 priv->CrystalCap = priv->EEPROMCrystalCap;
2364 // ThermalMeter, bit0~3 for RFIC1, bit4~7 for RFIC2
2365 priv->ThermalMeter[0] = (priv->EEPROMThermalMeter & 0xf);
2366 priv->ThermalMeter[1] = ((priv->EEPROMThermalMeter & 0xf0)>>4);
2367 }
2368 }
2369
2370 if(priv->rf_type == RF_1T2R)
2371 {
2372 RT_TRACE(COMP_INIT, "\n1T2R config\n");
2373 }
2374 else if (priv->rf_type == RF_2T4R)
2375 {
2376 RT_TRACE(COMP_INIT, "\n2T4R config\n");
2377 }
2378
2379 // 2008/01/16 MH We can only know RF type in the function. So we have to init
2380 // DIG RATR table again.
2381 init_rate_adaptive(dev);
2382
2383 //1 Make a copy for following variables and we can change them if we want
2384
ecdfa446
GKH		 2385 if(priv->RegChannelPlan == 0xf)
2386 {
2387 priv->ChannelPlan = priv->eeprom_ChannelPlan;
2388 }
2389 else
2390 {
2391 priv->ChannelPlan = priv->RegChannelPlan;
2392 }
2393
2394 //
2395 // Used PID and DID to Set CustomerID
2396 //
2397 if( priv->eeprom_vid == 0x1186 && priv->eeprom_did == 0x3304 )
2398 {
2399 priv->CustomerID = RT_CID_DLINK;
2400 }
2401
2402 switch(priv->eeprom_CustomerID)
2403 {
2404 case EEPROM_CID_DEFAULT:
2405 priv->CustomerID = RT_CID_DEFAULT;
2406 break;
2407 case EEPROM_CID_CAMEO:
2408 priv->CustomerID = RT_CID_819x_CAMEO;
2409 break;
2410 case EEPROM_CID_RUNTOP:
2411 priv->CustomerID = RT_CID_819x_RUNTOP;
2412 break;
2413 case EEPROM_CID_NetCore:
2414 priv->CustomerID = RT_CID_819x_Netcore;
2415 break;
2416 case EEPROM_CID_TOSHIBA: // Merge by Jacken, 2008/01/31
2417 priv->CustomerID = RT_CID_TOSHIBA;
2418 if(priv->eeprom_ChannelPlan&0x80)
2419 priv->ChannelPlan = priv->eeprom_ChannelPlan&0x7f;
2420 else
2421 priv->ChannelPlan = 0x0;
2422 RT_TRACE(COMP_INIT, "Toshiba ChannelPlan = 0x%x\n",
2423 priv->ChannelPlan);
2424 break;
2425 case EEPROM_CID_Nettronix:
ecdfa446
GKH		 2426 priv->CustomerID = RT_CID_Nettronix;
2427 break;
2428 case EEPROM_CID_Pronet:
2429 priv->CustomerID = RT_CID_PRONET;
2430 break;
2431 case EEPROM_CID_DLINK:
2432 priv->CustomerID = RT_CID_DLINK;
2433 break;
2434
2435 case EEPROM_CID_WHQL:
ecdfa446
GKH		 2436 break;
2437 default:
2438 // value from RegCustomerID
2439 break;
2440 }
2441
2442 //Avoid the channel plan array overflow, by Bruce, 2007-08-27.
2443 if(priv->ChannelPlan > CHANNEL_PLAN_LEN - 1)
2444 priv->ChannelPlan = 0; //FCC
2445
2446 switch(priv->CustomerID)
2447 {
2448 case RT_CID_DEFAULT:
ecdfa446 2449 priv->LedStrategy = SW_LED_MODE1;
ecdfa446
GKH		 2450 break;
2451
2452 case RT_CID_819x_CAMEO:
2453 priv->LedStrategy = SW_LED_MODE2;
2454 break;
2455
2456 case RT_CID_819x_RUNTOP:
2457 priv->LedStrategy = SW_LED_MODE3;
2458 break;
2459
2460 case RT_CID_819x_Netcore:
2461 priv->LedStrategy = SW_LED_MODE4;
2462 break;
2463
2464 case RT_CID_Nettronix:
2465 priv->LedStrategy = SW_LED_MODE5;
2466 break;
2467
2468 case RT_CID_PRONET:
2469 priv->LedStrategy = SW_LED_MODE6;
2470 break;
2471
2472 case RT_CID_TOSHIBA: //Modify by Jacken 2008/01/31
2473 // Do nothing.
2474 //break;
2475
2476 default:
ecdfa446 2477 priv->LedStrategy = SW_LED_MODE1;
ecdfa446
GKH		 2478 break;
2479 }
65a43784 2480
2481
ecdfa446 2482 if( priv->eeprom_vid == 0x1186 && priv->eeprom_did == 0x3304)
65a43784 2483 priv->ieee80211->bSupportRemoteWakeUp = true;
ecdfa446 2484 else
65a43784 2485 priv->ieee80211->bSupportRemoteWakeUp = false;
2486
2487
ecdfa446
GKH		 2488 RT_TRACE(COMP_INIT, "RegChannelPlan(%d)\n", priv->RegChannelPlan);
2489 RT_TRACE(COMP_INIT, "ChannelPlan = %d \n", priv->ChannelPlan);
2490 RT_TRACE(COMP_INIT, "LedStrategy = %d \n", priv->LedStrategy);
2491 RT_TRACE(COMP_TRACE, "<==== ReadAdapterInfo\n");
2492
2493 return ;
2494}
2495
2496
5e1ad18a 2497static short rtl8192_get_channel_map(struct net_device * dev)
ecdfa446
GKH		 2498{
2499 struct r8192_priv *priv = ieee80211_priv(dev);
2500#ifdef ENABLE_DOT11D
2501 if(priv->ChannelPlan> COUNTRY_CODE_GLOBAL_DOMAIN){
2502 printk("rtl8180_init:Error channel plan! Set to default.\n");
2503 priv->ChannelPlan= 0;
2504 }
2505 RT_TRACE(COMP_INIT, "Channel plan is %d\n",priv->ChannelPlan);
2506
2507 rtl819x_set_channel_map(priv->ChannelPlan, priv);
2508#else
2509 int ch,i;
2510 //Set Default Channel Plan
2511 if(!channels){
2512 DMESG("No channels, aborting");
2513 return -1;
2514 }
2515 ch=channels;
2516 priv->ChannelPlan= 0;//hikaru
2517 // set channels 1..14 allowed in given locale
2518 for (i=1; i<=14; i++) {
2519 (priv->ieee80211->channel_map)[i] = (u8)(ch & 0x01);
2520 ch >>= 1;
2521 }
2522#endif
2523 return 0;
2524}
5e1ad18a
GKH		 2525
2526static short rtl8192_init(struct net_device *dev)
ecdfa446
GKH		 2527{
2528 struct r8192_priv *priv = ieee80211_priv(dev);
2529 memset(&(priv->stats),0,sizeof(struct Stats));
2530 rtl8192_init_priv_variable(dev);
2531 rtl8192_init_priv_lock(priv);
2532 rtl8192_init_priv_task(dev);
2533 rtl8192_get_eeprom_size(dev);
3f9ab1ee 2534 rtl8192_read_eeprom_info(priv);
ecdfa446
GKH		 2535 rtl8192_get_channel_map(dev);
2536 init_hal_dm(dev);
2537 init_timer(&priv->watch_dog_timer);
2538 priv->watch_dog_timer.data = (unsigned long)dev;
2539 priv->watch_dog_timer.function = watch_dog_timer_callback;
7bb5e823 2540 if (request_irq(dev->irq, rtl8192_interrupt, IRQF_SHARED, dev->name, dev)) {
ecdfa446
GKH		 2541 printk("Error allocating IRQ %d",dev->irq);
2542 return -1;
2543 }else{
2544 priv->irq=dev->irq;
2545 printk("IRQ %d",dev->irq);
2546 }
2547 if(rtl8192_pci_initdescring(dev)!=0){
2548 printk("Endopoints initialization failed");
2549 return -1;
2550 }
2551
ecdfa446
GKH		 2552 return 0;
2553}
2554
214985a6
MM		 2555/*
2556 * Actually only set RRSR, RATR and BW_OPMODE registers
2557 * not to do all the hw config as its name says
2558 * This part need to modified according to the rate set we filtered
2559 */
5e1ad18a 2560static void rtl8192_hwconfig(struct net_device* dev)
ecdfa446
GKH		 2561{
2562 u32 regRATR = 0, regRRSR = 0;
2563 u8 regBwOpMode = 0, regTmp = 0;
2564 struct r8192_priv *priv = ieee80211_priv(dev);
2565
2566// Set RRSR, RATR, and BW_OPMODE registers
2567 //
2568 switch(priv->ieee80211->mode)
2569 {
2570 case WIRELESS_MODE_B:
2571 regBwOpMode = BW_OPMODE_20MHZ;
2572 regRATR = RATE_ALL_CCK;
2573 regRRSR = RATE_ALL_CCK;
2574 break;
2575 case WIRELESS_MODE_A:
2576 regBwOpMode = BW_OPMODE_5G |BW_OPMODE_20MHZ;
2577 regRATR = RATE_ALL_OFDM_AG;
2578 regRRSR = RATE_ALL_OFDM_AG;
2579 break;
2580 case WIRELESS_MODE_G:
2581 regBwOpMode = BW_OPMODE_20MHZ;
2582 regRATR = RATE_ALL_CCK | RATE_ALL_OFDM_AG;
2583 regRRSR = RATE_ALL_CCK | RATE_ALL_OFDM_AG;
2584 break;
2585 case WIRELESS_MODE_AUTO:
2586 case WIRELESS_MODE_N_24G:
2587 // It support CCK rate by default.
2588 // CCK rate will be filtered out only when associated AP does not support it.
2589 regBwOpMode = BW_OPMODE_20MHZ;
2590 regRATR = RATE_ALL_CCK | RATE_ALL_OFDM_AG | RATE_ALL_OFDM_1SS | RATE_ALL_OFDM_2SS;
2591 regRRSR = RATE_ALL_CCK | RATE_ALL_OFDM_AG;
2592 break;
2593 case WIRELESS_MODE_N_5G:
2594 regBwOpMode = BW_OPMODE_5G;
2595 regRATR = RATE_ALL_OFDM_AG | RATE_ALL_OFDM_1SS | RATE_ALL_OFDM_2SS;
2596 regRRSR = RATE_ALL_OFDM_AG;
2597 break;
2598 }
2599
3f9ab1ee 2600 write_nic_byte(priv, BW_OPMODE, regBwOpMode);
ecdfa446
GKH		 2601 {
2602 u32 ratr_value = 0;
2603 ratr_value = regRATR;
2604 if (priv->rf_type == RF_1T2R)
2605 {
2606 ratr_value &= ~(RATE_ALL_OFDM_2SS);
2607 }
3f9ab1ee
MM		 2608 write_nic_dword(priv, RATR0, ratr_value);
2609 write_nic_byte(priv, UFWP, 1);
ecdfa446 2610 }
3f9ab1ee 2611 regTmp = read_nic_byte(priv, 0x313);
ecdfa446 2612 regRRSR = ((regTmp) << 24) | (regRRSR & 0x00ffffff);
3f9ab1ee 2613 write_nic_dword(priv, RRSR, regRRSR);
ecdfa446
GKH		 2614
2615 //
2616 // Set Retry Limit here
2617 //
3f9ab1ee 2618 write_nic_word(priv, RETRY_LIMIT,
207b58fb 2619 priv->ShortRetryLimit << RETRY_LIMIT_SHORT_SHIFT |
ecdfa446
GKH		 2620 priv->LongRetryLimit << RETRY_LIMIT_LONG_SHIFT);
2621 // Set Contention Window here
2622
2623 // Set Tx AGC
2624
2625 // Set Tx Antenna including Feedback control
2626
2627 // Set Auto Rate fallback control
2628
2629
2630}
2631
2632
5e1ad18a 2633static RT_STATUS rtl8192_adapter_start(struct net_device *dev)
ecdfa446
GKH		 2634{
2635 struct r8192_priv *priv = ieee80211_priv(dev);
ecdfa446
GKH		 2636 u32 ulRegRead;
2637 RT_STATUS rtStatus = RT_STATUS_SUCCESS;
ecdfa446 2638 u8 tmpvalue;
ecdfa446 2639 u8 ICVersion,SwitchingRegulatorOutput;
ecdfa446 2640 bool bfirmwareok = true;
ecdfa446
GKH		 2641 u32 tmpRegA, tmpRegC, TempCCk;
2642 int i =0;
ecdfa446
GKH		 2643
2644 RT_TRACE(COMP_INIT, "====>%s()\n", __FUNCTION__);
2645 priv->being_init_adapter = true;
2646 rtl8192_pci_resetdescring(dev);
2647 // 2007/11/02 MH Before initalizing RF. We can not use FW to do RF-R/W.
2648 priv->Rf_Mode = RF_OP_By_SW_3wire;
4803ef77 2649
ecdfa446
GKH		 2650 //dPLL on
2651 if(priv->ResetProgress == RESET_TYPE_NORESET)
2652 {
3f9ab1ee 2653 write_nic_byte(priv, ANAPAR, 0x37);
ecdfa446
GKH		 2654 // Accordign to designer's explain, LBUS active will never > 10ms. We delay 10ms
2655 // Joseph increae the time to prevent firmware download fail
2656 mdelay(500);
2657 }
4803ef77 2658
ecdfa446
GKH		 2659 //PlatformSleepUs(10000);
2660 // For any kind of InitializeAdapter process, we shall use system now!!
2661 priv->pFirmware->firmware_status = FW_STATUS_0_INIT;
2662
ecdfa446
GKH		 2663 //
2664 //3 //Config CPUReset Register
2665 //3//
2666 //3 Firmware Reset Or Not
3f9ab1ee 2667 ulRegRead = read_nic_dword(priv, CPU_GEN);
ecdfa446
GKH		 2668 if(priv->pFirmware->firmware_status == FW_STATUS_0_INIT)
2669 { //called from MPInitialized. do nothing
2670 ulRegRead |= CPU_GEN_SYSTEM_RESET;
2671 }else if(priv->pFirmware->firmware_status == FW_STATUS_5_READY)
2672 ulRegRead |= CPU_GEN_FIRMWARE_RESET; // Called from MPReset
2673 else
2674 RT_TRACE(COMP_ERR, "ERROR in %s(): undefined firmware state(%d)\n", __FUNCTION__, priv->pFirmware->firmware_status);
2675
3f9ab1ee 2676 write_nic_dword(priv, CPU_GEN, ulRegRead);
ecdfa446 2677
ecdfa446
GKH		 2678 //3//
2679 //3 //Fix the issue of E-cut high temperature issue
2680 //3//
2681 // TODO: E cut only
3f9ab1ee 2682 ICVersion = read_nic_byte(priv, IC_VERRSION);
ecdfa446
GKH		 2683 if(ICVersion >= 0x4) //E-cut only
2684 {
2685 // HW SD suggest that we should not wirte this register too often, so driver
2686 // should readback this register. This register will be modified only when
2687 // power on reset
3f9ab1ee 2688 SwitchingRegulatorOutput = read_nic_byte(priv, SWREGULATOR);
ecdfa446
GKH		 2689 if(SwitchingRegulatorOutput != 0xb8)
2690 {
3f9ab1ee 2691 write_nic_byte(priv, SWREGULATOR, 0xa8);
ecdfa446 2692 mdelay(1);
3f9ab1ee 2693 write_nic_byte(priv, SWREGULATOR, 0xb8);
ecdfa446
GKH		 2694 }
2695 }
ecdfa446
GKH		 2696
2697 //3//
2698 //3// Initialize BB before MAC
2699 //3//
ecdfa446
GKH		 2700 RT_TRACE(COMP_INIT, "BB Config Start!\n");
2701 rtStatus = rtl8192_BBConfig(dev);
2702 if(rtStatus != RT_STATUS_SUCCESS)
2703 {
2704 RT_TRACE(COMP_ERR, "BB Config failed\n");
2705 return rtStatus;
2706 }
2707 RT_TRACE(COMP_INIT,"BB Config Finished!\n");
2708
ecdfa446
GKH		 2709 //3//Set Loopback mode or Normal mode
2710 //3//
2711 //2006.12.13 by emily. Note!We should not merge these two CPU_GEN register writings
2712 // because setting of System_Reset bit reset MAC to default transmission mode.
2713 //Loopback mode or not
2714 priv->LoopbackMode = RTL819X_NO_LOOPBACK;
ecdfa446
GKH		 2715 if(priv->ResetProgress == RESET_TYPE_NORESET)
2716 {
3f9ab1ee 2717 ulRegRead = read_nic_dword(priv, CPU_GEN);
ecdfa446
GKH		 2718 if(priv->LoopbackMode == RTL819X_NO_LOOPBACK)
2719 {
2720 ulRegRead = ((ulRegRead & CPU_GEN_NO_LOOPBACK_MSK) | CPU_GEN_NO_LOOPBACK_SET);
2721 }
2722 else if (priv->LoopbackMode == RTL819X_MAC_LOOPBACK )
2723 {
2724 ulRegRead |= CPU_CCK_LOOPBACK;
2725 }
2726 else
2727 {
2728 RT_TRACE(COMP_ERR,"Serious error: wrong loopback mode setting\n");
2729 }
2730
2731 //2008.06.03, for WOL
2732 //ulRegRead &= (~(CPU_GEN_GPIO_UART));
3f9ab1ee 2733 write_nic_dword(priv, CPU_GEN, ulRegRead);
ecdfa446
GKH		 2734
2735 // 2006.11.29. After reset cpu, we sholud wait for a second, otherwise, it may fail to write registers. Emily
2736 udelay(500);
2737 }
2738 //3Set Hardware(Do nothing now)
2739 rtl8192_hwconfig(dev);
2740 //2=======================================================
2741 // Common Setting for all of the FPGA platform. (part 1)
2742 //2=======================================================
2743 // If there is changes, please make sure it applies to all of the FPGA version
2744 //3 Turn on Tx/Rx
3f9ab1ee 2745 write_nic_byte(priv, CMDR, CR_RE|CR_TE);
ecdfa446
GKH		 2746
2747 //2Set Tx dma burst
3f9ab1ee 2748 write_nic_byte(priv, PCIF, ((MXDMA2_NoLimit<<MXDMA2_RX_SHIFT) |
ecdfa446 2749 (MXDMA2_NoLimit<<MXDMA2_TX_SHIFT) ));
4803ef77 2750
ecdfa446 2751 //set IDR0 here
3f9ab1ee
MM		 2752 write_nic_dword(priv, MAC0, ((u32*)dev->dev_addr)[0]);
2753 write_nic_word(priv, MAC4, ((u16*)(dev->dev_addr + 4))[0]);
ecdfa446 2754 //set RCR
3f9ab1ee 2755 write_nic_dword(priv, RCR, priv->ReceiveConfig);
ecdfa446
GKH		 2756
2757 //3 Initialize Number of Reserved Pages in Firmware Queue
3f9ab1ee 2758 write_nic_dword(priv, RQPN1, NUM_OF_PAGE_IN_FW_QUEUE_BK << RSVD_FW_QUEUE_PAGE_BK_SHIFT |
207b58fb
MM		 2759 NUM_OF_PAGE_IN_FW_QUEUE_BE << RSVD_FW_QUEUE_PAGE_BE_SHIFT |
2760 NUM_OF_PAGE_IN_FW_QUEUE_VI << RSVD_FW_QUEUE_PAGE_VI_SHIFT |
ecdfa446 2761 NUM_OF_PAGE_IN_FW_QUEUE_VO <<RSVD_FW_QUEUE_PAGE_VO_SHIFT);
3f9ab1ee
MM		 2762 write_nic_dword(priv, RQPN2, NUM_OF_PAGE_IN_FW_QUEUE_MGNT << RSVD_FW_QUEUE_PAGE_MGNT_SHIFT);
2763 write_nic_dword(priv, RQPN3, APPLIED_RESERVED_QUEUE_IN_FW|
207b58fb 2764 NUM_OF_PAGE_IN_FW_QUEUE_BCN<<RSVD_FW_QUEUE_PAGE_BCN_SHIFT|
ecdfa446 2765 NUM_OF_PAGE_IN_FW_QUEUE_PUB<<RSVD_FW_QUEUE_PAGE_PUB_SHIFT);
ecdfa446
GKH		 2766
2767 rtl8192_tx_enable(dev);
2768 rtl8192_rx_enable(dev);
2769 //3Set Response Rate Setting Register
2770 // CCK rate is supported by default.
2771 // CCK rate will be filtered out only when associated AP does not support it.
3f9ab1ee
MM		 2772 ulRegRead = (0xFFF00000 & read_nic_dword(priv, RRSR)) | RATE_ALL_OFDM_AG | RATE_ALL_CCK;
2773 write_nic_dword(priv, RRSR, ulRegRead);
2774 write_nic_dword(priv, RATR0+4*7, (RATE_ALL_OFDM_AG | RATE_ALL_CCK));
ecdfa446
GKH		 2775
2776 //2Set AckTimeout
2777 // TODO: (it value is only for FPGA version). need to be changed!!2006.12.18, by Emily
3f9ab1ee 2778 write_nic_byte(priv, ACK_TIMEOUT, 0x30);
ecdfa446 2779
ecdfa446
GKH		 2780 if(priv->ResetProgress == RESET_TYPE_NORESET)
2781 rtl8192_SetWirelessMode(dev, priv->ieee80211->mode);
2782 //-----------------------------------------------------------------------------
2783 // Set up security related. 070106, by rcnjko:
2784 // 1. Clear all H/W keys.
2785 // 2. Enable H/W encryption/decryption.
2786 //-----------------------------------------------------------------------------
2787 CamResetAllEntry(dev);
2788 {
2789 u8 SECR_value = 0x0;
2790 SECR_value |= SCR_TxEncEnable;
2791 SECR_value |= SCR_RxDecEnable;
2792 SECR_value |= SCR_NoSKMC;
3f9ab1ee 2793 write_nic_byte(priv, SECR, SECR_value);
ecdfa446
GKH		 2794 }
2795 //3Beacon related
3f9ab1ee
MM		 2796 write_nic_word(priv, ATIMWND, 2);
2797 write_nic_word(priv, BCN_INTERVAL, 100);
5e1ad18a 2798 for (i=0; i<QOS_QUEUE_NUM; i++)
3f9ab1ee 2799 write_nic_dword(priv, WDCAPARA_ADD[i], 0x005e4332);
ecdfa446
GKH		 2800 //
2801 // Switching regulator controller: This is set temporarily.
2802 // It's not sure if this can be removed in the future.
2803 // PJ advised to leave it by default.
2804 //
3f9ab1ee 2805 write_nic_byte(priv, 0xbe, 0xc0);
ecdfa446
GKH		 2806
2807 //2=======================================================
2808 // Set PHY related configuration defined in MAC register bank
2809 //2=======================================================
2810 rtl8192_phy_configmac(dev);
2811
2812 if (priv->card_8192_version > (u8) VERSION_8190_BD) {
2813 rtl8192_phy_getTxPower(dev);
2814 rtl8192_phy_setTxPower(dev, priv->chan);
2815 }
2816
2817 //if D or C cut
3f9ab1ee 2818 tmpvalue = read_nic_byte(priv, IC_VERRSION);
ecdfa446
GKH		 2819 priv->IC_Cut = tmpvalue;
2820 RT_TRACE(COMP_INIT, "priv->IC_Cut = 0x%x\n", priv->IC_Cut);
2821 if(priv->IC_Cut >= IC_VersionCut_D)
2822 {
2823 //pHalData->bDcut = TRUE;
2824 if(priv->IC_Cut == IC_VersionCut_D)
2825 RT_TRACE(COMP_INIT, "D-cut\n");
2826 if(priv->IC_Cut == IC_VersionCut_E)
2827 {
2828 RT_TRACE(COMP_INIT, "E-cut\n");
2829 // HW SD suggest that we should not wirte this register too often, so driver
2830 // should readback this register. This register will be modified only when
2831 // power on reset
2832 }
2833 }
2834 else
2835 {
2836 //pHalData->bDcut = FALSE;
2837 RT_TRACE(COMP_INIT, "Before C-cut\n");
2838 }
2839
ecdfa446
GKH		 2840 //Firmware download
2841 RT_TRACE(COMP_INIT, "Load Firmware!\n");
2842 bfirmwareok = init_firmware(dev);
2843 if(bfirmwareok != true) {
2844 rtStatus = RT_STATUS_FAILURE;
2845 return rtStatus;
2846 }
2847 RT_TRACE(COMP_INIT, "Load Firmware finished!\n");
11aacc28 2848
ecdfa446
GKH		 2849 //RF config
2850 if(priv->ResetProgress == RESET_TYPE_NORESET)
2851 {
2852 RT_TRACE(COMP_INIT, "RF Config Started!\n");
2853 rtStatus = rtl8192_phy_RFConfig(dev);
2854 if(rtStatus != RT_STATUS_SUCCESS)
2855 {
2856 RT_TRACE(COMP_ERR, "RF Config failed\n");
2857 return rtStatus;
2858 }
2859 RT_TRACE(COMP_INIT, "RF Config Finished!\n");
2860 }
2861 rtl8192_phy_updateInitGain(dev);
2862
2863 /*---- Set CCK and OFDM Block "ON"----*/
2864 rtl8192_setBBreg(dev, rFPGA0_RFMOD, bCCKEn, 0x1);
2865 rtl8192_setBBreg(dev, rFPGA0_RFMOD, bOFDMEn, 0x1);
2866
ecdfa446 2867 //Enable Led
3f9ab1ee 2868 write_nic_byte(priv, 0x87, 0x0);
ecdfa446
GKH		 2869
2870 //2=======================================================
2871 // RF Power Save
2872 //2=======================================================
2873#ifdef ENABLE_IPS
2874
2875{
0157a2b9 2876 if(priv->ieee80211->RfOffReason > RF_CHANGE_BY_PS)
ecdfa446
GKH		 2877 { // H/W or S/W RF OFF before sleep.
2878 RT_TRACE((COMP_INIT|COMP_RF|COMP_POWER), "%s(): Turn off RF for RfOffReason(%d) ----------\n", __FUNCTION__,priv->ieee80211->RfOffReason);
2879 MgntActSet_RF_State(dev, eRfOff, priv->ieee80211->RfOffReason);
2880 }
2881 else if(priv->ieee80211->RfOffReason >= RF_CHANGE_BY_IPS)
2882 { // H/W or S/W RF OFF before sleep.
2883 RT_TRACE((COMP_INIT|COMP_RF|COMP_POWER), "%s(): Turn off RF for RfOffReason(%d) ----------\n", __FUNCTION__,priv->ieee80211->RfOffReason);
2884 MgntActSet_RF_State(dev, eRfOff, priv->ieee80211->RfOffReason);
2885 }
2886 else
2887 {
2888 RT_TRACE((COMP_INIT|COMP_RF|COMP_POWER), "%s(): RF-ON \n",__FUNCTION__);
2889 priv->ieee80211->eRFPowerState = eRfOn;
2890 priv->ieee80211->RfOffReason = 0;
ecdfa446
GKH		 2891 }
2892}
2893#endif
4803ef77
MM		 2894 // We can force firmware to do RF-R/W
2895 if(priv->ieee80211->FwRWRF)
2896 priv->Rf_Mode = RF_OP_By_FW;
2897 else
2898 priv->Rf_Mode = RF_OP_By_SW_3wire;
ecdfa446 2899
ecdfa446
GKH		 2900 if(priv->ResetProgress == RESET_TYPE_NORESET)
2901 {
2902 dm_initialize_txpower_tracking(dev);
2903
2904 if(priv->IC_Cut >= IC_VersionCut_D)
2905 {
2906 tmpRegA= rtl8192_QueryBBReg(dev,rOFDM0_XATxIQImbalance,bMaskDWord);
2907 tmpRegC= rtl8192_QueryBBReg(dev,rOFDM0_XCTxIQImbalance,bMaskDWord);
2908 for(i = 0; i<TxBBGainTableLength; i++)
2909 {
2910 if(tmpRegA == priv->txbbgain_table[i].txbbgain_value)
2911 {
2912 priv->rfa_txpowertrackingindex= (u8)i;
2913 priv->rfa_txpowertrackingindex_real= (u8)i;
2914 priv->rfa_txpowertracking_default = priv->rfa_txpowertrackingindex;
2915 break;
2916 }
2917 }
2918
2919 TempCCk = rtl8192_QueryBBReg(dev, rCCK0_TxFilter1, bMaskByte2);
2920
2921 for(i=0 ; i<CCKTxBBGainTableLength ; i++)
2922 {
2923 if(TempCCk == priv->cck_txbbgain_table[i].ccktxbb_valuearray[0])
2924 {
2925 priv->CCKPresentAttentuation_20Mdefault =(u8) i;
2926 break;
2927 }
2928 }
2929 priv->CCKPresentAttentuation_40Mdefault = 0;
2930 priv->CCKPresentAttentuation_difference = 0;
2931 priv->CCKPresentAttentuation = priv->CCKPresentAttentuation_20Mdefault;
2932 RT_TRACE(COMP_POWER_TRACKING, "priv->rfa_txpowertrackingindex_initial = %d\n", priv->rfa_txpowertrackingindex);
2933 RT_TRACE(COMP_POWER_TRACKING, "priv->rfa_txpowertrackingindex_real__initial = %d\n", priv->rfa_txpowertrackingindex_real);
2934 RT_TRACE(COMP_POWER_TRACKING, "priv->CCKPresentAttentuation_difference_initial = %d\n", priv->CCKPresentAttentuation_difference);
2935 RT_TRACE(COMP_POWER_TRACKING, "priv->CCKPresentAttentuation_initial = %d\n", priv->CCKPresentAttentuation);
2936 priv->btxpower_tracking = FALSE;//TEMPLY DISABLE
2937 }
2938 }
4803ef77 2939
ecdfa446
GKH		 2940 rtl8192_irq_enable(dev);
2941 priv->being_init_adapter = false;
2942 return rtStatus;
2943
2944}
2945
80a4dead 2946static void rtl8192_prepare_beacon(unsigned long arg)
ecdfa446 2947{
80a4dead 2948 struct r8192_priv *priv = (struct r8192_priv*) arg;
ecdfa446 2949 struct sk_buff *skb;
ecdfa446
GKH		 2950 cb_desc *tcb_desc;
2951
2952 skb = ieee80211_get_beacon(priv->ieee80211);
2953 tcb_desc = (cb_desc *)(skb->cb + 8);
ecdfa446
GKH		 2954 /* prepare misc info for the beacon xmit */
2955 tcb_desc->queue_index = BEACON_QUEUE;
bbc9a991 2956 /* IBSS does not support HT yet, use 1M defaultly */
ecdfa446
GKH		 2957 tcb_desc->data_rate = 2;
2958 tcb_desc->RATRIndex = 7;
2959 tcb_desc->bTxDisableRateFallBack = 1;
2960 tcb_desc->bTxUseDriverAssingedRate = 1;
2961
2962 skb_push(skb, priv->ieee80211->tx_headroom);
2963 if(skb){
2964 rtl8192_tx(priv->ieee80211->dev,skb);
2965 }
ecdfa446
GKH		 2966}
2967
ecdfa446 2968
214985a6
MM		 2969/*
2970 * configure registers for beacon tx and enables it via
ecdfa446
GKH		 2971 * rtl8192_beacon_tx_enable(). rtl8192_beacon_tx_disable() might
2972 * be used to stop beacon transmission
2973 */
559fba5e 2974static void rtl8192_start_beacon(struct net_device *dev)
ecdfa446
GKH		 2975{
2976 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
2977 struct ieee80211_network *net = &priv->ieee80211->current_network;
2978 u16 BcnTimeCfg = 0;
2979 u16 BcnCW = 6;
2980 u16 BcnIFS = 0xf;
2981
2982 DMESG("Enabling beacon TX");
ecdfa446
GKH		 2983 rtl8192_irq_disable(dev);
2984 //rtl8192_beacon_tx_enable(dev);
2985
2986 /* ATIM window */
3f9ab1ee 2987 write_nic_word(priv, ATIMWND, 2);
ecdfa446
GKH		 2988
2989 /* Beacon interval (in unit of TU) */
3f9ab1ee 2990 write_nic_word(priv, BCN_INTERVAL, net->beacon_interval);
ecdfa446
GKH		 2991
2992 /*
2993 * DrvErlyInt (in unit of TU).
2994 * (Time to send interrupt to notify driver to c
2995 * hange beacon content)
2996 * */
3f9ab1ee 2997 write_nic_word(priv, BCN_DRV_EARLY_INT, 10);
ecdfa446
GKH		 2998
2999 /*
3000 * BcnDMATIM(in unit of us).
3001 * Indicates the time before TBTT to perform beacon queue DMA
3002 * */
3f9ab1ee 3003 write_nic_word(priv, BCN_DMATIME, 256);
ecdfa446
GKH		 3004
3005 /*
3006 * Force beacon frame transmission even after receiving
3007 * beacon frame from other ad hoc STA
3008 * */
3f9ab1ee 3009 write_nic_byte(priv, BCN_ERR_THRESH, 100);
ecdfa446
GKH		 3010
3011 /* Set CW and IFS */
3012 BcnTimeCfg |= BcnCW<<BCN_TCFG_CW_SHIFT;
3013 BcnTimeCfg |= BcnIFS<<BCN_TCFG_IFS;
3f9ab1ee 3014 write_nic_word(priv, BCN_TCFG, BcnTimeCfg);
ecdfa446
GKH		 3015
3016
3017 /* enable the interrupt for ad-hoc process */
3018 rtl8192_irq_enable(dev);
3019}
ecdfa446 3020
5e1ad18a 3021static bool HalRxCheckStuck8190Pci(struct net_device *dev)
ecdfa446
GKH		 3022{
3023 struct r8192_priv *priv = ieee80211_priv(dev);
3f9ab1ee 3024 u16 RegRxCounter = read_nic_word(priv, 0x130);
ecdfa446 3025 bool bStuck = FALSE;
935ce899 3026
ecdfa446
GKH		 3027 RT_TRACE(COMP_RESET,"%s(): RegRxCounter is %d,RxCounter is %d\n",__FUNCTION__,RegRxCounter,priv->RxCounter);
3028 // If rssi is small, we should check rx for long time because of bad rx.
3029 // or maybe it will continuous silent reset every 2 seconds.
935ce899 3030 priv->rx_chk_cnt++;
ecdfa446
GKH		 3031 if(priv->undecorated_smoothed_pwdb >= (RateAdaptiveTH_High+5))
3032 {
935ce899 3033 priv->rx_chk_cnt = 0; /* high rssi, check rx stuck right now. */
ecdfa446
GKH		 3034 }
3035 else if(priv->undecorated_smoothed_pwdb < (RateAdaptiveTH_High+5) &&
3036 ((priv->CurrentChannelBW!=HT_CHANNEL_WIDTH_20&&priv->undecorated_smoothed_pwdb>=RateAdaptiveTH_Low_40M) ||
3037 (priv->CurrentChannelBW==HT_CHANNEL_WIDTH_20&&priv->undecorated_smoothed_pwdb>=RateAdaptiveTH_Low_20M)) )
3038
3039 {
935ce899 3040 if(priv->rx_chk_cnt < 2)
ecdfa446
GKH		 3041 {
3042 return bStuck;
3043 }
3044 else
3045 {
935ce899 3046 priv->rx_chk_cnt = 0;
ecdfa446
GKH		 3047 }
3048 }
3049 else if(((priv->CurrentChannelBW!=HT_CHANNEL_WIDTH_20&&priv->undecorated_smoothed_pwdb<RateAdaptiveTH_Low_40M) ||
3050 (priv->CurrentChannelBW==HT_CHANNEL_WIDTH_20&&priv->undecorated_smoothed_pwdb<RateAdaptiveTH_Low_20M)) &&
3051 priv->undecorated_smoothed_pwdb >= VeryLowRSSI)
3052 {
935ce899 3053 if(priv->rx_chk_cnt < 4)
ecdfa446 3054 {
ecdfa446
GKH		 3055 return bStuck;
3056 }
3057 else
3058 {
935ce899 3059 priv->rx_chk_cnt = 0;
ecdfa446
GKH		 3060 }
3061 }
3062 else
3063 {
935ce899 3064 if(priv->rx_chk_cnt < 8)
ecdfa446 3065 {
ecdfa446
GKH		 3066 return bStuck;
3067 }
3068 else
3069 {
935ce899 3070 priv->rx_chk_cnt = 0;
ecdfa446
GKH		 3071 }
3072 }
ecdfa446
GKH		 3073 if(priv->RxCounter==RegRxCounter)
3074 bStuck = TRUE;
3075
3076 priv->RxCounter = RegRxCounter;
3077
3078 return bStuck;
3079}
3080
5e1ad18a 3081static RESET_TYPE RxCheckStuck(struct net_device *dev)
ecdfa446
GKH		 3082{
3083
3084 if(HalRxCheckStuck8190Pci(dev))
3085 {
3086 RT_TRACE(COMP_RESET, "RxStuck Condition\n");
3087 return RESET_TYPE_SILENT;
3088 }
3089
3090 return RESET_TYPE_NORESET;
3091}
3092
5e1ad18a 3093static RESET_TYPE
ecdfa446
GKH		 3094rtl819x_ifcheck_resetornot(struct net_device *dev)
3095{
3096 struct r8192_priv *priv = ieee80211_priv(dev);
3097 RESET_TYPE TxResetType = RESET_TYPE_NORESET;
3098 RESET_TYPE RxResetType = RESET_TYPE_NORESET;
3099 RT_RF_POWER_STATE rfState;
3100
3101 rfState = priv->ieee80211->eRFPowerState;
3102
ecdfa446
GKH		 3103 if( rfState != eRfOff &&
3104 /*ADAPTER_TEST_STATUS_FLAG(Adapter, ADAPTER_STATUS_FW_DOWNLOAD_FAILURE)) &&*/
3105 (priv->ieee80211->iw_mode != IW_MODE_ADHOC))
3106 {
3107 // If driver is in the status of firmware download failure , driver skips RF initialization and RF is
3108 // in turned off state. Driver should check whether Rx stuck and do silent reset. And
3109 // if driver is in firmware download failure status, driver should initialize RF in the following
3110 // silent reset procedure Emily, 2008.01.21
3111
3112 // Driver should not check RX stuck in IBSS mode because it is required to
3113 // set Check BSSID in order to send beacon, however, if check BSSID is
3114 // set, STA cannot hear any packet a all. Emily, 2008.04.12
3115 RxResetType = RxCheckStuck(dev);
3116 }
ecdfa446
GKH		 3117
3118 RT_TRACE(COMP_RESET,"%s(): TxResetType is %d, RxResetType is %d\n",__FUNCTION__,TxResetType,RxResetType);
3119 if(TxResetType==RESET_TYPE_NORMAL || RxResetType==RESET_TYPE_NORMAL)
3120 return RESET_TYPE_NORMAL;
3121 else if(TxResetType==RESET_TYPE_SILENT || RxResetType==RESET_TYPE_SILENT)
3122 return RESET_TYPE_SILENT;
3123 else
3124 return RESET_TYPE_NORESET;
3125
3126}
3127
ecdfa446
GKH		 3128#ifdef ENABLE_IPS
3129void InactivePsWorkItemCallback(struct net_device *dev)
3130{
3131 struct r8192_priv *priv = ieee80211_priv(dev);
3132 PRT_POWER_SAVE_CONTROL pPSC = (PRT_POWER_SAVE_CONTROL)(&(priv->ieee80211->PowerSaveControl));
ecdfa446
GKH		 3133
3134 RT_TRACE(COMP_POWER, "InactivePsWorkItemCallback() ---------> \n");
3135 //
3136 // This flag "bSwRfProcessing", indicates the status of IPS procedure, should be set if the IPS workitem
3137 // is really scheduled.
3138 // The old code, sets this flag before scheduling the IPS workitem and however, at the same time the
3139 // previous IPS workitem did not end yet, fails to schedule the current workitem. Thus, bSwRfProcessing
3140 // blocks the IPS procedure of switching RF.
3141 // By Bruce, 2007-12-25.
3142 //
3143 pPSC->bSwRfProcessing = TRUE;
3144
207b58fb 3145 RT_TRACE(COMP_RF, "InactivePsWorkItemCallback(): Set RF to %s.\n",
ecdfa446
GKH		 3146 pPSC->eInactivePowerState == eRfOff?"OFF":"ON");
3147
3148
3149 MgntActSet_RF_State(dev, pPSC->eInactivePowerState, RF_CHANGE_BY_IPS);
3150
3151 //
3152 // To solve CAM values miss in RF OFF, rewrite CAM values after RF ON. By Bruce, 2007-09-20.
3153 //
ecdfa446
GKH		 3154 pPSC->bSwRfProcessing = FALSE;
3155 RT_TRACE(COMP_POWER, "InactivePsWorkItemCallback() <--------- \n");
3156}
3157
65a43784 3158#ifdef ENABLE_LPS
214985a6 3159/* Change current and default preamble mode. */
65a43784 3160bool MgntActSet_802_11_PowerSaveMode(struct net_device *dev, u8 rtPsMode)
3161{
3162 struct r8192_priv *priv = ieee80211_priv(dev);
65a43784 3163
3164 // Currently, we do not change power save mode on IBSS mode.
3165 if(priv->ieee80211->iw_mode == IW_MODE_ADHOC)
3166 {
3167 return false;
3168 }
3169
3170 //
3171 // <RJ_NOTE> If we make HW to fill up the PwrMgt bit for us,
3172 // some AP will not response to our mgnt frames with PwrMgt bit set,
3173 // e.g. cannot associate the AP.
3174 // So I commented out it. 2005.02.16, by rcnjko.
3175 //
3176// // Change device's power save mode.
3177// Adapter->HalFunc.SetPSModeHandler( Adapter, rtPsMode );
3178
3179 // Update power save mode configured.
3180 //RT_TRACE(COMP_LPS,"%s(): set ieee->ps = %x\n",__FUNCTION__,rtPsMode);
3181 if(!priv->ps_force) {
3182 priv->ieee80211->ps = rtPsMode;
3183 }
3184
3185 // Awake immediately
3186 if(priv->ieee80211->sta_sleep != 0 && rtPsMode == IEEE80211_PS_DISABLED)
3187 {
65a43784 3188 // Notify the AP we awke.
3189 rtl8192_hw_wakeup(dev);
3190 priv->ieee80211->sta_sleep = 0;
3191
0cfc6185 3192 spin_lock(&priv->ieee80211->mgmt_tx_lock);
65a43784 3193 printk("LPS leave: notify AP we are awaked ++++++++++ SendNullFunctionData\n");
3194 ieee80211_sta_ps_send_null_frame(priv->ieee80211, 0);
0cfc6185 3195 spin_unlock(&priv->ieee80211->mgmt_tx_lock);
65a43784 3196 }
3197
3198 return true;
3199}
3200
214985a6 3201/* Enter the leisure power save mode. */
65a43784 3202void LeisurePSEnter(struct net_device *dev)
3203{
3204 struct r8192_priv *priv = ieee80211_priv(dev);
3205 PRT_POWER_SAVE_CONTROL pPSC = (PRT_POWER_SAVE_CONTROL)(&(priv->ieee80211->PowerSaveControl));
3206
65a43784 3207 if(!((priv->ieee80211->iw_mode == IW_MODE_INFRA) &&
3208 (priv->ieee80211->state == IEEE80211_LINKED)) ||
3209 (priv->ieee80211->iw_mode == IW_MODE_ADHOC) ||
3210 (priv->ieee80211->iw_mode == IW_MODE_MASTER))
3211 return;
3212
3213 if (pPSC->bLeisurePs)
3214 {
3215 // Idle for a while if we connect to AP a while ago.
3216 if(pPSC->LpsIdleCount >= RT_CHECK_FOR_HANG_PERIOD) // 4 Sec
3217 {
3218
3219 if(priv->ieee80211->ps == IEEE80211_PS_DISABLED)
3220 {
65a43784 3221 MgntActSet_802_11_PowerSaveMode(dev, IEEE80211_PS_MBCAST|IEEE80211_PS_UNICAST);
3222
3223 }
3224 }
3225 else
3226 pPSC->LpsIdleCount++;
3227 }
3228}
3229
3230
214985a6 3231/* Leave leisure power save mode. */
65a43784 3232void LeisurePSLeave(struct net_device *dev)
3233{
3234 struct r8192_priv *priv = ieee80211_priv(dev);
3235 PRT_POWER_SAVE_CONTROL pPSC = (PRT_POWER_SAVE_CONTROL)(&(priv->ieee80211->PowerSaveControl));
3236
65a43784 3237 if (pPSC->bLeisurePs)
3238 {
3239 if(priv->ieee80211->ps != IEEE80211_PS_DISABLED)
3240 {
3241 // move to lps_wakecomplete()
65a43784 3242 MgntActSet_802_11_PowerSaveMode(dev, IEEE80211_PS_DISABLED);
3243
3244 }
3245 }
3246}
3247#endif
3248
3249
214985a6 3250/* Enter the inactive power save mode. RF will be off */
ecdfa446
GKH		 3251void
3252IPSEnter(struct net_device *dev)
3253{
3254 struct r8192_priv *priv = ieee80211_priv(dev);
3255 PRT_POWER_SAVE_CONTROL pPSC = (PRT_POWER_SAVE_CONTROL)(&(priv->ieee80211->PowerSaveControl));
3256 RT_RF_POWER_STATE rtState;
3257
3258 if (pPSC->bInactivePs)
3259 {
3260 rtState = priv->ieee80211->eRFPowerState;
3261 //
3262 // Added by Bruce, 2007-12-25.
3263 // Do not enter IPS in the following conditions:
3264 // (1) RF is already OFF or Sleep
3265 // (2) bSwRfProcessing (indicates the IPS is still under going)
3266 // (3) Connectted (only disconnected can trigger IPS)
3267 // (4) IBSS (send Beacon)
3268 // (5) AP mode (send Beacon)
3269 //
3270 if (rtState == eRfOn && !pPSC->bSwRfProcessing
3271 && (priv->ieee80211->state != IEEE80211_LINKED) )
3272 {
3273 RT_TRACE(COMP_RF,"IPSEnter(): Turn off RF.\n");
3274 pPSC->eInactivePowerState = eRfOff;
3275// queue_work(priv->priv_wq,&(pPSC->InactivePsWorkItem));
3276 InactivePsWorkItemCallback(dev);
3277 }
3278 }
3279}
3280
3281//
3282// Description:
3283// Leave the inactive power save mode, RF will be on.
3284// 2007.08.17, by shien chang.
3285//
3286void
3287IPSLeave(struct net_device *dev)
3288{
3289 struct r8192_priv *priv = ieee80211_priv(dev);
3290 PRT_POWER_SAVE_CONTROL pPSC = (PRT_POWER_SAVE_CONTROL)(&(priv->ieee80211->PowerSaveControl));
3291 RT_RF_POWER_STATE rtState;
3292
3293 if (pPSC->bInactivePs)
3294 {
3295 rtState = priv->ieee80211->eRFPowerState;
3296 if (rtState != eRfOn && !pPSC->bSwRfProcessing && priv->ieee80211->RfOffReason <= RF_CHANGE_BY_IPS)
3297 {
3298 RT_TRACE(COMP_POWER, "IPSLeave(): Turn on RF.\n");
3299 pPSC->eInactivePowerState = eRfOn;
ecdfa446
GKH		 3300 InactivePsWorkItemCallback(dev);
3301 }
3302 }
3303}
65a43784 3304
80a4dead 3305void IPSLeave_wq(struct work_struct *work)
65a43784 3306{
80a4dead 3307 struct ieee80211_device *ieee = container_of(work, struct ieee80211_device, ips_leave_wq);
65a43784 3308 struct net_device *dev = ieee->dev;
3309
3310 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
3311 down(&priv->ieee80211->ips_sem);
3312 IPSLeave(dev);
3313 up(&priv->ieee80211->ips_sem);
3314}
3315
3316void ieee80211_ips_leave_wq(struct net_device *dev)
3317{
3318 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
3319 RT_RF_POWER_STATE rtState;
3320 rtState = priv->ieee80211->eRFPowerState;
3321
3322 if(priv->ieee80211->PowerSaveControl.bInactivePs){
3323 if(rtState == eRfOff){
3324 if(priv->ieee80211->RfOffReason > RF_CHANGE_BY_IPS)
3325 {
3326 RT_TRACE(COMP_ERR, "%s(): RF is OFF.\n",__FUNCTION__);
3327 return;
3328 }
3329 else{
3330 printk("=========>%s(): IPSLeave\n",__FUNCTION__);
3331 queue_work(priv->ieee80211->wq,&priv->ieee80211->ips_leave_wq);
3332 }
3333 }
3334 }
3335}
3336//added by amy 090331 end
3337void ieee80211_ips_leave(struct net_device *dev)
3338{
3339 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
3340 down(&priv->ieee80211->ips_sem);
3341 IPSLeave(dev);
3342 up(&priv->ieee80211->ips_sem);
3343}
ecdfa446 3344#endif
ecdfa446 3345
5e1ad18a 3346static void rtl819x_update_rxcounts(
ecdfa446
GKH		 3347 struct r8192_priv *priv,
3348 u32* TotalRxBcnNum,
3349 u32* TotalRxDataNum
3350)
3351{
3352 u16 SlotIndex;
3353 u8 i;
3354
3355 *TotalRxBcnNum = 0;
3356 *TotalRxDataNum = 0;
3357
3358 SlotIndex = (priv->ieee80211->LinkDetectInfo.SlotIndex++)%(priv->ieee80211->LinkDetectInfo.SlotNum);
3359 priv->ieee80211->LinkDetectInfo.RxBcnNum[SlotIndex] = priv->ieee80211->LinkDetectInfo.NumRecvBcnInPeriod;
3360 priv->ieee80211->LinkDetectInfo.RxDataNum[SlotIndex] = priv->ieee80211->LinkDetectInfo.NumRecvDataInPeriod;
3361 for( i=0; i<priv->ieee80211->LinkDetectInfo.SlotNum; i++ ){
3362 *TotalRxBcnNum += priv->ieee80211->LinkDetectInfo.RxBcnNum[i];
3363 *TotalRxDataNum += priv->ieee80211->LinkDetectInfo.RxDataNum[i];
3364 }
3365}
3366
3367
559fba5e 3368static void rtl819x_watchdog_wqcallback(struct work_struct *work)
ecdfa446
GKH		 3369{
3370 struct delayed_work *dwork = container_of(work,struct delayed_work,work);
3371 struct r8192_priv *priv = container_of(dwork,struct r8192_priv,watch_dog_wq);
3372 struct net_device *dev = priv->ieee80211->dev;
ecdfa446
GKH		 3373 struct ieee80211_device* ieee = priv->ieee80211;
3374 RESET_TYPE ResetType = RESET_TYPE_NORESET;
ecdfa446 3375 bool bBusyTraffic = false;
65a43784 3376 bool bEnterPS = false;
3377
f500e256 3378 if ((!priv->up) || priv->bHwRadioOff)
65a43784 3379 return;
3380
ecdfa446
GKH		 3381 if(!priv->up)
3382 return;
3383 hal_dm_watchdog(dev);
3384#ifdef ENABLE_IPS
ecdfa446 3385 if(ieee->actscanning == false){
207b58fb
MM		 3386 if((ieee->iw_mode == IW_MODE_INFRA) && (ieee->state == IEEE80211_NOLINK) &&
3387 (ieee->eRFPowerState == eRfOn)&&!ieee->is_set_key &&
65a43784 3388 (!ieee->proto_stoppping) && !ieee->wx_set_enc){
ecdfa446 3389 if(ieee->PowerSaveControl.ReturnPoint == IPS_CALLBACK_NONE){
ecdfa446 3390 IPSEnter(dev);
ecdfa446
GKH		 3391 }
3392 }
3393 }
3394#endif
3395 {//to get busy traffic condition
3396 if(ieee->state == IEEE80211_LINKED)
3397 {
65a43784 3398 if( ieee->LinkDetectInfo.NumRxOkInPeriod> 100 ||
3399 ieee->LinkDetectInfo.NumTxOkInPeriod> 100 ) {
ecdfa446
GKH		 3400 bBusyTraffic = true;
3401 }
3402
65a43784 3403#ifdef ENABLE_LPS
3404 //added by amy for Leisure PS
3405 if( ((ieee->LinkDetectInfo.NumRxUnicastOkInPeriod + ieee->LinkDetectInfo.NumTxOkInPeriod) > 8 ) ||
3406 (ieee->LinkDetectInfo.NumRxUnicastOkInPeriod > 2) )
3407 {
65a43784 3408 bEnterPS= false;
3409 }
3410 else
3411 {
3412 bEnterPS= true;
3413 }
3414
65a43784 3415 // LeisurePS only work in infra mode.
3416 if(bEnterPS)
3417 {
3418 LeisurePSEnter(dev);
3419 }
3420 else
3421 {
3422 LeisurePSLeave(dev);
3423 }
3424#endif
3425
3426 }
3427 else
3428 {
3429#ifdef ENABLE_LPS
65a43784 3430 LeisurePSLeave(dev);
3431#endif
ecdfa446 3432 }
65a43784 3433
ecdfa446
GKH		 3434 ieee->LinkDetectInfo.NumRxOkInPeriod = 0;
3435 ieee->LinkDetectInfo.NumTxOkInPeriod = 0;
65a43784 3436 ieee->LinkDetectInfo.NumRxUnicastOkInPeriod = 0;
ecdfa446
GKH		 3437 ieee->LinkDetectInfo.bBusyTraffic = bBusyTraffic;
3438 }
3439
3440
3441 //added by amy for AP roaming
ecdfa446
GKH		 3442 if(ieee->state == IEEE80211_LINKED && ieee->iw_mode == IW_MODE_INFRA)
3443 {
3444 u32 TotalRxBcnNum = 0;
3445 u32 TotalRxDataNum = 0;
3446
3447 rtl819x_update_rxcounts(priv, &TotalRxBcnNum, &TotalRxDataNum);
3448 if((TotalRxBcnNum+TotalRxDataNum) == 0)
3449 {
3450 if( ieee->eRFPowerState == eRfOff)
3451 RT_TRACE(COMP_ERR,"========>%s()\n",__FUNCTION__);
3452 printk("===>%s(): AP is power off,connect another one\n",__FUNCTION__);
65a43784 3453 // Dot11d_Reset(dev);
ecdfa446
GKH		 3454 ieee->state = IEEE80211_ASSOCIATING;
3455 notify_wx_assoc_event(priv->ieee80211);
65a43784 3456 RemovePeerTS(priv->ieee80211,priv->ieee80211->current_network.bssid);
ecdfa446
GKH		 3457 ieee->is_roaming = true;
3458 ieee->is_set_key = false;
65a43784 3459 ieee->link_change(dev);
3460 queue_work(ieee->wq, &ieee->associate_procedure_wq);
ecdfa446
GKH		 3461 }
3462 }
3463 ieee->LinkDetectInfo.NumRecvBcnInPeriod=0;
3464 ieee->LinkDetectInfo.NumRecvDataInPeriod=0;
3465
ecdfa446 3466 //check if reset the driver
d5fdaa3a
MM		 3467 if (priv->watchdog_check_reset_cnt++ >= 3 && !ieee->is_roaming &&
3468 priv->watchdog_last_time != 1)
ecdfa446
GKH		 3469 {
3470 ResetType = rtl819x_ifcheck_resetornot(dev);
d5fdaa3a 3471 priv->watchdog_check_reset_cnt = 3;
ecdfa446 3472 }
ecdfa446
GKH		 3473 if(!priv->bDisableNormalResetCheck && ResetType == RESET_TYPE_NORMAL)
3474 {
3475 priv->ResetProgress = RESET_TYPE_NORMAL;
3476 RT_TRACE(COMP_RESET,"%s(): NOMAL RESET\n",__FUNCTION__);
3477 return;
3478 }
3479 /* disable silent reset temply 2008.9.11*/
11aacc28 3480
ecdfa446
GKH		 3481 if( ((priv->force_reset) || (!priv->bDisableNormalResetCheck && ResetType==RESET_TYPE_SILENT))) // This is control by OID set in Pomelo
3482 {
d5fdaa3a 3483 priv->watchdog_last_time = 1;
ecdfa446
GKH		 3484 }
3485 else
d5fdaa3a 3486 priv->watchdog_last_time = 0;
11aacc28 3487
ecdfa446
GKH		 3488 priv->force_reset = false;
3489 priv->bForcedSilentReset = false;
3490 priv->bResetInProgress = false;
3491 RT_TRACE(COMP_TRACE, " <==RtUsbCheckForHangWorkItemCallback()\n");
3492
3493}
3494
3495void watch_dog_timer_callback(unsigned long data)
3496{
3497 struct r8192_priv *priv = ieee80211_priv((struct net_device *) data);
ecdfa446 3498 queue_delayed_work(priv->priv_wq,&priv->watch_dog_wq,0);
ecdfa446
GKH		 3499 mod_timer(&priv->watch_dog_timer, jiffies + MSECS(IEEE80211_WATCH_DOG_TIME));
3500
3501}
5b3b1a7b
MM		 3502
3503static int _rtl8192_up(struct net_device *dev)
ecdfa446
GKH		 3504{
3505 struct r8192_priv *priv = ieee80211_priv(dev);
ecdfa446
GKH		 3506 RT_STATUS init_status = RT_STATUS_SUCCESS;
3507 priv->up=1;
3508 priv->ieee80211->ieee_up=1;
65a43784 3509 priv->bdisable_nic = false; //YJ,add,091111
ecdfa446
GKH		 3510 RT_TRACE(COMP_INIT, "Bringing up iface");
3511
3512 init_status = rtl8192_adapter_start(dev);
3513 if(init_status != RT_STATUS_SUCCESS)
3514 {
3515 RT_TRACE(COMP_ERR,"ERR!!! %s(): initialization is failed!\n",__FUNCTION__);
3516 return -1;
3517 }
3518 RT_TRACE(COMP_INIT, "start adapter finished\n");
4803ef77 3519
ecdfa446
GKH		 3520 if(priv->ieee80211->eRFPowerState!=eRfOn)
3521 MgntActSet_RF_State(dev, eRfOn, priv->ieee80211->RfOffReason);
4803ef77 3522
ecdfa446
GKH		 3523 if(priv->ieee80211->state != IEEE80211_LINKED)
3524 ieee80211_softmac_start_protocol(priv->ieee80211);
3525 ieee80211_reset_queue(priv->ieee80211);
3526 watch_dog_timer_callback((unsigned long) dev);
3527 if(!netif_queue_stopped(dev))
3528 netif_start_queue(dev);
3529 else
3530 netif_wake_queue(dev);
3531
3532 return 0;
3533}
3534
3535
5e1ad18a 3536static int rtl8192_open(struct net_device *dev)
ecdfa446
GKH		 3537{
3538 struct r8192_priv *priv = ieee80211_priv(dev);
3539 int ret;
3540
3541 down(&priv->wx_sem);
3542 ret = rtl8192_up(dev);
3543 up(&priv->wx_sem);
3544 return ret;
3545
3546}
3547
3548
3549int rtl8192_up(struct net_device *dev)
3550{
3551 struct r8192_priv *priv = ieee80211_priv(dev);
3552
3553 if (priv->up == 1) return -1;
3554
3555 return _rtl8192_up(dev);
3556}
3557
3558
5e1ad18a 3559static int rtl8192_close(struct net_device *dev)
ecdfa446
GKH		 3560{
3561 struct r8192_priv *priv = ieee80211_priv(dev);
3562 int ret;
3563
3564 down(&priv->wx_sem);
3565
3566 ret = rtl8192_down(dev);
3567
3568 up(&priv->wx_sem);
3569
3570 return ret;
3571
3572}
3573
3574int rtl8192_down(struct net_device *dev)
3575{
3576 struct r8192_priv *priv = ieee80211_priv(dev);
16d74da0 3577
ecdfa446
GKH		 3578 if (priv->up == 0) return -1;
3579
65a43784 3580#ifdef ENABLE_LPS
3581 //LZM for PS-Poll AID issue. 090429
3582 if(priv->ieee80211->state == IEEE80211_LINKED)
3583 LeisurePSLeave(dev);
3584#endif
3585
ecdfa446
GKH		 3586 priv->up=0;
3587 priv->ieee80211->ieee_up = 0;
3588 RT_TRACE(COMP_DOWN, "==========>%s()\n", __FUNCTION__);
3589/* FIXME */
3590 if (!netif_queue_stopped(dev))
3591 netif_stop_queue(dev);
3592
3593 rtl8192_irq_disable(dev);
ecdfa446
GKH		 3594 rtl8192_cancel_deferred_work(priv);
3595 deinit_hal_dm(dev);
3596 del_timer_sync(&priv->watch_dog_timer);
3597
65a43784 3598 ieee80211_softmac_stop_protocol(priv->ieee80211,true);
3599
3600 rtl8192_halt_adapter(dev,false);
ecdfa446
GKH		 3601 memset(&priv->ieee80211->current_network, 0 , offsetof(struct ieee80211_network, list));
3602
3603 RT_TRACE(COMP_DOWN, "<==========%s()\n", __FUNCTION__);
3604
16d74da0 3605 return 0;
ecdfa446
GKH		 3606}
3607
3608
3609void rtl8192_commit(struct net_device *dev)
3610{
3611 struct r8192_priv *priv = ieee80211_priv(dev);
3612
3613 if (priv->up == 0) return ;
3614
3615
65a43784 3616 ieee80211_softmac_stop_protocol(priv->ieee80211,true);
ecdfa446
GKH		 3617
3618 rtl8192_irq_disable(dev);
65a43784 3619 rtl8192_halt_adapter(dev,true);
ecdfa446
GKH		 3620 _rtl8192_up(dev);
3621}
3622
5b3b1a7b 3623static void rtl8192_restart(struct work_struct *work)
ecdfa446
GKH		 3624{
3625 struct r8192_priv *priv = container_of(work, struct r8192_priv, reset_wq);
3626 struct net_device *dev = priv->ieee80211->dev;
ecdfa446
GKH		 3627
3628 down(&priv->wx_sem);
3629
3630 rtl8192_commit(dev);
3631
3632 up(&priv->wx_sem);
3633}
3634
3635static void r8192_set_multicast(struct net_device *dev)
3636{
3637 struct r8192_priv *priv = ieee80211_priv(dev);
ecdfa446 3638
109ded2b 3639 priv->promisc = (dev->flags & IFF_PROMISC) ? 1 : 0;
ecdfa446
GKH		 3640}
3641
3642
5e1ad18a 3643static int r8192_set_mac_adr(struct net_device *dev, void *mac)
ecdfa446
GKH		 3644{
3645 struct r8192_priv *priv = ieee80211_priv(dev);
3646 struct sockaddr *addr = mac;
3647
3648 down(&priv->wx_sem);
3649
3650 memcpy(dev->dev_addr, addr->sa_data, ETH_ALEN);
3651
ecdfa446 3652 schedule_work(&priv->reset_wq);
ecdfa446
GKH		 3653 up(&priv->wx_sem);
3654
3655 return 0;
3656}
3657
4573d145
MM		 3658static void r8192e_set_hw_key(struct r8192_priv *priv, struct ieee_param *ipw)
3659{
3660 struct ieee80211_device *ieee = priv->ieee80211;
3661 struct net_device *dev = priv->ieee80211->dev;
3662 u8 broadcast_addr[6] = {0xff,0xff,0xff,0xff,0xff,0xff};
3663 u32 key[4];
3664
3665 if (ipw->u.crypt.set_tx) {
3666 if (strcmp(ipw->u.crypt.alg, "CCMP") == 0)
3667 ieee->pairwise_key_type = KEY_TYPE_CCMP;
3668 else if (strcmp(ipw->u.crypt.alg, "TKIP") == 0)
3669 ieee->pairwise_key_type = KEY_TYPE_TKIP;
3670 else if (strcmp(ipw->u.crypt.alg, "WEP") == 0) {
3671 if (ipw->u.crypt.key_len == 13)
3672 ieee->pairwise_key_type = KEY_TYPE_WEP104;
3673 else if (ipw->u.crypt.key_len == 5)
3674 ieee->pairwise_key_type = KEY_TYPE_WEP40;
3675 } else
3676 ieee->pairwise_key_type = KEY_TYPE_NA;
3677
3678 if (ieee->pairwise_key_type) {
3679 memcpy(key, ipw->u.crypt.key, 16);
3680 EnableHWSecurityConfig8192(dev);
3681 /*
3682 * We fill both index entry and 4th entry for pairwise
3683 * key as in IPW interface, adhoc will only get here,
3684 * so we need index entry for its default key serching!
3685 */
3686 setKey(dev, 4, ipw->u.crypt.idx,
3687 ieee->pairwise_key_type,
3688 (u8*)ieee->ap_mac_addr, 0, key);
3689
3690 /* LEAP WEP will never set this. */
3691 if (ieee->auth_mode != 2)
3692 setKey(dev, ipw->u.crypt.idx, ipw->u.crypt.idx,
3693 ieee->pairwise_key_type,
3694 (u8*)ieee->ap_mac_addr, 0, key);
3695 }
3696 if ((ieee->pairwise_key_type == KEY_TYPE_CCMP) &&
3697 ieee->pHTInfo->bCurrentHTSupport) {
3698 write_nic_byte(priv, 0x173, 1); /* fix aes bug */
3699 }
3700 } else {
3701 memcpy(key, ipw->u.crypt.key, 16);
3702 if (strcmp(ipw->u.crypt.alg, "CCMP") == 0)
3703 ieee->group_key_type= KEY_TYPE_CCMP;
3704 else if (strcmp(ipw->u.crypt.alg, "TKIP") == 0)
3705 ieee->group_key_type = KEY_TYPE_TKIP;
3706 else if (strcmp(ipw->u.crypt.alg, "WEP") == 0) {
3707 if (ipw->u.crypt.key_len == 13)
3708 ieee->group_key_type = KEY_TYPE_WEP104;
3709 else if (ipw->u.crypt.key_len == 5)
3710 ieee->group_key_type = KEY_TYPE_WEP40;
3711 } else
3712 ieee->group_key_type = KEY_TYPE_NA;
3713
3714 if (ieee->group_key_type) {
3715 setKey(dev, ipw->u.crypt.idx, ipw->u.crypt.idx,
3716 ieee->group_key_type, broadcast_addr, 0, key);
3717 }
3718 }
3719}
3720
ecdfa446 3721/* based on ipw2200 driver */
5e1ad18a 3722static int rtl8192_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
ecdfa446
GKH		 3723{
3724 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
3725 struct iwreq *wrq = (struct iwreq *)rq;
3726 int ret=-1;
ecdfa446
GKH		 3727 struct iw_point *p = &wrq->u.data;
3728 struct ieee_param *ipw = NULL;//(struct ieee_param *)wrq->u.data.pointer;
3729
3730 down(&priv->wx_sem);
3731
3732
3733 if (p->length < sizeof(struct ieee_param) || !p->pointer){
3734 ret = -EINVAL;
3735 goto out;
3736 }
3737
32414878 3738 ipw = kmalloc(p->length, GFP_KERNEL);
ecdfa446
GKH		 3739 if (ipw == NULL){
3740 ret = -ENOMEM;
3741 goto out;
3742 }
3743 if (copy_from_user(ipw, p->pointer, p->length)) {
3744 kfree(ipw);
3745 ret = -EFAULT;
3746 goto out;
3747 }
3748
3749 switch (cmd) {
4573d145
MM		 3750 case RTL_IOCTL_WPA_SUPPLICANT:
3751 /* parse here for HW security */
3752 if (ipw->cmd == IEEE_CMD_SET_ENCRYPTION)
3753 r8192e_set_hw_key(priv, ipw);
ecdfa446
GKH		 3754 ret = ieee80211_wpa_supplicant_ioctl(priv->ieee80211, &wrq->u.data);
3755 break;
3756
4573d145 3757 default:
ecdfa446
GKH		 3758 ret = -EOPNOTSUPP;
3759 break;
3760 }
3761
3762 kfree(ipw);
3763out:
3764 up(&priv->wx_sem);
3765
3766 return ret;
3767}
3768
5e1ad18a 3769static u8 HwRateToMRate90(bool bIsHT, u8 rate)
ecdfa446
GKH		 3770{
3771 u8 ret_rate = 0x02;
3772
3773 if(!bIsHT) {
3774 switch(rate) {
3775 case DESC90_RATE1M: ret_rate = MGN_1M; break;
3776 case DESC90_RATE2M: ret_rate = MGN_2M; break;
3777 case DESC90_RATE5_5M: ret_rate = MGN_5_5M; break;
3778 case DESC90_RATE11M: ret_rate = MGN_11M; break;
3779 case DESC90_RATE6M: ret_rate = MGN_6M; break;
3780 case DESC90_RATE9M: ret_rate = MGN_9M; break;
3781 case DESC90_RATE12M: ret_rate = MGN_12M; break;
3782 case DESC90_RATE18M: ret_rate = MGN_18M; break;
3783 case DESC90_RATE24M: ret_rate = MGN_24M; break;
3784 case DESC90_RATE36M: ret_rate = MGN_36M; break;
3785 case DESC90_RATE48M: ret_rate = MGN_48M; break;
3786 case DESC90_RATE54M: ret_rate = MGN_54M; break;
3787
3788 default:
3789 RT_TRACE(COMP_RECV, "HwRateToMRate90(): Non supported Rate [%x], bIsHT = %d!!!\n", rate, bIsHT);
3790 break;
3791 }
3792
3793 } else {
3794 switch(rate) {
3795 case DESC90_RATEMCS0: ret_rate = MGN_MCS0; break;
3796 case DESC90_RATEMCS1: ret_rate = MGN_MCS1; break;
3797 case DESC90_RATEMCS2: ret_rate = MGN_MCS2; break;
3798 case DESC90_RATEMCS3: ret_rate = MGN_MCS3; break;
3799 case DESC90_RATEMCS4: ret_rate = MGN_MCS4; break;
3800 case DESC90_RATEMCS5: ret_rate = MGN_MCS5; break;
3801 case DESC90_RATEMCS6: ret_rate = MGN_MCS6; break;
3802 case DESC90_RATEMCS7: ret_rate = MGN_MCS7; break;
3803 case DESC90_RATEMCS8: ret_rate = MGN_MCS8; break;
3804 case DESC90_RATEMCS9: ret_rate = MGN_MCS9; break;
3805 case DESC90_RATEMCS10: ret_rate = MGN_MCS10; break;
3806 case DESC90_RATEMCS11: ret_rate = MGN_MCS11; break;
3807 case DESC90_RATEMCS12: ret_rate = MGN_MCS12; break;
3808 case DESC90_RATEMCS13: ret_rate = MGN_MCS13; break;
3809 case DESC90_RATEMCS14: ret_rate = MGN_MCS14; break;
3810 case DESC90_RATEMCS15: ret_rate = MGN_MCS15; break;
3811 case DESC90_RATEMCS32: ret_rate = (0x80|0x20); break;
3812
3813 default:
3814 RT_TRACE(COMP_RECV, "HwRateToMRate90(): Non supported Rate [%x], bIsHT = %d!!!\n",rate, bIsHT);
3815 break;
3816 }
3817 }
3818
3819 return ret_rate;
3820}
3821
214985a6 3822/* Record the TSF time stamp when receiving a packet */
5e1ad18a 3823static void UpdateRxPktTimeStamp8190 (struct net_device *dev, struct ieee80211_rx_stats *stats)
ecdfa446
GKH		 3824{
3825 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
3826
3827 if(stats->bIsAMPDU && !stats->bFirstMPDU) {
3828 stats->mac_time[0] = priv->LastRxDescTSFLow;
3829 stats->mac_time[1] = priv->LastRxDescTSFHigh;
3830 } else {
3831 priv->LastRxDescTSFLow = stats->mac_time[0];
3832 priv->LastRxDescTSFHigh = stats->mac_time[1];
3833 }
3834}
3835
5e1ad18a 3836static long rtl819x_translate_todbm(u8 signal_strength_index)// 0-100 index.
ecdfa446
GKH		 3837{
3838 long signal_power; // in dBm.
3839
3840 // Translate to dBm (x=0.5y-95).
3841 signal_power = (long)((signal_strength_index + 1) >> 1);
3842 signal_power -= 95;
3843
3844 return signal_power;
3845}
3846
ecdfa446
GKH		 3847/* 2008/01/22 MH We can not delcare RSSI/EVM total value of sliding window to
3848 be a local static. Otherwise, it may increase when we return from S3/S4. The
3849 value will be kept in memory or disk. We must delcare the value in adapter
3850 and it will be reinitialized when return from S3/S4. */
5e1ad18a 3851static void rtl8192_process_phyinfo(struct r8192_priv * priv, u8* buffer,struct ieee80211_rx_stats * pprevious_stats, struct ieee80211_rx_stats * pcurrent_stats)
ecdfa446
GKH		 3852{
3853 bool bcheck = false;
3854 u8 rfpath;
3855 u32 nspatial_stream, tmp_val;
ecdfa446
GKH		 3856 static u32 slide_rssi_index=0, slide_rssi_statistics=0;
3857 static u32 slide_evm_index=0, slide_evm_statistics=0;
3858 static u32 last_rssi=0, last_evm=0;
ecdfa446
GKH		 3859 //cosa add for beacon rssi smoothing
3860 static u32 slide_beacon_adc_pwdb_index=0, slide_beacon_adc_pwdb_statistics=0;
3861 static u32 last_beacon_adc_pwdb=0;
3862
3863 struct ieee80211_hdr_3addr *hdr;
3864 u16 sc ;
3865 unsigned int frag,seq;
3866 hdr = (struct ieee80211_hdr_3addr *)buffer;
3867 sc = le16_to_cpu(hdr->seq_ctl);
3868 frag = WLAN_GET_SEQ_FRAG(sc);
3869 seq = WLAN_GET_SEQ_SEQ(sc);
3870 //cosa add 04292008 to record the sequence number
3871 pcurrent_stats->Seq_Num = seq;
3872 //
3873 // Check whether we should take the previous packet into accounting
3874 //
3875 if(!pprevious_stats->bIsAMPDU)
3876 {
3877 // if previous packet is not aggregated packet
3878 bcheck = true;
ecdfa446
GKH		 3879 }
3880
3881 if(slide_rssi_statistics++ >= PHY_RSSI_SLID_WIN_MAX)
3882 {
3883 slide_rssi_statistics = PHY_RSSI_SLID_WIN_MAX;
3884 last_rssi = priv->stats.slide_signal_strength[slide_rssi_index];
3885 priv->stats.slide_rssi_total -= last_rssi;
3886 }
3887 priv->stats.slide_rssi_total += pprevious_stats->SignalStrength;
3888
3889 priv->stats.slide_signal_strength[slide_rssi_index++] = pprevious_stats->SignalStrength;
3890 if(slide_rssi_index >= PHY_RSSI_SLID_WIN_MAX)
3891 slide_rssi_index = 0;
3892
3893 // <1> Showed on UI for user, in dbm
3894 tmp_val = priv->stats.slide_rssi_total/slide_rssi_statistics;
3895 priv->stats.signal_strength = rtl819x_translate_todbm((u8)tmp_val);
3896 pcurrent_stats->rssi = priv->stats.signal_strength;
3897 //
3898 // If the previous packet does not match the criteria, neglect it
3899 //
3900 if(!pprevious_stats->bPacketMatchBSSID)
3901 {
3902 if(!pprevious_stats->bToSelfBA)
3903 return;
3904 }
3905
3906 if(!bcheck)
3907 return;
3908
ecdfa446
GKH		 3909 // <2> Showed on UI for engineering
3910 // hardware does not provide rssi information for each rf path in CCK
3911 if(!pprevious_stats->bIsCCK && pprevious_stats->bPacketToSelf)
3912 {
3913 for (rfpath = RF90_PATH_A; rfpath < RF90_PATH_C; rfpath++)
3914 {
3915 if (!rtl8192_phy_CheckIsLegalRFPath(priv->ieee80211->dev, rfpath))
3916 continue;
3917 RT_TRACE(COMP_DBG,"Jacken -> pPreviousstats->RxMIMOSignalStrength[rfpath] = %d \n" ,pprevious_stats->RxMIMOSignalStrength[rfpath] );
3918 //Fixed by Jacken 2008-03-20
3919 if(priv->stats.rx_rssi_percentage[rfpath] == 0)
3920 {
3921 priv->stats.rx_rssi_percentage[rfpath] = pprevious_stats->RxMIMOSignalStrength[rfpath];
ecdfa446
GKH		 3922 }
3923 if(pprevious_stats->RxMIMOSignalStrength[rfpath] > priv->stats.rx_rssi_percentage[rfpath])
3924 {
3925 priv->stats.rx_rssi_percentage[rfpath] =
3926 ( (priv->stats.rx_rssi_percentage[rfpath]*(Rx_Smooth_Factor-1)) +
3927 (pprevious_stats->RxMIMOSignalStrength[rfpath])) /(Rx_Smooth_Factor);
3928 priv->stats.rx_rssi_percentage[rfpath] = priv->stats.rx_rssi_percentage[rfpath] + 1;
3929 }
3930 else
3931 {
3932 priv->stats.rx_rssi_percentage[rfpath] =
3933 ( (priv->stats.rx_rssi_percentage[rfpath]*(Rx_Smooth_Factor-1)) +
3934 (pprevious_stats->RxMIMOSignalStrength[rfpath])) /(Rx_Smooth_Factor);
3935 }
3936 RT_TRACE(COMP_DBG,"Jacken -> priv->RxStats.RxRSSIPercentage[rfPath] = %d \n" ,priv->stats.rx_rssi_percentage[rfpath] );
3937 }
3938 }
3939
3940
3941 //
3942 // Check PWDB.
3943 //
3944 //cosa add for beacon rssi smoothing by average.
3945 if(pprevious_stats->bPacketBeacon)
3946 {
3947 /* record the beacon pwdb to the sliding window. */
3948 if(slide_beacon_adc_pwdb_statistics++ >= PHY_Beacon_RSSI_SLID_WIN_MAX)
3949 {
3950 slide_beacon_adc_pwdb_statistics = PHY_Beacon_RSSI_SLID_WIN_MAX;
3951 last_beacon_adc_pwdb = priv->stats.Slide_Beacon_pwdb[slide_beacon_adc_pwdb_index];
3952 priv->stats.Slide_Beacon_Total -= last_beacon_adc_pwdb;
ecdfa446
GKH		 3953 // slide_beacon_adc_pwdb_index, last_beacon_adc_pwdb, Adapter->RxStats.Slide_Beacon_Total);
3954 }
3955 priv->stats.Slide_Beacon_Total += pprevious_stats->RxPWDBAll;
3956 priv->stats.Slide_Beacon_pwdb[slide_beacon_adc_pwdb_index] = pprevious_stats->RxPWDBAll;
ecdfa446
GKH		 3957 slide_beacon_adc_pwdb_index++;
3958 if(slide_beacon_adc_pwdb_index >= PHY_Beacon_RSSI_SLID_WIN_MAX)
3959 slide_beacon_adc_pwdb_index = 0;
3960 pprevious_stats->RxPWDBAll = priv->stats.Slide_Beacon_Total/slide_beacon_adc_pwdb_statistics;
3961 if(pprevious_stats->RxPWDBAll >= 3)
3962 pprevious_stats->RxPWDBAll -= 3;
3963 }
3964
3965 RT_TRACE(COMP_RXDESC, "Smooth %s PWDB = %d\n",
3966 pprevious_stats->bIsCCK? "CCK": "OFDM",
3967 pprevious_stats->RxPWDBAll);
3968
3969 if(pprevious_stats->bPacketToSelf || pprevious_stats->bPacketBeacon || pprevious_stats->bToSelfBA)
3970 {
3971 if(priv->undecorated_smoothed_pwdb < 0) // initialize
3972 {
3973 priv->undecorated_smoothed_pwdb = pprevious_stats->RxPWDBAll;
ecdfa446 3974 }
11aacc28 3975
ecdfa446
GKH		 3976 if(pprevious_stats->RxPWDBAll > (u32)priv->undecorated_smoothed_pwdb)
3977 {
3978 priv->undecorated_smoothed_pwdb =
3979 ( ((priv->undecorated_smoothed_pwdb)*(Rx_Smooth_Factor-1)) +
3980 (pprevious_stats->RxPWDBAll)) /(Rx_Smooth_Factor);
3981 priv->undecorated_smoothed_pwdb = priv->undecorated_smoothed_pwdb + 1;
3982 }
3983 else
3984 {
3985 priv->undecorated_smoothed_pwdb =
3986 ( ((priv->undecorated_smoothed_pwdb)*(Rx_Smooth_Factor-1)) +
3987 (pprevious_stats->RxPWDBAll)) /(Rx_Smooth_Factor);
3988 }
ecdfa446
GKH		 3989 }
3990
3991 //
3992 // Check EVM
3993 //
3994 /* record the general EVM to the sliding window. */
3995 if(pprevious_stats->SignalQuality == 0)
3996 {
3997 }
3998 else
3999 {
4000 if(pprevious_stats->bPacketToSelf || pprevious_stats->bPacketBeacon || pprevious_stats->bToSelfBA){
4001 if(slide_evm_statistics++ >= PHY_RSSI_SLID_WIN_MAX){
4002 slide_evm_statistics = PHY_RSSI_SLID_WIN_MAX;
4003 last_evm = priv->stats.slide_evm[slide_evm_index];
4004 priv->stats.slide_evm_total -= last_evm;
4005 }
4006
4007 priv->stats.slide_evm_total += pprevious_stats->SignalQuality;
4008
4009 priv->stats.slide_evm[slide_evm_index++] = pprevious_stats->SignalQuality;
4010 if(slide_evm_index >= PHY_RSSI_SLID_WIN_MAX)
4011 slide_evm_index = 0;
4012
4013 // <1> Showed on UI for user, in percentage.
4014 tmp_val = priv->stats.slide_evm_total/slide_evm_statistics;
ecdfa446 4015 //cosa add 10/11/2007, Showed on UI for user in Windows Vista, for Link quality.
ecdfa446
GKH		 4016 }
4017
4018 // <2> Showed on UI for engineering
4019 if(pprevious_stats->bPacketToSelf || pprevious_stats->bPacketBeacon || pprevious_stats->bToSelfBA)
4020 {
4021 for(nspatial_stream = 0; nspatial_stream<2 ; nspatial_stream++) // 2 spatial stream
4022 {
4023 if(pprevious_stats->RxMIMOSignalQuality[nspatial_stream] != -1)
4024 {
4025 if(priv->stats.rx_evm_percentage[nspatial_stream] == 0) // initialize
4026 {
4027 priv->stats.rx_evm_percentage[nspatial_stream] = pprevious_stats->RxMIMOSignalQuality[nspatial_stream];
4028 }
4029 priv->stats.rx_evm_percentage[nspatial_stream] =
4030 ( (priv->stats.rx_evm_percentage[nspatial_stream]* (Rx_Smooth_Factor-1)) +
4031 (pprevious_stats->RxMIMOSignalQuality[nspatial_stream]* 1)) / (Rx_Smooth_Factor);
4032 }
4033 }
4034 }
4035 }
4036
4037}
4038
ecdfa446
GKH		 4039static u8 rtl819x_query_rxpwrpercentage(
4040 char antpower
4041 )
4042{
4043 if ((antpower <= -100) || (antpower >= 20))
4044 {
4045 return 0;
4046 }
4047 else if (antpower >= 0)
4048 {
4049 return 100;
4050 }
4051 else
4052 {
4053 return (100+antpower);
4054 }
4055
d5abdf72 4056}
ecdfa446
GKH		 4057
4058static u8
4059rtl819x_evm_dbtopercentage(
4060 char value
4061 )
4062{
4063 char ret_val;
4064
4065 ret_val = value;
4066
4067 if(ret_val >= 0)
4068 ret_val = 0;
4069 if(ret_val <= -33)
4070 ret_val = -33;
4071 ret_val = 0 - ret_val;
4072 ret_val*=3;
4073 if(ret_val == 99)
4074 ret_val = 100;
c6eae677 4075 return ret_val;
ecdfa446
GKH		 4076}
4077
214985a6 4078/* We want good-looking for signal strength/quality */
5e1ad18a 4079static long rtl819x_signal_scale_mapping(long currsig)
ecdfa446
GKH		 4080{
4081 long retsig;
4082
4083 // Step 1. Scale mapping.
4084 if(currsig >= 61 && currsig <= 100)
4085 {
4086 retsig = 90 + ((currsig - 60) / 4);
4087 }
4088 else if(currsig >= 41 && currsig <= 60)
4089 {
4090 retsig = 78 + ((currsig - 40) / 2);
4091 }
4092 else if(currsig >= 31 && currsig <= 40)
4093 {
4094 retsig = 66 + (currsig - 30);
4095 }
4096 else if(currsig >= 21 && currsig <= 30)
4097 {
4098 retsig = 54 + (currsig - 20);
4099 }
4100 else if(currsig >= 5 && currsig <= 20)
4101 {
4102 retsig = 42 + (((currsig - 5) * 2) / 3);
4103 }
4104 else if(currsig == 4)
4105 {
4106 retsig = 36;
4107 }
4108 else if(currsig == 3)
4109 {
4110 retsig = 27;
4111 }
4112 else if(currsig == 2)
4113 {
4114 retsig = 18;
4115 }
4116 else if(currsig == 1)
4117 {
4118 retsig = 9;
4119 }
4120 else
4121 {
4122 retsig = currsig;
4123 }
4124
4125 return retsig;
4126}
4127
4128static void rtl8192_query_rxphystatus(
4129 struct r8192_priv * priv,
4130 struct ieee80211_rx_stats * pstats,
4131 prx_desc_819x_pci pdesc,
4132 prx_fwinfo_819x_pci pdrvinfo,
4133 struct ieee80211_rx_stats * precord_stats,
4134 bool bpacket_match_bssid,
4135 bool bpacket_toself,
4136 bool bPacketBeacon,
4137 bool bToSelfBA
4138 )
4139{
4140 //PRT_RFD_STATUS pRtRfdStatus = &(pRfd->Status);
4141 phy_sts_ofdm_819xpci_t* pofdm_buf;
4142 phy_sts_cck_819xpci_t * pcck_buf;
4143 phy_ofdm_rx_status_rxsc_sgien_exintfflag* prxsc;
4144 u8 *prxpkt;
4145 u8 i,max_spatial_stream, tmp_rxsnr, tmp_rxevm, rxsc_sgien_exflg;
4146 char rx_pwr[4], rx_pwr_all=0;
4147 //long rx_avg_pwr = 0;
4148 char rx_snrX, rx_evmX;
4149 u8 evm, pwdb_all;
4150 u32 RSSI, total_rssi=0;//, total_evm=0;
4151// long signal_strength_index = 0;
4152 u8 is_cck_rate=0;
4153 u8 rf_rx_num = 0;
4154
ecdfa446
GKH		 4155 is_cck_rate = rx_hal_is_cck_rate(pdrvinfo);
4156
4157 // Record it for next packet processing
4158 memset(precord_stats, 0, sizeof(struct ieee80211_rx_stats));
4159 pstats->bPacketMatchBSSID = precord_stats->bPacketMatchBSSID = bpacket_match_bssid;
4160 pstats->bPacketToSelf = precord_stats->bPacketToSelf = bpacket_toself;
4161 pstats->bIsCCK = precord_stats->bIsCCK = is_cck_rate;//RX_HAL_IS_CCK_RATE(pDrvInfo);
4162 pstats->bPacketBeacon = precord_stats->bPacketBeacon = bPacketBeacon;
4163 pstats->bToSelfBA = precord_stats->bToSelfBA = bToSelfBA;
4164 /*2007.08.30 requested by SD3 Jerry */
d163f324 4165 if (priv->phy_check_reg824 == 0)
ecdfa446 4166 {
d163f324
MM		 4167 priv->phy_reg824_bit9 = rtl8192_QueryBBReg(priv->ieee80211->dev, rFPGA0_XA_HSSIParameter2, 0x200);
4168 priv->phy_check_reg824 = 1;
ecdfa446
GKH		 4169 }
4170
4171
4172 prxpkt = (u8*)pdrvinfo;
4173
4174 /* Move pointer to the 16th bytes. Phy status start address. */
4175 prxpkt += sizeof(rx_fwinfo_819x_pci);
4176
4177 /* Initial the cck and ofdm buffer pointer */
4178 pcck_buf = (phy_sts_cck_819xpci_t *)prxpkt;
4179 pofdm_buf = (phy_sts_ofdm_819xpci_t *)prxpkt;
4180
4181 pstats->RxMIMOSignalQuality[0] = -1;
4182 pstats->RxMIMOSignalQuality[1] = -1;
4183 precord_stats->RxMIMOSignalQuality[0] = -1;
4184 precord_stats->RxMIMOSignalQuality[1] = -1;
4185
4186 if(is_cck_rate)
4187 {
4188 //
4189 // (1)Hardware does not provide RSSI for CCK
4190 //
4191
4192 //
4193 // (2)PWDB, Average PWDB cacluated by hardware (for rate adaptive)
4194 //
4195 u8 report;//, cck_agc_rpt;
ecdfa446 4196
d163f324 4197 if (!priv->phy_reg824_bit9)
ecdfa446
GKH		 4198 {
4199 report = pcck_buf->cck_agc_rpt & 0xc0;
4200 report = report>>6;
4201 switch(report)
4202 {
4203 //Fixed by Jacken from Bryant 2008-03-20
4204 //Original value is -38 , -26 , -14 , -2
4205 //Fixed value is -35 , -23 , -11 , 6
4206 case 0x3:
4207 rx_pwr_all = -35 - (pcck_buf->cck_agc_rpt & 0x3e);
4208 break;
4209 case 0x2:
4210 rx_pwr_all = -23 - (pcck_buf->cck_agc_rpt & 0x3e);
4211 break;
4212 case 0x1:
4213 rx_pwr_all = -11 - (pcck_buf->cck_agc_rpt & 0x3e);
4214 break;
4215 case 0x0:
4216 rx_pwr_all = 8 - (pcck_buf->cck_agc_rpt & 0x3e);
4217 break;
4218 }
4219 }
4220 else
4221 {
4222 report = pcck_buf->cck_agc_rpt & 0x60;
4223 report = report>>5;
4224 switch(report)
4225 {
4226 case 0x3:
4227 rx_pwr_all = -35 - ((pcck_buf->cck_agc_rpt & 0x1f)<<1) ;
4228 break;
4229 case 0x2:
4230 rx_pwr_all = -23 - ((pcck_buf->cck_agc_rpt & 0x1f)<<1);
4231 break;
4232 case 0x1:
4233 rx_pwr_all = -11 - ((pcck_buf->cck_agc_rpt & 0x1f)<<1) ;
4234 break;
4235 case 0x0:
4236 rx_pwr_all = -8 - ((pcck_buf->cck_agc_rpt & 0x1f)<<1) ;
4237 break;
4238 }
4239 }
4240
4241 pwdb_all = rtl819x_query_rxpwrpercentage(rx_pwr_all);
4242 pstats->RxPWDBAll = precord_stats->RxPWDBAll = pwdb_all;
4243 pstats->RecvSignalPower = rx_pwr_all;
4244
4245 //
4246 // (3) Get Signal Quality (EVM)
4247 //
4248 if(bpacket_match_bssid)
4249 {
4250 u8 sq;
4251
4252 if(pstats->RxPWDBAll > 40)
4253 {
4254 sq = 100;
4255 }else
4256 {
4257 sq = pcck_buf->sq_rpt;
4258
4259 if(pcck_buf->sq_rpt > 64)
4260 sq = 0;
4261 else if (pcck_buf->sq_rpt < 20)
4262 sq = 100;
4263 else
4264 sq = ((64-sq) * 100) / 44;
4265 }
4266 pstats->SignalQuality = precord_stats->SignalQuality = sq;
4267 pstats->RxMIMOSignalQuality[0] = precord_stats->RxMIMOSignalQuality[0] = sq;
4268 pstats->RxMIMOSignalQuality[1] = precord_stats->RxMIMOSignalQuality[1] = -1;
4269 }
4270 }
4271 else
4272 {
ecdfa446
GKH		 4273 //
4274 // (1)Get RSSI for HT rate
4275 //
4276 for(i=RF90_PATH_A; i<RF90_PATH_MAX; i++)
4277 {
4278 // 2008/01/30 MH we will judge RF RX path now.
4279 if (priv->brfpath_rxenable[i])
4280 rf_rx_num++;
4281 //else
4282 //continue;
4283
4284 //Fixed by Jacken from Bryant 2008-03-20
4285 //Original value is 106
ecdfa446 4286 rx_pwr[i] = ((pofdm_buf->trsw_gain_X[i]&0x3F)*2) - 110;
ecdfa446
GKH		 4287
4288 //Get Rx snr value in DB
4289 tmp_rxsnr = pofdm_buf->rxsnr_X[i];
4290 rx_snrX = (char)(tmp_rxsnr);
4291 rx_snrX /= 2;
ecdfa446
GKH		 4292
4293 /* Translate DBM to percentage. */
4294 RSSI = rtl819x_query_rxpwrpercentage(rx_pwr[i]);
4295 if (priv->brfpath_rxenable[i])
4296 total_rssi += RSSI;
4297
4298 /* Record Signal Strength for next packet */
4299 if(bpacket_match_bssid)
4300 {
4301 pstats->RxMIMOSignalStrength[i] =(u8) RSSI;
4302 precord_stats->RxMIMOSignalStrength[i] =(u8) RSSI;
4303 }
4304 }
4305
4306
4307 //
4308 // (2)PWDB, Average PWDB cacluated by hardware (for rate adaptive)
4309 //
4310 //Fixed by Jacken from Bryant 2008-03-20
4311 //Original value is 106
4312 rx_pwr_all = (((pofdm_buf->pwdb_all ) >> 1 )& 0x7f) -106;
4313 pwdb_all = rtl819x_query_rxpwrpercentage(rx_pwr_all);
4314
4315 pstats->RxPWDBAll = precord_stats->RxPWDBAll = pwdb_all;
4316 pstats->RxPower = precord_stats->RxPower = rx_pwr_all;
4317 pstats->RecvSignalPower = rx_pwr_all;
4318 //
4319 // (3)EVM of HT rate
4320 //
4321 if(pdrvinfo->RxHT && pdrvinfo->RxRate>=DESC90_RATEMCS8 &&
4322 pdrvinfo->RxRate<=DESC90_RATEMCS15)
4323 max_spatial_stream = 2; //both spatial stream make sense
4324 else
4325 max_spatial_stream = 1; //only spatial stream 1 makes sense
4326
4327 for(i=0; i<max_spatial_stream; i++)
4328 {
4329 tmp_rxevm = pofdm_buf->rxevm_X[i];
4330 rx_evmX = (char)(tmp_rxevm);
4331
4332 // Do not use shift operation like "rx_evmX >>= 1" because the compilor of free build environment
4333 // fill most significant bit to "zero" when doing shifting operation which may change a negative
4334 // value to positive one, then the dbm value (which is supposed to be negative) is not correct anymore.
4335 rx_evmX /= 2; //dbm
4336
4337 evm = rtl819x_evm_dbtopercentage(rx_evmX);
ecdfa446
GKH		 4338 if(bpacket_match_bssid)
4339 {
4340 if(i==0) // Fill value in RFD, Get the first spatial stream only
4341 pstats->SignalQuality = precord_stats->SignalQuality = (u8)(evm & 0xff);
4342 pstats->RxMIMOSignalQuality[i] = precord_stats->RxMIMOSignalQuality[i] = (u8)(evm & 0xff);
4343 }
4344 }
4345
4346
4347 /* record rx statistics for debug */
4348 rxsc_sgien_exflg = pofdm_buf->rxsc_sgien_exflg;
4349 prxsc = (phy_ofdm_rx_status_rxsc_sgien_exintfflag *)&rxsc_sgien_exflg;
ecdfa446
GKH		 4350 }
4351
4352 //UI BSS List signal strength(in percentage), make it good looking, from 0~100.
4353 //It is assigned to the BSS List in GetValueFromBeaconOrProbeRsp().
4354 if(is_cck_rate)
4355 {
4356 pstats->SignalStrength = precord_stats->SignalStrength = (u8)(rtl819x_signal_scale_mapping((long)pwdb_all));//PWDB_ALL;
4357
4358 }
4359 else
4360 {
4361 //pRfd->Status.SignalStrength = pRecordRfd->Status.SignalStrength = (u1Byte)(SignalScaleMapping(total_rssi/=RF90_PATH_MAX));//(u1Byte)(total_rssi/=RF90_PATH_MAX);
4362 // We can judge RX path number now.
4363 if (rf_rx_num != 0)
4364 pstats->SignalStrength = precord_stats->SignalStrength = (u8)(rtl819x_signal_scale_mapping((long)(total_rssi/=rf_rx_num)));
4365 }
d5abdf72 4366}
ecdfa446 4367
5e1ad18a 4368static void
ecdfa446
GKH		 4369rtl8192_record_rxdesc_forlateruse(
4370 struct ieee80211_rx_stats * psrc_stats,
4371 struct ieee80211_rx_stats * ptarget_stats
4372)
4373{
4374 ptarget_stats->bIsAMPDU = psrc_stats->bIsAMPDU;
4375 ptarget_stats->bFirstMPDU = psrc_stats->bFirstMPDU;
4376 //ptarget_stats->Seq_Num = psrc_stats->Seq_Num;
4377}
4378
4379
4380
5e1ad18a 4381static void TranslateRxSignalStuff819xpci(struct net_device *dev,
ecdfa446
GKH		 4382 struct sk_buff *skb,
4383 struct ieee80211_rx_stats * pstats,
4384 prx_desc_819x_pci pdesc,
4385 prx_fwinfo_819x_pci pdrvinfo)
4386{
4387 // TODO: We must only check packet for current MAC address. Not finish
4388 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
4389 bool bpacket_match_bssid, bpacket_toself;
4390 bool bPacketBeacon=false, bToSelfBA=false;
ecdfa446
GKH		 4391 struct ieee80211_hdr_3addr *hdr;
4392 u16 fc,type;
4393
4394 // Get Signal Quality for only RX data queue (but not command queue)
4395
4396 u8* tmp_buf;
4397 u8 *praddr;
4398
4399 /* Get MAC frame start address. */
4400 tmp_buf = skb->data;
4401
4402 hdr = (struct ieee80211_hdr_3addr *)tmp_buf;
4403 fc = le16_to_cpu(hdr->frame_ctl);
4404 type = WLAN_FC_GET_TYPE(fc);
4405 praddr = hdr->addr1;
4406
4407 /* Check if the received packet is acceptabe. */
4408 bpacket_match_bssid = ((IEEE80211_FTYPE_CTL != type) &&
03996954 4409 (!compare_ether_addr(priv->ieee80211->current_network.bssid, (fc & IEEE80211_FCTL_TODS)? hdr->addr1 : (fc & IEEE80211_FCTL_FROMDS )? hdr->addr2 : hdr->addr3))
ecdfa446 4410 && (!pstats->bHwError) && (!pstats->bCRC)&& (!pstats->bICV));
03996954 4411 bpacket_toself = bpacket_match_bssid & (!compare_ether_addr(praddr, priv->ieee80211->dev->dev_addr));
11aacc28 4412
ecdfa446
GKH		 4413 if(WLAN_FC_GET_FRAMETYPE(fc)== IEEE80211_STYPE_BEACON)
4414 {
4415 bPacketBeacon = true;
ecdfa446
GKH		 4416 }
4417 if(WLAN_FC_GET_FRAMETYPE(fc) == IEEE80211_STYPE_BLOCKACK)
4418 {
03996954 4419 if((!compare_ether_addr(praddr,dev->dev_addr)))
ecdfa446 4420 bToSelfBA = true;
ecdfa446
GKH		 4421 }
4422
ecdfa446
GKH		 4423 //
4424 // Process PHY information for previous packet (RSSI/PWDB/EVM)
4425 //
4426 // Because phy information is contained in the last packet of AMPDU only, so driver
4427 // should process phy information of previous packet
83184e69
MM		 4428 rtl8192_process_phyinfo(priv, tmp_buf, &priv->previous_stats, pstats);
4429 rtl8192_query_rxphystatus(priv, pstats, pdesc, pdrvinfo, &priv->previous_stats, bpacket_match_bssid,
ecdfa446 4430 bpacket_toself ,bPacketBeacon, bToSelfBA);
83184e69 4431 rtl8192_record_rxdesc_forlateruse(pstats, &priv->previous_stats);
ecdfa446
GKH		 4432
4433}
4434
4435
5e1ad18a 4436static void rtl8192_tx_resume(struct net_device *dev)
ecdfa446
GKH		 4437{
4438 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
4439 struct ieee80211_device *ieee = priv->ieee80211;
4440 struct sk_buff *skb;
4441 int queue_index;
4442
4443 for(queue_index = BK_QUEUE; queue_index < TXCMD_QUEUE;queue_index++) {
4444 while((!skb_queue_empty(&ieee->skb_waitQ[queue_index]))&&
4445 (priv->ieee80211->check_nic_enough_desc(dev,queue_index) > 0)) {
4446 /* 1. dequeue the packet from the wait queue */
4447 skb = skb_dequeue(&ieee->skb_waitQ[queue_index]);
4448 /* 2. tx the packet directly */
4449 ieee->softmac_data_hard_start_xmit(skb,dev,0/* rate useless now*/);
ecdfa446
GKH		 4450 }
4451 }
4452}
4453
80a4dead 4454static void rtl8192_irq_tx_tasklet(unsigned long arg)
ecdfa446 4455{
80a4dead 4456 struct r8192_priv *priv = (struct r8192_priv*) arg;
1348dc08
MM		 4457 struct rtl8192_tx_ring *mgnt_ring = &priv->tx_ring[MGNT_QUEUE];
4458 struct net_device *dev = priv->ieee80211->dev;
4459 unsigned long flags;
4460
4461 /* check if we need to report that the management queue is drained */
4462 spin_lock_irqsave(&priv->irq_th_lock, flags);
4463
4464 if (!skb_queue_len(&mgnt_ring->queue) &&
4465 priv->ieee80211->ack_tx_to_ieee &&
4466 rtl8192_is_tx_queue_empty(dev)) {
4467 priv->ieee80211->ack_tx_to_ieee = 0;
4468 ieee80211_ps_tx_ack(priv->ieee80211, 1);
4469 }
4470
4471 spin_unlock_irqrestore(&priv->irq_th_lock, flags);
4472
4473 rtl8192_tx_resume(dev);
ecdfa446
GKH		 4474}
4475
214985a6 4476/* Record the received data rate */
5e1ad18a 4477static void UpdateReceivedRateHistogramStatistics8190(
ecdfa446
GKH		 4478 struct net_device *dev,
4479 struct ieee80211_rx_stats* pstats
4480 )
4481{
4482 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
4483 u32 rcvType=1; //0: Total, 1:OK, 2:CRC, 3:ICV
4484 u32 rateIndex;
4485 u32 preamble_guardinterval; //1: short preamble/GI, 0: long preamble/GI
4486
ecdfa446
GKH		 4487 if(pstats->bCRC)
4488 rcvType = 2;
4489 else if(pstats->bICV)
4490 rcvType = 3;
4491
4492 if(pstats->bShortPreamble)
4493 preamble_guardinterval = 1;// short
4494 else
4495 preamble_guardinterval = 0;// long
4496
4497 switch(pstats->rate)
4498 {
4499 //
4500 // CCK rate
4501 //
4502 case MGN_1M: rateIndex = 0; break;
4503 case MGN_2M: rateIndex = 1; break;
4504 case MGN_5_5M: rateIndex = 2; break;
4505 case MGN_11M: rateIndex = 3; break;
4506 //
4507 // Legacy OFDM rate
4508 //
4509 case MGN_6M: rateIndex = 4; break;
4510 case MGN_9M: rateIndex = 5; break;
4511 case MGN_12M: rateIndex = 6; break;
4512 case MGN_18M: rateIndex = 7; break;
4513 case MGN_24M: rateIndex = 8; break;
4514 case MGN_36M: rateIndex = 9; break;
4515 case MGN_48M: rateIndex = 10; break;
4516 case MGN_54M: rateIndex = 11; break;
4517 //
4518 // 11n High throughput rate
4519 //
4520 case MGN_MCS0: rateIndex = 12; break;
4521 case MGN_MCS1: rateIndex = 13; break;
4522 case MGN_MCS2: rateIndex = 14; break;
4523 case MGN_MCS3: rateIndex = 15; break;
4524 case MGN_MCS4: rateIndex = 16; break;
4525 case MGN_MCS5: rateIndex = 17; break;
4526 case MGN_MCS6: rateIndex = 18; break;
4527 case MGN_MCS7: rateIndex = 19; break;
4528 case MGN_MCS8: rateIndex = 20; break;
4529 case MGN_MCS9: rateIndex = 21; break;
4530 case MGN_MCS10: rateIndex = 22; break;
4531 case MGN_MCS11: rateIndex = 23; break;
4532 case MGN_MCS12: rateIndex = 24; break;
4533 case MGN_MCS13: rateIndex = 25; break;
4534 case MGN_MCS14: rateIndex = 26; break;
4535 case MGN_MCS15: rateIndex = 27; break;
4536 default: rateIndex = 28; break;
4537 }
ecdfa446
GKH		 4538 priv->stats.received_rate_histogram[0][rateIndex]++; //total
4539 priv->stats.received_rate_histogram[rcvType][rateIndex]++;
4540}
4541
5e1ad18a 4542static void rtl8192_rx(struct net_device *dev)
ecdfa446
GKH		 4543{
4544 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
4545 struct ieee80211_hdr_1addr *ieee80211_hdr = NULL;
4546 bool unicast_packet = false;
4547 struct ieee80211_rx_stats stats = {
4548 .signal = 0,
4549 .noise = -98,
4550 .rate = 0,
4551 .freq = IEEE80211_24GHZ_BAND,
4552 };
4553 unsigned int count = priv->rxringcount;
79b03af6
MM		 4554 prx_fwinfo_819x_pci pDrvInfo = NULL;
4555 struct sk_buff *new_skb;
ecdfa446 4556
ecdfa446
GKH		 4557 while (count--) {
4558 rx_desc_819x_pci *pdesc = &priv->rx_ring[priv->rx_idx];//rx descriptor
4559 struct sk_buff *skb = priv->rx_buf[priv->rx_idx];//rx pkt
4560
79b03af6 4561 if (pdesc->OWN)
ecdfa446
GKH		 4562 /* wait data to be filled by hardware */
4563 return;
79b03af6 4564
ecdfa446
GKH		 4565 stats.bICV = pdesc->ICV;
4566 stats.bCRC = pdesc->CRC32;
4567 stats.bHwError = pdesc->CRC32 | pdesc->ICV;
4568
4569 stats.Length = pdesc->Length;
4570 if(stats.Length < 24)
4571 stats.bHwError |= 1;
4572
4573 if(stats.bHwError) {
4574 stats.bShift = false;
ecdfa446 4575 goto done;
79b03af6
MM		 4576 }
4577 pDrvInfo = NULL;
4578 new_skb = dev_alloc_skb(priv->rxbuffersize);
ecdfa446 4579
79b03af6 4580 if (unlikely(!new_skb))
ecdfa446 4581 goto done;
ecdfa446
GKH		 4582
4583 stats.RxDrvInfoSize = pdesc->RxDrvInfoSize;
4584 stats.RxBufShift = ((pdesc->Shift)&0x03);
4585 stats.Decrypted = !pdesc->SWDec;
4586
ecdfa446 4587 pci_dma_sync_single_for_cpu(priv->pdev,
ecdfa446
GKH		 4588 *((dma_addr_t *)skb->cb),
4589 priv->rxbuffersize,
4590 PCI_DMA_FROMDEVICE);
4591 skb_put(skb, pdesc->Length);
4592 pDrvInfo = (rx_fwinfo_819x_pci *)(skb->data + stats.RxBufShift);
4593 skb_reserve(skb, stats.RxDrvInfoSize + stats.RxBufShift);
4594
4595 stats.rate = HwRateToMRate90((bool)pDrvInfo->RxHT, (u8)pDrvInfo->RxRate);
4596 stats.bShortPreamble = pDrvInfo->SPLCP;
4597
4598 /* it is debug only. It should be disabled in released driver.
4599 * 2007.1.11 by Emily
4600 * */
4601 UpdateReceivedRateHistogramStatistics8190(dev, &stats);
4602
4603 stats.bIsAMPDU = (pDrvInfo->PartAggr==1);
4604 stats.bFirstMPDU = (pDrvInfo->PartAggr==1) && (pDrvInfo->FirstAGGR==1);
4605
4606 stats.TimeStampLow = pDrvInfo->TSFL;
3f9ab1ee 4607 stats.TimeStampHigh = read_nic_dword(priv, TSFR+4);
ecdfa446
GKH		 4608
4609 UpdateRxPktTimeStamp8190(dev, &stats);
4610
4611 //
4612 // Get Total offset of MPDU Frame Body
4613 //
4614 if((stats.RxBufShift + stats.RxDrvInfoSize) > 0)
4615 stats.bShift = 1;
4616
4617 stats.RxIs40MHzPacket = pDrvInfo->BW;
4618
4619 /* ???? */
4620 TranslateRxSignalStuff819xpci(dev,skb, &stats, pdesc, pDrvInfo);
4621
4622 /* Rx A-MPDU */
4623 if(pDrvInfo->FirstAGGR==1 || pDrvInfo->PartAggr == 1)
4624 RT_TRACE(COMP_RXDESC, "pDrvInfo->FirstAGGR = %d, pDrvInfo->PartAggr = %d\n",
4625 pDrvInfo->FirstAGGR, pDrvInfo->PartAggr);
4626 skb_trim(skb, skb->len - 4/*sCrcLng*/);
4627 /* rx packets statistics */
4628 ieee80211_hdr = (struct ieee80211_hdr_1addr *)skb->data;
4629 unicast_packet = false;
4630
4631 if(is_broadcast_ether_addr(ieee80211_hdr->addr1)) {
4632 //TODO
4633 }else if(is_multicast_ether_addr(ieee80211_hdr->addr1)){
4634 //TODO
4635 }else {
4636 /* unicast packet */
4637 unicast_packet = true;
4638 }
4639
4640 stats.packetlength = stats.Length-4;
4641 stats.fraglength = stats.packetlength;
4642 stats.fragoffset = 0;
4643 stats.ntotalfrag = 1;
4644
fb5fe277 4645 if(!ieee80211_rtl_rx(priv->ieee80211, skb, &stats)){
ecdfa446
GKH		 4646 dev_kfree_skb_any(skb);
4647 } else {
4648 priv->stats.rxok++;
4649 if(unicast_packet) {
4650 priv->stats.rxbytesunicast += skb->len;
4651 }
4652 }
4653
43f88d53
DL		 4654 pci_unmap_single(priv->pdev, *((dma_addr_t *) skb->cb),
4655 priv->rxbuffersize, PCI_DMA_FROMDEVICE);
4656
ecdfa446
GKH		 4657 skb = new_skb;
4658 priv->rx_buf[priv->rx_idx] = skb;
1c7ec2e8 4659 *((dma_addr_t *) skb->cb) = pci_map_single(priv->pdev, skb_tail_pointer(skb), priv->rxbuffersize, PCI_DMA_FROMDEVICE);
ecdfa446 4660
ecdfa446
GKH		 4661done:
4662 pdesc->BufferAddress = cpu_to_le32(*((dma_addr_t *)skb->cb));
4663 pdesc->OWN = 1;
4664 pdesc->Length = priv->rxbuffersize;
4665 if (priv->rx_idx == priv->rxringcount-1)
4666 pdesc->EOR = 1;
4667 priv->rx_idx = (priv->rx_idx + 1) % priv->rxringcount;
4668 }
4669
4670}
4671
80a4dead 4672static void rtl8192_irq_rx_tasklet(unsigned long arg)
ecdfa446 4673{
80a4dead 4674 struct r8192_priv *priv = (struct r8192_priv*) arg;
ecdfa446
GKH		 4675 rtl8192_rx(priv->ieee80211->dev);
4676 /* unmask RDU */
3f9ab1ee 4677 write_nic_dword(priv, INTA_MASK, read_nic_dword(priv, INTA_MASK) | IMR_RDU);
ecdfa446
GKH		 4678}
4679
4680static const struct net_device_ops rtl8192_netdev_ops = {
4681 .ndo_open = rtl8192_open,
4682 .ndo_stop = rtl8192_close,
ecdfa446
GKH		 4683 .ndo_tx_timeout = tx_timeout,
4684 .ndo_do_ioctl = rtl8192_ioctl,
4685 .ndo_set_multicast_list = r8192_set_multicast,
4686 .ndo_set_mac_address = r8192_set_mac_adr,
fb5fe277 4687 .ndo_start_xmit = ieee80211_rtl_xmit,
ecdfa446
GKH		 4688};
4689
ecdfa446
GKH		 4690static int __devinit rtl8192_pci_probe(struct pci_dev *pdev,
4691 const struct pci_device_id *id)
4692{
4693 unsigned long ioaddr = 0;
4694 struct net_device *dev = NULL;
4695 struct r8192_priv *priv= NULL;
4696 u8 unit = 0;
3a8f2d3c 4697 int ret = -ENODEV;
ecdfa446 4698 unsigned long pmem_start, pmem_len, pmem_flags;
ecdfa446
GKH		 4699
4700 RT_TRACE(COMP_INIT,"Configuring chip resources");
4701
4702 if( pci_enable_device (pdev) ){
4703 RT_TRACE(COMP_ERR,"Failed to enable PCI device");
4704 return -EIO;
4705 }
4706
4707 pci_set_master(pdev);
4708 //pci_set_wmi(pdev);
4709 pci_set_dma_mask(pdev, 0xffffff00ULL);
ecdfa446 4710 pci_set_consistent_dma_mask(pdev,0xffffff00ULL);
ecdfa446 4711 dev = alloc_ieee80211(sizeof(struct r8192_priv));
3a8f2d3c
KV		 4712 if (!dev) {
4713 ret = -ENOMEM;
4714 goto fail_free;
4715 }
ecdfa446 4716
ecdfa446 4717 pci_set_drvdata(pdev, dev);
ecdfa446 4718 SET_NETDEV_DEV(dev, &pdev->dev);
ecdfa446 4719 priv = ieee80211_priv(dev);
ecdfa446 4720 priv->ieee80211 = netdev_priv(dev);
ecdfa446 4721 priv->pdev=pdev;
ecdfa446
GKH		 4722 if((pdev->subsystem_vendor == PCI_VENDOR_ID_DLINK)&&(pdev->subsystem_device == 0x3304)){
4723 priv->ieee80211->bSupportRemoteWakeUp = 1;
4724 } else
ecdfa446
GKH		 4725 {
4726 priv->ieee80211->bSupportRemoteWakeUp = 0;
4727 }
4728
ecdfa446
GKH		 4729 pmem_start = pci_resource_start(pdev, 1);
4730 pmem_len = pci_resource_len(pdev, 1);
4731 pmem_flags = pci_resource_flags (pdev, 1);
4732
4733 if (!(pmem_flags & IORESOURCE_MEM)) {
4734 RT_TRACE(COMP_ERR,"region #1 not a MMIO resource, aborting");
4735 goto fail;
4736 }
4737
4738 //DMESG("Memory mapped space @ 0x%08lx ", pmem_start);
4739 if( ! request_mem_region(pmem_start, pmem_len, RTL819xE_MODULE_NAME)) {
4740 RT_TRACE(COMP_ERR,"request_mem_region failed!");
4741 goto fail;
4742 }
4743
4744
4745 ioaddr = (unsigned long)ioremap_nocache( pmem_start, pmem_len);
4746 if( ioaddr == (unsigned long)NULL ){
4747 RT_TRACE(COMP_ERR,"ioremap failed!");
4748 // release_mem_region( pmem_start, pmem_len );
4749 goto fail1;
4750 }
4751
4752 dev->mem_start = ioaddr; // shared mem start
4753 dev->mem_end = ioaddr + pci_resource_len(pdev, 0); // shared mem end
4754
ecdfa446
GKH		 4755 /* We disable the RETRY_TIMEOUT register (0x41) to keep
4756 * PCI Tx retries from interfering with C3 CPU state */
4757 pci_write_config_byte(pdev, 0x41, 0x00);
4758
4759
4760 pci_read_config_byte(pdev, 0x05, &unit);
4761 pci_write_config_byte(pdev, 0x05, unit & (~0x04));
4762
4763 dev->irq = pdev->irq;
4764 priv->irq = 0;
4765
4766 dev->netdev_ops = &rtl8192_netdev_ops;
ecdfa446 4767
890a6850 4768 dev->wireless_handlers = &r8192_wx_handlers_def;
ecdfa446
GKH		 4769 dev->type=ARPHRD_ETHER;
4770
890a6850 4771 dev->watchdog_timeo = HZ*3;
ecdfa446
GKH		 4772
4773 if (dev_alloc_name(dev, ifname) < 0){
4774 RT_TRACE(COMP_INIT, "Oops: devname already taken! Trying wlan%%d...\n");
dca41306 4775 strcpy(ifname, "wlan%d");
ecdfa446
GKH		 4776 dev_alloc_name(dev, ifname);
4777 }
4778
4779 RT_TRACE(COMP_INIT, "Driver probe completed1\n");
4780 if(rtl8192_init(dev)!=0){
4781 RT_TRACE(COMP_ERR, "Initialization failed");
4782 goto fail;
4783 }
4784
ecdfa446
GKH		 4785 register_netdev(dev);
4786 RT_TRACE(COMP_INIT, "dev name=======> %s\n",dev->name);
4787 rtl8192_proc_init_one(dev);
4788
4789
4790 RT_TRACE(COMP_INIT, "Driver probe completed\n");
ecdfa446 4791 return 0;
ecdfa446
GKH		 4792
4793fail1:
4794
ecdfa446
GKH		 4795 if( dev->mem_start != (unsigned long)NULL ){
4796 iounmap( (void *)dev->mem_start );
4797 release_mem_region( pci_resource_start(pdev, 1),
4798 pci_resource_len(pdev, 1) );
4799 }
ecdfa446
GKH		 4800
4801fail:
4802 if(dev){
4803
4804 if (priv->irq) {
4805 free_irq(dev->irq, dev);
4806 dev->irq=0;
4807 }
4808 free_ieee80211(dev);
4809 }
4810
3a8f2d3c 4811fail_free:
ecdfa446
GKH		 4812 pci_disable_device(pdev);
4813
4814 DMESG("wlan driver load failed\n");
4815 pci_set_drvdata(pdev, NULL);
3a8f2d3c 4816 return ret;
ecdfa446
GKH		 4817
4818}
4819
4820/* detach all the work and timer structure declared or inititialized
4821 * in r8192_init function.
4822 * */
5b3b1a7b 4823static void rtl8192_cancel_deferred_work(struct r8192_priv* priv)
ecdfa446
GKH		 4824{
4825 /* call cancel_work_sync instead of cancel_delayed_work if and only if Linux_version_code
4826 * is or is newer than 2.6.20 and work structure is defined to be struct work_struct.
4827 * Otherwise call cancel_delayed_work is enough.
39cfb97b 4828 * FIXME (2.6.20 should 2.6.22, work_struct should not cancel)
ecdfa446 4829 * */
ecdfa446
GKH		 4830 cancel_delayed_work(&priv->watch_dog_wq);
4831 cancel_delayed_work(&priv->update_beacon_wq);
4832 cancel_delayed_work(&priv->ieee80211->hw_wakeup_wq);
4833 cancel_delayed_work(&priv->ieee80211->hw_sleep_wq);
ecdfa446 4834 cancel_delayed_work(&priv->gpio_change_rf_wq);
ecdfa446
GKH		 4835 cancel_work_sync(&priv->reset_wq);
4836 cancel_work_sync(&priv->qos_activate);
ecdfa446
GKH		 4837}
4838
4839
4840static void __devexit rtl8192_pci_disconnect(struct pci_dev *pdev)
4841{
4842 struct net_device *dev = pci_get_drvdata(pdev);
4843 struct r8192_priv *priv ;
fb53c2b7 4844 u32 i;
ecdfa446 4845
fb53c2b7 4846 if (dev) {
ecdfa446
GKH		 4847
4848 unregister_netdev(dev);
4849
fb53c2b7 4850 priv = ieee80211_priv(dev);
ecdfa446
GKH		 4851
4852 rtl8192_proc_remove_one(dev);
4853
4854 rtl8192_down(dev);
4855 if (priv->pFirmware)
4856 {
4857 vfree(priv->pFirmware);
4858 priv->pFirmware = NULL;
4859 }
ecdfa446 4860 destroy_workqueue(priv->priv_wq);
ecdfa446 4861
fb53c2b7
MM		 4862 /* free tx/rx rings */
4863 rtl8192_free_rx_ring(dev);
4864 for (i = 0; i < MAX_TX_QUEUE_COUNT; i++)
4865 rtl8192_free_tx_ring(dev, i);
4866
4867 if (priv->irq) {
ecdfa446
GKH		 4868 printk("Freeing irq %d\n",dev->irq);
4869 free_irq(dev->irq, dev);
4870 priv->irq=0;
ecdfa446
GKH		 4871 }
4872
ecdfa446
GKH		 4873 if( dev->mem_start != (unsigned long)NULL ){
4874 iounmap( (void *)dev->mem_start );
4875 release_mem_region( pci_resource_start(pdev, 1),
4876 pci_resource_len(pdev, 1) );
4877 }
ecdfa446 4878
97a6688a 4879 free_ieee80211(dev);
ecdfa446
GKH		 4880 }
4881
4882 pci_disable_device(pdev);
4883 RT_TRACE(COMP_DOWN, "wlan driver removed\n");
4884}
4885
fb5fe277
GK		 4886extern int ieee80211_rtl_init(void);
4887extern void ieee80211_rtl_exit(void);
ecdfa446
GKH		 4888
4889static int __init rtl8192_pci_module_init(void)
4890{
4891 int retval;
4892
fb5fe277 4893 retval = ieee80211_rtl_init();
ecdfa446
GKH		 4894 if (retval)
4895 return retval;
4896
4897 printk(KERN_INFO "\nLinux kernel driver for RTL8192 based WLAN cards\n");
4898 printk(KERN_INFO "Copyright (c) 2007-2008, Realsil Wlan\n");
4899 RT_TRACE(COMP_INIT, "Initializing module");
ecdfa446 4900 rtl8192_proc_module_init();
ecdfa446 4901 if(0!=pci_register_driver(&rtl8192_pci_driver))
ecdfa446
GKH		 4902 {
4903 DMESG("No device found");
4904 /*pci_unregister_driver (&rtl8192_pci_driver);*/
4905 return -ENODEV;
4906 }
4907 return 0;
4908}
4909
4910
4911static void __exit rtl8192_pci_module_exit(void)
4912{
4913 pci_unregister_driver(&rtl8192_pci_driver);
4914
4915 RT_TRACE(COMP_DOWN, "Exiting");
4916 rtl8192_proc_module_remove();
fb5fe277 4917 ieee80211_rtl_exit();
ecdfa446
GKH		 4918}
4919
559fba5e 4920static irqreturn_t rtl8192_interrupt(int irq, void *netdev)
ecdfa446 4921{
b2cf8d48
MM		 4922 struct net_device *dev = (struct net_device *) netdev;
4923 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
4924 unsigned long flags;
4925 u32 inta;
f8129a95
MM		 4926 irqreturn_t ret = IRQ_HANDLED;
4927
4928 spin_lock_irqsave(&priv->irq_th_lock, flags);
ecdfa446 4929
b2cf8d48 4930 /* ISR: 4bytes */
ecdfa446 4931
3f9ab1ee
MM		 4932 inta = read_nic_dword(priv, ISR); /* & priv->IntrMask; */
4933 write_nic_dword(priv, ISR, inta); /* reset int situation */
ecdfa446 4934
b2cf8d48 4935 if (!inta) {
b2cf8d48
MM		 4936 /*
4937 * most probably we can safely return IRQ_NONE,
4938 * but for now is better to avoid problems
4939 */
f8129a95 4940 goto out_unlock;
b2cf8d48 4941 }
ecdfa446 4942
b2cf8d48
MM		 4943 if (inta == 0xffff) {
4944 /* HW disappared */
f8129a95 4945 goto out_unlock;
b2cf8d48
MM		 4946 }
4947
f8129a95
MM		 4948 if (!netif_running(dev))
4949 goto out_unlock;
ecdfa446 4950
b2cf8d48
MM		 4951 if (inta & IMR_TBDOK) {
4952 RT_TRACE(COMP_INTR, "beacon ok interrupt!\n");
4953 rtl8192_tx_isr(dev, BEACON_QUEUE);
4954 priv->stats.txbeaconokint++;
4955 }
ecdfa446 4956
b2cf8d48
MM		 4957 if (inta & IMR_TBDER) {
4958 RT_TRACE(COMP_INTR, "beacon ok interrupt!\n");
4959 rtl8192_tx_isr(dev, BEACON_QUEUE);
4960 priv->stats.txbeaconerr++;
4961 }
ecdfa446 4962
b2cf8d48
MM		 4963 if (inta & IMR_MGNTDOK ) {
4964 RT_TRACE(COMP_INTR, "Manage ok interrupt!\n");
4965 priv->stats.txmanageokint++;
4966 rtl8192_tx_isr(dev,MGNT_QUEUE);
4967 }
ecdfa446 4968
b2cf8d48
MM		 4969 if (inta & IMR_COMDOK)
4970 {
4971 priv->stats.txcmdpktokint++;
4972 rtl8192_tx_isr(dev, TXCMD_QUEUE);
4973 }
ecdfa446 4974
b2cf8d48 4975 if (inta & IMR_ROK) {
b2cf8d48
MM		 4976 priv->stats.rxint++;
4977 tasklet_schedule(&priv->irq_rx_tasklet);
4978 }
ecdfa446 4979
b2cf8d48
MM		 4980 if (inta & IMR_BcnInt) {
4981 RT_TRACE(COMP_INTR, "prepare beacon for interrupt!\n");
4982 tasklet_schedule(&priv->irq_prepare_beacon_tasklet);
4983 }
ecdfa446 4984
b2cf8d48
MM		 4985 if (inta & IMR_RDU) {
4986 RT_TRACE(COMP_INTR, "rx descriptor unavailable!\n");
4987 priv->stats.rxrdu++;
4988 /* reset int situation */
3f9ab1ee 4989 write_nic_dword(priv, INTA_MASK, read_nic_dword(priv, INTA_MASK) & ~IMR_RDU);
b2cf8d48
MM		 4990 tasklet_schedule(&priv->irq_rx_tasklet);
4991 }
ecdfa446 4992
b2cf8d48
MM		 4993 if (inta & IMR_RXFOVW) {
4994 RT_TRACE(COMP_INTR, "rx overflow !\n");
4995 priv->stats.rxoverflow++;
4996 tasklet_schedule(&priv->irq_rx_tasklet);
4997 }
ecdfa446 4998
b2cf8d48
MM		 4999 if (inta & IMR_TXFOVW)
5000 priv->stats.txoverflow++;
ecdfa446 5001
b2cf8d48
MM		 5002 if (inta & IMR_BKDOK) {
5003 RT_TRACE(COMP_INTR, "BK Tx OK interrupt!\n");
5004 priv->stats.txbkokint++;
5005 priv->ieee80211->LinkDetectInfo.NumTxOkInPeriod++;
5006 rtl8192_tx_isr(dev, BK_QUEUE);
5007 }
ecdfa446 5008
b2cf8d48
MM		 5009 if (inta & IMR_BEDOK) {
5010 RT_TRACE(COMP_INTR, "BE TX OK interrupt!\n");
5011 priv->stats.txbeokint++;
5012 priv->ieee80211->LinkDetectInfo.NumTxOkInPeriod++;
5013 rtl8192_tx_isr(dev, BE_QUEUE);
5014 }
ecdfa446 5015
b2cf8d48
MM		 5016 if (inta & IMR_VIDOK) {
5017 RT_TRACE(COMP_INTR, "VI TX OK interrupt!\n");
5018 priv->stats.txviokint++;
5019 priv->ieee80211->LinkDetectInfo.NumTxOkInPeriod++;
5020 rtl8192_tx_isr(dev, VI_QUEUE);
5021 }
ecdfa446 5022
b2cf8d48
MM		 5023 if (inta & IMR_VODOK) {
5024 priv->stats.txvookint++;
5025 priv->ieee80211->LinkDetectInfo.NumTxOkInPeriod++;
5026 rtl8192_tx_isr(dev, VO_QUEUE);
5027 }
ecdfa446 5028
f8129a95 5029out_unlock:
b2cf8d48 5030 spin_unlock_irqrestore(&priv->irq_th_lock, flags);
ecdfa446 5031
f8129a95 5032 return ret;
ecdfa446
GKH		 5033}
5034
ecdfa446
GKH		 5035void EnableHWSecurityConfig8192(struct net_device *dev)
5036{
5037 u8 SECR_value = 0x0;
ecdfa446 5038 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
16d74da0
MM		 5039 struct ieee80211_device* ieee = priv->ieee80211;
5040
ecdfa446 5041 SECR_value = SCR_TxEncEnable | SCR_RxDecEnable;
11aacc28 5042
ecdfa446
GKH		 5043 if (((KEY_TYPE_WEP40 == ieee->pairwise_key_type) || (KEY_TYPE_WEP104 == ieee->pairwise_key_type)) && (priv->ieee80211->auth_mode != 2))
5044 {
5045 SECR_value |= SCR_RxUseDK;
5046 SECR_value |= SCR_TxUseDK;
5047 }
5048 else if ((ieee->iw_mode == IW_MODE_ADHOC) && (ieee->pairwise_key_type & (KEY_TYPE_CCMP | KEY_TYPE_TKIP)))
5049 {
5050 SECR_value |= SCR_RxUseDK;
5051 SECR_value |= SCR_TxUseDK;
5052 }
5053
ecdfa446
GKH		 5054 //add HWSec active enable here.
5055//default using hwsec. when peer AP is in N mode only and pairwise_key_type is none_aes(which HT_IOT_ACT_PURE_N_MODE indicates it), use software security. when peer AP is in b,g,n mode mixed and pairwise_key_type is none_aes, use g mode hw security. WB on 2008.7.4
5056 ieee->hwsec_active = 1;
5057
5058 if ((ieee->pHTInfo->IOTAction&HT_IOT_ACT_PURE_N_MODE) || !hwwep)//!ieee->hwsec_support) //add hwsec_support flag to totol control hw_sec on/off
5059 {
5060 ieee->hwsec_active = 0;
5061 SECR_value &= ~SCR_RxDecEnable;
5062 }
5063
207b58fb 5064 RT_TRACE(COMP_SEC,"%s:, hwsec:%d, pairwise_key:%d, SECR_value:%x\n", __FUNCTION__,
ecdfa446
GKH		 5065 ieee->hwsec_active, ieee->pairwise_key_type, SECR_value);
5066 {
3f9ab1ee 5067 write_nic_byte(priv, SECR, SECR_value);//SECR_value | SCR_UseDK );
ecdfa446
GKH		 5068 }
5069
5070}
5071#define TOTAL_CAM_ENTRY 32
5072//#define CAM_CONTENT_COUNT 8
5073void setKey( struct net_device *dev,
5074 u8 EntryNo,
5075 u8 KeyIndex,
5076 u16 KeyType,
881a975b 5077 const u8 *MacAddr,
ecdfa446
GKH		 5078 u8 DefaultKey,
5079 u32 *KeyContent )
5080{
5081 u32 TargetCommand = 0;
5082 u32 TargetContent = 0;
5083 u16 usConfig = 0;
5084 u8 i;
5085#ifdef ENABLE_IPS
5086 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
5087 RT_RF_POWER_STATE rtState;
5088 rtState = priv->ieee80211->eRFPowerState;
5089 if(priv->ieee80211->PowerSaveControl.bInactivePs){
5090 if(rtState == eRfOff){
5091 if(priv->ieee80211->RfOffReason > RF_CHANGE_BY_IPS)
5092 {
5093 RT_TRACE(COMP_ERR, "%s(): RF is OFF.\n",__FUNCTION__);
65a43784 5094 //up(&priv->wx_sem);
ecdfa446
GKH		 5095 return ;
5096 }
5097 else{
65a43784 5098 down(&priv->ieee80211->ips_sem);
ecdfa446 5099 IPSLeave(dev);
65a43784 5100 up(&priv->ieee80211->ips_sem);
ecdfa446
GKH		 5101 }
5102 }
5103 }
5104 priv->ieee80211->is_set_key = true;
5105#endif
5106 if (EntryNo >= TOTAL_CAM_ENTRY)
5107 RT_TRACE(COMP_ERR, "cam entry exceeds in setKey()\n");
5108
0ee9f67c 5109 RT_TRACE(COMP_SEC, "====>to setKey(), dev:%p, EntryNo:%d, KeyIndex:%d, KeyType:%d, MacAddr%pM\n", dev,EntryNo, KeyIndex, KeyType, MacAddr);
ecdfa446
GKH		 5110
5111 if (DefaultKey)
5112 usConfig |= BIT15 | (KeyType<<2);
5113 else
5114 usConfig |= BIT15 | (KeyType<<2) | KeyIndex;
5115// usConfig |= BIT15 | (KeyType<<2) | (DefaultKey<<5) | KeyIndex;
5116
5117
5118 for(i=0 ; i<CAM_CONTENT_COUNT; i++){
5119 TargetCommand = i+CAM_CONTENT_COUNT*EntryNo;
5120 TargetCommand |= BIT31|BIT16;
5121
5122 if(i==0){//MAC|Config
5123 TargetContent = (u32)(*(MacAddr+0)) << 16|
5124 (u32)(*(MacAddr+1)) << 24|
5125 (u32)usConfig;
5126
3f9ab1ee
MM		 5127 write_nic_dword(priv, WCAMI, TargetContent);
5128 write_nic_dword(priv, RWCAM, TargetCommand);
ecdfa446
GKH		 5129 }
5130 else if(i==1){//MAC
5131 TargetContent = (u32)(*(MacAddr+2)) |
5132 (u32)(*(MacAddr+3)) << 8|
5133 (u32)(*(MacAddr+4)) << 16|
5134 (u32)(*(MacAddr+5)) << 24;
3f9ab1ee
MM		 5135 write_nic_dword(priv, WCAMI, TargetContent);
5136 write_nic_dword(priv, RWCAM, TargetCommand);
ecdfa446
GKH		 5137 }
5138 else { //Key Material
5139 if(KeyContent != NULL)
5140 {
3f9ab1ee
MM		 5141 write_nic_dword(priv, WCAMI, (u32)(*(KeyContent+i-2)) );
5142 write_nic_dword(priv, RWCAM, TargetCommand);
ecdfa446
GKH		 5143 }
5144 }
5145 }
5146 RT_TRACE(COMP_SEC,"=========>after set key, usconfig:%x\n", usConfig);
ecdfa446 5147}
ecdfa446 5148
65a43784 5149bool NicIFEnableNIC(struct net_device* dev)
5150{
5151 RT_STATUS init_status = RT_STATUS_SUCCESS;
5152 struct r8192_priv* priv = ieee80211_priv(dev);
5153 PRT_POWER_SAVE_CONTROL pPSC = (PRT_POWER_SAVE_CONTROL)(&(priv->ieee80211->PowerSaveControl));
5154
5155 //YJ,add,091109
5156 if (priv->up == 0){
5157 RT_TRACE(COMP_ERR, "ERR!!! %s(): Driver is already down!\n",__FUNCTION__);
5158 priv->bdisable_nic = false; //YJ,add,091111
5159 return false;
5160 }
5161 // <1> Reset memory: descriptor, buffer,..
5162 //NicIFResetMemory(Adapter);
5163
5164 // <2> Enable Adapter
65a43784 5165 //priv->bfirst_init = true;
5166 init_status = rtl8192_adapter_start(dev);
5167 if (init_status != RT_STATUS_SUCCESS) {
5168 RT_TRACE(COMP_ERR,"ERR!!! %s(): initialization is failed!\n",__FUNCTION__);
5169 priv->bdisable_nic = false; //YJ,add,091111
5170 return -1;
5171 }
65a43784 5172 RT_CLEAR_PS_LEVEL(pPSC, RT_RF_OFF_LEVL_HALT_NIC);
5173 //priv->bfirst_init = false;
5174
5175 // <3> Enable Interrupt
5176 rtl8192_irq_enable(dev);
5177 priv->bdisable_nic = false;
16d74da0 5178
c6eae677 5179 return (init_status == RT_STATUS_SUCCESS);
65a43784 5180}
214985a6 5181
65a43784 5182bool NicIFDisableNIC(struct net_device* dev)
5183{
5184 bool status = true;
5185 struct r8192_priv* priv = ieee80211_priv(dev);
5186 u8 tmp_state = 0;
5187 // <1> Disable Interrupt
16d74da0 5188
65a43784 5189 priv->bdisable_nic = true; //YJ,move,091109
5190 tmp_state = priv->ieee80211->state;
5191
5192 ieee80211_softmac_stop_protocol(priv->ieee80211, false);
5193
5194 priv->ieee80211->state = tmp_state;
5195 rtl8192_cancel_deferred_work(priv);
5196 rtl8192_irq_disable(dev);
5197 // <2> Stop all timer
5198
5199 // <3> Disable Adapter
5200 rtl8192_halt_adapter(dev, false);
5201// priv->bdisable_nic = true;
65a43784 5202
5203 return status;
5204}
5205
ecdfa446
GKH		 5206module_init(rtl8192_pci_module_init);
5207module_exit(rtl8192_pci_module_exit);
Linux kernel - Deliverables
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