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staging: rtl8192e: Remove SetRFPowerStateInProgress
[deliverable/linux.git] / drivers / staging / rtl8192e / r8192E_core.c
CommitLineData
ecdfa446
GKH		 1/******************************************************************************
2 * Copyright(c) 2008 - 2010 Realtek Corporation. All rights reserved.
4803ef77 3 * Linux device driver for RTL8192E
ecdfa446
GKH		 4 *
5 * Based on the r8180 driver, which is:
6 * Copyright 2004-2005 Andrea Merello <andreamrl@tiscali.it>, et al.
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of version 2 of the GNU General Public License as
9 * published by the Free Software Foundation.
10 *
11 * This program is distributed in the hope that it will be useful, but WITHOUT
12 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 * more details.
15 *
16 * You should have received a copy of the GNU General Public License along with
17 * this program; if not, write to the Free Software Foundation, Inc.,
18 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
19 *
20 * The full GNU General Public License is included in this distribution in the
21 * file called LICENSE.
22 *
23 * Contact Information:
24 * Jerry chuang <wlanfae@realtek.com>
25 */
26
97a6688a 27
3d14b518 28#include <linux/vmalloc.h>
5a0e3ad6 29#include <linux/slab.h>
ecdfa446
GKH		 30#include <asm/uaccess.h>
31#include "r8192E_hw.h"
32#include "r8192E.h"
33#include "r8190_rtl8256.h" /* RTL8225 Radio frontend */
34#include "r8180_93cx6.h" /* Card EEPROM */
35#include "r8192E_wx.h"
36#include "r819xE_phy.h" //added by WB 4.30.2008
37#include "r819xE_phyreg.h"
38#include "r819xE_cmdpkt.h"
39#include "r8192E_dm.h"
ecdfa446 40
bebdf809 41#ifdef CONFIG_PM
ecdfa446
GKH		 42#include "r8192_pm.h"
43#endif
44
45#ifdef ENABLE_DOT11D
65a43784 46#include "ieee80211/dot11d.h"
ecdfa446
GKH		 47#endif
48
49//set here to open your trace code. //WB
57be9583 50u32 rt_global_debug_component = COMP_ERR ; //always open err flags on
cf3d3d38 51
5eaa53de 52static DEFINE_PCI_DEVICE_TABLE(rtl8192_pci_id_tbl) = {
ecdfa446
GKH		 53 /* Realtek */
54 { PCI_DEVICE(0x10ec, 0x8192) },
55
56 /* Corega */
57 { PCI_DEVICE(0x07aa, 0x0044) },
58 { PCI_DEVICE(0x07aa, 0x0047) },
ecdfa446
GKH		 59 {}
60};
61
dca41306 62static char ifname[IFNAMSIZ] = "wlan%d";
ecdfa446
GKH		 63static int hwwep = 1; //default use hw. set 0 to use software security
64static int channels = 0x3fff;
65
66MODULE_LICENSE("GPL");
ecdfa446 67MODULE_VERSION("V 1.1");
ecdfa446
GKH		 68MODULE_DEVICE_TABLE(pci, rtl8192_pci_id_tbl);
69//MODULE_AUTHOR("Andrea Merello <andreamrl@tiscali.it>");
70MODULE_DESCRIPTION("Linux driver for Realtek RTL819x WiFi cards");
71
ecdfa446 72
dca41306 73module_param_string(ifname, ifname, sizeof(ifname), S_IRUGO|S_IWUSR);
ecdfa446
GKH		 74module_param(hwwep,int, S_IRUGO|S_IWUSR);
75module_param(channels,int, S_IRUGO|S_IWUSR);
ecdfa446
GKH		 76
77MODULE_PARM_DESC(ifname," Net interface name, wlan%d=default");
ecdfa446
GKH		 78MODULE_PARM_DESC(hwwep," Try to use hardware WEP support. Still broken and not available on all cards");
79MODULE_PARM_DESC(channels," Channel bitmask for specific locales. NYI");
80
81static int __devinit rtl8192_pci_probe(struct pci_dev *pdev,
82 const struct pci_device_id *id);
83static void __devexit rtl8192_pci_disconnect(struct pci_dev *pdev);
84
85static struct pci_driver rtl8192_pci_driver = {
86 .name = RTL819xE_MODULE_NAME, /* Driver name */
87 .id_table = rtl8192_pci_id_tbl, /* PCI_ID table */
88 .probe = rtl8192_pci_probe, /* probe fn */
89 .remove = __devexit_p(rtl8192_pci_disconnect), /* remove fn */
bebdf809 90#ifdef CONFIG_PM
ecdfa446
GKH		 91 .suspend = rtl8192E_suspend, /* PM suspend fn */
92 .resume = rtl8192E_resume, /* PM resume fn */
93#else
94 .suspend = NULL, /* PM suspend fn */
214985a6 95 .resume = NULL, /* PM resume fn */
ecdfa446 96#endif
ecdfa446
GKH		 97};
98
559fba5e
MM		 99static void rtl8192_start_beacon(struct net_device *dev);
100static void rtl8192_stop_beacon(struct net_device *dev);
101static void rtl819x_watchdog_wqcallback(struct work_struct *work);
80a4dead
MM		 102static void rtl8192_irq_rx_tasklet(unsigned long arg);
103static void rtl8192_irq_tx_tasklet(unsigned long arg);
104static void rtl8192_prepare_beacon(unsigned long arg);
559fba5e 105static irqreturn_t rtl8192_interrupt(int irq, void *netdev);
881a975b 106static void rtl819xE_tx_cmd(struct net_device *dev, struct sk_buff *skb);
5b3b1a7b
MM		 107static void rtl8192_update_ratr_table(struct net_device* dev);
108static void rtl8192_restart(struct work_struct *work);
109static void watch_dog_timer_callback(unsigned long data);
110static int _rtl8192_up(struct net_device *dev);
111static void rtl8192_cancel_deferred_work(struct r8192_priv* priv);
3b10c0a4 112static short rtl8192_tx(struct net_device *dev, struct sk_buff* skb);
559fba5e 113
ecdfa446
GKH		 114#ifdef ENABLE_DOT11D
115
116typedef struct _CHANNEL_LIST
117{
118 u8 Channel[32];
119 u8 Len;
120}CHANNEL_LIST, *PCHANNEL_LIST;
121
ab2161a0 122static const CHANNEL_LIST ChannelPlan[] = {
ecdfa446
GKH		 123 {{1,2,3,4,5,6,7,8,9,10,11,36,40,44,48,52,56,60,64,149,153,157,161,165},24}, //FCC
124 {{1,2,3,4,5,6,7,8,9,10,11},11}, //IC
125 {{1,2,3,4,5,6,7,8,9,10,11,12,13,36,40,44,48,52,56,60,64},21}, //ETSI
126 {{1,2,3,4,5,6,7,8,9,10,11,12,13},13}, //Spain. Change to ETSI.
127 {{1,2,3,4,5,6,7,8,9,10,11,12,13},13}, //France. Change to ETSI.
128 {{1,2,3,4,5,6,7,8,9,10,11,12,13,14,36,40,44,48,52,56,60,64},22}, //MKK //MKK
129 {{1,2,3,4,5,6,7,8,9,10,11,12,13,14,36,40,44,48,52,56,60,64},22},//MKK1
130 {{1,2,3,4,5,6,7,8,9,10,11,12,13},13}, //Israel.
131 {{1,2,3,4,5,6,7,8,9,10,11,12,13,14,36,40,44,48,52,56,60,64},22}, // For 11a , TELEC
132 {{1,2,3,4,5,6,7,8,9,10,11,12,13,14,36,40,44,48,52,56,60,64}, 22}, //MIC
133 {{1,2,3,4,5,6,7,8,9,10,11,12,13,14},14} //For Global Domain. 1-11:active scan, 12-14 passive scan. //+YJ, 080626
134};
135
136static void rtl819x_set_channel_map(u8 channel_plan, struct r8192_priv* priv)
137{
138 int i, max_chan=-1, min_chan=-1;
139 struct ieee80211_device* ieee = priv->ieee80211;
140 switch (channel_plan)
141 {
142 case COUNTRY_CODE_FCC:
143 case COUNTRY_CODE_IC:
144 case COUNTRY_CODE_ETSI:
145 case COUNTRY_CODE_SPAIN:
146 case COUNTRY_CODE_FRANCE:
147 case COUNTRY_CODE_MKK:
148 case COUNTRY_CODE_MKK1:
149 case COUNTRY_CODE_ISRAEL:
150 case COUNTRY_CODE_TELEC:
151 case COUNTRY_CODE_MIC:
152 {
153 Dot11d_Init(ieee);
154 ieee->bGlobalDomain = false;
155 //acturally 8225 & 8256 rf chip only support B,G,24N mode
6f304eb2
MM		 156 min_chan = 1;
157 max_chan = 14;
158
ecdfa446
GKH		 159 if (ChannelPlan[channel_plan].Len != 0){
160 // Clear old channel map
161 memset(GET_DOT11D_INFO(ieee)->channel_map, 0, sizeof(GET_DOT11D_INFO(ieee)->channel_map));
162 // Set new channel map
163 for (i=0;i<ChannelPlan[channel_plan].Len;i++)
164 {
165 if (ChannelPlan[channel_plan].Channel[i] < min_chan || ChannelPlan[channel_plan].Channel[i] > max_chan)
166 break;
167 GET_DOT11D_INFO(ieee)->channel_map[ChannelPlan[channel_plan].Channel[i]] = 1;
168 }
169 }
170 break;
171 }
172 case COUNTRY_CODE_GLOBAL_DOMAIN:
173 {
174 GET_DOT11D_INFO(ieee)->bEnabled = 0; //this flag enabled to follow 11d country IE setting, otherwise, it shall follow global domain setting
175 Dot11d_Reset(ieee);
176 ieee->bGlobalDomain = true;
177 break;
178 }
179 default:
180 break;
181 }
182}
183#endif
184
52cab756
MM		 185static inline bool rx_hal_is_cck_rate(prx_fwinfo_819x_pci pdrvinfo)
186{
187 return (pdrvinfo->RxRate == DESC90_RATE1M ||
188 pdrvinfo->RxRate == DESC90_RATE2M ||
189 pdrvinfo->RxRate == DESC90_RATE5_5M ||
190 pdrvinfo->RxRate == DESC90_RATE11M) &&
191 !pdrvinfo->RxHT;
192}
ecdfa446
GKH		 193
194void CamResetAllEntry(struct net_device *dev)
195{
3f9ab1ee
MM		 196 struct r8192_priv* priv = ieee80211_priv(dev);
197 write_nic_dword(priv, RWCAM, BIT31|BIT30);
ecdfa446
GKH		 198}
199
3f9ab1ee 200void write_cam(struct r8192_priv *priv, u8 addr, u32 data)
ecdfa446 201{
3f9ab1ee
MM		 202 write_nic_dword(priv, WCAMI, data);
203 write_nic_dword(priv, RWCAM, BIT31|BIT16|(addr&0xff) );
ecdfa446 204}
3f9ab1ee
MM		 205
206u32 read_cam(struct r8192_priv *priv, u8 addr)
ecdfa446 207{
3f9ab1ee
MM		 208 write_nic_dword(priv, RWCAM, 0x80000000|(addr&0xff) );
209 return read_nic_dword(priv, 0xa8);
ecdfa446
GKH		 210}
211
3f9ab1ee 212u8 read_nic_byte(struct r8192_priv *priv, int x)
ecdfa446 213{
3f9ab1ee 214 struct net_device *dev = priv->ieee80211->dev;
ecdfa446
GKH		 215 return 0xff&readb((u8*)dev->mem_start +x);
216}
217
3f9ab1ee 218u32 read_nic_dword(struct r8192_priv *priv, int x)
ecdfa446 219{
3f9ab1ee 220 struct net_device *dev = priv->ieee80211->dev;
ecdfa446
GKH		 221 return readl((u8*)dev->mem_start +x);
222}
223
3f9ab1ee 224u16 read_nic_word(struct r8192_priv *priv, int x)
ecdfa446 225{
3f9ab1ee 226 struct net_device *dev = priv->ieee80211->dev;
ecdfa446
GKH		 227 return readw((u8*)dev->mem_start +x);
228}
229
3f9ab1ee 230void write_nic_byte(struct r8192_priv *priv, int x,u8 y)
ecdfa446 231{
3f9ab1ee 232 struct net_device *dev = priv->ieee80211->dev;
ecdfa446
GKH		 233 writeb(y,(u8*)dev->mem_start +x);
234 udelay(20);
235}
236
3f9ab1ee 237void write_nic_dword(struct r8192_priv *priv, int x,u32 y)
ecdfa446 238{
3f9ab1ee 239 struct net_device *dev = priv->ieee80211->dev;
ecdfa446
GKH		 240 writel(y,(u8*)dev->mem_start +x);
241 udelay(20);
242}
243
3f9ab1ee 244void write_nic_word(struct r8192_priv *priv, int x,u16 y)
ecdfa446 245{
3f9ab1ee 246 struct net_device *dev = priv->ieee80211->dev;
ecdfa446
GKH		 247 writew(y,(u8*)dev->mem_start +x);
248 udelay(20);
249}
250
65a43784 251u8 rtl8192e_ap_sec_type(struct ieee80211_device *ieee)
252{
4a533365
MM		 253 static const u8 ccmp_ie[4] = {0x00,0x50,0xf2,0x04};
254 static const u8 ccmp_rsn_ie[4] = {0x00, 0x0f, 0xac, 0x04};
65a43784 255 int wpa_ie_len= ieee->wpa_ie_len;
256 struct ieee80211_crypt_data* crypt;
257 int encrypt;
258
259 crypt = ieee->crypt[ieee->tx_keyidx];
260
207b58fb
MM		 261 encrypt = (ieee->current_network.capability & WLAN_CAPABILITY_PRIVACY) ||
262 (ieee->host_encrypt && crypt && crypt->ops &&
65a43784 263 (0 == strcmp(crypt->ops->name,"WEP")));
264
265 /* simply judge */
266 if(encrypt && (wpa_ie_len == 0)) {
267 // wep encryption, no N mode setting */
268 return SEC_ALG_WEP;
269 } else if((wpa_ie_len != 0)) {
270 // parse pairwise key type */
271 if (((ieee->wpa_ie[0] == 0xdd) && (!memcmp(&(ieee->wpa_ie[14]),ccmp_ie,4))) ||
272 ((ieee->wpa_ie[0] == 0x30) && (!memcmp(&ieee->wpa_ie[10],ccmp_rsn_ie, 4))))
273 return SEC_ALG_CCMP;
274 else
275 return SEC_ALG_TKIP;
276 } else {
277 return SEC_ALG_NONE;
278 }
279}
280
281void
282rtl8192e_SetHwReg(struct net_device *dev,u8 variable,u8* val)
283{
284 struct r8192_priv* priv = ieee80211_priv(dev);
285
286 switch(variable)
287 {
288
289 case HW_VAR_BSSID:
3f9ab1ee
MM		 290 write_nic_dword(priv, BSSIDR, ((u32*)(val))[0]);
291 write_nic_word(priv, BSSIDR+2, ((u16*)(val+2))[0]);
65a43784 292 break;
293
294 case HW_VAR_MEDIA_STATUS:
295 {
296 RT_OP_MODE OpMode = *((RT_OP_MODE *)(val));
3f9ab1ee 297 u8 btMsr = read_nic_byte(priv, MSR);
65a43784 298
299 btMsr &= 0xfc;
300
301 switch(OpMode)
302 {
303 case RT_OP_MODE_INFRASTRUCTURE:
304 btMsr |= MSR_INFRA;
65a43784 305 break;
306
307 case RT_OP_MODE_IBSS:
308 btMsr |= MSR_ADHOC;
65a43784 309 break;
310
311 case RT_OP_MODE_AP:
312 btMsr |= MSR_AP;
65a43784 313 break;
314
315 default:
316 btMsr |= MSR_NOLINK;
317 break;
318 }
319
3f9ab1ee 320 write_nic_byte(priv, MSR, btMsr);
65a43784 321 }
322 break;
323
951fc8ed 324 case HW_VAR_CHECK_BSSID:
65a43784 325 {
326 u32 RegRCR, Type;
327
328 Type = ((u8*)(val))[0];
3f9ab1ee 329 RegRCR = read_nic_dword(priv, RCR);
65a43784 330 priv->ReceiveConfig = RegRCR;
331
332 if (Type == true)
333 RegRCR |= (RCR_CBSSID);
334 else if (Type == false)
335 RegRCR &= (~RCR_CBSSID);
336
3f9ab1ee 337 write_nic_dword(priv, RCR,RegRCR);
65a43784 338 priv->ReceiveConfig = RegRCR;
339
340 }
341 break;
342
343 case HW_VAR_SLOT_TIME:
344 {
65a43784 345 priv->slot_time = val[0];
3f9ab1ee 346 write_nic_byte(priv, SLOT_TIME, val[0]);
65a43784 347
348 }
349 break;
350
351 case HW_VAR_ACK_PREAMBLE:
352 {
353 u32 regTmp = 0;
354 priv->short_preamble = (bool)(*(u8*)val );
355 regTmp = priv->basic_rate;
356 if (priv->short_preamble)
357 regTmp |= BRSR_AckShortPmb;
3f9ab1ee 358 write_nic_dword(priv, RRSR, regTmp);
65a43784 359 }
360 break;
361
362 case HW_VAR_CPU_RST:
3f9ab1ee 363 write_nic_dword(priv, CPU_GEN, ((u32*)(val))[0]);
65a43784 364 break;
365
366 default:
367 break;
368 }
369
370}
371
ecdfa446
GKH		 372static struct proc_dir_entry *rtl8192_proc = NULL;
373
ecdfa446
GKH		 374static int proc_get_stats_ap(char *page, char **start,
375 off_t offset, int count,
376 int *eof, void *data)
377{
378 struct net_device *dev = data;
379 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
380 struct ieee80211_device *ieee = priv->ieee80211;
381 struct ieee80211_network *target;
ecdfa446
GKH		 382 int len = 0;
383
384 list_for_each_entry(target, &ieee->network_list, list) {
385
386 len += snprintf(page + len, count - len,
387 "%s ", target->ssid);
388
389 if(target->wpa_ie_len>0 || target->rsn_ie_len>0){
390 len += snprintf(page + len, count - len,
391 "WPA\n");
392 }
393 else{
394 len += snprintf(page + len, count - len,
395 "non_WPA\n");
396 }
397
398 }
399
400 *eof = 1;
401 return len;
402}
403
404static int proc_get_registers(char *page, char **start,
405 off_t offset, int count,
406 int *eof, void *data)
407{
408 struct net_device *dev = data;
3f9ab1ee 409 struct r8192_priv *priv = ieee80211_priv(dev);
ecdfa446
GKH		 410 int len = 0;
411 int i,n;
ecdfa446
GKH		 412 int max=0xff;
413
414 /* This dump the current register page */
415 len += snprintf(page + len, count - len,
416 "\n####################page 0##################\n ");
417
418 for(n=0;n<=max;)
419 {
ecdfa446
GKH		 420 len += snprintf(page + len, count - len,
421 "\nD: %2x > ",n);
422
423 for(i=0;i<16 && n<=max;i++,n++)
424 len += snprintf(page + len, count - len,
3f9ab1ee 425 "%2x ",read_nic_byte(priv,n));
ecdfa446
GKH		 426 }
427 len += snprintf(page + len, count - len,"\n");
428 len += snprintf(page + len, count - len,
429 "\n####################page 1##################\n ");
430 for(n=0;n<=max;)
431 {
ecdfa446
GKH		 432 len += snprintf(page + len, count - len,
433 "\nD: %2x > ",n);
434
435 for(i=0;i<16 && n<=max;i++,n++)
436 len += snprintf(page + len, count - len,
3f9ab1ee 437 "%2x ",read_nic_byte(priv,0x100|n));
ecdfa446
GKH		 438 }
439
440 len += snprintf(page + len, count - len,
441 "\n####################page 3##################\n ");
442 for(n=0;n<=max;)
443 {
ecdfa446
GKH		 444 len += snprintf(page + len, count - len,
445 "\nD: %2x > ",n);
446
447 for(i=0;i<16 && n<=max;i++,n++)
448 len += snprintf(page + len, count - len,
3f9ab1ee 449 "%2x ",read_nic_byte(priv,0x300|n));
ecdfa446
GKH		 450 }
451
ecdfa446
GKH		 452 *eof = 1;
453 return len;
454
455}
456
ecdfa446
GKH		 457static int proc_get_stats_tx(char *page, char **start,
458 off_t offset, int count,
459 int *eof, void *data)
460{
461 struct net_device *dev = data;
462 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
463
464 int len = 0;
465
466 len += snprintf(page + len, count - len,
467 "TX VI priority ok int: %lu\n"
ecdfa446 468 "TX VO priority ok int: %lu\n"
ecdfa446 469 "TX BE priority ok int: %lu\n"
ecdfa446 470 "TX BK priority ok int: %lu\n"
ecdfa446 471 "TX MANAGE priority ok int: %lu\n"
ecdfa446
GKH		 472 "TX BEACON priority ok int: %lu\n"
473 "TX BEACON priority error int: %lu\n"
474 "TX CMDPKT priority ok int: %lu\n"
ecdfa446
GKH		 475 "TX queue stopped?: %d\n"
476 "TX fifo overflow: %lu\n"
ecdfa446
GKH		 477 "TX total data packets %lu\n"
478 "TX total data bytes :%lu\n",
ecdfa446 479 priv->stats.txviokint,
ecdfa446 480 priv->stats.txvookint,
ecdfa446 481 priv->stats.txbeokint,
ecdfa446 482 priv->stats.txbkokint,
ecdfa446 483 priv->stats.txmanageokint,
ecdfa446
GKH		 484 priv->stats.txbeaconokint,
485 priv->stats.txbeaconerr,
486 priv->stats.txcmdpktokint,
ecdfa446
GKH		 487 netif_queue_stopped(dev),
488 priv->stats.txoverflow,
ecdfa446 489 priv->ieee80211->stats.tx_packets,
3059f2de 490 priv->ieee80211->stats.tx_bytes);
ecdfa446
GKH		 491
492 *eof = 1;
493 return len;
494}
495
496
497
498static int proc_get_stats_rx(char *page, char **start,
499 off_t offset, int count,
500 int *eof, void *data)
501{
502 struct net_device *dev = data;
503 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
504
505 int len = 0;
506
507 len += snprintf(page + len, count - len,
508 "RX packets: %lu\n"
509 "RX desc err: %lu\n"
c282f2e3 510 "RX rx overflow error: %lu\n",
ecdfa446
GKH		 511 priv->stats.rxint,
512 priv->stats.rxrdu,
c282f2e3 513 priv->stats.rxoverflow);
ecdfa446
GKH		 514
515 *eof = 1;
516 return len;
517}
518
5e1ad18a 519static void rtl8192_proc_module_init(void)
ecdfa446 520{
703fdcc3 521 RT_TRACE(COMP_INIT, "Initializing proc filesystem\n");
ecdfa446 522 rtl8192_proc=create_proc_entry(RTL819xE_MODULE_NAME, S_IFDIR, init_net.proc_net);
ecdfa446
GKH		 523}
524
525
5e1ad18a 526static void rtl8192_proc_module_remove(void)
ecdfa446 527{
ecdfa446 528 remove_proc_entry(RTL819xE_MODULE_NAME, init_net.proc_net);
ecdfa446
GKH		 529}
530
531
5e1ad18a 532static void rtl8192_proc_remove_one(struct net_device *dev)
ecdfa446
GKH		 533{
534 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
535
536 printk("dev name=======> %s\n",dev->name);
537
538 if (priv->dir_dev) {
ecdfa446
GKH		 539 remove_proc_entry("stats-tx", priv->dir_dev);
540 remove_proc_entry("stats-rx", priv->dir_dev);
ecdfa446
GKH		 541 remove_proc_entry("stats-ap", priv->dir_dev);
542 remove_proc_entry("registers", priv->dir_dev);
ecdfa446
GKH		 543 remove_proc_entry("wlan0", rtl8192_proc);
544 priv->dir_dev = NULL;
545 }
546}
547
548
5e1ad18a 549static void rtl8192_proc_init_one(struct net_device *dev)
ecdfa446
GKH		 550{
551 struct proc_dir_entry *e;
552 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
553 priv->dir_dev = create_proc_entry(dev->name,
554 S_IFDIR | S_IRUGO | S_IXUGO,
555 rtl8192_proc);
556 if (!priv->dir_dev) {
557 RT_TRACE(COMP_ERR, "Unable to initialize /proc/net/rtl8192/%s\n",
558 dev->name);
559 return;
560 }
ecdfa446
GKH		 561 e = create_proc_read_entry("stats-rx", S_IFREG | S_IRUGO,
562 priv->dir_dev, proc_get_stats_rx, dev);
563
564 if (!e) {
565 RT_TRACE(COMP_ERR,"Unable to initialize "
566 "/proc/net/rtl8192/%s/stats-rx\n",
567 dev->name);
568 }
569
570
571 e = create_proc_read_entry("stats-tx", S_IFREG | S_IRUGO,
572 priv->dir_dev, proc_get_stats_tx, dev);
573
574 if (!e) {
575 RT_TRACE(COMP_ERR, "Unable to initialize "
576 "/proc/net/rtl8192/%s/stats-tx\n",
577 dev->name);
578 }
ecdfa446
GKH		 579
580 e = create_proc_read_entry("stats-ap", S_IFREG | S_IRUGO,
581 priv->dir_dev, proc_get_stats_ap, dev);
582
583 if (!e) {
584 RT_TRACE(COMP_ERR, "Unable to initialize "
585 "/proc/net/rtl8192/%s/stats-ap\n",
586 dev->name);
587 }
588
589 e = create_proc_read_entry("registers", S_IFREG | S_IRUGO,
590 priv->dir_dev, proc_get_registers, dev);
591 if (!e) {
592 RT_TRACE(COMP_ERR, "Unable to initialize "
593 "/proc/net/rtl8192/%s/registers\n",
594 dev->name);
595 }
ecdfa446 596}
ecdfa446 597
9f17b076 598static short check_nic_enough_desc(struct net_device *dev, int prio)
ecdfa446
GKH		 599{
600 struct r8192_priv *priv = ieee80211_priv(dev);
601 struct rtl8192_tx_ring *ring = &priv->tx_ring[prio];
602
603 /* for now we reserve two free descriptor as a safety boundary
604 * between the tail and the head
605 */
285f660c 606 return (ring->entries - skb_queue_len(&ring->queue) >= 2);
ecdfa446
GKH		 607}
608
5e1ad18a 609static void tx_timeout(struct net_device *dev)
ecdfa446
GKH		 610{
611 struct r8192_priv *priv = ieee80211_priv(dev);
ecdfa446 612
ecdfa446 613 schedule_work(&priv->reset_wq);
ecdfa446
GKH		 614 printk("TXTIMEOUT");
615}
616
5e1ad18a 617static void rtl8192_irq_enable(struct net_device *dev)
ecdfa446
GKH		 618{
619 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
ae9f66da
MM		 620 u32 mask;
621
622 mask = IMR_ROK | IMR_VODOK | IMR_VIDOK | IMR_BEDOK | IMR_BKDOK |
623 IMR_HCCADOK | IMR_MGNTDOK | IMR_COMDOK | IMR_HIGHDOK |
624 IMR_BDOK | IMR_RXCMDOK | IMR_TIMEOUT0 | IMR_RDU | IMR_RXFOVW |
625 IMR_TXFOVW | IMR_BcnInt | IMR_TBDOK | IMR_TBDER;
626
627 write_nic_dword(priv, INTA_MASK, mask);
ecdfa446
GKH		 628}
629
9f17b076 630static void rtl8192_irq_disable(struct net_device *dev)
ecdfa446
GKH		 631{
632 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
633
3f9ab1ee 634 write_nic_dword(priv, INTA_MASK, 0);
4bbedb27 635 synchronize_irq(dev->irq);
ecdfa446
GKH		 636}
637
9f17b076 638static void rtl8192_update_msr(struct net_device *dev)
ecdfa446
GKH		 639{
640 struct r8192_priv *priv = ieee80211_priv(dev);
641 u8 msr;
642
3f9ab1ee 643 msr = read_nic_byte(priv, MSR);
ecdfa446
GKH		 644 msr &= ~ MSR_LINK_MASK;
645
646 /* do not change in link_state != WLAN_LINK_ASSOCIATED.
647 * msr must be updated if the state is ASSOCIATING.
648 * this is intentional and make sense for ad-hoc and
649 * master (see the create BSS/IBSS func)
650 */
651 if (priv->ieee80211->state == IEEE80211_LINKED){
652
653 if (priv->ieee80211->iw_mode == IW_MODE_INFRA)
654 msr |= (MSR_LINK_MANAGED<<MSR_LINK_SHIFT);
655 else if (priv->ieee80211->iw_mode == IW_MODE_ADHOC)
656 msr |= (MSR_LINK_ADHOC<<MSR_LINK_SHIFT);
657 else if (priv->ieee80211->iw_mode == IW_MODE_MASTER)
658 msr |= (MSR_LINK_MASTER<<MSR_LINK_SHIFT);
659
660 }else
661 msr |= (MSR_LINK_NONE<<MSR_LINK_SHIFT);
662
3f9ab1ee 663 write_nic_byte(priv, MSR, msr);
ecdfa446
GKH		 664}
665
9f17b076 666static void rtl8192_set_chan(struct net_device *dev,short ch)
ecdfa446 667{
61d0e67a 668 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
ecdfa446 669
61d0e67a 670 priv->chan = ch;
ecdfa446 671
61d0e67a 672 /* need to implement rf set channel here WB */
ecdfa446 673
61d0e67a
MM		 674 if (priv->rf_set_chan)
675 priv->rf_set_chan(dev, priv->chan);
ecdfa446
GKH		 676}
677
9f17b076 678static void rtl8192_rx_enable(struct net_device *dev)
ecdfa446 679{
7aed48d9
MM		 680 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
681
3f9ab1ee 682 write_nic_dword(priv, RDQDA,priv->rx_ring_dma);
ecdfa446
GKH		 683}
684
685/* the TX_DESC_BASE setting is according to the following queue index
686 * BK_QUEUE ===> 0
687 * BE_QUEUE ===> 1
688 * VI_QUEUE ===> 2
689 * VO_QUEUE ===> 3
690 * HCCA_QUEUE ===> 4
691 * TXCMD_QUEUE ===> 5
692 * MGNT_QUEUE ===> 6
693 * HIGH_QUEUE ===> 7
694 * BEACON_QUEUE ===> 8
695 * */
881a975b 696static const u32 TX_DESC_BASE[] = {BKQDA, BEQDA, VIQDA, VOQDA, HCCAQDA, CQDA, MQDA, HQDA, BQDA};
9f17b076 697static void rtl8192_tx_enable(struct net_device *dev)
ecdfa446 698{
7aed48d9
MM		 699 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
700 u32 i;
ecdfa446 701
7aed48d9 702 for (i = 0; i < MAX_TX_QUEUE_COUNT; i++)
3f9ab1ee 703 write_nic_dword(priv, TX_DESC_BASE[i], priv->tx_ring[i].dma);
7aed48d9
MM		 704
705 ieee80211_reset_queue(priv->ieee80211);
ecdfa446
GKH		 706}
707
ecdfa446
GKH		 708
709static void rtl8192_free_rx_ring(struct net_device *dev)
710{
7aed48d9
MM		 711 struct r8192_priv *priv = ieee80211_priv(dev);
712 int i;
ecdfa446 713
7aed48d9
MM		 714 for (i = 0; i < priv->rxringcount; i++) {
715 struct sk_buff *skb = priv->rx_buf[i];
716 if (!skb)
717 continue;
ecdfa446 718
7aed48d9
MM		 719 pci_unmap_single(priv->pdev,
720 *((dma_addr_t *)skb->cb),
721 priv->rxbuffersize, PCI_DMA_FROMDEVICE);
722 kfree_skb(skb);
723 }
ecdfa446 724
7aed48d9
MM		 725 pci_free_consistent(priv->pdev, sizeof(*priv->rx_ring) * priv->rxringcount,
726 priv->rx_ring, priv->rx_ring_dma);
727 priv->rx_ring = NULL;
ecdfa446
GKH		 728}
729
730static void rtl8192_free_tx_ring(struct net_device *dev, unsigned int prio)
731{
7aed48d9
MM		 732 struct r8192_priv *priv = ieee80211_priv(dev);
733 struct rtl8192_tx_ring *ring = &priv->tx_ring[prio];
ecdfa446 734
7aed48d9
MM		 735 while (skb_queue_len(&ring->queue)) {
736 tx_desc_819x_pci *entry = &ring->desc[ring->idx];
737 struct sk_buff *skb = __skb_dequeue(&ring->queue);
ecdfa446 738
7aed48d9
MM		 739 pci_unmap_single(priv->pdev, le32_to_cpu(entry->TxBuffAddr),
740 skb->len, PCI_DMA_TODEVICE);
741 kfree_skb(skb);
742 ring->idx = (ring->idx + 1) % ring->entries;
743 }
ecdfa446 744
7aed48d9
MM		 745 pci_free_consistent(priv->pdev, sizeof(*ring->desc)*ring->entries,
746 ring->desc, ring->dma);
747 ring->desc = NULL;
ecdfa446
GKH		 748}
749
16d74da0 750void PHY_SetRtl8192eRfOff(struct net_device* dev)
ecdfa446 751{
3f9ab1ee
MM		 752 struct r8192_priv *priv = ieee80211_priv(dev);
753
65a43784 754 //disable RF-Chip A/B
755 rtl8192_setBBreg(dev, rFPGA0_XA_RFInterfaceOE, BIT4, 0x0);
756 //analog to digital off, for power save
757 rtl8192_setBBreg(dev, rFPGA0_AnalogParameter4, 0x300, 0x0);
758 //digital to analog off, for power save
759 rtl8192_setBBreg(dev, rFPGA0_AnalogParameter1, 0x18, 0x0);
760 //rx antenna off
761 rtl8192_setBBreg(dev, rOFDM0_TRxPathEnable, 0xf, 0x0);
762 //rx antenna off
763 rtl8192_setBBreg(dev, rOFDM1_TRxPathEnable, 0xf, 0x0);
764 //analog to digital part2 off, for power save
765 rtl8192_setBBreg(dev, rFPGA0_AnalogParameter1, 0x60, 0x0);
766 rtl8192_setBBreg(dev, rFPGA0_AnalogParameter1, 0x4, 0x0);
767 // Analog parameter!!Change bias and Lbus control.
3f9ab1ee 768 write_nic_byte(priv, ANAPAR_FOR_8192PciE, 0x07);
65a43784 769
770}
ecdfa446 771
9f17b076 772static void rtl8192_halt_adapter(struct net_device *dev, bool reset)
ecdfa446 773{
ecdfa446 774 struct r8192_priv *priv = ieee80211_priv(dev);
65a43784 775 int i;
932f4b3a
MM		 776 u8 OpMode;
777 u32 ulRegRead;
65a43784 778
779 OpMode = RT_OP_MODE_NO_LINK;
780 priv->ieee80211->SetHwRegHandler(dev, HW_VAR_MEDIA_STATUS, &OpMode);
ecdfa446 781
932f4b3a
MM		 782 if (!priv->ieee80211->bSupportRemoteWakeUp) {
783 /*
784 * disable tx/rx. In 8185 we write 0x10 (Reset bit),
785 * but here we make reference to WMAC and wirte 0x0
786 */
3f9ab1ee 787 write_nic_byte(priv, CMDR, 0);
65a43784 788 }
ecdfa446 789
65a43784 790 mdelay(20);
ecdfa446 791
932f4b3a 792 if (!reset) {
65a43784 793 mdelay(150);
794
932f4b3a 795 priv->bHwRfOffAction = 2;
65a43784 796
932f4b3a
MM		 797 /*
798 * Call MgntActSet_RF_State instead to
799 * prevent RF config race condition.
800 */
801 if (!priv->ieee80211->bSupportRemoteWakeUp) {
65a43784 802 PHY_SetRtl8192eRfOff(dev);
3f9ab1ee 803 ulRegRead = read_nic_dword(priv, CPU_GEN);
932f4b3a 804 ulRegRead |= CPU_GEN_SYSTEM_RESET;
3f9ab1ee 805 write_nic_dword(priv,CPU_GEN, ulRegRead);
932f4b3a
MM		 806 } else {
807 /* for WOL */
3f9ab1ee
MM		 808 write_nic_dword(priv, WFCRC0, 0xffffffff);
809 write_nic_dword(priv, WFCRC1, 0xffffffff);
810 write_nic_dword(priv, WFCRC2, 0xffffffff);
65a43784 811
932f4b3a 812 /* Write PMR register */
3f9ab1ee 813 write_nic_byte(priv, PMR, 0x5);
932f4b3a 814 /* Disable tx, enanble rx */
3f9ab1ee 815 write_nic_byte(priv, MacBlkCtrl, 0xa);
65a43784 816 }
817 }
818
819 for(i = 0; i < MAX_QUEUE_SIZE; i++) {
820 skb_queue_purge(&priv->ieee80211->skb_waitQ [i]);
821 }
822 for(i = 0; i < MAX_QUEUE_SIZE; i++) {
823 skb_queue_purge(&priv->ieee80211->skb_aggQ [i]);
824 }
ecdfa446
GKH		 825
826 skb_queue_purge(&priv->skb_queue);
ecdfa446
GKH		 827}
828
5e1ad18a 829static void rtl8192_data_hard_stop(struct net_device *dev)
ecdfa446 830{
ecdfa446
GKH		 831}
832
5e1ad18a 833static void rtl8192_data_hard_resume(struct net_device *dev)
ecdfa446 834{
ecdfa446
GKH		 835}
836
214985a6
MM		 837/*
838 * this function TX data frames when the ieee80211 stack requires this.
ecdfa446
GKH		 839 * It checks also if we need to stop the ieee tx queue, eventually do it
840 */
5e1ad18a 841static void rtl8192_hard_data_xmit(struct sk_buff *skb, struct net_device *dev, int rate)
ecdfa446
GKH		 842{
843 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
844 int ret;
ecdfa446
GKH		 845 cb_desc *tcb_desc = (cb_desc *)(skb->cb + MAX_DEV_ADDR_SIZE);
846 u8 queue_index = tcb_desc->queue_index;
dcf663fb 847
ecdfa446 848 /* shall not be referred by command packet */
5d33549a 849 BUG_ON(queue_index == TXCMD_QUEUE);
ecdfa446 850
dcf663fb 851 if (priv->bHwRadioOff || (!priv->up))
65a43784 852 {
853 kfree_skb(skb);
854 return;
855 }
856
dcf663fb 857 memcpy(skb->cb, &dev, sizeof(dev));
ecdfa446 858
ecdfa446
GKH		 859 skb_push(skb, priv->ieee80211->tx_headroom);
860 ret = rtl8192_tx(dev, skb);
dcf663fb 861 if (ret != 0) {
ecdfa446 862 kfree_skb(skb);
ecdfa446
GKH		 863 }
864
dcf663fb
MM		 865 if (queue_index != MGNT_QUEUE) {
866 priv->ieee80211->stats.tx_bytes += (skb->len - priv->ieee80211->tx_headroom);
867 priv->ieee80211->stats.tx_packets++;
868 }
ecdfa446
GKH		 869}
870
214985a6
MM		 871/*
872 * This is a rough attempt to TX a frame
ecdfa446
GKH		 873 * This is called by the ieee 80211 stack to TX management frames.
874 * If the ring is full packet are dropped (for data frame the queue
875 * is stopped before this can happen).
876 */
5e1ad18a 877static int rtl8192_hard_start_xmit(struct sk_buff *skb,struct net_device *dev)
ecdfa446
GKH		 878{
879 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
ecdfa446 880 int ret;
ecdfa446
GKH		 881 cb_desc *tcb_desc = (cb_desc *)(skb->cb + MAX_DEV_ADDR_SIZE);
882 u8 queue_index = tcb_desc->queue_index;
883
162f535f
MM		 884 if (queue_index != TXCMD_QUEUE) {
885 if (priv->bHwRadioOff || (!priv->up))
65a43784 886 {
162f535f
MM		 887 kfree_skb(skb);
888 return 0;
889 }
65a43784 890 }
ecdfa446 891
162f535f
MM		 892 memcpy(skb->cb, &dev, sizeof(dev));
893 if (queue_index == TXCMD_QUEUE) {
ecdfa446
GKH		 894 rtl819xE_tx_cmd(dev, skb);
895 ret = 0;
ecdfa446
GKH		 896 return ret;
897 } else {
ecdfa446
GKH		 898 tcb_desc->RATRIndex = 7;
899 tcb_desc->bTxDisableRateFallBack = 1;
900 tcb_desc->bTxUseDriverAssingedRate = 1;
901 tcb_desc->bTxEnableFwCalcDur = 1;
902 skb_push(skb, priv->ieee80211->tx_headroom);
903 ret = rtl8192_tx(dev, skb);
162f535f 904 if (ret != 0) {
ecdfa446 905 kfree_skb(skb);
162f535f 906 }
ecdfa446
GKH		 907 }
908
ecdfa446 909 return ret;
ecdfa446
GKH		 910}
911
912
5e1ad18a 913static void rtl8192_tx_isr(struct net_device *dev, int prio)
ecdfa446 914{
a922a4b7
MM		 915 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
916 struct rtl8192_tx_ring *ring = &priv->tx_ring[prio];
ecdfa446 917
a922a4b7
MM		 918 while (skb_queue_len(&ring->queue)) {
919 tx_desc_819x_pci *entry = &ring->desc[ring->idx];
920 struct sk_buff *skb;
ecdfa446 921
a922a4b7
MM		 922 /*
923 * beacon packet will only use the first descriptor defaultly,
924 * and the OWN may not be cleared by the hardware
925 */
926 if (prio != BEACON_QUEUE) {
927 if (entry->OWN)
928 return;
929 ring->idx = (ring->idx + 1) % ring->entries;
930 }
ecdfa446 931
a922a4b7
MM		 932 skb = __skb_dequeue(&ring->queue);
933 pci_unmap_single(priv->pdev, le32_to_cpu(entry->TxBuffAddr),
934 skb->len, PCI_DMA_TODEVICE);
ecdfa446 935
a922a4b7
MM		 936 kfree_skb(skb);
937 }
ecdfa446 938
a922a4b7
MM		 939 if (prio != BEACON_QUEUE) {
940 /* try to deal with the pending packets */
941 tasklet_schedule(&priv->irq_tx_tasklet);
942 }
ecdfa446
GKH		 943}
944
5e1ad18a 945static void rtl8192_stop_beacon(struct net_device *dev)
ecdfa446 946{
ecdfa446
GKH		 947}
948
5e1ad18a 949static void rtl8192_config_rate(struct net_device* dev, u16* rate_config)
ecdfa446
GKH		 950{
951 struct r8192_priv *priv = ieee80211_priv(dev);
952 struct ieee80211_network *net;
953 u8 i=0, basic_rate = 0;
954 net = & priv->ieee80211->current_network;
955
956 for (i=0; i<net->rates_len; i++)
957 {
958 basic_rate = net->rates[i]&0x7f;
959 switch(basic_rate)
960 {
961 case MGN_1M: *rate_config |= RRSR_1M; break;
962 case MGN_2M: *rate_config |= RRSR_2M; break;
963 case MGN_5_5M: *rate_config |= RRSR_5_5M; break;
964 case MGN_11M: *rate_config |= RRSR_11M; break;
965 case MGN_6M: *rate_config |= RRSR_6M; break;
966 case MGN_9M: *rate_config |= RRSR_9M; break;
967 case MGN_12M: *rate_config |= RRSR_12M; break;
968 case MGN_18M: *rate_config |= RRSR_18M; break;
969 case MGN_24M: *rate_config |= RRSR_24M; break;
970 case MGN_36M: *rate_config |= RRSR_36M; break;
971 case MGN_48M: *rate_config |= RRSR_48M; break;
972 case MGN_54M: *rate_config |= RRSR_54M; break;
973 }
974 }
975 for (i=0; i<net->rates_ex_len; i++)
976 {
977 basic_rate = net->rates_ex[i]&0x7f;
978 switch(basic_rate)
979 {
980 case MGN_1M: *rate_config |= RRSR_1M; break;
981 case MGN_2M: *rate_config |= RRSR_2M; break;
982 case MGN_5_5M: *rate_config |= RRSR_5_5M; break;
983 case MGN_11M: *rate_config |= RRSR_11M; break;
984 case MGN_6M: *rate_config |= RRSR_6M; break;
985 case MGN_9M: *rate_config |= RRSR_9M; break;
986 case MGN_12M: *rate_config |= RRSR_12M; break;
987 case MGN_18M: *rate_config |= RRSR_18M; break;
988 case MGN_24M: *rate_config |= RRSR_24M; break;
989 case MGN_36M: *rate_config |= RRSR_36M; break;
990 case MGN_48M: *rate_config |= RRSR_48M; break;
991 case MGN_54M: *rate_config |= RRSR_54M; break;
992 }
993 }
994}
995
996
997#define SHORT_SLOT_TIME 9
998#define NON_SHORT_SLOT_TIME 20
999
5e1ad18a 1000static void rtl8192_update_cap(struct net_device* dev, u16 cap)
ecdfa446
GKH		 1001{
1002 u32 tmp = 0;
1003 struct r8192_priv *priv = ieee80211_priv(dev);
1004 struct ieee80211_network *net = &priv->ieee80211->current_network;
1005 priv->short_preamble = cap & WLAN_CAPABILITY_SHORT_PREAMBLE;
1006 tmp = priv->basic_rate;
1007 if (priv->short_preamble)
1008 tmp |= BRSR_AckShortPmb;
3f9ab1ee 1009 write_nic_dword(priv, RRSR, tmp);
ecdfa446
GKH		 1010
1011 if (net->mode & (IEEE_G|IEEE_N_24G))
1012 {
1013 u8 slot_time = 0;
1014 if ((cap & WLAN_CAPABILITY_SHORT_SLOT)&&(!priv->ieee80211->pHTInfo->bCurrentRT2RTLongSlotTime))
1015 {//short slot time
1016 slot_time = SHORT_SLOT_TIME;
1017 }
1018 else //long slot time
1019 slot_time = NON_SHORT_SLOT_TIME;
1020 priv->slot_time = slot_time;
3f9ab1ee 1021 write_nic_byte(priv, SLOT_TIME, slot_time);
ecdfa446
GKH		 1022 }
1023
1024}
5e1ad18a
GKH		 1025
1026static void rtl8192_net_update(struct net_device *dev)
ecdfa446 1027{
ecdfa446
GKH		 1028 struct r8192_priv *priv = ieee80211_priv(dev);
1029 struct ieee80211_network *net;
1030 u16 BcnTimeCfg = 0, BcnCW = 6, BcnIFS = 0xf;
1031 u16 rate_config = 0;
1032 net = &priv->ieee80211->current_network;
eb40aeac
MM		 1033
1034 /* update Basic rate: RR, BRSR */
ecdfa446 1035 rtl8192_config_rate(dev, &rate_config);
ecdfa446 1036
eb40aeac
MM		 1037 /*
1038 * Select RRSR (in Legacy-OFDM and CCK)
1039 * For 8190, we select only 24M, 12M, 6M, 11M, 5.5M,
1040 * 2M, and 1M from the Basic rate.
1041 * We do not use other rates.
1042 */
1043 priv->basic_rate = rate_config &= 0x15f;
1044
1045 /* BSSID */
3f9ab1ee
MM		 1046 write_nic_dword(priv, BSSIDR, ((u32 *)net->bssid)[0]);
1047 write_nic_word(priv, BSSIDR+4, ((u16 *)net->bssid)[2]);
ecdfa446 1048
ecdfa446
GKH		 1049 if (priv->ieee80211->iw_mode == IW_MODE_ADHOC)
1050 {
3f9ab1ee
MM		 1051 write_nic_word(priv, ATIMWND, 2);
1052 write_nic_word(priv, BCN_DMATIME, 256);
1053 write_nic_word(priv, BCN_INTERVAL, net->beacon_interval);
eb40aeac
MM		 1054 /*
1055 * BIT15 of BCN_DRV_EARLY_INT will indicate
1056 * whether software beacon or hw beacon is applied.
1057 */
3f9ab1ee
MM		 1058 write_nic_word(priv, BCN_DRV_EARLY_INT, 10);
1059 write_nic_byte(priv, BCN_ERR_THRESH, 100);
ecdfa446
GKH		 1060
1061 BcnTimeCfg |= (BcnCW<<BCN_TCFG_CW_SHIFT);
eb40aeac
MM		 1062 /* TODO: BcnIFS may required to be changed on ASIC */
1063 BcnTimeCfg |= BcnIFS<<BCN_TCFG_IFS;
3f9ab1ee 1064 write_nic_word(priv, BCN_TCFG, BcnTimeCfg);
ecdfa446 1065 }
ecdfa446
GKH		 1066}
1067
9f17b076 1068static void rtl819xE_tx_cmd(struct net_device *dev, struct sk_buff *skb)
ecdfa446
GKH		 1069{
1070 struct r8192_priv *priv = ieee80211_priv(dev);
1071 struct rtl8192_tx_ring *ring;
1072 tx_desc_819x_pci *entry;
1073 unsigned int idx;
1074 dma_addr_t mapping;
1075 cb_desc *tcb_desc;
1076 unsigned long flags;
1077
1078 ring = &priv->tx_ring[TXCMD_QUEUE];
1079 mapping = pci_map_single(priv->pdev, skb->data, skb->len, PCI_DMA_TODEVICE);
1080
1081 spin_lock_irqsave(&priv->irq_th_lock,flags);
1082 idx = (ring->idx + skb_queue_len(&ring->queue)) % ring->entries;
1083 entry = &ring->desc[idx];
1084
1085 tcb_desc = (cb_desc *)(skb->cb + MAX_DEV_ADDR_SIZE);
1086 memset(entry,0,12);
1087 entry->LINIP = tcb_desc->bLastIniPkt;
1088 entry->FirstSeg = 1;//first segment
1089 entry->LastSeg = 1; //last segment
1090 if(tcb_desc->bCmdOrInit == DESC_PACKET_TYPE_INIT) {
1091 entry->CmdInit = DESC_PACKET_TYPE_INIT;
1092 } else {
1093 entry->CmdInit = DESC_PACKET_TYPE_NORMAL;
1094 entry->Offset = sizeof(TX_FWINFO_8190PCI) + 8;
1095 entry->PktSize = (u16)(tcb_desc->pkt_size + entry->Offset);
1096 entry->QueueSelect = QSLT_CMD;
1097 entry->TxFWInfoSize = 0x08;
1098 entry->RATid = (u8)DESC_PACKET_TYPE_INIT;
1099 }
1100 entry->TxBufferSize = skb->len;
1101 entry->TxBuffAddr = cpu_to_le32(mapping);
1102 entry->OWN = 1;
1103
ecdfa446
GKH		 1104 __skb_queue_tail(&ring->queue, skb);
1105 spin_unlock_irqrestore(&priv->irq_th_lock,flags);
1106
3f9ab1ee 1107 write_nic_byte(priv, TPPoll, TPPoll_CQ);
ecdfa446
GKH		 1108
1109 return;
1110}
1111
1112/*
1113 * Mapping Software/Hardware descriptor queue id to "Queue Select Field"
1114 * in TxFwInfo data structure
214985a6 1115 */
5e1ad18a 1116static u8 MapHwQueueToFirmwareQueue(u8 QueueID)
ecdfa446 1117{
f72b6a50 1118 u8 QueueSelect = 0;
ecdfa446 1119
f72b6a50
MM		 1120 switch (QueueID) {
1121 case BE_QUEUE:
1122 QueueSelect = QSLT_BE;
1123 break;
ecdfa446 1124
f72b6a50
MM		 1125 case BK_QUEUE:
1126 QueueSelect = QSLT_BK;
1127 break;
ecdfa446 1128
f72b6a50
MM		 1129 case VO_QUEUE:
1130 QueueSelect = QSLT_VO;
1131 break;
ecdfa446 1132
f72b6a50
MM		 1133 case VI_QUEUE:
1134 QueueSelect = QSLT_VI;
1135 break;
ecdfa446 1136
f72b6a50
MM		 1137 case MGNT_QUEUE:
1138 QueueSelect = QSLT_MGNT;
1139 break;
ecdfa446 1140
f72b6a50
MM		 1141 case BEACON_QUEUE:
1142 QueueSelect = QSLT_BEACON;
1143 break;
ecdfa446 1144
f72b6a50
MM		 1145 case TXCMD_QUEUE:
1146 QueueSelect = QSLT_CMD;
1147 break;
1148
1149 case HIGH_QUEUE:
1150 default:
1151 RT_TRACE(COMP_ERR, "Impossible Queue Selection: %d\n", QueueID);
1152 break;
ecdfa446
GKH		 1153 }
1154 return QueueSelect;
1155}
1156
5e1ad18a 1157static u8 MRateToHwRate8190Pci(u8 rate)
ecdfa446
GKH		 1158{
1159 u8 ret = DESC90_RATE1M;
1160
1161 switch(rate) {
1162 case MGN_1M: ret = DESC90_RATE1M; break;
1163 case MGN_2M: ret = DESC90_RATE2M; break;
1164 case MGN_5_5M: ret = DESC90_RATE5_5M; break;
1165 case MGN_11M: ret = DESC90_RATE11M; break;
1166 case MGN_6M: ret = DESC90_RATE6M; break;
1167 case MGN_9M: ret = DESC90_RATE9M; break;
1168 case MGN_12M: ret = DESC90_RATE12M; break;
1169 case MGN_18M: ret = DESC90_RATE18M; break;
1170 case MGN_24M: ret = DESC90_RATE24M; break;
1171 case MGN_36M: ret = DESC90_RATE36M; break;
1172 case MGN_48M: ret = DESC90_RATE48M; break;
1173 case MGN_54M: ret = DESC90_RATE54M; break;
1174
1175 // HT rate since here
1176 case MGN_MCS0: ret = DESC90_RATEMCS0; break;
1177 case MGN_MCS1: ret = DESC90_RATEMCS1; break;
1178 case MGN_MCS2: ret = DESC90_RATEMCS2; break;
1179 case MGN_MCS3: ret = DESC90_RATEMCS3; break;
1180 case MGN_MCS4: ret = DESC90_RATEMCS4; break;
1181 case MGN_MCS5: ret = DESC90_RATEMCS5; break;
1182 case MGN_MCS6: ret = DESC90_RATEMCS6; break;
1183 case MGN_MCS7: ret = DESC90_RATEMCS7; break;
1184 case MGN_MCS8: ret = DESC90_RATEMCS8; break;
1185 case MGN_MCS9: ret = DESC90_RATEMCS9; break;
1186 case MGN_MCS10: ret = DESC90_RATEMCS10; break;
1187 case MGN_MCS11: ret = DESC90_RATEMCS11; break;
1188 case MGN_MCS12: ret = DESC90_RATEMCS12; break;
1189 case MGN_MCS13: ret = DESC90_RATEMCS13; break;
1190 case MGN_MCS14: ret = DESC90_RATEMCS14; break;
1191 case MGN_MCS15: ret = DESC90_RATEMCS15; break;
1192 case (0x80|0x20): ret = DESC90_RATEMCS32; break;
1193
1194 default: break;
1195 }
1196 return ret;
1197}
1198
1199
5e1ad18a 1200static u8 QueryIsShort(u8 TxHT, u8 TxRate, cb_desc *tcb_desc)
ecdfa446
GKH		 1201{
1202 u8 tmp_Short;
1203
1204 tmp_Short = (TxHT==1)?((tcb_desc->bUseShortGI)?1:0):((tcb_desc->bUseShortPreamble)?1:0);
1205
1206 if(TxHT==1 && TxRate != DESC90_RATEMCS15)
1207 tmp_Short = 0;
1208
1209 return tmp_Short;
1210}
1211
1212/*
1213 * The tx procedure is just as following,
1214 * skb->cb will contain all the following information,
1215 * priority, morefrag, rate, &dev.
214985a6 1216 */
3b10c0a4 1217static short rtl8192_tx(struct net_device *dev, struct sk_buff* skb)
ecdfa446 1218{
067ba6cf
MM		 1219 struct r8192_priv *priv = ieee80211_priv(dev);
1220 struct rtl8192_tx_ring *ring;
1221 unsigned long flags;
1222 cb_desc *tcb_desc = (cb_desc *)(skb->cb + MAX_DEV_ADDR_SIZE);
1223 tx_desc_819x_pci *pdesc = NULL;
1224 TX_FWINFO_8190PCI *pTxFwInfo = NULL;
1225 dma_addr_t mapping;
1226 bool multi_addr = false, broad_addr = false, uni_addr = false;
1227 u8 *pda_addr = NULL;
1228 int idx;
1229
1230 if (priv->bdisable_nic) {
1231 RT_TRACE(COMP_ERR, "Nic is disabled! Can't tx packet len=%d qidx=%d!!!\n",
1232 skb->len, tcb_desc->queue_index);
65a43784 1233 return skb->len;
067ba6cf 1234 }
65a43784 1235
1236#ifdef ENABLE_LPS
1237 priv->ieee80211->bAwakePktSent = true;
1238#endif
1239
067ba6cf
MM		 1240 mapping = pci_map_single(priv->pdev, skb->data, skb->len, PCI_DMA_TODEVICE);
1241
1242 /* collect the tx packets statitcs */
1243 pda_addr = ((u8 *)skb->data) + sizeof(TX_FWINFO_8190PCI);
1244 if (is_multicast_ether_addr(pda_addr))
1245 multi_addr = true;
1246 else if (is_broadcast_ether_addr(pda_addr))
1247 broad_addr = true;
1248 else
1249 uni_addr = true;
1250
1251 if (uni_addr)
1252 priv->stats.txbytesunicast += (u8)(skb->len) - sizeof(TX_FWINFO_8190PCI);
067ba6cf
MM		 1253
1254 /* fill tx firmware */
1255 pTxFwInfo = (PTX_FWINFO_8190PCI)skb->data;
1256 memset(pTxFwInfo, 0, sizeof(TX_FWINFO_8190PCI));
1257 pTxFwInfo->TxHT = (tcb_desc->data_rate&0x80) ? 1 : 0;
1258 pTxFwInfo->TxRate = MRateToHwRate8190Pci((u8)tcb_desc->data_rate);
1259 pTxFwInfo->EnableCPUDur = tcb_desc->bTxEnableFwCalcDur;
1260 pTxFwInfo->Short = QueryIsShort(pTxFwInfo->TxHT, pTxFwInfo->TxRate, tcb_desc);
1261
1262 /* Aggregation related */
1263 if (tcb_desc->bAMPDUEnable) {
1264 pTxFwInfo->AllowAggregation = 1;
1265 pTxFwInfo->RxMF = tcb_desc->ampdu_factor;
1266 pTxFwInfo->RxAMD = tcb_desc->ampdu_density;
1267 } else {
1268 pTxFwInfo->AllowAggregation = 0;
1269 pTxFwInfo->RxMF = 0;
1270 pTxFwInfo->RxAMD = 0;
1271 }
ecdfa446 1272
067ba6cf
MM		 1273 /* Protection mode related */
1274 pTxFwInfo->RtsEnable = (tcb_desc->bRTSEnable) ? 1 : 0;
1275 pTxFwInfo->CtsEnable = (tcb_desc->bCTSEnable) ? 1 : 0;
1276 pTxFwInfo->RtsSTBC = (tcb_desc->bRTSSTBC) ? 1 : 0;
1277 pTxFwInfo->RtsHT = (tcb_desc->rts_rate&0x80) ? 1 : 0;
1278 pTxFwInfo->RtsRate = MRateToHwRate8190Pci((u8)tcb_desc->rts_rate);
1279 pTxFwInfo->RtsBandwidth = 0;
1280 pTxFwInfo->RtsSubcarrier = tcb_desc->RTSSC;
1281 pTxFwInfo->RtsShort = (pTxFwInfo->RtsHT == 0) ? (tcb_desc->bRTSUseShortPreamble ? 1 : 0) : (tcb_desc->bRTSUseShortGI? 1 : 0);
1282
1283 /* Set Bandwidth and sub-channel settings. */
1284 if (priv->CurrentChannelBW == HT_CHANNEL_WIDTH_20_40) {
1285 if (tcb_desc->bPacketBW) {
1286 pTxFwInfo->TxBandwidth = 1;
067ba6cf
MM		 1287 /* use duplicated mode */
1288 pTxFwInfo->TxSubCarrier = 0;
067ba6cf
MM		 1289 } else {
1290 pTxFwInfo->TxBandwidth = 0;
1291 pTxFwInfo->TxSubCarrier = priv->nCur40MhzPrimeSC;
1292 }
1293 } else {
1294 pTxFwInfo->TxBandwidth = 0;
1295 pTxFwInfo->TxSubCarrier = 0;
1296 }
ecdfa446 1297
067ba6cf
MM		 1298 spin_lock_irqsave(&priv->irq_th_lock, flags);
1299 ring = &priv->tx_ring[tcb_desc->queue_index];
1300 if (tcb_desc->queue_index != BEACON_QUEUE)
1301 idx = (ring->idx + skb_queue_len(&ring->queue)) % ring->entries;
1302 else
1303 idx = 0;
1304
1305 pdesc = &ring->desc[idx];
1306 if ((pdesc->OWN == 1) && (tcb_desc->queue_index != BEACON_QUEUE)) {
703fdcc3 1307 RT_TRACE(COMP_ERR, "No more TX desc@%d, ring->idx = %d,idx = %d,%x\n",
067ba6cf
MM		 1308 tcb_desc->queue_index, ring->idx, idx, skb->len);
1309 spin_unlock_irqrestore(&priv->irq_th_lock, flags);
1310 return skb->len;
1311 }
ecdfa446 1312
067ba6cf
MM		 1313 /* fill tx descriptor */
1314 memset(pdesc, 0, 12);
1315
1316 /*DWORD 0*/
1317 pdesc->LINIP = 0;
1318 pdesc->CmdInit = 1;
1319 pdesc->Offset = sizeof(TX_FWINFO_8190PCI) + 8; /* We must add 8!! */
1320 pdesc->PktSize = (u16)skb->len-sizeof(TX_FWINFO_8190PCI);
1321
1322 /*DWORD 1*/
1323 pdesc->SecCAMID = 0;
1324 pdesc->RATid = tcb_desc->RATRIndex;
1325
1326 pdesc->NoEnc = 1;
1327 pdesc->SecType = 0x0;
1328 if (tcb_desc->bHwSec) {
1329 switch (priv->ieee80211->pairwise_key_type) {
1330 case KEY_TYPE_WEP40:
1331 case KEY_TYPE_WEP104:
1332 pdesc->SecType = 0x1;
1333 pdesc->NoEnc = 0;
1334 break;
1335 case KEY_TYPE_TKIP:
1336 pdesc->SecType = 0x2;
1337 pdesc->NoEnc = 0;
1338 break;
1339 case KEY_TYPE_CCMP:
1340 pdesc->SecType = 0x3;
1341 pdesc->NoEnc = 0;
1342 break;
1343 case KEY_TYPE_NA:
1344 pdesc->SecType = 0x0;
1345 pdesc->NoEnc = 1;
1346 break;
1347 }
1348 }
ecdfa446 1349
067ba6cf
MM		 1350 /* Set Packet ID */
1351 pdesc->PktId = 0x0;
ecdfa446 1352
067ba6cf
MM		 1353 pdesc->QueueSelect = MapHwQueueToFirmwareQueue(tcb_desc->queue_index);
1354 pdesc->TxFWInfoSize = sizeof(TX_FWINFO_8190PCI);
ecdfa446 1355
067ba6cf
MM		 1356 pdesc->DISFB = tcb_desc->bTxDisableRateFallBack;
1357 pdesc->USERATE = tcb_desc->bTxUseDriverAssingedRate;
ecdfa446 1358
067ba6cf
MM		 1359 pdesc->FirstSeg = 1;
1360 pdesc->LastSeg = 1;
1361 pdesc->TxBufferSize = skb->len;
ecdfa446 1362
067ba6cf
MM		 1363 pdesc->TxBuffAddr = cpu_to_le32(mapping);
1364 __skb_queue_tail(&ring->queue, skb);
1365 pdesc->OWN = 1;
1366 spin_unlock_irqrestore(&priv->irq_th_lock, flags);
1367 dev->trans_start = jiffies;
3f9ab1ee 1368 write_nic_word(priv, TPPoll, 0x01<<tcb_desc->queue_index);
067ba6cf 1369 return 0;
ecdfa446
GKH		 1370}
1371
5e1ad18a 1372static short rtl8192_alloc_rx_desc_ring(struct net_device *dev)
ecdfa446
GKH		 1373{
1374 struct r8192_priv *priv = ieee80211_priv(dev);
1375 rx_desc_819x_pci *entry = NULL;
1376 int i;
1377
1378 priv->rx_ring = pci_alloc_consistent(priv->pdev,
1379 sizeof(*priv->rx_ring) * priv->rxringcount, &priv->rx_ring_dma);
1380
1381 if (!priv->rx_ring || (unsigned long)priv->rx_ring & 0xFF) {
1382 RT_TRACE(COMP_ERR,"Cannot allocate RX ring\n");
1383 return -ENOMEM;
1384 }
1385
1386 memset(priv->rx_ring, 0, sizeof(*priv->rx_ring) * priv->rxringcount);
1387 priv->rx_idx = 0;
1388
1389 for (i = 0; i < priv->rxringcount; i++) {
1390 struct sk_buff *skb = dev_alloc_skb(priv->rxbuffersize);
1391 dma_addr_t *mapping;
1392 entry = &priv->rx_ring[i];
1393 if (!skb)
1394 return 0;
1395 priv->rx_buf[i] = skb;
1396 mapping = (dma_addr_t *)skb->cb;
1c7ec2e8 1397 *mapping = pci_map_single(priv->pdev, skb_tail_pointer(skb),
ecdfa446
GKH		 1398 priv->rxbuffersize, PCI_DMA_FROMDEVICE);
1399
1400 entry->BufferAddress = cpu_to_le32(*mapping);
1401
1402 entry->Length = priv->rxbuffersize;
1403 entry->OWN = 1;
1404 }
1405
1406 entry->EOR = 1;
1407 return 0;
1408}
1409
1410static int rtl8192_alloc_tx_desc_ring(struct net_device *dev,
1411 unsigned int prio, unsigned int entries)
1412{
1413 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
1414 tx_desc_819x_pci *ring;
1415 dma_addr_t dma;
1416 int i;
1417
1418 ring = pci_alloc_consistent(priv->pdev, sizeof(*ring) * entries, &dma);
1419 if (!ring || (unsigned long)ring & 0xFF) {
1420 RT_TRACE(COMP_ERR, "Cannot allocate TX ring (prio = %d)\n", prio);
1421 return -ENOMEM;
1422 }
1423
1424 memset(ring, 0, sizeof(*ring)*entries);
1425 priv->tx_ring[prio].desc = ring;
1426 priv->tx_ring[prio].dma = dma;
1427 priv->tx_ring[prio].idx = 0;
1428 priv->tx_ring[prio].entries = entries;
1429 skb_queue_head_init(&priv->tx_ring[prio].queue);
1430
1431 for (i = 0; i < entries; i++)
1432 ring[i].NextDescAddress =
1433 cpu_to_le32((u32)dma + ((i + 1) % entries) * sizeof(*ring));
1434
1435 return 0;
1436}
1437
5e1ad18a 1438static short rtl8192_pci_initdescring(struct net_device *dev)
ecdfa446 1439{
1f1f19ff
MM		 1440 u32 ret;
1441 int i;
1442 struct r8192_priv *priv = ieee80211_priv(dev);
ecdfa446 1443
1f1f19ff
MM		 1444 ret = rtl8192_alloc_rx_desc_ring(dev);
1445 if (ret)
1446 return ret;
ecdfa446 1447
1f1f19ff
MM		 1448 /* general process for other queue */
1449 for (i = 0; i < MAX_TX_QUEUE_COUNT; i++) {
1450 ret = rtl8192_alloc_tx_desc_ring(dev, i, priv->txringcount);
1451 if (ret)
1452 goto err_free_rings;
1453 }
ecdfa446 1454
1f1f19ff 1455 return 0;
ecdfa446
GKH		 1456
1457err_free_rings:
1f1f19ff
MM		 1458 rtl8192_free_rx_ring(dev);
1459 for (i = 0; i < MAX_TX_QUEUE_COUNT; i++)
1460 if (priv->tx_ring[i].desc)
1461 rtl8192_free_tx_ring(dev, i);
1462 return 1;
ecdfa446
GKH		 1463}
1464
5e1ad18a 1465static void rtl8192_pci_resetdescring(struct net_device *dev)
ecdfa446
GKH		 1466{
1467 struct r8192_priv *priv = ieee80211_priv(dev);
1468 int i;
1469
1470 /* force the rx_idx to the first one */
1471 if(priv->rx_ring) {
1472 rx_desc_819x_pci *entry = NULL;
1473 for (i = 0; i < priv->rxringcount; i++) {
1474 entry = &priv->rx_ring[i];
1475 entry->OWN = 1;
1476 }
1477 priv->rx_idx = 0;
1478 }
1479
1480 /* after reset, release previous pending packet, and force the
1481 * tx idx to the first one */
1482 for (i = 0; i < MAX_TX_QUEUE_COUNT; i++) {
1483 if (priv->tx_ring[i].desc) {
1484 struct rtl8192_tx_ring *ring = &priv->tx_ring[i];
1485
1486 while (skb_queue_len(&ring->queue)) {
1487 tx_desc_819x_pci *entry = &ring->desc[ring->idx];
1488 struct sk_buff *skb = __skb_dequeue(&ring->queue);
1489
1490 pci_unmap_single(priv->pdev, le32_to_cpu(entry->TxBuffAddr),
1491 skb->len, PCI_DMA_TODEVICE);
1492 kfree_skb(skb);
1493 ring->idx = (ring->idx + 1) % ring->entries;
1494 }
1495 ring->idx = 0;
1496 }
1497 }
1498}
1499
5e1ad18a 1500static void rtl8192_link_change(struct net_device *dev)
ecdfa446 1501{
ecdfa446
GKH		 1502 struct r8192_priv *priv = ieee80211_priv(dev);
1503 struct ieee80211_device* ieee = priv->ieee80211;
11a861d9 1504
ecdfa446
GKH		 1505 if (ieee->state == IEEE80211_LINKED)
1506 {
1507 rtl8192_net_update(dev);
1508 rtl8192_update_ratr_table(dev);
11aacc28 1509
ecdfa446
GKH		 1510 //add this as in pure N mode, wep encryption will use software way, but there is no chance to set this as wep will not set group key in wext. WB.2008.07.08
1511 if ((KEY_TYPE_WEP40 == ieee->pairwise_key_type) || (KEY_TYPE_WEP104 == ieee->pairwise_key_type))
1512 EnableHWSecurityConfig8192(dev);
ecdfa446
GKH		 1513 }
1514 else
1515 {
3f9ab1ee 1516 write_nic_byte(priv, 0x173, 0);
ecdfa446 1517 }
11a861d9 1518
ecdfa446
GKH		 1519 rtl8192_update_msr(dev);
1520
1521 // 2007/10/16 MH MAC Will update TSF according to all received beacon, so we have
1522 // // To set CBSSID bit when link with any AP or STA.
1523 if (ieee->iw_mode == IW_MODE_INFRA || ieee->iw_mode == IW_MODE_ADHOC)
1524 {
1525 u32 reg = 0;
3f9ab1ee 1526 reg = read_nic_dword(priv, RCR);
ecdfa446
GKH		 1527 if (priv->ieee80211->state == IEEE80211_LINKED)
1528 priv->ReceiveConfig = reg |= RCR_CBSSID;
1529 else
1530 priv->ReceiveConfig = reg &= ~RCR_CBSSID;
3f9ab1ee 1531 write_nic_dword(priv, RCR, reg);
ecdfa446
GKH		 1532 }
1533}
ecdfa446
GKH		 1534
1535
5b3b1a7b 1536static const struct ieee80211_qos_parameters def_qos_parameters = {
ecdfa446
GKH		 1537 {3,3,3,3},/* cw_min */
1538 {7,7,7,7},/* cw_max */
1539 {2,2,2,2},/* aifs */
1540 {0,0,0,0},/* flags */
1541 {0,0,0,0} /* tx_op_limit */
1542};
1543
5e1ad18a 1544static void rtl8192_update_beacon(struct work_struct * work)
ecdfa446
GKH		 1545{
1546 struct r8192_priv *priv = container_of(work, struct r8192_priv, update_beacon_wq.work);
1547 struct net_device *dev = priv->ieee80211->dev;
ecdfa446
GKH		 1548 struct ieee80211_device* ieee = priv->ieee80211;
1549 struct ieee80211_network* net = &ieee->current_network;
1550
1551 if (ieee->pHTInfo->bCurrentHTSupport)
1552 HTUpdateSelfAndPeerSetting(ieee, net);
1553 ieee->pHTInfo->bCurrentRT2RTLongSlotTime = net->bssht.bdRT2RTLongSlotTime;
1554 rtl8192_update_cap(dev, net->capability);
1555}
214985a6 1556
ecdfa446
GKH		 1557/*
1558* background support to run QoS activate functionality
1559*/
881a975b 1560static const int WDCAPARA_ADD[] = {EDCAPARA_BE,EDCAPARA_BK,EDCAPARA_VI,EDCAPARA_VO};
5e1ad18a 1561static void rtl8192_qos_activate(struct work_struct * work)
ecdfa446
GKH		 1562{
1563 struct r8192_priv *priv = container_of(work, struct r8192_priv, qos_activate);
ecdfa446
GKH		 1564 struct ieee80211_qos_parameters *qos_parameters = &priv->ieee80211->current_network.qos_data.parameters;
1565 u8 mode = priv->ieee80211->current_network.mode;
ecdfa446
GKH		 1566 u8 u1bAIFS;
1567 u32 u4bAcParam;
1568 int i;
ecdfa446 1569
ecdfa446 1570 mutex_lock(&priv->mutex);
ecdfa446
GKH		 1571 if(priv->ieee80211->state != IEEE80211_LINKED)
1572 goto success;
1573 RT_TRACE(COMP_QOS,"qos active process with associate response received\n");
1574 /* It better set slot time at first */
1575 /* For we just support b/g mode at present, let the slot time at 9/20 selection */
1576 /* update the ac parameter to related registers */
1577 for(i = 0; i < QOS_QUEUE_NUM; i++) {
1578 //Mode G/A: slotTimeTimer = 9; Mode B: 20
1579 u1bAIFS = qos_parameters->aifs[i] * ((mode&(IEEE_G|IEEE_N_24G)) ?9:20) + aSifsTime;
1580 u4bAcParam = ((((u32)(qos_parameters->tx_op_limit[i]))<< AC_PARAM_TXOP_LIMIT_OFFSET)|
1581 (((u32)(qos_parameters->cw_max[i]))<< AC_PARAM_ECW_MAX_OFFSET)|
1582 (((u32)(qos_parameters->cw_min[i]))<< AC_PARAM_ECW_MIN_OFFSET)|
1583 ((u32)u1bAIFS << AC_PARAM_AIFS_OFFSET));
3f9ab1ee 1584 write_nic_dword(priv, WDCAPARA_ADD[i], u4bAcParam);
ecdfa446
GKH		 1585 }
1586
1587success:
ecdfa446 1588 mutex_unlock(&priv->mutex);
ecdfa446
GKH		 1589}
1590
1591static int rtl8192_qos_handle_probe_response(struct r8192_priv *priv,
1592 int active_network,
1593 struct ieee80211_network *network)
1594{
1595 int ret = 0;
1596 u32 size = sizeof(struct ieee80211_qos_parameters);
1597
1598 if(priv->ieee80211->state !=IEEE80211_LINKED)
1599 return ret;
1600
1601 if ((priv->ieee80211->iw_mode != IW_MODE_INFRA))
1602 return ret;
1603
1604 if (network->flags & NETWORK_HAS_QOS_MASK) {
1605 if (active_network &&
1606 (network->flags & NETWORK_HAS_QOS_PARAMETERS))
1607 network->qos_data.active = network->qos_data.supported;
1608
1609 if ((network->qos_data.active == 1) && (active_network == 1) &&
1610 (network->flags & NETWORK_HAS_QOS_PARAMETERS) &&
1611 (network->qos_data.old_param_count !=
1612 network->qos_data.param_count)) {
1613 network->qos_data.old_param_count =
1614 network->qos_data.param_count;
ecdfa446 1615 queue_work(priv->priv_wq, &priv->qos_activate);
ecdfa446
GKH		 1616 RT_TRACE (COMP_QOS, "QoS parameters change call "
1617 "qos_activate\n");
1618 }
1619 } else {
207b58fb 1620 memcpy(&priv->ieee80211->current_network.qos_data.parameters,
ecdfa446
GKH		 1621 &def_qos_parameters, size);
1622
1623 if ((network->qos_data.active == 1) && (active_network == 1)) {
ecdfa446 1624 queue_work(priv->priv_wq, &priv->qos_activate);
703fdcc3 1625 RT_TRACE(COMP_QOS, "QoS was disabled call qos_activate\n");
ecdfa446
GKH		 1626 }
1627 network->qos_data.active = 0;
1628 network->qos_data.supported = 0;
1629 }
1630
1631 return 0;
1632}
1633
1634/* handle manage frame frame beacon and probe response */
1635static int rtl8192_handle_beacon(struct net_device * dev,
1636 struct ieee80211_beacon * beacon,
1637 struct ieee80211_network * network)
1638{
1639 struct r8192_priv *priv = ieee80211_priv(dev);
1640
1641 rtl8192_qos_handle_probe_response(priv,1,network);
1642
ecdfa446 1643 queue_delayed_work(priv->priv_wq, &priv->update_beacon_wq, 0);
ecdfa446
GKH		 1644 return 0;
1645
1646}
1647
1648/*
214985a6
MM		 1649 * handling the beaconing responses. if we get different QoS setting
1650 * off the network from the associated setting, adjust the QoS setting
1651 */
ecdfa446
GKH		 1652static int rtl8192_qos_association_resp(struct r8192_priv *priv,
1653 struct ieee80211_network *network)
1654{
b72cb94f
MM		 1655 int ret = 0;
1656 unsigned long flags;
1657 u32 size = sizeof(struct ieee80211_qos_parameters);
1658 int set_qos_param = 0;
ecdfa446 1659
b72cb94f
MM		 1660 if ((priv == NULL) || (network == NULL))
1661 return ret;
ecdfa446 1662
b72cb94f
MM		 1663 if (priv->ieee80211->state != IEEE80211_LINKED)
1664 return ret;
ecdfa446 1665
b72cb94f
MM		 1666 if ((priv->ieee80211->iw_mode != IW_MODE_INFRA))
1667 return ret;
ecdfa446 1668
b72cb94f
MM		 1669 spin_lock_irqsave(&priv->ieee80211->lock, flags);
1670 if (network->flags & NETWORK_HAS_QOS_PARAMETERS) {
207b58fb
MM		 1671 memcpy(&priv->ieee80211->current_network.qos_data.parameters,
1672 &network->qos_data.parameters,
ecdfa446
GKH		 1673 sizeof(struct ieee80211_qos_parameters));
1674 priv->ieee80211->current_network.qos_data.active = 1;
b72cb94f
MM		 1675 set_qos_param = 1;
1676 /* update qos parameter for current network */
1677 priv->ieee80211->current_network.qos_data.old_param_count =
1678 priv->ieee80211->current_network.qos_data.param_count;
1679 priv->ieee80211->current_network.qos_data.param_count =
1680 network->qos_data.param_count;
1681
1682 } else {
207b58fb 1683 memcpy(&priv->ieee80211->current_network.qos_data.parameters,
ecdfa446
GKH		 1684 &def_qos_parameters, size);
1685 priv->ieee80211->current_network.qos_data.active = 0;
1686 priv->ieee80211->current_network.qos_data.supported = 0;
b72cb94f
MM		 1687 set_qos_param = 1;
1688 }
ecdfa446 1689
b72cb94f 1690 spin_unlock_irqrestore(&priv->ieee80211->lock, flags);
ecdfa446 1691
b72cb94f
MM		 1692 RT_TRACE(COMP_QOS, "%s: network->flags = %d,%d\n", __FUNCTION__,
1693 network->flags, priv->ieee80211->current_network.qos_data.active);
ecdfa446 1694 if (set_qos_param == 1)
ecdfa446 1695 queue_work(priv->priv_wq, &priv->qos_activate);
ecdfa446 1696
b72cb94f 1697 return ret;
ecdfa446
GKH		 1698}
1699
1700
1701static int rtl8192_handle_assoc_response(struct net_device *dev,
1702 struct ieee80211_assoc_response_frame *resp,
1703 struct ieee80211_network *network)
1704{
1705 struct r8192_priv *priv = ieee80211_priv(dev);
1706 rtl8192_qos_association_resp(priv, network);
1707 return 0;
1708}
1709
1710
214985a6 1711/* updateRATRTabel for MCS only. Basic rate is not implemented. */
5b3b1a7b 1712static void rtl8192_update_ratr_table(struct net_device* dev)
ecdfa446
GKH		 1713{
1714 struct r8192_priv* priv = ieee80211_priv(dev);
1715 struct ieee80211_device* ieee = priv->ieee80211;
1716 u8* pMcsRate = ieee->dot11HTOperationalRateSet;
ecdfa446
GKH		 1717 u32 ratr_value = 0;
1718 u8 rate_index = 0;
1719
1720 rtl8192_config_rate(dev, (u16*)(&ratr_value));
1721 ratr_value |= (*(u16*)(pMcsRate)) << 12;
16d74da0 1722
ecdfa446
GKH		 1723 switch (ieee->mode)
1724 {
1725 case IEEE_A:
1726 ratr_value &= 0x00000FF0;
1727 break;
1728 case IEEE_B:
1729 ratr_value &= 0x0000000F;
1730 break;
1731 case IEEE_G:
1732 ratr_value &= 0x00000FF7;
1733 break;
1734 case IEEE_N_24G:
1735 case IEEE_N_5G:
1736 if (ieee->pHTInfo->PeerMimoPs == 0) //MIMO_PS_STATIC
1737 ratr_value &= 0x0007F007;
1738 else{
1739 if (priv->rf_type == RF_1T2R)
1740 ratr_value &= 0x000FF007;
1741 else
1742 ratr_value &= 0x0F81F007;
1743 }
1744 break;
1745 default:
1746 break;
1747 }
1748 ratr_value &= 0x0FFFFFFF;
1749 if(ieee->pHTInfo->bCurTxBW40MHz && ieee->pHTInfo->bCurShortGI40MHz){
1750 ratr_value |= 0x80000000;
1751 }else if(!ieee->pHTInfo->bCurTxBW40MHz && ieee->pHTInfo->bCurShortGI20MHz){
1752 ratr_value |= 0x80000000;
1753 }
3f9ab1ee
MM		 1754 write_nic_dword(priv, RATR0+rate_index*4, ratr_value);
1755 write_nic_byte(priv, UFWP, 1);
ecdfa446
GKH		 1756}
1757
5e1ad18a 1758static bool GetNmodeSupportBySecCfg8190Pci(struct net_device*dev)
ecdfa446 1759{
65a43784 1760 struct r8192_priv *priv = ieee80211_priv(dev);
1761 struct ieee80211_device *ieee = priv->ieee80211;
ecdfa446 1762
f8acdc3d
MM		 1763 return !(ieee->rtllib_ap_sec_type &&
1764 (ieee->rtllib_ap_sec_type(ieee)&(SEC_ALG_WEP|SEC_ALG_TKIP)));
ecdfa446
GKH		 1765}
1766
5e1ad18a 1767static void rtl8192_refresh_supportrate(struct r8192_priv* priv)
ecdfa446
GKH		 1768{
1769 struct ieee80211_device* ieee = priv->ieee80211;
1770 //we donot consider set support rate for ABG mode, only HT MCS rate is set here.
1771 if (ieee->mode == WIRELESS_MODE_N_24G || ieee->mode == WIRELESS_MODE_N_5G)
1772 {
1773 memcpy(ieee->Regdot11HTOperationalRateSet, ieee->RegHTSuppRateSet, 16);
ecdfa446
GKH		 1774 }
1775 else
1776 memset(ieee->Regdot11HTOperationalRateSet, 0, 16);
ecdfa446
GKH		 1777}
1778
6f304eb2 1779static u8 rtl8192_getSupportedWireleeMode(struct net_device *dev)
ecdfa446 1780{
6f304eb2 1781 return (WIRELESS_MODE_N_24G|WIRELESS_MODE_G|WIRELESS_MODE_B);
ecdfa446 1782}
5e1ad18a
GKH		 1783
1784static void rtl8192_SetWirelessMode(struct net_device* dev, u8 wireless_mode)
ecdfa446
GKH		 1785{
1786 struct r8192_priv *priv = ieee80211_priv(dev);
1787 u8 bSupportMode = rtl8192_getSupportedWireleeMode(dev);
1788
ecdfa446
GKH		 1789 if ((wireless_mode == WIRELESS_MODE_AUTO) || ((wireless_mode&bSupportMode)==0))
1790 {
1791 if(bSupportMode & WIRELESS_MODE_N_24G)
1792 {
1793 wireless_mode = WIRELESS_MODE_N_24G;
1794 }
1795 else if(bSupportMode & WIRELESS_MODE_N_5G)
1796 {
1797 wireless_mode = WIRELESS_MODE_N_5G;
1798 }
1799 else if((bSupportMode & WIRELESS_MODE_A))
1800 {
1801 wireless_mode = WIRELESS_MODE_A;
1802 }
1803 else if((bSupportMode & WIRELESS_MODE_G))
1804 {
1805 wireless_mode = WIRELESS_MODE_G;
1806 }
1807 else if((bSupportMode & WIRELESS_MODE_B))
1808 {
1809 wireless_mode = WIRELESS_MODE_B;
1810 }
1811 else{
1812 RT_TRACE(COMP_ERR, "%s(), No valid wireless mode supported, SupportedWirelessMode(%x)!!!\n", __FUNCTION__,bSupportMode);
1813 wireless_mode = WIRELESS_MODE_B;
1814 }
1815 }
ecdfa446
GKH		 1816 priv->ieee80211->mode = wireless_mode;
1817
1818 if ((wireless_mode == WIRELESS_MODE_N_24G) || (wireless_mode == WIRELESS_MODE_N_5G))
1819 priv->ieee80211->pHTInfo->bEnableHT = 1;
1820 else
1821 priv->ieee80211->pHTInfo->bEnableHT = 0;
1822 RT_TRACE(COMP_INIT, "Current Wireless Mode is %x\n", wireless_mode);
1823 rtl8192_refresh_supportrate(priv);
ecdfa446 1824}
ecdfa446 1825
5e1ad18a 1826static bool GetHalfNmodeSupportByAPs819xPci(struct net_device* dev)
ecdfa446 1827{
ecdfa446
GKH		 1828 struct r8192_priv* priv = ieee80211_priv(dev);
1829 struct ieee80211_device* ieee = priv->ieee80211;
1830
285f660c 1831 return ieee->bHalfWirelessN24GMode;
ecdfa446
GKH		 1832}
1833
9f17b076 1834static short rtl8192_is_tx_queue_empty(struct net_device *dev)
ecdfa446
GKH		 1835{
1836 int i=0;
1837 struct r8192_priv *priv = ieee80211_priv(dev);
1838 for (i=0; i<=MGNT_QUEUE; i++)
1839 {
1840 if ((i== TXCMD_QUEUE) || (i == HCCA_QUEUE) )
1841 continue;
1842 if (skb_queue_len(&(&priv->tx_ring[i])->queue) > 0){
1843 printk("===>tx queue is not empty:%d, %d\n", i, skb_queue_len(&(&priv->tx_ring[i])->queue));
1844 return 0;
1845 }
1846 }
1847 return 1;
1848}
16d74da0 1849
5e1ad18a 1850static void rtl8192_hw_sleep_down(struct net_device *dev)
ecdfa446 1851{
65a43784 1852 struct r8192_priv *priv = ieee80211_priv(dev);
65a43784 1853
48f02106 1854 spin_lock(&priv->rf_ps_lock);
65a43784 1855 if (priv->RFChangeInProgress) {
48f02106 1856 spin_unlock(&priv->rf_ps_lock);
703fdcc3 1857 RT_TRACE(COMP_RF, "rtl8192_hw_sleep_down(): RF Change in progress!\n");
65a43784 1858 printk("rtl8192_hw_sleep_down(): RF Change in progress!\n");
1859 return;
1860 }
48f02106 1861 spin_unlock(&priv->rf_ps_lock);
65a43784 1862
ecdfa446
GKH		 1863 MgntActSet_RF_State(dev, eRfSleep, RF_CHANGE_BY_PS);
1864}
16d74da0 1865
5e1ad18a 1866static void rtl8192_hw_sleep_wq (struct work_struct *work)
ecdfa446 1867{
ecdfa446
GKH		 1868 struct delayed_work *dwork = container_of(work,struct delayed_work,work);
1869 struct ieee80211_device *ieee = container_of(dwork,struct ieee80211_device,hw_sleep_wq);
1870 struct net_device *dev = ieee->dev;
65a43784 1871
ecdfa446
GKH		 1872 rtl8192_hw_sleep_down(dev);
1873}
65a43784 1874
5e1ad18a 1875static void rtl8192_hw_wakeup(struct net_device* dev)
ecdfa446 1876{
65a43784 1877 struct r8192_priv *priv = ieee80211_priv(dev);
65a43784 1878
48f02106 1879 spin_lock(&priv->rf_ps_lock);
65a43784 1880 if (priv->RFChangeInProgress) {
48f02106 1881 spin_unlock(&priv->rf_ps_lock);
703fdcc3 1882 RT_TRACE(COMP_RF, "rtl8192_hw_wakeup(): RF Change in progress!\n");
65a43784 1883 printk("rtl8192_hw_wakeup(): RF Change in progress! schedule wake up task again\n");
1884 queue_delayed_work(priv->ieee80211->wq,&priv->ieee80211->hw_wakeup_wq,MSECS(10));//PowerSave is not supported if kernel version is below 2.6.20
1885 return;
1886 }
48f02106 1887 spin_unlock(&priv->rf_ps_lock);
ecdfa446 1888
ecdfa446 1889 MgntActSet_RF_State(dev, eRfOn, RF_CHANGE_BY_PS);
ecdfa446 1890}
65a43784 1891
9f17b076 1892static void rtl8192_hw_wakeup_wq (struct work_struct *work)
ecdfa446 1893{
ecdfa446
GKH		 1894 struct delayed_work *dwork = container_of(work,struct delayed_work,work);
1895 struct ieee80211_device *ieee = container_of(dwork,struct ieee80211_device,hw_wakeup_wq);
1896 struct net_device *dev = ieee->dev;
ecdfa446
GKH		 1897 rtl8192_hw_wakeup(dev);
1898
1899}
1900
1901#define MIN_SLEEP_TIME 50
1902#define MAX_SLEEP_TIME 10000
5e1ad18a 1903static void rtl8192_hw_to_sleep(struct net_device *dev, u32 th, u32 tl)
ecdfa446 1904{
ecdfa446 1905 struct r8192_priv *priv = ieee80211_priv(dev);
9236928f 1906 u32 tmp;
ecdfa446 1907 u32 rb = jiffies;
ecdfa446 1908
9236928f 1909 spin_lock(&priv->ps_lock);
ecdfa446 1910
65a43784 1911 // Writing HW register with 0 equals to disable
1912 // the timer, that is not really what we want
1913 //
1914 tl -= MSECS(8+16+7);
ecdfa446 1915
65a43784 1916 // If the interval in witch we are requested to sleep is too
1917 // short then give up and remain awake
1918 // when we sleep after send null frame, the timer will be too short to sleep.
1919 //
ecdfa446 1920 if(((tl>=rb)&& (tl-rb) <= MSECS(MIN_SLEEP_TIME))
65a43784 1921 ||((rb>tl)&& (rb-tl) < MSECS(MIN_SLEEP_TIME))) {
65a43784 1922 printk("too short to sleep::%x, %x, %lx\n",tl, rb, MSECS(MIN_SLEEP_TIME));
9236928f 1923 goto out_unlock;
ecdfa446
GKH		 1924 }
1925
ecdfa446 1926 if(((tl > rb) && ((tl-rb) > MSECS(MAX_SLEEP_TIME)))||
65a43784 1927 ((tl < rb) && (tl>MSECS(69)) && ((rb-tl) > MSECS(MAX_SLEEP_TIME)))||
1928 ((tl<rb)&&(tl<MSECS(69))&&((tl+0xffffffff-rb)>MSECS(MAX_SLEEP_TIME)))) {
ecdfa446 1929 printk("========>too long to sleep:%x, %x, %lx\n", tl, rb, MSECS(MAX_SLEEP_TIME));
9236928f 1930 goto out_unlock;
65a43784 1931 }
9236928f
MM		 1932
1933 tmp = (tl>rb)?(tl-rb):(rb-tl);
65a43784 1934 queue_delayed_work(priv->ieee80211->wq,
9236928f 1935 &priv->ieee80211->hw_wakeup_wq,tmp);
65a43784 1936
9236928f
MM		 1937 queue_delayed_work(priv->ieee80211->wq,
1938 (void *)&priv->ieee80211->hw_sleep_wq,0);
1939out_unlock:
1940 spin_unlock(&priv->ps_lock);
ecdfa446 1941}
214985a6 1942
ecdfa446
GKH		 1943static void rtl8192_init_priv_variable(struct net_device* dev)
1944{
1945 struct r8192_priv *priv = ieee80211_priv(dev);
1946 u8 i;
65a43784 1947 PRT_POWER_SAVE_CONTROL pPSC = (PRT_POWER_SAVE_CONTROL)(&(priv->ieee80211->PowerSaveControl));
1948
1949 // Default Halt the NIC if RF is OFF.
1950 pPSC->RegRfPsLevel |= RT_RF_OFF_LEVL_HALT_NIC;
1951 pPSC->RegRfPsLevel |= RT_RF_OFF_LEVL_CLK_REQ;
1952 pPSC->RegRfPsLevel |= RT_RF_OFF_LEVL_ASPM;
1953 pPSC->RegRfPsLevel |= RT_RF_LPS_LEVEL_ASPM;
1954 pPSC->bLeisurePs = true;
1955 pPSC->RegMaxLPSAwakeIntvl = 5;
1956 priv->bHwRadioOff = false;
1957
ecdfa446 1958 priv->being_init_adapter = false;
ecdfa446 1959 priv->txringcount = 64;//32;
ecdfa446
GKH		 1960 priv->rxbuffersize = 9100;//2048;//1024;
1961 priv->rxringcount = MAX_RX_COUNT;//64;
ecdfa446
GKH		 1962 priv->rx_skb_complete = 1;
1963 priv->chan = 1; //set to channel 1
1964 priv->RegWirelessMode = WIRELESS_MODE_AUTO;
1965 priv->RegChannelPlan = 0xf;
ecdfa446
GKH		 1966 priv->ieee80211->mode = WIRELESS_MODE_AUTO; //SET AUTO
1967 priv->ieee80211->iw_mode = IW_MODE_INFRA;
1968 priv->ieee80211->ieee_up=0;
1969 priv->retry_rts = DEFAULT_RETRY_RTS;
1970 priv->retry_data = DEFAULT_RETRY_DATA;
1971 priv->ieee80211->rts = DEFAULT_RTS_THRESHOLD;
1972 priv->ieee80211->rate = 110; //11 mbps
1973 priv->ieee80211->short_slot = 1;
1974 priv->promisc = (dev->flags & IFF_PROMISC) ? 1:0;
1975 priv->bcck_in_ch14 = false;
ecdfa446
GKH		 1976 priv->CCKPresentAttentuation = 0;
1977 priv->rfa_txpowertrackingindex = 0;
1978 priv->rfc_txpowertrackingindex = 0;
1979 priv->CckPwEnl = 6;
ecdfa446
GKH		 1980 //added by amy for silent reset
1981 priv->ResetProgress = RESET_TYPE_NORESET;
1982 priv->bForcedSilentReset = 0;
1983 priv->bDisableNormalResetCheck = false;
1984 priv->force_reset = false;
1985 //added by amy for power save
ecdfa446
GKH		 1986 priv->ieee80211->RfOffReason = 0;
1987 priv->RFChangeInProgress = false;
1988 priv->bHwRfOffAction = 0;
ecdfa446
GKH		 1989 priv->ieee80211->PowerSaveControl.bInactivePs = true;
1990 priv->ieee80211->PowerSaveControl.bIPSModeBackup = false;
ecdfa446
GKH		 1991
1992 priv->ieee80211->current_network.beacon_interval = DEFAULT_BEACONINTERVAL;
1993 priv->ieee80211->iw_mode = IW_MODE_INFRA;
1994 priv->ieee80211->softmac_features = IEEE_SOFTMAC_SCAN |
1995 IEEE_SOFTMAC_ASSOCIATE | IEEE_SOFTMAC_PROBERQ |
1996 IEEE_SOFTMAC_PROBERS | IEEE_SOFTMAC_TX_QUEUE;/* |
1997 IEEE_SOFTMAC_BEACONS;*///added by amy 080604 //| //IEEE_SOFTMAC_SINGLE_QUEUE;
1998
1999 priv->ieee80211->active_scan = 1;
2000 priv->ieee80211->modulation = IEEE80211_CCK_MODULATION | IEEE80211_OFDM_MODULATION;
2001 priv->ieee80211->host_encrypt = 1;
2002 priv->ieee80211->host_decrypt = 1;
ecdfa446
GKH		 2003 priv->ieee80211->start_send_beacons = rtl8192_start_beacon;//+by david 081107
2004 priv->ieee80211->stop_send_beacons = rtl8192_stop_beacon;//+by david 081107
2005 priv->ieee80211->softmac_hard_start_xmit = rtl8192_hard_start_xmit;
2006 priv->ieee80211->set_chan = rtl8192_set_chan;
2007 priv->ieee80211->link_change = rtl8192_link_change;
2008 priv->ieee80211->softmac_data_hard_start_xmit = rtl8192_hard_data_xmit;
2009 priv->ieee80211->data_hard_stop = rtl8192_data_hard_stop;
2010 priv->ieee80211->data_hard_resume = rtl8192_data_hard_resume;
2011 priv->ieee80211->init_wmmparam_flag = 0;
2012 priv->ieee80211->fts = DEFAULT_FRAG_THRESHOLD;
2013 priv->ieee80211->check_nic_enough_desc = check_nic_enough_desc;
2014 priv->ieee80211->tx_headroom = sizeof(TX_FWINFO_8190PCI);
2015 priv->ieee80211->qos_support = 1;
2016 priv->ieee80211->dot11PowerSaveMode = 0;
ecdfa446
GKH		 2017 priv->ieee80211->SetBWModeHandler = rtl8192_SetBWMode;
2018 priv->ieee80211->handle_assoc_response = rtl8192_handle_assoc_response;
2019 priv->ieee80211->handle_beacon = rtl8192_handle_beacon;
2020
2021 priv->ieee80211->sta_wake_up = rtl8192_hw_wakeup;
ecdfa446
GKH		 2022 priv->ieee80211->enter_sleep_state = rtl8192_hw_to_sleep;
2023 priv->ieee80211->ps_is_queue_empty = rtl8192_is_tx_queue_empty;
ecdfa446
GKH		 2024 priv->ieee80211->GetNmodeSupportBySecCfg = GetNmodeSupportBySecCfg8190Pci;
2025 priv->ieee80211->SetWirelessMode = rtl8192_SetWirelessMode;
2026 priv->ieee80211->GetHalfNmodeSupportByAPsHandler = GetHalfNmodeSupportByAPs819xPci;
2027
ecdfa446
GKH		 2028 priv->ieee80211->InitialGainHandler = InitialGain819xPci;
2029
65a43784 2030#ifdef ENABLE_IPS
2031 priv->ieee80211->ieee80211_ips_leave_wq = ieee80211_ips_leave_wq;
2032 priv->ieee80211->ieee80211_ips_leave = ieee80211_ips_leave;
2033#endif
2034#ifdef ENABLE_LPS
2035 priv->ieee80211->LeisurePSLeave = LeisurePSLeave;
16d74da0 2036#endif
65a43784 2037
2038 priv->ieee80211->SetHwRegHandler = rtl8192e_SetHwReg;
2039 priv->ieee80211->rtllib_ap_sec_type = rtl8192e_ap_sec_type;
2040
395aa640
MM		 2041 priv->ShortRetryLimit = 0x30;
2042 priv->LongRetryLimit = 0x30;
ecdfa446
GKH		 2043
2044 priv->ReceiveConfig = RCR_ADD3 |
2045 RCR_AMF | RCR_ADF | //accept management/data
2046 RCR_AICV | //accept control frame for SW AP needs PS-poll, 2005.07.07, by rcnjko.
2047 RCR_AB | RCR_AM | RCR_APM | //accept BC/MC/UC
2048 RCR_AAP | ((u32)7<<RCR_MXDMA_OFFSET) |
2049 ((u32)7 << RCR_FIFO_OFFSET) | RCR_ONLYERLPKT;
2050
5b84cc78 2051 priv->pFirmware = vzalloc(sizeof(rt_firmware));
ecdfa446
GKH		 2052
2053 /* rx related queue */
ecdfa446
GKH		 2054 skb_queue_head_init(&priv->skb_queue);
2055
2056 /* Tx related queue */
2057 for(i = 0; i < MAX_QUEUE_SIZE; i++) {
2058 skb_queue_head_init(&priv->ieee80211->skb_waitQ [i]);
2059 }
2060 for(i = 0; i < MAX_QUEUE_SIZE; i++) {
2061 skb_queue_head_init(&priv->ieee80211->skb_aggQ [i]);
2062 }
2063 priv->rf_set_chan = rtl8192_phy_SwChnl;
2064}
2065
ecdfa446
GKH		 2066static void rtl8192_init_priv_lock(struct r8192_priv* priv)
2067{
ecdfa446
GKH		 2068 spin_lock_init(&priv->irq_th_lock);
2069 spin_lock_init(&priv->rf_ps_lock);
2070 spin_lock_init(&priv->ps_lock);
ecdfa446
GKH		 2071 sema_init(&priv->wx_sem,1);
2072 sema_init(&priv->rf_sem,1);
ecdfa446 2073 mutex_init(&priv->mutex);
ecdfa446
GKH		 2074}
2075
214985a6 2076/* init tasklet and wait_queue here */
ecdfa446
GKH		 2077#define DRV_NAME "wlan0"
2078static void rtl8192_init_priv_task(struct net_device* dev)
2079{
2080 struct r8192_priv *priv = ieee80211_priv(dev);
2081
ecdfa446 2082 priv->priv_wq = create_workqueue(DRV_NAME);
ecdfa446 2083
65a43784 2084#ifdef ENABLE_IPS
80a4dead 2085 INIT_WORK(&priv->ieee80211->ips_leave_wq, IPSLeave_wq);
65a43784 2086#endif
2087
ecdfa446 2088 INIT_WORK(&priv->reset_wq, rtl8192_restart);
ecdfa446
GKH		 2089 INIT_DELAYED_WORK(&priv->watch_dog_wq, rtl819x_watchdog_wqcallback);
2090 INIT_DELAYED_WORK(&priv->txpower_tracking_wq, dm_txpower_trackingcallback);
2091 INIT_DELAYED_WORK(&priv->rfpath_check_wq, dm_rf_pathcheck_workitemcallback);
2092 INIT_DELAYED_WORK(&priv->update_beacon_wq, rtl8192_update_beacon);
ecdfa446 2093 INIT_WORK(&priv->qos_activate, rtl8192_qos_activate);
80a4dead
MM		 2094 INIT_DELAYED_WORK(&priv->ieee80211->hw_wakeup_wq, rtl8192_hw_wakeup_wq);
2095 INIT_DELAYED_WORK(&priv->ieee80211->hw_sleep_wq, rtl8192_hw_sleep_wq);
ecdfa446 2096
80a4dead
MM		 2097 tasklet_init(&priv->irq_rx_tasklet, rtl8192_irq_rx_tasklet,
2098 (unsigned long) priv);
2099 tasklet_init(&priv->irq_tx_tasklet, rtl8192_irq_tx_tasklet,
2100 (unsigned long) priv);
2101 tasklet_init(&priv->irq_prepare_beacon_tasklet, rtl8192_prepare_beacon,
2102 (unsigned long) priv);
ecdfa446
GKH		 2103}
2104
2105static void rtl8192_get_eeprom_size(struct net_device* dev)
2106{
2107 u16 curCR = 0;
2108 struct r8192_priv *priv = ieee80211_priv(dev);
2109 RT_TRACE(COMP_INIT, "===========>%s()\n", __FUNCTION__);
3f9ab1ee 2110 curCR = read_nic_dword(priv, EPROM_CMD);
ecdfa446
GKH		 2111 RT_TRACE(COMP_INIT, "read from Reg Cmd9346CR(%x):%x\n", EPROM_CMD, curCR);
2112 //whether need I consider BIT5?
2113 priv->epromtype = (curCR & EPROM_CMD_9356SEL) ? EPROM_93c56 : EPROM_93c46;
2114 RT_TRACE(COMP_INIT, "<===========%s(), epromtype:%d\n", __FUNCTION__, priv->epromtype);
2115}
2116
ecdfa446 2117/*
214985a6
MM		 2118 * Adapter->EEPROMAddressSize should be set before this function call.
2119 * EEPROM address size can be got through GetEEPROMSize8185()
2120 */
3f9ab1ee 2121static void rtl8192_read_eeprom_info(struct r8192_priv *priv)
ecdfa446 2122{
3f9ab1ee 2123 struct net_device *dev = priv->ieee80211->dev;
ecdfa446 2124 u8 tempval;
ecdfa446 2125 u8 ICVer8192, ICVer8256;
ecdfa446
GKH		 2126 u16 i,usValue, IC_Version;
2127 u16 EEPROMId;
ecdfa446
GKH		 2128 u8 bMac_Tmp_Addr[6] = {0x00, 0xe0, 0x4c, 0x00, 0x00, 0x01};
2129 RT_TRACE(COMP_INIT, "====> rtl8192_read_eeprom_info\n");
2130
2131
2132 // TODO: I don't know if we need to apply EF function to EEPROM read function
2133
2134 //2 Read EEPROM ID to make sure autoload is success
2135 EEPROMId = eprom_read(dev, 0);
2136 if( EEPROMId != RTL8190_EEPROM_ID )
2137 {
2138 RT_TRACE(COMP_ERR, "EEPROM ID is invalid:%x, %x\n", EEPROMId, RTL8190_EEPROM_ID);
2139 priv->AutoloadFailFlag=true;
2140 }
2141 else
2142 {
2143 priv->AutoloadFailFlag=false;
2144 }
2145
2146 //
2147 // Assign Chip Version ID
2148 //
2149 // Read IC Version && Channel Plan
2150 if(!priv->AutoloadFailFlag)
2151 {
2152 // VID, PID
2153 priv->eeprom_vid = eprom_read(dev, (EEPROM_VID >> 1));
2154 priv->eeprom_did = eprom_read(dev, (EEPROM_DID >> 1));
2155
2156 usValue = eprom_read(dev, (u16)(EEPROM_Customer_ID>>1)) >> 8 ;
2157 priv->eeprom_CustomerID = (u8)( usValue & 0xff);
2158 usValue = eprom_read(dev, (EEPROM_ICVersion_ChannelPlan>>1));
2159 priv->eeprom_ChannelPlan = usValue&0xff;
2160 IC_Version = ((usValue&0xff00)>>8);
2161
ecdfa446
GKH		 2162 ICVer8192 = (IC_Version&0xf); //bit0~3; 1:A cut, 2:B cut, 3:C cut...
2163 ICVer8256 = ((IC_Version&0xf0)>>4);//bit4~6, bit7 reserved for other RF chip; 1:A cut, 2:B cut, 3:C cut...
703fdcc3
MM		 2164 RT_TRACE(COMP_INIT, "ICVer8192 = 0x%x\n", ICVer8192);
2165 RT_TRACE(COMP_INIT, "ICVer8256 = 0x%x\n", ICVer8256);
ecdfa446
GKH		 2166 if(ICVer8192 == 0x2) //B-cut
2167 {
2168 if(ICVer8256 == 0x5) //E-cut
2169 priv->card_8192_version= VERSION_8190_BE;
2170 }
4803ef77 2171
ecdfa446
GKH		 2172 switch(priv->card_8192_version)
2173 {
2174 case VERSION_8190_BD:
2175 case VERSION_8190_BE:
2176 break;
2177 default:
2178 priv->card_8192_version = VERSION_8190_BD;
2179 break;
2180 }
2181 RT_TRACE(COMP_INIT, "\nIC Version = 0x%x\n", priv->card_8192_version);
2182 }
2183 else
2184 {
2185 priv->card_8192_version = VERSION_8190_BD;
2186 priv->eeprom_vid = 0;
2187 priv->eeprom_did = 0;
2188 priv->eeprom_CustomerID = 0;
2189 priv->eeprom_ChannelPlan = 0;
703fdcc3 2190 RT_TRACE(COMP_INIT, "IC Version = 0x%x\n", 0xff);
ecdfa446
GKH		 2191 }
2192
2193 RT_TRACE(COMP_INIT, "EEPROM VID = 0x%4x\n", priv->eeprom_vid);
2194 RT_TRACE(COMP_INIT, "EEPROM DID = 0x%4x\n", priv->eeprom_did);
2195 RT_TRACE(COMP_INIT,"EEPROM Customer ID: 0x%2x\n", priv->eeprom_CustomerID);
2196
2197 //2 Read Permanent MAC address
2198 if(!priv->AutoloadFailFlag)
2199 {
2200 for(i = 0; i < 6; i += 2)
2201 {
2202 usValue = eprom_read(dev, (u16) ((EEPROM_NODE_ADDRESS_BYTE_0+i)>>1));
2203 *(u16*)(&dev->dev_addr[i]) = usValue;
2204 }
2205 } else {
2206 // when auto load failed, the last address byte set to be a random one.
2207 // added by david woo.2007/11/7
2208 memcpy(dev->dev_addr, bMac_Tmp_Addr, 6);
ecdfa446
GKH		 2209 }
2210
820793c3 2211 RT_TRACE(COMP_INIT, "Permanent Address = %pM\n", dev->dev_addr);
ecdfa446
GKH		 2212
2213 //2 TX Power Check EEPROM Fail or not
2214 if(priv->card_8192_version > VERSION_8190_BD) {
2215 priv->bTXPowerDataReadFromEEPORM = true;
2216 } else {
2217 priv->bTXPowerDataReadFromEEPORM = false;
2218 }
2219
bbc9a991 2220 // 2007/11/15 MH 8190PCI Default=2T4R, 8192PCIE default=1T2R
ecdfa446
GKH		 2221 priv->rf_type = RTL819X_DEFAULT_RF_TYPE;
2222
2223 if(priv->card_8192_version > VERSION_8190_BD)
2224 {
2225 // Read RF-indication and Tx Power gain index diff of legacy to HT OFDM rate.
2226 if(!priv->AutoloadFailFlag)
2227 {
2228 tempval = (eprom_read(dev, (EEPROM_RFInd_PowerDiff>>1))) & 0xff;
2229 priv->EEPROMLegacyHTTxPowerDiff = tempval & 0xf; // bit[3:0]
2230
2231 if (tempval&0x80) //RF-indication, bit[7]
2232 priv->rf_type = RF_1T2R;
2233 else
2234 priv->rf_type = RF_2T4R;
2235 }
2236 else
2237 {
2238 priv->EEPROMLegacyHTTxPowerDiff = EEPROM_Default_LegacyHTTxPowerDiff;
2239 }
2240 RT_TRACE(COMP_INIT, "EEPROMLegacyHTTxPowerDiff = %d\n",
2241 priv->EEPROMLegacyHTTxPowerDiff);
2242
2243 // Read ThermalMeter from EEPROM
2244 if(!priv->AutoloadFailFlag)
2245 {
2246 priv->EEPROMThermalMeter = (u8)(((eprom_read(dev, (EEPROM_ThermalMeter>>1))) & 0xff00)>>8);
2247 }
2248 else
2249 {
2250 priv->EEPROMThermalMeter = EEPROM_Default_ThermalMeter;
2251 }
2252 RT_TRACE(COMP_INIT, "ThermalMeter = %d\n", priv->EEPROMThermalMeter);
2253 //vivi, for tx power track
2254 priv->TSSI_13dBm = priv->EEPROMThermalMeter *100;
2255
2256 if(priv->epromtype == EPROM_93c46)
2257 {
2258 // Read antenna tx power offset of B/C/D to A and CrystalCap from EEPROM
2259 if(!priv->AutoloadFailFlag)
2260 {
2261 usValue = eprom_read(dev, (EEPROM_TxPwDiff_CrystalCap>>1));
2262 priv->EEPROMAntPwDiff = (usValue&0x0fff);
2263 priv->EEPROMCrystalCap = (u8)((usValue&0xf000)>>12);
2264 }
2265 else
2266 {
2267 priv->EEPROMAntPwDiff = EEPROM_Default_AntTxPowerDiff;
2268 priv->EEPROMCrystalCap = EEPROM_Default_TxPwDiff_CrystalCap;
2269 }
2270 RT_TRACE(COMP_INIT, "EEPROMAntPwDiff = %d\n", priv->EEPROMAntPwDiff);
2271 RT_TRACE(COMP_INIT, "EEPROMCrystalCap = %d\n", priv->EEPROMCrystalCap);
2272
2273 //
2274 // Get per-channel Tx Power Level
2275 //
2276 for(i=0; i<14; i+=2)
2277 {
2278 if(!priv->AutoloadFailFlag)
2279 {
2280 usValue = eprom_read(dev, (u16) ((EEPROM_TxPwIndex_CCK+i)>>1) );
2281 }
2282 else
2283 {
2284 usValue = EEPROM_Default_TxPower;
2285 }
2286 *((u16*)(&priv->EEPROMTxPowerLevelCCK[i])) = usValue;
2287 RT_TRACE(COMP_INIT,"CCK Tx Power Level, Index %d = 0x%02x\n", i, priv->EEPROMTxPowerLevelCCK[i]);
2288 RT_TRACE(COMP_INIT, "CCK Tx Power Level, Index %d = 0x%02x\n", i+1, priv->EEPROMTxPowerLevelCCK[i+1]);
2289 }
2290 for(i=0; i<14; i+=2)
2291 {
2292 if(!priv->AutoloadFailFlag)
2293 {
2294 usValue = eprom_read(dev, (u16) ((EEPROM_TxPwIndex_OFDM_24G+i)>>1) );
2295 }
2296 else
2297 {
2298 usValue = EEPROM_Default_TxPower;
2299 }
2300 *((u16*)(&priv->EEPROMTxPowerLevelOFDM24G[i])) = usValue;
2301 RT_TRACE(COMP_INIT, "OFDM 2.4G Tx Power Level, Index %d = 0x%02x\n", i, priv->EEPROMTxPowerLevelOFDM24G[i]);
2302 RT_TRACE(COMP_INIT, "OFDM 2.4G Tx Power Level, Index %d = 0x%02x\n", i+1, priv->EEPROMTxPowerLevelOFDM24G[i+1]);
2303 }
2304 }
ecdfa446 2305
ecdfa446
GKH		 2306 //
2307 // Update HAL variables.
2308 //
2309 if(priv->epromtype == EPROM_93c46)
2310 {
2311 for(i=0; i<14; i++)
2312 {
2313 priv->TxPowerLevelCCK[i] = priv->EEPROMTxPowerLevelCCK[i];
2314 priv->TxPowerLevelOFDM24G[i] = priv->EEPROMTxPowerLevelOFDM24G[i];
2315 }
2316 priv->LegacyHTTxPowerDiff = priv->EEPROMLegacyHTTxPowerDiff;
2317 // Antenna B gain offset to antenna A, bit0~3
2318 priv->AntennaTxPwDiff[0] = (priv->EEPROMAntPwDiff & 0xf);
2319 // Antenna C gain offset to antenna A, bit4~7
2320 priv->AntennaTxPwDiff[1] = ((priv->EEPROMAntPwDiff & 0xf0)>>4);
2321 // Antenna D gain offset to antenna A, bit8~11
2322 priv->AntennaTxPwDiff[2] = ((priv->EEPROMAntPwDiff & 0xf00)>>8);
2323 // CrystalCap, bit12~15
2324 priv->CrystalCap = priv->EEPROMCrystalCap;
2325 // ThermalMeter, bit0~3 for RFIC1, bit4~7 for RFIC2
2326 priv->ThermalMeter[0] = (priv->EEPROMThermalMeter & 0xf);
2327 priv->ThermalMeter[1] = ((priv->EEPROMThermalMeter & 0xf0)>>4);
2328 }
2329 else if(priv->epromtype == EPROM_93c56)
2330 {
ecdfa446
GKH		 2331 for(i=0; i<3; i++) // channel 1~3 use the same Tx Power Level.
2332 {
2333 priv->TxPowerLevelCCK_A[i] = priv->EEPROMRfACCKChnl1TxPwLevel[0];
2334 priv->TxPowerLevelOFDM24G_A[i] = priv->EEPROMRfAOfdmChnlTxPwLevel[0];
2335 priv->TxPowerLevelCCK_C[i] = priv->EEPROMRfCCCKChnl1TxPwLevel[0];
2336 priv->TxPowerLevelOFDM24G_C[i] = priv->EEPROMRfCOfdmChnlTxPwLevel[0];
2337 }
2338 for(i=3; i<9; i++) // channel 4~9 use the same Tx Power Level
2339 {
2340 priv->TxPowerLevelCCK_A[i] = priv->EEPROMRfACCKChnl1TxPwLevel[1];
2341 priv->TxPowerLevelOFDM24G_A[i] = priv->EEPROMRfAOfdmChnlTxPwLevel[1];
2342 priv->TxPowerLevelCCK_C[i] = priv->EEPROMRfCCCKChnl1TxPwLevel[1];
2343 priv->TxPowerLevelOFDM24G_C[i] = priv->EEPROMRfCOfdmChnlTxPwLevel[1];
2344 }
2345 for(i=9; i<14; i++) // channel 10~14 use the same Tx Power Level
2346 {
2347 priv->TxPowerLevelCCK_A[i] = priv->EEPROMRfACCKChnl1TxPwLevel[2];
2348 priv->TxPowerLevelOFDM24G_A[i] = priv->EEPROMRfAOfdmChnlTxPwLevel[2];
2349 priv->TxPowerLevelCCK_C[i] = priv->EEPROMRfCCCKChnl1TxPwLevel[2];
2350 priv->TxPowerLevelOFDM24G_C[i] = priv->EEPROMRfCOfdmChnlTxPwLevel[2];
2351 }
2352 for(i=0; i<14; i++)
2353 RT_TRACE(COMP_INIT, "priv->TxPowerLevelCCK_A[%d] = 0x%x\n", i, priv->TxPowerLevelCCK_A[i]);
2354 for(i=0; i<14; i++)
2355 RT_TRACE(COMP_INIT,"priv->TxPowerLevelOFDM24G_A[%d] = 0x%x\n", i, priv->TxPowerLevelOFDM24G_A[i]);
2356 for(i=0; i<14; i++)
2357 RT_TRACE(COMP_INIT, "priv->TxPowerLevelCCK_C[%d] = 0x%x\n", i, priv->TxPowerLevelCCK_C[i]);
2358 for(i=0; i<14; i++)
2359 RT_TRACE(COMP_INIT, "priv->TxPowerLevelOFDM24G_C[%d] = 0x%x\n", i, priv->TxPowerLevelOFDM24G_C[i]);
2360 priv->LegacyHTTxPowerDiff = priv->EEPROMLegacyHTTxPowerDiff;
2361 priv->AntennaTxPwDiff[0] = 0;
2362 priv->AntennaTxPwDiff[1] = 0;
2363 priv->AntennaTxPwDiff[2] = 0;
2364 priv->CrystalCap = priv->EEPROMCrystalCap;
2365 // ThermalMeter, bit0~3 for RFIC1, bit4~7 for RFIC2
2366 priv->ThermalMeter[0] = (priv->EEPROMThermalMeter & 0xf);
2367 priv->ThermalMeter[1] = ((priv->EEPROMThermalMeter & 0xf0)>>4);
2368 }
2369 }
2370
2371 if(priv->rf_type == RF_1T2R)
2372 {
703fdcc3 2373 RT_TRACE(COMP_INIT, "1T2R config\n");
ecdfa446
GKH		 2374 }
2375 else if (priv->rf_type == RF_2T4R)
2376 {
703fdcc3 2377 RT_TRACE(COMP_INIT, "2T4R config\n");
ecdfa446
GKH		 2378 }
2379
2380 // 2008/01/16 MH We can only know RF type in the function. So we have to init
2381 // DIG RATR table again.
2382 init_rate_adaptive(dev);
2383
2384 //1 Make a copy for following variables and we can change them if we want
2385
ecdfa446
GKH		 2386 if(priv->RegChannelPlan == 0xf)
2387 {
2388 priv->ChannelPlan = priv->eeprom_ChannelPlan;
2389 }
2390 else
2391 {
2392 priv->ChannelPlan = priv->RegChannelPlan;
2393 }
2394
2395 //
2396 // Used PID and DID to Set CustomerID
2397 //
2398 if( priv->eeprom_vid == 0x1186 && priv->eeprom_did == 0x3304 )
2399 {
2400 priv->CustomerID = RT_CID_DLINK;
2401 }
2402
2403 switch(priv->eeprom_CustomerID)
2404 {
2405 case EEPROM_CID_DEFAULT:
2406 priv->CustomerID = RT_CID_DEFAULT;
2407 break;
2408 case EEPROM_CID_CAMEO:
2409 priv->CustomerID = RT_CID_819x_CAMEO;
2410 break;
2411 case EEPROM_CID_RUNTOP:
2412 priv->CustomerID = RT_CID_819x_RUNTOP;
2413 break;
2414 case EEPROM_CID_NetCore:
2415 priv->CustomerID = RT_CID_819x_Netcore;
2416 break;
2417 case EEPROM_CID_TOSHIBA: // Merge by Jacken, 2008/01/31
2418 priv->CustomerID = RT_CID_TOSHIBA;
2419 if(priv->eeprom_ChannelPlan&0x80)
2420 priv->ChannelPlan = priv->eeprom_ChannelPlan&0x7f;
2421 else
2422 priv->ChannelPlan = 0x0;
2423 RT_TRACE(COMP_INIT, "Toshiba ChannelPlan = 0x%x\n",
2424 priv->ChannelPlan);
2425 break;
2426 case EEPROM_CID_Nettronix:
ecdfa446
GKH		 2427 priv->CustomerID = RT_CID_Nettronix;
2428 break;
2429 case EEPROM_CID_Pronet:
2430 priv->CustomerID = RT_CID_PRONET;
2431 break;
2432 case EEPROM_CID_DLINK:
2433 priv->CustomerID = RT_CID_DLINK;
2434 break;
2435
2436 case EEPROM_CID_WHQL:
ecdfa446
GKH		 2437 break;
2438 default:
2439 // value from RegCustomerID
2440 break;
2441 }
2442
2443 //Avoid the channel plan array overflow, by Bruce, 2007-08-27.
2444 if(priv->ChannelPlan > CHANNEL_PLAN_LEN - 1)
2445 priv->ChannelPlan = 0; //FCC
2446
2447 switch(priv->CustomerID)
2448 {
2449 case RT_CID_DEFAULT:
ecdfa446 2450 priv->LedStrategy = SW_LED_MODE1;
ecdfa446
GKH		 2451 break;
2452
2453 case RT_CID_819x_CAMEO:
2454 priv->LedStrategy = SW_LED_MODE2;
2455 break;
2456
2457 case RT_CID_819x_RUNTOP:
2458 priv->LedStrategy = SW_LED_MODE3;
2459 break;
2460
2461 case RT_CID_819x_Netcore:
2462 priv->LedStrategy = SW_LED_MODE4;
2463 break;
2464
2465 case RT_CID_Nettronix:
2466 priv->LedStrategy = SW_LED_MODE5;
2467 break;
2468
2469 case RT_CID_PRONET:
2470 priv->LedStrategy = SW_LED_MODE6;
2471 break;
2472
2473 case RT_CID_TOSHIBA: //Modify by Jacken 2008/01/31
2474 // Do nothing.
2475 //break;
2476
2477 default:
ecdfa446 2478 priv->LedStrategy = SW_LED_MODE1;
ecdfa446
GKH		 2479 break;
2480 }
65a43784 2481
2482
ecdfa446 2483 if( priv->eeprom_vid == 0x1186 && priv->eeprom_did == 0x3304)
65a43784 2484 priv->ieee80211->bSupportRemoteWakeUp = true;
ecdfa446 2485 else
65a43784 2486 priv->ieee80211->bSupportRemoteWakeUp = false;
2487
2488
ecdfa446 2489 RT_TRACE(COMP_INIT, "RegChannelPlan(%d)\n", priv->RegChannelPlan);
703fdcc3
MM		 2490 RT_TRACE(COMP_INIT, "ChannelPlan = %d\n", priv->ChannelPlan);
2491 RT_TRACE(COMP_INIT, "LedStrategy = %d\n", priv->LedStrategy);
ecdfa446
GKH		 2492 RT_TRACE(COMP_TRACE, "<==== ReadAdapterInfo\n");
2493
2494 return ;
2495}
2496
2497
5e1ad18a 2498static short rtl8192_get_channel_map(struct net_device * dev)
ecdfa446
GKH		 2499{
2500 struct r8192_priv *priv = ieee80211_priv(dev);
2501#ifdef ENABLE_DOT11D
2502 if(priv->ChannelPlan> COUNTRY_CODE_GLOBAL_DOMAIN){
2503 printk("rtl8180_init:Error channel plan! Set to default.\n");
2504 priv->ChannelPlan= 0;
2505 }
2506 RT_TRACE(COMP_INIT, "Channel plan is %d\n",priv->ChannelPlan);
2507
2508 rtl819x_set_channel_map(priv->ChannelPlan, priv);
2509#else
2510 int ch,i;
2511 //Set Default Channel Plan
2512 if(!channels){
2513 DMESG("No channels, aborting");
2514 return -1;
2515 }
2516 ch=channels;
2517 priv->ChannelPlan= 0;//hikaru
2518 // set channels 1..14 allowed in given locale
2519 for (i=1; i<=14; i++) {
2520 (priv->ieee80211->channel_map)[i] = (u8)(ch & 0x01);
2521 ch >>= 1;
2522 }
2523#endif
2524 return 0;
2525}
5e1ad18a
GKH		 2526
2527static short rtl8192_init(struct net_device *dev)
ecdfa446
GKH		 2528{
2529 struct r8192_priv *priv = ieee80211_priv(dev);
2530 memset(&(priv->stats),0,sizeof(struct Stats));
2531 rtl8192_init_priv_variable(dev);
2532 rtl8192_init_priv_lock(priv);
2533 rtl8192_init_priv_task(dev);
2534 rtl8192_get_eeprom_size(dev);
3f9ab1ee 2535 rtl8192_read_eeprom_info(priv);
ecdfa446
GKH		 2536 rtl8192_get_channel_map(dev);
2537 init_hal_dm(dev);
2538 init_timer(&priv->watch_dog_timer);
2539 priv->watch_dog_timer.data = (unsigned long)dev;
2540 priv->watch_dog_timer.function = watch_dog_timer_callback;
7bb5e823 2541 if (request_irq(dev->irq, rtl8192_interrupt, IRQF_SHARED, dev->name, dev)) {
ecdfa446
GKH		 2542 printk("Error allocating IRQ %d",dev->irq);
2543 return -1;
2544 }else{
2545 priv->irq=dev->irq;
2546 printk("IRQ %d",dev->irq);
2547 }
2548 if(rtl8192_pci_initdescring(dev)!=0){
2549 printk("Endopoints initialization failed");
2550 return -1;
2551 }
2552
ecdfa446
GKH		 2553 return 0;
2554}
2555
214985a6
MM		 2556/*
2557 * Actually only set RRSR, RATR and BW_OPMODE registers
2558 * not to do all the hw config as its name says
2559 * This part need to modified according to the rate set we filtered
2560 */
5e1ad18a 2561static void rtl8192_hwconfig(struct net_device* dev)
ecdfa446
GKH		 2562{
2563 u32 regRATR = 0, regRRSR = 0;
2564 u8 regBwOpMode = 0, regTmp = 0;
2565 struct r8192_priv *priv = ieee80211_priv(dev);
2566
2567// Set RRSR, RATR, and BW_OPMODE registers
2568 //
2569 switch(priv->ieee80211->mode)
2570 {
2571 case WIRELESS_MODE_B:
2572 regBwOpMode = BW_OPMODE_20MHZ;
2573 regRATR = RATE_ALL_CCK;
2574 regRRSR = RATE_ALL_CCK;
2575 break;
2576 case WIRELESS_MODE_A:
2577 regBwOpMode = BW_OPMODE_5G |BW_OPMODE_20MHZ;
2578 regRATR = RATE_ALL_OFDM_AG;
2579 regRRSR = RATE_ALL_OFDM_AG;
2580 break;
2581 case WIRELESS_MODE_G:
2582 regBwOpMode = BW_OPMODE_20MHZ;
2583 regRATR = RATE_ALL_CCK | RATE_ALL_OFDM_AG;
2584 regRRSR = RATE_ALL_CCK | RATE_ALL_OFDM_AG;
2585 break;
2586 case WIRELESS_MODE_AUTO:
2587 case WIRELESS_MODE_N_24G:
2588 // It support CCK rate by default.
2589 // CCK rate will be filtered out only when associated AP does not support it.
2590 regBwOpMode = BW_OPMODE_20MHZ;
2591 regRATR = RATE_ALL_CCK | RATE_ALL_OFDM_AG | RATE_ALL_OFDM_1SS | RATE_ALL_OFDM_2SS;
2592 regRRSR = RATE_ALL_CCK | RATE_ALL_OFDM_AG;
2593 break;
2594 case WIRELESS_MODE_N_5G:
2595 regBwOpMode = BW_OPMODE_5G;
2596 regRATR = RATE_ALL_OFDM_AG | RATE_ALL_OFDM_1SS | RATE_ALL_OFDM_2SS;
2597 regRRSR = RATE_ALL_OFDM_AG;
2598 break;
2599 }
2600
3f9ab1ee 2601 write_nic_byte(priv, BW_OPMODE, regBwOpMode);
ecdfa446
GKH		 2602 {
2603 u32 ratr_value = 0;
2604 ratr_value = regRATR;
2605 if (priv->rf_type == RF_1T2R)
2606 {
2607 ratr_value &= ~(RATE_ALL_OFDM_2SS);
2608 }
3f9ab1ee
MM		 2609 write_nic_dword(priv, RATR0, ratr_value);
2610 write_nic_byte(priv, UFWP, 1);
ecdfa446 2611 }
3f9ab1ee 2612 regTmp = read_nic_byte(priv, 0x313);
ecdfa446 2613 regRRSR = ((regTmp) << 24) | (regRRSR & 0x00ffffff);
3f9ab1ee 2614 write_nic_dword(priv, RRSR, regRRSR);
ecdfa446
GKH		 2615
2616 //
2617 // Set Retry Limit here
2618 //
3f9ab1ee 2619 write_nic_word(priv, RETRY_LIMIT,
207b58fb 2620 priv->ShortRetryLimit << RETRY_LIMIT_SHORT_SHIFT |
ecdfa446
GKH		 2621 priv->LongRetryLimit << RETRY_LIMIT_LONG_SHIFT);
2622 // Set Contention Window here
2623
2624 // Set Tx AGC
2625
2626 // Set Tx Antenna including Feedback control
2627
2628 // Set Auto Rate fallback control
2629
2630
2631}
2632
2633
5e1ad18a 2634static RT_STATUS rtl8192_adapter_start(struct net_device *dev)
ecdfa446
GKH		 2635{
2636 struct r8192_priv *priv = ieee80211_priv(dev);
ecdfa446
GKH		 2637 u32 ulRegRead;
2638 RT_STATUS rtStatus = RT_STATUS_SUCCESS;
ecdfa446 2639 u8 tmpvalue;
ecdfa446 2640 u8 ICVersion,SwitchingRegulatorOutput;
ecdfa446 2641 bool bfirmwareok = true;
ecdfa446
GKH		 2642 u32 tmpRegA, tmpRegC, TempCCk;
2643 int i =0;
ecdfa446
GKH		 2644
2645 RT_TRACE(COMP_INIT, "====>%s()\n", __FUNCTION__);
2646 priv->being_init_adapter = true;
2647 rtl8192_pci_resetdescring(dev);
2648 // 2007/11/02 MH Before initalizing RF. We can not use FW to do RF-R/W.
2649 priv->Rf_Mode = RF_OP_By_SW_3wire;
4803ef77 2650
ecdfa446
GKH		 2651 //dPLL on
2652 if(priv->ResetProgress == RESET_TYPE_NORESET)
2653 {
3f9ab1ee 2654 write_nic_byte(priv, ANAPAR, 0x37);
ecdfa446
GKH		 2655 // Accordign to designer's explain, LBUS active will never > 10ms. We delay 10ms
2656 // Joseph increae the time to prevent firmware download fail
2657 mdelay(500);
2658 }
4803ef77 2659
ecdfa446
GKH		 2660 //PlatformSleepUs(10000);
2661 // For any kind of InitializeAdapter process, we shall use system now!!
2662 priv->pFirmware->firmware_status = FW_STATUS_0_INIT;
2663
ecdfa446
GKH		 2664 //
2665 //3 //Config CPUReset Register
2666 //3//
2667 //3 Firmware Reset Or Not
3f9ab1ee 2668 ulRegRead = read_nic_dword(priv, CPU_GEN);
ecdfa446
GKH		 2669 if(priv->pFirmware->firmware_status == FW_STATUS_0_INIT)
2670 { //called from MPInitialized. do nothing
2671 ulRegRead |= CPU_GEN_SYSTEM_RESET;
2672 }else if(priv->pFirmware->firmware_status == FW_STATUS_5_READY)
2673 ulRegRead |= CPU_GEN_FIRMWARE_RESET; // Called from MPReset
2674 else
2675 RT_TRACE(COMP_ERR, "ERROR in %s(): undefined firmware state(%d)\n", __FUNCTION__, priv->pFirmware->firmware_status);
2676
3f9ab1ee 2677 write_nic_dword(priv, CPU_GEN, ulRegRead);
ecdfa446 2678
ecdfa446
GKH		 2679 //3//
2680 //3 //Fix the issue of E-cut high temperature issue
2681 //3//
2682 // TODO: E cut only
3f9ab1ee 2683 ICVersion = read_nic_byte(priv, IC_VERRSION);
ecdfa446
GKH		 2684 if(ICVersion >= 0x4) //E-cut only
2685 {
2686 // HW SD suggest that we should not wirte this register too often, so driver
2687 // should readback this register. This register will be modified only when
2688 // power on reset
3f9ab1ee 2689 SwitchingRegulatorOutput = read_nic_byte(priv, SWREGULATOR);
ecdfa446
GKH		 2690 if(SwitchingRegulatorOutput != 0xb8)
2691 {
3f9ab1ee 2692 write_nic_byte(priv, SWREGULATOR, 0xa8);
ecdfa446 2693 mdelay(1);
3f9ab1ee 2694 write_nic_byte(priv, SWREGULATOR, 0xb8);
ecdfa446
GKH		 2695 }
2696 }
ecdfa446
GKH		 2697
2698 //3//
2699 //3// Initialize BB before MAC
2700 //3//
ecdfa446
GKH		 2701 RT_TRACE(COMP_INIT, "BB Config Start!\n");
2702 rtStatus = rtl8192_BBConfig(dev);
2703 if(rtStatus != RT_STATUS_SUCCESS)
2704 {
2705 RT_TRACE(COMP_ERR, "BB Config failed\n");
2706 return rtStatus;
2707 }
2708 RT_TRACE(COMP_INIT,"BB Config Finished!\n");
2709
ecdfa446
GKH		 2710 //3//Set Loopback mode or Normal mode
2711 //3//
2712 //2006.12.13 by emily. Note!We should not merge these two CPU_GEN register writings
2713 // because setting of System_Reset bit reset MAC to default transmission mode.
2714 //Loopback mode or not
2715 priv->LoopbackMode = RTL819X_NO_LOOPBACK;
ecdfa446
GKH		 2716 if(priv->ResetProgress == RESET_TYPE_NORESET)
2717 {
3f9ab1ee 2718 ulRegRead = read_nic_dword(priv, CPU_GEN);
ecdfa446
GKH		 2719 if(priv->LoopbackMode == RTL819X_NO_LOOPBACK)
2720 {
2721 ulRegRead = ((ulRegRead & CPU_GEN_NO_LOOPBACK_MSK) | CPU_GEN_NO_LOOPBACK_SET);
2722 }
2723 else if (priv->LoopbackMode == RTL819X_MAC_LOOPBACK )
2724 {
2725 ulRegRead |= CPU_CCK_LOOPBACK;
2726 }
2727 else
2728 {
2729 RT_TRACE(COMP_ERR,"Serious error: wrong loopback mode setting\n");
2730 }
2731
2732 //2008.06.03, for WOL
2733 //ulRegRead &= (~(CPU_GEN_GPIO_UART));
3f9ab1ee 2734 write_nic_dword(priv, CPU_GEN, ulRegRead);
ecdfa446
GKH		 2735
2736 // 2006.11.29. After reset cpu, we sholud wait for a second, otherwise, it may fail to write registers. Emily
2737 udelay(500);
2738 }
2739 //3Set Hardware(Do nothing now)
2740 rtl8192_hwconfig(dev);
2741 //2=======================================================
2742 // Common Setting for all of the FPGA platform. (part 1)
2743 //2=======================================================
2744 // If there is changes, please make sure it applies to all of the FPGA version
2745 //3 Turn on Tx/Rx
3f9ab1ee 2746 write_nic_byte(priv, CMDR, CR_RE|CR_TE);
ecdfa446
GKH		 2747
2748 //2Set Tx dma burst
3f9ab1ee 2749 write_nic_byte(priv, PCIF, ((MXDMA2_NoLimit<<MXDMA2_RX_SHIFT) |
ecdfa446 2750 (MXDMA2_NoLimit<<MXDMA2_TX_SHIFT) ));
4803ef77 2751
ecdfa446 2752 //set IDR0 here
3f9ab1ee
MM		 2753 write_nic_dword(priv, MAC0, ((u32*)dev->dev_addr)[0]);
2754 write_nic_word(priv, MAC4, ((u16*)(dev->dev_addr + 4))[0]);
ecdfa446 2755 //set RCR
3f9ab1ee 2756 write_nic_dword(priv, RCR, priv->ReceiveConfig);
ecdfa446
GKH		 2757
2758 //3 Initialize Number of Reserved Pages in Firmware Queue
3f9ab1ee 2759 write_nic_dword(priv, RQPN1, NUM_OF_PAGE_IN_FW_QUEUE_BK << RSVD_FW_QUEUE_PAGE_BK_SHIFT |
207b58fb
MM		 2760 NUM_OF_PAGE_IN_FW_QUEUE_BE << RSVD_FW_QUEUE_PAGE_BE_SHIFT |
2761 NUM_OF_PAGE_IN_FW_QUEUE_VI << RSVD_FW_QUEUE_PAGE_VI_SHIFT |
ecdfa446 2762 NUM_OF_PAGE_IN_FW_QUEUE_VO <<RSVD_FW_QUEUE_PAGE_VO_SHIFT);
3f9ab1ee
MM		 2763 write_nic_dword(priv, RQPN2, NUM_OF_PAGE_IN_FW_QUEUE_MGNT << RSVD_FW_QUEUE_PAGE_MGNT_SHIFT);
2764 write_nic_dword(priv, RQPN3, APPLIED_RESERVED_QUEUE_IN_FW|
207b58fb 2765 NUM_OF_PAGE_IN_FW_QUEUE_BCN<<RSVD_FW_QUEUE_PAGE_BCN_SHIFT|
ecdfa446 2766 NUM_OF_PAGE_IN_FW_QUEUE_PUB<<RSVD_FW_QUEUE_PAGE_PUB_SHIFT);
ecdfa446
GKH		 2767
2768 rtl8192_tx_enable(dev);
2769 rtl8192_rx_enable(dev);
2770 //3Set Response Rate Setting Register
2771 // CCK rate is supported by default.
2772 // CCK rate will be filtered out only when associated AP does not support it.
3f9ab1ee
MM		 2773 ulRegRead = (0xFFF00000 & read_nic_dword(priv, RRSR)) | RATE_ALL_OFDM_AG | RATE_ALL_CCK;
2774 write_nic_dword(priv, RRSR, ulRegRead);
2775 write_nic_dword(priv, RATR0+4*7, (RATE_ALL_OFDM_AG | RATE_ALL_CCK));
ecdfa446
GKH		 2776
2777 //2Set AckTimeout
2778 // TODO: (it value is only for FPGA version). need to be changed!!2006.12.18, by Emily
3f9ab1ee 2779 write_nic_byte(priv, ACK_TIMEOUT, 0x30);
ecdfa446 2780
ecdfa446
GKH		 2781 if(priv->ResetProgress == RESET_TYPE_NORESET)
2782 rtl8192_SetWirelessMode(dev, priv->ieee80211->mode);
2783 //-----------------------------------------------------------------------------
2784 // Set up security related. 070106, by rcnjko:
2785 // 1. Clear all H/W keys.
2786 // 2. Enable H/W encryption/decryption.
2787 //-----------------------------------------------------------------------------
2788 CamResetAllEntry(dev);
2789 {
2790 u8 SECR_value = 0x0;
2791 SECR_value |= SCR_TxEncEnable;
2792 SECR_value |= SCR_RxDecEnable;
2793 SECR_value |= SCR_NoSKMC;
3f9ab1ee 2794 write_nic_byte(priv, SECR, SECR_value);
ecdfa446
GKH		 2795 }
2796 //3Beacon related
3f9ab1ee
MM		 2797 write_nic_word(priv, ATIMWND, 2);
2798 write_nic_word(priv, BCN_INTERVAL, 100);
5e1ad18a 2799 for (i=0; i<QOS_QUEUE_NUM; i++)
3f9ab1ee 2800 write_nic_dword(priv, WDCAPARA_ADD[i], 0x005e4332);
ecdfa446
GKH		 2801 //
2802 // Switching regulator controller: This is set temporarily.
2803 // It's not sure if this can be removed in the future.
2804 // PJ advised to leave it by default.
2805 //
3f9ab1ee 2806 write_nic_byte(priv, 0xbe, 0xc0);
ecdfa446
GKH		 2807
2808 //2=======================================================
2809 // Set PHY related configuration defined in MAC register bank
2810 //2=======================================================
2811 rtl8192_phy_configmac(dev);
2812
2813 if (priv->card_8192_version > (u8) VERSION_8190_BD) {
2814 rtl8192_phy_getTxPower(dev);
2815 rtl8192_phy_setTxPower(dev, priv->chan);
2816 }
2817
2818 //if D or C cut
3f9ab1ee 2819 tmpvalue = read_nic_byte(priv, IC_VERRSION);
ecdfa446
GKH		 2820 priv->IC_Cut = tmpvalue;
2821 RT_TRACE(COMP_INIT, "priv->IC_Cut = 0x%x\n", priv->IC_Cut);
2822 if(priv->IC_Cut >= IC_VersionCut_D)
2823 {
2824 //pHalData->bDcut = TRUE;
2825 if(priv->IC_Cut == IC_VersionCut_D)
2826 RT_TRACE(COMP_INIT, "D-cut\n");
2827 if(priv->IC_Cut == IC_VersionCut_E)
2828 {
2829 RT_TRACE(COMP_INIT, "E-cut\n");
2830 // HW SD suggest that we should not wirte this register too often, so driver
2831 // should readback this register. This register will be modified only when
2832 // power on reset
2833 }
2834 }
2835 else
2836 {
2837 //pHalData->bDcut = FALSE;
2838 RT_TRACE(COMP_INIT, "Before C-cut\n");
2839 }
2840
ecdfa446
GKH		 2841 //Firmware download
2842 RT_TRACE(COMP_INIT, "Load Firmware!\n");
2843 bfirmwareok = init_firmware(dev);
2844 if(bfirmwareok != true) {
2845 rtStatus = RT_STATUS_FAILURE;
2846 return rtStatus;
2847 }
2848 RT_TRACE(COMP_INIT, "Load Firmware finished!\n");
11aacc28 2849
ecdfa446
GKH		 2850 //RF config
2851 if(priv->ResetProgress == RESET_TYPE_NORESET)
2852 {
2853 RT_TRACE(COMP_INIT, "RF Config Started!\n");
2854 rtStatus = rtl8192_phy_RFConfig(dev);
2855 if(rtStatus != RT_STATUS_SUCCESS)
2856 {
2857 RT_TRACE(COMP_ERR, "RF Config failed\n");
2858 return rtStatus;
2859 }
2860 RT_TRACE(COMP_INIT, "RF Config Finished!\n");
2861 }
2862 rtl8192_phy_updateInitGain(dev);
2863
2864 /*---- Set CCK and OFDM Block "ON"----*/
2865 rtl8192_setBBreg(dev, rFPGA0_RFMOD, bCCKEn, 0x1);
2866 rtl8192_setBBreg(dev, rFPGA0_RFMOD, bOFDMEn, 0x1);
2867
ecdfa446 2868 //Enable Led
3f9ab1ee 2869 write_nic_byte(priv, 0x87, 0x0);
ecdfa446
GKH		 2870
2871 //2=======================================================
2872 // RF Power Save
2873 //2=======================================================
2874#ifdef ENABLE_IPS
2875
2876{
0157a2b9 2877 if(priv->ieee80211->RfOffReason > RF_CHANGE_BY_PS)
ecdfa446 2878 { // H/W or S/W RF OFF before sleep.
703fdcc3 2879 RT_TRACE((COMP_INIT|COMP_RF|COMP_POWER), "%s(): Turn off RF for RfOffReason(%d)\n", __FUNCTION__,priv->ieee80211->RfOffReason);
ecdfa446
GKH		 2880 MgntActSet_RF_State(dev, eRfOff, priv->ieee80211->RfOffReason);
2881 }
2882 else if(priv->ieee80211->RfOffReason >= RF_CHANGE_BY_IPS)
2883 { // H/W or S/W RF OFF before sleep.
703fdcc3 2884 RT_TRACE((COMP_INIT|COMP_RF|COMP_POWER), "%s(): Turn off RF for RfOffReason(%d)\n", __FUNCTION__,priv->ieee80211->RfOffReason);
ecdfa446
GKH		 2885 MgntActSet_RF_State(dev, eRfOff, priv->ieee80211->RfOffReason);
2886 }
2887 else
2888 {
2889 RT_TRACE((COMP_INIT|COMP_RF|COMP_POWER), "%s(): RF-ON \n",__FUNCTION__);
2890 priv->ieee80211->eRFPowerState = eRfOn;
2891 priv->ieee80211->RfOffReason = 0;
ecdfa446
GKH		 2892 }
2893}
2894#endif
4803ef77
MM		 2895 // We can force firmware to do RF-R/W
2896 if(priv->ieee80211->FwRWRF)
2897 priv->Rf_Mode = RF_OP_By_FW;
2898 else
2899 priv->Rf_Mode = RF_OP_By_SW_3wire;
ecdfa446 2900
ecdfa446
GKH		 2901 if(priv->ResetProgress == RESET_TYPE_NORESET)
2902 {
2903 dm_initialize_txpower_tracking(dev);
2904
2905 if(priv->IC_Cut >= IC_VersionCut_D)
2906 {
2907 tmpRegA= rtl8192_QueryBBReg(dev,rOFDM0_XATxIQImbalance,bMaskDWord);
2908 tmpRegC= rtl8192_QueryBBReg(dev,rOFDM0_XCTxIQImbalance,bMaskDWord);
2909 for(i = 0; i<TxBBGainTableLength; i++)
2910 {
2911 if(tmpRegA == priv->txbbgain_table[i].txbbgain_value)
2912 {
2913 priv->rfa_txpowertrackingindex= (u8)i;
2914 priv->rfa_txpowertrackingindex_real= (u8)i;
2915 priv->rfa_txpowertracking_default = priv->rfa_txpowertrackingindex;
2916 break;
2917 }
2918 }
2919
2920 TempCCk = rtl8192_QueryBBReg(dev, rCCK0_TxFilter1, bMaskByte2);
2921
2922 for(i=0 ; i<CCKTxBBGainTableLength ; i++)
2923 {
2924 if(TempCCk == priv->cck_txbbgain_table[i].ccktxbb_valuearray[0])
2925 {
2926 priv->CCKPresentAttentuation_20Mdefault =(u8) i;
2927 break;
2928 }
2929 }
2930 priv->CCKPresentAttentuation_40Mdefault = 0;
2931 priv->CCKPresentAttentuation_difference = 0;
2932 priv->CCKPresentAttentuation = priv->CCKPresentAttentuation_20Mdefault;
2933 RT_TRACE(COMP_POWER_TRACKING, "priv->rfa_txpowertrackingindex_initial = %d\n", priv->rfa_txpowertrackingindex);
2934 RT_TRACE(COMP_POWER_TRACKING, "priv->rfa_txpowertrackingindex_real__initial = %d\n", priv->rfa_txpowertrackingindex_real);
2935 RT_TRACE(COMP_POWER_TRACKING, "priv->CCKPresentAttentuation_difference_initial = %d\n", priv->CCKPresentAttentuation_difference);
2936 RT_TRACE(COMP_POWER_TRACKING, "priv->CCKPresentAttentuation_initial = %d\n", priv->CCKPresentAttentuation);
2937 priv->btxpower_tracking = FALSE;//TEMPLY DISABLE
2938 }
2939 }
4803ef77 2940
ecdfa446
GKH		 2941 rtl8192_irq_enable(dev);
2942 priv->being_init_adapter = false;
2943 return rtStatus;
2944
2945}
2946
80a4dead 2947static void rtl8192_prepare_beacon(unsigned long arg)
ecdfa446 2948{
80a4dead 2949 struct r8192_priv *priv = (struct r8192_priv*) arg;
ecdfa446 2950 struct sk_buff *skb;
ecdfa446
GKH		 2951 cb_desc *tcb_desc;
2952
2953 skb = ieee80211_get_beacon(priv->ieee80211);
2954 tcb_desc = (cb_desc *)(skb->cb + 8);
ecdfa446
GKH		 2955 /* prepare misc info for the beacon xmit */
2956 tcb_desc->queue_index = BEACON_QUEUE;
bbc9a991 2957 /* IBSS does not support HT yet, use 1M defaultly */
ecdfa446
GKH		 2958 tcb_desc->data_rate = 2;
2959 tcb_desc->RATRIndex = 7;
2960 tcb_desc->bTxDisableRateFallBack = 1;
2961 tcb_desc->bTxUseDriverAssingedRate = 1;
2962
2963 skb_push(skb, priv->ieee80211->tx_headroom);
2964 if(skb){
2965 rtl8192_tx(priv->ieee80211->dev,skb);
2966 }
ecdfa446
GKH		 2967}
2968
ecdfa446 2969
214985a6
MM		 2970/*
2971 * configure registers for beacon tx and enables it via
ecdfa446
GKH		 2972 * rtl8192_beacon_tx_enable(). rtl8192_beacon_tx_disable() might
2973 * be used to stop beacon transmission
2974 */
559fba5e 2975static void rtl8192_start_beacon(struct net_device *dev)
ecdfa446
GKH		 2976{
2977 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
2978 struct ieee80211_network *net = &priv->ieee80211->current_network;
2979 u16 BcnTimeCfg = 0;
2980 u16 BcnCW = 6;
2981 u16 BcnIFS = 0xf;
2982
2983 DMESG("Enabling beacon TX");
ecdfa446
GKH		 2984 rtl8192_irq_disable(dev);
2985 //rtl8192_beacon_tx_enable(dev);
2986
2987 /* ATIM window */
3f9ab1ee 2988 write_nic_word(priv, ATIMWND, 2);
ecdfa446
GKH		 2989
2990 /* Beacon interval (in unit of TU) */
3f9ab1ee 2991 write_nic_word(priv, BCN_INTERVAL, net->beacon_interval);
ecdfa446
GKH		 2992
2993 /*
2994 * DrvErlyInt (in unit of TU).
2995 * (Time to send interrupt to notify driver to c
2996 * hange beacon content)
2997 * */
3f9ab1ee 2998 write_nic_word(priv, BCN_DRV_EARLY_INT, 10);
ecdfa446
GKH		 2999
3000 /*
3001 * BcnDMATIM(in unit of us).
3002 * Indicates the time before TBTT to perform beacon queue DMA
3003 * */
3f9ab1ee 3004 write_nic_word(priv, BCN_DMATIME, 256);
ecdfa446
GKH		 3005
3006 /*
3007 * Force beacon frame transmission even after receiving
3008 * beacon frame from other ad hoc STA
3009 * */
3f9ab1ee 3010 write_nic_byte(priv, BCN_ERR_THRESH, 100);
ecdfa446
GKH		 3011
3012 /* Set CW and IFS */
3013 BcnTimeCfg |= BcnCW<<BCN_TCFG_CW_SHIFT;
3014 BcnTimeCfg |= BcnIFS<<BCN_TCFG_IFS;
3f9ab1ee 3015 write_nic_word(priv, BCN_TCFG, BcnTimeCfg);
ecdfa446
GKH		 3016
3017
3018 /* enable the interrupt for ad-hoc process */
3019 rtl8192_irq_enable(dev);
3020}
ecdfa446 3021
5e1ad18a 3022static bool HalRxCheckStuck8190Pci(struct net_device *dev)
ecdfa446
GKH		 3023{
3024 struct r8192_priv *priv = ieee80211_priv(dev);
3f9ab1ee 3025 u16 RegRxCounter = read_nic_word(priv, 0x130);
ecdfa446 3026 bool bStuck = FALSE;
935ce899 3027
ecdfa446
GKH		 3028 RT_TRACE(COMP_RESET,"%s(): RegRxCounter is %d,RxCounter is %d\n",__FUNCTION__,RegRxCounter,priv->RxCounter);
3029 // If rssi is small, we should check rx for long time because of bad rx.
3030 // or maybe it will continuous silent reset every 2 seconds.
935ce899 3031 priv->rx_chk_cnt++;
ecdfa446
GKH		 3032 if(priv->undecorated_smoothed_pwdb >= (RateAdaptiveTH_High+5))
3033 {
935ce899 3034 priv->rx_chk_cnt = 0; /* high rssi, check rx stuck right now. */
ecdfa446
GKH		 3035 }
3036 else if(priv->undecorated_smoothed_pwdb < (RateAdaptiveTH_High+5) &&
3037 ((priv->CurrentChannelBW!=HT_CHANNEL_WIDTH_20&&priv->undecorated_smoothed_pwdb>=RateAdaptiveTH_Low_40M) ||
3038 (priv->CurrentChannelBW==HT_CHANNEL_WIDTH_20&&priv->undecorated_smoothed_pwdb>=RateAdaptiveTH_Low_20M)) )
3039
3040 {
935ce899 3041 if(priv->rx_chk_cnt < 2)
ecdfa446
GKH		 3042 {
3043 return bStuck;
3044 }
3045 else
3046 {
935ce899 3047 priv->rx_chk_cnt = 0;
ecdfa446
GKH		 3048 }
3049 }
3050 else if(((priv->CurrentChannelBW!=HT_CHANNEL_WIDTH_20&&priv->undecorated_smoothed_pwdb<RateAdaptiveTH_Low_40M) ||
3051 (priv->CurrentChannelBW==HT_CHANNEL_WIDTH_20&&priv->undecorated_smoothed_pwdb<RateAdaptiveTH_Low_20M)) &&
3052 priv->undecorated_smoothed_pwdb >= VeryLowRSSI)
3053 {
935ce899 3054 if(priv->rx_chk_cnt < 4)
ecdfa446 3055 {
ecdfa446
GKH		 3056 return bStuck;
3057 }
3058 else
3059 {
935ce899 3060 priv->rx_chk_cnt = 0;
ecdfa446
GKH		 3061 }
3062 }
3063 else
3064 {
935ce899 3065 if(priv->rx_chk_cnt < 8)
ecdfa446 3066 {
ecdfa446
GKH		 3067 return bStuck;
3068 }
3069 else
3070 {
935ce899 3071 priv->rx_chk_cnt = 0;
ecdfa446
GKH		 3072 }
3073 }
ecdfa446
GKH		 3074 if(priv->RxCounter==RegRxCounter)
3075 bStuck = TRUE;
3076
3077 priv->RxCounter = RegRxCounter;
3078
3079 return bStuck;
3080}
3081
5e1ad18a 3082static RESET_TYPE RxCheckStuck(struct net_device *dev)
ecdfa446
GKH		 3083{
3084
3085 if(HalRxCheckStuck8190Pci(dev))
3086 {
3087 RT_TRACE(COMP_RESET, "RxStuck Condition\n");
3088 return RESET_TYPE_SILENT;
3089 }
3090
3091 return RESET_TYPE_NORESET;
3092}
3093
5e1ad18a 3094static RESET_TYPE
ecdfa446
GKH		 3095rtl819x_ifcheck_resetornot(struct net_device *dev)
3096{
3097 struct r8192_priv *priv = ieee80211_priv(dev);
3098 RESET_TYPE TxResetType = RESET_TYPE_NORESET;
3099 RESET_TYPE RxResetType = RESET_TYPE_NORESET;
3100 RT_RF_POWER_STATE rfState;
3101
3102 rfState = priv->ieee80211->eRFPowerState;
3103
ecdfa446
GKH		 3104 if( rfState != eRfOff &&
3105 /*ADAPTER_TEST_STATUS_FLAG(Adapter, ADAPTER_STATUS_FW_DOWNLOAD_FAILURE)) &&*/
3106 (priv->ieee80211->iw_mode != IW_MODE_ADHOC))
3107 {
3108 // If driver is in the status of firmware download failure , driver skips RF initialization and RF is
3109 // in turned off state. Driver should check whether Rx stuck and do silent reset. And
3110 // if driver is in firmware download failure status, driver should initialize RF in the following
3111 // silent reset procedure Emily, 2008.01.21
3112
3113 // Driver should not check RX stuck in IBSS mode because it is required to
3114 // set Check BSSID in order to send beacon, however, if check BSSID is
3115 // set, STA cannot hear any packet a all. Emily, 2008.04.12
3116 RxResetType = RxCheckStuck(dev);
3117 }
ecdfa446
GKH		 3118
3119 RT_TRACE(COMP_RESET,"%s(): TxResetType is %d, RxResetType is %d\n",__FUNCTION__,TxResetType,RxResetType);
3120 if(TxResetType==RESET_TYPE_NORMAL || RxResetType==RESET_TYPE_NORMAL)
3121 return RESET_TYPE_NORMAL;
3122 else if(TxResetType==RESET_TYPE_SILENT || RxResetType==RESET_TYPE_SILENT)
3123 return RESET_TYPE_SILENT;
3124 else
3125 return RESET_TYPE_NORESET;
3126
3127}
3128
ecdfa446
GKH		 3129#ifdef ENABLE_IPS
3130void InactivePsWorkItemCallback(struct net_device *dev)
3131{
3132 struct r8192_priv *priv = ieee80211_priv(dev);
3133 PRT_POWER_SAVE_CONTROL pPSC = (PRT_POWER_SAVE_CONTROL)(&(priv->ieee80211->PowerSaveControl));
ecdfa446 3134
703fdcc3 3135 RT_TRACE(COMP_POWER, "InactivePsWorkItemCallback() --------->\n");
ecdfa446
GKH		 3136 //
3137 // This flag "bSwRfProcessing", indicates the status of IPS procedure, should be set if the IPS workitem
3138 // is really scheduled.
3139 // The old code, sets this flag before scheduling the IPS workitem and however, at the same time the
3140 // previous IPS workitem did not end yet, fails to schedule the current workitem. Thus, bSwRfProcessing
3141 // blocks the IPS procedure of switching RF.
3142 // By Bruce, 2007-12-25.
3143 //
3144 pPSC->bSwRfProcessing = TRUE;
3145
207b58fb 3146 RT_TRACE(COMP_RF, "InactivePsWorkItemCallback(): Set RF to %s.\n",
ecdfa446
GKH		 3147 pPSC->eInactivePowerState == eRfOff?"OFF":"ON");
3148
3149
3150 MgntActSet_RF_State(dev, pPSC->eInactivePowerState, RF_CHANGE_BY_IPS);
3151
3152 //
3153 // To solve CAM values miss in RF OFF, rewrite CAM values after RF ON. By Bruce, 2007-09-20.
3154 //
ecdfa446 3155 pPSC->bSwRfProcessing = FALSE;
703fdcc3 3156 RT_TRACE(COMP_POWER, "InactivePsWorkItemCallback() <---------\n");
ecdfa446
GKH		 3157}
3158
65a43784 3159#ifdef ENABLE_LPS
214985a6 3160/* Change current and default preamble mode. */
65a43784 3161bool MgntActSet_802_11_PowerSaveMode(struct net_device *dev, u8 rtPsMode)
3162{
3163 struct r8192_priv *priv = ieee80211_priv(dev);
65a43784 3164
3165 // Currently, we do not change power save mode on IBSS mode.
3166 if(priv->ieee80211->iw_mode == IW_MODE_ADHOC)
3167 {
3168 return false;
3169 }
3170
3171 //
3172 // <RJ_NOTE> If we make HW to fill up the PwrMgt bit for us,
3173 // some AP will not response to our mgnt frames with PwrMgt bit set,
3174 // e.g. cannot associate the AP.
3175 // So I commented out it. 2005.02.16, by rcnjko.
3176 //
3177// // Change device's power save mode.
3178// Adapter->HalFunc.SetPSModeHandler( Adapter, rtPsMode );
3179
3180 // Update power save mode configured.
3181 //RT_TRACE(COMP_LPS,"%s(): set ieee->ps = %x\n",__FUNCTION__,rtPsMode);
3182 if(!priv->ps_force) {
3183 priv->ieee80211->ps = rtPsMode;
3184 }
3185
3186 // Awake immediately
3187 if(priv->ieee80211->sta_sleep != 0 && rtPsMode == IEEE80211_PS_DISABLED)
3188 {
65a43784 3189 // Notify the AP we awke.
3190 rtl8192_hw_wakeup(dev);
3191 priv->ieee80211->sta_sleep = 0;
3192
0cfc6185 3193 spin_lock(&priv->ieee80211->mgmt_tx_lock);
65a43784 3194 printk("LPS leave: notify AP we are awaked ++++++++++ SendNullFunctionData\n");
3195 ieee80211_sta_ps_send_null_frame(priv->ieee80211, 0);
0cfc6185 3196 spin_unlock(&priv->ieee80211->mgmt_tx_lock);
65a43784 3197 }
3198
3199 return true;
3200}
3201
214985a6 3202/* Enter the leisure power save mode. */
65a43784 3203void LeisurePSEnter(struct net_device *dev)
3204{
3205 struct r8192_priv *priv = ieee80211_priv(dev);
3206 PRT_POWER_SAVE_CONTROL pPSC = (PRT_POWER_SAVE_CONTROL)(&(priv->ieee80211->PowerSaveControl));
3207
65a43784 3208 if(!((priv->ieee80211->iw_mode == IW_MODE_INFRA) &&
3209 (priv->ieee80211->state == IEEE80211_LINKED)) ||
3210 (priv->ieee80211->iw_mode == IW_MODE_ADHOC) ||
3211 (priv->ieee80211->iw_mode == IW_MODE_MASTER))
3212 return;
3213
3214 if (pPSC->bLeisurePs)
3215 {
3216 // Idle for a while if we connect to AP a while ago.
3217 if(pPSC->LpsIdleCount >= RT_CHECK_FOR_HANG_PERIOD) // 4 Sec
3218 {
3219
3220 if(priv->ieee80211->ps == IEEE80211_PS_DISABLED)
3221 {
65a43784 3222 MgntActSet_802_11_PowerSaveMode(dev, IEEE80211_PS_MBCAST|IEEE80211_PS_UNICAST);
3223
3224 }
3225 }
3226 else
3227 pPSC->LpsIdleCount++;
3228 }
3229}
3230
3231
214985a6 3232/* Leave leisure power save mode. */
65a43784 3233void LeisurePSLeave(struct net_device *dev)
3234{
3235 struct r8192_priv *priv = ieee80211_priv(dev);
3236 PRT_POWER_SAVE_CONTROL pPSC = (PRT_POWER_SAVE_CONTROL)(&(priv->ieee80211->PowerSaveControl));
3237
65a43784 3238 if (pPSC->bLeisurePs)
3239 {
3240 if(priv->ieee80211->ps != IEEE80211_PS_DISABLED)
3241 {
3242 // move to lps_wakecomplete()
65a43784 3243 MgntActSet_802_11_PowerSaveMode(dev, IEEE80211_PS_DISABLED);
3244
3245 }
3246 }
3247}
3248#endif
3249
3250
214985a6 3251/* Enter the inactive power save mode. RF will be off */
ecdfa446
GKH		 3252void
3253IPSEnter(struct net_device *dev)
3254{
3255 struct r8192_priv *priv = ieee80211_priv(dev);
3256 PRT_POWER_SAVE_CONTROL pPSC = (PRT_POWER_SAVE_CONTROL)(&(priv->ieee80211->PowerSaveControl));
3257 RT_RF_POWER_STATE rtState;
3258
3259 if (pPSC->bInactivePs)
3260 {
3261 rtState = priv->ieee80211->eRFPowerState;
3262 //
3263 // Added by Bruce, 2007-12-25.
3264 // Do not enter IPS in the following conditions:
3265 // (1) RF is already OFF or Sleep
3266 // (2) bSwRfProcessing (indicates the IPS is still under going)
3267 // (3) Connectted (only disconnected can trigger IPS)
3268 // (4) IBSS (send Beacon)
3269 // (5) AP mode (send Beacon)
3270 //
3271 if (rtState == eRfOn && !pPSC->bSwRfProcessing
3272 && (priv->ieee80211->state != IEEE80211_LINKED) )
3273 {
3274 RT_TRACE(COMP_RF,"IPSEnter(): Turn off RF.\n");
3275 pPSC->eInactivePowerState = eRfOff;
3276// queue_work(priv->priv_wq,&(pPSC->InactivePsWorkItem));
3277 InactivePsWorkItemCallback(dev);
3278 }
3279 }
3280}
3281
3282//
3283// Description:
3284// Leave the inactive power save mode, RF will be on.
3285// 2007.08.17, by shien chang.
3286//
3287void
3288IPSLeave(struct net_device *dev)
3289{
3290 struct r8192_priv *priv = ieee80211_priv(dev);
3291 PRT_POWER_SAVE_CONTROL pPSC = (PRT_POWER_SAVE_CONTROL)(&(priv->ieee80211->PowerSaveControl));
3292 RT_RF_POWER_STATE rtState;
3293
3294 if (pPSC->bInactivePs)
3295 {
3296 rtState = priv->ieee80211->eRFPowerState;
3297 if (rtState != eRfOn && !pPSC->bSwRfProcessing && priv->ieee80211->RfOffReason <= RF_CHANGE_BY_IPS)
3298 {
3299 RT_TRACE(COMP_POWER, "IPSLeave(): Turn on RF.\n");
3300 pPSC->eInactivePowerState = eRfOn;
ecdfa446
GKH		 3301 InactivePsWorkItemCallback(dev);
3302 }
3303 }
3304}
65a43784 3305
80a4dead 3306void IPSLeave_wq(struct work_struct *work)
65a43784 3307{
80a4dead 3308 struct ieee80211_device *ieee = container_of(work, struct ieee80211_device, ips_leave_wq);
65a43784 3309 struct net_device *dev = ieee->dev;
3310
3311 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
3312 down(&priv->ieee80211->ips_sem);
3313 IPSLeave(dev);
3314 up(&priv->ieee80211->ips_sem);
3315}
3316
3317void ieee80211_ips_leave_wq(struct net_device *dev)
3318{
3319 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
3320 RT_RF_POWER_STATE rtState;
3321 rtState = priv->ieee80211->eRFPowerState;
3322
3323 if(priv->ieee80211->PowerSaveControl.bInactivePs){
3324 if(rtState == eRfOff){
3325 if(priv->ieee80211->RfOffReason > RF_CHANGE_BY_IPS)
3326 {
3327 RT_TRACE(COMP_ERR, "%s(): RF is OFF.\n",__FUNCTION__);
3328 return;
3329 }
3330 else{
3331 printk("=========>%s(): IPSLeave\n",__FUNCTION__);
3332 queue_work(priv->ieee80211->wq,&priv->ieee80211->ips_leave_wq);
3333 }
3334 }
3335 }
3336}
3337//added by amy 090331 end
3338void ieee80211_ips_leave(struct net_device *dev)
3339{
3340 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
3341 down(&priv->ieee80211->ips_sem);
3342 IPSLeave(dev);
3343 up(&priv->ieee80211->ips_sem);
3344}
ecdfa446 3345#endif
ecdfa446 3346
5e1ad18a 3347static void rtl819x_update_rxcounts(
ecdfa446
GKH		 3348 struct r8192_priv *priv,
3349 u32* TotalRxBcnNum,
3350 u32* TotalRxDataNum
3351)
3352{
3353 u16 SlotIndex;
3354 u8 i;
3355
3356 *TotalRxBcnNum = 0;
3357 *TotalRxDataNum = 0;
3358
3359 SlotIndex = (priv->ieee80211->LinkDetectInfo.SlotIndex++)%(priv->ieee80211->LinkDetectInfo.SlotNum);
3360 priv->ieee80211->LinkDetectInfo.RxBcnNum[SlotIndex] = priv->ieee80211->LinkDetectInfo.NumRecvBcnInPeriod;
3361 priv->ieee80211->LinkDetectInfo.RxDataNum[SlotIndex] = priv->ieee80211->LinkDetectInfo.NumRecvDataInPeriod;
3362 for( i=0; i<priv->ieee80211->LinkDetectInfo.SlotNum; i++ ){
3363 *TotalRxBcnNum += priv->ieee80211->LinkDetectInfo.RxBcnNum[i];
3364 *TotalRxDataNum += priv->ieee80211->LinkDetectInfo.RxDataNum[i];
3365 }
3366}
3367
3368
559fba5e 3369static void rtl819x_watchdog_wqcallback(struct work_struct *work)
ecdfa446
GKH		 3370{
3371 struct delayed_work *dwork = container_of(work,struct delayed_work,work);
3372 struct r8192_priv *priv = container_of(dwork,struct r8192_priv,watch_dog_wq);
3373 struct net_device *dev = priv->ieee80211->dev;
ecdfa446
GKH		 3374 struct ieee80211_device* ieee = priv->ieee80211;
3375 RESET_TYPE ResetType = RESET_TYPE_NORESET;
ecdfa446 3376 bool bBusyTraffic = false;
65a43784 3377 bool bEnterPS = false;
3378
f500e256 3379 if ((!priv->up) || priv->bHwRadioOff)
65a43784 3380 return;
3381
ecdfa446
GKH		 3382 if(!priv->up)
3383 return;
3384 hal_dm_watchdog(dev);
3385#ifdef ENABLE_IPS
ecdfa446 3386 if(ieee->actscanning == false){
207b58fb
MM		 3387 if((ieee->iw_mode == IW_MODE_INFRA) && (ieee->state == IEEE80211_NOLINK) &&
3388 (ieee->eRFPowerState == eRfOn)&&!ieee->is_set_key &&
65a43784 3389 (!ieee->proto_stoppping) && !ieee->wx_set_enc){
ecdfa446 3390 if(ieee->PowerSaveControl.ReturnPoint == IPS_CALLBACK_NONE){
ecdfa446 3391 IPSEnter(dev);
ecdfa446
GKH		 3392 }
3393 }
3394 }
3395#endif
3396 {//to get busy traffic condition
3397 if(ieee->state == IEEE80211_LINKED)
3398 {
65a43784 3399 if( ieee->LinkDetectInfo.NumRxOkInPeriod> 100 ||
3400 ieee->LinkDetectInfo.NumTxOkInPeriod> 100 ) {
ecdfa446
GKH		 3401 bBusyTraffic = true;
3402 }
3403
65a43784 3404#ifdef ENABLE_LPS
3405 //added by amy for Leisure PS
3406 if( ((ieee->LinkDetectInfo.NumRxUnicastOkInPeriod + ieee->LinkDetectInfo.NumTxOkInPeriod) > 8 ) ||
3407 (ieee->LinkDetectInfo.NumRxUnicastOkInPeriod > 2) )
3408 {
65a43784 3409 bEnterPS= false;
3410 }
3411 else
3412 {
3413 bEnterPS= true;
3414 }
3415
65a43784 3416 // LeisurePS only work in infra mode.
3417 if(bEnterPS)
3418 {
3419 LeisurePSEnter(dev);
3420 }
3421 else
3422 {
3423 LeisurePSLeave(dev);
3424 }
3425#endif
3426
3427 }
3428 else
3429 {
3430#ifdef ENABLE_LPS
65a43784 3431 LeisurePSLeave(dev);
3432#endif
ecdfa446 3433 }
65a43784 3434
ecdfa446
GKH		 3435 ieee->LinkDetectInfo.NumRxOkInPeriod = 0;
3436 ieee->LinkDetectInfo.NumTxOkInPeriod = 0;
65a43784 3437 ieee->LinkDetectInfo.NumRxUnicastOkInPeriod = 0;
ecdfa446
GKH		 3438 ieee->LinkDetectInfo.bBusyTraffic = bBusyTraffic;
3439 }
3440
3441
3442 //added by amy for AP roaming
ecdfa446
GKH		 3443 if(ieee->state == IEEE80211_LINKED && ieee->iw_mode == IW_MODE_INFRA)
3444 {
3445 u32 TotalRxBcnNum = 0;
3446 u32 TotalRxDataNum = 0;
3447
3448 rtl819x_update_rxcounts(priv, &TotalRxBcnNum, &TotalRxDataNum);
3449 if((TotalRxBcnNum+TotalRxDataNum) == 0)
3450 {
3451 if( ieee->eRFPowerState == eRfOff)
3452 RT_TRACE(COMP_ERR,"========>%s()\n",__FUNCTION__);
3453 printk("===>%s(): AP is power off,connect another one\n",__FUNCTION__);
65a43784 3454 // Dot11d_Reset(dev);
ecdfa446
GKH		 3455 ieee->state = IEEE80211_ASSOCIATING;
3456 notify_wx_assoc_event(priv->ieee80211);
65a43784 3457 RemovePeerTS(priv->ieee80211,priv->ieee80211->current_network.bssid);
ecdfa446
GKH		 3458 ieee->is_roaming = true;
3459 ieee->is_set_key = false;
65a43784 3460 ieee->link_change(dev);
3461 queue_work(ieee->wq, &ieee->associate_procedure_wq);
ecdfa446
GKH		 3462 }
3463 }
3464 ieee->LinkDetectInfo.NumRecvBcnInPeriod=0;
3465 ieee->LinkDetectInfo.NumRecvDataInPeriod=0;
3466
ecdfa446 3467 //check if reset the driver
d5fdaa3a
MM		 3468 if (priv->watchdog_check_reset_cnt++ >= 3 && !ieee->is_roaming &&
3469 priv->watchdog_last_time != 1)
ecdfa446
GKH		 3470 {
3471 ResetType = rtl819x_ifcheck_resetornot(dev);
d5fdaa3a 3472 priv->watchdog_check_reset_cnt = 3;
ecdfa446 3473 }
ecdfa446
GKH		 3474 if(!priv->bDisableNormalResetCheck && ResetType == RESET_TYPE_NORMAL)
3475 {
3476 priv->ResetProgress = RESET_TYPE_NORMAL;
3477 RT_TRACE(COMP_RESET,"%s(): NOMAL RESET\n",__FUNCTION__);
3478 return;
3479 }
3480 /* disable silent reset temply 2008.9.11*/
11aacc28 3481
ecdfa446
GKH		 3482 if( ((priv->force_reset) || (!priv->bDisableNormalResetCheck && ResetType==RESET_TYPE_SILENT))) // This is control by OID set in Pomelo
3483 {
d5fdaa3a 3484 priv->watchdog_last_time = 1;
ecdfa446
GKH		 3485 }
3486 else
d5fdaa3a 3487 priv->watchdog_last_time = 0;
11aacc28 3488
ecdfa446
GKH		 3489 priv->force_reset = false;
3490 priv->bForcedSilentReset = false;
3491 priv->bResetInProgress = false;
3492 RT_TRACE(COMP_TRACE, " <==RtUsbCheckForHangWorkItemCallback()\n");
3493
3494}
3495
3496void watch_dog_timer_callback(unsigned long data)
3497{
3498 struct r8192_priv *priv = ieee80211_priv((struct net_device *) data);
ecdfa446 3499 queue_delayed_work(priv->priv_wq,&priv->watch_dog_wq,0);
ecdfa446
GKH		 3500 mod_timer(&priv->watch_dog_timer, jiffies + MSECS(IEEE80211_WATCH_DOG_TIME));
3501
3502}
5b3b1a7b
MM		 3503
3504static int _rtl8192_up(struct net_device *dev)
ecdfa446
GKH		 3505{
3506 struct r8192_priv *priv = ieee80211_priv(dev);
ecdfa446
GKH		 3507 RT_STATUS init_status = RT_STATUS_SUCCESS;
3508 priv->up=1;
3509 priv->ieee80211->ieee_up=1;
65a43784 3510 priv->bdisable_nic = false; //YJ,add,091111
703fdcc3 3511 RT_TRACE(COMP_INIT, "Bringing up iface\n");
ecdfa446
GKH		 3512
3513 init_status = rtl8192_adapter_start(dev);
3514 if(init_status != RT_STATUS_SUCCESS)
3515 {
3516 RT_TRACE(COMP_ERR,"ERR!!! %s(): initialization is failed!\n",__FUNCTION__);
3517 return -1;
3518 }
3519 RT_TRACE(COMP_INIT, "start adapter finished\n");
4803ef77 3520
ecdfa446
GKH		 3521 if(priv->ieee80211->eRFPowerState!=eRfOn)
3522 MgntActSet_RF_State(dev, eRfOn, priv->ieee80211->RfOffReason);
4803ef77 3523
ecdfa446
GKH		 3524 if(priv->ieee80211->state != IEEE80211_LINKED)
3525 ieee80211_softmac_start_protocol(priv->ieee80211);
3526 ieee80211_reset_queue(priv->ieee80211);
3527 watch_dog_timer_callback((unsigned long) dev);
3528 if(!netif_queue_stopped(dev))
3529 netif_start_queue(dev);
3530 else
3531 netif_wake_queue(dev);
3532
3533 return 0;
3534}
3535
3536
5e1ad18a 3537static int rtl8192_open(struct net_device *dev)
ecdfa446
GKH		 3538{
3539 struct r8192_priv *priv = ieee80211_priv(dev);
3540 int ret;
3541
3542 down(&priv->wx_sem);
3543 ret = rtl8192_up(dev);
3544 up(&priv->wx_sem);
3545 return ret;
3546
3547}
3548
3549
3550int rtl8192_up(struct net_device *dev)
3551{
3552 struct r8192_priv *priv = ieee80211_priv(dev);
3553
3554 if (priv->up == 1) return -1;
3555
3556 return _rtl8192_up(dev);
3557}
3558
3559
5e1ad18a 3560static int rtl8192_close(struct net_device *dev)
ecdfa446
GKH		 3561{
3562 struct r8192_priv *priv = ieee80211_priv(dev);
3563 int ret;
3564
3565 down(&priv->wx_sem);
3566
3567 ret = rtl8192_down(dev);
3568
3569 up(&priv->wx_sem);
3570
3571 return ret;
3572
3573}
3574
3575int rtl8192_down(struct net_device *dev)
3576{
3577 struct r8192_priv *priv = ieee80211_priv(dev);
16d74da0 3578
ecdfa446
GKH		 3579 if (priv->up == 0) return -1;
3580
65a43784 3581#ifdef ENABLE_LPS
3582 //LZM for PS-Poll AID issue. 090429
3583 if(priv->ieee80211->state == IEEE80211_LINKED)
3584 LeisurePSLeave(dev);
3585#endif
3586
ecdfa446
GKH		 3587 priv->up=0;
3588 priv->ieee80211->ieee_up = 0;
3589 RT_TRACE(COMP_DOWN, "==========>%s()\n", __FUNCTION__);
3590/* FIXME */
3591 if (!netif_queue_stopped(dev))
3592 netif_stop_queue(dev);
3593
3594 rtl8192_irq_disable(dev);
ecdfa446
GKH		 3595 rtl8192_cancel_deferred_work(priv);
3596 deinit_hal_dm(dev);
3597 del_timer_sync(&priv->watch_dog_timer);
3598
65a43784 3599 ieee80211_softmac_stop_protocol(priv->ieee80211,true);
3600
3601 rtl8192_halt_adapter(dev,false);
ecdfa446
GKH		 3602 memset(&priv->ieee80211->current_network, 0 , offsetof(struct ieee80211_network, list));
3603
3604 RT_TRACE(COMP_DOWN, "<==========%s()\n", __FUNCTION__);
3605
16d74da0 3606 return 0;
ecdfa446
GKH		 3607}
3608
3609
3610void rtl8192_commit(struct net_device *dev)
3611{
3612 struct r8192_priv *priv = ieee80211_priv(dev);
3613
3614 if (priv->up == 0) return ;
3615
3616
65a43784 3617 ieee80211_softmac_stop_protocol(priv->ieee80211,true);
ecdfa446
GKH		 3618
3619 rtl8192_irq_disable(dev);
65a43784 3620 rtl8192_halt_adapter(dev,true);
ecdfa446
GKH		 3621 _rtl8192_up(dev);
3622}
3623
5b3b1a7b 3624static void rtl8192_restart(struct work_struct *work)
ecdfa446
GKH		 3625{
3626 struct r8192_priv *priv = container_of(work, struct r8192_priv, reset_wq);
3627 struct net_device *dev = priv->ieee80211->dev;
ecdfa446
GKH		 3628
3629 down(&priv->wx_sem);
3630
3631 rtl8192_commit(dev);
3632
3633 up(&priv->wx_sem);
3634}
3635
3636static void r8192_set_multicast(struct net_device *dev)
3637{
3638 struct r8192_priv *priv = ieee80211_priv(dev);
ecdfa446 3639
109ded2b 3640 priv->promisc = (dev->flags & IFF_PROMISC) ? 1 : 0;
ecdfa446
GKH		 3641}
3642
3643
5e1ad18a 3644static int r8192_set_mac_adr(struct net_device *dev, void *mac)
ecdfa446
GKH		 3645{
3646 struct r8192_priv *priv = ieee80211_priv(dev);
3647 struct sockaddr *addr = mac;
3648
3649 down(&priv->wx_sem);
3650
3651 memcpy(dev->dev_addr, addr->sa_data, ETH_ALEN);
3652
ecdfa446 3653 schedule_work(&priv->reset_wq);
ecdfa446
GKH		 3654 up(&priv->wx_sem);
3655
3656 return 0;
3657}
3658
4573d145
MM		 3659static void r8192e_set_hw_key(struct r8192_priv *priv, struct ieee_param *ipw)
3660{
3661 struct ieee80211_device *ieee = priv->ieee80211;
3662 struct net_device *dev = priv->ieee80211->dev;
3663 u8 broadcast_addr[6] = {0xff,0xff,0xff,0xff,0xff,0xff};
3664 u32 key[4];
3665
3666 if (ipw->u.crypt.set_tx) {
3667 if (strcmp(ipw->u.crypt.alg, "CCMP") == 0)
3668 ieee->pairwise_key_type = KEY_TYPE_CCMP;
3669 else if (strcmp(ipw->u.crypt.alg, "TKIP") == 0)
3670 ieee->pairwise_key_type = KEY_TYPE_TKIP;
3671 else if (strcmp(ipw->u.crypt.alg, "WEP") == 0) {
3672 if (ipw->u.crypt.key_len == 13)
3673 ieee->pairwise_key_type = KEY_TYPE_WEP104;
3674 else if (ipw->u.crypt.key_len == 5)
3675 ieee->pairwise_key_type = KEY_TYPE_WEP40;
3676 } else
3677 ieee->pairwise_key_type = KEY_TYPE_NA;
3678
3679 if (ieee->pairwise_key_type) {
3680 memcpy(key, ipw->u.crypt.key, 16);
3681 EnableHWSecurityConfig8192(dev);
3682 /*
3683 * We fill both index entry and 4th entry for pairwise
3684 * key as in IPW interface, adhoc will only get here,
3685 * so we need index entry for its default key serching!
3686 */
3687 setKey(dev, 4, ipw->u.crypt.idx,
3688 ieee->pairwise_key_type,
3689 (u8*)ieee->ap_mac_addr, 0, key);
3690
3691 /* LEAP WEP will never set this. */
3692 if (ieee->auth_mode != 2)
3693 setKey(dev, ipw->u.crypt.idx, ipw->u.crypt.idx,
3694 ieee->pairwise_key_type,
3695 (u8*)ieee->ap_mac_addr, 0, key);
3696 }
3697 if ((ieee->pairwise_key_type == KEY_TYPE_CCMP) &&
3698 ieee->pHTInfo->bCurrentHTSupport) {
3699 write_nic_byte(priv, 0x173, 1); /* fix aes bug */
3700 }
3701 } else {
3702 memcpy(key, ipw->u.crypt.key, 16);
3703 if (strcmp(ipw->u.crypt.alg, "CCMP") == 0)
3704 ieee->group_key_type= KEY_TYPE_CCMP;
3705 else if (strcmp(ipw->u.crypt.alg, "TKIP") == 0)
3706 ieee->group_key_type = KEY_TYPE_TKIP;
3707 else if (strcmp(ipw->u.crypt.alg, "WEP") == 0) {
3708 if (ipw->u.crypt.key_len == 13)
3709 ieee->group_key_type = KEY_TYPE_WEP104;
3710 else if (ipw->u.crypt.key_len == 5)
3711 ieee->group_key_type = KEY_TYPE_WEP40;
3712 } else
3713 ieee->group_key_type = KEY_TYPE_NA;
3714
3715 if (ieee->group_key_type) {
3716 setKey(dev, ipw->u.crypt.idx, ipw->u.crypt.idx,
3717 ieee->group_key_type, broadcast_addr, 0, key);
3718 }
3719 }
3720}
3721
ecdfa446 3722/* based on ipw2200 driver */
5e1ad18a 3723static int rtl8192_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
ecdfa446
GKH		 3724{
3725 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
3726 struct iwreq *wrq = (struct iwreq *)rq;
3727 int ret=-1;
ecdfa446
GKH		 3728 struct iw_point *p = &wrq->u.data;
3729 struct ieee_param *ipw = NULL;//(struct ieee_param *)wrq->u.data.pointer;
3730
3731 down(&priv->wx_sem);
3732
3733
3734 if (p->length < sizeof(struct ieee_param) || !p->pointer){
3735 ret = -EINVAL;
3736 goto out;
3737 }
3738
32414878 3739 ipw = kmalloc(p->length, GFP_KERNEL);
ecdfa446
GKH		 3740 if (ipw == NULL){
3741 ret = -ENOMEM;
3742 goto out;
3743 }
3744 if (copy_from_user(ipw, p->pointer, p->length)) {
3745 kfree(ipw);
3746 ret = -EFAULT;
3747 goto out;
3748 }
3749
3750 switch (cmd) {
4573d145
MM		 3751 case RTL_IOCTL_WPA_SUPPLICANT:
3752 /* parse here for HW security */
3753 if (ipw->cmd == IEEE_CMD_SET_ENCRYPTION)
3754 r8192e_set_hw_key(priv, ipw);
ecdfa446
GKH		 3755 ret = ieee80211_wpa_supplicant_ioctl(priv->ieee80211, &wrq->u.data);
3756 break;
3757
4573d145 3758 default:
ecdfa446
GKH		 3759 ret = -EOPNOTSUPP;
3760 break;
3761 }
3762
3763 kfree(ipw);
3764out:
3765 up(&priv->wx_sem);
3766
3767 return ret;
3768}
3769
5e1ad18a 3770static u8 HwRateToMRate90(bool bIsHT, u8 rate)
ecdfa446
GKH		 3771{
3772 u8 ret_rate = 0x02;
3773
3774 if(!bIsHT) {
3775 switch(rate) {
3776 case DESC90_RATE1M: ret_rate = MGN_1M; break;
3777 case DESC90_RATE2M: ret_rate = MGN_2M; break;
3778 case DESC90_RATE5_5M: ret_rate = MGN_5_5M; break;
3779 case DESC90_RATE11M: ret_rate = MGN_11M; break;
3780 case DESC90_RATE6M: ret_rate = MGN_6M; break;
3781 case DESC90_RATE9M: ret_rate = MGN_9M; break;
3782 case DESC90_RATE12M: ret_rate = MGN_12M; break;
3783 case DESC90_RATE18M: ret_rate = MGN_18M; break;
3784 case DESC90_RATE24M: ret_rate = MGN_24M; break;
3785 case DESC90_RATE36M: ret_rate = MGN_36M; break;
3786 case DESC90_RATE48M: ret_rate = MGN_48M; break;
3787 case DESC90_RATE54M: ret_rate = MGN_54M; break;
3788
3789 default:
3790 RT_TRACE(COMP_RECV, "HwRateToMRate90(): Non supported Rate [%x], bIsHT = %d!!!\n", rate, bIsHT);
3791 break;
3792 }
3793
3794 } else {
3795 switch(rate) {
3796 case DESC90_RATEMCS0: ret_rate = MGN_MCS0; break;
3797 case DESC90_RATEMCS1: ret_rate = MGN_MCS1; break;
3798 case DESC90_RATEMCS2: ret_rate = MGN_MCS2; break;
3799 case DESC90_RATEMCS3: ret_rate = MGN_MCS3; break;
3800 case DESC90_RATEMCS4: ret_rate = MGN_MCS4; break;
3801 case DESC90_RATEMCS5: ret_rate = MGN_MCS5; break;
3802 case DESC90_RATEMCS6: ret_rate = MGN_MCS6; break;
3803 case DESC90_RATEMCS7: ret_rate = MGN_MCS7; break;
3804 case DESC90_RATEMCS8: ret_rate = MGN_MCS8; break;
3805 case DESC90_RATEMCS9: ret_rate = MGN_MCS9; break;
3806 case DESC90_RATEMCS10: ret_rate = MGN_MCS10; break;
3807 case DESC90_RATEMCS11: ret_rate = MGN_MCS11; break;
3808 case DESC90_RATEMCS12: ret_rate = MGN_MCS12; break;
3809 case DESC90_RATEMCS13: ret_rate = MGN_MCS13; break;
3810 case DESC90_RATEMCS14: ret_rate = MGN_MCS14; break;
3811 case DESC90_RATEMCS15: ret_rate = MGN_MCS15; break;
3812 case DESC90_RATEMCS32: ret_rate = (0x80|0x20); break;
3813
3814 default:
3815 RT_TRACE(COMP_RECV, "HwRateToMRate90(): Non supported Rate [%x], bIsHT = %d!!!\n",rate, bIsHT);
3816 break;
3817 }
3818 }
3819
3820 return ret_rate;
3821}
3822
214985a6 3823/* Record the TSF time stamp when receiving a packet */
5e1ad18a 3824static void UpdateRxPktTimeStamp8190 (struct net_device *dev, struct ieee80211_rx_stats *stats)
ecdfa446
GKH		 3825{
3826 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
3827
3828 if(stats->bIsAMPDU && !stats->bFirstMPDU) {
3829 stats->mac_time[0] = priv->LastRxDescTSFLow;
3830 stats->mac_time[1] = priv->LastRxDescTSFHigh;
3831 } else {
3832 priv->LastRxDescTSFLow = stats->mac_time[0];
3833 priv->LastRxDescTSFHigh = stats->mac_time[1];
3834 }
3835}
3836
5e1ad18a 3837static long rtl819x_translate_todbm(u8 signal_strength_index)// 0-100 index.
ecdfa446
GKH		 3838{
3839 long signal_power; // in dBm.
3840
3841 // Translate to dBm (x=0.5y-95).
3842 signal_power = (long)((signal_strength_index + 1) >> 1);
3843 signal_power -= 95;
3844
3845 return signal_power;
3846}
3847
ecdfa446
GKH		 3848/* 2008/01/22 MH We can not delcare RSSI/EVM total value of sliding window to
3849 be a local static. Otherwise, it may increase when we return from S3/S4. The
3850 value will be kept in memory or disk. We must delcare the value in adapter
3851 and it will be reinitialized when return from S3/S4. */
5e1ad18a 3852static void rtl8192_process_phyinfo(struct r8192_priv * priv, u8* buffer,struct ieee80211_rx_stats * pprevious_stats, struct ieee80211_rx_stats * pcurrent_stats)
ecdfa446
GKH		 3853{
3854 bool bcheck = false;
3855 u8 rfpath;
3856 u32 nspatial_stream, tmp_val;
ecdfa446
GKH		 3857 static u32 slide_rssi_index=0, slide_rssi_statistics=0;
3858 static u32 slide_evm_index=0, slide_evm_statistics=0;
3859 static u32 last_rssi=0, last_evm=0;
ecdfa446
GKH		 3860 //cosa add for beacon rssi smoothing
3861 static u32 slide_beacon_adc_pwdb_index=0, slide_beacon_adc_pwdb_statistics=0;
3862 static u32 last_beacon_adc_pwdb=0;
3863
3864 struct ieee80211_hdr_3addr *hdr;
3865 u16 sc ;
3866 unsigned int frag,seq;
3867 hdr = (struct ieee80211_hdr_3addr *)buffer;
3868 sc = le16_to_cpu(hdr->seq_ctl);
3869 frag = WLAN_GET_SEQ_FRAG(sc);
3870 seq = WLAN_GET_SEQ_SEQ(sc);
3871 //cosa add 04292008 to record the sequence number
3872 pcurrent_stats->Seq_Num = seq;
3873 //
3874 // Check whether we should take the previous packet into accounting
3875 //
3876 if(!pprevious_stats->bIsAMPDU)
3877 {
3878 // if previous packet is not aggregated packet
3879 bcheck = true;
ecdfa446
GKH		 3880 }
3881
3882 if(slide_rssi_statistics++ >= PHY_RSSI_SLID_WIN_MAX)
3883 {
3884 slide_rssi_statistics = PHY_RSSI_SLID_WIN_MAX;
3885 last_rssi = priv->stats.slide_signal_strength[slide_rssi_index];
3886 priv->stats.slide_rssi_total -= last_rssi;
3887 }
3888 priv->stats.slide_rssi_total += pprevious_stats->SignalStrength;
3889
3890 priv->stats.slide_signal_strength[slide_rssi_index++] = pprevious_stats->SignalStrength;
3891 if(slide_rssi_index >= PHY_RSSI_SLID_WIN_MAX)
3892 slide_rssi_index = 0;
3893
3894 // <1> Showed on UI for user, in dbm
3895 tmp_val = priv->stats.slide_rssi_total/slide_rssi_statistics;
3896 priv->stats.signal_strength = rtl819x_translate_todbm((u8)tmp_val);
3897 pcurrent_stats->rssi = priv->stats.signal_strength;
3898 //
3899 // If the previous packet does not match the criteria, neglect it
3900 //
3901 if(!pprevious_stats->bPacketMatchBSSID)
3902 {
3903 if(!pprevious_stats->bToSelfBA)
3904 return;
3905 }
3906
3907 if(!bcheck)
3908 return;
3909
ecdfa446
GKH		 3910 // <2> Showed on UI for engineering
3911 // hardware does not provide rssi information for each rf path in CCK
3912 if(!pprevious_stats->bIsCCK && pprevious_stats->bPacketToSelf)
3913 {
3914 for (rfpath = RF90_PATH_A; rfpath < RF90_PATH_C; rfpath++)
3915 {
3916 if (!rtl8192_phy_CheckIsLegalRFPath(priv->ieee80211->dev, rfpath))
3917 continue;
703fdcc3 3918 RT_TRACE(COMP_DBG, "pPreviousstats->RxMIMOSignalStrength[rfpath] = %d\n", pprevious_stats->RxMIMOSignalStrength[rfpath]);
ecdfa446
GKH		 3919 //Fixed by Jacken 2008-03-20
3920 if(priv->stats.rx_rssi_percentage[rfpath] == 0)
3921 {
3922 priv->stats.rx_rssi_percentage[rfpath] = pprevious_stats->RxMIMOSignalStrength[rfpath];
ecdfa446
GKH		 3923 }
3924 if(pprevious_stats->RxMIMOSignalStrength[rfpath] > priv->stats.rx_rssi_percentage[rfpath])
3925 {
3926 priv->stats.rx_rssi_percentage[rfpath] =
3927 ( (priv->stats.rx_rssi_percentage[rfpath]*(Rx_Smooth_Factor-1)) +
3928 (pprevious_stats->RxMIMOSignalStrength[rfpath])) /(Rx_Smooth_Factor);
3929 priv->stats.rx_rssi_percentage[rfpath] = priv->stats.rx_rssi_percentage[rfpath] + 1;
3930 }
3931 else
3932 {
3933 priv->stats.rx_rssi_percentage[rfpath] =
3934 ( (priv->stats.rx_rssi_percentage[rfpath]*(Rx_Smooth_Factor-1)) +
3935 (pprevious_stats->RxMIMOSignalStrength[rfpath])) /(Rx_Smooth_Factor);
3936 }
703fdcc3 3937 RT_TRACE(COMP_DBG, "priv->RxStats.RxRSSIPercentage[rfPath] = %d \n" , priv->stats.rx_rssi_percentage[rfpath]);
ecdfa446
GKH		 3938 }
3939 }
3940
3941
3942 //
3943 // Check PWDB.
3944 //
3945 //cosa add for beacon rssi smoothing by average.
3946 if(pprevious_stats->bPacketBeacon)
3947 {
3948 /* record the beacon pwdb to the sliding window. */
3949 if(slide_beacon_adc_pwdb_statistics++ >= PHY_Beacon_RSSI_SLID_WIN_MAX)
3950 {
3951 slide_beacon_adc_pwdb_statistics = PHY_Beacon_RSSI_SLID_WIN_MAX;
3952 last_beacon_adc_pwdb = priv->stats.Slide_Beacon_pwdb[slide_beacon_adc_pwdb_index];
3953 priv->stats.Slide_Beacon_Total -= last_beacon_adc_pwdb;
ecdfa446
GKH		 3954 // slide_beacon_adc_pwdb_index, last_beacon_adc_pwdb, Adapter->RxStats.Slide_Beacon_Total);
3955 }
3956 priv->stats.Slide_Beacon_Total += pprevious_stats->RxPWDBAll;
3957 priv->stats.Slide_Beacon_pwdb[slide_beacon_adc_pwdb_index] = pprevious_stats->RxPWDBAll;
ecdfa446
GKH		 3958 slide_beacon_adc_pwdb_index++;
3959 if(slide_beacon_adc_pwdb_index >= PHY_Beacon_RSSI_SLID_WIN_MAX)
3960 slide_beacon_adc_pwdb_index = 0;
3961 pprevious_stats->RxPWDBAll = priv->stats.Slide_Beacon_Total/slide_beacon_adc_pwdb_statistics;
3962 if(pprevious_stats->RxPWDBAll >= 3)
3963 pprevious_stats->RxPWDBAll -= 3;
3964 }
3965
3966 RT_TRACE(COMP_RXDESC, "Smooth %s PWDB = %d\n",
3967 pprevious_stats->bIsCCK? "CCK": "OFDM",
3968 pprevious_stats->RxPWDBAll);
3969
3970 if(pprevious_stats->bPacketToSelf || pprevious_stats->bPacketBeacon || pprevious_stats->bToSelfBA)
3971 {
3972 if(priv->undecorated_smoothed_pwdb < 0) // initialize
3973 {
3974 priv->undecorated_smoothed_pwdb = pprevious_stats->RxPWDBAll;
ecdfa446 3975 }
11aacc28 3976
ecdfa446
GKH		 3977 if(pprevious_stats->RxPWDBAll > (u32)priv->undecorated_smoothed_pwdb)
3978 {
3979 priv->undecorated_smoothed_pwdb =
3980 ( ((priv->undecorated_smoothed_pwdb)*(Rx_Smooth_Factor-1)) +
3981 (pprevious_stats->RxPWDBAll)) /(Rx_Smooth_Factor);
3982 priv->undecorated_smoothed_pwdb = priv->undecorated_smoothed_pwdb + 1;
3983 }
3984 else
3985 {
3986 priv->undecorated_smoothed_pwdb =
3987 ( ((priv->undecorated_smoothed_pwdb)*(Rx_Smooth_Factor-1)) +
3988 (pprevious_stats->RxPWDBAll)) /(Rx_Smooth_Factor);
3989 }
ecdfa446
GKH		 3990 }
3991
3992 //
3993 // Check EVM
3994 //
3995 /* record the general EVM to the sliding window. */
3996 if(pprevious_stats->SignalQuality == 0)
3997 {
3998 }
3999 else
4000 {
4001 if(pprevious_stats->bPacketToSelf || pprevious_stats->bPacketBeacon || pprevious_stats->bToSelfBA){
4002 if(slide_evm_statistics++ >= PHY_RSSI_SLID_WIN_MAX){
4003 slide_evm_statistics = PHY_RSSI_SLID_WIN_MAX;
4004 last_evm = priv->stats.slide_evm[slide_evm_index];
4005 priv->stats.slide_evm_total -= last_evm;
4006 }
4007
4008 priv->stats.slide_evm_total += pprevious_stats->SignalQuality;
4009
4010 priv->stats.slide_evm[slide_evm_index++] = pprevious_stats->SignalQuality;
4011 if(slide_evm_index >= PHY_RSSI_SLID_WIN_MAX)
4012 slide_evm_index = 0;
4013
4014 // <1> Showed on UI for user, in percentage.
4015 tmp_val = priv->stats.slide_evm_total/slide_evm_statistics;
ecdfa446 4016 //cosa add 10/11/2007, Showed on UI for user in Windows Vista, for Link quality.
ecdfa446
GKH		 4017 }
4018
4019 // <2> Showed on UI for engineering
4020 if(pprevious_stats->bPacketToSelf || pprevious_stats->bPacketBeacon || pprevious_stats->bToSelfBA)
4021 {
4022 for(nspatial_stream = 0; nspatial_stream<2 ; nspatial_stream++) // 2 spatial stream
4023 {
4024 if(pprevious_stats->RxMIMOSignalQuality[nspatial_stream] != -1)
4025 {
4026 if(priv->stats.rx_evm_percentage[nspatial_stream] == 0) // initialize
4027 {
4028 priv->stats.rx_evm_percentage[nspatial_stream] = pprevious_stats->RxMIMOSignalQuality[nspatial_stream];
4029 }
4030 priv->stats.rx_evm_percentage[nspatial_stream] =
4031 ( (priv->stats.rx_evm_percentage[nspatial_stream]* (Rx_Smooth_Factor-1)) +
4032 (pprevious_stats->RxMIMOSignalQuality[nspatial_stream]* 1)) / (Rx_Smooth_Factor);
4033 }
4034 }
4035 }
4036 }
4037
4038}
4039
ecdfa446
GKH		 4040static u8 rtl819x_query_rxpwrpercentage(
4041 char antpower
4042 )
4043{
4044 if ((antpower <= -100) || (antpower >= 20))
4045 {
4046 return 0;
4047 }
4048 else if (antpower >= 0)
4049 {
4050 return 100;
4051 }
4052 else
4053 {
4054 return (100+antpower);
4055 }
4056
d5abdf72 4057}
ecdfa446
GKH		 4058
4059static u8
4060rtl819x_evm_dbtopercentage(
4061 char value
4062 )
4063{
4064 char ret_val;
4065
4066 ret_val = value;
4067
4068 if(ret_val >= 0)
4069 ret_val = 0;
4070 if(ret_val <= -33)
4071 ret_val = -33;
4072 ret_val = 0 - ret_val;
4073 ret_val*=3;
4074 if(ret_val == 99)
4075 ret_val = 100;
c6eae677 4076 return ret_val;
ecdfa446
GKH		 4077}
4078
214985a6 4079/* We want good-looking for signal strength/quality */
5e1ad18a 4080static long rtl819x_signal_scale_mapping(long currsig)
ecdfa446
GKH		 4081{
4082 long retsig;
4083
4084 // Step 1. Scale mapping.
4085 if(currsig >= 61 && currsig <= 100)
4086 {
4087 retsig = 90 + ((currsig - 60) / 4);
4088 }
4089 else if(currsig >= 41 && currsig <= 60)
4090 {
4091 retsig = 78 + ((currsig - 40) / 2);
4092 }
4093 else if(currsig >= 31 && currsig <= 40)
4094 {
4095 retsig = 66 + (currsig - 30);
4096 }
4097 else if(currsig >= 21 && currsig <= 30)
4098 {
4099 retsig = 54 + (currsig - 20);
4100 }
4101 else if(currsig >= 5 && currsig <= 20)
4102 {
4103 retsig = 42 + (((currsig - 5) * 2) / 3);
4104 }
4105 else if(currsig == 4)
4106 {
4107 retsig = 36;
4108 }
4109 else if(currsig == 3)
4110 {
4111 retsig = 27;
4112 }
4113 else if(currsig == 2)
4114 {
4115 retsig = 18;
4116 }
4117 else if(currsig == 1)
4118 {
4119 retsig = 9;
4120 }
4121 else
4122 {
4123 retsig = currsig;
4124 }
4125
4126 return retsig;
4127}
4128
4129static void rtl8192_query_rxphystatus(
4130 struct r8192_priv * priv,
4131 struct ieee80211_rx_stats * pstats,
4132 prx_desc_819x_pci pdesc,
4133 prx_fwinfo_819x_pci pdrvinfo,
4134 struct ieee80211_rx_stats * precord_stats,
4135 bool bpacket_match_bssid,
4136 bool bpacket_toself,
4137 bool bPacketBeacon,
4138 bool bToSelfBA
4139 )
4140{
4141 //PRT_RFD_STATUS pRtRfdStatus = &(pRfd->Status);
4142 phy_sts_ofdm_819xpci_t* pofdm_buf;
4143 phy_sts_cck_819xpci_t * pcck_buf;
4144 phy_ofdm_rx_status_rxsc_sgien_exintfflag* prxsc;
4145 u8 *prxpkt;
4146 u8 i,max_spatial_stream, tmp_rxsnr, tmp_rxevm, rxsc_sgien_exflg;
4147 char rx_pwr[4], rx_pwr_all=0;
4148 //long rx_avg_pwr = 0;
4149 char rx_snrX, rx_evmX;
4150 u8 evm, pwdb_all;
4151 u32 RSSI, total_rssi=0;//, total_evm=0;
4152// long signal_strength_index = 0;
4153 u8 is_cck_rate=0;
4154 u8 rf_rx_num = 0;
4155
ecdfa446
GKH		 4156 is_cck_rate = rx_hal_is_cck_rate(pdrvinfo);
4157
4158 // Record it for next packet processing
4159 memset(precord_stats, 0, sizeof(struct ieee80211_rx_stats));
4160 pstats->bPacketMatchBSSID = precord_stats->bPacketMatchBSSID = bpacket_match_bssid;
4161 pstats->bPacketToSelf = precord_stats->bPacketToSelf = bpacket_toself;
4162 pstats->bIsCCK = precord_stats->bIsCCK = is_cck_rate;//RX_HAL_IS_CCK_RATE(pDrvInfo);
4163 pstats->bPacketBeacon = precord_stats->bPacketBeacon = bPacketBeacon;
4164 pstats->bToSelfBA = precord_stats->bToSelfBA = bToSelfBA;
4165 /*2007.08.30 requested by SD3 Jerry */
d163f324 4166 if (priv->phy_check_reg824 == 0)
ecdfa446 4167 {
d163f324
MM		 4168 priv->phy_reg824_bit9 = rtl8192_QueryBBReg(priv->ieee80211->dev, rFPGA0_XA_HSSIParameter2, 0x200);
4169 priv->phy_check_reg824 = 1;
ecdfa446
GKH		 4170 }
4171
4172
4173 prxpkt = (u8*)pdrvinfo;
4174
4175 /* Move pointer to the 16th bytes. Phy status start address. */
4176 prxpkt += sizeof(rx_fwinfo_819x_pci);
4177
4178 /* Initial the cck and ofdm buffer pointer */
4179 pcck_buf = (phy_sts_cck_819xpci_t *)prxpkt;
4180 pofdm_buf = (phy_sts_ofdm_819xpci_t *)prxpkt;
4181
4182 pstats->RxMIMOSignalQuality[0] = -1;
4183 pstats->RxMIMOSignalQuality[1] = -1;
4184 precord_stats->RxMIMOSignalQuality[0] = -1;
4185 precord_stats->RxMIMOSignalQuality[1] = -1;
4186
4187 if(is_cck_rate)
4188 {
4189 //
4190 // (1)Hardware does not provide RSSI for CCK
4191 //
4192
4193 //
4194 // (2)PWDB, Average PWDB cacluated by hardware (for rate adaptive)
4195 //
4196 u8 report;//, cck_agc_rpt;
ecdfa446 4197
d163f324 4198 if (!priv->phy_reg824_bit9)
ecdfa446
GKH		 4199 {
4200 report = pcck_buf->cck_agc_rpt & 0xc0;
4201 report = report>>6;
4202 switch(report)
4203 {
4204 //Fixed by Jacken from Bryant 2008-03-20
4205 //Original value is -38 , -26 , -14 , -2
4206 //Fixed value is -35 , -23 , -11 , 6
4207 case 0x3:
4208 rx_pwr_all = -35 - (pcck_buf->cck_agc_rpt & 0x3e);
4209 break;
4210 case 0x2:
4211 rx_pwr_all = -23 - (pcck_buf->cck_agc_rpt & 0x3e);
4212 break;
4213 case 0x1:
4214 rx_pwr_all = -11 - (pcck_buf->cck_agc_rpt & 0x3e);
4215 break;
4216 case 0x0:
4217 rx_pwr_all = 8 - (pcck_buf->cck_agc_rpt & 0x3e);
4218 break;
4219 }
4220 }
4221 else
4222 {
4223 report = pcck_buf->cck_agc_rpt & 0x60;
4224 report = report>>5;
4225 switch(report)
4226 {
4227 case 0x3:
4228 rx_pwr_all = -35 - ((pcck_buf->cck_agc_rpt & 0x1f)<<1) ;
4229 break;
4230 case 0x2:
4231 rx_pwr_all = -23 - ((pcck_buf->cck_agc_rpt & 0x1f)<<1);
4232 break;
4233 case 0x1:
4234 rx_pwr_all = -11 - ((pcck_buf->cck_agc_rpt & 0x1f)<<1) ;
4235 break;
4236 case 0x0:
4237 rx_pwr_all = -8 - ((pcck_buf->cck_agc_rpt & 0x1f)<<1) ;
4238 break;
4239 }
4240 }
4241
4242 pwdb_all = rtl819x_query_rxpwrpercentage(rx_pwr_all);
4243 pstats->RxPWDBAll = precord_stats->RxPWDBAll = pwdb_all;
4244 pstats->RecvSignalPower = rx_pwr_all;
4245
4246 //
4247 // (3) Get Signal Quality (EVM)
4248 //
4249 if(bpacket_match_bssid)
4250 {
4251 u8 sq;
4252
4253 if(pstats->RxPWDBAll > 40)
4254 {
4255 sq = 100;
4256 }else
4257 {
4258 sq = pcck_buf->sq_rpt;
4259
4260 if(pcck_buf->sq_rpt > 64)
4261 sq = 0;
4262 else if (pcck_buf->sq_rpt < 20)
4263 sq = 100;
4264 else
4265 sq = ((64-sq) * 100) / 44;
4266 }
4267 pstats->SignalQuality = precord_stats->SignalQuality = sq;
4268 pstats->RxMIMOSignalQuality[0] = precord_stats->RxMIMOSignalQuality[0] = sq;
4269 pstats->RxMIMOSignalQuality[1] = precord_stats->RxMIMOSignalQuality[1] = -1;
4270 }
4271 }
4272 else
4273 {
ecdfa446
GKH		 4274 //
4275 // (1)Get RSSI for HT rate
4276 //
4277 for(i=RF90_PATH_A; i<RF90_PATH_MAX; i++)
4278 {
4279 // 2008/01/30 MH we will judge RF RX path now.
4280 if (priv->brfpath_rxenable[i])
4281 rf_rx_num++;
4282 //else
4283 //continue;
4284
4285 //Fixed by Jacken from Bryant 2008-03-20
4286 //Original value is 106
ecdfa446 4287 rx_pwr[i] = ((pofdm_buf->trsw_gain_X[i]&0x3F)*2) - 110;
ecdfa446
GKH		 4288
4289 //Get Rx snr value in DB
4290 tmp_rxsnr = pofdm_buf->rxsnr_X[i];
4291 rx_snrX = (char)(tmp_rxsnr);
4292 rx_snrX /= 2;
ecdfa446
GKH		 4293
4294 /* Translate DBM to percentage. */
4295 RSSI = rtl819x_query_rxpwrpercentage(rx_pwr[i]);
4296 if (priv->brfpath_rxenable[i])
4297 total_rssi += RSSI;
4298
4299 /* Record Signal Strength for next packet */
4300 if(bpacket_match_bssid)
4301 {
4302 pstats->RxMIMOSignalStrength[i] =(u8) RSSI;
4303 precord_stats->RxMIMOSignalStrength[i] =(u8) RSSI;
4304 }
4305 }
4306
4307
4308 //
4309 // (2)PWDB, Average PWDB cacluated by hardware (for rate adaptive)
4310 //
4311 //Fixed by Jacken from Bryant 2008-03-20
4312 //Original value is 106
4313 rx_pwr_all = (((pofdm_buf->pwdb_all ) >> 1 )& 0x7f) -106;
4314 pwdb_all = rtl819x_query_rxpwrpercentage(rx_pwr_all);
4315
4316 pstats->RxPWDBAll = precord_stats->RxPWDBAll = pwdb_all;
4317 pstats->RxPower = precord_stats->RxPower = rx_pwr_all;
4318 pstats->RecvSignalPower = rx_pwr_all;
4319 //
4320 // (3)EVM of HT rate
4321 //
4322 if(pdrvinfo->RxHT && pdrvinfo->RxRate>=DESC90_RATEMCS8 &&
4323 pdrvinfo->RxRate<=DESC90_RATEMCS15)
4324 max_spatial_stream = 2; //both spatial stream make sense
4325 else
4326 max_spatial_stream = 1; //only spatial stream 1 makes sense
4327
4328 for(i=0; i<max_spatial_stream; i++)
4329 {
4330 tmp_rxevm = pofdm_buf->rxevm_X[i];
4331 rx_evmX = (char)(tmp_rxevm);
4332
4333 // Do not use shift operation like "rx_evmX >>= 1" because the compilor of free build environment
4334 // fill most significant bit to "zero" when doing shifting operation which may change a negative
4335 // value to positive one, then the dbm value (which is supposed to be negative) is not correct anymore.
4336 rx_evmX /= 2; //dbm
4337
4338 evm = rtl819x_evm_dbtopercentage(rx_evmX);
ecdfa446
GKH		 4339 if(bpacket_match_bssid)
4340 {
4341 if(i==0) // Fill value in RFD, Get the first spatial stream only
4342 pstats->SignalQuality = precord_stats->SignalQuality = (u8)(evm & 0xff);
4343 pstats->RxMIMOSignalQuality[i] = precord_stats->RxMIMOSignalQuality[i] = (u8)(evm & 0xff);
4344 }
4345 }
4346
4347
4348 /* record rx statistics for debug */
4349 rxsc_sgien_exflg = pofdm_buf->rxsc_sgien_exflg;
4350 prxsc = (phy_ofdm_rx_status_rxsc_sgien_exintfflag *)&rxsc_sgien_exflg;
ecdfa446
GKH		 4351 }
4352
4353 //UI BSS List signal strength(in percentage), make it good looking, from 0~100.
4354 //It is assigned to the BSS List in GetValueFromBeaconOrProbeRsp().
4355 if(is_cck_rate)
4356 {
4357 pstats->SignalStrength = precord_stats->SignalStrength = (u8)(rtl819x_signal_scale_mapping((long)pwdb_all));//PWDB_ALL;
4358
4359 }
4360 else
4361 {
4362 //pRfd->Status.SignalStrength = pRecordRfd->Status.SignalStrength = (u1Byte)(SignalScaleMapping(total_rssi/=RF90_PATH_MAX));//(u1Byte)(total_rssi/=RF90_PATH_MAX);
4363 // We can judge RX path number now.
4364 if (rf_rx_num != 0)
4365 pstats->SignalStrength = precord_stats->SignalStrength = (u8)(rtl819x_signal_scale_mapping((long)(total_rssi/=rf_rx_num)));
4366 }
d5abdf72 4367}
ecdfa446 4368
5e1ad18a 4369static void
ecdfa446
GKH		 4370rtl8192_record_rxdesc_forlateruse(
4371 struct ieee80211_rx_stats * psrc_stats,
4372 struct ieee80211_rx_stats * ptarget_stats
4373)
4374{
4375 ptarget_stats->bIsAMPDU = psrc_stats->bIsAMPDU;
4376 ptarget_stats->bFirstMPDU = psrc_stats->bFirstMPDU;
4377 //ptarget_stats->Seq_Num = psrc_stats->Seq_Num;
4378}
4379
4380
4381
5e1ad18a 4382static void TranslateRxSignalStuff819xpci(struct net_device *dev,
ecdfa446
GKH		 4383 struct sk_buff *skb,
4384 struct ieee80211_rx_stats * pstats,
4385 prx_desc_819x_pci pdesc,
4386 prx_fwinfo_819x_pci pdrvinfo)
4387{
4388 // TODO: We must only check packet for current MAC address. Not finish
4389 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
4390 bool bpacket_match_bssid, bpacket_toself;
4391 bool bPacketBeacon=false, bToSelfBA=false;
ecdfa446
GKH		 4392 struct ieee80211_hdr_3addr *hdr;
4393 u16 fc,type;
4394
4395 // Get Signal Quality for only RX data queue (but not command queue)
4396
4397 u8* tmp_buf;
4398 u8 *praddr;
4399
4400 /* Get MAC frame start address. */
4401 tmp_buf = skb->data;
4402
4403 hdr = (struct ieee80211_hdr_3addr *)tmp_buf;
4404 fc = le16_to_cpu(hdr->frame_ctl);
4405 type = WLAN_FC_GET_TYPE(fc);
4406 praddr = hdr->addr1;
4407
4408 /* Check if the received packet is acceptabe. */
4409 bpacket_match_bssid = ((IEEE80211_FTYPE_CTL != type) &&
03996954 4410 (!compare_ether_addr(priv->ieee80211->current_network.bssid, (fc & IEEE80211_FCTL_TODS)? hdr->addr1 : (fc & IEEE80211_FCTL_FROMDS )? hdr->addr2 : hdr->addr3))
ecdfa446 4411 && (!pstats->bHwError) && (!pstats->bCRC)&& (!pstats->bICV));
03996954 4412 bpacket_toself = bpacket_match_bssid & (!compare_ether_addr(praddr, priv->ieee80211->dev->dev_addr));
11aacc28 4413
ecdfa446
GKH		 4414 if(WLAN_FC_GET_FRAMETYPE(fc)== IEEE80211_STYPE_BEACON)
4415 {
4416 bPacketBeacon = true;
ecdfa446
GKH		 4417 }
4418 if(WLAN_FC_GET_FRAMETYPE(fc) == IEEE80211_STYPE_BLOCKACK)
4419 {
03996954 4420 if((!compare_ether_addr(praddr,dev->dev_addr)))
ecdfa446 4421 bToSelfBA = true;
ecdfa446
GKH		 4422 }
4423
ecdfa446
GKH		 4424 //
4425 // Process PHY information for previous packet (RSSI/PWDB/EVM)
4426 //
4427 // Because phy information is contained in the last packet of AMPDU only, so driver
4428 // should process phy information of previous packet
83184e69
MM		 4429 rtl8192_process_phyinfo(priv, tmp_buf, &priv->previous_stats, pstats);
4430 rtl8192_query_rxphystatus(priv, pstats, pdesc, pdrvinfo, &priv->previous_stats, bpacket_match_bssid,
ecdfa446 4431 bpacket_toself ,bPacketBeacon, bToSelfBA);
83184e69 4432 rtl8192_record_rxdesc_forlateruse(pstats, &priv->previous_stats);
ecdfa446
GKH		 4433
4434}
4435
4436
5e1ad18a 4437static void rtl8192_tx_resume(struct net_device *dev)
ecdfa446
GKH		 4438{
4439 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
4440 struct ieee80211_device *ieee = priv->ieee80211;
4441 struct sk_buff *skb;
4442 int queue_index;
4443
4444 for(queue_index = BK_QUEUE; queue_index < TXCMD_QUEUE;queue_index++) {
4445 while((!skb_queue_empty(&ieee->skb_waitQ[queue_index]))&&
4446 (priv->ieee80211->check_nic_enough_desc(dev,queue_index) > 0)) {
4447 /* 1. dequeue the packet from the wait queue */
4448 skb = skb_dequeue(&ieee->skb_waitQ[queue_index]);
4449 /* 2. tx the packet directly */
4450 ieee->softmac_data_hard_start_xmit(skb,dev,0/* rate useless now*/);
ecdfa446
GKH		 4451 }
4452 }
4453}
4454
80a4dead 4455static void rtl8192_irq_tx_tasklet(unsigned long arg)
ecdfa446 4456{
80a4dead 4457 struct r8192_priv *priv = (struct r8192_priv*) arg;
1348dc08
MM		 4458 struct rtl8192_tx_ring *mgnt_ring = &priv->tx_ring[MGNT_QUEUE];
4459 struct net_device *dev = priv->ieee80211->dev;
4460 unsigned long flags;
4461
4462 /* check if we need to report that the management queue is drained */
4463 spin_lock_irqsave(&priv->irq_th_lock, flags);
4464
4465 if (!skb_queue_len(&mgnt_ring->queue) &&
4466 priv->ieee80211->ack_tx_to_ieee &&
4467 rtl8192_is_tx_queue_empty(dev)) {
4468 priv->ieee80211->ack_tx_to_ieee = 0;
4469 ieee80211_ps_tx_ack(priv->ieee80211, 1);
4470 }
4471
4472 spin_unlock_irqrestore(&priv->irq_th_lock, flags);
4473
4474 rtl8192_tx_resume(dev);
ecdfa446
GKH		 4475}
4476
214985a6 4477/* Record the received data rate */
5e1ad18a 4478static void UpdateReceivedRateHistogramStatistics8190(
ecdfa446
GKH		 4479 struct net_device *dev,
4480 struct ieee80211_rx_stats* pstats
4481 )
4482{
4483 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
4484 u32 rcvType=1; //0: Total, 1:OK, 2:CRC, 3:ICV
4485 u32 rateIndex;
4486 u32 preamble_guardinterval; //1: short preamble/GI, 0: long preamble/GI
4487
ecdfa446
GKH		 4488 if(pstats->bCRC)
4489 rcvType = 2;
4490 else if(pstats->bICV)
4491 rcvType = 3;
4492
4493 if(pstats->bShortPreamble)
4494 preamble_guardinterval = 1;// short
4495 else
4496 preamble_guardinterval = 0;// long
4497
4498 switch(pstats->rate)
4499 {
4500 //
4501 // CCK rate
4502 //
4503 case MGN_1M: rateIndex = 0; break;
4504 case MGN_2M: rateIndex = 1; break;
4505 case MGN_5_5M: rateIndex = 2; break;
4506 case MGN_11M: rateIndex = 3; break;
4507 //
4508 // Legacy OFDM rate
4509 //
4510 case MGN_6M: rateIndex = 4; break;
4511 case MGN_9M: rateIndex = 5; break;
4512 case MGN_12M: rateIndex = 6; break;
4513 case MGN_18M: rateIndex = 7; break;
4514 case MGN_24M: rateIndex = 8; break;
4515 case MGN_36M: rateIndex = 9; break;
4516 case MGN_48M: rateIndex = 10; break;
4517 case MGN_54M: rateIndex = 11; break;
4518 //
4519 // 11n High throughput rate
4520 //
4521 case MGN_MCS0: rateIndex = 12; break;
4522 case MGN_MCS1: rateIndex = 13; break;
4523 case MGN_MCS2: rateIndex = 14; break;
4524 case MGN_MCS3: rateIndex = 15; break;
4525 case MGN_MCS4: rateIndex = 16; break;
4526 case MGN_MCS5: rateIndex = 17; break;
4527 case MGN_MCS6: rateIndex = 18; break;
4528 case MGN_MCS7: rateIndex = 19; break;
4529 case MGN_MCS8: rateIndex = 20; break;
4530 case MGN_MCS9: rateIndex = 21; break;
4531 case MGN_MCS10: rateIndex = 22; break;
4532 case MGN_MCS11: rateIndex = 23; break;
4533 case MGN_MCS12: rateIndex = 24; break;
4534 case MGN_MCS13: rateIndex = 25; break;
4535 case MGN_MCS14: rateIndex = 26; break;
4536 case MGN_MCS15: rateIndex = 27; break;
4537 default: rateIndex = 28; break;
4538 }
ecdfa446
GKH		 4539 priv->stats.received_rate_histogram[0][rateIndex]++; //total
4540 priv->stats.received_rate_histogram[rcvType][rateIndex]++;
4541}
4542
5e1ad18a 4543static void rtl8192_rx(struct net_device *dev)
ecdfa446
GKH		 4544{
4545 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
4546 struct ieee80211_hdr_1addr *ieee80211_hdr = NULL;
4547 bool unicast_packet = false;
4548 struct ieee80211_rx_stats stats = {
4549 .signal = 0,
4550 .noise = -98,
4551 .rate = 0,
4552 .freq = IEEE80211_24GHZ_BAND,
4553 };
4554 unsigned int count = priv->rxringcount;
79b03af6
MM		 4555 prx_fwinfo_819x_pci pDrvInfo = NULL;
4556 struct sk_buff *new_skb;
ecdfa446 4557
ecdfa446
GKH		 4558 while (count--) {
4559 rx_desc_819x_pci *pdesc = &priv->rx_ring[priv->rx_idx];//rx descriptor
4560 struct sk_buff *skb = priv->rx_buf[priv->rx_idx];//rx pkt
4561
79b03af6 4562 if (pdesc->OWN)
ecdfa446
GKH		 4563 /* wait data to be filled by hardware */
4564 return;
79b03af6 4565
ecdfa446
GKH		 4566 stats.bICV = pdesc->ICV;
4567 stats.bCRC = pdesc->CRC32;
4568 stats.bHwError = pdesc->CRC32 | pdesc->ICV;
4569
4570 stats.Length = pdesc->Length;
4571 if(stats.Length < 24)
4572 stats.bHwError |= 1;
4573
4574 if(stats.bHwError) {
4575 stats.bShift = false;
ecdfa446 4576 goto done;
79b03af6
MM		 4577 }
4578 pDrvInfo = NULL;
4579 new_skb = dev_alloc_skb(priv->rxbuffersize);
ecdfa446 4580
79b03af6 4581 if (unlikely(!new_skb))
ecdfa446 4582 goto done;
ecdfa446
GKH		 4583
4584 stats.RxDrvInfoSize = pdesc->RxDrvInfoSize;
4585 stats.RxBufShift = ((pdesc->Shift)&0x03);
4586 stats.Decrypted = !pdesc->SWDec;
4587
ecdfa446 4588 pci_dma_sync_single_for_cpu(priv->pdev,
ecdfa446
GKH		 4589 *((dma_addr_t *)skb->cb),
4590 priv->rxbuffersize,
4591 PCI_DMA_FROMDEVICE);
4592 skb_put(skb, pdesc->Length);
4593 pDrvInfo = (rx_fwinfo_819x_pci *)(skb->data + stats.RxBufShift);
4594 skb_reserve(skb, stats.RxDrvInfoSize + stats.RxBufShift);
4595
4596 stats.rate = HwRateToMRate90((bool)pDrvInfo->RxHT, (u8)pDrvInfo->RxRate);
4597 stats.bShortPreamble = pDrvInfo->SPLCP;
4598
4599 /* it is debug only. It should be disabled in released driver.
4600 * 2007.1.11 by Emily
4601 * */
4602 UpdateReceivedRateHistogramStatistics8190(dev, &stats);
4603
4604 stats.bIsAMPDU = (pDrvInfo->PartAggr==1);
4605 stats.bFirstMPDU = (pDrvInfo->PartAggr==1) && (pDrvInfo->FirstAGGR==1);
4606
4607 stats.TimeStampLow = pDrvInfo->TSFL;
3f9ab1ee 4608 stats.TimeStampHigh = read_nic_dword(priv, TSFR+4);
ecdfa446
GKH		 4609
4610 UpdateRxPktTimeStamp8190(dev, &stats);
4611
4612 //
4613 // Get Total offset of MPDU Frame Body
4614 //
4615 if((stats.RxBufShift + stats.RxDrvInfoSize) > 0)
4616 stats.bShift = 1;
4617
4618 stats.RxIs40MHzPacket = pDrvInfo->BW;
4619
4620 /* ???? */
4621 TranslateRxSignalStuff819xpci(dev,skb, &stats, pdesc, pDrvInfo);
4622
4623 /* Rx A-MPDU */
4624 if(pDrvInfo->FirstAGGR==1 || pDrvInfo->PartAggr == 1)
4625 RT_TRACE(COMP_RXDESC, "pDrvInfo->FirstAGGR = %d, pDrvInfo->PartAggr = %d\n",
4626 pDrvInfo->FirstAGGR, pDrvInfo->PartAggr);
4627 skb_trim(skb, skb->len - 4/*sCrcLng*/);
4628 /* rx packets statistics */
4629 ieee80211_hdr = (struct ieee80211_hdr_1addr *)skb->data;
4630 unicast_packet = false;
4631
4632 if(is_broadcast_ether_addr(ieee80211_hdr->addr1)) {
4633 //TODO
4634 }else if(is_multicast_ether_addr(ieee80211_hdr->addr1)){
4635 //TODO
4636 }else {
4637 /* unicast packet */
4638 unicast_packet = true;
4639 }
4640
4641 stats.packetlength = stats.Length-4;
4642 stats.fraglength = stats.packetlength;
4643 stats.fragoffset = 0;
4644 stats.ntotalfrag = 1;
4645
fb5fe277 4646 if(!ieee80211_rtl_rx(priv->ieee80211, skb, &stats)){
ecdfa446
GKH		 4647 dev_kfree_skb_any(skb);
4648 } else {
4649 priv->stats.rxok++;
4650 if(unicast_packet) {
4651 priv->stats.rxbytesunicast += skb->len;
4652 }
4653 }
4654
43f88d53
DL		 4655 pci_unmap_single(priv->pdev, *((dma_addr_t *) skb->cb),
4656 priv->rxbuffersize, PCI_DMA_FROMDEVICE);
4657
ecdfa446
GKH		 4658 skb = new_skb;
4659 priv->rx_buf[priv->rx_idx] = skb;
1c7ec2e8 4660 *((dma_addr_t *) skb->cb) = pci_map_single(priv->pdev, skb_tail_pointer(skb), priv->rxbuffersize, PCI_DMA_FROMDEVICE);
ecdfa446 4661
ecdfa446
GKH		 4662done:
4663 pdesc->BufferAddress = cpu_to_le32(*((dma_addr_t *)skb->cb));
4664 pdesc->OWN = 1;
4665 pdesc->Length = priv->rxbuffersize;
4666 if (priv->rx_idx == priv->rxringcount-1)
4667 pdesc->EOR = 1;
4668 priv->rx_idx = (priv->rx_idx + 1) % priv->rxringcount;
4669 }
4670
4671}
4672
80a4dead 4673static void rtl8192_irq_rx_tasklet(unsigned long arg)
ecdfa446 4674{
80a4dead 4675 struct r8192_priv *priv = (struct r8192_priv*) arg;
ecdfa446
GKH		 4676 rtl8192_rx(priv->ieee80211->dev);
4677 /* unmask RDU */
3f9ab1ee 4678 write_nic_dword(priv, INTA_MASK, read_nic_dword(priv, INTA_MASK) | IMR_RDU);
ecdfa446
GKH		 4679}
4680
4681static const struct net_device_ops rtl8192_netdev_ops = {
4682 .ndo_open = rtl8192_open,
4683 .ndo_stop = rtl8192_close,
ecdfa446
GKH		 4684 .ndo_tx_timeout = tx_timeout,
4685 .ndo_do_ioctl = rtl8192_ioctl,
4686 .ndo_set_multicast_list = r8192_set_multicast,
4687 .ndo_set_mac_address = r8192_set_mac_adr,
fb5fe277 4688 .ndo_start_xmit = ieee80211_rtl_xmit,
ecdfa446
GKH		 4689};
4690
ecdfa446
GKH		 4691static int __devinit rtl8192_pci_probe(struct pci_dev *pdev,
4692 const struct pci_device_id *id)
4693{
4694 unsigned long ioaddr = 0;
4695 struct net_device *dev = NULL;
4696 struct r8192_priv *priv= NULL;
4697 u8 unit = 0;
3a8f2d3c 4698 int ret = -ENODEV;
ecdfa446 4699 unsigned long pmem_start, pmem_len, pmem_flags;
ecdfa446 4700
703fdcc3 4701 RT_TRACE(COMP_INIT,"Configuring chip resources\n");
ecdfa446
GKH		 4702
4703 if( pci_enable_device (pdev) ){
4704 RT_TRACE(COMP_ERR,"Failed to enable PCI device");
4705 return -EIO;
4706 }
4707
4708 pci_set_master(pdev);
4709 //pci_set_wmi(pdev);
4710 pci_set_dma_mask(pdev, 0xffffff00ULL);
ecdfa446 4711 pci_set_consistent_dma_mask(pdev,0xffffff00ULL);
ecdfa446 4712 dev = alloc_ieee80211(sizeof(struct r8192_priv));
3a8f2d3c
KV		 4713 if (!dev) {
4714 ret = -ENOMEM;
4715 goto fail_free;
4716 }
ecdfa446 4717
ecdfa446 4718 pci_set_drvdata(pdev, dev);
ecdfa446 4719 SET_NETDEV_DEV(dev, &pdev->dev);
ecdfa446 4720 priv = ieee80211_priv(dev);
ecdfa446 4721 priv->ieee80211 = netdev_priv(dev);
ecdfa446 4722 priv->pdev=pdev;
ecdfa446
GKH		 4723 if((pdev->subsystem_vendor == PCI_VENDOR_ID_DLINK)&&(pdev->subsystem_device == 0x3304)){
4724 priv->ieee80211->bSupportRemoteWakeUp = 1;
4725 } else
ecdfa446
GKH		 4726 {
4727 priv->ieee80211->bSupportRemoteWakeUp = 0;
4728 }
4729
ecdfa446
GKH		 4730 pmem_start = pci_resource_start(pdev, 1);
4731 pmem_len = pci_resource_len(pdev, 1);
4732 pmem_flags = pci_resource_flags (pdev, 1);
4733
4734 if (!(pmem_flags & IORESOURCE_MEM)) {
703fdcc3 4735 RT_TRACE(COMP_ERR, "region #1 not a MMIO resource, aborting\n");
ecdfa446
GKH		 4736 goto fail;
4737 }
4738
4739 //DMESG("Memory mapped space @ 0x%08lx ", pmem_start);
4740 if( ! request_mem_region(pmem_start, pmem_len, RTL819xE_MODULE_NAME)) {
703fdcc3 4741 RT_TRACE(COMP_ERR,"request_mem_region failed!\n");
ecdfa446
GKH		 4742 goto fail;
4743 }
4744
4745
4746 ioaddr = (unsigned long)ioremap_nocache( pmem_start, pmem_len);
4747 if( ioaddr == (unsigned long)NULL ){
703fdcc3 4748 RT_TRACE(COMP_ERR,"ioremap failed!\n");
ecdfa446
GKH		 4749 // release_mem_region( pmem_start, pmem_len );
4750 goto fail1;
4751 }
4752
4753 dev->mem_start = ioaddr; // shared mem start
4754 dev->mem_end = ioaddr + pci_resource_len(pdev, 0); // shared mem end
4755
ecdfa446
GKH		 4756 /* We disable the RETRY_TIMEOUT register (0x41) to keep
4757 * PCI Tx retries from interfering with C3 CPU state */
4758 pci_write_config_byte(pdev, 0x41, 0x00);
4759
4760
4761 pci_read_config_byte(pdev, 0x05, &unit);
4762 pci_write_config_byte(pdev, 0x05, unit & (~0x04));
4763
4764 dev->irq = pdev->irq;
4765 priv->irq = 0;
4766
4767 dev->netdev_ops = &rtl8192_netdev_ops;
ecdfa446 4768
890a6850 4769 dev->wireless_handlers = &r8192_wx_handlers_def;
ecdfa446
GKH		 4770 dev->type=ARPHRD_ETHER;
4771
890a6850 4772 dev->watchdog_timeo = HZ*3;
ecdfa446
GKH		 4773
4774 if (dev_alloc_name(dev, ifname) < 0){
4775 RT_TRACE(COMP_INIT, "Oops: devname already taken! Trying wlan%%d...\n");
dca41306 4776 strcpy(ifname, "wlan%d");
ecdfa446
GKH		 4777 dev_alloc_name(dev, ifname);
4778 }
4779
4780 RT_TRACE(COMP_INIT, "Driver probe completed1\n");
4781 if(rtl8192_init(dev)!=0){
703fdcc3 4782 RT_TRACE(COMP_ERR, "Initialization failed\n");
ecdfa446
GKH		 4783 goto fail;
4784 }
4785
ecdfa446
GKH		 4786 register_netdev(dev);
4787 RT_TRACE(COMP_INIT, "dev name=======> %s\n",dev->name);
4788 rtl8192_proc_init_one(dev);
4789
4790
4791 RT_TRACE(COMP_INIT, "Driver probe completed\n");
ecdfa446 4792 return 0;
ecdfa446
GKH		 4793
4794fail1:
4795
ecdfa446
GKH		 4796 if( dev->mem_start != (unsigned long)NULL ){
4797 iounmap( (void *)dev->mem_start );
4798 release_mem_region( pci_resource_start(pdev, 1),
4799 pci_resource_len(pdev, 1) );
4800 }
ecdfa446
GKH		 4801
4802fail:
4803 if(dev){
4804
4805 if (priv->irq) {
4806 free_irq(dev->irq, dev);
4807 dev->irq=0;
4808 }
4809 free_ieee80211(dev);
4810 }
4811
3a8f2d3c 4812fail_free:
ecdfa446
GKH		 4813 pci_disable_device(pdev);
4814
4815 DMESG("wlan driver load failed\n");
4816 pci_set_drvdata(pdev, NULL);
3a8f2d3c 4817 return ret;
ecdfa446
GKH		 4818
4819}
4820
4821/* detach all the work and timer structure declared or inititialized
4822 * in r8192_init function.
4823 * */
5b3b1a7b 4824static void rtl8192_cancel_deferred_work(struct r8192_priv* priv)
ecdfa446
GKH		 4825{
4826 /* call cancel_work_sync instead of cancel_delayed_work if and only if Linux_version_code
4827 * is or is newer than 2.6.20 and work structure is defined to be struct work_struct.
4828 * Otherwise call cancel_delayed_work is enough.
39cfb97b 4829 * FIXME (2.6.20 should 2.6.22, work_struct should not cancel)
ecdfa446 4830 * */
ecdfa446
GKH		 4831 cancel_delayed_work(&priv->watch_dog_wq);
4832 cancel_delayed_work(&priv->update_beacon_wq);
4833 cancel_delayed_work(&priv->ieee80211->hw_wakeup_wq);
4834 cancel_delayed_work(&priv->ieee80211->hw_sleep_wq);
ecdfa446 4835 cancel_delayed_work(&priv->gpio_change_rf_wq);
ecdfa446
GKH		 4836 cancel_work_sync(&priv->reset_wq);
4837 cancel_work_sync(&priv->qos_activate);
ecdfa446
GKH		 4838}
4839
4840
4841static void __devexit rtl8192_pci_disconnect(struct pci_dev *pdev)
4842{
4843 struct net_device *dev = pci_get_drvdata(pdev);
4844 struct r8192_priv *priv ;
fb53c2b7 4845 u32 i;
ecdfa446 4846
fb53c2b7 4847 if (dev) {
ecdfa446
GKH		 4848
4849 unregister_netdev(dev);
4850
fb53c2b7 4851 priv = ieee80211_priv(dev);
ecdfa446
GKH		 4852
4853 rtl8192_proc_remove_one(dev);
4854
4855 rtl8192_down(dev);
4856 if (priv->pFirmware)
4857 {
4858 vfree(priv->pFirmware);
4859 priv->pFirmware = NULL;
4860 }
ecdfa446 4861 destroy_workqueue(priv->priv_wq);
ecdfa446 4862
fb53c2b7
MM		 4863 /* free tx/rx rings */
4864 rtl8192_free_rx_ring(dev);
4865 for (i = 0; i < MAX_TX_QUEUE_COUNT; i++)
4866 rtl8192_free_tx_ring(dev, i);
4867
4868 if (priv->irq) {
ecdfa446
GKH		 4869 printk("Freeing irq %d\n",dev->irq);
4870 free_irq(dev->irq, dev);
4871 priv->irq=0;
ecdfa446
GKH		 4872 }
4873
ecdfa446
GKH		 4874 if( dev->mem_start != (unsigned long)NULL ){
4875 iounmap( (void *)dev->mem_start );
4876 release_mem_region( pci_resource_start(pdev, 1),
4877 pci_resource_len(pdev, 1) );
4878 }
ecdfa446 4879
97a6688a 4880 free_ieee80211(dev);
ecdfa446
GKH		 4881 }
4882
4883 pci_disable_device(pdev);
4884 RT_TRACE(COMP_DOWN, "wlan driver removed\n");
4885}
4886
fb5fe277
GK		 4887extern int ieee80211_rtl_init(void);
4888extern void ieee80211_rtl_exit(void);
ecdfa446
GKH		 4889
4890static int __init rtl8192_pci_module_init(void)
4891{
4892 int retval;
4893
fb5fe277 4894 retval = ieee80211_rtl_init();
ecdfa446
GKH		 4895 if (retval)
4896 return retval;
4897
4898 printk(KERN_INFO "\nLinux kernel driver for RTL8192 based WLAN cards\n");
4899 printk(KERN_INFO "Copyright (c) 2007-2008, Realsil Wlan\n");
703fdcc3 4900 RT_TRACE(COMP_INIT, "Initializing module\n");
ecdfa446 4901 rtl8192_proc_module_init();
ecdfa446 4902 if(0!=pci_register_driver(&rtl8192_pci_driver))
ecdfa446
GKH		 4903 {
4904 DMESG("No device found");
4905 /*pci_unregister_driver (&rtl8192_pci_driver);*/
4906 return -ENODEV;
4907 }
4908 return 0;
4909}
4910
4911
4912static void __exit rtl8192_pci_module_exit(void)
4913{
4914 pci_unregister_driver(&rtl8192_pci_driver);
4915
703fdcc3 4916 RT_TRACE(COMP_DOWN, "Exiting\n");
ecdfa446 4917 rtl8192_proc_module_remove();
fb5fe277 4918 ieee80211_rtl_exit();
ecdfa446
GKH		 4919}
4920
559fba5e 4921static irqreturn_t rtl8192_interrupt(int irq, void *netdev)
ecdfa446 4922{
b2cf8d48
MM		 4923 struct net_device *dev = (struct net_device *) netdev;
4924 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
4925 unsigned long flags;
4926 u32 inta;
f8129a95
MM		 4927 irqreturn_t ret = IRQ_HANDLED;
4928
4929 spin_lock_irqsave(&priv->irq_th_lock, flags);
ecdfa446 4930
b2cf8d48 4931 /* ISR: 4bytes */
ecdfa446 4932
3f9ab1ee
MM		 4933 inta = read_nic_dword(priv, ISR); /* & priv->IntrMask; */
4934 write_nic_dword(priv, ISR, inta); /* reset int situation */
ecdfa446 4935
b2cf8d48 4936 if (!inta) {
b2cf8d48
MM		 4937 /*
4938 * most probably we can safely return IRQ_NONE,
4939 * but for now is better to avoid problems
4940 */
f8129a95 4941 goto out_unlock;
b2cf8d48 4942 }
ecdfa446 4943
b2cf8d48
MM		 4944 if (inta == 0xffff) {
4945 /* HW disappared */
f8129a95 4946 goto out_unlock;
b2cf8d48
MM		 4947 }
4948
f8129a95
MM		 4949 if (!netif_running(dev))
4950 goto out_unlock;
ecdfa446 4951
b2cf8d48
MM		 4952 if (inta & IMR_TBDOK) {
4953 RT_TRACE(COMP_INTR, "beacon ok interrupt!\n");
4954 rtl8192_tx_isr(dev, BEACON_QUEUE);
4955 priv->stats.txbeaconokint++;
4956 }
ecdfa446 4957
b2cf8d48
MM		 4958 if (inta & IMR_TBDER) {
4959 RT_TRACE(COMP_INTR, "beacon ok interrupt!\n");
4960 rtl8192_tx_isr(dev, BEACON_QUEUE);
4961 priv->stats.txbeaconerr++;
4962 }
ecdfa446 4963
b2cf8d48
MM		 4964 if (inta & IMR_MGNTDOK ) {
4965 RT_TRACE(COMP_INTR, "Manage ok interrupt!\n");
4966 priv->stats.txmanageokint++;
4967 rtl8192_tx_isr(dev,MGNT_QUEUE);
4968 }
ecdfa446 4969
b2cf8d48
MM		 4970 if (inta & IMR_COMDOK)
4971 {
4972 priv->stats.txcmdpktokint++;
4973 rtl8192_tx_isr(dev, TXCMD_QUEUE);
4974 }
ecdfa446 4975
b2cf8d48 4976 if (inta & IMR_ROK) {
b2cf8d48
MM		 4977 priv->stats.rxint++;
4978 tasklet_schedule(&priv->irq_rx_tasklet);
4979 }
ecdfa446 4980
b2cf8d48
MM		 4981 if (inta & IMR_BcnInt) {
4982 RT_TRACE(COMP_INTR, "prepare beacon for interrupt!\n");
4983 tasklet_schedule(&priv->irq_prepare_beacon_tasklet);
4984 }
ecdfa446 4985
b2cf8d48
MM		 4986 if (inta & IMR_RDU) {
4987 RT_TRACE(COMP_INTR, "rx descriptor unavailable!\n");
4988 priv->stats.rxrdu++;
4989 /* reset int situation */
3f9ab1ee 4990 write_nic_dword(priv, INTA_MASK, read_nic_dword(priv, INTA_MASK) & ~IMR_RDU);
b2cf8d48
MM		 4991 tasklet_schedule(&priv->irq_rx_tasklet);
4992 }
ecdfa446 4993
b2cf8d48
MM		 4994 if (inta & IMR_RXFOVW) {
4995 RT_TRACE(COMP_INTR, "rx overflow !\n");
4996 priv->stats.rxoverflow++;
4997 tasklet_schedule(&priv->irq_rx_tasklet);
4998 }
ecdfa446 4999
b2cf8d48
MM		 5000 if (inta & IMR_TXFOVW)
5001 priv->stats.txoverflow++;
ecdfa446 5002
b2cf8d48
MM		 5003 if (inta & IMR_BKDOK) {
5004 RT_TRACE(COMP_INTR, "BK Tx OK interrupt!\n");
5005 priv->stats.txbkokint++;
5006 priv->ieee80211->LinkDetectInfo.NumTxOkInPeriod++;
5007 rtl8192_tx_isr(dev, BK_QUEUE);
5008 }
ecdfa446 5009
b2cf8d48
MM		 5010 if (inta & IMR_BEDOK) {
5011 RT_TRACE(COMP_INTR, "BE TX OK interrupt!\n");
5012 priv->stats.txbeokint++;
5013 priv->ieee80211->LinkDetectInfo.NumTxOkInPeriod++;
5014 rtl8192_tx_isr(dev, BE_QUEUE);
5015 }
ecdfa446 5016
b2cf8d48
MM		 5017 if (inta & IMR_VIDOK) {
5018 RT_TRACE(COMP_INTR, "VI TX OK interrupt!\n");
5019 priv->stats.txviokint++;
5020 priv->ieee80211->LinkDetectInfo.NumTxOkInPeriod++;
5021 rtl8192_tx_isr(dev, VI_QUEUE);
5022 }
ecdfa446 5023
b2cf8d48
MM		 5024 if (inta & IMR_VODOK) {
5025 priv->stats.txvookint++;
5026 priv->ieee80211->LinkDetectInfo.NumTxOkInPeriod++;
5027 rtl8192_tx_isr(dev, VO_QUEUE);
5028 }
ecdfa446 5029
f8129a95 5030out_unlock:
b2cf8d48 5031 spin_unlock_irqrestore(&priv->irq_th_lock, flags);
ecdfa446 5032
f8129a95 5033 return ret;
ecdfa446
GKH		 5034}
5035
ecdfa446
GKH		 5036void EnableHWSecurityConfig8192(struct net_device *dev)
5037{
5038 u8 SECR_value = 0x0;
ecdfa446 5039 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
16d74da0
MM		 5040 struct ieee80211_device* ieee = priv->ieee80211;
5041
ecdfa446 5042 SECR_value = SCR_TxEncEnable | SCR_RxDecEnable;
11aacc28 5043
ecdfa446
GKH		 5044 if (((KEY_TYPE_WEP40 == ieee->pairwise_key_type) || (KEY_TYPE_WEP104 == ieee->pairwise_key_type)) && (priv->ieee80211->auth_mode != 2))
5045 {
5046 SECR_value |= SCR_RxUseDK;
5047 SECR_value |= SCR_TxUseDK;
5048 }
5049 else if ((ieee->iw_mode == IW_MODE_ADHOC) && (ieee->pairwise_key_type & (KEY_TYPE_CCMP | KEY_TYPE_TKIP)))
5050 {
5051 SECR_value |= SCR_RxUseDK;
5052 SECR_value |= SCR_TxUseDK;
5053 }
5054
ecdfa446
GKH		 5055 //add HWSec active enable here.
5056//default using hwsec. when peer AP is in N mode only and pairwise_key_type is none_aes(which HT_IOT_ACT_PURE_N_MODE indicates it), use software security. when peer AP is in b,g,n mode mixed and pairwise_key_type is none_aes, use g mode hw security. WB on 2008.7.4
5057 ieee->hwsec_active = 1;
5058
5059 if ((ieee->pHTInfo->IOTAction&HT_IOT_ACT_PURE_N_MODE) || !hwwep)//!ieee->hwsec_support) //add hwsec_support flag to totol control hw_sec on/off
5060 {
5061 ieee->hwsec_active = 0;
5062 SECR_value &= ~SCR_RxDecEnable;
5063 }
5064
207b58fb 5065 RT_TRACE(COMP_SEC,"%s:, hwsec:%d, pairwise_key:%d, SECR_value:%x\n", __FUNCTION__,
ecdfa446
GKH		 5066 ieee->hwsec_active, ieee->pairwise_key_type, SECR_value);
5067 {
3f9ab1ee 5068 write_nic_byte(priv, SECR, SECR_value);//SECR_value | SCR_UseDK );
ecdfa446
GKH		 5069 }
5070
5071}
5072#define TOTAL_CAM_ENTRY 32
5073//#define CAM_CONTENT_COUNT 8
5074void setKey( struct net_device *dev,
5075 u8 EntryNo,
5076 u8 KeyIndex,
5077 u16 KeyType,
881a975b 5078 const u8 *MacAddr,
ecdfa446
GKH		 5079 u8 DefaultKey,
5080 u32 *KeyContent )
5081{
5082 u32 TargetCommand = 0;
5083 u32 TargetContent = 0;
5084 u16 usConfig = 0;
5085 u8 i;
5086#ifdef ENABLE_IPS
5087 struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
5088 RT_RF_POWER_STATE rtState;
5089 rtState = priv->ieee80211->eRFPowerState;
5090 if(priv->ieee80211->PowerSaveControl.bInactivePs){
5091 if(rtState == eRfOff){
5092 if(priv->ieee80211->RfOffReason > RF_CHANGE_BY_IPS)
5093 {
5094 RT_TRACE(COMP_ERR, "%s(): RF is OFF.\n",__FUNCTION__);
65a43784 5095 //up(&priv->wx_sem);
ecdfa446
GKH		 5096 return ;
5097 }
5098 else{
65a43784 5099 down(&priv->ieee80211->ips_sem);
ecdfa446 5100 IPSLeave(dev);
65a43784 5101 up(&priv->ieee80211->ips_sem);
ecdfa446
GKH		 5102 }
5103 }
5104 }
5105 priv->ieee80211->is_set_key = true;
5106#endif
5107 if (EntryNo >= TOTAL_CAM_ENTRY)
5108 RT_TRACE(COMP_ERR, "cam entry exceeds in setKey()\n");
5109
0ee9f67c 5110 RT_TRACE(COMP_SEC, "====>to setKey(), dev:%p, EntryNo:%d, KeyIndex:%d, KeyType:%d, MacAddr%pM\n", dev,EntryNo, KeyIndex, KeyType, MacAddr);
ecdfa446
GKH		 5111
5112 if (DefaultKey)
5113 usConfig |= BIT15 | (KeyType<<2);
5114 else
5115 usConfig |= BIT15 | (KeyType<<2) | KeyIndex;
5116// usConfig |= BIT15 | (KeyType<<2) | (DefaultKey<<5) | KeyIndex;
5117
5118
5119 for(i=0 ; i<CAM_CONTENT_COUNT; i++){
5120 TargetCommand = i+CAM_CONTENT_COUNT*EntryNo;
5121 TargetCommand |= BIT31|BIT16;
5122
5123 if(i==0){//MAC|Config
5124 TargetContent = (u32)(*(MacAddr+0)) << 16|
5125 (u32)(*(MacAddr+1)) << 24|
5126 (u32)usConfig;
5127
3f9ab1ee
MM		 5128 write_nic_dword(priv, WCAMI, TargetContent);
5129 write_nic_dword(priv, RWCAM, TargetCommand);
ecdfa446
GKH		 5130 }
5131 else if(i==1){//MAC
5132 TargetContent = (u32)(*(MacAddr+2)) |
5133 (u32)(*(MacAddr+3)) << 8|
5134 (u32)(*(MacAddr+4)) << 16|
5135 (u32)(*(MacAddr+5)) << 24;
3f9ab1ee
MM		 5136 write_nic_dword(priv, WCAMI, TargetContent);
5137 write_nic_dword(priv, RWCAM, TargetCommand);
ecdfa446
GKH		 5138 }
5139 else { //Key Material
5140 if(KeyContent != NULL)
5141 {
3f9ab1ee
MM		 5142 write_nic_dword(priv, WCAMI, (u32)(*(KeyContent+i-2)) );
5143 write_nic_dword(priv, RWCAM, TargetCommand);
ecdfa446
GKH		 5144 }
5145 }
5146 }
5147 RT_TRACE(COMP_SEC,"=========>after set key, usconfig:%x\n", usConfig);
ecdfa446 5148}
ecdfa446 5149
65a43784 5150bool NicIFEnableNIC(struct net_device* dev)
5151{
5152 RT_STATUS init_status = RT_STATUS_SUCCESS;
5153 struct r8192_priv* priv = ieee80211_priv(dev);
5154 PRT_POWER_SAVE_CONTROL pPSC = (PRT_POWER_SAVE_CONTROL)(&(priv->ieee80211->PowerSaveControl));
5155
5156 //YJ,add,091109
5157 if (priv->up == 0){
5158 RT_TRACE(COMP_ERR, "ERR!!! %s(): Driver is already down!\n",__FUNCTION__);
5159 priv->bdisable_nic = false; //YJ,add,091111
5160 return false;
5161 }
5162 // <1> Reset memory: descriptor, buffer,..
5163 //NicIFResetMemory(Adapter);
5164
5165 // <2> Enable Adapter
65a43784 5166 //priv->bfirst_init = true;
5167 init_status = rtl8192_adapter_start(dev);
5168 if (init_status != RT_STATUS_SUCCESS) {
5169 RT_TRACE(COMP_ERR,"ERR!!! %s(): initialization is failed!\n",__FUNCTION__);
5170 priv->bdisable_nic = false; //YJ,add,091111
5171 return -1;
5172 }
65a43784 5173 RT_CLEAR_PS_LEVEL(pPSC, RT_RF_OFF_LEVL_HALT_NIC);
5174 //priv->bfirst_init = false;
5175
5176 // <3> Enable Interrupt
5177 rtl8192_irq_enable(dev);
5178 priv->bdisable_nic = false;
16d74da0 5179
c6eae677 5180 return (init_status == RT_STATUS_SUCCESS);
65a43784 5181}
214985a6 5182
65a43784 5183bool NicIFDisableNIC(struct net_device* dev)
5184{
5185 bool status = true;
5186 struct r8192_priv* priv = ieee80211_priv(dev);
5187 u8 tmp_state = 0;
5188 // <1> Disable Interrupt
16d74da0 5189
65a43784 5190 priv->bdisable_nic = true; //YJ,move,091109
5191 tmp_state = priv->ieee80211->state;
5192
5193 ieee80211_softmac_stop_protocol(priv->ieee80211, false);
5194
5195 priv->ieee80211->state = tmp_state;
5196 rtl8192_cancel_deferred_work(priv);
5197 rtl8192_irq_disable(dev);
5198 // <2> Stop all timer
5199
5200 // <3> Disable Adapter
5201 rtl8192_halt_adapter(dev, false);
5202// priv->bdisable_nic = true;
65a43784 5203
5204 return status;
5205}
5206
ecdfa446
GKH		 5207module_init(rtl8192_pci_module_init);
5208module_exit(rtl8192_pci_module_exit);
Linux kernel - Deliverables
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