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staging: rtl8192e: Convert typedef rate_adaptive to struct rate_adaptive
[deliverable/linux.git] / drivers / staging / rtl8192e / rtl_core.h
CommitLineData
94a79942
LF		 1/******************************************************************************
2 * Copyright(c) 2008 - 2010 Realtek Corporation. All rights reserved.
3 *
4 * Based on the r8180 driver, which is:
5 * Copyright 2004-2005 Andrea Merello <andreamrl@tiscali.it>, et al.
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of version 2 of the GNU General Public License as
8 * published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope that it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 * more details.
14 *
15 * You should have received a copy of the GNU General Public License along with
16 * this program; if not, write to the Free Software Foundation, Inc.,
17 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
18 *
19 * The full GNU General Public License is included in this distribution in the
20 * file called LICENSE.
21 *
22 * Contact Information:
23 * wlanfae <wlanfae@realtek.com>
24******************************************************************************/
25
26#ifndef _RTL_CORE_H
27#define _RTL_CORE_H
28
29#include <linux/module.h>
30#include <linux/kernel.h>
31#include <linux/init.h>
32#include <linux/ioport.h>
33#include <linux/sched.h>
34#include <linux/types.h>
35#include <linux/interrupt.h>
36#include <linux/slab.h>
37#include <linux/netdevice.h>
38#include <linux/pci.h>
39#include <linux/etherdevice.h>
40#include <linux/delay.h>
41#include <linux/rtnetlink.h>
42#include <linux/wireless.h>
43#include <linux/timer.h>
44#include <linux/proc_fs.h>
45#include <linux/if_arp.h>
46#include <linux/random.h>
47#include <linux/version.h>
48#include <asm/io.h>
94a79942
LF		 49#include "rtllib.h"
50
94a79942 51#include "dot11d.h"
94a79942
LF		 52
53#include "r8192E_firmware.h"
54#include "r8192E_hw.h"
55
56#include "r8190P_def.h"
57#include "r8192E_dev.h"
58
94a79942
LF		 59#include "rtl_debug.h"
60#include "rtl_eeprom.h"
61#include "rtl_ps.h"
62#include "rtl_pci.h"
63#include "rtl_cam.h"
64
65#define DRV_COPYRIGHT "Copyright(c) 2008 - 2010 Realsil Semiconductor Corporation"
66#define DRV_AUTHOR "<wlanfae@realtek.com>"
67#define DRV_VERSION "0014.0401.2010"
68
69#define DRV_NAME "rtl819xE"
70
71#define IS_HARDWARE_TYPE_819xP(_priv) ((((struct r8192_priv*)rtllib_priv(dev))->card_8192==NIC_8190P)||\
72 (((struct r8192_priv*)rtllib_priv(dev))->card_8192==NIC_8192E))
73#define IS_HARDWARE_TYPE_8192SE(_priv) (((struct r8192_priv*)rtllib_priv(dev))->card_8192==NIC_8192SE)
74#define IS_HARDWARE_TYPE_8192CE(_priv) (((struct r8192_priv*)rtllib_priv(dev))->card_8192==NIC_8192CE)
75#define IS_HARDWARE_TYPE_8192CU(_priv) (((struct r8192_priv*)rtllib_priv(dev))->card_8192==NIC_8192CU)
76#define IS_HARDWARE_TYPE_8192DE(_priv) (((struct r8192_priv*)rtllib_priv(dev))->card_8192==NIC_8192DE)
77#define IS_HARDWARE_TYPE_8192DU(_priv) (((struct r8192_priv*)rtllib_priv(dev))->card_8192==NIC_8192DU)
78
79#define RTL_PCI_DEVICE(vend, dev, cfg) \
80 .vendor = (vend), .device = (dev), \
81 .subvendor = PCI_ANY_ID, .subdevice =PCI_ANY_ID , \
82 .driver_data = (kernel_ulong_t)&(cfg)
83 typedef irqreturn_t irqreturn_type;
84
94a79942 85
cb762154 86#define rtl8192_interrupt(x,y,z) rtl8192_interrupt_rsl(x,y)
94a79942
LF		 87
88#define RTL_MAX_SCAN_SIZE 128
89
90#define RTL_RATE_MAX 30
91
92#define TOTAL_CAM_ENTRY 32
93#define CAM_CONTENT_COUNT 8
94
95#ifndef BIT
96#define BIT(_i) (1<<(_i))
97#endif
98
99#define IS_NIC_DOWN(priv) (!(priv)->up)
100
101#define IS_ADAPTER_SENDS_BEACON(dev) 0
102
103#define IS_UNDER_11N_AES_MODE(_rtllib) ((_rtllib->pHTInfo->bCurrentHTSupport == true) &&\
104 (_rtllib->pairwise_key_type == KEY_TYPE_CCMP))
105
106#define HAL_MEMORY_MAPPED_IO_RANGE_8190PCI 0x1000
107#define HAL_HW_PCI_REVISION_ID_8190PCI 0x00
108#define HAL_MEMORY_MAPPED_IO_RANGE_8192PCIE 0x4000
109#define HAL_HW_PCI_REVISION_ID_8192PCIE 0x01
110#define HAL_MEMORY_MAPPED_IO_RANGE_8192SE 0x4000
111#define HAL_HW_PCI_REVISION_ID_8192SE 0x10
112#define HAL_HW_PCI_REVISION_ID_8192CE 0x1
113#define HAL_MEMORY_MAPPED_IO_RANGE_8192CE 0x4000
114#define HAL_HW_PCI_REVISION_ID_8192DE 0x0
115#define HAL_MEMORY_MAPPED_IO_RANGE_8192DE 0x4000
116
117#define HAL_HW_PCI_8180_DEVICE_ID 0x8180
118#define HAL_HW_PCI_8185_DEVICE_ID 0x8185
119#define HAL_HW_PCI_8188_DEVICE_ID 0x8188
120#define HAL_HW_PCI_8198_DEVICE_ID 0x8198
121#define HAL_HW_PCI_8190_DEVICE_ID 0x8190
122#define HAL_HW_PCI_8192_DEVICE_ID 0x8192
123#define HAL_HW_PCI_8192SE_DEVICE_ID 0x8192
124#define HAL_HW_PCI_8174_DEVICE_ID 0x8174
125#define HAL_HW_PCI_8173_DEVICE_ID 0x8173
126#define HAL_HW_PCI_8172_DEVICE_ID 0x8172
127#define HAL_HW_PCI_8171_DEVICE_ID 0x8171
128#define HAL_HW_PCI_0045_DEVICE_ID 0x0045
129#define HAL_HW_PCI_0046_DEVICE_ID 0x0046
130#define HAL_HW_PCI_0044_DEVICE_ID 0x0044
131#define HAL_HW_PCI_0047_DEVICE_ID 0x0047
132#define HAL_HW_PCI_700F_DEVICE_ID 0x700F
133#define HAL_HW_PCI_701F_DEVICE_ID 0x701F
134#define HAL_HW_PCI_DLINK_DEVICE_ID 0x3304
135#define HAL_HW_PCI_8192CET_DEVICE_ID 0x8191
136#define HAL_HW_PCI_8192CE_DEVICE_ID 0x8178
137#define HAL_HW_PCI_8191CE_DEVICE_ID 0x8177
138#define HAL_HW_PCI_8188CE_DEVICE_ID 0x8176
139#define HAL_HW_PCI_8192CU_DEVICE_ID 0x8191
140#define HAL_HW_PCI_8192DE_DEVICE_ID 0x092D
141#define HAL_HW_PCI_8192DU_DEVICE_ID 0x092D
142
143#define RTL819X_DEFAULT_RF_TYPE RF_1T2R
144
145#define RTLLIB_WATCH_DOG_TIME 2000
146
147#define MAX_DEV_ADDR_SIZE 8 /* support till 64 bit bus width OS */
148#define MAX_FIRMWARE_INFORMATION_SIZE 32
149#define MAX_802_11_HEADER_LENGTH (40 + MAX_FIRMWARE_INFORMATION_SIZE)
150#define ENCRYPTION_MAX_OVERHEAD 128
151#define MAX_FRAGMENT_COUNT 8
152#define MAX_TRANSMIT_BUFFER_SIZE (1600+(MAX_802_11_HEADER_LENGTH+ENCRYPTION_MAX_OVERHEAD)*MAX_FRAGMENT_COUNT)
153
154#define scrclng 4
155
156#define DEFAULT_FRAG_THRESHOLD 2342U
157#define MIN_FRAG_THRESHOLD 256U
158#define DEFAULT_BEACONINTERVAL 0x64U
159
160#define DEFAULT_SSID ""
161#define DEFAULT_RETRY_RTS 7
162#define DEFAULT_RETRY_DATA 7
163#define PRISM_HDR_SIZE 64
164
165#define PHY_RSSI_SLID_WIN_MAX 100
166
167#define RTL_IOCTL_WPA_SUPPLICANT SIOCIWFIRSTPRIV+30
168
169#define TxBBGainTableLength 37
170#define CCKTxBBGainTableLength 23
171
172#define CHANNEL_PLAN_LEN 10
173#define sCrcLng 4
174
175#define NIC_SEND_HANG_THRESHOLD_NORMAL 4
176#define NIC_SEND_HANG_THRESHOLD_POWERSAVE 8
177
178#define MAX_TX_QUEUE 9
179
180#define MAX_RX_QUEUE 1
181
182#define MAX_RX_COUNT 64
183#define MAX_TX_QUEUE_COUNT 9
184
185enum RTL819x_PHY_PARAM {
186 RTL819X_PHY_MACPHY_REG = 0,
187 RTL819X_PHY_MACPHY_REG_PG = 1,
188 RTL8188C_PHY_MACREG =2,
189 RTL8192C_PHY_MACREG =3,
190 RTL819X_PHY_REG = 4,
191 RTL819X_PHY_REG_1T2R = 5,
192 RTL819X_PHY_REG_to1T1R = 6,
193 RTL819X_PHY_REG_to1T2R = 7,
194 RTL819X_PHY_REG_to2T2R = 8,
195 RTL819X_PHY_REG_PG = 9,
196 RTL819X_AGC_TAB = 10,
197 RTL819X_PHY_RADIO_A =11,
198 RTL819X_PHY_RADIO_A_1T =12,
199 RTL819X_PHY_RADIO_A_2T =13,
200 RTL819X_PHY_RADIO_B =14,
201 RTL819X_PHY_RADIO_B_GM =15,
202 RTL819X_PHY_RADIO_C =16,
203 RTL819X_PHY_RADIO_D =17,
204 RTL819X_EEPROM_MAP =18,
205 RTL819X_EFUSE_MAP =19,
206};
207
208enum RTL_DEBUG {
209 COMP_TRACE = BIT0,
210 COMP_DBG = BIT1,
211 COMP_INIT = BIT2,
212 COMP_RECV = BIT3,
213 COMP_SEND = BIT4,
214 COMP_CMD = BIT5,
215 COMP_POWER = BIT6,
216 COMP_EPROM = BIT7,
217 COMP_SWBW = BIT8,
218 COMP_SEC = BIT9,
219 COMP_LPS = BIT10,
220 COMP_QOS = BIT11,
221 COMP_RATE = BIT12,
222 COMP_RXDESC = BIT13,
223 COMP_PHY = BIT14,
224 COMP_DIG = BIT15,
225 COMP_TXAGC = BIT16,
226 COMP_HALDM = BIT17,
227 COMP_POWER_TRACKING = BIT18,
228 COMP_CH = BIT19,
229 COMP_RF = BIT20,
230 COMP_FIRMWARE = BIT21,
231 COMP_HT = BIT22,
232 COMP_RESET = BIT23,
233 COMP_CMDPKT = BIT24,
234 COMP_SCAN = BIT25,
235 COMP_PS = BIT26,
236 COMP_DOWN = BIT27,
237 COMP_INTR = BIT28,
238 COMP_LED = BIT29,
239 COMP_MLME = BIT30,
240 COMP_ERR = BIT31
241};
242
243typedef enum{
244 NIC_UNKNOWN = 0,
245 NIC_8192E = 1,
246 NIC_8190P = 2,
247 NIC_8192SE = 4,
248 NIC_8192CE = 5,
249 NIC_8192CU = 6,
250 NIC_8192DE = 7,
251 NIC_8192DU = 8,
252 } nic_t;
253
254typedef enum _RT_EEPROM_TYPE{
255 EEPROM_93C46,
256 EEPROM_93C56,
257 EEPROM_BOOT_EFUSE,
258}RT_EEPROM_TYPE,*PRT_EEPROM_TYPE;
259
260typedef enum _tag_TxCmd_Config_Index{
261 TXCMD_TXRA_HISTORY_CTRL = 0xFF900000,
262 TXCMD_RESET_TX_PKT_BUFF = 0xFF900001,
263 TXCMD_RESET_RX_PKT_BUFF = 0xFF900002,
264 TXCMD_SET_TX_DURATION = 0xFF900003,
265 TXCMD_SET_RX_RSSI = 0xFF900004,
266 TXCMD_SET_TX_PWR_TRACKING = 0xFF900005,
267 TXCMD_XXXX_CTRL,
268}DCMD_TXCMD_OP;
269
270typedef enum _RT_RF_TYPE_819xU{
271 RF_TYPE_MIN = 0,
272 RF_8225,
273 RF_8256,
274 RF_8258,
275 RF_6052=4,
276 RF_PSEUDO_11N = 5,
277}RT_RF_TYPE_819xU, *PRT_RF_TYPE_819xU;
278
279typedef enum tag_Rf_Operatetion_State
280{
281 RF_STEP_INIT = 0,
282 RF_STEP_NORMAL,
283 RF_STEP_MAX
284}RF_STEP_E;
285
286typedef enum _RT_STATUS{
287 RT_STATUS_SUCCESS,
288 RT_STATUS_FAILURE,
289 RT_STATUS_PENDING,
290 RT_STATUS_RESOURCE
291}RT_STATUS,*PRT_STATUS;
292
293typedef enum _RT_CUSTOMER_ID
294{
295 RT_CID_DEFAULT = 0,
296 RT_CID_8187_ALPHA0 = 1,
297 RT_CID_8187_SERCOMM_PS = 2,
298 RT_CID_8187_HW_LED = 3,
299 RT_CID_8187_NETGEAR = 4,
300 RT_CID_WHQL = 5,
301 RT_CID_819x_CAMEO = 6,
302 RT_CID_819x_RUNTOP = 7,
303 RT_CID_819x_Senao = 8,
304 RT_CID_TOSHIBA = 9,
305 RT_CID_819x_Netcore = 10,
306 RT_CID_Nettronix = 11,
307 RT_CID_DLINK = 12,
308 RT_CID_PRONET = 13,
309 RT_CID_COREGA = 14,
310 RT_CID_819x_ALPHA = 15,
311 RT_CID_819x_Sitecom = 16,
312 RT_CID_CCX = 17,
313 RT_CID_819x_Lenovo = 18,
314 RT_CID_819x_QMI = 19,
315 RT_CID_819x_Edimax_Belkin = 20,
316 RT_CID_819x_Sercomm_Belkin = 21,
317 RT_CID_819x_CAMEO1 = 22,
318 RT_CID_819x_MSI = 23,
319 RT_CID_819x_Acer = 24,
320 RT_CID_819x_HP =27,
321 RT_CID_819x_CLEVO = 28,
322 RT_CID_819x_Arcadyan_Belkin = 29,
323 RT_CID_819x_SAMSUNG = 30,
324 RT_CID_819x_WNC_COREGA = 31,
325}RT_CUSTOMER_ID, *PRT_CUSTOMER_ID;
326
327typedef enum _RESET_TYPE {
328 RESET_TYPE_NORESET = 0x00,
329 RESET_TYPE_NORMAL = 0x01,
330 RESET_TYPE_SILENT = 0x02
331} RESET_TYPE;
332
333typedef enum _IC_INFERIORITY_8192S{
334 IC_INFERIORITY_A = 0,
335 IC_INFERIORITY_B = 1,
336}IC_INFERIORITY_8192S, *PIC_INFERIORITY_8192S;
337
338typedef enum _PCI_BRIDGE_VENDOR {
339 PCI_BRIDGE_VENDOR_INTEL = 0x0,
340 PCI_BRIDGE_VENDOR_ATI,
341 PCI_BRIDGE_VENDOR_AMD,
342 PCI_BRIDGE_VENDOR_SIS ,
343 PCI_BRIDGE_VENDOR_UNKNOWN,
344 PCI_BRIDGE_VENDOR_MAX ,
345} PCI_BRIDGE_VENDOR;
346
347typedef struct buffer
348{
349 struct buffer *next;
350 u32 *buf;
351 dma_addr_t dma;
352
353} buffer;
354
ebbef649 355struct rtl_reg_debug {
94a79942
LF		 356 unsigned int cmd;
357 struct {
358 unsigned char type;
359 unsigned char addr;
360 unsigned char page;
361 unsigned char length;
362 } head;
363 unsigned char buf[0xff];
ebbef649 364};//;
94a79942 365
9c109856 366struct rt_tx_rahis {
94a79942
LF		 367 u32 cck[4];
368 u32 ofdm[8];
369 u32 ht_mcs[4][16];
9c109856 370};//, *prt_tx_rahis_t;
94a79942 371
9d94bbb8 372struct rt_smooth_data_4rf {
94a79942
LF		 373 char elements[4][100];
374 u32 index;
375 u32 TotalNum;
376 u32 TotalVal[4];
9d94bbb8 377};//, *struct rt_smooth_data_4rf *;
94a79942
LF		 378
379typedef struct Stats
380{
381 unsigned long txrdu;
382 unsigned long rxrdu;
383 unsigned long rxok;
384 unsigned long rxframgment;
385 unsigned long rxcmdpkt[4];
386 unsigned long rxurberr;
387 unsigned long rxstaterr;
388 unsigned long rxdatacrcerr;
389 unsigned long rxmgmtcrcerr;
390 unsigned long rxcrcerrmin;
391 unsigned long rxcrcerrmid;
392 unsigned long rxcrcerrmax;
393 unsigned long received_rate_histogram[4][32];
394 unsigned long received_preamble_GI[2][32];
395 unsigned long rx_AMPDUsize_histogram[5];
396 unsigned long rx_AMPDUnum_histogram[5];
397 unsigned long numpacket_matchbssid;
398 unsigned long numpacket_toself;
399 unsigned long num_process_phyinfo;
400 unsigned long numqry_phystatus;
401 unsigned long numqry_phystatusCCK;
402 unsigned long numqry_phystatusHT;
403 unsigned long received_bwtype[5];
404 unsigned long txnperr;
405 unsigned long txnpdrop;
406 unsigned long txresumed;
407 unsigned long rxoverflow;
408 unsigned long rxint;
409 unsigned long txnpokint;
410 unsigned long ints;
411 unsigned long shints;
412 unsigned long txoverflow;
413 unsigned long txlpokint;
414 unsigned long txlpdrop;
415 unsigned long txlperr;
416 unsigned long txbeokint;
417 unsigned long txbedrop;
418 unsigned long txbeerr;
419 unsigned long txbkokint;
420 unsigned long txbkdrop;
421 unsigned long txbkerr;
422 unsigned long txviokint;
423 unsigned long txvidrop;
424 unsigned long txvierr;
425 unsigned long txvookint;
426 unsigned long txvodrop;
427 unsigned long txvoerr;
428 unsigned long txbeaconokint;
429 unsigned long txbeacondrop;
430 unsigned long txbeaconerr;
431 unsigned long txmanageokint;
432 unsigned long txmanagedrop;
433 unsigned long txmanageerr;
434 unsigned long txcmdpktokint;
435 unsigned long txdatapkt;
436 unsigned long txfeedback;
437 unsigned long txfeedbackok;
438 unsigned long txoktotal;
439 unsigned long txokbytestotal;
440 unsigned long txokinperiod;
441 unsigned long txmulticast;
442 unsigned long txbytesmulticast;
443 unsigned long txbroadcast;
444 unsigned long txbytesbroadcast;
445 unsigned long txunicast;
446 unsigned long txbytesunicast;
447 unsigned long rxbytesunicast;
448 unsigned long txfeedbackfail;
449 unsigned long txerrtotal;
450 unsigned long txerrbytestotal;
451 unsigned long txerrmulticast;
452 unsigned long txerrbroadcast;
453 unsigned long txerrunicast;
454 unsigned long txretrycount;
455 unsigned long txfeedbackretry;
456 u8 last_packet_rate;
457 unsigned long slide_signal_strength[100];
458 unsigned long slide_evm[100];
459 unsigned long slide_rssi_total;
460 unsigned long slide_evm_total;
461 long signal_strength;
462 long signal_quality;
463 long last_signal_strength_inpercent;
464 long recv_signal_power;
465 u8 rx_rssi_percentage[4];
466 u8 rx_evm_percentage[2];
467 long rxSNRdB[4];
9c109856 468 struct rt_tx_rahis txrate;
94a79942
LF		 469 u32 Slide_Beacon_pwdb[100];
470 u32 Slide_Beacon_Total;
9d94bbb8 471 struct rt_smooth_data_4rf cck_adc_pwdb;
94a79942
LF		 472 u32 CurrentShowTxate;
473} Stats;
474
e91dbf03 475struct channel_access_setting {
94a79942
LF		 476 u16 SIFS_Timer;
477 u16 DIFS_Timer;
478 u16 SlotTimeTimer;
479 u16 EIFS_Timer;
480 u16 CWminIndex;
481 u16 CWmaxIndex;
e91dbf03 482};
94a79942
LF		 483
484typedef enum _TWO_PORT_STATUS
485{
486 TWO_PORT_STATUS__DEFAULT_ONLY,
487 TWO_PORT_STATUS__EXTENSION_ONLY,
488 TWO_PORT_STATUS__EXTENSION_FOLLOW_DEFAULT,
489 TWO_PORT_STATUS__DEFAULT_G_EXTENSION_N20,
490 TWO_PORT_STATUS__ADHOC,
491 TWO_PORT_STATUS__WITHOUT_ANY_ASSOCIATE
492}TWO_PORT_STATUS;
493
031189ec 494struct txbbgain_struct {
94a79942
LF		 495 long txbb_iq_amplifygain;
496 u32 txbbgain_value;
031189ec 497};
94a79942 498
d514e345 499struct ccktxbbgain {
94a79942 500 u8 ccktxbb_valuearray[8];
d514e345 501};
94a79942 502
43267fef 503struct init_gain {
94a79942
LF		 504 u8 xaagccore1;
505 u8 xbagccore1;
506 u8 xcagccore1;
507 u8 xdagccore1;
508 u8 cca;
509
43267fef 510};
94a79942 511
b7a14040 512struct tx_ring {
94a79942
LF		 513 u32 * desc;
514 u8 nStuckCount;
b7a14040
LF		 515 struct tx_ring * next;
516} __packed;
94a79942
LF		 517
518struct rtl8192_tx_ring {
bc27e89b 519 struct tx_desc *desc;
94a79942
LF		 520 dma_addr_t dma;
521 unsigned int idx;
522 unsigned int entries;
523 struct sk_buff_head queue;
524};
525
526
527
528struct rtl819x_ops{
529 nic_t nic_type;
530 void (* get_eeprom_size)(struct net_device* dev);
531 void (* init_adapter_variable)(struct net_device* dev);
532 void (* init_before_adapter_start)(struct net_device* dev);
533 bool (* initialize_adapter)(struct net_device* dev);
534 void (*link_change)(struct net_device* dev);
3b83db43
LF		 535 void (* tx_fill_descriptor)(struct net_device* dev, struct tx_desc *tx_desc, struct cb_desc *cb_desc, struct sk_buff *skb);
536 void (* tx_fill_cmd_descriptor)(struct net_device* dev, struct tx_desc_cmd * entry, struct cb_desc *cb_desc, struct sk_buff *skb);
4f534b36
LF		 537 bool (* rx_query_status_descriptor)(struct net_device* dev, struct rtllib_rx_stats* stats, struct rx_desc *pdesc, struct sk_buff* skb);
538 bool (* rx_command_packet_handler)(struct net_device *dev, struct sk_buff* skb, struct rx_desc *pdesc);
94a79942
LF		 539 void (* stop_adapter)(struct net_device *dev, bool reset);
540 void (* update_ratr_table)(struct net_device* dev);
541 void (* irq_enable)(struct net_device* dev);
542 void (* irq_disable)(struct net_device* dev);
543 void (* irq_clear)(struct net_device* dev);
544 void (* rx_enable)(struct net_device* dev);
545 void (* tx_enable)(struct net_device* dev);
546 void (* interrupt_recognized)(struct net_device *dev, u32 *p_inta, u32 *p_intb);
547 bool (* TxCheckStuckHandler)(struct net_device* dev);
548 bool (* RxCheckStuckHandler)(struct net_device* dev);
549};
550
551typedef struct r8192_priv
552{
553 struct pci_dev *pdev;
554 struct pci_dev *bridge_pdev;
555
94a79942
LF		 556 bool bfirst_init;
557 bool bfirst_after_down;
558 bool initialized_at_probe;
559 bool being_init_adapter;
560 bool bDriverIsGoingToUnload;
561
562 int irq;
563 short irq_enabled;
564
565 short up;
566 short up_first_time;
567 delayed_work_struct_rsl update_beacon_wq;
568 delayed_work_struct_rsl watch_dog_wq;
569 delayed_work_struct_rsl txpower_tracking_wq;
570 delayed_work_struct_rsl rfpath_check_wq;
571 delayed_work_struct_rsl gpio_change_rf_wq;
572 delayed_work_struct_rsl initialgain_operate_wq;
573 delayed_work_struct_rsl check_hw_scan_wq;
574 delayed_work_struct_rsl hw_scan_simu_wq;
575 delayed_work_struct_rsl start_hw_scan_wq;
576
577 struct workqueue_struct *priv_wq;
578
e91dbf03 579 struct channel_access_setting ChannelAccessSetting;
94a79942
LF		 580
581 mp_adapter NdisAdapter;
582
583 struct rtl819x_ops *ops;
584 struct rtllib_device *rtllib;
585
94a79942
LF		 586 work_struct_rsl reset_wq;
587
c13ac63b 588 struct log_int_8190 InterruptLog;
94a79942
LF		 589
590 RT_CUSTOMER_ID CustomerID;
591
592
593 RT_RF_TYPE_819xU rf_chip;
594 IC_INFERIORITY_8192S IC_Class;
595 HT_CHANNEL_WIDTH CurrentChannelBW;
9bf6e4c1 596 struct bb_reg_definition PHYRegDef[4];
9be6f10e 597 struct rate_adaptive rate_adaptive;
94a79942 598
d514e345
LF		 599 struct ccktxbbgain cck_txbbgain_table[CCKTxBBGainTableLength];
600 struct ccktxbbgain cck_txbbgain_ch14_table[CCKTxBBGainTableLength];
94a79942 601
031189ec 602 struct txbbgain_struct txbbgain_table[TxBBGainTableLength];
94a79942
LF		 603
604 ACM_METHOD AcmMethod;
605
5aca114d 606 struct rt_firmware *pFirmware;
94a79942
LF		 607 rtl819x_loopback_e LoopbackMode;
608 firmware_source_e firmware_source;
609
610 struct timer_list watch_dog_timer;
611 struct timer_list fsync_timer;
612 struct timer_list gpio_polling_timer;
613
614 spinlock_t fw_scan_lock;
615 spinlock_t irq_lock;
616 spinlock_t irq_th_lock;
617 spinlock_t tx_lock;
618 spinlock_t rf_ps_lock;
619 spinlock_t rw_lock;
620 spinlock_t rt_h2c_lock;
94a79942
LF		 621 spinlock_t rf_lock;
622 spinlock_t ps_lock;
623
624 struct sk_buff_head rx_queue;
625 struct sk_buff_head skb_queue;
626
627 struct tasklet_struct irq_rx_tasklet;
628 struct tasklet_struct irq_tx_tasklet;
629 struct tasklet_struct irq_prepare_beacon_tasklet;
630
631 struct semaphore wx_sem;
632 struct semaphore rf_sem;
94a79942 633 struct mutex mutex;
94a79942
LF		 634
635 struct Stats stats;
636 struct iw_statistics wstats;
637 struct proc_dir_entry *dir_dev;
638
639 short (*rf_set_sens)(struct net_device *dev,short sens);
640 u8 (*rf_set_chan)(struct net_device *dev,u8 ch);
641 void (*rf_close)(struct net_device *dev);
642 void (*rf_init)(struct net_device *dev);
643
4f534b36 644 struct rx_desc *rx_ring[MAX_RX_QUEUE];
94a79942
LF		 645 struct sk_buff *rx_buf[MAX_RX_QUEUE][MAX_RX_COUNT];
646 dma_addr_t rx_ring_dma[MAX_RX_QUEUE];
647 unsigned int rx_idx[MAX_RX_QUEUE];
648 int rxringcount;
649 u16 rxbuffersize;
650
651 u32 LastRxDescTSFHigh;
652 u32 LastRxDescTSFLow;
653
654 u16 EarlyRxThreshold;
655 u32 ReceiveConfig;
656 u8 AcmControl;
657 u8 RFProgType;
658 u8 retry_data;
659 u8 retry_rts;
660 u16 rts;
661
662 struct rtl8192_tx_ring tx_ring[MAX_TX_QUEUE_COUNT];
663 int txringcount;
664 int txbuffsize;
665 int txfwbuffersize;
666 atomic_t tx_pending[0x10];
667
668 u16 ShortRetryLimit;
669 u16 LongRetryLimit;
670 u32 TransmitConfig;
671 u8 RegCWinMin;
672 u8 keepAliveLevel;
673
94a79942
LF		 674 bool sw_radio_on;
675 bool bHwRadioOff;
676 bool pwrdown;
677 bool blinked_ingpio;
678 u8 polling_timer_on;
679
680 /**********************************************************/
681
682 enum card_type {PCI,MINIPCI,CARDBUS,USB}card_type;
683
684 work_struct_rsl qos_activate;
685
686 u8 bIbssCoordinator;
687
688 short promisc;
689 short crcmon;
690
691 int txbeaconcount;
692
693 short chan;
694 short sens;
695 short max_sens;
696 u32 rx_prevlen;
697
698 u8 ScanDelay;
699 bool ps_force;
700
701 u32 irq_mask[2];
702
703 u8 Rf_Mode;
704 nic_t card_8192;
705 u8 card_8192_version;
706
707 short enable_gpio0;
708
709 u8 rf_type;
710 u8 IC_Cut;
711 char nick[IW_ESSID_MAX_SIZE + 1];
712
713 u8 RegBcnCtrlVal;
714 bool bHwAntDiv;
715
716 bool bTKIPinNmodeFromReg;
717 bool bWEPinNmodeFromReg;
718
719 bool bLedOpenDrain;
720
721 u8 check_roaming_cnt;
722
723 bool bIgnoreSilentReset;
724 u32 SilentResetRxSoltNum;
725 u32 SilentResetRxSlotIndex;
726 u32 SilentResetRxStuckEvent[MAX_SILENT_RESET_RX_SLOT_NUM];
727
728 void *scan_cmd;
729 u8 hwscan_bw_40;
730
731 u16 nrxAMPDU_size;
732 u8 nrxAMPDU_aggr_num;
733
734 u32 last_rxdesc_tsf_high;
735 u32 last_rxdesc_tsf_low;
736
737
738 u16 basic_rate;
739 u8 short_preamble;
740 u8 dot11CurrentPreambleMode;
741 u8 slot_time;
742 u16 SifsTime;
743
744 u8 RegWirelessMode;
745
746 u8 firmware_version;
747 u16 FirmwareSubVersion;
748 u16 rf_pathmap;
749 bool AutoloadFailFlag;
750
751 u8 RegPciASPM;
752 u8 RegAMDPciASPM;
753 u8 RegHwSwRfOffD3;
754 u8 RegSupportPciASPM;
755 bool bSupportASPM;
756
757 u32 RfRegChnlVal[2];
758
759 u8 ShowRateMode;
760 u8 RATRTableBitmap;
761
762 u8 EfuseMap[2][HWSET_MAX_SIZE_92S];
763 u16 EfuseUsedBytes;
764 u8 EfuseUsedPercentage;
765
94a79942
LF		 766 short epromtype;
767 u16 eeprom_vid;
768 u16 eeprom_did;
769 u16 eeprom_svid;
770 u16 eeprom_smid;
771 u8 eeprom_CustomerID;
772 u16 eeprom_ChannelPlan;
773 u8 eeprom_version;
774
775 u8 EEPROMRegulatory;
776 u8 EEPROMPwrGroup[2][3];
777 u8 EEPROMOptional;
778
94a79942
LF		 779 u8 EEPROMTxPowerLevelCCK[14];
780 u8 EEPROMTxPowerLevelOFDM24G[14];
781 u8 EEPROMTxPowerLevelOFDM5G[24];
94a79942
LF		 782 u8 EEPROMRfACCKChnl1TxPwLevel[3];
783 u8 EEPROMRfAOfdmChnlTxPwLevel[3];
784 u8 EEPROMRfCCCKChnl1TxPwLevel[3];
785 u8 EEPROMRfCOfdmChnlTxPwLevel[3];
786 u16 EEPROMTxPowerDiff;
787 u16 EEPROMAntPwDiff;
788 u8 EEPROMThermalMeter;
789 u8 EEPROMPwDiff;
790 u8 EEPROMCrystalCap;
791
792 u8 EEPROMBluetoothCoexist;
793 u8 EEPROMBluetoothType;
794 u8 EEPROMBluetoothAntNum;
795 u8 EEPROMBluetoothAntIsolation;
796 u8 EEPROMBluetoothRadioShared;
797
798
799 u8 EEPROMSupportWoWLAN;
800 u8 EEPROMBoardType;
801 u8 EEPROM_Def_Ver;
802 u8 EEPROMHT2T_TxPwr[6];
803 u8 EEPROMTSSI_A;
804 u8 EEPROMTSSI_B;
805 u8 EEPROMTxPowerLevelCCK_V1[3];
806 u8 EEPROMLegacyHTTxPowerDiff;
807
808 u8 BluetoothCoexist;
809
810 u8 CrystalCap;
811 u8 ThermalMeter[2];
812
813 u16 FwCmdIOMap;
814 u32 FwCmdIOParam;
815
816 u8 SwChnlInProgress;
817 u8 SwChnlStage;
818 u8 SwChnlStep;
819 u8 SetBWModeInProgress;
820
821 u8 nCur40MhzPrimeSC;
822
823 u32 RfReg0Value[4];
824 u8 NumTotalRFPath;
825 bool brfpath_rxenable[4];
826
827 bool bTXPowerDataReadFromEEPORM;
828
829 u16 RegChannelPlan;
830 u16 ChannelPlan;
831 bool bChnlPlanFromHW;
832
833 bool RegRfOff;
834 bool isRFOff;
835 bool bInPowerSaveMode;
836 u8 bHwRfOffAction;
837
838 bool aspm_clkreq_enable;
839 u32 pci_bridge_vendor;
840 u8 RegHostPciASPMSetting;
841 u8 RegDevicePciASPMSetting;
842
843 bool RFChangeInProgress;
844 bool SetRFPowerStateInProgress;
845 bool bdisable_nic;
846
847 u8 pwrGroupCnt;
848
849 u8 ThermalValue_LCK;
850 u8 ThermalValue_IQK;
851 bool bRfPiEnable;
852
853 u32 APKoutput[2][2];
854 bool bAPKdone;
855
856 long RegE94;
857 long RegE9C;
858 long RegEB4;
859 long RegEBC;
860
861 u32 RegC04;
862 u32 Reg874;
863 u32 RegC08;
864 u32 ADDA_backup[16];
865 u32 IQK_MAC_backup[3];
866
867 bool SetFwCmdInProgress;
868 u8 CurrentFwCmdIO;
869
870 u8 rssi_level;
871
872 bool bInformFWDriverControlDM;
873 u8 PwrGroupHT20[2][14];
874 u8 PwrGroupHT40[2][14];
875
876 u8 ThermalValue;
877 long EntryMinUndecoratedSmoothedPWDB;
878 long EntryMaxUndecoratedSmoothedPWDB;
879 u8 DynamicTxHighPowerLvl;
880 u8 LastDTPLvl;
881 u32 CurrentRATR0;
38b1f67d 882 struct false_alarm_stats FalseAlmCnt;
94a79942
LF		 883
884 u8 DMFlag;
885 u8 DM_Type;
886
887 u8 CckPwEnl;
888 u16 TSSI_13dBm;
889 u32 Pwr_Track;
890 u8 CCKPresentAttentuation_20Mdefault;
891 u8 CCKPresentAttentuation_40Mdefault;
892 char CCKPresentAttentuation_difference;
893 char CCKPresentAttentuation;
894 u8 bCckHighPower;
895 long undecorated_smoothed_pwdb;
896 long undecorated_smoothed_cck_adc_pwdb[4];
897
898 u32 MCSTxPowerLevelOriginalOffset[6];
899 u32 CCKTxPowerLevelOriginalOffset;
900 u8 TxPowerLevelCCK[14];
901 u8 TxPowerLevelCCK_A[14];
902 u8 TxPowerLevelCCK_C[14];
903 u8 TxPowerLevelOFDM24G[14];
904 u8 TxPowerLevelOFDM5G[14];
905 u8 TxPowerLevelOFDM24G_A[14];
906 u8 TxPowerLevelOFDM24G_C[14];
907 u8 LegacyHTTxPowerDiff;
908 u8 TxPowerDiff;
909 s8 RF_C_TxPwDiff;
910 s8 RF_B_TxPwDiff;
911 u8 RfTxPwrLevelCck[2][14];
912 u8 RfTxPwrLevelOfdm1T[2][14];
913 u8 RfTxPwrLevelOfdm2T[2][14];
914 u8 AntennaTxPwDiff[3];
915 u8 TxPwrHt20Diff[2][14];
916 u8 TxPwrLegacyHtDiff[2][14];
917 u8 TxPwrSafetyFlag;
918 u8 HT2T_TxPwr_A[14];
919 u8 HT2T_TxPwr_B[14];
920 u8 CurrentCckTxPwrIdx;
921 u8 CurrentOfdm24GTxPwrIdx;
922
923 bool bdynamic_txpower;
924 bool bDynamicTxHighPower;
925 bool bDynamicTxLowPower;
926 bool bLastDTPFlag_High;
927 bool bLastDTPFlag_Low;
928
929 bool bstore_last_dtpflag;
930 bool bstart_txctrl_bydtp;
931
932 u8 rfa_txpowertrackingindex;
933 u8 rfa_txpowertrackingindex_real;
934 u8 rfa_txpowertracking_default;
935 u8 rfc_txpowertrackingindex;
936 u8 rfc_txpowertrackingindex_real;
937 u8 rfc_txpowertracking_default;
938 bool btxpower_tracking;
939 bool bcck_in_ch14;
940
941 u8 TxPowerTrackControl;
942 u8 txpower_count;
943 bool btxpower_trackingInit;
944
945 u8 OFDM_index[2];
946 u8 CCK_index;
947
948 u8 Record_CCK_20Mindex;
949 u8 Record_CCK_40Mindex;
950
43267fef 951 struct init_gain initgain_backup;
94a79942
LF		 952 u8 DefaultInitialGain[4];
953 bool bis_any_nonbepkts;
954 bool bcurrent_turbo_EDCA;
955 bool bis_cur_rdlstate;
956
957 bool bCCKinCH14;
958
959 u8 MidHighPwrTHR_L1;
960 u8 MidHighPwrTHR_L2;
961
962 bool bfsync_processing;
963 u32 rate_record;
964 u32 rateCountDiffRecord;
965 u32 ContiuneDiffCount;
966 bool bswitch_fsync;
967 u8 framesync;
968 u32 framesyncC34;
969 u8 framesyncMonitor;
970
971 bool bDMInitialGainEnable;
972 bool MutualAuthenticationFail;
973
974 bool bDisableFrameBursting;
975
976 u32 reset_count;
977 bool bpbc_pressed;
978
979 u32 txpower_checkcnt;
980 u32 txpower_tracking_callback_cnt;
981 u8 thermal_read_val[40];
982 u8 thermal_readback_index;
983 u32 ccktxpower_adjustcnt_not_ch14;
984 u32 ccktxpower_adjustcnt_ch14;
985
986 RESET_TYPE ResetProgress;
987 bool bForcedSilentReset;
988 bool bDisableNormalResetCheck;
989 u16 TxCounter;
990 u16 RxCounter;
991 int IrpPendingCount;
992 bool bResetInProgress;
993 bool force_reset;
994 bool force_lps;
995 u8 InitialGainOperateType;
996
997 bool chan_forced;
998 bool bSingleCarrier;
999 bool RegBoard;
1000 bool bCckContTx;
1001 bool bOfdmContTx;
1002 bool bStartContTx;
1003 u8 RegPaModel;
1004 u8 btMpCckTxPower;
1005 u8 btMpOfdmTxPower;
1006
1007 u32 MptActType;
1008 u32 MptIoOffset;
1009 u32 MptIoValue;
1010 u32 MptRfPath;
1011
1012 u32 MptBandWidth;
1013 u32 MptRateIndex;
1014 u8 MptChannelToSw;
1015 u32 MptRCR;
1016
1017 u8 PwrDomainProtect;
1018 u8 H2CTxCmdSeq;
1019
1020
1021}r8192_priv;
1022
1023extern const struct ethtool_ops rtl819x_ethtool_ops;
1024
1025void rtl8192_tx_cmd(struct net_device *dev, struct sk_buff *skb);
1026short rtl8192_tx(struct net_device *dev, struct sk_buff* skb);
1027
1028u8 read_nic_io_byte(struct net_device *dev, int x);
1029u32 read_nic_io_dword(struct net_device *dev, int x);
1030u16 read_nic_io_word(struct net_device *dev, int x) ;
1031void write_nic_io_byte(struct net_device *dev, int x,u8 y);
1032void write_nic_io_word(struct net_device *dev, int x,u16 y);
1033void write_nic_io_dword(struct net_device *dev, int x,u32 y);
1034
1035u8 read_nic_byte(struct net_device *dev, int x);
1036u32 read_nic_dword(struct net_device *dev, int x);
1037u16 read_nic_word(struct net_device *dev, int x) ;
1038void write_nic_byte(struct net_device *dev, int x,u8 y);
1039void write_nic_word(struct net_device *dev, int x,u16 y);
1040void write_nic_dword(struct net_device *dev, int x,u32 y);
1041
1042void force_pci_posting(struct net_device *dev);
1043
1044void rtl8192_rx_enable(struct net_device *);
1045void rtl8192_tx_enable(struct net_device *);
1046
1047int rtl8192_hard_start_xmit(struct sk_buff *skb,struct net_device *dev);
1048void rtl8192_hard_data_xmit(struct sk_buff *skb, struct net_device *dev, int rate);
1049void rtl8192_data_hard_stop(struct net_device *dev);
1050void rtl8192_data_hard_resume(struct net_device *dev);
1051void rtl8192_restart(void *data);
1052void rtl819x_watchdog_wqcallback(void *data);
1053void rtl8192_hw_sleep_wq (void *data);
1054void watch_dog_timer_callback(unsigned long data);
1055void rtl8192_irq_rx_tasklet(struct r8192_priv *priv);
1056void rtl8192_irq_tx_tasklet(struct r8192_priv *priv);
1057int rtl8192_down(struct net_device *dev,bool shutdownrf);
1058int rtl8192_up(struct net_device *dev);
1059void rtl8192_commit(struct net_device *dev);
1060void rtl8192_set_chan(struct net_device *dev,short ch);
1061
1062void check_rfctrl_gpio_timer(unsigned long data);
1063
1064void rtl8192_hw_wakeup_wq(void *data);
1065irqreturn_type rtl8192_interrupt(int irq, void *netdev, struct pt_regs *regs);
1066
1067short rtl8192_pci_initdescring(struct net_device *dev);
1068
1069void rtl8192_cancel_deferred_work(struct r8192_priv* priv);
1070
1071int _rtl8192_up(struct net_device *dev,bool is_silent_reset);
1072
1073short rtl8192_is_tx_queue_empty(struct net_device *dev);
1074void rtl8192_irq_disable(struct net_device *dev);
1075
1076void rtl8192_tx_timeout(struct net_device *dev);
1077void rtl8192_pci_resetdescring(struct net_device *dev);
1078void rtl8192_SetWirelessMode(struct net_device* dev, u8 wireless_mode);
1079void rtl8192_irq_enable(struct net_device *dev);
1080void rtl8192_config_rate(struct net_device* dev, u16* rate_config);
1081void rtl8192_update_cap(struct net_device* dev, u16 cap);
1082void rtl8192_irq_disable(struct net_device *dev);
1083
1084void rtl819x_UpdateRxPktTimeStamp (struct net_device *dev, struct rtllib_rx_stats *stats);
1085long rtl819x_translate_todbm(struct r8192_priv * priv, u8 signal_strength_index );
1086void rtl819x_update_rxsignalstatistics8190pci(struct r8192_priv * priv,struct rtllib_rx_stats * pprevious_stats);
1087u8 rtl819x_evm_dbtopercentage(char value);
1088void rtl819x_process_cck_rxpathsel(struct r8192_priv * priv,struct rtllib_rx_stats * pprevious_stats);
1089u8 rtl819x_query_rxpwrpercentage( char antpower );
1090void rtl8192_record_rxdesc_forlateruse(struct rtllib_rx_stats * psrc_stats,struct rtllib_rx_stats * ptarget_stats);
1091
1092bool NicIFEnableNIC(struct net_device* dev);
1093bool NicIFDisableNIC(struct net_device* dev);
1094
1095bool
1096MgntActSet_RF_State(
1097 struct net_device* dev,
1098 RT_RF_POWER_STATE StateToSet,
1099 RT_RF_CHANGE_SOURCE ChangeSource,
1100 bool ProtectOrNot
1101 );
1102void
1103ActUpdateChannelAccessSetting(
1104 struct net_device* dev,
1105 WIRELESS_MODE WirelessMode,
e91dbf03 1106 struct channel_access_setting *ChnlAccessSetting
94a79942
LF		 1107 );
1108
94a79942 1109#endif
Linux kernel - Deliverables
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