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staging: rtl8192e: Convert typedef MIMO_EVM to struct mimo_evm
[deliverable/linux.git] / drivers / staging / rtl8192e / rtl_core.h
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94a79942
LF		 1/******************************************************************************
2 * Copyright(c) 2008 - 2010 Realtek Corporation. All rights reserved.
3 *
4 * Based on the r8180 driver, which is:
5 * Copyright 2004-2005 Andrea Merello <andreamrl@tiscali.it>, et al.
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of version 2 of the GNU General Public License as
8 * published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope that it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 * more details.
14 *
15 * You should have received a copy of the GNU General Public License along with
16 * this program; if not, write to the Free Software Foundation, Inc.,
17 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
18 *
19 * The full GNU General Public License is included in this distribution in the
20 * file called LICENSE.
21 *
22 * Contact Information:
23 * wlanfae <wlanfae@realtek.com>
24******************************************************************************/
25
26#ifndef _RTL_CORE_H
27#define _RTL_CORE_H
28
29#include <linux/module.h>
30#include <linux/kernel.h>
31#include <linux/init.h>
32#include <linux/ioport.h>
33#include <linux/sched.h>
34#include <linux/types.h>
35#include <linux/interrupt.h>
36#include <linux/slab.h>
37#include <linux/netdevice.h>
38#include <linux/pci.h>
39#include <linux/etherdevice.h>
40#include <linux/delay.h>
41#include <linux/rtnetlink.h>
42#include <linux/wireless.h>
43#include <linux/timer.h>
44#include <linux/proc_fs.h>
45#include <linux/if_arp.h>
46#include <linux/random.h>
47#include <linux/version.h>
48#include <asm/io.h>
94a79942
LF		 49#include "rtllib.h"
50
94a79942 51#include "dot11d.h"
94a79942
LF		 52
53#include "r8192E_firmware.h"
54#include "r8192E_hw.h"
55
56#include "r8190P_def.h"
57#include "r8192E_dev.h"
58
94a79942
LF		 59#include "rtl_debug.h"
60#include "rtl_eeprom.h"
61#include "rtl_ps.h"
62#include "rtl_pci.h"
63#include "rtl_cam.h"
64
65#define DRV_COPYRIGHT "Copyright(c) 2008 - 2010 Realsil Semiconductor Corporation"
66#define DRV_AUTHOR "<wlanfae@realtek.com>"
67#define DRV_VERSION "0014.0401.2010"
68
69#define DRV_NAME "rtl819xE"
70
71#define IS_HARDWARE_TYPE_819xP(_priv) ((((struct r8192_priv*)rtllib_priv(dev))->card_8192==NIC_8190P)||\
72 (((struct r8192_priv*)rtllib_priv(dev))->card_8192==NIC_8192E))
73#define IS_HARDWARE_TYPE_8192SE(_priv) (((struct r8192_priv*)rtllib_priv(dev))->card_8192==NIC_8192SE)
74#define IS_HARDWARE_TYPE_8192CE(_priv) (((struct r8192_priv*)rtllib_priv(dev))->card_8192==NIC_8192CE)
75#define IS_HARDWARE_TYPE_8192CU(_priv) (((struct r8192_priv*)rtllib_priv(dev))->card_8192==NIC_8192CU)
76#define IS_HARDWARE_TYPE_8192DE(_priv) (((struct r8192_priv*)rtllib_priv(dev))->card_8192==NIC_8192DE)
77#define IS_HARDWARE_TYPE_8192DU(_priv) (((struct r8192_priv*)rtllib_priv(dev))->card_8192==NIC_8192DU)
78
79#define RTL_PCI_DEVICE(vend, dev, cfg) \
80 .vendor = (vend), .device = (dev), \
81 .subvendor = PCI_ANY_ID, .subdevice =PCI_ANY_ID , \
82 .driver_data = (kernel_ulong_t)&(cfg)
83 typedef irqreturn_t irqreturn_type;
84
94a79942 85
cb762154 86#define rtl8192_interrupt(x,y,z) rtl8192_interrupt_rsl(x,y)
94a79942
LF		 87
88#define RTL_MAX_SCAN_SIZE 128
89
90#define RTL_RATE_MAX 30
91
92#define TOTAL_CAM_ENTRY 32
93#define CAM_CONTENT_COUNT 8
94
95#ifndef BIT
96#define BIT(_i) (1<<(_i))
97#endif
98
99#define IS_NIC_DOWN(priv) (!(priv)->up)
100
101#define IS_ADAPTER_SENDS_BEACON(dev) 0
102
103#define IS_UNDER_11N_AES_MODE(_rtllib) ((_rtllib->pHTInfo->bCurrentHTSupport == true) &&\
104 (_rtllib->pairwise_key_type == KEY_TYPE_CCMP))
105
106#define HAL_MEMORY_MAPPED_IO_RANGE_8190PCI 0x1000
107#define HAL_HW_PCI_REVISION_ID_8190PCI 0x00
108#define HAL_MEMORY_MAPPED_IO_RANGE_8192PCIE 0x4000
109#define HAL_HW_PCI_REVISION_ID_8192PCIE 0x01
110#define HAL_MEMORY_MAPPED_IO_RANGE_8192SE 0x4000
111#define HAL_HW_PCI_REVISION_ID_8192SE 0x10
112#define HAL_HW_PCI_REVISION_ID_8192CE 0x1
113#define HAL_MEMORY_MAPPED_IO_RANGE_8192CE 0x4000
114#define HAL_HW_PCI_REVISION_ID_8192DE 0x0
115#define HAL_MEMORY_MAPPED_IO_RANGE_8192DE 0x4000
116
117#define HAL_HW_PCI_8180_DEVICE_ID 0x8180
118#define HAL_HW_PCI_8185_DEVICE_ID 0x8185
119#define HAL_HW_PCI_8188_DEVICE_ID 0x8188
120#define HAL_HW_PCI_8198_DEVICE_ID 0x8198
121#define HAL_HW_PCI_8190_DEVICE_ID 0x8190
122#define HAL_HW_PCI_8192_DEVICE_ID 0x8192
123#define HAL_HW_PCI_8192SE_DEVICE_ID 0x8192
124#define HAL_HW_PCI_8174_DEVICE_ID 0x8174
125#define HAL_HW_PCI_8173_DEVICE_ID 0x8173
126#define HAL_HW_PCI_8172_DEVICE_ID 0x8172
127#define HAL_HW_PCI_8171_DEVICE_ID 0x8171
128#define HAL_HW_PCI_0045_DEVICE_ID 0x0045
129#define HAL_HW_PCI_0046_DEVICE_ID 0x0046
130#define HAL_HW_PCI_0044_DEVICE_ID 0x0044
131#define HAL_HW_PCI_0047_DEVICE_ID 0x0047
132#define HAL_HW_PCI_700F_DEVICE_ID 0x700F
133#define HAL_HW_PCI_701F_DEVICE_ID 0x701F
134#define HAL_HW_PCI_DLINK_DEVICE_ID 0x3304
135#define HAL_HW_PCI_8192CET_DEVICE_ID 0x8191
136#define HAL_HW_PCI_8192CE_DEVICE_ID 0x8178
137#define HAL_HW_PCI_8191CE_DEVICE_ID 0x8177
138#define HAL_HW_PCI_8188CE_DEVICE_ID 0x8176
139#define HAL_HW_PCI_8192CU_DEVICE_ID 0x8191
140#define HAL_HW_PCI_8192DE_DEVICE_ID 0x092D
141#define HAL_HW_PCI_8192DU_DEVICE_ID 0x092D
142
143#define RTL819X_DEFAULT_RF_TYPE RF_1T2R
144
145#define RTLLIB_WATCH_DOG_TIME 2000
146
147#define MAX_DEV_ADDR_SIZE 8 /* support till 64 bit bus width OS */
148#define MAX_FIRMWARE_INFORMATION_SIZE 32
149#define MAX_802_11_HEADER_LENGTH (40 + MAX_FIRMWARE_INFORMATION_SIZE)
150#define ENCRYPTION_MAX_OVERHEAD 128
151#define MAX_FRAGMENT_COUNT 8
152#define MAX_TRANSMIT_BUFFER_SIZE (1600+(MAX_802_11_HEADER_LENGTH+ENCRYPTION_MAX_OVERHEAD)*MAX_FRAGMENT_COUNT)
153
154#define scrclng 4
155
156#define DEFAULT_FRAG_THRESHOLD 2342U
157#define MIN_FRAG_THRESHOLD 256U
158#define DEFAULT_BEACONINTERVAL 0x64U
159
160#define DEFAULT_SSID ""
161#define DEFAULT_RETRY_RTS 7
162#define DEFAULT_RETRY_DATA 7
163#define PRISM_HDR_SIZE 64
164
165#define PHY_RSSI_SLID_WIN_MAX 100
166
167#define RTL_IOCTL_WPA_SUPPLICANT SIOCIWFIRSTPRIV+30
168
169#define TxBBGainTableLength 37
170#define CCKTxBBGainTableLength 23
171
172#define CHANNEL_PLAN_LEN 10
173#define sCrcLng 4
174
175#define NIC_SEND_HANG_THRESHOLD_NORMAL 4
176#define NIC_SEND_HANG_THRESHOLD_POWERSAVE 8
177
178#define MAX_TX_QUEUE 9
179
180#define MAX_RX_QUEUE 1
181
182#define MAX_RX_COUNT 64
183#define MAX_TX_QUEUE_COUNT 9
184
185enum RTL819x_PHY_PARAM {
186 RTL819X_PHY_MACPHY_REG = 0,
187 RTL819X_PHY_MACPHY_REG_PG = 1,
188 RTL8188C_PHY_MACREG =2,
189 RTL8192C_PHY_MACREG =3,
190 RTL819X_PHY_REG = 4,
191 RTL819X_PHY_REG_1T2R = 5,
192 RTL819X_PHY_REG_to1T1R = 6,
193 RTL819X_PHY_REG_to1T2R = 7,
194 RTL819X_PHY_REG_to2T2R = 8,
195 RTL819X_PHY_REG_PG = 9,
196 RTL819X_AGC_TAB = 10,
197 RTL819X_PHY_RADIO_A =11,
198 RTL819X_PHY_RADIO_A_1T =12,
199 RTL819X_PHY_RADIO_A_2T =13,
200 RTL819X_PHY_RADIO_B =14,
201 RTL819X_PHY_RADIO_B_GM =15,
202 RTL819X_PHY_RADIO_C =16,
203 RTL819X_PHY_RADIO_D =17,
204 RTL819X_EEPROM_MAP =18,
205 RTL819X_EFUSE_MAP =19,
206};
207
208enum RTL_DEBUG {
209 COMP_TRACE = BIT0,
210 COMP_DBG = BIT1,
211 COMP_INIT = BIT2,
212 COMP_RECV = BIT3,
213 COMP_SEND = BIT4,
214 COMP_CMD = BIT5,
215 COMP_POWER = BIT6,
216 COMP_EPROM = BIT7,
217 COMP_SWBW = BIT8,
218 COMP_SEC = BIT9,
219 COMP_LPS = BIT10,
220 COMP_QOS = BIT11,
221 COMP_RATE = BIT12,
222 COMP_RXDESC = BIT13,
223 COMP_PHY = BIT14,
224 COMP_DIG = BIT15,
225 COMP_TXAGC = BIT16,
226 COMP_HALDM = BIT17,
227 COMP_POWER_TRACKING = BIT18,
228 COMP_CH = BIT19,
229 COMP_RF = BIT20,
230 COMP_FIRMWARE = BIT21,
231 COMP_HT = BIT22,
232 COMP_RESET = BIT23,
233 COMP_CMDPKT = BIT24,
234 COMP_SCAN = BIT25,
235 COMP_PS = BIT26,
236 COMP_DOWN = BIT27,
237 COMP_INTR = BIT28,
238 COMP_LED = BIT29,
239 COMP_MLME = BIT30,
240 COMP_ERR = BIT31
241};
242
243typedef enum{
244 NIC_UNKNOWN = 0,
245 NIC_8192E = 1,
246 NIC_8190P = 2,
247 NIC_8192SE = 4,
248 NIC_8192CE = 5,
249 NIC_8192CU = 6,
250 NIC_8192DE = 7,
251 NIC_8192DU = 8,
252 } nic_t;
253
254typedef enum _RT_EEPROM_TYPE{
255 EEPROM_93C46,
256 EEPROM_93C56,
257 EEPROM_BOOT_EFUSE,
258}RT_EEPROM_TYPE,*PRT_EEPROM_TYPE;
259
260typedef enum _tag_TxCmd_Config_Index{
261 TXCMD_TXRA_HISTORY_CTRL = 0xFF900000,
262 TXCMD_RESET_TX_PKT_BUFF = 0xFF900001,
263 TXCMD_RESET_RX_PKT_BUFF = 0xFF900002,
264 TXCMD_SET_TX_DURATION = 0xFF900003,
265 TXCMD_SET_RX_RSSI = 0xFF900004,
266 TXCMD_SET_TX_PWR_TRACKING = 0xFF900005,
267 TXCMD_XXXX_CTRL,
268}DCMD_TXCMD_OP;
269
270typedef enum _RT_RF_TYPE_819xU{
271 RF_TYPE_MIN = 0,
272 RF_8225,
273 RF_8256,
274 RF_8258,
275 RF_6052=4,
276 RF_PSEUDO_11N = 5,
277}RT_RF_TYPE_819xU, *PRT_RF_TYPE_819xU;
278
279typedef enum tag_Rf_Operatetion_State
280{
281 RF_STEP_INIT = 0,
282 RF_STEP_NORMAL,
283 RF_STEP_MAX
284}RF_STEP_E;
285
286typedef enum _RT_STATUS{
287 RT_STATUS_SUCCESS,
288 RT_STATUS_FAILURE,
289 RT_STATUS_PENDING,
290 RT_STATUS_RESOURCE
291}RT_STATUS,*PRT_STATUS;
292
293typedef enum _RT_CUSTOMER_ID
294{
295 RT_CID_DEFAULT = 0,
296 RT_CID_8187_ALPHA0 = 1,
297 RT_CID_8187_SERCOMM_PS = 2,
298 RT_CID_8187_HW_LED = 3,
299 RT_CID_8187_NETGEAR = 4,
300 RT_CID_WHQL = 5,
301 RT_CID_819x_CAMEO = 6,
302 RT_CID_819x_RUNTOP = 7,
303 RT_CID_819x_Senao = 8,
304 RT_CID_TOSHIBA = 9,
305 RT_CID_819x_Netcore = 10,
306 RT_CID_Nettronix = 11,
307 RT_CID_DLINK = 12,
308 RT_CID_PRONET = 13,
309 RT_CID_COREGA = 14,
310 RT_CID_819x_ALPHA = 15,
311 RT_CID_819x_Sitecom = 16,
312 RT_CID_CCX = 17,
313 RT_CID_819x_Lenovo = 18,
314 RT_CID_819x_QMI = 19,
315 RT_CID_819x_Edimax_Belkin = 20,
316 RT_CID_819x_Sercomm_Belkin = 21,
317 RT_CID_819x_CAMEO1 = 22,
318 RT_CID_819x_MSI = 23,
319 RT_CID_819x_Acer = 24,
320 RT_CID_819x_HP =27,
321 RT_CID_819x_CLEVO = 28,
322 RT_CID_819x_Arcadyan_Belkin = 29,
323 RT_CID_819x_SAMSUNG = 30,
324 RT_CID_819x_WNC_COREGA = 31,
325}RT_CUSTOMER_ID, *PRT_CUSTOMER_ID;
326
327typedef enum _RESET_TYPE {
328 RESET_TYPE_NORESET = 0x00,
329 RESET_TYPE_NORMAL = 0x01,
330 RESET_TYPE_SILENT = 0x02
331} RESET_TYPE;
332
333typedef enum _IC_INFERIORITY_8192S{
334 IC_INFERIORITY_A = 0,
335 IC_INFERIORITY_B = 1,
336}IC_INFERIORITY_8192S, *PIC_INFERIORITY_8192S;
337
338typedef enum _PCI_BRIDGE_VENDOR {
339 PCI_BRIDGE_VENDOR_INTEL = 0x0,
340 PCI_BRIDGE_VENDOR_ATI,
341 PCI_BRIDGE_VENDOR_AMD,
342 PCI_BRIDGE_VENDOR_SIS ,
343 PCI_BRIDGE_VENDOR_UNKNOWN,
344 PCI_BRIDGE_VENDOR_MAX ,
345} PCI_BRIDGE_VENDOR;
346
347typedef struct buffer
348{
349 struct buffer *next;
350 u32 *buf;
351 dma_addr_t dma;
352
353} buffer;
354
355typedef struct rtl_reg_debug{
356 unsigned int cmd;
357 struct {
358 unsigned char type;
359 unsigned char addr;
360 unsigned char page;
361 unsigned char length;
362 } head;
363 unsigned char buf[0xff];
364}rtl_reg_debug;
365
366typedef struct _rt_9x_tx_rate_history {
367 u32 cck[4];
368 u32 ofdm[8];
369 u32 ht_mcs[4][16];
370}rt_tx_rahis_t, *prt_tx_rahis_t;
371
372typedef struct _RT_SMOOTH_DATA_4RF {
373 char elements[4][100];
374 u32 index;
375 u32 TotalNum;
376 u32 TotalVal[4];
377}RT_SMOOTH_DATA_4RF, *PRT_SMOOTH_DATA_4RF;
378
379typedef struct Stats
380{
381 unsigned long txrdu;
382 unsigned long rxrdu;
383 unsigned long rxok;
384 unsigned long rxframgment;
385 unsigned long rxcmdpkt[4];
386 unsigned long rxurberr;
387 unsigned long rxstaterr;
388 unsigned long rxdatacrcerr;
389 unsigned long rxmgmtcrcerr;
390 unsigned long rxcrcerrmin;
391 unsigned long rxcrcerrmid;
392 unsigned long rxcrcerrmax;
393 unsigned long received_rate_histogram[4][32];
394 unsigned long received_preamble_GI[2][32];
395 unsigned long rx_AMPDUsize_histogram[5];
396 unsigned long rx_AMPDUnum_histogram[5];
397 unsigned long numpacket_matchbssid;
398 unsigned long numpacket_toself;
399 unsigned long num_process_phyinfo;
400 unsigned long numqry_phystatus;
401 unsigned long numqry_phystatusCCK;
402 unsigned long numqry_phystatusHT;
403 unsigned long received_bwtype[5];
404 unsigned long txnperr;
405 unsigned long txnpdrop;
406 unsigned long txresumed;
407 unsigned long rxoverflow;
408 unsigned long rxint;
409 unsigned long txnpokint;
410 unsigned long ints;
411 unsigned long shints;
412 unsigned long txoverflow;
413 unsigned long txlpokint;
414 unsigned long txlpdrop;
415 unsigned long txlperr;
416 unsigned long txbeokint;
417 unsigned long txbedrop;
418 unsigned long txbeerr;
419 unsigned long txbkokint;
420 unsigned long txbkdrop;
421 unsigned long txbkerr;
422 unsigned long txviokint;
423 unsigned long txvidrop;
424 unsigned long txvierr;
425 unsigned long txvookint;
426 unsigned long txvodrop;
427 unsigned long txvoerr;
428 unsigned long txbeaconokint;
429 unsigned long txbeacondrop;
430 unsigned long txbeaconerr;
431 unsigned long txmanageokint;
432 unsigned long txmanagedrop;
433 unsigned long txmanageerr;
434 unsigned long txcmdpktokint;
435 unsigned long txdatapkt;
436 unsigned long txfeedback;
437 unsigned long txfeedbackok;
438 unsigned long txoktotal;
439 unsigned long txokbytestotal;
440 unsigned long txokinperiod;
441 unsigned long txmulticast;
442 unsigned long txbytesmulticast;
443 unsigned long txbroadcast;
444 unsigned long txbytesbroadcast;
445 unsigned long txunicast;
446 unsigned long txbytesunicast;
447 unsigned long rxbytesunicast;
448 unsigned long txfeedbackfail;
449 unsigned long txerrtotal;
450 unsigned long txerrbytestotal;
451 unsigned long txerrmulticast;
452 unsigned long txerrbroadcast;
453 unsigned long txerrunicast;
454 unsigned long txretrycount;
455 unsigned long txfeedbackretry;
456 u8 last_packet_rate;
457 unsigned long slide_signal_strength[100];
458 unsigned long slide_evm[100];
459 unsigned long slide_rssi_total;
460 unsigned long slide_evm_total;
461 long signal_strength;
462 long signal_quality;
463 long last_signal_strength_inpercent;
464 long recv_signal_power;
465 u8 rx_rssi_percentage[4];
466 u8 rx_evm_percentage[2];
467 long rxSNRdB[4];
468 rt_tx_rahis_t txrate;
469 u32 Slide_Beacon_pwdb[100];
470 u32 Slide_Beacon_Total;
471 RT_SMOOTH_DATA_4RF cck_adc_pwdb;
472 u32 CurrentShowTxate;
473} Stats;
474
475typedef struct ChnlAccessSetting {
476 u16 SIFS_Timer;
477 u16 DIFS_Timer;
478 u16 SlotTimeTimer;
479 u16 EIFS_Timer;
480 u16 CWminIndex;
481 u16 CWmaxIndex;
482}*PCHANNEL_ACCESS_SETTING,CHANNEL_ACCESS_SETTING;
483
484typedef enum _TWO_PORT_STATUS
485{
486 TWO_PORT_STATUS__DEFAULT_ONLY,
487 TWO_PORT_STATUS__EXTENSION_ONLY,
488 TWO_PORT_STATUS__EXTENSION_FOLLOW_DEFAULT,
489 TWO_PORT_STATUS__DEFAULT_G_EXTENSION_N20,
490 TWO_PORT_STATUS__ADHOC,
491 TWO_PORT_STATUS__WITHOUT_ANY_ASSOCIATE
492}TWO_PORT_STATUS;
493
494typedef struct _txbbgain_struct
495{
496 long txbb_iq_amplifygain;
497 u32 txbbgain_value;
498} txbbgain_struct, *ptxbbgain_struct;
499
500typedef struct _ccktxbbgain_struct
501{
502 u8 ccktxbb_valuearray[8];
503} ccktxbbgain_struct,*pccktxbbgain_struct;
504
505typedef struct _init_gain
506{
507 u8 xaagccore1;
508 u8 xbagccore1;
509 u8 xcagccore1;
510 u8 xdagccore1;
511 u8 cca;
512
513} init_gain, *pinit_gain;
514
515typedef struct _tx_ring{
516 u32 * desc;
517 u8 nStuckCount;
518 struct _tx_ring * next;
519}__attribute__ ((packed)) tx_ring, * ptx_ring;
520
521struct rtl8192_tx_ring {
522 tx_desc *desc;
523 dma_addr_t dma;
524 unsigned int idx;
525 unsigned int entries;
526 struct sk_buff_head queue;
527};
528
529
530
531struct rtl819x_ops{
532 nic_t nic_type;
533 void (* get_eeprom_size)(struct net_device* dev);
534 void (* init_adapter_variable)(struct net_device* dev);
535 void (* init_before_adapter_start)(struct net_device* dev);
536 bool (* initialize_adapter)(struct net_device* dev);
537 void (*link_change)(struct net_device* dev);
538 void (* tx_fill_descriptor)(struct net_device* dev, tx_desc * tx_desc, cb_desc * cb_desc, struct sk_buff *skb);
539 void (* tx_fill_cmd_descriptor)(struct net_device* dev, tx_desc_cmd * entry, cb_desc * cb_desc, struct sk_buff *skb);
540 bool (* rx_query_status_descriptor)(struct net_device* dev, struct rtllib_rx_stats* stats, rx_desc *pdesc, struct sk_buff* skb);
541 bool (* rx_command_packet_handler)(struct net_device *dev, struct sk_buff* skb, rx_desc *pdesc);
542 void (* stop_adapter)(struct net_device *dev, bool reset);
543 void (* update_ratr_table)(struct net_device* dev);
544 void (* irq_enable)(struct net_device* dev);
545 void (* irq_disable)(struct net_device* dev);
546 void (* irq_clear)(struct net_device* dev);
547 void (* rx_enable)(struct net_device* dev);
548 void (* tx_enable)(struct net_device* dev);
549 void (* interrupt_recognized)(struct net_device *dev, u32 *p_inta, u32 *p_intb);
550 bool (* TxCheckStuckHandler)(struct net_device* dev);
551 bool (* RxCheckStuckHandler)(struct net_device* dev);
552};
553
554typedef struct r8192_priv
555{
556 struct pci_dev *pdev;
557 struct pci_dev *bridge_pdev;
558
94a79942
LF		 559 bool bfirst_init;
560 bool bfirst_after_down;
561 bool initialized_at_probe;
562 bool being_init_adapter;
563 bool bDriverIsGoingToUnload;
564
565 int irq;
566 short irq_enabled;
567
568 short up;
569 short up_first_time;
570 delayed_work_struct_rsl update_beacon_wq;
571 delayed_work_struct_rsl watch_dog_wq;
572 delayed_work_struct_rsl txpower_tracking_wq;
573 delayed_work_struct_rsl rfpath_check_wq;
574 delayed_work_struct_rsl gpio_change_rf_wq;
575 delayed_work_struct_rsl initialgain_operate_wq;
576 delayed_work_struct_rsl check_hw_scan_wq;
577 delayed_work_struct_rsl hw_scan_simu_wq;
578 delayed_work_struct_rsl start_hw_scan_wq;
579
580 struct workqueue_struct *priv_wq;
581
582 CHANNEL_ACCESS_SETTING ChannelAccessSetting;
583
584 mp_adapter NdisAdapter;
585
586 struct rtl819x_ops *ops;
587 struct rtllib_device *rtllib;
588
94a79942
LF		 589 work_struct_rsl reset_wq;
590
591 LOG_INTERRUPT_8190_T InterruptLog;
592
593 RT_CUSTOMER_ID CustomerID;
594
595
596 RT_RF_TYPE_819xU rf_chip;
597 IC_INFERIORITY_8192S IC_Class;
598 HT_CHANNEL_WIDTH CurrentChannelBW;
599 BB_REGISTER_DEFINITION_T PHYRegDef[4];
600 rate_adaptive rate_adaptive;
601
602 ccktxbbgain_struct cck_txbbgain_table[CCKTxBBGainTableLength];
603 ccktxbbgain_struct cck_txbbgain_ch14_table[CCKTxBBGainTableLength];
604
605 txbbgain_struct txbbgain_table[TxBBGainTableLength];
606
607 ACM_METHOD AcmMethod;
608
609 prt_firmware pFirmware;
610 rtl819x_loopback_e LoopbackMode;
611 firmware_source_e firmware_source;
612
613 struct timer_list watch_dog_timer;
614 struct timer_list fsync_timer;
615 struct timer_list gpio_polling_timer;
616
617 spinlock_t fw_scan_lock;
618 spinlock_t irq_lock;
619 spinlock_t irq_th_lock;
620 spinlock_t tx_lock;
621 spinlock_t rf_ps_lock;
622 spinlock_t rw_lock;
623 spinlock_t rt_h2c_lock;
94a79942
LF		 624 spinlock_t rf_lock;
625 spinlock_t ps_lock;
626
627 struct sk_buff_head rx_queue;
628 struct sk_buff_head skb_queue;
629
630 struct tasklet_struct irq_rx_tasklet;
631 struct tasklet_struct irq_tx_tasklet;
632 struct tasklet_struct irq_prepare_beacon_tasklet;
633
634 struct semaphore wx_sem;
635 struct semaphore rf_sem;
94a79942 636 struct mutex mutex;
94a79942
LF		 637
638 struct Stats stats;
639 struct iw_statistics wstats;
640 struct proc_dir_entry *dir_dev;
641
642 short (*rf_set_sens)(struct net_device *dev,short sens);
643 u8 (*rf_set_chan)(struct net_device *dev,u8 ch);
644 void (*rf_close)(struct net_device *dev);
645 void (*rf_init)(struct net_device *dev);
646
94a79942
LF		 647 rx_desc *rx_ring[MAX_RX_QUEUE];
648 struct sk_buff *rx_buf[MAX_RX_QUEUE][MAX_RX_COUNT];
649 dma_addr_t rx_ring_dma[MAX_RX_QUEUE];
650 unsigned int rx_idx[MAX_RX_QUEUE];
651 int rxringcount;
652 u16 rxbuffersize;
653
654 u32 LastRxDescTSFHigh;
655 u32 LastRxDescTSFLow;
656
657 u16 EarlyRxThreshold;
658 u32 ReceiveConfig;
659 u8 AcmControl;
660 u8 RFProgType;
661 u8 retry_data;
662 u8 retry_rts;
663 u16 rts;
664
665 struct rtl8192_tx_ring tx_ring[MAX_TX_QUEUE_COUNT];
666 int txringcount;
667 int txbuffsize;
668 int txfwbuffersize;
669 atomic_t tx_pending[0x10];
670
671 u16 ShortRetryLimit;
672 u16 LongRetryLimit;
673 u32 TransmitConfig;
674 u8 RegCWinMin;
675 u8 keepAliveLevel;
676
94a79942
LF		 677 bool sw_radio_on;
678 bool bHwRadioOff;
679 bool pwrdown;
680 bool blinked_ingpio;
681 u8 polling_timer_on;
682
683 /**********************************************************/
684
685 enum card_type {PCI,MINIPCI,CARDBUS,USB}card_type;
686
687 work_struct_rsl qos_activate;
688
689 u8 bIbssCoordinator;
690
691 short promisc;
692 short crcmon;
693
694 int txbeaconcount;
695
696 short chan;
697 short sens;
698 short max_sens;
699 u32 rx_prevlen;
700
701 u8 ScanDelay;
702 bool ps_force;
703
704 u32 irq_mask[2];
705
706 u8 Rf_Mode;
707 nic_t card_8192;
708 u8 card_8192_version;
709
710 short enable_gpio0;
711
712 u8 rf_type;
713 u8 IC_Cut;
714 char nick[IW_ESSID_MAX_SIZE + 1];
715
716 u8 RegBcnCtrlVal;
717 bool bHwAntDiv;
718
719 bool bTKIPinNmodeFromReg;
720 bool bWEPinNmodeFromReg;
721
722 bool bLedOpenDrain;
723
724 u8 check_roaming_cnt;
725
726 bool bIgnoreSilentReset;
727 u32 SilentResetRxSoltNum;
728 u32 SilentResetRxSlotIndex;
729 u32 SilentResetRxStuckEvent[MAX_SILENT_RESET_RX_SLOT_NUM];
730
731 void *scan_cmd;
732 u8 hwscan_bw_40;
733
734 u16 nrxAMPDU_size;
735 u8 nrxAMPDU_aggr_num;
736
737 u32 last_rxdesc_tsf_high;
738 u32 last_rxdesc_tsf_low;
739
740
741 u16 basic_rate;
742 u8 short_preamble;
743 u8 dot11CurrentPreambleMode;
744 u8 slot_time;
745 u16 SifsTime;
746
747 u8 RegWirelessMode;
748
749 u8 firmware_version;
750 u16 FirmwareSubVersion;
751 u16 rf_pathmap;
752 bool AutoloadFailFlag;
753
754 u8 RegPciASPM;
755 u8 RegAMDPciASPM;
756 u8 RegHwSwRfOffD3;
757 u8 RegSupportPciASPM;
758 bool bSupportASPM;
759
760 u32 RfRegChnlVal[2];
761
762 u8 ShowRateMode;
763 u8 RATRTableBitmap;
764
765 u8 EfuseMap[2][HWSET_MAX_SIZE_92S];
766 u16 EfuseUsedBytes;
767 u8 EfuseUsedPercentage;
768
94a79942
LF		 769 short epromtype;
770 u16 eeprom_vid;
771 u16 eeprom_did;
772 u16 eeprom_svid;
773 u16 eeprom_smid;
774 u8 eeprom_CustomerID;
775 u16 eeprom_ChannelPlan;
776 u8 eeprom_version;
777
778 u8 EEPROMRegulatory;
779 u8 EEPROMPwrGroup[2][3];
780 u8 EEPROMOptional;
781
94a79942
LF		 782 u8 EEPROMTxPowerLevelCCK[14];
783 u8 EEPROMTxPowerLevelOFDM24G[14];
784 u8 EEPROMTxPowerLevelOFDM5G[24];
94a79942
LF		 785 u8 EEPROMRfACCKChnl1TxPwLevel[3];
786 u8 EEPROMRfAOfdmChnlTxPwLevel[3];
787 u8 EEPROMRfCCCKChnl1TxPwLevel[3];
788 u8 EEPROMRfCOfdmChnlTxPwLevel[3];
789 u16 EEPROMTxPowerDiff;
790 u16 EEPROMAntPwDiff;
791 u8 EEPROMThermalMeter;
792 u8 EEPROMPwDiff;
793 u8 EEPROMCrystalCap;
794
795 u8 EEPROMBluetoothCoexist;
796 u8 EEPROMBluetoothType;
797 u8 EEPROMBluetoothAntNum;
798 u8 EEPROMBluetoothAntIsolation;
799 u8 EEPROMBluetoothRadioShared;
800
801
802 u8 EEPROMSupportWoWLAN;
803 u8 EEPROMBoardType;
804 u8 EEPROM_Def_Ver;
805 u8 EEPROMHT2T_TxPwr[6];
806 u8 EEPROMTSSI_A;
807 u8 EEPROMTSSI_B;
808 u8 EEPROMTxPowerLevelCCK_V1[3];
809 u8 EEPROMLegacyHTTxPowerDiff;
810
811 u8 BluetoothCoexist;
812
813 u8 CrystalCap;
814 u8 ThermalMeter[2];
815
816 u16 FwCmdIOMap;
817 u32 FwCmdIOParam;
818
819 u8 SwChnlInProgress;
820 u8 SwChnlStage;
821 u8 SwChnlStep;
822 u8 SetBWModeInProgress;
823
824 u8 nCur40MhzPrimeSC;
825
826 u32 RfReg0Value[4];
827 u8 NumTotalRFPath;
828 bool brfpath_rxenable[4];
829
830 bool bTXPowerDataReadFromEEPORM;
831
832 u16 RegChannelPlan;
833 u16 ChannelPlan;
834 bool bChnlPlanFromHW;
835
836 bool RegRfOff;
837 bool isRFOff;
838 bool bInPowerSaveMode;
839 u8 bHwRfOffAction;
840
841 bool aspm_clkreq_enable;
842 u32 pci_bridge_vendor;
843 u8 RegHostPciASPMSetting;
844 u8 RegDevicePciASPMSetting;
845
846 bool RFChangeInProgress;
847 bool SetRFPowerStateInProgress;
848 bool bdisable_nic;
849
850 u8 pwrGroupCnt;
851
852 u8 ThermalValue_LCK;
853 u8 ThermalValue_IQK;
854 bool bRfPiEnable;
855
856 u32 APKoutput[2][2];
857 bool bAPKdone;
858
859 long RegE94;
860 long RegE9C;
861 long RegEB4;
862 long RegEBC;
863
864 u32 RegC04;
865 u32 Reg874;
866 u32 RegC08;
867 u32 ADDA_backup[16];
868 u32 IQK_MAC_backup[3];
869
870 bool SetFwCmdInProgress;
871 u8 CurrentFwCmdIO;
872
873 u8 rssi_level;
874
875 bool bInformFWDriverControlDM;
876 u8 PwrGroupHT20[2][14];
877 u8 PwrGroupHT40[2][14];
878
879 u8 ThermalValue;
880 long EntryMinUndecoratedSmoothedPWDB;
881 long EntryMaxUndecoratedSmoothedPWDB;
882 u8 DynamicTxHighPowerLvl;
883 u8 LastDTPLvl;
884 u32 CurrentRATR0;
885 FALSE_ALARM_STATISTICS FalseAlmCnt;
886
887 u8 DMFlag;
888 u8 DM_Type;
889
890 u8 CckPwEnl;
891 u16 TSSI_13dBm;
892 u32 Pwr_Track;
893 u8 CCKPresentAttentuation_20Mdefault;
894 u8 CCKPresentAttentuation_40Mdefault;
895 char CCKPresentAttentuation_difference;
896 char CCKPresentAttentuation;
897 u8 bCckHighPower;
898 long undecorated_smoothed_pwdb;
899 long undecorated_smoothed_cck_adc_pwdb[4];
900
901 u32 MCSTxPowerLevelOriginalOffset[6];
902 u32 CCKTxPowerLevelOriginalOffset;
903 u8 TxPowerLevelCCK[14];
904 u8 TxPowerLevelCCK_A[14];
905 u8 TxPowerLevelCCK_C[14];
906 u8 TxPowerLevelOFDM24G[14];
907 u8 TxPowerLevelOFDM5G[14];
908 u8 TxPowerLevelOFDM24G_A[14];
909 u8 TxPowerLevelOFDM24G_C[14];
910 u8 LegacyHTTxPowerDiff;
911 u8 TxPowerDiff;
912 s8 RF_C_TxPwDiff;
913 s8 RF_B_TxPwDiff;
914 u8 RfTxPwrLevelCck[2][14];
915 u8 RfTxPwrLevelOfdm1T[2][14];
916 u8 RfTxPwrLevelOfdm2T[2][14];
917 u8 AntennaTxPwDiff[3];
918 u8 TxPwrHt20Diff[2][14];
919 u8 TxPwrLegacyHtDiff[2][14];
920 u8 TxPwrSafetyFlag;
921 u8 HT2T_TxPwr_A[14];
922 u8 HT2T_TxPwr_B[14];
923 u8 CurrentCckTxPwrIdx;
924 u8 CurrentOfdm24GTxPwrIdx;
925
926 bool bdynamic_txpower;
927 bool bDynamicTxHighPower;
928 bool bDynamicTxLowPower;
929 bool bLastDTPFlag_High;
930 bool bLastDTPFlag_Low;
931
932 bool bstore_last_dtpflag;
933 bool bstart_txctrl_bydtp;
934
935 u8 rfa_txpowertrackingindex;
936 u8 rfa_txpowertrackingindex_real;
937 u8 rfa_txpowertracking_default;
938 u8 rfc_txpowertrackingindex;
939 u8 rfc_txpowertrackingindex_real;
940 u8 rfc_txpowertracking_default;
941 bool btxpower_tracking;
942 bool bcck_in_ch14;
943
944 u8 TxPowerTrackControl;
945 u8 txpower_count;
946 bool btxpower_trackingInit;
947
948 u8 OFDM_index[2];
949 u8 CCK_index;
950
951 u8 Record_CCK_20Mindex;
952 u8 Record_CCK_40Mindex;
953
954 init_gain initgain_backup;
955 u8 DefaultInitialGain[4];
956 bool bis_any_nonbepkts;
957 bool bcurrent_turbo_EDCA;
958 bool bis_cur_rdlstate;
959
960 bool bCCKinCH14;
961
962 u8 MidHighPwrTHR_L1;
963 u8 MidHighPwrTHR_L2;
964
965 bool bfsync_processing;
966 u32 rate_record;
967 u32 rateCountDiffRecord;
968 u32 ContiuneDiffCount;
969 bool bswitch_fsync;
970 u8 framesync;
971 u32 framesyncC34;
972 u8 framesyncMonitor;
973
974 bool bDMInitialGainEnable;
975 bool MutualAuthenticationFail;
976
977 bool bDisableFrameBursting;
978
979 u32 reset_count;
980 bool bpbc_pressed;
981
982 u32 txpower_checkcnt;
983 u32 txpower_tracking_callback_cnt;
984 u8 thermal_read_val[40];
985 u8 thermal_readback_index;
986 u32 ccktxpower_adjustcnt_not_ch14;
987 u32 ccktxpower_adjustcnt_ch14;
988
989 RESET_TYPE ResetProgress;
990 bool bForcedSilentReset;
991 bool bDisableNormalResetCheck;
992 u16 TxCounter;
993 u16 RxCounter;
994 int IrpPendingCount;
995 bool bResetInProgress;
996 bool force_reset;
997 bool force_lps;
998 u8 InitialGainOperateType;
999
1000 bool chan_forced;
1001 bool bSingleCarrier;
1002 bool RegBoard;
1003 bool bCckContTx;
1004 bool bOfdmContTx;
1005 bool bStartContTx;
1006 u8 RegPaModel;
1007 u8 btMpCckTxPower;
1008 u8 btMpOfdmTxPower;
1009
1010 u32 MptActType;
1011 u32 MptIoOffset;
1012 u32 MptIoValue;
1013 u32 MptRfPath;
1014
1015 u32 MptBandWidth;
1016 u32 MptRateIndex;
1017 u8 MptChannelToSw;
1018 u32 MptRCR;
1019
1020 u8 PwrDomainProtect;
1021 u8 H2CTxCmdSeq;
1022
1023
1024}r8192_priv;
1025
1026extern const struct ethtool_ops rtl819x_ethtool_ops;
1027
1028void rtl8192_tx_cmd(struct net_device *dev, struct sk_buff *skb);
1029short rtl8192_tx(struct net_device *dev, struct sk_buff* skb);
1030
1031u8 read_nic_io_byte(struct net_device *dev, int x);
1032u32 read_nic_io_dword(struct net_device *dev, int x);
1033u16 read_nic_io_word(struct net_device *dev, int x) ;
1034void write_nic_io_byte(struct net_device *dev, int x,u8 y);
1035void write_nic_io_word(struct net_device *dev, int x,u16 y);
1036void write_nic_io_dword(struct net_device *dev, int x,u32 y);
1037
1038u8 read_nic_byte(struct net_device *dev, int x);
1039u32 read_nic_dword(struct net_device *dev, int x);
1040u16 read_nic_word(struct net_device *dev, int x) ;
1041void write_nic_byte(struct net_device *dev, int x,u8 y);
1042void write_nic_word(struct net_device *dev, int x,u16 y);
1043void write_nic_dword(struct net_device *dev, int x,u32 y);
1044
1045void force_pci_posting(struct net_device *dev);
1046
1047void rtl8192_rx_enable(struct net_device *);
1048void rtl8192_tx_enable(struct net_device *);
1049
1050int rtl8192_hard_start_xmit(struct sk_buff *skb,struct net_device *dev);
1051void rtl8192_hard_data_xmit(struct sk_buff *skb, struct net_device *dev, int rate);
1052void rtl8192_data_hard_stop(struct net_device *dev);
1053void rtl8192_data_hard_resume(struct net_device *dev);
1054void rtl8192_restart(void *data);
1055void rtl819x_watchdog_wqcallback(void *data);
1056void rtl8192_hw_sleep_wq (void *data);
1057void watch_dog_timer_callback(unsigned long data);
1058void rtl8192_irq_rx_tasklet(struct r8192_priv *priv);
1059void rtl8192_irq_tx_tasklet(struct r8192_priv *priv);
1060int rtl8192_down(struct net_device *dev,bool shutdownrf);
1061int rtl8192_up(struct net_device *dev);
1062void rtl8192_commit(struct net_device *dev);
1063void rtl8192_set_chan(struct net_device *dev,short ch);
1064
1065void check_rfctrl_gpio_timer(unsigned long data);
1066
1067void rtl8192_hw_wakeup_wq(void *data);
1068irqreturn_type rtl8192_interrupt(int irq, void *netdev, struct pt_regs *regs);
1069
1070short rtl8192_pci_initdescring(struct net_device *dev);
1071
1072void rtl8192_cancel_deferred_work(struct r8192_priv* priv);
1073
1074int _rtl8192_up(struct net_device *dev,bool is_silent_reset);
1075
1076short rtl8192_is_tx_queue_empty(struct net_device *dev);
1077void rtl8192_irq_disable(struct net_device *dev);
1078
1079void rtl8192_tx_timeout(struct net_device *dev);
1080void rtl8192_pci_resetdescring(struct net_device *dev);
1081void rtl8192_SetWirelessMode(struct net_device* dev, u8 wireless_mode);
1082void rtl8192_irq_enable(struct net_device *dev);
1083void rtl8192_config_rate(struct net_device* dev, u16* rate_config);
1084void rtl8192_update_cap(struct net_device* dev, u16 cap);
1085void rtl8192_irq_disable(struct net_device *dev);
1086
1087void rtl819x_UpdateRxPktTimeStamp (struct net_device *dev, struct rtllib_rx_stats *stats);
1088long rtl819x_translate_todbm(struct r8192_priv * priv, u8 signal_strength_index );
1089void rtl819x_update_rxsignalstatistics8190pci(struct r8192_priv * priv,struct rtllib_rx_stats * pprevious_stats);
1090u8 rtl819x_evm_dbtopercentage(char value);
1091void rtl819x_process_cck_rxpathsel(struct r8192_priv * priv,struct rtllib_rx_stats * pprevious_stats);
1092u8 rtl819x_query_rxpwrpercentage( char antpower );
1093void rtl8192_record_rxdesc_forlateruse(struct rtllib_rx_stats * psrc_stats,struct rtllib_rx_stats * ptarget_stats);
1094
1095bool NicIFEnableNIC(struct net_device* dev);
1096bool NicIFDisableNIC(struct net_device* dev);
1097
1098bool
1099MgntActSet_RF_State(
1100 struct net_device* dev,
1101 RT_RF_POWER_STATE StateToSet,
1102 RT_RF_CHANGE_SOURCE ChangeSource,
1103 bool ProtectOrNot
1104 );
1105void
1106ActUpdateChannelAccessSetting(
1107 struct net_device* dev,
1108 WIRELESS_MODE WirelessMode,
1109 PCHANNEL_ACCESS_SETTING ChnlAccessSetting
1110 );
1111
94a79942 1112#endif
Linux kernel - Deliverables
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