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Merge branch 'kbuild' of git://git.kernel.org/pub/scm/linux/kernel/git/mmarek/kbuild
[deliverable/linux.git] / drivers / staging / rtl8192ee / btcoexist / halbtc8192e2ant.c
CommitLineData
e22f4eda
LF		 1/**************************************************************
2 * Description:
3 *
4 * This file is for RTL8192E Co-exist mechanism
5 *
6 * History
7 * 2012/11/15 Cosa first check in.
8 *
9 **************************************************************/
10
11/**************************************************************
12 * include files
13 **************************************************************/
14#include "halbt_precomp.h"
15/**************************************************************
16 * Global variables, these are static variables
17 **************************************************************/
18static struct coex_dm_8192e_2ant glcoex_dm_8192e_2ant;
19static struct coex_dm_8192e_2ant *coex_dm = &glcoex_dm_8192e_2ant;
20static struct coex_sta_8192e_2ant glcoex_sta_8192e_2ant;
21static struct coex_sta_8192e_2ant *coex_sta = &glcoex_sta_8192e_2ant;
22
23static const char *const glbt_infosrc8192e2ant[] = {
24 "BT Info[wifi fw]",
25 "BT Info[bt rsp]",
26 "BT Info[bt auto report]",
27};
28
29static u32 glcoex_ver_date_8192e_2ant = 20130902;
30static u32 glcoex_ver_8192e_2ant = 0x34;
31
32/**************************************************************
33 * local function proto type if needed
34 **************************************************************/
35/**************************************************************
36 * local function start with halbtc8192e2ant_
37 **************************************************************/
38static u8 halbtc8192e2ant_btrssi_state(u8 level_num, u8 rssi_thresh,
39 u8 rssi_thresh1)
40{
41 int btrssi = 0;
42 u8 btrssi_state = coex_sta->pre_bt_rssi_state;
43
44 btrssi = coex_sta->bt_rssi;
45
46 if (level_num == 2) {
47 if ((coex_sta->pre_bt_rssi_state == BTC_RSSI_STATE_LOW) ||
48 (coex_sta->pre_bt_rssi_state == BTC_RSSI_STATE_STAY_LOW)) {
49 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_RSSI_STATE,
50 "BT Rssi pre state = LOW\n");
51 if (btrssi >= (rssi_thresh +
52 BTC_RSSI_COEX_THRESH_TOL_8192E_2ANT)) {
53 btrssi_state = BTC_RSSI_STATE_HIGH;
54 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_RSSI_STATE,
55 "BT Rssi state switch to High\n");
56 } else {
57 btrssi_state = BTC_RSSI_STATE_STAY_LOW;
58 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_RSSI_STATE,
59 "BT Rssi state stay at Low\n");
60 }
61 } else {
62 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_RSSI_STATE,
63 "BT Rssi pre state = HIGH\n");
64 if (btrssi < rssi_thresh) {
65 btrssi_state = BTC_RSSI_STATE_LOW;
66 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_RSSI_STATE,
67 "BT Rssi state switch to Low\n");
68 } else {
69 btrssi_state = BTC_RSSI_STATE_STAY_HIGH;
70 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_RSSI_STATE,
71 "BT Rssi state stay at High\n");
72 }
73 }
74 } else if (level_num == 3) {
75 if (rssi_thresh > rssi_thresh1) {
76 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_RSSI_STATE,
77 "BT Rssi thresh error!!\n");
78 return coex_sta->pre_bt_rssi_state;
79 }
80
81 if ((coex_sta->pre_bt_rssi_state == BTC_RSSI_STATE_LOW) ||
82 (coex_sta->pre_bt_rssi_state == BTC_RSSI_STATE_STAY_LOW)) {
83 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_RSSI_STATE,
84 "BT Rssi pre state = LOW\n");
85 if (btrssi >= (rssi_thresh +
86 BTC_RSSI_COEX_THRESH_TOL_8192E_2ANT)) {
87 btrssi_state = BTC_RSSI_STATE_MEDIUM;
88 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_RSSI_STATE,
89 "BT Rssi state switch to Medium\n");
90 } else {
91 btrssi_state = BTC_RSSI_STATE_STAY_LOW;
92 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_RSSI_STATE,
93 "BT Rssi state stay at Low\n");
94 }
95 } else if ((coex_sta->pre_bt_rssi_state ==
96 BTC_RSSI_STATE_MEDIUM) ||
97 (coex_sta->pre_bt_rssi_state ==
98 BTC_RSSI_STATE_STAY_MEDIUM)) {
99 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_RSSI_STATE,
100 "[BTCoex], BT Rssi pre state = MEDIUM\n");
101 if (btrssi >= (rssi_thresh1 +
102 BTC_RSSI_COEX_THRESH_TOL_8192E_2ANT)) {
103 btrssi_state = BTC_RSSI_STATE_HIGH;
104 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_RSSI_STATE,
105 "BT Rssi state switch to High\n");
106 } else if (btrssi < rssi_thresh) {
107 btrssi_state = BTC_RSSI_STATE_LOW;
108 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_RSSI_STATE,
109 "BT Rssi state switch to Low\n");
110 } else {
111 btrssi_state = BTC_RSSI_STATE_STAY_MEDIUM;
112 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_RSSI_STATE,
113 "BT Rssi state stay at Medium\n");
114 }
115 } else {
116 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_RSSI_STATE,
117 "BT Rssi pre state = HIGH\n");
118 if (btrssi < rssi_thresh1) {
119 btrssi_state = BTC_RSSI_STATE_MEDIUM;
120 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_RSSI_STATE,
121 "BT Rssi state switch to Medium\n");
122 } else {
123 btrssi_state = BTC_RSSI_STATE_STAY_HIGH;
124 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_RSSI_STATE,
125 "BT Rssi state stay at High\n");
126 }
127 }
128 }
129
130 coex_sta->pre_bt_rssi_state = btrssi_state;
131
132 return btrssi_state;
133}
134
135static u8 halbtc8192e2ant_wifirssi_state(struct btc_coexist *btcoexist,
136 u8 index, u8 level_num, u8 rssi_thresh,
137 u8 rssi_thresh1)
138{
139 int wifirssi = 0;
140 u8 wifirssi_state = coex_sta->pre_wifi_rssi_state[index];
141
142 btcoexist->btc_get(btcoexist, BTC_GET_S4_WIFI_RSSI, &wifirssi);
143
144 if (level_num == 2) {
145 if ((coex_sta->pre_wifi_rssi_state[index] ==
146 BTC_RSSI_STATE_LOW) ||
147 (coex_sta->pre_wifi_rssi_state[index] ==
148 BTC_RSSI_STATE_STAY_LOW)) {
149 if (wifirssi >= (rssi_thresh +
150 BTC_RSSI_COEX_THRESH_TOL_8192E_2ANT)) {
151 wifirssi_state = BTC_RSSI_STATE_HIGH;
152 BTC_PRINT(BTC_MSG_ALGORITHM,
153 ALGO_WIFI_RSSI_STATE,
154 "wifi RSSI state switch to High\n");
155 } else {
156 wifirssi_state = BTC_RSSI_STATE_STAY_LOW;
157 BTC_PRINT(BTC_MSG_ALGORITHM,
158 ALGO_WIFI_RSSI_STATE,
159 "wifi RSSI state stay at Low\n");
160 }
161 } else {
162 if (wifirssi < rssi_thresh) {
163 wifirssi_state = BTC_RSSI_STATE_LOW;
164 BTC_PRINT(BTC_MSG_ALGORITHM,
165 ALGO_WIFI_RSSI_STATE,
166 "wifi RSSI state switch to Low\n");
167 } else {
168 wifirssi_state = BTC_RSSI_STATE_STAY_HIGH;
169 BTC_PRINT(BTC_MSG_ALGORITHM,
170 ALGO_WIFI_RSSI_STATE,
171 "wifi RSSI state stay at High\n");
172 }
173 }
174 } else if (level_num == 3) {
175 if (rssi_thresh > rssi_thresh1) {
176 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_WIFI_RSSI_STATE,
177 "wifi RSSI thresh error!!\n");
178 return coex_sta->pre_wifi_rssi_state[index];
179 }
180
181 if ((coex_sta->pre_wifi_rssi_state[index] ==
182 BTC_RSSI_STATE_LOW) ||
183 (coex_sta->pre_wifi_rssi_state[index] ==
184 BTC_RSSI_STATE_STAY_LOW)) {
185 if (wifirssi >= (rssi_thresh +
186 BTC_RSSI_COEX_THRESH_TOL_8192E_2ANT)) {
187 wifirssi_state = BTC_RSSI_STATE_MEDIUM;
188 BTC_PRINT(BTC_MSG_ALGORITHM,
189 ALGO_WIFI_RSSI_STATE,
190 "wifi RSSI state switch to Medium\n");
191 } else {
192 wifirssi_state = BTC_RSSI_STATE_STAY_LOW;
193 BTC_PRINT(BTC_MSG_ALGORITHM,
194 ALGO_WIFI_RSSI_STATE,
195 "wifi RSSI state stay at Low\n");
196 }
197 } else if ((coex_sta->pre_wifi_rssi_state[index] ==
198 BTC_RSSI_STATE_MEDIUM) ||
199 (coex_sta->pre_wifi_rssi_state[index] ==
200 BTC_RSSI_STATE_STAY_MEDIUM)) {
201 if (wifirssi >= (rssi_thresh1 +
202 BTC_RSSI_COEX_THRESH_TOL_8192E_2ANT)) {
203 wifirssi_state = BTC_RSSI_STATE_HIGH;
204 BTC_PRINT(BTC_MSG_ALGORITHM,
205 ALGO_WIFI_RSSI_STATE,
206 "wifi RSSI state switch to High\n");
207 } else if (wifirssi < rssi_thresh) {
208 wifirssi_state = BTC_RSSI_STATE_LOW;
209 BTC_PRINT(BTC_MSG_ALGORITHM,
210 ALGO_WIFI_RSSI_STATE,
211 "wifi RSSI state switch to Low\n");
212 } else {
213 wifirssi_state = BTC_RSSI_STATE_STAY_MEDIUM;
214 BTC_PRINT(BTC_MSG_ALGORITHM,
215 ALGO_WIFI_RSSI_STATE,
216 "wifi RSSI state stay at Medium\n");
217 }
218 } else {
219 if (wifirssi < rssi_thresh1) {
220 wifirssi_state = BTC_RSSI_STATE_MEDIUM;
221 BTC_PRINT(BTC_MSG_ALGORITHM,
222 ALGO_WIFI_RSSI_STATE,
223 "wifi RSSI state switch to Medium\n");
224 } else {
225 wifirssi_state = BTC_RSSI_STATE_STAY_HIGH;
226 BTC_PRINT(BTC_MSG_ALGORITHM,
227 ALGO_WIFI_RSSI_STATE,
228 "wifi RSSI state stay at High\n");
229 }
230 }
231 }
232
233 coex_sta->pre_wifi_rssi_state[index] = wifirssi_state;
234
235 return wifirssi_state;
236}
237
238static void halbtc_monitor_bt_enable_disable(struct btc_coexist *btcoexist)
239{
240 static bool pre_bt_disabled;
241 static u32 bt_disable_cnt;
242 bool bt_active = true, bt_disabled = false;
243
244 /* This function check if bt is disabled */
245
246 if (coex_sta->high_priority_tx == 0 &&
247 coex_sta->high_priority_rx == 0 &&
248 coex_sta->low_priority_tx == 0 &&
249 coex_sta->low_priority_rx == 0)
250 bt_active = false;
251
252 if (coex_sta->high_priority_tx == 0xffff &&
253 coex_sta->high_priority_rx == 0xffff &&
254 coex_sta->low_priority_tx == 0xffff &&
255 coex_sta->low_priority_rx == 0xffff)
256 bt_active = false;
257
258 if (bt_active) {
259 bt_disable_cnt = 0;
260 bt_disabled = false;
261 btcoexist->btc_set(btcoexist, BTC_SET_BL_BT_DISABLE,
262 &bt_disabled);
263 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_MONITOR,
264 "[BTCoex], BT is enabled !!\n");
265 } else {
266 bt_disable_cnt++;
267 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_MONITOR,
268 "[BTCoex], bt all counters = 0, %d times!!\n",
269 bt_disable_cnt);
270 if (bt_disable_cnt >= 2) {
271 bt_disabled = true;
272 btcoexist->btc_set(btcoexist, BTC_SET_BL_BT_DISABLE,
273 &bt_disabled);
274 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_MONITOR,
275 "[BTCoex], BT is disabled !!\n");
276 }
277 }
278 if (pre_bt_disabled != bt_disabled) {
279 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_MONITOR,
280 "[BTCoex], BT is from %s to %s!!\n",
281 (pre_bt_disabled ? "disabled" : "enabled"),
282 (bt_disabled ? "disabled" : "enabled"));
283 pre_bt_disabled = bt_disabled;
284 }
285}
286
287static u32 halbtc8192e2ant_decidera_mask(struct btc_coexist *btcoexist,
288 u8 sstype, u32 ra_masktype)
289{
290 u32 disra_mask = 0x0;
291
292 switch (ra_masktype) {
293 case 0: /* normal mode */
294 if (sstype == 2)
295 disra_mask = 0x0; /* enable 2ss */
296 else
297 disra_mask = 0xfff00000;/* disable 2ss */
298 break;
299 case 1: /* disable cck 1/2 */
300 if (sstype == 2)
301 disra_mask = 0x00000003;/* enable 2ss */
302 else
303 disra_mask = 0xfff00003;/* disable 2ss */
304 break;
305 case 2: /* disable cck 1/2/5.5, ofdm 6/9/12/18/24, mcs 0/1/2/3/4 */
306 if (sstype == 2)
307 disra_mask = 0x0001f1f7;/* enable 2ss */
308 else
309 disra_mask = 0xfff1f1f7;/* disable 2ss */
310 break;
311 default:
312 break;
313 }
314
315 return disra_mask;
316}
317
318static void halbtc8192e2ant_updatera_mask(struct btc_coexist *btcoexist,
319 bool force_exec, u32 dis_ratemask)
320{
321 coex_dm->curra_mask = dis_ratemask;
322
323 if (force_exec || (coex_dm->prera_mask != coex_dm->curra_mask))
324 btcoexist->btc_set(btcoexist, BTC_SET_ACT_UPDATE_ra_mask,
325 &coex_dm->curra_mask);
326 coex_dm->prera_mask = coex_dm->curra_mask;
327}
328
329static void autorate_fallback_retry(struct btc_coexist *btcoexist,
330 bool force_exec, u8 type)
331{
332 bool wifi_under_bmode = false;
333
334 coex_dm->cur_arfrtype = type;
335
336 if (force_exec || (coex_dm->pre_arfrtype != coex_dm->cur_arfrtype)) {
337 switch (coex_dm->cur_arfrtype) {
338 case 0: /* normal mode */
339 btcoexist->btc_write_4byte(btcoexist, 0x430,
340 coex_dm->backup_arfr_cnt1);
341 btcoexist->btc_write_4byte(btcoexist, 0x434,
342 coex_dm->backup_arfr_cnt2);
343 break;
344 case 1:
345 btcoexist->btc_get(btcoexist,
346 BTC_GET_BL_WIFI_UNDER_B_MODE,
347 &wifi_under_bmode);
348 if (wifi_under_bmode) {
349 btcoexist->btc_write_4byte(btcoexist, 0x430,
350 0x0);
351 btcoexist->btc_write_4byte(btcoexist, 0x434,
352 0x01010101);
353 } else {
354 btcoexist->btc_write_4byte(btcoexist, 0x430,
355 0x0);
356 btcoexist->btc_write_4byte(btcoexist, 0x434,
357 0x04030201);
358 }
359 break;
360 default:
361 break;
362 }
363 }
364
365 coex_dm->pre_arfrtype = coex_dm->cur_arfrtype;
366}
367
368static void halbtc8192e2ant_retrylimit(struct btc_coexist *btcoexist,
369 bool force_exec, u8 type)
370{
371 coex_dm->cur_retrylimit_type = type;
372
373 if (force_exec || (coex_dm->pre_retrylimit_type !=
374 coex_dm->cur_retrylimit_type)) {
375 switch (coex_dm->cur_retrylimit_type) {
376 case 0: /* normal mode */
377 btcoexist->btc_write_2byte(btcoexist, 0x42a,
378 coex_dm->backup_retrylimit);
379 break;
380 case 1: /* retry limit = 8 */
381 btcoexist->btc_write_2byte(btcoexist, 0x42a,
382 0x0808);
383 break;
384 default:
385 break;
386 }
387 }
388
389 coex_dm->pre_retrylimit_type = coex_dm->cur_retrylimit_type;
390}
391
392static void halbtc8192e2ant_ampdu_maxtime(struct btc_coexist *btcoexist,
393 bool force_exec, u8 type)
394{
395 coex_dm->cur_ampdutime_type = type;
396
397 if (force_exec || (coex_dm->pre_ampdutime_type !=
398 coex_dm->cur_ampdutime_type)) {
399 switch (coex_dm->cur_ampdutime_type) {
400 case 0: /* normal mode */
401 btcoexist->btc_write_1byte(btcoexist, 0x456,
402 coex_dm->backup_ampdu_maxtime);
403 break;
404 case 1: /* AMPDU timw = 0x38 * 32us */
405 btcoexist->btc_write_1byte(btcoexist, 0x456, 0x38);
406 break;
407 default:
408 break;
409 }
410 }
411
412 coex_dm->pre_ampdutime_type = coex_dm->cur_ampdutime_type;
413}
414
415static void halbtc8192e2ant_limited_tx(struct btc_coexist *btcoexist,
416 bool force_exec, u8 ra_masktype,
417 u8 arfr_type, u8 retrylimit_type,
418 u8 ampdutime_type)
419{
420 u32 disra_mask = 0x0;
421
422 coex_dm->curra_masktype = ra_masktype;
423 disra_mask = halbtc8192e2ant_decidera_mask(btcoexist,
424 coex_dm->cur_sstype,
425 ra_masktype);
426 halbtc8192e2ant_updatera_mask(btcoexist, force_exec, disra_mask);
427
428 autorate_fallback_retry(btcoexist, force_exec, arfr_type);
429 halbtc8192e2ant_retrylimit(btcoexist, force_exec, retrylimit_type);
430 halbtc8192e2ant_ampdu_maxtime(btcoexist, force_exec, ampdutime_type);
431}
432
433static void halbtc8192e2ant_limited_rx(struct btc_coexist *btcoexist,
434 bool force_exec, bool rej_ap_agg_pkt,
435 bool b_bt_ctrl_agg_buf_size,
436 u8 agg_buf_size)
437{
438 bool reject_rx_agg = rej_ap_agg_pkt;
439 bool bt_ctrl_rx_agg_size = b_bt_ctrl_agg_buf_size;
440 u8 rx_agg_size = agg_buf_size;
441
442 /*********************************************
443 * Rx Aggregation related setting
444 *********************************************/
445 btcoexist->btc_set(btcoexist, BTC_SET_BL_TO_REJ_AP_AGG_PKT,
446 &reject_rx_agg);
447 /* decide BT control aggregation buf size or not */
448 btcoexist->btc_set(btcoexist, BTC_SET_BL_BT_CTRL_AGG_SIZE,
449 &bt_ctrl_rx_agg_size);
450 /* aggregation buf size, only work
451 * when BT control Rx aggregation size. */
452 btcoexist->btc_set(btcoexist, BTC_SET_U1_AGG_BUF_SIZE, &rx_agg_size);
453 /* real update aggregation setting */
454 btcoexist->btc_set(btcoexist, BTC_SET_ACT_AGGREGATE_CTRL, NULL);
455}
456
457static void halbtc8192e2ant_monitor_bt_ctr(struct btc_coexist *btcoexist)
458{
459 u32 reg_hp_txrx, reg_lp_txrx, u32tmp;
460 u32 reg_hp_tx = 0, reg_hp_rx = 0, reg_lp_tx = 0, reg_lp_rx = 0;
461
462 reg_hp_txrx = 0x770;
463 reg_lp_txrx = 0x774;
464
465 u32tmp = btcoexist->btc_read_4byte(btcoexist, reg_hp_txrx);
466 reg_hp_tx = u32tmp & MASKLWORD;
467 reg_hp_rx = (u32tmp & MASKHWORD)>>16;
468
469 u32tmp = btcoexist->btc_read_4byte(btcoexist, reg_lp_txrx);
470 reg_lp_tx = u32tmp & MASKLWORD;
471 reg_lp_rx = (u32tmp & MASKHWORD)>>16;
472
473 coex_sta->high_priority_tx = reg_hp_tx;
474 coex_sta->high_priority_rx = reg_hp_rx;
475 coex_sta->low_priority_tx = reg_lp_tx;
476 coex_sta->low_priority_rx = reg_lp_rx;
477
478 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_MONITOR,
479 "[BTCoex] High Priority Tx/Rx (reg 0x%x) = 0x%x(%d)/0x%x(%d)\n",
480 reg_hp_txrx, reg_hp_tx, reg_hp_tx, reg_hp_rx, reg_hp_rx);
481 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_MONITOR,
482 "[BTCoex] Low Priority Tx/Rx (reg 0x%x) = 0x%x(%d)/0x%x(%d)\n",
483 reg_lp_txrx, reg_lp_tx, reg_lp_tx, reg_lp_rx, reg_lp_rx);
484
485 /* reset counter */
486 btcoexist->btc_write_1byte(btcoexist, 0x76e, 0xc);
487}
488
489static void halbtc8192e2ant_querybt_info(struct btc_coexist *btcoexist)
490{
491 u8 h2c_parameter[1] = {0};
492
493 coex_sta->c2h_bt_info_req_sent = true;
494
495 h2c_parameter[0] |= BIT(0); /* trigger */
496
497 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_EXEC,
498 "[BTCoex], Query Bt Info, FW write 0x61 = 0x%x\n",
499 h2c_parameter[0]);
500
501 btcoexist->btc_fill_h2c(btcoexist, 0x61, 1, h2c_parameter);
502}
503
504static void halbtc8192e2ant_update_btlink_info(struct btc_coexist *btcoexist)
505{
506 struct btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info;
507 bool bt_hson = false;
508
509 btcoexist->btc_get(btcoexist, BTC_GET_BL_HS_OPERATION, &bt_hson);
510
511 bt_link_info->bt_link_exist = coex_sta->bt_link_exist;
512 bt_link_info->sco_exist = coex_sta->sco_exist;
513 bt_link_info->a2dp_exist = coex_sta->a2dp_exist;
514 bt_link_info->pan_exist = coex_sta->pan_exist;
515 bt_link_info->hid_exist = coex_sta->hid_exist;
516
517 /* work around for HS mode. */
518 if (bt_hson) {
519 bt_link_info->pan_exist = true;
520 bt_link_info->bt_link_exist = true;
521 }
522
523 /* check if Sco only */
524 if (bt_link_info->sco_exist &&
525 !bt_link_info->a2dp_exist &&
526 !bt_link_info->pan_exist &&
527 !bt_link_info->hid_exist)
528 bt_link_info->sco_only = true;
529 else
530 bt_link_info->sco_only = false;
531
532 /* check if A2dp only */
533 if (!bt_link_info->sco_exist &&
534 bt_link_info->a2dp_exist &&
535 !bt_link_info->pan_exist &&
536 !bt_link_info->hid_exist)
537 bt_link_info->a2dp_only = true;
538 else
539 bt_link_info->a2dp_only = false;
540
541 /* check if Pan only */
542 if (!bt_link_info->sco_exist &&
543 !bt_link_info->a2dp_exist &&
544 bt_link_info->pan_exist &&
545 !bt_link_info->hid_exist)
546 bt_link_info->pan_only = true;
547 else
548 bt_link_info->pan_only = false;
549
550 /* check if Hid only */
551 if (!bt_link_info->sco_exist &&
552 !bt_link_info->a2dp_exist &&
553 !bt_link_info->pan_exist &&
554 bt_link_info->hid_exist)
555 bt_link_info->hid_only = true;
556 else
557 bt_link_info->hid_only = false;
558}
559
560static u8 halbtc8192e2ant_action_algorithm(struct btc_coexist *btcoexist)
561{
562 struct btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info;
563 struct btc_stack_info *stack_info = &btcoexist->stack_info;
564 bool bt_hson = false;
565 u8 algorithm = BT_8192E_2ANT_COEX_ALGO_UNDEFINED;
566 u8 num_diffprofile = 0;
567
568 btcoexist->btc_get(btcoexist, BTC_GET_BL_HS_OPERATION, &bt_hson);
569
570 if (!bt_link_info->bt_link_exist) {
571 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
572 "No BT link exists!!!\n");
573 return algorithm;
574 }
575
576 if (bt_link_info->sco_exist)
577 num_diffprofile++;
578 if (bt_link_info->hid_exist)
579 num_diffprofile++;
580 if (bt_link_info->pan_exist)
581 num_diffprofile++;
582 if (bt_link_info->a2dp_exist)
583 num_diffprofile++;
584
585 if (num_diffprofile == 1) {
586 if (bt_link_info->sco_exist) {
587 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
588 "SCO only\n");
589 algorithm = BT_8192E_2ANT_COEX_ALGO_SCO;
590 } else {
591 if (bt_link_info->hid_exist) {
592 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
593 "HID only\n");
594 algorithm = BT_8192E_2ANT_COEX_ALGO_HID;
595 } else if (bt_link_info->a2dp_exist) {
596 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
597 "A2DP only\n");
598 algorithm = BT_8192E_2ANT_COEX_ALGO_A2DP;
599 } else if (bt_link_info->pan_exist) {
600 if (bt_hson) {
601 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
602 "PAN(HS) only\n");
603 algorithm =
604 BT_8192E_2ANT_COEX_ALGO_PANHS;
605 } else {
606 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
607 "PAN(EDR) only\n");
608 algorithm =
609 BT_8192E_2ANT_COEX_ALGO_PANEDR;
610 }
611 }
612 }
613 } else if (num_diffprofile == 2) {
614 if (bt_link_info->sco_exist) {
615 if (bt_link_info->hid_exist) {
616 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
617 "SCO + HID\n");
618 algorithm = BT_8192E_2ANT_COEX_ALGO_SCO;
619 } else if (bt_link_info->a2dp_exist) {
620 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
621 "SCO + A2DP ==> SCO\n");
622 algorithm = BT_8192E_2ANT_COEX_ALGO_PANEDR_HID;
623 } else if (bt_link_info->pan_exist) {
624 if (bt_hson) {
625 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
626 "SCO + PAN(HS)\n");
627 algorithm = BT_8192E_2ANT_COEX_ALGO_SCO;
628 } else {
629 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
630 "SCO + PAN(EDR)\n");
631 algorithm =
632 BT_8192E_2ANT_COEX_ALGO_SCO_PAN;
633 }
634 }
635 } else {
636 if (bt_link_info->hid_exist &&
637 bt_link_info->a2dp_exist) {
638 if (stack_info->num_of_hid >= 2) {
639 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
640 "HID*2 + A2DP\n");
641 algorithm =
642 BT_8192E_2ANT_COEX_ALGO_HID_A2DP_PANEDR;
643 } else {
644 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
645 "HID + A2DP\n");
646 algorithm =
647 BT_8192E_2ANT_COEX_ALGO_HID_A2DP;
648 }
649 } else if (bt_link_info->hid_exist &&
650 bt_link_info->pan_exist) {
651 if (bt_hson) {
652 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
653 "HID + PAN(HS)\n");
654 algorithm = BT_8192E_2ANT_COEX_ALGO_HID;
655 } else {
656 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
657 "HID + PAN(EDR)\n");
658 algorithm =
659 BT_8192E_2ANT_COEX_ALGO_PANEDR_HID;
660 }
661 } else if (bt_link_info->pan_exist &&
662 bt_link_info->a2dp_exist) {
663 if (bt_hson) {
664 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
665 "A2DP + PAN(HS)\n");
666 algorithm =
667 BT_8192E_2ANT_COEX_ALGO_A2DP_PANHS;
668 } else {
669 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
670 "A2DP + PAN(EDR)\n");
671 algorithm =
672 BT_8192E_2ANT_COEX_ALGO_PANEDR_A2DP;
673 }
674 }
675 }
676 } else if (num_diffprofile == 3) {
677 if (bt_link_info->sco_exist) {
678 if (bt_link_info->hid_exist &&
679 bt_link_info->a2dp_exist) {
680 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
681 "SCO + HID + A2DP ==> HID\n");
682 algorithm = BT_8192E_2ANT_COEX_ALGO_PANEDR_HID;
683 } else if (bt_link_info->hid_exist &&
684 bt_link_info->pan_exist) {
685 if (bt_hson) {
686 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
687 "SCO + HID + PAN(HS)\n");
688 algorithm = BT_8192E_2ANT_COEX_ALGO_SCO;
689 } else {
690 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
691 "SCO + HID + PAN(EDR)\n");
692 algorithm =
693 BT_8192E_2ANT_COEX_ALGO_SCO_PAN;
694 }
695 } else if (bt_link_info->pan_exist &&
696 bt_link_info->a2dp_exist) {
697 if (bt_hson) {
698 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
699 "SCO + A2DP + PAN(HS)\n");
700 algorithm = BT_8192E_2ANT_COEX_ALGO_SCO;
701 } else {
702 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
703 "SCO + A2DP + PAN(EDR)\n");
704 algorithm =
705 BT_8192E_2ANT_COEX_ALGO_PANEDR_HID;
706 }
707 }
708 } else {
709 if (bt_link_info->hid_exist &&
710 bt_link_info->pan_exist &&
711 bt_link_info->a2dp_exist) {
712 if (bt_hson) {
713 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
714 "HID + A2DP + PAN(HS)\n");
715 algorithm =
716 BT_8192E_2ANT_COEX_ALGO_HID_A2DP;
717 } else {
718 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
719 "HID + A2DP + PAN(EDR)\n");
720 algorithm =
721 BT_8192E_2ANT_COEX_ALGO_HID_A2DP_PANEDR;
722 }
723 }
724 }
725 } else if (num_diffprofile >= 3) {
726 if (bt_link_info->sco_exist) {
727 if (bt_link_info->hid_exist &&
728 bt_link_info->pan_exist &&
729 bt_link_info->a2dp_exist) {
730 if (bt_hson) {
731 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
732 "ErrorSCO+HID+A2DP+PAN(HS)\n");
733
734 } else {
735 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
736 "SCO+HID+A2DP+PAN(EDR)\n");
737 algorithm =
738 BT_8192E_2ANT_COEX_ALGO_PANEDR_HID;
739 }
740 }
741 }
742 }
743
744 return algorithm;
745}
746
747static void halbtc8192e2ant_setfw_dac_swinglevel(struct btc_coexist *btcoexist,
748 u8 dac_swinglvl)
749{
750 u8 h2c_parameter[1] = {0};
751
752 /* There are several type of dacswing
753 * 0x18/ 0x10/ 0xc/ 0x8/ 0x4/ 0x6 */
754 h2c_parameter[0] = dac_swinglvl;
755
756 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_EXEC,
757 "[BTCoex], Set Dac Swing Level = 0x%x\n", dac_swinglvl);
758 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_EXEC,
759 "[BTCoex], FW write 0x64 = 0x%x\n", h2c_parameter[0]);
760
761 btcoexist->btc_fill_h2c(btcoexist, 0x64, 1, h2c_parameter);
762}
763
764static void halbtc8192e2ant_set_fwdec_btpwr(struct btc_coexist *btcoexist,
765 u8 dec_btpwr_lvl)
766{
767 u8 h2c_parameter[1] = {0};
768
769 h2c_parameter[0] = dec_btpwr_lvl;
770
771 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_EXEC,
772 "[BTCoex] decrease Bt Power level = %d, FW write 0x62 = 0x%x\n",
773 dec_btpwr_lvl, h2c_parameter[0]);
774
775 btcoexist->btc_fill_h2c(btcoexist, 0x62, 1, h2c_parameter);
776}
777
778static void halbtc8192e2ant_dec_btpwr(struct btc_coexist *btcoexist,
779 bool force_exec, u8 dec_btpwr_lvl)
780{
781 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW,
782 "[BTCoex], %s Dec BT power level = %d\n",
783 (force_exec ? "force to" : ""), dec_btpwr_lvl);
784 coex_dm->cur_dec_bt_pwr = dec_btpwr_lvl;
785
786 if (!force_exec) {
787 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_DETAIL,
788 "[BTCoex], preBtDecPwrLvl =%d, curBtDecPwrLvl =%d\n",
789 coex_dm->pre_dec_bt_pwr, coex_dm->cur_dec_bt_pwr);
790 }
791 halbtc8192e2ant_set_fwdec_btpwr(btcoexist, coex_dm->cur_dec_bt_pwr);
792
793 coex_dm->pre_dec_bt_pwr = coex_dm->cur_dec_bt_pwr;
794}
795
796static void halbtc8192e2ant_set_bt_autoreport(struct btc_coexist *btcoexist,
797 bool enable_autoreport)
798{
799 u8 h2c_parameter[1] = {0};
800
801 h2c_parameter[0] = 0;
802
803 if (enable_autoreport)
804 h2c_parameter[0] |= BIT(0);
805
806 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_EXEC,
807 "[BTCoex], BT FW auto report : %s, FW write 0x68 = 0x%x\n",
808 (enable_autoreport ? "Enabled!!" : "Disabled!!"),
809 h2c_parameter[0]);
810
811 btcoexist->btc_fill_h2c(btcoexist, 0x68, 1, h2c_parameter);
812}
813
814static void halbtc8192e2ant_bt_autoreport(struct btc_coexist *btcoexist,
815 bool force_exec,
816 bool enable_autoreport)
817{
818 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW,
819 "[BTCoex], %s BT Auto report = %s\n",
820 (force_exec ? "force to" : ""),
821 ((enable_autoreport) ? "Enabled" : "Disabled"));
822 coex_dm->cur_bt_auto_report = enable_autoreport;
823
824 if (!force_exec) {
825 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_DETAIL,
826 "[BTCoex] bPreBtAutoReport =%d, bCurBtAutoReport =%d\n",
827 coex_dm->pre_bt_auto_report,
828 coex_dm->cur_bt_auto_report);
829
830 if (coex_dm->pre_bt_auto_report == coex_dm->cur_bt_auto_report)
831 return;
832 }
833 halbtc8192e2ant_set_bt_autoreport(btcoexist,
834 coex_dm->cur_bt_auto_report);
835
836 coex_dm->pre_bt_auto_report = coex_dm->cur_bt_auto_report;
837}
838
839static void halbtc8192e2ant_fw_dac_swinglvl(struct btc_coexist *btcoexist,
840 bool force_exec, u8 fw_dac_swinglvl)
841{
842 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW,
843 "[BTCoex], %s set FW Dac Swing level = %d\n",
844 (force_exec ? "force to" : ""), fw_dac_swinglvl);
845 coex_dm->cur_fw_dac_swing_lvl = fw_dac_swinglvl;
846
847 if (!force_exec) {
848 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_DETAIL,
849 "[BTCoex] preFwDacSwingLvl =%d, curFwDacSwingLvl =%d\n",
850 coex_dm->pre_fw_dac_swing_lvl,
851 coex_dm->cur_fw_dac_swing_lvl);
852
853 if (coex_dm->pre_fw_dac_swing_lvl ==
854 coex_dm->cur_fw_dac_swing_lvl)
855 return;
856 }
857
858 halbtc8192e2ant_setfw_dac_swinglevel(btcoexist,
859 coex_dm->cur_fw_dac_swing_lvl);
860
861 coex_dm->pre_fw_dac_swing_lvl = coex_dm->cur_fw_dac_swing_lvl;
862}
863
864static void set_sw_rf_rx_lpf_corner(struct btc_coexist *btcoexist,
865 bool rx_rf_shrink_on)
866{
867 if (rx_rf_shrink_on) {
868 /* Shrink RF Rx LPF corner */
869 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW_EXEC,
870 "[BTCoex], Shrink RF Rx LPF corner!!\n");
871 btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x1e,
872 0xfffff, 0xffffc);
873 } else {
874 /* Resume RF Rx LPF corner
875 * After initialized, we can use coex_dm->btRf0x1eBackup */
876 if (btcoexist->initilized) {
877 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW_EXEC,
878 "[BTCoex], Resume RF Rx LPF corner!!\n");
879 btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x1e,
880 0xfffff,
881 coex_dm->bt_rf0x1e_backup);
882 }
883 }
884}
885
886static void halbtc8192e2ant_rf_shrink(struct btc_coexist *btcoexist,
887 bool force_exec, bool rx_rf_shrink_on)
888{
889 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW,
890 "[BTCoex], %s turn Rx RF Shrink = %s\n",
891 (force_exec ? "force to" : ""),
892 ((rx_rf_shrink_on) ? "ON" : "OFF"));
893 coex_dm->cur_rf_rx_lpf_shrink = rx_rf_shrink_on;
894
895 if (!force_exec) {
896 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW_DETAIL,
897 "[BTCoex]bPreRfRxLpfShrink =%d, bCurRfRxLpfShrink =%d\n",
898 coex_dm->pre_rf_rx_lpf_shrink,
899 coex_dm->cur_rf_rx_lpf_shrink);
900
901 if (coex_dm->pre_rf_rx_lpf_shrink ==
902 coex_dm->cur_rf_rx_lpf_shrink)
903 return;
904 }
905 set_sw_rf_rx_lpf_corner(btcoexist, coex_dm->cur_rf_rx_lpf_shrink);
906
907 coex_dm->pre_rf_rx_lpf_shrink = coex_dm->cur_rf_rx_lpf_shrink;
908}
909
910static void halbtc8192e2ant_set_dac_swingreg(struct btc_coexist *btcoexist,
911 u32 level)
912{
913 u8 val = (u8)level;
914
915 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW_EXEC,
916 "[BTCoex], Write SwDacSwing = 0x%x\n", level);
917 btcoexist->btc_write_1byte_bitmask(btcoexist, 0x883, 0x3e, val);
918}
919
920static void setsw_fulltime_dacswing(struct btc_coexist *btcoexist,
921 bool sw_dac_swingon,
922 u32 sw_dac_swinglvl)
923{
924 if (sw_dac_swingon)
925 halbtc8192e2ant_set_dac_swingreg(btcoexist, sw_dac_swinglvl);
926 else
927 halbtc8192e2ant_set_dac_swingreg(btcoexist, 0x18);
928}
929
930static void halbtc8192e2ant_dacswing(struct btc_coexist *btcoexist,
931 bool force_exec, bool dac_swingon,
932 u32 dac_swinglvl)
933{
934 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW,
935 "[BTCoex], %s turn DacSwing =%s, dac_swinglvl = 0x%x\n",
936 (force_exec ? "force to" : ""),
937 ((dac_swingon) ? "ON" : "OFF"), dac_swinglvl);
938 coex_dm->cur_dac_swing_on = dac_swingon;
939 coex_dm->cur_dac_swing_lvl = dac_swinglvl;
940
941 if (!force_exec) {
942 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW_DETAIL,
943 "[BTCoex], bPreDacSwingOn =%d, preDacSwingLvl = 0x%x, ",
944 coex_dm->pre_dac_swing_on,
945 coex_dm->pre_dac_swing_lvl);
946 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW_DETAIL,
947 "bCurDacSwingOn =%d, curDacSwingLvl = 0x%x\n",
948 coex_dm->cur_dac_swing_on,
949 coex_dm->cur_dac_swing_lvl);
950
951 if ((coex_dm->pre_dac_swing_on == coex_dm->cur_dac_swing_on) &&
952 (coex_dm->pre_dac_swing_lvl == coex_dm->cur_dac_swing_lvl))
953 return;
954 }
955 mdelay(30);
956 setsw_fulltime_dacswing(btcoexist, dac_swingon, dac_swinglvl);
957
958 coex_dm->pre_dac_swing_on = coex_dm->cur_dac_swing_on;
959 coex_dm->pre_dac_swing_lvl = coex_dm->cur_dac_swing_lvl;
960}
961
962static void halbtc8192e2ant_set_agc_table(struct btc_coexist *btcoexist,
963 bool agc_table_en)
964{
965 /* BB AGC Gain Table */
966 if (agc_table_en) {
967 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW_EXEC,
968 "[BTCoex], BB Agc Table On!\n");
969 btcoexist->btc_write_4byte(btcoexist, 0xc78, 0x0a1A0001);
970 btcoexist->btc_write_4byte(btcoexist, 0xc78, 0x091B0001);
971 btcoexist->btc_write_4byte(btcoexist, 0xc78, 0x081C0001);
972 btcoexist->btc_write_4byte(btcoexist, 0xc78, 0x071D0001);
973 btcoexist->btc_write_4byte(btcoexist, 0xc78, 0x061E0001);
974 btcoexist->btc_write_4byte(btcoexist, 0xc78, 0x051F0001);
975 } else {
976 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW_EXEC,
977 "[BTCoex], BB Agc Table Off!\n");
978 btcoexist->btc_write_4byte(btcoexist, 0xc78, 0xaa1A0001);
979 btcoexist->btc_write_4byte(btcoexist, 0xc78, 0xa91B0001);
980 btcoexist->btc_write_4byte(btcoexist, 0xc78, 0xa81C0001);
981 btcoexist->btc_write_4byte(btcoexist, 0xc78, 0xa71D0001);
982 btcoexist->btc_write_4byte(btcoexist, 0xc78, 0xa61E0001);
983 btcoexist->btc_write_4byte(btcoexist, 0xc78, 0xa51F0001);
984 }
985}
986
987static void halbtc8192e2ant_agctable(struct btc_coexist *btcoexist,
988 bool force_exec, bool agc_table_en)
989{
990 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW,
991 "[BTCoex], %s %s Agc Table\n",
992 (force_exec ? "force to" : ""),
993 ((agc_table_en) ? "Enable" : "Disable"));
994 coex_dm->cur_agc_table_en = agc_table_en;
995
996 if (!force_exec) {
997 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW_DETAIL,
998 "[BTCoex], bPreAgcTableEn =%d, bCurAgcTableEn =%d\n",
999 coex_dm->pre_agc_table_en, coex_dm->cur_agc_table_en);
1000
1001 if (coex_dm->pre_agc_table_en == coex_dm->cur_agc_table_en)
1002 return;
1003 }
1004 halbtc8192e2ant_set_agc_table(btcoexist, agc_table_en);
1005
1006 coex_dm->pre_agc_table_en = coex_dm->cur_agc_table_en;
1007}
1008
1009static void halbtc8192e2ant_set_coex_table(struct btc_coexist *btcoexist,
1010 u32 val0x6c0, u32 val0x6c4,
1011 u32 val0x6c8, u8 val0x6cc)
1012{
1013 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW_EXEC,
1014 "[BTCoex], set coex table, set 0x6c0 = 0x%x\n", val0x6c0);
1015 btcoexist->btc_write_4byte(btcoexist, 0x6c0, val0x6c0);
1016
1017 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW_EXEC,
1018 "[BTCoex], set coex table, set 0x6c4 = 0x%x\n", val0x6c4);
1019 btcoexist->btc_write_4byte(btcoexist, 0x6c4, val0x6c4);
1020
1021 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW_EXEC,
1022 "[BTCoex], set coex table, set 0x6c8 = 0x%x\n", val0x6c8);
1023 btcoexist->btc_write_4byte(btcoexist, 0x6c8, val0x6c8);
1024
1025 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW_EXEC,
1026 "[BTCoex], set coex table, set 0x6cc = 0x%x\n", val0x6cc);
1027 btcoexist->btc_write_1byte(btcoexist, 0x6cc, val0x6cc);
1028}
1029
1030static void halbtc_coex_table(struct btc_coexist *btcoexist, bool force_exec,
1031 u32 val0x6c0, u32 val0x6c4,
1032 u32 val0x6c8, u8 val0x6cc)
1033{
1034 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW,
1035 "[BTCoex], %s write Coex Table 0x6c0 = 0x%x, ",
1036 (force_exec ? "force to" : ""), val0x6c0);
1037 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW,
1038 "0x6c4 = 0x%x, 0x6c8 = 0x%x, 0x6cc = 0x%x\n",
1039 val0x6c4, val0x6c8, val0x6cc);
1040 coex_dm->cur_val0x6c0 = val0x6c0;
1041 coex_dm->cur_val0x6c4 = val0x6c4;
1042 coex_dm->cur_val0x6c8 = val0x6c8;
1043 coex_dm->cur_val0x6cc = val0x6cc;
1044
1045 if (!force_exec) {
1046 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW_DETAIL,
1047 "[BTCoex], preVal0x6c0 = 0x%x, preVal0x6c4 = 0x%x, ",
1048 coex_dm->pre_val0x6c0, coex_dm->pre_val0x6c4);
1049 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW_DETAIL,
1050 "preVal0x6c8 = 0x%x, preVal0x6cc = 0x%x!!\n",
1051 coex_dm->pre_val0x6c8, coex_dm->pre_val0x6cc);
1052 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW_DETAIL,
1053 "[BTCoex], curVal0x6c0 = 0x%x, curVal0x6c4 = 0x%x\n",
1054 coex_dm->cur_val0x6c0, coex_dm->cur_val0x6c4);
1055 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW_DETAIL,
1056 "curVal0x6c8 = 0x%x, curVal0x6cc = 0x%x !!\n",
1057 coex_dm->cur_val0x6c8, coex_dm->cur_val0x6cc);
1058
1059 if ((coex_dm->pre_val0x6c0 == coex_dm->cur_val0x6c0) &&
1060 (coex_dm->pre_val0x6c4 == coex_dm->cur_val0x6c4) &&
1061 (coex_dm->pre_val0x6c8 == coex_dm->cur_val0x6c8) &&
1062 (coex_dm->pre_val0x6cc == coex_dm->cur_val0x6cc))
1063 return;
1064 }
1065 halbtc8192e2ant_set_coex_table(btcoexist, val0x6c0, val0x6c4,
1066 val0x6c8, val0x6cc);
1067
1068 coex_dm->pre_val0x6c0 = coex_dm->cur_val0x6c0;
1069 coex_dm->pre_val0x6c4 = coex_dm->cur_val0x6c4;
1070 coex_dm->pre_val0x6c8 = coex_dm->cur_val0x6c8;
1071 coex_dm->pre_val0x6cc = coex_dm->cur_val0x6cc;
1072}
1073
1074static void halbtc_coex_table_with_type(struct btc_coexist *btcoexist,
1075 bool force_exec, u8 type)
1076{
1077 switch (type) {
1078 case 0:
1079 halbtc_coex_table(btcoexist, force_exec, 0x55555555,
1080 0x5a5a5a5a, 0xffffff, 0x3);
1081 break;
1082 case 1:
1083 halbtc_coex_table(btcoexist, force_exec, 0x5a5a5a5a,
1084 0x5a5a5a5a, 0xffffff, 0x3);
1085 break;
1086 case 2:
1087 halbtc_coex_table(btcoexist, force_exec, 0x55555555,
1088 0x5ffb5ffb, 0xffffff, 0x3);
1089 break;
1090 case 3:
1091 halbtc_coex_table(btcoexist, force_exec, 0xdfffdfff,
1092 0x5fdb5fdb, 0xffffff, 0x3);
1093 break;
1094 case 4:
1095 halbtc_coex_table(btcoexist, force_exec, 0xdfffdfff,
1096 0x5ffb5ffb, 0xffffff, 0x3);
1097 break;
1098 default:
1099 break;
1100 }
1101}
1102
1103static void halbtc8192e2ant_set_fw_ignore_wlanact(struct btc_coexist *btcoexist,
1104 bool enable)
1105{
1106 u8 h2c_parameter[1] = {0};
1107
1108 if (enable)
1109 h2c_parameter[0] |= BIT(0); /* function enable */
1110
1111 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_EXEC,
1112 "[BTCoex]set FW for BT Ignore Wlan_Act, FW write 0x63 = 0x%x\n",
1113 h2c_parameter[0]);
1114
1115 btcoexist->btc_fill_h2c(btcoexist, 0x63, 1, h2c_parameter);
1116}
1117
1118static void halbtc8192e2ant_ignorewlanact(struct btc_coexist *btcoexist,
1119 bool force_exec, bool enable)
1120{
1121 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW,
1122 "[BTCoex], %s turn Ignore WlanAct %s\n",
1123 (force_exec ? "force to" : ""), (enable ? "ON" : "OFF"));
1124 coex_dm->cur_ignore_wlan_act = enable;
1125
1126 if (!force_exec) {
1127 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_DETAIL,
1128 "[BTCoex], bPreIgnoreWlanAct = %d ",
1129 coex_dm->pre_ignore_wlan_act);
1130 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_DETAIL,
1131 "bCurIgnoreWlanAct = %d!!\n",
1132 coex_dm->cur_ignore_wlan_act);
1133
1134 if (coex_dm->pre_ignore_wlan_act ==
1135 coex_dm->cur_ignore_wlan_act)
1136 return;
1137 }
1138 halbtc8192e2ant_set_fw_ignore_wlanact(btcoexist, enable);
1139
1140 coex_dm->pre_ignore_wlan_act = coex_dm->cur_ignore_wlan_act;
1141}
1142
1143static void halbtc8192e2ant_setfwpstdma(struct btc_coexist *btcoexist, u8 byte1,
1144 u8 byte2, u8 byte3, u8 byte4, u8 byte5)
1145{
1146 u8 h2c_parameter[5];
1147
1148 h2c_parameter[0] = byte1;
1149 h2c_parameter[1] = byte2;
1150 h2c_parameter[2] = byte3;
1151 h2c_parameter[3] = byte4;
1152 h2c_parameter[4] = byte5;
1153
1154 coex_dm->ps_tdma_para[0] = byte1;
1155 coex_dm->ps_tdma_para[1] = byte2;
1156 coex_dm->ps_tdma_para[2] = byte3;
1157 coex_dm->ps_tdma_para[3] = byte4;
1158 coex_dm->ps_tdma_para[4] = byte5;
1159
1160 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_EXEC,
1161 "[BTCoex], FW write 0x60(5bytes) = 0x%x%08x\n",
1162 h2c_parameter[0],
1163 h2c_parameter[1] << 24 | h2c_parameter[2] << 16 |
1164 h2c_parameter[3] << 8 | h2c_parameter[4]);
1165
1166 btcoexist->btc_fill_h2c(btcoexist, 0x60, 5, h2c_parameter);
1167}
1168
1169static void halbtc_sw_mechanism1(struct btc_coexist *btcoexist,
1170 bool shrink_rx_lpf, bool low_penalty_ra,
1171 bool limited_dig, bool btlan_constrain)
1172{
1173 halbtc8192e2ant_rf_shrink(btcoexist, NORMAL_EXEC, shrink_rx_lpf);
1174}
1175
1176static void halbtc_sw_mechanism2(struct btc_coexist *btcoexist,
1177 bool agc_table_shift, bool adc_backoff,
1178 bool sw_dac_swing, u32 dac_swinglvl)
1179{
1180 halbtc8192e2ant_agctable(btcoexist, NORMAL_EXEC, agc_table_shift);
1181 halbtc8192e2ant_dacswing(btcoexist, NORMAL_EXEC, sw_dac_swing,
1182 dac_swinglvl);
1183}
1184
1185static void halbtc8192e2ant_ps_tdma(struct btc_coexist *btcoexist,
1186 bool force_exec, bool turn_on, u8 type)
1187{
1188 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW,
1189 "[BTCoex], %s turn %s PS TDMA, type =%d\n",
1190 (force_exec ? "force to" : ""),
1191 (turn_on ? "ON" : "OFF"), type);
1192 coex_dm->cur_ps_tdma_on = turn_on;
1193 coex_dm->cur_ps_tdma = type;
1194
1195 if (!force_exec) {
1196 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_DETAIL,
1197 "[BTCoex], bPrePsTdmaOn = %d, bCurPsTdmaOn = %d!!\n",
1198 coex_dm->pre_ps_tdma_on, coex_dm->cur_ps_tdma_on);
1199 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_DETAIL,
1200 "[BTCoex], prePsTdma = %d, curPsTdma = %d!!\n",
1201 coex_dm->pre_ps_tdma, coex_dm->cur_ps_tdma);
1202
1203 if ((coex_dm->pre_ps_tdma_on == coex_dm->cur_ps_tdma_on) &&
1204 (coex_dm->pre_ps_tdma == coex_dm->cur_ps_tdma))
1205 return;
1206 }
1207 if (turn_on) {
1208 switch (type) {
1209 case 1:
1210 default:
1211 halbtc8192e2ant_setfwpstdma(btcoexist, 0xe3, 0x1a,
1212 0x1a, 0xe1, 0x90);
1213 break;
1214 case 2:
1215 halbtc8192e2ant_setfwpstdma(btcoexist, 0xe3, 0x12,
1216 0x12, 0xe1, 0x90);
1217 break;
1218 case 3:
1219 halbtc8192e2ant_setfwpstdma(btcoexist, 0xe3, 0x1c,
1220 0x3, 0xf1, 0x90);
1221 break;
1222 case 4:
1223 halbtc8192e2ant_setfwpstdma(btcoexist, 0xe3, 0x10,
1224 0x3, 0xf1, 0x90);
1225 break;
1226 case 5:
1227 halbtc8192e2ant_setfwpstdma(btcoexist, 0xe3, 0x1a,
1228 0x1a, 0x60, 0x90);
1229 break;
1230 case 6:
1231 halbtc8192e2ant_setfwpstdma(btcoexist, 0xe3, 0x12,
1232 0x12, 0x60, 0x90);
1233 break;
1234 case 7:
1235 halbtc8192e2ant_setfwpstdma(btcoexist, 0xe3, 0x1c,
1236 0x3, 0x70, 0x90);
1237 break;
1238 case 8:
1239 halbtc8192e2ant_setfwpstdma(btcoexist, 0xa3, 0x10,
1240 0x3, 0x70, 0x90);
1241 break;
1242 case 9:
1243 halbtc8192e2ant_setfwpstdma(btcoexist, 0xe3, 0x1a,
1244 0x1a, 0xe1, 0x10);
1245 break;
1246 case 10:
1247 halbtc8192e2ant_setfwpstdma(btcoexist, 0xe3, 0x12,
1248 0x12, 0xe1, 0x10);
1249 break;
1250 case 11:
1251 halbtc8192e2ant_setfwpstdma(btcoexist, 0xe3, 0x1c,
1252 0x3, 0xf1, 0x10);
1253 break;
1254 case 12:
1255 halbtc8192e2ant_setfwpstdma(btcoexist, 0xe3, 0x10,
1256 0x3, 0xf1, 0x10);
1257 break;
1258 case 13:
1259 halbtc8192e2ant_setfwpstdma(btcoexist, 0xe3, 0x1a,
1260 0x1a, 0xe0, 0x10);
1261 break;
1262 case 14:
1263 halbtc8192e2ant_setfwpstdma(btcoexist, 0xe3, 0x12,
1264 0x12, 0xe0, 0x10);
1265 break;
1266 case 15:
1267 halbtc8192e2ant_setfwpstdma(btcoexist, 0xe3, 0x1c,
1268 0x3, 0xf0, 0x10);
1269 break;
1270 case 16:
1271 halbtc8192e2ant_setfwpstdma(btcoexist, 0xe3, 0x12,
1272 0x3, 0xf0, 0x10);
1273 break;
1274 case 17:
1275 halbtc8192e2ant_setfwpstdma(btcoexist, 0x61, 0x20,
1276 0x03, 0x10, 0x10);
1277 break;
1278 case 18:
1279 halbtc8192e2ant_setfwpstdma(btcoexist, 0xe3, 0x5,
1280 0x5, 0xe1, 0x90);
1281 break;
1282 case 19:
1283 halbtc8192e2ant_setfwpstdma(btcoexist, 0xe3, 0x25,
1284 0x25, 0xe1, 0x90);
1285 break;
1286 case 20:
1287 halbtc8192e2ant_setfwpstdma(btcoexist, 0xe3, 0x25,
1288 0x25, 0x60, 0x90);
1289 break;
1290 case 21:
1291 halbtc8192e2ant_setfwpstdma(btcoexist, 0xe3, 0x15,
1292 0x03, 0x70, 0x90);
1293 break;
1294 case 71:
1295 halbtc8192e2ant_setfwpstdma(btcoexist, 0xe3, 0x1a,
1296 0x1a, 0xe1, 0x90);
1297 break;
1298 }
1299 } else {
1300 /* disable PS tdma */
1301 switch (type) {
1302 default:
1303 case 0:
1304 halbtc8192e2ant_setfwpstdma(btcoexist, 0x8, 0x0, 0x0,
1305 0x0, 0x0);
1306 btcoexist->btc_write_1byte(btcoexist, 0x92c, 0x4);
1307 break;
1308 case 1:
1309 halbtc8192e2ant_setfwpstdma(btcoexist, 0x0, 0x0, 0x0,
1310 0x8, 0x0);
1311 mdelay(5);
1312 btcoexist->btc_write_1byte(btcoexist, 0x92c, 0x20);
1313 break;
1314 }
1315 }
1316
1317 /* update pre state */
1318 coex_dm->pre_ps_tdma_on = coex_dm->cur_ps_tdma_on;
1319 coex_dm->pre_ps_tdma = coex_dm->cur_ps_tdma;
1320}
1321
1322static void set_switch_sstype(struct btc_coexist *btcoexist, u8 sstype)
1323{
1324 u8 mimops = BTC_MIMO_PS_DYNAMIC;
1325 u32 disra_mask = 0x0;
1326
1327 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
1328 "[BTCoex], REAL set SS Type = %d\n", sstype);
1329
1330 disra_mask = halbtc8192e2ant_decidera_mask(btcoexist, sstype,
1331 coex_dm->curra_masktype);
1332 halbtc8192e2ant_updatera_mask(btcoexist, FORCE_EXEC, disra_mask);
1333
1334 if (sstype == 1) {
1335 halbtc8192e2ant_ps_tdma(btcoexist, FORCE_EXEC, false, 1);
1336 /* switch ofdm path */
1337 btcoexist->btc_write_1byte(btcoexist, 0xc04, 0x11);
1338 btcoexist->btc_write_1byte(btcoexist, 0xd04, 0x1);
1339 btcoexist->btc_write_4byte(btcoexist, 0x90c, 0x81111111);
1340 /* switch cck patch */
1341 btcoexist->btc_write_1byte_bitmask(btcoexist, 0xe77, 0x4, 0x1);
1342 btcoexist->btc_write_1byte(btcoexist, 0xa07, 0x81);
1343 mimops = BTC_MIMO_PS_STATIC;
1344 } else if (sstype == 2) {
1345 halbtc8192e2ant_ps_tdma(btcoexist, FORCE_EXEC, false, 0);
1346 btcoexist->btc_write_1byte(btcoexist, 0xc04, 0x33);
1347 btcoexist->btc_write_1byte(btcoexist, 0xd04, 0x3);
1348 btcoexist->btc_write_4byte(btcoexist, 0x90c, 0x81121313);
1349 btcoexist->btc_write_1byte_bitmask(btcoexist, 0xe77, 0x4, 0x0);
1350 btcoexist->btc_write_1byte(btcoexist, 0xa07, 0x41);
1351 mimops = BTC_MIMO_PS_DYNAMIC;
1352 }
1353 /* set rx 1ss or 2ss */
1354 btcoexist->btc_set(btcoexist, BTC_SET_ACT_SEND_MIMO_PS, &mimops);
1355}
1356
1357static void halbtc8192e2ant_switch_sstype(struct btc_coexist *btcoexist,
1358 bool force_exec, u8 new_sstype)
1359{
1360 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
1361 "[BTCoex], %s Switch SS Type = %d\n",
1362 (force_exec ? "force to" : ""), new_sstype);
1363 coex_dm->cur_sstype = new_sstype;
1364
1365 if (!force_exec) {
1366 if (coex_dm->pre_sstype == coex_dm->cur_sstype)
1367 return;
1368 }
1369 set_switch_sstype(btcoexist, coex_dm->cur_sstype);
1370
1371 coex_dm->pre_sstype = coex_dm->cur_sstype;
1372}
1373
1374static void halbtc8192e2ant_coex_alloff(struct btc_coexist *btcoexist)
1375{
1376 /* fw all off */
1377 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 1);
1378 halbtc8192e2ant_fw_dac_swinglvl(btcoexist, NORMAL_EXEC, 6);
1379 halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 0);
1380
1381 /* sw all off */
1382 halbtc_sw_mechanism1(btcoexist, false, false, false, false);
1383 halbtc_sw_mechanism2(btcoexist, false, false, false, 0x18);
1384
1385 /* hw all off */
1386 halbtc_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
1387}
1388
1389static void halbtc8192e2ant_init_coex_dm(struct btc_coexist *btcoexist)
1390{
1391 /* force to reset coex mechanism */
1392
1393 halbtc8192e2ant_ps_tdma(btcoexist, FORCE_EXEC, false, 1);
1394 halbtc8192e2ant_fw_dac_swinglvl(btcoexist, FORCE_EXEC, 6);
1395 halbtc8192e2ant_dec_btpwr(btcoexist, FORCE_EXEC, 0);
1396
1397 halbtc_coex_table_with_type(btcoexist, FORCE_EXEC, 0);
1398 halbtc8192e2ant_switch_sstype(btcoexist, FORCE_EXEC, 2);
1399
1400 halbtc_sw_mechanism1(btcoexist, false, false, false, false);
1401 halbtc_sw_mechanism2(btcoexist, false, false, false, 0x18);
1402}
1403
1404static void halbtc8192e2ant_action_bt_inquiry(struct btc_coexist *btcoexist)
1405{
1406 bool low_pwr_disable = true;
1407
1408 btcoexist->btc_set(btcoexist, BTC_SET_ACT_DISABLE_LOW_POWER,
1409 &low_pwr_disable);
1410
1411 halbtc8192e2ant_switch_sstype(btcoexist, NORMAL_EXEC, 1);
1412
1413 halbtc_coex_table_with_type(btcoexist, NORMAL_EXEC, 2);
1414 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 3);
1415 halbtc8192e2ant_fw_dac_swinglvl(btcoexist, NORMAL_EXEC, 6);
1416 halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 0);
1417
1418 halbtc_sw_mechanism1(btcoexist, false, false, false, false);
1419 halbtc_sw_mechanism2(btcoexist, false, false, false, 0x18);
1420}
1421
1422static bool halbtc8192e2ant_is_common_action(struct btc_coexist *btcoexist)
1423{
1424 struct btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info;
1425 bool common = false, wifi_connected = false, wifi_busy = false;
1426 bool bt_hson = false, low_pwr_disable = false;
1427
1428 btcoexist->btc_get(btcoexist, BTC_GET_BL_HS_OPERATION, &bt_hson);
1429 btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_CONNECTED,
1430 &wifi_connected);
1431 btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_BUSY, &wifi_busy);
1432
1433 if (bt_link_info->sco_exist || bt_link_info->hid_exist)
1434 halbtc8192e2ant_limited_tx(btcoexist, NORMAL_EXEC, 1, 0, 0, 0);
1435 else
1436 halbtc8192e2ant_limited_tx(btcoexist, NORMAL_EXEC, 0, 0, 0, 0);
1437
1438 if (!wifi_connected) {
1439 low_pwr_disable = false;
1440 btcoexist->btc_set(btcoexist, BTC_SET_ACT_DISABLE_LOW_POWER,
1441 &low_pwr_disable);
1442
1443 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
1444 "[BTCoex], Wifi non-connected idle!!\n");
1445
1446 if ((BT_8192E_2ANT_BT_STATUS_NON_CONNECTED_IDLE ==
1447 coex_dm->bt_status) ||
1448 (BT_8192E_2ANT_BT_STATUS_CONNECTED_IDLE ==
1449 coex_dm->bt_status)) {
1450 halbtc8192e2ant_switch_sstype(btcoexist, NORMAL_EXEC,
1451 2);
1452 halbtc_coex_table_with_type(btcoexist,
1453 NORMAL_EXEC, 1);
1454 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, false,
1455 0);
1456 } else {
1457 halbtc8192e2ant_switch_sstype(btcoexist,
1458 NORMAL_EXEC, 1);
1459 halbtc_coex_table_with_type(btcoexist,
1460 NORMAL_EXEC, 0);
1461 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1462 false, 1);
1463 }
1464
1465 halbtc8192e2ant_fw_dac_swinglvl(btcoexist, NORMAL_EXEC, 6);
1466 halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 0);
1467
1468 halbtc_sw_mechanism1(btcoexist, false, false, false,
1469 false);
1470 halbtc_sw_mechanism2(btcoexist, false, false, false,
1471 0x18);
1472
1473 common = true;
1474 } else {
1475 if (BT_8192E_2ANT_BT_STATUS_NON_CONNECTED_IDLE ==
1476 coex_dm->bt_status) {
1477 low_pwr_disable = false;
1478 btcoexist->btc_set(btcoexist,
1479 BTC_SET_ACT_DISABLE_LOW_POWER,
1480 &low_pwr_disable);
1481
1482 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
1483 "Wifi connected + BT non connected-idle!!\n");
1484
1485 halbtc8192e2ant_switch_sstype(btcoexist,
1486 NORMAL_EXEC, 2);
1487 halbtc_coex_table_with_type(btcoexist,
1488 NORMAL_EXEC, 1);
1489 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1490 false, 0);
1491 halbtc8192e2ant_fw_dac_swinglvl(btcoexist, NORMAL_EXEC,
1492 6);
1493 halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 0);
1494
1495 halbtc_sw_mechanism1(btcoexist, false, false,
1496 false, false);
1497 halbtc_sw_mechanism2(btcoexist, false, false,
1498 false, 0x18);
1499
1500 common = true;
1501 } else if (BT_8192E_2ANT_BT_STATUS_CONNECTED_IDLE ==
1502 coex_dm->bt_status) {
1503 low_pwr_disable = true;
1504 btcoexist->btc_set(btcoexist,
1505 BTC_SET_ACT_DISABLE_LOW_POWER,
1506 &low_pwr_disable);
1507
1508 if (bt_hson)
1509 return false;
1510 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
1511 "Wifi connected + BT connected-idle!!\n");
1512
1513 halbtc8192e2ant_switch_sstype(btcoexist, NORMAL_EXEC,
1514 2);
1515 halbtc_coex_table_with_type(btcoexist,
1516 NORMAL_EXEC, 1);
1517 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1518 false, 0);
1519 halbtc8192e2ant_fw_dac_swinglvl(btcoexist,
1520 NORMAL_EXEC, 6);
1521 halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 0);
1522
1523 halbtc_sw_mechanism1(btcoexist, true, false,
1524 false, false);
1525 halbtc_sw_mechanism2(btcoexist, false, false,
1526 false, 0x18);
1527
1528 common = true;
1529 } else {
1530 low_pwr_disable = true;
1531 btcoexist->btc_set(btcoexist,
1532 BTC_SET_ACT_DISABLE_LOW_POWER,
1533 &low_pwr_disable);
1534
1535 if (wifi_busy) {
1536 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
1537 "Wifi Connected-Busy + BT Busy!!\n");
1538 common = false;
1539 } else {
1540 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
1541 "Wifi Connected-Idle + BT Busy!!\n");
1542
1543 halbtc8192e2ant_switch_sstype(btcoexist,
1544 NORMAL_EXEC, 1);
1545 halbtc_coex_table_with_type(btcoexist,
1546 NORMAL_EXEC, 2);
1547 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1548 true, 21);
1549 halbtc8192e2ant_fw_dac_swinglvl(btcoexist,
1550 NORMAL_EXEC, 6);
1551 halbtc8192e2ant_dec_btpwr(btcoexist,
1552 NORMAL_EXEC, 0);
1553 halbtc_sw_mechanism1(btcoexist, false,
1554 false, false,
1555 false);
1556 halbtc_sw_mechanism2(btcoexist, false,
1557 false, false,
1558 0x18);
1559 common = true;
1560 }
1561 }
1562 }
1563 return common;
1564}
1565
1566static void halbtc8192e2ant_tdma_duration_adjust(struct btc_coexist *btcoexist,
1567 bool sco_hid, bool tx_pause,
1568 u8 max_interval)
1569{
1570 static int up, dn, m, n, wait_cnt;
1571 /* 0: no change, +1: increase WiFi duration,
1572 * -1: decrease WiFi duration */
1573 int result;
1574 u8 retry_cnt = 0;
1575
1576 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW,
1577 "[BTCoex], TdmaDurationAdjust()\n");
1578
1579 if (!coex_dm->auto_tdma_adjust) {
1580 coex_dm->auto_tdma_adjust = true;
1581 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_DETAIL,
1582 "[BTCoex], first run TdmaDurationAdjust()!!\n");
1583 if (sco_hid) {
1584 if (tx_pause) {
1585 if (max_interval == 1) {
1586 halbtc8192e2ant_ps_tdma(btcoexist,
1587 NORMAL_EXEC,
1588 true, 13);
1589 coex_dm->ps_tdma_du_adj_type = 13;
1590 } else if (max_interval == 2) {
1591 halbtc8192e2ant_ps_tdma(btcoexist,
1592 NORMAL_EXEC,
1593 true, 14);
1594 coex_dm->ps_tdma_du_adj_type = 14;
1595 } else if (max_interval == 3) {
1596 halbtc8192e2ant_ps_tdma(btcoexist,
1597 NORMAL_EXEC,
1598 true, 15);
1599 coex_dm->ps_tdma_du_adj_type = 15;
1600 } else {
1601 halbtc8192e2ant_ps_tdma(btcoexist,
1602 NORMAL_EXEC,
1603 true, 15);
1604 coex_dm->ps_tdma_du_adj_type = 15;
1605 }
1606 } else {
1607 if (max_interval == 1) {
1608 halbtc8192e2ant_ps_tdma(btcoexist,
1609 NORMAL_EXEC,
1610 true, 9);
1611 coex_dm->ps_tdma_du_adj_type = 9;
1612 } else if (max_interval == 2) {
1613 halbtc8192e2ant_ps_tdma(btcoexist,
1614 NORMAL_EXEC,
1615 true, 10);
1616 coex_dm->ps_tdma_du_adj_type = 10;
1617 } else if (max_interval == 3) {
1618 halbtc8192e2ant_ps_tdma(btcoexist,
1619 NORMAL_EXEC,
1620 true, 11);
1621 coex_dm->ps_tdma_du_adj_type = 11;
1622 } else {
1623 halbtc8192e2ant_ps_tdma(btcoexist,
1624 NORMAL_EXEC,
1625 true, 11);
1626 coex_dm->ps_tdma_du_adj_type = 11;
1627 }
1628 }
1629 } else {
1630 if (tx_pause) {
1631 if (max_interval == 1) {
1632 halbtc8192e2ant_ps_tdma(btcoexist,
1633 NORMAL_EXEC,
1634 true, 5);
1635 coex_dm->ps_tdma_du_adj_type = 5;
1636 } else if (max_interval == 2) {
1637 halbtc8192e2ant_ps_tdma(btcoexist,
1638 NORMAL_EXEC,
1639 true, 6);
1640 coex_dm->ps_tdma_du_adj_type = 6;
1641 } else if (max_interval == 3) {
1642 halbtc8192e2ant_ps_tdma(btcoexist,
1643 NORMAL_EXEC,
1644 true, 7);
1645 coex_dm->ps_tdma_du_adj_type = 7;
1646 } else {
1647 halbtc8192e2ant_ps_tdma(btcoexist,
1648 NORMAL_EXEC,
1649 true, 7);
1650 coex_dm->ps_tdma_du_adj_type = 7;
1651 }
1652 } else {
1653 if (max_interval == 1) {
1654 halbtc8192e2ant_ps_tdma(btcoexist,
1655 NORMAL_EXEC,
1656 true, 1);
1657 coex_dm->ps_tdma_du_adj_type = 1;
1658 } else if (max_interval == 2) {
1659 halbtc8192e2ant_ps_tdma(btcoexist,
1660 NORMAL_EXEC,
1661 true, 2);
1662 coex_dm->ps_tdma_du_adj_type = 2;
1663 } else if (max_interval == 3) {
1664 halbtc8192e2ant_ps_tdma(btcoexist,
1665 NORMAL_EXEC,
1666 true, 3);
1667 coex_dm->ps_tdma_du_adj_type = 3;
1668 } else {
1669 halbtc8192e2ant_ps_tdma(btcoexist,
1670 NORMAL_EXEC,
1671 true, 3);
1672 coex_dm->ps_tdma_du_adj_type = 3;
1673 }
1674 }
1675 }
1676
1677 up = 0;
1678 dn = 0;
1679 m = 1;
1680 n = 3;
1681 result = 0;
1682 wait_cnt = 0;
1683 } else {
1684 /* accquire the BT TRx retry count from BT_Info byte2 */
1685 retry_cnt = coex_sta->bt_retry_cnt;
1686 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_DETAIL,
1687 "[BTCoex], retry_cnt = %d\n", retry_cnt);
1688 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_DETAIL,
1689 "[BTCoex], up =%d, dn =%d, m =%d, n =%d, wait_cnt =%d\n",
1690 up, dn, m, n, wait_cnt);
1691 result = 0;
1692 wait_cnt++;
1693 /* no retry in the last 2-second duration */
1694 if (retry_cnt == 0) {
1695 up++;
1696 dn--;
1697
1698 if (dn <= 0)
1699 dn = 0;
1700
1701 if (up >= n) {
1702 wait_cnt = 0;
1703 n = 3;
1704 up = 0;
1705 dn = 0;
1706 result = 1;
1707 BTC_PRINT(BTC_MSG_ALGORITHM,
1708 ALGO_TRACE_FW_DETAIL,
1709 "[BTCoex]Increase wifi duration!!\n");
1710 }
1711 } else if (retry_cnt <= 3) {
1712 up--;
1713 dn++;
1714
1715 if (up <= 0)
1716 up = 0;
1717
1718 if (dn == 2) {
1719 if (wait_cnt <= 2)
1720 m++;
1721 else
1722 m = 1;
1723
1724 if (m >= 20)
1725 m = 20;
1726
1727 n = 3 * m;
1728 up = 0;
1729 dn = 0;
1730 wait_cnt = 0;
1731 result = -1;
1732 BTC_PRINT(BTC_MSG_ALGORITHM,
1733 ALGO_TRACE_FW_DETAIL,
1734 "Reduce wifi duration for retry<3\n");
1735 }
1736 } else {
1737 if (wait_cnt == 1)
1738 m++;
1739 else
1740 m = 1;
1741
1742 if (m >= 20)
1743 m = 20;
1744
1745 n = 3*m;
1746 up = 0;
1747 dn = 0;
1748 wait_cnt = 0;
1749 result = -1;
1750 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_DETAIL,
1751 "Decrease wifi duration for retryCounter>3!!\n");
1752 }
1753
1754 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_DETAIL,
1755 "[BTCoex], max Interval = %d\n", max_interval);
1756 if (max_interval == 1) {
1757 if (tx_pause) {
1758 BTC_PRINT(BTC_MSG_ALGORITHM,
1759 ALGO_TRACE_FW_DETAIL,
1760 "[BTCoex], TxPause = 1\n");
1761
1762 if (coex_dm->cur_ps_tdma == 71) {
1763 halbtc8192e2ant_ps_tdma(btcoexist,
1764 NORMAL_EXEC,
1765 true, 5);
1766 coex_dm->ps_tdma_du_adj_type = 5;
1767 } else if (coex_dm->cur_ps_tdma == 1) {
1768 halbtc8192e2ant_ps_tdma(btcoexist,
1769 NORMAL_EXEC,
1770 true, 5);
1771 coex_dm->ps_tdma_du_adj_type = 5;
1772 } else if (coex_dm->cur_ps_tdma == 2) {
1773 halbtc8192e2ant_ps_tdma(btcoexist,
1774 NORMAL_EXEC,
1775 true, 6);
1776 coex_dm->ps_tdma_du_adj_type = 6;
1777 } else if (coex_dm->cur_ps_tdma == 3) {
1778 halbtc8192e2ant_ps_tdma(btcoexist,
1779 NORMAL_EXEC,
1780 true, 7);
1781 coex_dm->ps_tdma_du_adj_type = 7;
1782 } else if (coex_dm->cur_ps_tdma == 4) {
1783 halbtc8192e2ant_ps_tdma(btcoexist,
1784 NORMAL_EXEC,
1785 true, 8);
1786 coex_dm->ps_tdma_du_adj_type = 8;
1787 }
1788 if (coex_dm->cur_ps_tdma == 9) {
1789 halbtc8192e2ant_ps_tdma(btcoexist,
1790 NORMAL_EXEC,
1791 true, 13);
1792 coex_dm->ps_tdma_du_adj_type = 13;
1793 } else if (coex_dm->cur_ps_tdma == 10) {
1794 halbtc8192e2ant_ps_tdma(btcoexist,
1795 NORMAL_EXEC,
1796 true, 14);
1797 coex_dm->ps_tdma_du_adj_type = 14;
1798 } else if (coex_dm->cur_ps_tdma == 11) {
1799 halbtc8192e2ant_ps_tdma(btcoexist,
1800 NORMAL_EXEC,
1801 true, 15);
1802 coex_dm->ps_tdma_du_adj_type = 15;
1803 } else if (coex_dm->cur_ps_tdma == 12) {
1804 halbtc8192e2ant_ps_tdma(btcoexist,
1805 NORMAL_EXEC,
1806 true, 16);
1807 coex_dm->ps_tdma_du_adj_type = 16;
1808 }
1809
1810 if (result == -1) {
1811 if (coex_dm->cur_ps_tdma == 5) {
1812 halbtc8192e2ant_ps_tdma(
1813 btcoexist,
1814 NORMAL_EXEC,
1815 true, 6);
1816 coex_dm->ps_tdma_du_adj_type =
1817 6;
1818 } else if (coex_dm->cur_ps_tdma == 6) {
1819 halbtc8192e2ant_ps_tdma(
1820 btcoexist,
1821 NORMAL_EXEC,
1822 true, 7);
1823 coex_dm->ps_tdma_du_adj_type =
1824 7;
1825 } else if (coex_dm->cur_ps_tdma == 7) {
1826 halbtc8192e2ant_ps_tdma(
1827 btcoexist,
1828 NORMAL_EXEC,
1829 true, 8);
1830 coex_dm->ps_tdma_du_adj_type =
1831 8;
1832 } else if (coex_dm->cur_ps_tdma == 13) {
1833 halbtc8192e2ant_ps_tdma(
1834 btcoexist,
1835 NORMAL_EXEC,
1836 true, 14);
1837 coex_dm->ps_tdma_du_adj_type =
1838 14;
1839 } else if (coex_dm->cur_ps_tdma == 14) {
1840 halbtc8192e2ant_ps_tdma(
1841 btcoexist,
1842 NORMAL_EXEC,
1843 true, 15);
1844 coex_dm->ps_tdma_du_adj_type =
1845 15;
1846 } else if (coex_dm->cur_ps_tdma == 15) {
1847 halbtc8192e2ant_ps_tdma(
1848 btcoexist,
1849 NORMAL_EXEC,
1850 true, 16);
1851 coex_dm->ps_tdma_du_adj_type =
1852 16;
1853 }
1854 } else if (result == 1) {
1855 if (coex_dm->cur_ps_tdma == 8) {
1856 halbtc8192e2ant_ps_tdma(
1857 btcoexist,
1858 NORMAL_EXEC,
1859 true, 7);
1860 coex_dm->ps_tdma_du_adj_type =
1861 7;
1862 } else if (coex_dm->cur_ps_tdma == 7) {
1863 halbtc8192e2ant_ps_tdma(
1864 btcoexist,
1865 NORMAL_EXEC,
1866 true, 6);
1867 coex_dm->ps_tdma_du_adj_type =
1868 6;
1869 } else if (coex_dm->cur_ps_tdma == 6) {
1870 halbtc8192e2ant_ps_tdma(
1871 btcoexist,
1872 NORMAL_EXEC,
1873 true, 5);
1874 coex_dm->ps_tdma_du_adj_type =
1875 5;
1876 } else if (coex_dm->cur_ps_tdma == 16) {
1877 halbtc8192e2ant_ps_tdma(
1878 btcoexist,
1879 NORMAL_EXEC,
1880 true, 15);
1881 coex_dm->ps_tdma_du_adj_type =
1882 15;
1883 } else if (coex_dm->cur_ps_tdma == 15) {
1884 halbtc8192e2ant_ps_tdma(
1885 btcoexist,
1886 NORMAL_EXEC,
1887 true, 14);
1888 coex_dm->ps_tdma_du_adj_type =
1889 14;
1890 } else if (coex_dm->cur_ps_tdma == 14) {
1891 halbtc8192e2ant_ps_tdma(
1892 btcoexist,
1893 NORMAL_EXEC,
1894 true, 13);
1895 coex_dm->ps_tdma_du_adj_type =
1896 13;
1897 }
1898 }
1899 } else {
1900 BTC_PRINT(BTC_MSG_ALGORITHM,
1901 ALGO_TRACE_FW_DETAIL,
1902 "[BTCoex], TxPause = 0\n");
1903 if (coex_dm->cur_ps_tdma == 5) {
1904 halbtc8192e2ant_ps_tdma(btcoexist,
1905 NORMAL_EXEC,
1906 true, 71);
1907 coex_dm->ps_tdma_du_adj_type = 71;
1908 } else if (coex_dm->cur_ps_tdma == 6) {
1909 halbtc8192e2ant_ps_tdma(btcoexist,
1910 NORMAL_EXEC,
1911 true, 2);
1912 coex_dm->ps_tdma_du_adj_type = 2;
1913 } else if (coex_dm->cur_ps_tdma == 7) {
1914 halbtc8192e2ant_ps_tdma(btcoexist,
1915 NORMAL_EXEC,
1916 true, 3);
1917 coex_dm->ps_tdma_du_adj_type = 3;
1918 } else if (coex_dm->cur_ps_tdma == 8) {
1919 halbtc8192e2ant_ps_tdma(btcoexist,
1920 NORMAL_EXEC,
1921 true, 4);
1922 coex_dm->ps_tdma_du_adj_type = 4;
1923 }
1924 if (coex_dm->cur_ps_tdma == 13) {
1925 halbtc8192e2ant_ps_tdma(btcoexist,
1926 NORMAL_EXEC,
1927 true, 9);
1928 coex_dm->ps_tdma_du_adj_type = 9;
1929 } else if (coex_dm->cur_ps_tdma == 14) {
1930 halbtc8192e2ant_ps_tdma(btcoexist,
1931 NORMAL_EXEC,
1932 true, 10);
1933 coex_dm->ps_tdma_du_adj_type = 10;
1934 } else if (coex_dm->cur_ps_tdma == 15) {
1935 halbtc8192e2ant_ps_tdma(btcoexist,
1936 NORMAL_EXEC,
1937 true, 11);
1938 coex_dm->ps_tdma_du_adj_type = 11;
1939 } else if (coex_dm->cur_ps_tdma == 16) {
1940 halbtc8192e2ant_ps_tdma(btcoexist,
1941 NORMAL_EXEC,
1942 true, 12);
1943 coex_dm->ps_tdma_du_adj_type = 12;
1944 }
1945
1946 if (result == -1) {
1947 if (coex_dm->cur_ps_tdma == 71) {
1948 halbtc8192e2ant_ps_tdma(
1949 btcoexist,
1950 NORMAL_EXEC,
1951 true, 1);
1952 coex_dm->ps_tdma_du_adj_type =
1953 1;
1954 } else if (coex_dm->cur_ps_tdma == 1) {
1955 halbtc8192e2ant_ps_tdma(
1956 btcoexist,
1957 NORMAL_EXEC,
1958 true, 2);
1959 coex_dm->ps_tdma_du_adj_type =
1960 2;
1961 } else if (coex_dm->cur_ps_tdma == 2) {
1962 halbtc8192e2ant_ps_tdma(
1963 btcoexist,
1964 NORMAL_EXEC,
1965 true, 3);
1966 coex_dm->ps_tdma_du_adj_type =
1967 3;
1968 } else if (coex_dm->cur_ps_tdma == 3) {
1969 halbtc8192e2ant_ps_tdma(
1970 btcoexist,
1971 NORMAL_EXEC,
1972 true, 4);
1973 coex_dm->ps_tdma_du_adj_type =
1974 4;
1975 } else if (coex_dm->cur_ps_tdma == 9) {
1976 halbtc8192e2ant_ps_tdma(
1977 btcoexist,
1978 NORMAL_EXEC,
1979 true, 10);
1980 coex_dm->ps_tdma_du_adj_type =
1981 10;
1982 } else if (coex_dm->cur_ps_tdma == 10) {
1983 halbtc8192e2ant_ps_tdma(
1984 btcoexist,
1985 NORMAL_EXEC,
1986 true, 11);
1987 coex_dm->ps_tdma_du_adj_type =
1988 11;
1989 } else if (coex_dm->cur_ps_tdma == 11) {
1990 halbtc8192e2ant_ps_tdma(
1991 btcoexist,
1992 NORMAL_EXEC,
1993 true, 12);
1994 coex_dm->ps_tdma_du_adj_type =
1995 12;
1996 }
1997 } else if (result == 1) {
1998 if (coex_dm->cur_ps_tdma == 4) {
1999 halbtc8192e2ant_ps_tdma(
2000 btcoexist,
2001 NORMAL_EXEC,
2002 true, 3);
2003 coex_dm->ps_tdma_du_adj_type =
2004 3;
2005 } else if (coex_dm->cur_ps_tdma == 3) {
2006 halbtc8192e2ant_ps_tdma(
2007 btcoexist,
2008 NORMAL_EXEC,
2009 true, 2);
2010 coex_dm->ps_tdma_du_adj_type =
2011 2;
2012 } else if (coex_dm->cur_ps_tdma == 2) {
2013 halbtc8192e2ant_ps_tdma(
2014 btcoexist,
2015 NORMAL_EXEC,
2016 true, 1);
2017 coex_dm->ps_tdma_du_adj_type =
2018 1;
2019 } else if (coex_dm->cur_ps_tdma == 1) {
2020 halbtc8192e2ant_ps_tdma(
2021 btcoexist,
2022 NORMAL_EXEC,
2023 true, 71);
2024 coex_dm->ps_tdma_du_adj_type =
2025 71;
2026 } else if (coex_dm->cur_ps_tdma == 12) {
2027 halbtc8192e2ant_ps_tdma(
2028 btcoexist,
2029 NORMAL_EXEC,
2030 true, 11);
2031 coex_dm->ps_tdma_du_adj_type =
2032 11;
2033 } else if (coex_dm->cur_ps_tdma == 11) {
2034 halbtc8192e2ant_ps_tdma(
2035 btcoexist,
2036 NORMAL_EXEC,
2037 true, 10);
2038 coex_dm->ps_tdma_du_adj_type =
2039 10;
2040 } else if (coex_dm->cur_ps_tdma == 10) {
2041 halbtc8192e2ant_ps_tdma(
2042 btcoexist,
2043 NORMAL_EXEC,
2044 true, 9);
2045 coex_dm->ps_tdma_du_adj_type =
2046 9;
2047 }
2048 }
2049 }
2050 } else if (max_interval == 2) {
2051 if (tx_pause) {
2052 BTC_PRINT(BTC_MSG_ALGORITHM,
2053 ALGO_TRACE_FW_DETAIL,
2054 "[BTCoex], TxPause = 1\n");
2055 if (coex_dm->cur_ps_tdma == 1) {
2056 halbtc8192e2ant_ps_tdma(btcoexist,
2057 NORMAL_EXEC,
2058 true, 6);
2059 coex_dm->ps_tdma_du_adj_type = 6;
2060 } else if (coex_dm->cur_ps_tdma == 2) {
2061 halbtc8192e2ant_ps_tdma(btcoexist,
2062 NORMAL_EXEC,
2063 true, 6);
2064 coex_dm->ps_tdma_du_adj_type = 6;
2065 } else if (coex_dm->cur_ps_tdma == 3) {
2066 halbtc8192e2ant_ps_tdma(btcoexist,
2067 NORMAL_EXEC,
2068 true, 7);
2069 coex_dm->ps_tdma_du_adj_type = 7;
2070 } else if (coex_dm->cur_ps_tdma == 4) {
2071 halbtc8192e2ant_ps_tdma(btcoexist,
2072 NORMAL_EXEC,
2073 true, 8);
2074 coex_dm->ps_tdma_du_adj_type = 8;
2075 }
2076 if (coex_dm->cur_ps_tdma == 9) {
2077 halbtc8192e2ant_ps_tdma(btcoexist,
2078 NORMAL_EXEC,
2079 true, 14);
2080 coex_dm->ps_tdma_du_adj_type = 14;
2081 } else if (coex_dm->cur_ps_tdma == 10) {
2082 halbtc8192e2ant_ps_tdma(btcoexist,
2083 NORMAL_EXEC,
2084 true, 14);
2085 coex_dm->ps_tdma_du_adj_type = 14;
2086 } else if (coex_dm->cur_ps_tdma == 11) {
2087 halbtc8192e2ant_ps_tdma(btcoexist,
2088 NORMAL_EXEC,
2089 true, 15);
2090 coex_dm->ps_tdma_du_adj_type = 15;
2091 } else if (coex_dm->cur_ps_tdma == 12) {
2092 halbtc8192e2ant_ps_tdma(btcoexist,
2093 NORMAL_EXEC,
2094 true, 16);
2095 coex_dm->ps_tdma_du_adj_type = 16;
2096 }
2097 if (result == -1) {
2098 if (coex_dm->cur_ps_tdma == 5) {
2099 halbtc8192e2ant_ps_tdma(
2100 btcoexist,
2101 NORMAL_EXEC,
2102 true, 6);
2103 coex_dm->ps_tdma_du_adj_type =
2104 6;
2105 } else if (coex_dm->cur_ps_tdma == 6) {
2106 halbtc8192e2ant_ps_tdma(
2107 btcoexist,
2108 NORMAL_EXEC,
2109 true, 7);
2110 coex_dm->ps_tdma_du_adj_type =
2111 7;
2112 } else if (coex_dm->cur_ps_tdma == 7) {
2113 halbtc8192e2ant_ps_tdma(
2114 btcoexist,
2115 NORMAL_EXEC,
2116 true, 8);
2117 coex_dm->ps_tdma_du_adj_type =
2118 8;
2119 } else if (coex_dm->cur_ps_tdma == 13) {
2120 halbtc8192e2ant_ps_tdma(
2121 btcoexist,
2122 NORMAL_EXEC,
2123 true, 14);
2124 coex_dm->ps_tdma_du_adj_type =
2125 14;
2126 } else if (coex_dm->cur_ps_tdma == 14) {
2127 halbtc8192e2ant_ps_tdma(
2128 btcoexist,
2129 NORMAL_EXEC,
2130 true, 15);
2131 coex_dm->ps_tdma_du_adj_type =
2132 15;
2133 } else if (coex_dm->cur_ps_tdma == 15) {
2134 halbtc8192e2ant_ps_tdma(
2135 btcoexist,
2136 NORMAL_EXEC,
2137 true, 16);
2138 coex_dm->ps_tdma_du_adj_type =
2139 16;
2140 }
2141 } else if (result == 1) {
2142 if (coex_dm->cur_ps_tdma == 8) {
2143 halbtc8192e2ant_ps_tdma(
2144 btcoexist,
2145 NORMAL_EXEC,
2146 true, 7);
2147 coex_dm->ps_tdma_du_adj_type =
2148 7;
2149 } else if (coex_dm->cur_ps_tdma == 7) {
2150 halbtc8192e2ant_ps_tdma(
2151 btcoexist,
2152 NORMAL_EXEC,
2153 true, 6);
2154 coex_dm->ps_tdma_du_adj_type =
2155 6;
2156 } else if (coex_dm->cur_ps_tdma == 6) {
2157 halbtc8192e2ant_ps_tdma(
2158 btcoexist,
2159 NORMAL_EXEC,
2160 true, 6);
2161 coex_dm->ps_tdma_du_adj_type =
2162 6;
2163 } else if (coex_dm->cur_ps_tdma == 16) {
2164 halbtc8192e2ant_ps_tdma(
2165 btcoexist,
2166 NORMAL_EXEC,
2167 true, 15);
2168 coex_dm->ps_tdma_du_adj_type =
2169 15;
2170 } else if (coex_dm->cur_ps_tdma == 15) {
2171 halbtc8192e2ant_ps_tdma(
2172 btcoexist,
2173 NORMAL_EXEC,
2174 true, 14);
2175 coex_dm->ps_tdma_du_adj_type =
2176 14;
2177 } else if (coex_dm->cur_ps_tdma == 14) {
2178 halbtc8192e2ant_ps_tdma(
2179 btcoexist,
2180 NORMAL_EXEC,
2181 true, 14);
2182 coex_dm->ps_tdma_du_adj_type =
2183 14;
2184 }
2185 }
2186 } else {
2187 BTC_PRINT(BTC_MSG_ALGORITHM,
2188 ALGO_TRACE_FW_DETAIL,
2189 "[BTCoex], TxPause = 0\n");
2190 if (coex_dm->cur_ps_tdma == 5) {
2191 halbtc8192e2ant_ps_tdma(btcoexist,
2192 NORMAL_EXEC,
2193 true, 2);
2194 coex_dm->ps_tdma_du_adj_type = 2;
2195 } else if (coex_dm->cur_ps_tdma == 6) {
2196 halbtc8192e2ant_ps_tdma(btcoexist,
2197 NORMAL_EXEC,
2198 true, 2);
2199 coex_dm->ps_tdma_du_adj_type = 2;
2200 } else if (coex_dm->cur_ps_tdma == 7) {
2201 halbtc8192e2ant_ps_tdma(btcoexist,
2202 NORMAL_EXEC,
2203 true, 3);
2204 coex_dm->ps_tdma_du_adj_type = 3;
2205 } else if (coex_dm->cur_ps_tdma == 8) {
2206 halbtc8192e2ant_ps_tdma(btcoexist,
2207 NORMAL_EXEC,
2208 true, 4);
2209 coex_dm->ps_tdma_du_adj_type = 4;
2210 }
2211 if (coex_dm->cur_ps_tdma == 13) {
2212 halbtc8192e2ant_ps_tdma(btcoexist,
2213 NORMAL_EXEC,
2214 true, 10);
2215 coex_dm->ps_tdma_du_adj_type = 10;
2216 } else if (coex_dm->cur_ps_tdma == 14) {
2217 halbtc8192e2ant_ps_tdma(btcoexist,
2218 NORMAL_EXEC,
2219 true, 10);
2220 coex_dm->ps_tdma_du_adj_type = 10;
2221 } else if (coex_dm->cur_ps_tdma == 15) {
2222 halbtc8192e2ant_ps_tdma(btcoexist,
2223 NORMAL_EXEC,
2224 true, 11);
2225 coex_dm->ps_tdma_du_adj_type = 11;
2226 } else if (coex_dm->cur_ps_tdma == 16) {
2227 halbtc8192e2ant_ps_tdma(btcoexist,
2228 NORMAL_EXEC,
2229 true, 12);
2230 coex_dm->ps_tdma_du_adj_type = 12;
2231 }
2232 if (result == -1) {
2233 if (coex_dm->cur_ps_tdma == 1) {
2234 halbtc8192e2ant_ps_tdma(
2235 btcoexist,
2236 NORMAL_EXEC,
2237 true, 2);
2238 coex_dm->ps_tdma_du_adj_type =
2239 2;
2240 } else if (coex_dm->cur_ps_tdma == 2) {
2241 halbtc8192e2ant_ps_tdma(
2242 btcoexist,
2243 NORMAL_EXEC,
2244 true, 3);
2245 coex_dm->ps_tdma_du_adj_type =
2246 3;
2247 } else if (coex_dm->cur_ps_tdma == 3) {
2248 halbtc8192e2ant_ps_tdma(
2249 btcoexist,
2250 NORMAL_EXEC,
2251 true, 4);
2252 coex_dm->ps_tdma_du_adj_type =
2253 4;
2254 } else if (coex_dm->cur_ps_tdma == 9) {
2255 halbtc8192e2ant_ps_tdma(
2256 btcoexist,
2257 NORMAL_EXEC,
2258 true, 10);
2259 coex_dm->ps_tdma_du_adj_type =
2260 10;
2261 } else if (coex_dm->cur_ps_tdma == 10) {
2262 halbtc8192e2ant_ps_tdma(
2263 btcoexist,
2264 NORMAL_EXEC,
2265 true, 11);
2266 coex_dm->ps_tdma_du_adj_type =
2267 11;
2268 } else if (coex_dm->cur_ps_tdma == 11) {
2269 halbtc8192e2ant_ps_tdma(
2270 btcoexist,
2271 NORMAL_EXEC,
2272 true, 12);
2273 coex_dm->ps_tdma_du_adj_type =
2274 12;
2275 }
2276 } else if (result == 1) {
2277 if (coex_dm->cur_ps_tdma == 4) {
2278 halbtc8192e2ant_ps_tdma(
2279 btcoexist,
2280 NORMAL_EXEC,
2281 true, 3);
2282 coex_dm->ps_tdma_du_adj_type =
2283 3;
2284 } else if (coex_dm->cur_ps_tdma == 3) {
2285 halbtc8192e2ant_ps_tdma(
2286 btcoexist,
2287 NORMAL_EXEC,
2288 true, 2);
2289 coex_dm->ps_tdma_du_adj_type =
2290 2;
2291 } else if (coex_dm->cur_ps_tdma == 2) {
2292 halbtc8192e2ant_ps_tdma(
2293 btcoexist,
2294 NORMAL_EXEC,
2295 true, 2);
2296 coex_dm->ps_tdma_du_adj_type =
2297 2;
2298 } else if (coex_dm->cur_ps_tdma == 12) {
2299 halbtc8192e2ant_ps_tdma(
2300 btcoexist,
2301 NORMAL_EXEC,
2302 true, 11);
2303 coex_dm->ps_tdma_du_adj_type =
2304 11;
2305 } else if (coex_dm->cur_ps_tdma == 11) {
2306 halbtc8192e2ant_ps_tdma(
2307 btcoexist,
2308 NORMAL_EXEC,
2309 true, 10);
2310 coex_dm->ps_tdma_du_adj_type =
2311 10;
2312 } else if (coex_dm->cur_ps_tdma == 10) {
2313 halbtc8192e2ant_ps_tdma(
2314 btcoexist,
2315 NORMAL_EXEC,
2316 true, 10);
2317 coex_dm->ps_tdma_du_adj_type =
2318 10;
2319 }
2320 }
2321 }
2322 } else if (max_interval == 3) {
2323 if (tx_pause) {
2324 BTC_PRINT(BTC_MSG_ALGORITHM,
2325 ALGO_TRACE_FW_DETAIL,
2326 "[BTCoex], TxPause = 1\n");
2327 if (coex_dm->cur_ps_tdma == 1) {
2328 halbtc8192e2ant_ps_tdma(btcoexist,
2329 NORMAL_EXEC,
2330 true, 7);
2331 coex_dm->ps_tdma_du_adj_type = 7;
2332 } else if (coex_dm->cur_ps_tdma == 2) {
2333 halbtc8192e2ant_ps_tdma(btcoexist,
2334 NORMAL_EXEC,
2335 true, 7);
2336 coex_dm->ps_tdma_du_adj_type = 7;
2337 } else if (coex_dm->cur_ps_tdma == 3) {
2338 halbtc8192e2ant_ps_tdma(btcoexist,
2339 NORMAL_EXEC,
2340 true, 7);
2341 coex_dm->ps_tdma_du_adj_type = 7;
2342 } else if (coex_dm->cur_ps_tdma == 4) {
2343 halbtc8192e2ant_ps_tdma(btcoexist,
2344 NORMAL_EXEC,
2345 true, 8);
2346 coex_dm->ps_tdma_du_adj_type = 8;
2347 }
2348 if (coex_dm->cur_ps_tdma == 9) {
2349 halbtc8192e2ant_ps_tdma(btcoexist,
2350 NORMAL_EXEC,
2351 true, 15);
2352 coex_dm->ps_tdma_du_adj_type = 15;
2353 } else if (coex_dm->cur_ps_tdma == 10) {
2354 halbtc8192e2ant_ps_tdma(btcoexist,
2355 NORMAL_EXEC,
2356 true, 15);
2357 coex_dm->ps_tdma_du_adj_type = 15;
2358 } else if (coex_dm->cur_ps_tdma == 11) {
2359 halbtc8192e2ant_ps_tdma(btcoexist,
2360 NORMAL_EXEC,
2361 true, 15);
2362 coex_dm->ps_tdma_du_adj_type = 15;
2363 } else if (coex_dm->cur_ps_tdma == 12) {
2364 halbtc8192e2ant_ps_tdma(btcoexist,
2365 NORMAL_EXEC,
2366 true, 16);
2367 coex_dm->ps_tdma_du_adj_type = 16;
2368 }
2369 if (result == -1) {
2370 if (coex_dm->cur_ps_tdma == 5) {
2371 halbtc8192e2ant_ps_tdma(
2372 btcoexist,
2373 NORMAL_EXEC,
2374 true, 7);
2375 coex_dm->ps_tdma_du_adj_type =
2376 7;
2377 } else if (coex_dm->cur_ps_tdma == 6) {
2378 halbtc8192e2ant_ps_tdma(
2379 btcoexist,
2380 NORMAL_EXEC,
2381 true, 7);
2382 coex_dm->ps_tdma_du_adj_type =
2383 7;
2384 } else if (coex_dm->cur_ps_tdma == 7) {
2385 halbtc8192e2ant_ps_tdma(
2386 btcoexist,
2387 NORMAL_EXEC,
2388 true, 8);
2389 coex_dm->ps_tdma_du_adj_type =
2390 8;
2391 } else if (coex_dm->cur_ps_tdma == 13) {
2392 halbtc8192e2ant_ps_tdma(
2393 btcoexist,
2394 NORMAL_EXEC,
2395 true, 15);
2396 coex_dm->ps_tdma_du_adj_type =
2397 15;
2398 } else if (coex_dm->cur_ps_tdma == 14) {
2399 halbtc8192e2ant_ps_tdma(
2400 btcoexist,
2401 NORMAL_EXEC,
2402 true, 15);
2403 coex_dm->ps_tdma_du_adj_type =
2404 15;
2405 } else if (coex_dm->cur_ps_tdma == 15) {
2406 halbtc8192e2ant_ps_tdma(
2407 btcoexist,
2408 NORMAL_EXEC,
2409 true, 16);
2410 coex_dm->ps_tdma_du_adj_type =
2411 16;
2412 }
2413 } else if (result == 1) {
2414 if (coex_dm->cur_ps_tdma == 8) {
2415 halbtc8192e2ant_ps_tdma(
2416 btcoexist,
2417 NORMAL_EXEC,
2418 true, 7);
2419 coex_dm->ps_tdma_du_adj_type =
2420 7;
2421 } else if (coex_dm->cur_ps_tdma == 7) {
2422 halbtc8192e2ant_ps_tdma(
2423 btcoexist,
2424 NORMAL_EXEC,
2425 true, 7);
2426 coex_dm->ps_tdma_du_adj_type =
2427 7;
2428 } else if (coex_dm->cur_ps_tdma == 6) {
2429 halbtc8192e2ant_ps_tdma(
2430 btcoexist,
2431 NORMAL_EXEC,
2432 true, 7);
2433 coex_dm->ps_tdma_du_adj_type =
2434 7;
2435 } else if (coex_dm->cur_ps_tdma == 16) {
2436 halbtc8192e2ant_ps_tdma(
2437 btcoexist,
2438 NORMAL_EXEC,
2439 true, 15);
2440 coex_dm->ps_tdma_du_adj_type =
2441 15;
2442 } else if (coex_dm->cur_ps_tdma == 15) {
2443 halbtc8192e2ant_ps_tdma(
2444 btcoexist,
2445 NORMAL_EXEC,
2446 true, 15);
2447 coex_dm->ps_tdma_du_adj_type =
2448 15;
2449 } else if (coex_dm->cur_ps_tdma == 14) {
2450 halbtc8192e2ant_ps_tdma(
2451 btcoexist,
2452 NORMAL_EXEC,
2453 true, 15);
2454 coex_dm->ps_tdma_du_adj_type =
2455 15;
2456 }
2457 }
2458 } else {
2459 BTC_PRINT(BTC_MSG_ALGORITHM,
2460 ALGO_TRACE_FW_DETAIL,
2461 "[BTCoex], TxPause = 0\n");
2462 if (coex_dm->cur_ps_tdma == 5) {
2463 halbtc8192e2ant_ps_tdma(btcoexist,
2464 NORMAL_EXEC,
2465 true, 3);
2466 coex_dm->ps_tdma_du_adj_type = 3;
2467 } else if (coex_dm->cur_ps_tdma == 6) {
2468 halbtc8192e2ant_ps_tdma(btcoexist,
2469 NORMAL_EXEC,
2470 true, 3);
2471 coex_dm->ps_tdma_du_adj_type = 3;
2472 } else if (coex_dm->cur_ps_tdma == 7) {
2473 halbtc8192e2ant_ps_tdma(btcoexist,
2474 NORMAL_EXEC,
2475 true, 3);
2476 coex_dm->ps_tdma_du_adj_type = 3;
2477 } else if (coex_dm->cur_ps_tdma == 8) {
2478 halbtc8192e2ant_ps_tdma(btcoexist,
2479 NORMAL_EXEC,
2480 true, 4);
2481 coex_dm->ps_tdma_du_adj_type = 4;
2482 }
2483 if (coex_dm->cur_ps_tdma == 13) {
2484 halbtc8192e2ant_ps_tdma(btcoexist,
2485 NORMAL_EXEC,
2486 true, 11);
2487 coex_dm->ps_tdma_du_adj_type = 11;
2488 } else if (coex_dm->cur_ps_tdma == 14) {
2489 halbtc8192e2ant_ps_tdma(btcoexist,
2490 NORMAL_EXEC,
2491 true, 11);
2492 coex_dm->ps_tdma_du_adj_type = 11;
2493 } else if (coex_dm->cur_ps_tdma == 15) {
2494 halbtc8192e2ant_ps_tdma(btcoexist,
2495 NORMAL_EXEC,
2496 true, 11);
2497 coex_dm->ps_tdma_du_adj_type = 11;
2498 } else if (coex_dm->cur_ps_tdma == 16) {
2499 halbtc8192e2ant_ps_tdma(btcoexist,
2500 NORMAL_EXEC,
2501 true, 12);
2502 coex_dm->ps_tdma_du_adj_type = 12;
2503 }
2504 if (result == -1) {
2505 if (coex_dm->cur_ps_tdma == 1) {
2506 halbtc8192e2ant_ps_tdma(
2507 btcoexist,
2508 NORMAL_EXEC,
2509 true, 3);
2510 coex_dm->ps_tdma_du_adj_type =
2511 3;
2512 } else if (coex_dm->cur_ps_tdma == 2) {
2513 halbtc8192e2ant_ps_tdma(
2514 btcoexist,
2515 NORMAL_EXEC,
2516 true, 3);
2517 coex_dm->ps_tdma_du_adj_type =
2518 3;
2519 } else if (coex_dm->cur_ps_tdma == 3) {
2520 halbtc8192e2ant_ps_tdma(
2521 btcoexist,
2522 NORMAL_EXEC,
2523 true, 4);
2524 coex_dm->ps_tdma_du_adj_type =
2525 4;
2526 } else if (coex_dm->cur_ps_tdma == 9) {
2527 halbtc8192e2ant_ps_tdma(
2528 btcoexist,
2529 NORMAL_EXEC,
2530 true, 11);
2531 coex_dm->ps_tdma_du_adj_type =
2532 11;
2533 } else if (coex_dm->cur_ps_tdma == 10) {
2534 halbtc8192e2ant_ps_tdma(
2535 btcoexist,
2536 NORMAL_EXEC,
2537 true, 11);
2538 coex_dm->ps_tdma_du_adj_type =
2539 11;
2540 } else if (coex_dm->cur_ps_tdma == 11) {
2541 halbtc8192e2ant_ps_tdma(
2542 btcoexist,
2543 NORMAL_EXEC,
2544 true, 12);
2545 coex_dm->ps_tdma_du_adj_type =
2546 12;
2547 }
2548 } else if (result == 1) {
2549 if (coex_dm->cur_ps_tdma == 4) {
2550 halbtc8192e2ant_ps_tdma(
2551 btcoexist,
2552 NORMAL_EXEC,
2553 true, 3);
2554 coex_dm->ps_tdma_du_adj_type =
2555 3;
2556 } else if (coex_dm->cur_ps_tdma == 3) {
2557 halbtc8192e2ant_ps_tdma(
2558 btcoexist,
2559 NORMAL_EXEC,
2560 true, 3);
2561 coex_dm->ps_tdma_du_adj_type =
2562 3;
2563 } else if (coex_dm->cur_ps_tdma == 2) {
2564 halbtc8192e2ant_ps_tdma(
2565 btcoexist,
2566 NORMAL_EXEC,
2567 true, 3);
2568 coex_dm->ps_tdma_du_adj_type =
2569 3;
2570 } else if (coex_dm->cur_ps_tdma == 12) {
2571 halbtc8192e2ant_ps_tdma(
2572 btcoexist,
2573 NORMAL_EXEC,
2574 true, 11);
2575 coex_dm->ps_tdma_du_adj_type =
2576 11;
2577 } else if (coex_dm->cur_ps_tdma == 11) {
2578 halbtc8192e2ant_ps_tdma(
2579 btcoexist,
2580 NORMAL_EXEC,
2581 true, 11);
2582 coex_dm->ps_tdma_du_adj_type =
2583 11;
2584 } else if (coex_dm->cur_ps_tdma == 10) {
2585 halbtc8192e2ant_ps_tdma(
2586 btcoexist,
2587 NORMAL_EXEC,
2588 true, 11);
2589 coex_dm->ps_tdma_du_adj_type =
2590 11;
2591 }
2592 }
2593 }
2594 }
2595 }
2596
2597 /* if current PsTdma not match with
2598 * the recorded one (when scan, dhcp...),
2599 * then we have to adjust it back to the previous record one. */
2600 if (coex_dm->cur_ps_tdma != coex_dm->ps_tdma_du_adj_type) {
2601 bool scan = false, link = false, roam = false;
2602 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_DETAIL,
2603 "[BTCoex], PsTdma type dismatch!!!, ");
2604 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_DETAIL,
2605 "curPsTdma =%d, recordPsTdma =%d\n",
2606 coex_dm->cur_ps_tdma, coex_dm->ps_tdma_du_adj_type);
2607
2608 btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_SCAN, &scan);
2609 btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_LINK, &link);
2610 btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_ROAM, &roam);
2611
2612 if (!scan && !link && !roam)
2613 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
2614 true,
2615 coex_dm->ps_tdma_du_adj_type);
2616 else
2617 BTC_PRINT(BTC_MSG_ALGORITHM,
2618 ALGO_TRACE_FW_DETAIL,
2619 "[BTCoex], roaming/link/scan is under progress, will adjust next time!!!\n");
2620 }
2621}
2622
2623/* SCO only or SCO+PAN(HS) */
2624static void halbtc8192e2ant_action_sco(struct btc_coexist *btcoexist)
2625{
2626 u8 wifirssi_state, btrssi_state = BTC_RSSI_STATE_STAY_LOW;
2627 u32 wifi_bw;
2628
2629 wifirssi_state = halbtc8192e2ant_wifirssi_state(btcoexist, 0, 2, 15, 0);
2630
2631 halbtc8192e2ant_switch_sstype(btcoexist, NORMAL_EXEC, 1);
2632 halbtc8192e2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, 0x8);
2633
2634 halbtc8192e2ant_fw_dac_swinglvl(btcoexist, NORMAL_EXEC, 6);
2635
2636 halbtc_coex_table_with_type(btcoexist, NORMAL_EXEC, 4);
2637
2638 btrssi_state = halbtc8192e2ant_btrssi_state(3, 34, 42);
2639
2640 if ((btrssi_state == BTC_RSSI_STATE_LOW) ||
2641 (btrssi_state == BTC_RSSI_STATE_STAY_LOW)) {
2642 halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 0);
2643 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 13);
2644 } else if ((btrssi_state == BTC_RSSI_STATE_MEDIUM) ||
2645 (btrssi_state == BTC_RSSI_STATE_STAY_MEDIUM)) {
2646 halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 2);
2647 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 9);
2648 } else if ((btrssi_state == BTC_RSSI_STATE_HIGH) ||
2649 (btrssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
2650 halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 4);
2651 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 9);
2652 }
2653
2654 btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
2655
2656 /* sw mechanism */
2657 if (BTC_WIFI_BW_HT40 == wifi_bw) {
2658 if ((wifirssi_state == BTC_RSSI_STATE_HIGH) ||
2659 (wifirssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
2660 halbtc_sw_mechanism1(btcoexist, true, true,
2661 false, false);
2662 halbtc_sw_mechanism2(btcoexist, true, false,
2663 false, 0x6);
2664 } else {
2665 halbtc_sw_mechanism1(btcoexist, true, true,
2666 false, false);
2667 halbtc_sw_mechanism2(btcoexist, false, false,
2668 false, 0x6);
2669 }
2670 } else {
2671 if ((wifirssi_state == BTC_RSSI_STATE_HIGH) ||
2672 (wifirssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
2673 halbtc_sw_mechanism1(btcoexist, false, true,
2674 false, false);
2675 halbtc_sw_mechanism2(btcoexist, true, false,
2676 false, 0x6);
2677 } else {
2678 halbtc_sw_mechanism1(btcoexist, false, true,
2679 false, false);
2680 halbtc_sw_mechanism2(btcoexist, false, false,
2681 false, 0x6);
2682 }
2683 }
2684}
2685
2686static void halbtc8192e2ant_action_sco_pan(struct btc_coexist *btcoexist)
2687{
2688 u8 wifirssi_state, btrssi_state = BTC_RSSI_STATE_STAY_LOW;
2689 u32 wifi_bw;
2690
2691 wifirssi_state = halbtc8192e2ant_wifirssi_state(btcoexist, 0, 2, 15, 0);
2692
2693 halbtc8192e2ant_switch_sstype(btcoexist, NORMAL_EXEC, 1);
2694 halbtc8192e2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, 0x8);
2695
2696 halbtc8192e2ant_fw_dac_swinglvl(btcoexist, NORMAL_EXEC, 6);
2697
2698 halbtc_coex_table_with_type(btcoexist, NORMAL_EXEC, 4);
2699
2700 btrssi_state = halbtc8192e2ant_btrssi_state(3, 34, 42);
2701
2702 if ((btrssi_state == BTC_RSSI_STATE_LOW) ||
2703 (btrssi_state == BTC_RSSI_STATE_STAY_LOW)) {
2704 halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 0);
2705 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 14);
2706 } else if ((btrssi_state == BTC_RSSI_STATE_MEDIUM) ||
2707 (btrssi_state == BTC_RSSI_STATE_STAY_MEDIUM)) {
2708 halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 2);
2709 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 10);
2710 } else if ((btrssi_state == BTC_RSSI_STATE_HIGH) ||
2711 (btrssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
2712 halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 4);
2713 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 10);
2714 }
2715
2716 btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
2717
2718 /* sw mechanism */
2719 if (BTC_WIFI_BW_HT40 == wifi_bw) {
2720 if ((wifirssi_state == BTC_RSSI_STATE_HIGH) ||
2721 (wifirssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
2722 halbtc_sw_mechanism1(btcoexist, true, true,
2723 false, false);
2724 halbtc_sw_mechanism2(btcoexist, true, false,
2725 false, 0x6);
2726 } else {
2727 halbtc_sw_mechanism1(btcoexist, true, true,
2728 false, false);
2729 halbtc_sw_mechanism2(btcoexist, false, false,
2730 false, 0x6);
2731 }
2732 } else {
2733 if ((wifirssi_state == BTC_RSSI_STATE_HIGH) ||
2734 (wifirssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
2735 halbtc_sw_mechanism1(btcoexist, false, true,
2736 false, false);
2737 halbtc_sw_mechanism2(btcoexist, true, false,
2738 false, 0x6);
2739 } else {
2740 halbtc_sw_mechanism1(btcoexist, false, true,
2741 false, false);
2742 halbtc_sw_mechanism2(btcoexist, false, false,
2743 false, 0x6);
2744 }
2745 }
2746}
2747
2748static void halbtc8192e2ant_action_hid(struct btc_coexist *btcoexist)
2749{
2750 u8 wifirssi_state, btrssi_state = BTC_RSSI_STATE_HIGH;
2751 u32 wifi_bw;
2752
2753 wifirssi_state = halbtc8192e2ant_wifirssi_state(btcoexist, 0, 2, 15, 0);
2754 btrssi_state = halbtc8192e2ant_btrssi_state(3, 34, 42);
2755
2756 halbtc8192e2ant_switch_sstype(btcoexist, NORMAL_EXEC, 1);
2757 halbtc8192e2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, 0x8);
2758
2759 halbtc8192e2ant_fw_dac_swinglvl(btcoexist, NORMAL_EXEC, 6);
2760
2761 btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
2762
2763 halbtc_coex_table_with_type(btcoexist, NORMAL_EXEC, 3);
2764
2765 if ((btrssi_state == BTC_RSSI_STATE_LOW) ||
2766 (btrssi_state == BTC_RSSI_STATE_STAY_LOW)) {
2767 halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 0);
2768 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 13);
2769 } else if ((btrssi_state == BTC_RSSI_STATE_MEDIUM) ||
2770 (btrssi_state == BTC_RSSI_STATE_STAY_MEDIUM)) {
2771 halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 2);
2772 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 9);
2773 } else if ((btrssi_state == BTC_RSSI_STATE_HIGH) ||
2774 (btrssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
2775 halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 4);
2776 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 9);
2777 }
2778
2779 /* sw mechanism */
2780 if (BTC_WIFI_BW_HT40 == wifi_bw) {
2781 if ((wifirssi_state == BTC_RSSI_STATE_HIGH) ||
2782 (wifirssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
2783 halbtc_sw_mechanism1(btcoexist, true, true,
2784 false, false);
2785 halbtc_sw_mechanism2(btcoexist, true, false,
2786 false, 0x18);
2787 } else {
2788 halbtc_sw_mechanism1(btcoexist, true, true,
2789 false, false);
2790 halbtc_sw_mechanism2(btcoexist, false, false,
2791 false, 0x18);
2792 }
2793 } else {
2794 if ((wifirssi_state == BTC_RSSI_STATE_HIGH) ||
2795 (wifirssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
2796 halbtc_sw_mechanism1(btcoexist, false, true,
2797 false, false);
2798 halbtc_sw_mechanism2(btcoexist, true, false,
2799 false, 0x18);
2800 } else {
2801 halbtc_sw_mechanism1(btcoexist, false, true,
2802 false, false);
2803 halbtc_sw_mechanism2(btcoexist, false, false,
2804 false, 0x18);
2805 }
2806 }
2807}
2808
2809/* A2DP only / PAN(EDR) only/ A2DP+PAN(HS) */
2810static void halbtc8192e2ant_action_a2dp(struct btc_coexist *btcoexist)
2811{
2812 u8 wifirssi_state, btrssi_state = BTC_RSSI_STATE_HIGH;
2813 u32 wifi_bw;
2814 bool long_dist = false;
2815
2816 wifirssi_state = halbtc8192e2ant_wifirssi_state(btcoexist, 0, 2, 15, 0);
2817 btrssi_state = halbtc8192e2ant_btrssi_state(3, 34, 42);
2818
2819 if ((btrssi_state == BTC_RSSI_STATE_LOW ||
2820 btrssi_state == BTC_RSSI_STATE_STAY_LOW) &&
2821 (wifirssi_state == BTC_RSSI_STATE_LOW ||
2822 wifirssi_state == BTC_RSSI_STATE_STAY_LOW)) {
2823 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
2824 "[BTCoex], A2dp, wifi/bt rssi both LOW!!\n");
2825 long_dist = true;
2826 }
2827 if (long_dist) {
2828 halbtc8192e2ant_switch_sstype(btcoexist, NORMAL_EXEC, 2);
2829 halbtc8192e2ant_limited_rx(btcoexist, NORMAL_EXEC, false, true,
2830 0x4);
2831 } else {
2832 halbtc8192e2ant_switch_sstype(btcoexist, NORMAL_EXEC, 1);
2833 halbtc8192e2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false,
2834 0x8);
2835 }
2836
2837 halbtc8192e2ant_fw_dac_swinglvl(btcoexist, NORMAL_EXEC, 6);
2838
2839 if (long_dist)
2840 halbtc_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
2841 else
2842 halbtc_coex_table_with_type(btcoexist, NORMAL_EXEC, 2);
2843
2844 if (long_dist) {
2845 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 17);
2846 coex_dm->auto_tdma_adjust = false;
2847 halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 0);
2848 } else {
2849 if ((btrssi_state == BTC_RSSI_STATE_LOW) ||
2850 (btrssi_state == BTC_RSSI_STATE_STAY_LOW)) {
2851 halbtc8192e2ant_tdma_duration_adjust(btcoexist, false,
2852 true, 1);
2853 halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 0);
2854 } else if ((btrssi_state == BTC_RSSI_STATE_MEDIUM) ||
2855 (btrssi_state == BTC_RSSI_STATE_STAY_MEDIUM)) {
2856 halbtc8192e2ant_tdma_duration_adjust(btcoexist, false,
2857 false, 1);
2858 halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 2);
2859 } else if ((btrssi_state == BTC_RSSI_STATE_HIGH) ||
2860 (btrssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
2861 halbtc8192e2ant_tdma_duration_adjust(btcoexist, false,
2862 false, 1);
2863 halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 4);
2864 }
2865 }
2866
2867 /* sw mechanism */
2868 btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
2869 if (BTC_WIFI_BW_HT40 == wifi_bw) {
2870 if ((wifirssi_state == BTC_RSSI_STATE_HIGH) ||
2871 (wifirssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
2872 halbtc_sw_mechanism1(btcoexist, true, false,
2873 false, false);
2874 halbtc_sw_mechanism2(btcoexist, true, false,
2875 false, 0x18);
2876 } else {
2877 halbtc_sw_mechanism1(btcoexist, true, false,
2878 false, false);
2879 halbtc_sw_mechanism2(btcoexist, false, false,
2880 false, 0x18);
2881 }
2882 } else {
2883 if ((wifirssi_state == BTC_RSSI_STATE_HIGH) ||
2884 (wifirssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
2885 halbtc_sw_mechanism1(btcoexist, false, false,
2886 false, false);
2887 halbtc_sw_mechanism2(btcoexist, true, false,
2888 false, 0x18);
2889 } else {
2890 halbtc_sw_mechanism1(btcoexist, false, false,
2891 false, false);
2892 halbtc_sw_mechanism2(btcoexist, false, false,
2893 false, 0x18);
2894 }
2895 }
2896}
2897
2898static void halbtc8192e2ant_action_a2dp_pan_hs(struct btc_coexist *btcoexist)
2899{
2900 u8 wifirssi_state, btrssi_state = BTC_RSSI_STATE_HIGH;
2901 u32 wifi_bw;
2902
2903 wifirssi_state = halbtc8192e2ant_wifirssi_state(btcoexist, 0, 2, 15, 0);
2904 btrssi_state = halbtc8192e2ant_btrssi_state(3, 34, 42);
2905
2906 halbtc8192e2ant_switch_sstype(btcoexist, NORMAL_EXEC, 1);
2907 halbtc8192e2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, 0x8);
2908
2909 halbtc8192e2ant_fw_dac_swinglvl(btcoexist, NORMAL_EXEC, 6);
2910 halbtc_coex_table_with_type(btcoexist, NORMAL_EXEC, 2);
2911
2912 if ((btrssi_state == BTC_RSSI_STATE_LOW) ||
2913 (btrssi_state == BTC_RSSI_STATE_STAY_LOW)) {
2914 halbtc8192e2ant_tdma_duration_adjust(btcoexist, false, true, 2);
2915 halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 0);
2916 } else if ((btrssi_state == BTC_RSSI_STATE_MEDIUM) ||
2917 (btrssi_state == BTC_RSSI_STATE_STAY_MEDIUM)) {
2918 halbtc8192e2ant_tdma_duration_adjust(btcoexist, false, false,
2919 2);
2920 halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 2);
2921 } else if ((btrssi_state == BTC_RSSI_STATE_HIGH) ||
2922 (btrssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
2923 halbtc8192e2ant_tdma_duration_adjust(btcoexist, false, false,
2924 2);
2925 halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 4);
2926 }
2927
2928 /* sw mechanism */
2929 btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
2930 if (BTC_WIFI_BW_HT40 == wifi_bw) {
2931 if ((wifirssi_state == BTC_RSSI_STATE_HIGH) ||
2932 (wifirssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
2933 halbtc_sw_mechanism1(btcoexist, true, false,
2934 false, false);
2935 halbtc_sw_mechanism2(btcoexist, true, false,
2936 true, 0x6);
2937 } else {
2938 halbtc_sw_mechanism1(btcoexist, true, false,
2939 false, false);
2940 halbtc_sw_mechanism2(btcoexist, false, false,
2941 true, 0x6);
2942 }
2943 } else {
2944 if ((wifirssi_state == BTC_RSSI_STATE_HIGH) ||
2945 (wifirssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
2946 halbtc_sw_mechanism1(btcoexist, false, false,
2947 false, false);
2948 halbtc_sw_mechanism2(btcoexist, true, false,
2949 true, 0x6);
2950 } else {
2951 halbtc_sw_mechanism1(btcoexist, false, false,
2952 false, false);
2953 halbtc_sw_mechanism2(btcoexist, false, false,
2954 true, 0x6);
2955 }
2956 }
2957}
2958
2959static void halbtc8192e2ant_action_pan_edr(struct btc_coexist *btcoexist)
2960{
2961 u8 wifirssi_state, btrssi_state = BTC_RSSI_STATE_HIGH;
2962 u32 wifi_bw;
2963
2964 wifirssi_state = halbtc8192e2ant_wifirssi_state(btcoexist, 0, 2, 15, 0);
2965 btrssi_state = halbtc8192e2ant_btrssi_state(3, 34, 42);
2966
2967 halbtc8192e2ant_switch_sstype(btcoexist, NORMAL_EXEC, 1);
2968 halbtc8192e2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, 0x8);
2969
2970 halbtc8192e2ant_fw_dac_swinglvl(btcoexist, NORMAL_EXEC, 6);
2971
2972 halbtc_coex_table_with_type(btcoexist, NORMAL_EXEC, 2);
2973
2974 if ((btrssi_state == BTC_RSSI_STATE_LOW) ||
2975 (btrssi_state == BTC_RSSI_STATE_STAY_LOW)) {
2976 halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 0);
2977 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 5);
2978 } else if ((btrssi_state == BTC_RSSI_STATE_MEDIUM) ||
2979 (btrssi_state == BTC_RSSI_STATE_STAY_MEDIUM)) {
2980 halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 2);
2981 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 1);
2982 } else if ((btrssi_state == BTC_RSSI_STATE_HIGH) ||
2983 (btrssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
2984 halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 4);
2985 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 1);
2986 }
2987
2988 /* sw mechanism */
2989 btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
2990 if (BTC_WIFI_BW_HT40 == wifi_bw) {
2991 if ((wifirssi_state == BTC_RSSI_STATE_HIGH) ||
2992 (wifirssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
2993 halbtc_sw_mechanism1(btcoexist, true, false,
2994 false, false);
2995 halbtc_sw_mechanism2(btcoexist, true, false,
2996 false, 0x18);
2997 } else {
2998 halbtc_sw_mechanism1(btcoexist, true, false,
2999 false, false);
3000 halbtc_sw_mechanism2(btcoexist, false, false,
3001 false, 0x18);
3002 }
3003 } else {
3004 if ((wifirssi_state == BTC_RSSI_STATE_HIGH) ||
3005 (wifirssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
3006 halbtc_sw_mechanism1(btcoexist, false, false,
3007 false, false);
3008 halbtc_sw_mechanism2(btcoexist, true, false,
3009 false, 0x18);
3010 } else {
3011 halbtc_sw_mechanism1(btcoexist, false, false,
3012 false, false);
3013 halbtc_sw_mechanism2(btcoexist, false, false,
3014 false, 0x18);
3015 }
3016 }
3017}
3018
3019/* PAN(HS) only */
3020static void halbtc8192e2ant_action_pan_hs(struct btc_coexist *btcoexist)
3021{
3022 u8 wifirssi_state, btrssi_state = BTC_RSSI_STATE_HIGH;
3023 u32 wifi_bw;
3024
3025 wifirssi_state = halbtc8192e2ant_wifirssi_state(btcoexist, 0, 2, 15, 0);
3026 btrssi_state = halbtc8192e2ant_btrssi_state(3, 34, 42);
3027
3028 halbtc8192e2ant_switch_sstype(btcoexist, NORMAL_EXEC, 1);
3029 halbtc8192e2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, 0x8);
3030
3031 halbtc8192e2ant_fw_dac_swinglvl(btcoexist, NORMAL_EXEC, 6);
3032
3033 halbtc_coex_table_with_type(btcoexist, NORMAL_EXEC, 2);
3034
3035 if ((btrssi_state == BTC_RSSI_STATE_LOW) ||
3036 (btrssi_state == BTC_RSSI_STATE_STAY_LOW)) {
3037 halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 0);
3038 } else if ((btrssi_state == BTC_RSSI_STATE_MEDIUM) ||
3039 (btrssi_state == BTC_RSSI_STATE_STAY_MEDIUM)) {
3040 halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 2);
3041 } else if ((btrssi_state == BTC_RSSI_STATE_HIGH) ||
3042 (btrssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
3043 halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 4);
3044 }
3045 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 1);
3046
3047 btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
3048 if (BTC_WIFI_BW_HT40 == wifi_bw) {
3049 if ((wifirssi_state == BTC_RSSI_STATE_HIGH) ||
3050 (wifirssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
3051 halbtc_sw_mechanism1(btcoexist, true, false,
3052 false, false);
3053 halbtc_sw_mechanism2(btcoexist, true, false,
3054 false, 0x18);
3055 } else {
3056 halbtc_sw_mechanism1(btcoexist, true, false,
3057 false, false);
3058 halbtc_sw_mechanism2(btcoexist, false, false,
3059 false, 0x18);
3060 }
3061 } else {
3062 if ((wifirssi_state == BTC_RSSI_STATE_HIGH) ||
3063 (wifirssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
3064 halbtc_sw_mechanism1(btcoexist, false, false,
3065 false, false);
3066 halbtc_sw_mechanism2(btcoexist, true, false,
3067 false, 0x18);
3068 } else {
3069 halbtc_sw_mechanism1(btcoexist, false, false,
3070 false, false);
3071 halbtc_sw_mechanism2(btcoexist, false, false,
3072 false, 0x18);
3073 }
3074 }
3075}
3076
3077/* PAN(EDR)+A2DP */
3078static void halbtc8192e2ant_action_pan_edr_a2dp(struct btc_coexist *btcoexist)
3079{
3080 u8 wifirssi_state, btrssi_state = BTC_RSSI_STATE_HIGH;
3081 u32 wifi_bw;
3082
3083 wifirssi_state = halbtc8192e2ant_wifirssi_state(btcoexist, 0, 2, 15, 0);
3084 btrssi_state = halbtc8192e2ant_btrssi_state(3, 34, 42);
3085
3086 halbtc8192e2ant_switch_sstype(btcoexist, NORMAL_EXEC, 1);
3087 halbtc8192e2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, 0x8);
3088
3089 halbtc8192e2ant_fw_dac_swinglvl(btcoexist, NORMAL_EXEC, 6);
3090
3091 halbtc_coex_table_with_type(btcoexist, NORMAL_EXEC, 2);
3092
3093 btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
3094
3095 if ((btrssi_state == BTC_RSSI_STATE_LOW) ||
3096 (btrssi_state == BTC_RSSI_STATE_STAY_LOW)) {
3097 halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 0);
3098 halbtc8192e2ant_tdma_duration_adjust(btcoexist, false, true, 3);
3099 } else if ((btrssi_state == BTC_RSSI_STATE_MEDIUM) ||
3100 (btrssi_state == BTC_RSSI_STATE_STAY_MEDIUM)) {
3101 halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 2);
3102 halbtc8192e2ant_tdma_duration_adjust(btcoexist, false, false,
3103 3);
3104 } else if ((btrssi_state == BTC_RSSI_STATE_HIGH) ||
3105 (btrssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
3106 halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 4);
3107 halbtc8192e2ant_tdma_duration_adjust(btcoexist, false, false,
3108 3);
3109 }
3110
3111 /* sw mechanism */
3112 if (BTC_WIFI_BW_HT40 == wifi_bw) {
3113 if ((wifirssi_state == BTC_RSSI_STATE_HIGH) ||
3114 (wifirssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
3115 halbtc_sw_mechanism1(btcoexist, true, false,
3116 false, false);
3117 halbtc_sw_mechanism2(btcoexist, true, false,
3118 false, 0x18);
3119 } else {
3120 halbtc_sw_mechanism1(btcoexist, true, false,
3121 false, false);
3122 halbtc_sw_mechanism2(btcoexist, false, false,
3123 false, 0x18);
3124 }
3125 } else {
3126 if ((wifirssi_state == BTC_RSSI_STATE_HIGH) ||
3127 (wifirssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
3128 halbtc_sw_mechanism1(btcoexist, false, false,
3129 false, false);
3130 halbtc_sw_mechanism2(btcoexist, true, false,
3131 false, 0x18);
3132 } else {
3133 halbtc_sw_mechanism1(btcoexist, false, false,
3134 false, false);
3135 halbtc_sw_mechanism2(btcoexist, false, false,
3136 false, 0x18);
3137 }
3138 }
3139}
3140
3141static void halbtc8192e2ant_action_pan_edr_hid(struct btc_coexist *btcoexist)
3142{
3143 u8 wifirssi_state, btrssi_state = BTC_RSSI_STATE_HIGH;
3144 u32 wifi_bw;
3145
3146 wifirssi_state = halbtc8192e2ant_wifirssi_state(btcoexist, 0, 2, 15, 0);
3147 btrssi_state = halbtc8192e2ant_btrssi_state(3, 34, 42);
3148
3149 btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
3150
3151 halbtc8192e2ant_switch_sstype(btcoexist, NORMAL_EXEC, 1);
3152 halbtc8192e2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, 0x8);
3153
3154 halbtc8192e2ant_fw_dac_swinglvl(btcoexist, NORMAL_EXEC, 6);
3155
3156 halbtc_coex_table_with_type(btcoexist, NORMAL_EXEC, 3);
3157
3158 if ((btrssi_state == BTC_RSSI_STATE_LOW) ||
3159 (btrssi_state == BTC_RSSI_STATE_STAY_LOW)) {
3160 halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 0);
3161 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 14);
3162 } else if ((btrssi_state == BTC_RSSI_STATE_MEDIUM) ||
3163 (btrssi_state == BTC_RSSI_STATE_STAY_MEDIUM)) {
3164 halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 2);
3165 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 10);
3166 } else if ((btrssi_state == BTC_RSSI_STATE_HIGH) ||
3167 (btrssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
3168 halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 4);
3169 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 10);
3170 }
3171
3172 /* sw mechanism */
3173 if (BTC_WIFI_BW_HT40 == wifi_bw) {
3174 if ((wifirssi_state == BTC_RSSI_STATE_HIGH) ||
3175 (wifirssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
3176 halbtc_sw_mechanism1(btcoexist, true, true,
3177 false, false);
3178 halbtc_sw_mechanism2(btcoexist, true, false,
3179 false, 0x18);
3180 } else {
3181 halbtc_sw_mechanism1(btcoexist, true, true,
3182 false, false);
3183 halbtc_sw_mechanism2(btcoexist, false, false,
3184 false, 0x18);
3185 }
3186 } else {
3187 if ((wifirssi_state == BTC_RSSI_STATE_HIGH) ||
3188 (wifirssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
3189 halbtc_sw_mechanism1(btcoexist, false, true,
3190 false, false);
3191 halbtc_sw_mechanism2(btcoexist, true, false,
3192 false, 0x18);
3193 } else {
3194 halbtc_sw_mechanism1(btcoexist, false, true,
3195 false, false);
3196 halbtc_sw_mechanism2(btcoexist, false, false,
3197 false, 0x18);
3198 }
3199 }
3200}
3201
3202/* HID+A2DP+PAN(EDR) */
3203static void action_hid_a2dp_pan_edr(struct btc_coexist *btcoexist)
3204{
3205 u8 wifirssi_state, btrssi_state = BTC_RSSI_STATE_HIGH;
3206 u32 wifi_bw;
3207
3208 wifirssi_state = halbtc8192e2ant_wifirssi_state(btcoexist, 0, 2, 15, 0);
3209 btrssi_state = halbtc8192e2ant_btrssi_state(3, 34, 42);
3210
3211 halbtc8192e2ant_switch_sstype(btcoexist, NORMAL_EXEC, 1);
3212 halbtc8192e2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, 0x8);
3213
3214 halbtc8192e2ant_fw_dac_swinglvl(btcoexist, NORMAL_EXEC, 6);
3215
3216 btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
3217
3218 halbtc_coex_table_with_type(btcoexist, NORMAL_EXEC, 3);
3219
3220 if ((btrssi_state == BTC_RSSI_STATE_LOW) ||
3221 (btrssi_state == BTC_RSSI_STATE_STAY_LOW)) {
3222 halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 0);
3223 halbtc8192e2ant_tdma_duration_adjust(btcoexist, true, true, 3);
3224 } else if ((btrssi_state == BTC_RSSI_STATE_MEDIUM) ||
3225 (btrssi_state == BTC_RSSI_STATE_STAY_MEDIUM)) {
3226 halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 2);
3227 halbtc8192e2ant_tdma_duration_adjust(btcoexist, true, false, 3);
3228 } else if ((btrssi_state == BTC_RSSI_STATE_HIGH) ||
3229 (btrssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
3230 halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 4);
3231 halbtc8192e2ant_tdma_duration_adjust(btcoexist, true, false, 3);
3232 }
3233
3234 /* sw mechanism */
3235 if (BTC_WIFI_BW_HT40 == wifi_bw) {
3236 if ((wifirssi_state == BTC_RSSI_STATE_HIGH) ||
3237 (wifirssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
3238 halbtc_sw_mechanism1(btcoexist, true, true,
3239 false, false);
3240 halbtc_sw_mechanism2(btcoexist, true, false,
3241 false, 0x18);
3242 } else {
3243 halbtc_sw_mechanism1(btcoexist, true, true,
3244 false, false);
3245 halbtc_sw_mechanism2(btcoexist, false, false,
3246 false, 0x18);
3247 }
3248 } else {
3249 if ((wifirssi_state == BTC_RSSI_STATE_HIGH) ||
3250 (wifirssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
3251 halbtc_sw_mechanism1(btcoexist, false, true,
3252 false, false);
3253 halbtc_sw_mechanism2(btcoexist, true, false,
3254 false, 0x18);
3255 } else {
3256 halbtc_sw_mechanism1(btcoexist, false, true,
3257 false, false);
3258 halbtc_sw_mechanism2(btcoexist, false, false,
3259 false, 0x18);
3260 }
3261 }
3262}
3263
3264static void halbtc8192e2ant_action_hid_a2dp(struct btc_coexist *btcoexist)
3265{
3266 u8 wifirssi_state, btrssi_state = BTC_RSSI_STATE_HIGH;
3267 u32 wifi_bw;
3268
3269 wifirssi_state = halbtc8192e2ant_wifirssi_state(btcoexist, 0, 2, 15, 0);
3270 btrssi_state = halbtc8192e2ant_btrssi_state(3, 34, 42);
3271
3272 halbtc8192e2ant_switch_sstype(btcoexist, NORMAL_EXEC, 1);
3273 halbtc8192e2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, 0x8);
3274
3275 btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
3276
3277 halbtc_coex_table_with_type(btcoexist, NORMAL_EXEC, 3);
3278
3279 if ((btrssi_state == BTC_RSSI_STATE_LOW) ||
3280 (btrssi_state == BTC_RSSI_STATE_STAY_LOW)) {
3281 halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 0);
3282 halbtc8192e2ant_tdma_duration_adjust(btcoexist, true, true, 2);
3283 } else if ((btrssi_state == BTC_RSSI_STATE_MEDIUM) ||
3284 (btrssi_state == BTC_RSSI_STATE_STAY_MEDIUM)) {
3285 halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 2);
3286 halbtc8192e2ant_tdma_duration_adjust(btcoexist, true, false, 2);
3287 } else if ((btrssi_state == BTC_RSSI_STATE_HIGH) ||
3288 (btrssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
3289 halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 4);
3290 halbtc8192e2ant_tdma_duration_adjust(btcoexist, true, false, 2);
3291 }
3292
3293 /* sw mechanism */
3294 if (BTC_WIFI_BW_HT40 == wifi_bw) {
3295 if ((wifirssi_state == BTC_RSSI_STATE_HIGH) ||
3296 (wifirssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
3297 halbtc_sw_mechanism1(btcoexist, true, true,
3298 false, false);
3299 halbtc_sw_mechanism2(btcoexist, true, false,
3300 false, 0x18);
3301 } else {
3302 halbtc_sw_mechanism1(btcoexist, true, true,
3303 false, false);
3304 halbtc_sw_mechanism2(btcoexist, false, false,
3305 false, 0x18);
3306 }
3307 } else {
3308 if ((wifirssi_state == BTC_RSSI_STATE_HIGH) ||
3309 (wifirssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
3310 halbtc_sw_mechanism1(btcoexist, false, true,
3311 false, false);
3312 halbtc_sw_mechanism2(btcoexist, true, false,
3313 false, 0x18);
3314 } else {
3315 halbtc_sw_mechanism1(btcoexist, false, true,
3316 false, false);
3317 halbtc_sw_mechanism2(btcoexist, false, false,
3318 false, 0x18);
3319 }
3320 }
3321}
3322
3323static void halbtc8192e2ant_run_coexist_mechanism(struct btc_coexist *btcoexist)
3324{
3325 u8 algorithm = 0;
3326
3327 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
3328 "[BTCoex], RunCoexistMechanism() ===>\n");
3329
3330 if (btcoexist->manual_control) {
3331 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
3332 "[BTCoex], return for Manual CTRL <===\n");
3333 return;
3334 }
3335
3336 if (coex_sta->under_ips) {
3337 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
3338 "[BTCoex], wifi is under IPS !!!\n");
3339 return;
3340 }
3341
3342 algorithm = halbtc8192e2ant_action_algorithm(btcoexist);
3343 if (coex_sta->c2h_bt_inquiry_page &&
3344 (BT_8192E_2ANT_COEX_ALGO_PANHS != algorithm)) {
3345 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
3346 "[BTCoex], BT is under inquiry/page scan !!\n");
3347 halbtc8192e2ant_action_bt_inquiry(btcoexist);
3348 return;
3349 }
3350
3351 coex_dm->cur_algorithm = algorithm;
3352 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
3353 "[BTCoex], Algorithm = %d\n", coex_dm->cur_algorithm);
3354
3355 if (halbtc8192e2ant_is_common_action(btcoexist)) {
3356 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
3357 "[BTCoex], Action 2-Ant common.\n");
3358 coex_dm->auto_tdma_adjust = false;
3359 } else {
3360 if (coex_dm->cur_algorithm != coex_dm->pre_algorithm) {
3361 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
3362 "[BTCoex] preAlgorithm =%d, curAlgorithm =%d\n",
3363 coex_dm->pre_algorithm,
3364 coex_dm->cur_algorithm);
3365 coex_dm->auto_tdma_adjust = false;
3366 }
3367 switch (coex_dm->cur_algorithm) {
3368 case BT_8192E_2ANT_COEX_ALGO_SCO:
3369 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
3370 "Action 2-Ant, algorithm = SCO.\n");
3371 halbtc8192e2ant_action_sco(btcoexist);
3372 break;
3373 case BT_8192E_2ANT_COEX_ALGO_SCO_PAN:
3374 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
3375 "Action 2-Ant, algorithm = SCO+PAN(EDR).\n");
3376 halbtc8192e2ant_action_sco_pan(btcoexist);
3377 break;
3378 case BT_8192E_2ANT_COEX_ALGO_HID:
3379 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
3380 "Action 2-Ant, algorithm = HID.\n");
3381 halbtc8192e2ant_action_hid(btcoexist);
3382 break;
3383 case BT_8192E_2ANT_COEX_ALGO_A2DP:
3384 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
3385 "Action 2-Ant, algorithm = A2DP.\n");
3386 halbtc8192e2ant_action_a2dp(btcoexist);
3387 break;
3388 case BT_8192E_2ANT_COEX_ALGO_A2DP_PANHS:
3389 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
3390 "Action 2-Ant, algorithm = A2DP+PAN(HS).\n");
3391 halbtc8192e2ant_action_a2dp_pan_hs(btcoexist);
3392 break;
3393 case BT_8192E_2ANT_COEX_ALGO_PANEDR:
3394 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
3395 "Action 2-Ant, algorithm = PAN(EDR).\n");
3396 halbtc8192e2ant_action_pan_edr(btcoexist);
3397 break;
3398 case BT_8192E_2ANT_COEX_ALGO_PANHS:
3399 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
3400 "Action 2-Ant, algorithm = HS mode.\n");
3401 halbtc8192e2ant_action_pan_hs(btcoexist);
3402 break;
3403 case BT_8192E_2ANT_COEX_ALGO_PANEDR_A2DP:
3404 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
3405 "Action 2-Ant, algorithm = PAN+A2DP.\n");
3406 halbtc8192e2ant_action_pan_edr_a2dp(btcoexist);
3407 break;
3408 case BT_8192E_2ANT_COEX_ALGO_PANEDR_HID:
3409 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
3410 "Action 2-Ant, algorithm = PAN(EDR)+HID.\n");
3411 halbtc8192e2ant_action_pan_edr_hid(btcoexist);
3412 break;
3413 case BT_8192E_2ANT_COEX_ALGO_HID_A2DP_PANEDR:
3414 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
3415 "Action 2-Ant, algorithm = HID+A2DP+PAN.\n");
3416 action_hid_a2dp_pan_edr(btcoexist);
3417 break;
3418 case BT_8192E_2ANT_COEX_ALGO_HID_A2DP:
3419 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
3420 "Action 2-Ant, algorithm = HID+A2DP.\n");
3421 halbtc8192e2ant_action_hid_a2dp(btcoexist);
3422 break;
3423 default:
3424 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
3425 "Action 2-Ant, algorithm = unknown!!\n");
3426 /* halbtc8192e2ant_coex_alloff(btcoexist); */
3427 break;
3428 }
3429 coex_dm->pre_algorithm = coex_dm->cur_algorithm;
3430 }
3431}
3432
3433static void halbtc8192e2ant_init_hwconfig(struct btc_coexist *btcoexist,
3434 bool backup)
3435{
3436 u16 u16tmp = 0;
3437 u8 u8tmp = 0;
3438
3439 BTC_PRINT(BTC_MSG_INTERFACE, INTF_INIT,
3440 "[BTCoex], 2Ant Init HW Config!!\n");
3441
3442 if (backup) {
3443 /* backup rf 0x1e value */
3444 coex_dm->bt_rf0x1e_backup =
3445 btcoexist->btc_get_rf_reg(btcoexist, BTC_RF_A,
3446 0x1e, 0xfffff);
3447
3448 coex_dm->backup_arfr_cnt1 = btcoexist->btc_read_4byte(btcoexist,
3449 0x430);
3450 coex_dm->backup_arfr_cnt2 = btcoexist->btc_read_4byte(btcoexist,
3451 0x434);
3452 coex_dm->backup_retrylimit = btcoexist->btc_read_2byte(
3453 btcoexist,
3454 0x42a);
3455 coex_dm->backup_ampdu_maxtime = btcoexist->btc_read_1byte(
3456 btcoexist,
3457 0x456);
3458 }
3459
3460 /* antenna sw ctrl to bt */
3461 btcoexist->btc_write_1byte(btcoexist, 0x4f, 0x6);
3462 btcoexist->btc_write_1byte(btcoexist, 0x944, 0x24);
3463 btcoexist->btc_write_4byte(btcoexist, 0x930, 0x700700);
3464 btcoexist->btc_write_1byte(btcoexist, 0x92c, 0x20);
3465 if (btcoexist->chip_interface == BTC_INTF_USB)
3466 btcoexist->btc_write_4byte(btcoexist, 0x64, 0x30430004);
3467 else
3468 btcoexist->btc_write_4byte(btcoexist, 0x64, 0x30030004);
3469
3470 halbtc_coex_table_with_type(btcoexist, FORCE_EXEC, 0);
3471
3472 /* antenna switch control parameter */
3473 btcoexist->btc_write_4byte(btcoexist, 0x858, 0x55555555);
3474
3475 /* coex parameters */
3476 btcoexist->btc_write_1byte(btcoexist, 0x778, 0x3);
3477 /* 0x790[5:0] = 0x5 */
3478 u8tmp = btcoexist->btc_read_1byte(btcoexist, 0x790);
3479 u8tmp &= 0xc0;
3480 u8tmp |= 0x5;
3481 btcoexist->btc_write_1byte(btcoexist, 0x790, u8tmp);
3482
3483 /* enable counter statistics */
3484 btcoexist->btc_write_1byte(btcoexist, 0x76e, 0x4);
3485
3486 /* enable PTA */
3487 btcoexist->btc_write_1byte(btcoexist, 0x40, 0x20);
3488 /* enable mailbox interface */
3489 u16tmp = btcoexist->btc_read_2byte(btcoexist, 0x40);
3490 u16tmp |= BIT(9);
3491 btcoexist->btc_write_2byte(btcoexist, 0x40, u16tmp);
3492
3493 /* enable PTA I2C mailbox */
3494 u8tmp = btcoexist->btc_read_1byte(btcoexist, 0x101);
3495 u8tmp |= BIT(4);
3496 btcoexist->btc_write_1byte(btcoexist, 0x101, u8tmp);
3497
3498 /* enable bt clock when wifi is disabled. */
3499 u8tmp = btcoexist->btc_read_1byte(btcoexist, 0x93);
3500 u8tmp |= BIT(0);
3501 btcoexist->btc_write_1byte(btcoexist, 0x93, u8tmp);
3502 /* enable bt clock when suspend. */
3503 u8tmp = btcoexist->btc_read_1byte(btcoexist, 0x7);
3504 u8tmp |= BIT(0);
3505 btcoexist->btc_write_1byte(btcoexist, 0x7, u8tmp);
3506}
3507
3508/*************************************************************
3509 * work around function start with wa_halbtc8192e2ant_
3510 *************************************************************/
3511
3512/************************************************************
3513 * extern function start with EXhalbtc8192e2ant_
3514 ************************************************************/
3515
3516void ex_halbtc8192e2ant_init_hwconfig(struct btc_coexist *btcoexist)
3517{
3518 halbtc8192e2ant_init_hwconfig(btcoexist, true);
3519}
3520
3521void ex_halbtc8192e2ant_init_coex_dm(struct btc_coexist *btcoexist)
3522{
3523 BTC_PRINT(BTC_MSG_INTERFACE, INTF_INIT,
3524 "[BTCoex], Coex Mechanism Init!!\n");
3525 halbtc8192e2ant_init_coex_dm(btcoexist);
3526}
3527
3528void ex_halbtc8192e2ant_display_coex_info(struct btc_coexist *btcoexist)
3529{
3530 struct btc_board_info *board_info = &btcoexist->board_info;
3531 struct btc_stack_info *stack_info = &btcoexist->stack_info;
3532 u8 *cli_buf = btcoexist->cli_buf;
3533 u8 u8tmp[4], i, bt_info_ext, ps_tdma_case = 0;
3534 u16 u16tmp[4];
3535 u32 u32tmp[4];
3536 bool roam = false, scan = false, link = false, wifi_under_5g = false;
3537 bool bt_hson = false, wifi_busy = false;
3538 int wifirssi = 0, bt_hs_rssi = 0;
3539 u32 wifi_bw, wifi_traffic_dir;
3540 u8 wifi_dot11_chnl, wifi_hs_chnl;
3541 u32 fw_ver = 0, bt_patch_ver = 0;
3542
3543 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
3544 "\r\n ============[BT Coexist info] ============");
3545 CL_PRINTF(cli_buf);
3546
3547 if (btcoexist->manual_control) {
3548 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
3549 "\r\n ===========[Under Manual Control] ===========");
3550 CL_PRINTF(cli_buf);
3551 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
3552 "\r\n ==========================================");
3553 CL_PRINTF(cli_buf);
3554 }
3555
3556 if (!board_info->bt_exist) {
3557 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n BT not exists !!!");
3558 CL_PRINTF(cli_buf);
3559 return;
3560 }
3561
3562 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
3563 "\r\n %-35s = %d/ %d ", "Ant PG number/ Ant mechanism: ",
3564 board_info->pg_ant_num, board_info->btdm_ant_num);
3565 CL_PRINTF(cli_buf);
3566
3567 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s / %d",
3568 "BT stack/ hci ext ver",
3569 ((stack_info->profile_notified) ? "Yes" : "No"),
3570 stack_info->hci_version);
3571 CL_PRINTF(cli_buf);
3572
3573 btcoexist->btc_get(btcoexist, BTC_GET_U4_BT_PATCH_VER, &bt_patch_ver);
3574 btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_FW_VER, &fw_ver);
3575 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
3576 "\r\n %-35s = %d_%d/ 0x%x/ 0x%x(%d)",
3577 "CoexVer/ FwVer/ PatchVer",
3578 glcoex_ver_date_8192e_2ant, glcoex_ver_8192e_2ant,
3579 fw_ver, bt_patch_ver, bt_patch_ver);
3580 CL_PRINTF(cli_buf);
3581
3582 btcoexist->btc_get(btcoexist, BTC_GET_BL_HS_OPERATION, &bt_hson);
3583 btcoexist->btc_get(btcoexist, BTC_GET_U1_WIFI_DOT11_CHNL,
3584 &wifi_dot11_chnl);
3585 btcoexist->btc_get(btcoexist, BTC_GET_U1_WIFI_HS_CHNL, &wifi_hs_chnl);
3586 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d / %d(%d)",
3587 "Dot11 channel / HsMode(HsChnl)",
3588 wifi_dot11_chnl, bt_hson, wifi_hs_chnl);
3589 CL_PRINTF(cli_buf);
3590
3591 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %02x %02x %02x ",
3592 "H2C Wifi inform bt chnl Info", coex_dm->wifi_chnl_info[0],
3593 coex_dm->wifi_chnl_info[1], coex_dm->wifi_chnl_info[2]);
3594 CL_PRINTF(cli_buf);
3595
3596 btcoexist->btc_get(btcoexist, BTC_GET_S4_WIFI_RSSI, &wifirssi);
3597 btcoexist->btc_get(btcoexist, BTC_GET_S4_HS_RSSI, &bt_hs_rssi);
3598 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d",
3599 "Wifi rssi/ HS rssi", wifirssi, bt_hs_rssi);
3600 CL_PRINTF(cli_buf);
3601
3602 btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_SCAN, &scan);
3603 btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_LINK, &link);
3604 btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_ROAM, &roam);
3605 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %d ",
3606 "Wifi link/ roam/ scan", link, roam, scan);
3607 CL_PRINTF(cli_buf);
3608
3609 btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_UNDER_5G, &wifi_under_5g);
3610 btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
3611 btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_BUSY, &wifi_busy);
3612 btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_TRAFFIC_DIRECTION,
3613 &wifi_traffic_dir);
3614 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s / %s/ %s ",
3615 "Wifi status", (wifi_under_5g ? "5G" : "2.4G"),
3616 ((BTC_WIFI_BW_LEGACY == wifi_bw) ? "Legacy" :
3617 (((BTC_WIFI_BW_HT40 == wifi_bw) ? "HT40" : "HT20"))),
3618 ((!wifi_busy) ? "idle" :
3619 ((BTC_WIFI_TRAFFIC_TX == wifi_traffic_dir) ?
3620 "uplink" : "downlink")));
3621 CL_PRINTF(cli_buf);
3622
3623 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = [%s/ %d/ %d] ",
3624 "BT [status/ rssi/ retryCnt]",
3625 ((btcoexist->bt_info.bt_disabled) ? ("disabled") :
3626 ((coex_sta->c2h_bt_inquiry_page) ?
3627 ("inquiry/page scan") :
3628 ((BT_8192E_2ANT_BT_STATUS_NON_CONNECTED_IDLE ==
3629 coex_dm->bt_status) ? "non-connected idle" :
3630 ((BT_8192E_2ANT_BT_STATUS_CONNECTED_IDLE ==
3631 coex_dm->bt_status) ? "connected-idle" : "busy")))),
3632 coex_sta->bt_rssi, coex_sta->bt_retry_cnt);
3633 CL_PRINTF(cli_buf);
3634
3635 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d / %d / %d / %d",
3636 "SCO/HID/PAN/A2DP", stack_info->sco_exist,
3637 stack_info->hid_exist, stack_info->pan_exist,
3638 stack_info->a2dp_exist);
3639 CL_PRINTF(cli_buf);
3640 btcoexist->btc_disp_dbg_msg(btcoexist, BTC_DBG_DISP_BT_LINK_INFO);
3641
3642 bt_info_ext = coex_sta->bt_info_ext;
3643 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s",
3644 "BT Info A2DP rate",
3645 (bt_info_ext & BIT(0)) ? "Basic rate" : "EDR rate");
3646 CL_PRINTF(cli_buf);
3647
3648 for (i = 0; i < BT_INFO_SRC_8192E_2ANT_MAX; i++) {
3649 if (coex_sta->bt_info_c2h_cnt[i]) {
3650 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
3651 "\r\n %-35s = %02x %02x %02x %02x ",
3652 glbt_infosrc8192e2ant[i],
3653 coex_sta->bt_info_c2h[i][0],
3654 coex_sta->bt_info_c2h[i][1],
3655 coex_sta->bt_info_c2h[i][2],
3656 coex_sta->bt_info_c2h[i][3]);
3657 CL_PRINTF(cli_buf);
3658 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
3659 "%02x %02x %02x(%d)",
3660 coex_sta->bt_info_c2h[i][4],
3661 coex_sta->bt_info_c2h[i][5],
3662 coex_sta->bt_info_c2h[i][6],
3663 coex_sta->bt_info_c2h_cnt[i]);
3664 CL_PRINTF(cli_buf);
3665 }
3666 }
3667
3668 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s/%s",
3669 "PS state, IPS/LPS",
3670 ((coex_sta->under_ips ? "IPS ON" : "IPS OFF")),
3671 ((coex_sta->under_lps ? "LPS ON" : "LPS OFF")));
3672 CL_PRINTF(cli_buf);
3673 btcoexist->btc_disp_dbg_msg(btcoexist, BTC_DBG_DISP_FW_PWR_MODE_CMD);
3674
3675 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x ", "SS Type",
3676 coex_dm->cur_sstype);
3677 CL_PRINTF(cli_buf);
3678
3679 /* Sw mechanism */
3680 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s",
3681 "============[Sw mechanism] ============");
3682 CL_PRINTF(cli_buf);
3683 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %d ",
3684 "SM1[ShRf/ LpRA/ LimDig]", coex_dm->cur_rf_rx_lpf_shrink,
3685 coex_dm->cur_low_penalty_ra, coex_dm->limited_dig);
3686 CL_PRINTF(cli_buf);
3687 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %d(0x%x) ",
3688 "SM2[AgcT/ AdcB/ SwDacSwing(lvl)]",
3689 coex_dm->cur_agc_table_en, coex_dm->cur_adc_back_off,
3690 coex_dm->cur_dac_swing_on, coex_dm->cur_dac_swing_lvl);
3691 CL_PRINTF(cli_buf);
3692
3693 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x ", "Rate Mask",
3694 btcoexist->bt_info.ra_mask);
3695 CL_PRINTF(cli_buf);
3696
3697 /* Fw mechanism */
3698 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s",
3699 "============[Fw mechanism] ============");
3700 CL_PRINTF(cli_buf);
3701
3702 ps_tdma_case = coex_dm->cur_ps_tdma;
3703 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
3704 "\r\n %-35s = %02x %02x %02x %02x %02x case-%d (auto:%d)",
3705 "PS TDMA", coex_dm->ps_tdma_para[0],
3706 coex_dm->ps_tdma_para[1], coex_dm->ps_tdma_para[2],
3707 coex_dm->ps_tdma_para[3], coex_dm->ps_tdma_para[4],
3708 ps_tdma_case, coex_dm->auto_tdma_adjust);
3709 CL_PRINTF(cli_buf);
3710
3711 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d ",
3712 "DecBtPwr/ IgnWlanAct",
3713 coex_dm->cur_dec_bt_pwr, coex_dm->cur_ignore_wlan_act);
3714 CL_PRINTF(cli_buf);
3715
3716 /* Hw setting */
3717 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s",
3718 "============[Hw setting] ============");
3719 CL_PRINTF(cli_buf);
3720
3721 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x",
3722 "RF-A, 0x1e initVal", coex_dm->bt_rf0x1e_backup);
3723 CL_PRINTF(cli_buf);
3724
3725 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/0x%x/0x%x/0x%x",
3726 "backup ARFR1/ARFR2/RL/AMaxTime", coex_dm->backup_arfr_cnt1,
3727 coex_dm->backup_arfr_cnt2, coex_dm->backup_retrylimit,
3728 coex_dm->backup_ampdu_maxtime);
3729 CL_PRINTF(cli_buf);
3730
3731 u32tmp[0] = btcoexist->btc_read_4byte(btcoexist, 0x430);
3732 u32tmp[1] = btcoexist->btc_read_4byte(btcoexist, 0x434);
3733 u16tmp[0] = btcoexist->btc_read_2byte(btcoexist, 0x42a);
3734 u8tmp[0] = btcoexist->btc_read_1byte(btcoexist, 0x456);
3735 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/0x%x/0x%x/0x%x",
3736 "0x430/0x434/0x42a/0x456",
3737 u32tmp[0], u32tmp[1], u16tmp[0], u8tmp[0]);
3738 CL_PRINTF(cli_buf);
3739
3740 u32tmp[0] = btcoexist->btc_read_4byte(btcoexist, 0xc04);
3741 u32tmp[1] = btcoexist->btc_read_4byte(btcoexist, 0xd04);
3742 u32tmp[2] = btcoexist->btc_read_4byte(btcoexist, 0x90c);
3743 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x/ 0x%x",
3744 "0xc04/ 0xd04/ 0x90c", u32tmp[0], u32tmp[1], u32tmp[2]);
3745 CL_PRINTF(cli_buf);
3746
3747 u8tmp[0] = btcoexist->btc_read_1byte(btcoexist, 0x778);
3748 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x", "0x778",
3749 u8tmp[0]);
3750 CL_PRINTF(cli_buf);
3751
3752 u8tmp[0] = btcoexist->btc_read_1byte(btcoexist, 0x92c);
3753 u32tmp[0] = btcoexist->btc_read_4byte(btcoexist, 0x930);
3754 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x",
3755 "0x92c/ 0x930", (u8tmp[0]), u32tmp[0]);
3756 CL_PRINTF(cli_buf);
3757
3758 u8tmp[0] = btcoexist->btc_read_1byte(btcoexist, 0x40);
3759 u8tmp[1] = btcoexist->btc_read_1byte(btcoexist, 0x4f);
3760 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x",
3761 "0x40/ 0x4f", u8tmp[0], u8tmp[1]);
3762 CL_PRINTF(cli_buf);
3763
3764 u32tmp[0] = btcoexist->btc_read_4byte(btcoexist, 0x550);
3765 u8tmp[0] = btcoexist->btc_read_1byte(btcoexist, 0x522);
3766 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x",
3767 "0x550(bcn ctrl)/0x522", u32tmp[0], u8tmp[0]);
3768 CL_PRINTF(cli_buf);
3769
3770 u32tmp[0] = btcoexist->btc_read_4byte(btcoexist, 0xc50);
3771 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x", "0xc50(dig)",
3772 u32tmp[0]);
3773 CL_PRINTF(cli_buf);
3774
3775 u32tmp[0] = btcoexist->btc_read_4byte(btcoexist, 0x6c0);
3776 u32tmp[1] = btcoexist->btc_read_4byte(btcoexist, 0x6c4);
3777 u32tmp[2] = btcoexist->btc_read_4byte(btcoexist, 0x6c8);
3778 u8tmp[0] = btcoexist->btc_read_1byte(btcoexist, 0x6cc);
3779 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
3780 "\r\n %-35s = 0x%x/ 0x%x/ 0x%x/ 0x%x",
3781 "0x6c0/0x6c4/0x6c8/0x6cc(coexTable)",
3782 u32tmp[0], u32tmp[1], u32tmp[2], u8tmp[0]);
3783 CL_PRINTF(cli_buf);
3784
3785 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d",
3786 "0x770(hp rx[31:16]/tx[15:0])",
3787 coex_sta->high_priority_rx, coex_sta->high_priority_tx);
3788 CL_PRINTF(cli_buf);
3789 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d",
3790 "0x774(lp rx[31:16]/tx[15:0])",
3791 coex_sta->low_priority_rx, coex_sta->low_priority_tx);
3792 CL_PRINTF(cli_buf);
3793#if (BT_AUTO_REPORT_ONLY_8192E_2ANT == 1)
3794 halbtc8192e2ant_monitor_bt_ctr(btcoexist);
3795#endif
3796 btcoexist->btc_disp_dbg_msg(btcoexist, BTC_DBG_DISP_COEX_STATISTICS);
3797}
3798
3799void ex_halbtc8192e2ant_ips_notify(struct btc_coexist *btcoexist, u8 type)
3800{
3801 if (BTC_IPS_ENTER == type) {
3802 BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY,
3803 "[BTCoex], IPS ENTER notify\n");
3804 coex_sta->under_ips = true;
3805 halbtc8192e2ant_coex_alloff(btcoexist);
3806 } else if (BTC_IPS_LEAVE == type) {
3807 BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY,
3808 "[BTCoex], IPS LEAVE notify\n");
3809 coex_sta->under_ips = false;
3810 }
3811}
3812
3813void ex_halbtc8192e2ant_lps_notify(struct btc_coexist *btcoexist, u8 type)
3814{
3815 if (BTC_LPS_ENABLE == type) {
3816 BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY,
3817 "[BTCoex], LPS ENABLE notify\n");
3818 coex_sta->under_lps = true;
3819 } else if (BTC_LPS_DISABLE == type) {
3820 BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY,
3821 "[BTCoex], LPS DISABLE notify\n");
3822 coex_sta->under_lps = false;
3823 }
3824}
3825
3826void ex_halbtc8192e2ant_scan_notify(struct btc_coexist *btcoexist, u8 type)
3827{
3828 if (BTC_SCAN_START == type)
3829 BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY,
3830 "[BTCoex], SCAN START notify\n");
3831 else if (BTC_SCAN_FINISH == type)
3832 BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY,
3833 "[BTCoex], SCAN FINISH notify\n");
3834}
3835
3836void ex_halbtc8192e2ant_connect_notify(struct btc_coexist *btcoexist, u8 type)
3837{
3838 if (BTC_ASSOCIATE_START == type)
3839 BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY,
3840 "[BTCoex], CONNECT START notify\n");
3841 else if (BTC_ASSOCIATE_FINISH == type)
3842 BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY,
3843 "[BTCoex], CONNECT FINISH notify\n");
3844}
3845
3846void ex_halbtc8192e2ant_media_status_notify(struct btc_coexist *btcoexist,
3847 u8 type)
3848{
3849 u8 h2c_parameter[3] = {0};
3850 u32 wifi_bw;
3851 u8 wifi_center_chnl;
3852
3853 if (btcoexist->manual_control ||
3854 btcoexist->stop_coex_dm ||
3855 btcoexist->bt_info.bt_disabled)
3856 return;
3857
3858 if (BTC_MEDIA_CONNECT == type)
3859 BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY,
3860 "[BTCoex], MEDIA connect notify\n");
3861 else
3862 BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY,
3863 "[BTCoex], MEDIA disconnect notify\n");
3864
3865 /* only 2.4G we need to inform bt the chnl mask */
3866 btcoexist->btc_get(btcoexist, BTC_GET_U1_WIFI_CENTRAL_CHNL,
3867 &wifi_center_chnl);
3868 if ((BTC_MEDIA_CONNECT == type) &&
3869 (wifi_center_chnl <= 14)) {
3870 h2c_parameter[0] = 0x1;
3871 h2c_parameter[1] = wifi_center_chnl;
3872 btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
3873 if (BTC_WIFI_BW_HT40 == wifi_bw)
3874 h2c_parameter[2] = 0x30;
3875 else
3876 h2c_parameter[2] = 0x20;
3877 }
3878
3879 coex_dm->wifi_chnl_info[0] = h2c_parameter[0];
3880 coex_dm->wifi_chnl_info[1] = h2c_parameter[1];
3881 coex_dm->wifi_chnl_info[2] = h2c_parameter[2];
3882
3883 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_EXEC,
3884 "[BTCoex], FW write 0x66 = 0x%x\n",
3885 h2c_parameter[0] << 16 | h2c_parameter[1] << 8 |
3886 h2c_parameter[2]);
3887
3888 btcoexist->btc_fill_h2c(btcoexist, 0x66, 3, h2c_parameter);
3889}
3890
3891void ex_halbtc8192e2ant_special_packet_notify(struct btc_coexist *btcoexist,
3892 u8 type)
3893{
3894 if (type == BTC_PACKET_DHCP)
3895 BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY,
3896 "[BTCoex], DHCP Packet notify\n");
3897}
3898
3899void ex_halbtc8192e2ant_bt_info_notify(struct btc_coexist *btcoexist,
3900 u8 *tmp_buf, u8 length)
3901{
3902 u8 bt_info = 0;
3903 u8 i, rspsource = 0;
3904 bool bt_busy = false, limited_dig = false;
3905 bool wifi_connected = false;
3906
3907 coex_sta->c2h_bt_info_req_sent = false;
3908
3909 rspsource = tmp_buf[0] & 0xf;
3910 if (rspsource >= BT_INFO_SRC_8192E_2ANT_MAX)
3911 rspsource = BT_INFO_SRC_8192E_2ANT_WIFI_FW;
3912 coex_sta->bt_info_c2h_cnt[rspsource]++;
3913
3914 BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY,
3915 "[BTCoex], Bt info[%d], length =%d, hex data =[",
3916 rspsource, length);
3917 for (i = 0; i < length; i++) {
3918 coex_sta->bt_info_c2h[rspsource][i] = tmp_buf[i];
3919 if (i == 1)
3920 bt_info = tmp_buf[i];
3921 if (i == length-1)
3922 BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY,
3923 "0x%02x]\n", tmp_buf[i]);
3924 else
3925 BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY,
3926 "0x%02x, ", tmp_buf[i]);
3927 }
3928
3929 if (BT_INFO_SRC_8192E_2ANT_WIFI_FW != rspsource) {
3930 coex_sta->bt_retry_cnt = /* [3:0] */
3931 coex_sta->bt_info_c2h[rspsource][2] & 0xf;
3932
3933 coex_sta->bt_rssi =
3934 coex_sta->bt_info_c2h[rspsource][3] * 2 + 10;
3935
3936 coex_sta->bt_info_ext =
3937 coex_sta->bt_info_c2h[rspsource][4];
3938
3939 /* Here we need to resend some wifi info to BT
3940 * because bt is reset and loss of the info. */
3941 if ((coex_sta->bt_info_ext & BIT(1))) {
3942 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
3943 "bit1, send wifi BW&Chnl to BT!!\n");
3944 btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_CONNECTED,
3945 &wifi_connected);
3946 if (wifi_connected)
3947 ex_halbtc8192e2ant_media_status_notify(
3948 btcoexist,
3949 BTC_MEDIA_CONNECT);
3950 else
3951 ex_halbtc8192e2ant_media_status_notify(
3952 btcoexist,
3953 BTC_MEDIA_DISCONNECT);
3954 }
3955
3956 if ((coex_sta->bt_info_ext & BIT(3))) {
3957 if (!btcoexist->manual_control &&
3958 !btcoexist->stop_coex_dm) {
3959 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
3960 "bit3, BT NOT ignore Wlan active!\n");
3961 halbtc8192e2ant_ignorewlanact(btcoexist,
3962 FORCE_EXEC,
3963 false);
3964 }
3965 } else {
3966 /* BT already NOT ignore Wlan active,
3967 * do nothing here. */
3968 }
3969
3970#if (BT_AUTO_REPORT_ONLY_8192E_2ANT == 0)
3971 if ((coex_sta->bt_info_ext & BIT(4))) {
3972 /* BT auto report already enabled, do nothing */
3973 } else {
3974 halbtc8192e2ant_bt_autoreport(btcoexist, FORCE_EXEC,
3975 true);
3976 }
3977#endif
3978 }
3979
3980 /* check BIT(2) first ==> check if bt is under inquiry or page scan */
3981 if (bt_info & BT_INFO_8192E_2ANT_B_INQ_PAGE)
3982 coex_sta->c2h_bt_inquiry_page = true;
3983 else
3984 coex_sta->c2h_bt_inquiry_page = false;
3985
3986 /* set link exist status */
3987 if (!(bt_info&BT_INFO_8192E_2ANT_B_CONNECTION)) {
3988 coex_sta->bt_link_exist = false;
3989 coex_sta->pan_exist = false;
3990 coex_sta->a2dp_exist = false;
3991 coex_sta->hid_exist = false;
3992 coex_sta->sco_exist = false;
3993 } else {/* connection exists */
3994 coex_sta->bt_link_exist = true;
3995 if (bt_info & BT_INFO_8192E_2ANT_B_FTP)
3996 coex_sta->pan_exist = true;
3997 else
3998 coex_sta->pan_exist = false;
3999 if (bt_info & BT_INFO_8192E_2ANT_B_A2DP)
4000 coex_sta->a2dp_exist = true;
4001 else
4002 coex_sta->a2dp_exist = false;
4003 if (bt_info & BT_INFO_8192E_2ANT_B_HID)
4004 coex_sta->hid_exist = true;
4005 else
4006 coex_sta->hid_exist = false;
4007 if (bt_info & BT_INFO_8192E_2ANT_B_SCO_ESCO)
4008 coex_sta->sco_exist = true;
4009 else
4010 coex_sta->sco_exist = false;
4011 }
4012
4013 halbtc8192e2ant_update_btlink_info(btcoexist);
4014
4015 if (!(bt_info&BT_INFO_8192E_2ANT_B_CONNECTION)) {
4016 coex_dm->bt_status = BT_8192E_2ANT_BT_STATUS_NON_CONNECTED_IDLE;
4017 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
4018 "[BTCoex], BT Non-Connected idle!!!\n");
4019 } else if (bt_info == BT_INFO_8192E_2ANT_B_CONNECTION) {
4020 coex_dm->bt_status = BT_8192E_2ANT_BT_STATUS_CONNECTED_IDLE;
4021 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
4022 "[BTCoex], bt_infoNotify(), BT Connected-idle!!!\n");
4023 } else if ((bt_info&BT_INFO_8192E_2ANT_B_SCO_ESCO) ||
4024 (bt_info&BT_INFO_8192E_2ANT_B_SCO_BUSY)) {
4025 coex_dm->bt_status = BT_8192E_2ANT_BT_STATUS_SCO_BUSY;
4026 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
4027 "[BTCoex], bt_infoNotify(), BT SCO busy!!!\n");
4028 } else if (bt_info&BT_INFO_8192E_2ANT_B_ACL_BUSY) {
4029 coex_dm->bt_status = BT_8192E_2ANT_BT_STATUS_ACL_BUSY;
4030 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
4031 "[BTCoex], bt_infoNotify(), BT ACL busy!!!\n");
4032 } else {
4033 coex_dm->bt_status = BT_8192E_2ANT_BT_STATUS_MAX;
4034 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
4035 "[BTCoex]bt_infoNotify(), BT Non-Defined state!!!\n");
4036 }
4037
4038 if ((BT_8192E_2ANT_BT_STATUS_ACL_BUSY == coex_dm->bt_status) ||
4039 (BT_8192E_2ANT_BT_STATUS_SCO_BUSY == coex_dm->bt_status) ||
4040 (BT_8192E_2ANT_BT_STATUS_ACL_SCO_BUSY == coex_dm->bt_status)) {
4041 bt_busy = true;
4042 limited_dig = true;
4043 } else {
4044 bt_busy = false;
4045 limited_dig = false;
4046 }
4047
4048 btcoexist->btc_set(btcoexist, BTC_SET_BL_BT_TRAFFIC_BUSY, &bt_busy);
4049
4050 coex_dm->limited_dig = limited_dig;
4051 btcoexist->btc_set(btcoexist, BTC_SET_BL_BT_LIMITED_DIG, &limited_dig);
4052
4053 halbtc8192e2ant_run_coexist_mechanism(btcoexist);
4054}
4055
4056void ex_halbtc8192e2ant_stack_operation_notify(struct btc_coexist *btcoexist,
4057 u8 type)
4058{
4059}
4060
4061void ex_halbtc8192e2ant_halt_notify(struct btc_coexist *btcoexist)
4062{
4063 BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY, "[BTCoex], Halt notify\n");
4064
4065 halbtc8192e2ant_ignorewlanact(btcoexist, FORCE_EXEC, true);
4066 ex_halbtc8192e2ant_media_status_notify(btcoexist, BTC_MEDIA_DISCONNECT);
4067}
4068
4069void ex_halbtc8192e2ant_periodical(struct btc_coexist *btcoexist)
4070{
4071 static u8 dis_ver_info_cnt;
4072 u32 fw_ver = 0, bt_patch_ver = 0;
4073 struct btc_board_info *board_info = &btcoexist->board_info;
4074 struct btc_stack_info *stack_info = &btcoexist->stack_info;
4075
4076 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
4077 "======================= Periodical =======================\n");
4078 if (dis_ver_info_cnt <= 5) {
4079 dis_ver_info_cnt += 1;
4080 BTC_PRINT(BTC_MSG_INTERFACE, INTF_INIT,
4081 "************************************************\n");
4082 BTC_PRINT(BTC_MSG_INTERFACE, INTF_INIT,
4083 "Ant PG Num/ Ant Mech/ Ant Pos = %d/ %d/ %d\n",
4084 board_info->pg_ant_num, board_info->btdm_ant_num,
4085 board_info->btdm_ant_pos);
4086 BTC_PRINT(BTC_MSG_INTERFACE, INTF_INIT,
4087 "BT stack/ hci ext ver = %s / %d\n",
4088 ((stack_info->profile_notified) ? "Yes" : "No"),
4089 stack_info->hci_version);
4090 btcoexist->btc_get(btcoexist, BTC_GET_U4_BT_PATCH_VER,
4091 &bt_patch_ver);
4092 btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_FW_VER, &fw_ver);
4093 BTC_PRINT(BTC_MSG_INTERFACE, INTF_INIT,
4094 "CoexVer/ FwVer/ PatchVer = %d_%x/ 0x%x/ 0x%x(%d)\n",
4095 glcoex_ver_date_8192e_2ant, glcoex_ver_8192e_2ant,
4096 fw_ver, bt_patch_ver, bt_patch_ver);
4097 BTC_PRINT(BTC_MSG_INTERFACE, INTF_INIT,
4098 "************************************************\n");
4099 }
4100
4101#if (BT_AUTO_REPORT_ONLY_8192E_2ANT == 0)
4102 halbtc8192e2ant_querybt_info(btcoexist);
4103 halbtc8192e2ant_monitor_bt_ctr(btcoexist);
4104 halbtc_monitor_bt_enable_disable(btcoexist);
4105#else
4106 if (halbtc8192e2ant_iswifi_status_changed(btcoexist) ||
4107 coex_dm->auto_tdma_adjust)
4108 halbtc8192e2ant_run_coexist_mechanism(btcoexist);
4109#endif
4110}
Linux kernel - Deliverables
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