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1 | /****************************************************************************** |
2 | * | |
3 | * Copyright(c) 2007 - 2010 Realtek Corporation. All rights reserved. | |
4 | * | |
5 | * This program is free software; you can redistribute it and/or modify it | |
6 | * under the terms of version 2 of the GNU General Public License as | |
7 | * published by the Free Software Foundation. | |
8 | * | |
9 | * This program is distributed in the hope that it will be useful, but WITHOUT | |
10 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
11 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | |
12 | * more details. | |
13 | * | |
14 | * You should have received a copy of the GNU General Public License along with | |
15 | * this program; if not, write to the Free Software Foundation, Inc., | |
16 | * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA | |
17 | * | |
b4f6209d AB |
18 | * Modifications for inclusion into the Linux staging tree are |
19 | * Copyright(c) 2010 Larry Finger. All rights reserved. | |
20 | * | |
21 | * Contact information: | |
22 | * WLAN FAE <wlanfae@realtek.com> | |
23 | * Larry Finger <Larry.Finger@lwfinger.net> | |
0e54f609 AB |
24 | * |
25 | ******************************************************************************/ | |
2865d42c LF |
26 | #ifndef __RTL8712_EDCASETTING_BITDEF_H__ |
27 | #define __RTL8712_EDCASETTING_BITDEF_H__ | |
28 | ||
29 | /*EDCAPARAM*/ | |
30 | #define _TXOPLIMIT_MSK 0xFFFF0000 | |
31 | #define _TXOPLIMIT_SHT 16 | |
32 | #define _ECWIN_MSK 0x0000FF00 | |
33 | #define _ECWIN_SHT 8 | |
34 | #define _AIFS_MSK 0x000000FF | |
35 | #define _AIFS_SHT 0 | |
36 | ||
37 | /*BCNTCFG*/ | |
38 | #define _BCNECW_MSK 0xFF00 | |
39 | #define _BCNECW_SHT 8 | |
40 | #define _BCNIFS_MSK 0x00FF | |
41 | #define _BCNIFS_SHT 0 | |
42 | ||
43 | /*CWRR*/ | |
44 | #define _CWRR_MSK 0x03FF | |
45 | ||
46 | /*ACMAVG*/ | |
47 | #define _AVG_TIME_UP BIT(3) | |
48 | #define _AVGPERIOD_MSK 0x03 | |
49 | ||
50 | /*ACMHWCTRL*/ | |
51 | #define _VOQ_ACM_STATUS BIT(6) | |
52 | #define _VIQ_ACM_STATUS BIT(5) | |
53 | #define _BEQ_ACM_STATUS BIT(4) | |
54 | #define _VOQ_ACM_EN BIT(3) | |
55 | #define _VIQ_ACM_EN BIT(2) | |
56 | #define _BEQ_ACM_EN BIT(1) | |
57 | #define _ACMHWEN BIT(0) | |
58 | ||
59 | /*VO_ADMTIME*/ | |
60 | #define _VO_ACM_RUT BIT(18) | |
61 | #define _VO_ADMTIME_MSK 0x0003FFF | |
62 | ||
63 | /*VI_ADMTIME*/ | |
64 | #define _VI_ACM_RUT BIT(18) | |
65 | #define _VI_ADMTIME_MSK 0x0003FFF | |
66 | ||
67 | /*BE_ADMTIME*/ | |
68 | #define _BE_ACM_RUT BIT(18) | |
69 | #define _BE_ADMTIME_MSK 0x0003FFF | |
70 | ||
71 | /*Retry limit reg*/ | |
72 | #define _SRL_MSK 0xFF00 | |
73 | #define _SRL_SHT 8 | |
74 | #define _LRL_MSK 0x00FF | |
75 | #define _LRL_SHT 0 | |
76 | ||
77 | #endif /* __RTL8712_EDCASETTING_BITDEF_H__*/ |