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staging: sm7xxfb: remove unnecessary blank lines
[deliverable/linux.git] / drivers / staging / sm7xxfb / sm7xxfb.c
CommitLineData
a8e8f89d
SM		 1/*
2 * Silicon Motion SM7XX frame buffer device
3 *
4 * Copyright (C) 2006 Silicon Motion Technology Corp.
5 * Authors: Ge Wang, gewang@siliconmotion.com
6 * Boyod boyod.yang@siliconmotion.com.cn
7 *
8 * Copyright (C) 2009 Lemote, Inc.
9 * Author: Wu Zhangjin, wuzhangjin@gmail.com
10 *
11 * Copyright (C) 2011 Igalia, S.L.
12 * Author: Javier M. Mellid <jmunhoz@igalia.com>
13 *
14 * This file is subject to the terms and conditions of the GNU General Public
15 * License. See the file COPYING in the main directory of this archive for
16 * more details.
17 *
18 * Framebuffer driver for Silicon Motion SM710, SM712, SM721 and SM722 chips
19 */
20
21#include <linux/io.h>
22#include <linux/fb.h>
23#include <linux/pci.h>
24#include <linux/init.h>
25#include <linux/slab.h>
26#include <linux/uaccess.h>
27#include <linux/module.h>
28#include <linux/console.h>
29#include <linux/screen_info.h>
30
31#ifdef CONFIG_PM
32#include <linux/pm.h>
33#endif
34
35#include "sm7xx.h"
36
37/*
38* Private structure
39*/
40struct smtcfb_info {
41 struct pci_dev *pdev;
42 struct fb_info fb;
43 u16 chip_id;
44 u8 chip_rev_id;
45
46 void __iomem *lfb; /* linear frame buffer */
47 void __iomem *dp_regs; /* drawing processor control regs */
48 void __iomem *vp_regs; /* video processor control regs */
49 void __iomem *cp_regs; /* capture processor control regs */
50 void __iomem *mmio; /* memory map IO port */
51
52 u_int width;
53 u_int height;
54 u_int hz;
55
56 u32 colreg[17];
57};
58
59void __iomem *smtc_RegBaseAddress; /* Memory Map IO starting address */
60
61static struct fb_var_screeninfo smtcfb_var = {
62 .xres = 1024,
63 .yres = 600,
64 .xres_virtual = 1024,
65 .yres_virtual = 600,
66 .bits_per_pixel = 16,
67 .red = {16, 8, 0},
68 .green = {8, 8, 0},
69 .blue = {0, 8, 0},
70 .activate = FB_ACTIVATE_NOW,
71 .height = -1,
72 .width = -1,
73 .vmode = FB_VMODE_NONINTERLACED,
74 .nonstd = 0,
75 .accel_flags = FB_ACCELF_TEXT,
76};
77
78static struct fb_fix_screeninfo smtcfb_fix = {
79 .id = "smXXXfb",
80 .type = FB_TYPE_PACKED_PIXELS,
81 .visual = FB_VISUAL_TRUECOLOR,
82 .line_length = 800 * 3,
83 .accel = FB_ACCEL_SMI_LYNX,
84 .type_aux = 0,
85 .xpanstep = 0,
86 .ypanstep = 0,
87 .ywrapstep = 0,
88};
89
90struct vesa_mode {
91 char index[6];
92 u16 lfb_width;
93 u16 lfb_height;
94 u16 lfb_depth;
95};
96
97static struct vesa_mode vesa_mode_table[] = {
98 {"0x301", 640, 480, 8},
99 {"0x303", 800, 600, 8},
100 {"0x305", 1024, 768, 8},
101 {"0x307", 1280, 1024, 8},
102
103 {"0x311", 640, 480, 16},
104 {"0x314", 800, 600, 16},
105 {"0x317", 1024, 768, 16},
106 {"0x31A", 1280, 1024, 16},
107
108 {"0x312", 640, 480, 24},
109 {"0x315", 800, 600, 24},
110 {"0x318", 1024, 768, 24},
111 {"0x31B", 1280, 1024, 24},
112};
113
114struct screen_info smtc_scr_info;
115
116/* process command line options, get vga parameter */
117static int __init sm7xx_vga_setup(char *options)
118{
119 int i;
120
121 if (!options || !*options)
122 return -EINVAL;
123
124 smtc_scr_info.lfb_width = 0;
125 smtc_scr_info.lfb_height = 0;
126 smtc_scr_info.lfb_depth = 0;
127
128 pr_debug("sm7xx_vga_setup = %s\n", options);
129
130 for (i = 0; i < ARRAY_SIZE(vesa_mode_table); i++) {
131 if (strstr(options, vesa_mode_table[i].index)) {
132 smtc_scr_info.lfb_width = vesa_mode_table[i].lfb_width;
133 smtc_scr_info.lfb_height =
134 vesa_mode_table[i].lfb_height;
135 smtc_scr_info.lfb_depth = vesa_mode_table[i].lfb_depth;
136 return 0;
137 }
138 }
139
140 return -1;
141}
142__setup("vga=", sm7xx_vga_setup);
143
144static void sm712_setpalette(int regno, unsigned red, unsigned green,
145 unsigned blue, struct fb_info *info)
146{
147 /* set bit 5:4 = 01 (write LCD RAM only) */
148 smtc_seqw(0x66, (smtc_seqr(0x66) & 0xC3) | 0x10);
149
150 smtc_mmiowb(regno, dac_reg);
151 smtc_mmiowb(red >> 10, dac_val);
152 smtc_mmiowb(green >> 10, dac_val);
153 smtc_mmiowb(blue >> 10, dac_val);
154}
155
156/* chan_to_field
157 *
158 * convert a colour value into a field position
159 *
160 * from pxafb.c
161 */
162
163static inline unsigned int chan_to_field(unsigned int chan,
164 struct fb_bitfield *bf)
165{
166 chan &= 0xffff;
167 chan >>= 16 - bf->length;
168 return chan << bf->offset;
169}
170
171static int smtc_blank(int blank_mode, struct fb_info *info)
172{
173 /* clear DPMS setting */
174 switch (blank_mode) {
175 case FB_BLANK_UNBLANK:
176 /* Screen On: HSync: On, VSync : On */
177 smtc_seqw(0x01, (smtc_seqr(0x01) & (~0x20)));
178 smtc_seqw(0x6a, 0x16);
179 smtc_seqw(0x6b, 0x02);
180 smtc_seqw(0x21, (smtc_seqr(0x21) & 0x77));
181 smtc_seqw(0x22, (smtc_seqr(0x22) & (~0x30)));
182 smtc_seqw(0x23, (smtc_seqr(0x23) & (~0xc0)));
183 smtc_seqw(0x24, (smtc_seqr(0x24) | 0x01));
184 smtc_seqw(0x31, (smtc_seqr(0x31) | 0x03));
185 break;
186 case FB_BLANK_NORMAL:
187 /* Screen Off: HSync: On, VSync : On Soft blank */
188 smtc_seqw(0x01, (smtc_seqr(0x01) & (~0x20)));
189 smtc_seqw(0x6a, 0x16);
190 smtc_seqw(0x6b, 0x02);
191 smtc_seqw(0x22, (smtc_seqr(0x22) & (~0x30)));
192 smtc_seqw(0x23, (smtc_seqr(0x23) & (~0xc0)));
193 smtc_seqw(0x24, (smtc_seqr(0x24) | 0x01));
194 smtc_seqw(0x31, ((smtc_seqr(0x31) & (~0x07)) | 0x00));
195 break;
196 case FB_BLANK_VSYNC_SUSPEND:
197 /* Screen On: HSync: On, VSync : Off */
198 smtc_seqw(0x01, (smtc_seqr(0x01) | 0x20));
199 smtc_seqw(0x20, (smtc_seqr(0x20) & (~0xB0)));
200 smtc_seqw(0x6a, 0x0c);
201 smtc_seqw(0x6b, 0x02);
202 smtc_seqw(0x21, (smtc_seqr(0x21) | 0x88));
203 smtc_seqw(0x22, ((smtc_seqr(0x22) & (~0x30)) | 0x20));
204 smtc_seqw(0x23, ((smtc_seqr(0x23) & (~0xc0)) | 0x20));
205 smtc_seqw(0x24, (smtc_seqr(0x24) & (~0x01)));
206 smtc_seqw(0x31, ((smtc_seqr(0x31) & (~0x07)) | 0x00));
207 smtc_seqw(0x34, (smtc_seqr(0x34) | 0x80));
208 break;
209 case FB_BLANK_HSYNC_SUSPEND:
210 /* Screen On: HSync: Off, VSync : On */
211 smtc_seqw(0x01, (smtc_seqr(0x01) | 0x20));
212 smtc_seqw(0x20, (smtc_seqr(0x20) & (~0xB0)));
213 smtc_seqw(0x6a, 0x0c);
214 smtc_seqw(0x6b, 0x02);
215 smtc_seqw(0x21, (smtc_seqr(0x21) | 0x88));
216 smtc_seqw(0x22, ((smtc_seqr(0x22) & (~0x30)) | 0x10));
217 smtc_seqw(0x23, ((smtc_seqr(0x23) & (~0xc0)) | 0xD8));
218 smtc_seqw(0x24, (smtc_seqr(0x24) & (~0x01)));
219 smtc_seqw(0x31, ((smtc_seqr(0x31) & (~0x07)) | 0x00));
220 smtc_seqw(0x34, (smtc_seqr(0x34) | 0x80));
221 break;
222 case FB_BLANK_POWERDOWN:
223 /* Screen On: HSync: Off, VSync : Off */
224 smtc_seqw(0x01, (smtc_seqr(0x01) | 0x20));
225 smtc_seqw(0x20, (smtc_seqr(0x20) & (~0xB0)));
226 smtc_seqw(0x6a, 0x0c);
227 smtc_seqw(0x6b, 0x02);
228 smtc_seqw(0x21, (smtc_seqr(0x21) | 0x88));
229 smtc_seqw(0x22, ((smtc_seqr(0x22) & (~0x30)) | 0x30));
230 smtc_seqw(0x23, ((smtc_seqr(0x23) & (~0xc0)) | 0xD8));
231 smtc_seqw(0x24, (smtc_seqr(0x24) & (~0x01)));
232 smtc_seqw(0x31, ((smtc_seqr(0x31) & (~0x07)) | 0x00));
233 smtc_seqw(0x34, (smtc_seqr(0x34) | 0x80));
234 break;
235 default:
236 return -EINVAL;
237 }
238
239 return 0;
240}
241
242static int smtc_setcolreg(unsigned regno, unsigned red, unsigned green,
243 unsigned blue, unsigned trans, struct fb_info *info)
244{
245 struct smtcfb_info *sfb;
246 u32 val;
247
248 sfb = info->par;
249
250 if (regno > 255)
251 return 1;
252
253 switch (sfb->fb.fix.visual) {
254 case FB_VISUAL_DIRECTCOLOR:
255 case FB_VISUAL_TRUECOLOR:
256 /*
257 * 16/32 bit true-colour, use pseudo-palette for 16 base color
258 */
259 if (regno < 16) {
260 if (sfb->fb.var.bits_per_pixel == 16) {
261 u32 *pal = sfb->fb.pseudo_palette;
a1f6da67 262
a8e8f89d
SM		 263 val = chan_to_field(red, &sfb->fb.var.red);
264 val |= chan_to_field(green, &sfb->fb.var.green);
265 val |= chan_to_field(blue, &sfb->fb.var.blue);
266#ifdef __BIG_ENDIAN
267 pal[regno] =
268 ((red & 0xf800) >> 8) |
269 ((green & 0xe000) >> 13) |
270 ((green & 0x1c00) << 3) |
271 ((blue & 0xf800) >> 3);
272#else
273 pal[regno] = val;
274#endif
275 } else {
276 u32 *pal = sfb->fb.pseudo_palette;
a1f6da67 277
a8e8f89d
SM		 278 val = chan_to_field(red, &sfb->fb.var.red);
279 val |= chan_to_field(green, &sfb->fb.var.green);
280 val |= chan_to_field(blue, &sfb->fb.var.blue);
281#ifdef __BIG_ENDIAN
282 val =
283 (val & 0xff00ff00 >> 8) |
284 (val & 0x00ff00ff << 8);
285#endif
286 pal[regno] = val;
287 }
288 }
289 break;
290
291 case FB_VISUAL_PSEUDOCOLOR:
292 /* color depth 8 bit */
293 sm712_setpalette(regno, red, green, blue, info);
294 break;
295
296 default:
297 return 1; /* unknown type */
298 }
299
300 return 0;
a8e8f89d
SM		 301}
302
303#ifdef __BIG_ENDIAN
304static ssize_t smtcfb_read(struct fb_info *info, char __user *buf, size_t
305 count, loff_t *ppos)
306{
307 unsigned long p = *ppos;
308
309 u32 *buffer, *dst;
310 u32 __iomem *src;
311 int c, i, cnt = 0, err = 0;
312 unsigned long total_size;
313
314 if (!info || !info->screen_base)
315 return -ENODEV;
316
317 if (info->state != FBINFO_STATE_RUNNING)
318 return -EPERM;
319
320 total_size = info->screen_size;
321
322 if (total_size == 0)
323 total_size = info->fix.smem_len;
324
325 if (p >= total_size)
326 return 0;
327
328 if (count >= total_size)
329 count = total_size;
330
331 if (count + p > total_size)
332 count = total_size - p;
333
334 buffer = kmalloc((count > PAGE_SIZE) ? PAGE_SIZE : count, GFP_KERNEL);
335 if (!buffer)
336 return -ENOMEM;
337
338 src = (u32 __iomem *) (info->screen_base + p);
339
340 if (info->fbops->fb_sync)
341 info->fbops->fb_sync(info);
342
343 while (count) {
344 c = (count > PAGE_SIZE) ? PAGE_SIZE : count;
345 dst = buffer;
346 for (i = c >> 2; i--;) {
347 *dst = fb_readl(src++);
348 *dst =
349 (*dst & 0xff00ff00 >> 8) |
350 (*dst & 0x00ff00ff << 8);
351 dst++;
352 }
353 if (c & 3) {
53f54a48
SM		 354 u8 *dst8 = (u8 *)dst;
355 u8 __iomem *src8 = (u8 __iomem *)src;
a8e8f89d
SM		 356
357 for (i = c & 3; i--;) {
358 if (i & 1) {
359 *dst8++ = fb_readb(++src8);
360 } else {
361 *dst8++ = fb_readb(--src8);
362 src8 += 2;
363 }
364 }
53f54a48 365 src = (u32 __iomem *)src8;
a8e8f89d
SM		 366 }
367
368 if (copy_to_user(buf, buffer, c)) {
369 err = -EFAULT;
370 break;
371 }
372 *ppos += c;
373 buf += c;
374 cnt += c;
375 count -= c;
376 }
377
378 kfree(buffer);
379
380 return (err) ? err : cnt;
381}
382
383static ssize_t
384smtcfb_write(struct fb_info *info, const char __user *buf, size_t count,
385 loff_t *ppos)
386{
387 unsigned long p = *ppos;
388
389 u32 *buffer, *src;
390 u32 __iomem *dst;
391 int c, i, cnt = 0, err = 0;
392 unsigned long total_size;
393
394 if (!info || !info->screen_base)
395 return -ENODEV;
396
397 if (info->state != FBINFO_STATE_RUNNING)
398 return -EPERM;
399
400 total_size = info->screen_size;
401
402 if (total_size == 0)
403 total_size = info->fix.smem_len;
404
405 if (p > total_size)
406 return -EFBIG;
407
408 if (count > total_size) {
409 err = -EFBIG;
410 count = total_size;
411 }
412
413 if (count + p > total_size) {
414 if (!err)
415 err = -ENOSPC;
416
417 count = total_size - p;
418 }
419
420 buffer = kmalloc((count > PAGE_SIZE) ? PAGE_SIZE : count, GFP_KERNEL);
421 if (!buffer)
422 return -ENOMEM;
423
424 dst = (u32 __iomem *) (info->screen_base + p);
425
426 if (info->fbops->fb_sync)
427 info->fbops->fb_sync(info);
428
429 while (count) {
430 c = (count > PAGE_SIZE) ? PAGE_SIZE : count;
431 src = buffer;
432
433 if (copy_from_user(src, buf, c)) {
434 err = -EFAULT;
435 break;
436 }
437
438 for (i = c >> 2; i--;) {
439 fb_writel((*src & 0xff00ff00 >> 8) |
440 (*src & 0x00ff00ff << 8), dst++);
441 src++;
442 }
443 if (c & 3) {
53f54a48
SM		 444 u8 *src8 = (u8 *)src;
445 u8 __iomem *dst8 = (u8 __iomem *)dst;
a8e8f89d
SM		 446
447 for (i = c & 3; i--;) {
448 if (i & 1) {
449 fb_writeb(*src8++, ++dst8);
450 } else {
451 fb_writeb(*src8++, --dst8);
452 dst8 += 2;
453 }
454 }
53f54a48 455 dst = (u32 __iomem *)dst8;
a8e8f89d
SM		 456 }
457
458 *ppos += c;
459 buf += c;
460 cnt += c;
461 count -= c;
462 }
463
464 kfree(buffer);
465
466 return (cnt) ? cnt : err;
467}
468#endif /* ! __BIG_ENDIAN */
469
470static void sm7xx_set_timing(struct smtcfb_info *sfb)
471{
472 int i = 0, j = 0;
473 u32 m_nScreenStride;
474
475 dev_dbg(&sfb->pdev->dev,
476 "sfb->width=%d sfb->height=%d sfb->fb.var.bits_per_pixel=%d sfb->hz=%d\n",
477 sfb->width, sfb->height, sfb->fb.var.bits_per_pixel, sfb->hz);
478
479 for (j = 0; j < numVGAModes; j++) {
480 if (VGAMode[j].mmSizeX == sfb->width &&
481 VGAMode[j].mmSizeY == sfb->height &&
482 VGAMode[j].bpp == sfb->fb.var.bits_per_pixel &&
483 VGAMode[j].hz == sfb->hz) {
a8e8f89d
SM		 484 dev_dbg(&sfb->pdev->dev,
485 "VGAMode[j].mmSizeX=%d VGAMode[j].mmSizeY=%d VGAMode[j].bpp=%d VGAMode[j].hz=%d\n",
486 VGAMode[j].mmSizeX, VGAMode[j].mmSizeY,
487 VGAMode[j].bpp, VGAMode[j].hz);
488
489 dev_dbg(&sfb->pdev->dev, "VGAMode index=%d\n", j);
490
491 smtc_mmiowb(0x0, 0x3c6);
492
493 smtc_seqw(0, 0x1);
494
495 smtc_mmiowb(VGAMode[j].Init_MISC, 0x3c2);
496
497 /* init SEQ register SR00 - SR04 */
498 for (i = 0; i < SIZE_SR00_SR04; i++)
499 smtc_seqw(i, VGAMode[j].Init_SR00_SR04[i]);
500
501 /* init SEQ register SR10 - SR24 */
502 for (i = 0; i < SIZE_SR10_SR24; i++)
503 smtc_seqw(i + 0x10,
504 VGAMode[j].Init_SR10_SR24[i]);
505
506 /* init SEQ register SR30 - SR75 */
507 for (i = 0; i < SIZE_SR30_SR75; i++)
508 if ((i + 0x30) != 0x62 &&
509 (i + 0x30) != 0x6a &&
510 (i + 0x30) != 0x6b)
511 smtc_seqw(i + 0x30,
512 VGAMode[j].Init_SR30_SR75[i]);
513
514 /* init SEQ register SR80 - SR93 */
515 for (i = 0; i < SIZE_SR80_SR93; i++)
516 smtc_seqw(i + 0x80,
517 VGAMode[j].Init_SR80_SR93[i]);
518
519 /* init SEQ register SRA0 - SRAF */
520 for (i = 0; i < SIZE_SRA0_SRAF; i++)
521 smtc_seqw(i + 0xa0,
522 VGAMode[j].Init_SRA0_SRAF[i]);
523
524 /* init Graphic register GR00 - GR08 */
525 for (i = 0; i < SIZE_GR00_GR08; i++)
526 smtc_grphw(i, VGAMode[j].Init_GR00_GR08[i]);
527
528 /* init Attribute register AR00 - AR14 */
529 for (i = 0; i < SIZE_AR00_AR14; i++)
530 smtc_attrw(i, VGAMode[j].Init_AR00_AR14[i]);
531
532 /* init CRTC register CR00 - CR18 */
533 for (i = 0; i < SIZE_CR00_CR18; i++)
534 smtc_crtcw(i, VGAMode[j].Init_CR00_CR18[i]);
535
536 /* init CRTC register CR30 - CR4D */
537 for (i = 0; i < SIZE_CR30_CR4D; i++)
538 smtc_crtcw(i + 0x30,
539 VGAMode[j].Init_CR30_CR4D[i]);
540
541 /* init CRTC register CR90 - CRA7 */
542 for (i = 0; i < SIZE_CR90_CRA7; i++)
543 smtc_crtcw(i + 0x90,
544 VGAMode[j].Init_CR90_CRA7[i]);
545 }
546 }
547 smtc_mmiowb(0x67, 0x3c2);
548
549 /* set VPR registers */
550 writel(0x0, sfb->vp_regs + 0x0C);
551 writel(0x0, sfb->vp_regs + 0x40);
552
553 /* set data width */
554 m_nScreenStride =
555 (sfb->width * sfb->fb.var.bits_per_pixel) / 64;
556 switch (sfb->fb.var.bits_per_pixel) {
557 case 8:
558 writel(0x0, sfb->vp_regs + 0x0);
559 break;
560 case 16:
561 writel(0x00020000, sfb->vp_regs + 0x0);
562 break;
563 case 24:
564 writel(0x00040000, sfb->vp_regs + 0x0);
565 break;
566 case 32:
567 writel(0x00030000, sfb->vp_regs + 0x0);
568 break;
569 }
570 writel((u32) (((m_nScreenStride + 2) << 16) | m_nScreenStride),
571 sfb->vp_regs + 0x10);
a8e8f89d
SM		 572}
573
574static void smtc_set_timing(struct smtcfb_info *sfb)
575{
576 switch (sfb->chip_id) {
577 case 0x710:
578 case 0x712:
579 case 0x720:
580 sm7xx_set_timing(sfb);
581 break;
582 }
583}
584
585static void smtcfb_setmode(struct smtcfb_info *sfb)
586{
587 switch (sfb->fb.var.bits_per_pixel) {
588 case 32:
589 sfb->fb.fix.visual = FB_VISUAL_TRUECOLOR;
590 sfb->fb.fix.line_length = sfb->fb.var.xres * 4;
591 sfb->fb.var.red.length = 8;
592 sfb->fb.var.green.length = 8;
593 sfb->fb.var.blue.length = 8;
594 sfb->fb.var.red.offset = 16;
595 sfb->fb.var.green.offset = 8;
596 sfb->fb.var.blue.offset = 0;
597 break;
598 case 24:
599 sfb->fb.fix.visual = FB_VISUAL_TRUECOLOR;
600 sfb->fb.fix.line_length = sfb->fb.var.xres * 3;
601 sfb->fb.var.red.length = 8;
602 sfb->fb.var.green.length = 8;
603 sfb->fb.var.blue.length = 8;
604 sfb->fb.var.red.offset = 16;
605 sfb->fb.var.green.offset = 8;
606 sfb->fb.var.blue.offset = 0;
607 break;
608 case 8:
609 sfb->fb.fix.visual = FB_VISUAL_PSEUDOCOLOR;
610 sfb->fb.fix.line_length = sfb->fb.var.xres;
611 sfb->fb.var.red.length = 3;
612 sfb->fb.var.green.length = 3;
613 sfb->fb.var.blue.length = 2;
614 sfb->fb.var.red.offset = 5;
615 sfb->fb.var.green.offset = 2;
616 sfb->fb.var.blue.offset = 0;
617 break;
618 case 16:
619 default:
620 sfb->fb.fix.visual = FB_VISUAL_TRUECOLOR;
621 sfb->fb.fix.line_length = sfb->fb.var.xres * 2;
622 sfb->fb.var.red.length = 5;
623 sfb->fb.var.green.length = 6;
624 sfb->fb.var.blue.length = 5;
625 sfb->fb.var.red.offset = 11;
626 sfb->fb.var.green.offset = 5;
627 sfb->fb.var.blue.offset = 0;
628 break;
629 }
630
631 sfb->width = sfb->fb.var.xres;
632 sfb->height = sfb->fb.var.yres;
633 sfb->hz = 60;
634 smtc_set_timing(sfb);
635}
636
637static int smtc_check_var(struct fb_var_screeninfo *var, struct fb_info *info)
638{
639 /* sanity checks */
640 if (var->xres_virtual < var->xres)
641 var->xres_virtual = var->xres;
642
643 if (var->yres_virtual < var->yres)
644 var->yres_virtual = var->yres;
645
646 /* set valid default bpp */
647 if ((var->bits_per_pixel != 8) && (var->bits_per_pixel != 16) &&
648 (var->bits_per_pixel != 24) && (var->bits_per_pixel != 32))
649 var->bits_per_pixel = 16;
650
651 return 0;
652}
653
654static int smtc_set_par(struct fb_info *info)
655{
656 smtcfb_setmode(info->par);
657
658 return 0;
659}
660
661static struct fb_ops smtcfb_ops = {
662 .owner = THIS_MODULE,
663 .fb_check_var = smtc_check_var,
664 .fb_set_par = smtc_set_par,
665 .fb_setcolreg = smtc_setcolreg,
666 .fb_blank = smtc_blank,
667 .fb_fillrect = cfb_fillrect,
668 .fb_imageblit = cfb_imageblit,
669 .fb_copyarea = cfb_copyarea,
670#ifdef __BIG_ENDIAN
671 .fb_read = smtcfb_read,
672 .fb_write = smtcfb_write,
673#endif
674};
675
676/*
677 * alloc struct smtcfb_info and assign default values
678 */
679static struct smtcfb_info *smtc_alloc_fb_info(struct pci_dev *pdev)
680{
681 struct smtcfb_info *sfb;
682
683 sfb = kzalloc(sizeof(*sfb), GFP_KERNEL);
684
685 if (!sfb)
686 return NULL;
687
688 sfb->pdev = pdev;
689
690 sfb->fb.flags = FBINFO_FLAG_DEFAULT;
691 sfb->fb.fbops = &smtcfb_ops;
692 sfb->fb.fix = smtcfb_fix;
693 sfb->fb.var = smtcfb_var;
694 sfb->fb.pseudo_palette = sfb->colreg;
695 sfb->fb.par = sfb;
696
697 return sfb;
698}
699
700/*
701 * free struct smtcfb_info
702 */
703static void smtc_free_fb_info(struct smtcfb_info *sfb)
704{
705 kfree(sfb);
706}
707
708/*
709 * Unmap in the memory mapped IO registers
710 */
711
712static void smtc_unmap_mmio(struct smtcfb_info *sfb)
713{
714 if (sfb && smtc_RegBaseAddress)
715 smtc_RegBaseAddress = NULL;
716}
717
718/*
719 * Map in the screen memory
720 */
721
722static int smtc_map_smem(struct smtcfb_info *sfb,
723 struct pci_dev *pdev, u_long smem_len)
724{
a8e8f89d
SM		 725 sfb->fb.fix.smem_start = pci_resource_start(pdev, 0);
726
727#ifdef __BIG_ENDIAN
728 if (sfb->fb.var.bits_per_pixel == 32)
729 sfb->fb.fix.smem_start += 0x800000;
730#endif
731
732 sfb->fb.fix.smem_len = smem_len;
733
734 sfb->fb.screen_base = sfb->lfb;
735
736 if (!sfb->fb.screen_base) {
737 dev_err(&pdev->dev,
738 "%s: unable to map screen memory\n", sfb->fb.fix.id);
739 return -ENOMEM;
740 }
741
742 return 0;
743}
744
745/*
746 * Unmap in the screen memory
747 *
748 */
749static void smtc_unmap_smem(struct smtcfb_info *sfb)
750{
751 if (sfb && sfb->fb.screen_base) {
752 iounmap(sfb->fb.screen_base);
753 sfb->fb.screen_base = NULL;
754 }
755}
756
757/*
758 * We need to wake up the device and make sure its in linear memory mode.
759 */
760static inline void sm7xx_init_hw(void)
761{
762 outb_p(0x18, 0x3c4);
763 outb_p(0x11, 0x3c5);
764}
765
766static int smtcfb_pci_probe(struct pci_dev *pdev,
767 const struct pci_device_id *ent)
768{
769 struct smtcfb_info *sfb;
770 u_long smem_size = 0x00800000; /* default 8MB */
771 int err;
772 unsigned long mmio_base;
773
774 dev_info(&pdev->dev, "Silicon Motion display driver.");
775
776 err = pci_enable_device(pdev); /* enable SMTC chip */
777 if (err)
778 return err;
779
780 sprintf(smtcfb_fix.id, "sm%Xfb", ent->device);
781
782 sfb = smtc_alloc_fb_info(pdev);
783
784 if (!sfb) {
785 err = -ENOMEM;
786 goto failed_free;
787 }
788
789 sfb->chip_id = ent->device;
790
791 pci_set_drvdata(pdev, sfb);
792
793 sm7xx_init_hw();
794
795 /* get mode parameter from smtc_scr_info */
796 if (smtc_scr_info.lfb_width != 0) {
797 sfb->fb.var.xres = smtc_scr_info.lfb_width;
798 sfb->fb.var.yres = smtc_scr_info.lfb_height;
799 sfb->fb.var.bits_per_pixel = smtc_scr_info.lfb_depth;
800 } else {
801 /* default resolution 1024x600 16bit mode */
802 sfb->fb.var.xres = SCREEN_X_RES;
803 sfb->fb.var.yres = SCREEN_Y_RES;
804 sfb->fb.var.bits_per_pixel = SCREEN_BPP;
805 }
806
807#ifdef __BIG_ENDIAN
808 if (sfb->fb.var.bits_per_pixel == 24)
809 sfb->fb.var.bits_per_pixel = (smtc_scr_info.lfb_depth = 32);
810#endif
811 /* Map address and memory detection */
812 mmio_base = pci_resource_start(pdev, 0);
813 pci_read_config_byte(pdev, PCI_REVISION_ID, &sfb->chip_rev_id);
814
815 switch (sfb->chip_id) {
816 case 0x710:
817 case 0x712:
818 sfb->fb.fix.mmio_start = mmio_base + 0x00400000;
819 sfb->fb.fix.mmio_len = 0x00400000;
820 smem_size = SM712_VIDEOMEMORYSIZE;
821#ifdef __BIG_ENDIAN
822 sfb->lfb = ioremap(mmio_base, 0x00c00000);
823#else
824 sfb->lfb = ioremap(mmio_base, 0x00800000);
825#endif
826 sfb->mmio = (smtc_RegBaseAddress =
827 sfb->lfb + 0x00700000);
828 sfb->dp_regs = sfb->lfb + 0x00408000;
829 sfb->vp_regs = sfb->lfb + 0x0040c000;
830#ifdef __BIG_ENDIAN
831 if (sfb->fb.var.bits_per_pixel == 32) {
832 sfb->lfb += 0x800000;
833 dev_info(&pdev->dev, "sfb->lfb=%p", sfb->lfb);
834 }
835#endif
836 if (!smtc_RegBaseAddress) {
837 dev_err(&pdev->dev,
838 "%s: unable to map memory mapped IO!",
839 sfb->fb.fix.id);
840 err = -ENOMEM;
841 goto failed_fb;
842 }
843
844 /* set MCLK = 14.31818 * (0x16 / 0x2) */
845 smtc_seqw(0x6a, 0x16);
846 smtc_seqw(0x6b, 0x02);
847 smtc_seqw(0x62, 0x3e);
848 /* enable PCI burst */
849 smtc_seqw(0x17, 0x20);
850 /* enable word swap */
851#ifdef __BIG_ENDIAN
852 if (sfb->fb.var.bits_per_pixel == 32)
853 smtc_seqw(0x17, 0x30);
854#endif
855 break;
856 case 0x720:
857 sfb->fb.fix.mmio_start = mmio_base;
858 sfb->fb.fix.mmio_len = 0x00200000;
859 smem_size = SM722_VIDEOMEMORYSIZE;
860 sfb->dp_regs = ioremap(mmio_base, 0x00a00000);
861 sfb->lfb = sfb->dp_regs + 0x00200000;
862 sfb->mmio = (smtc_RegBaseAddress =
863 sfb->dp_regs + 0x000c0000);
864 sfb->vp_regs = sfb->dp_regs + 0x800;
865
866 smtc_seqw(0x62, 0xff);
867 smtc_seqw(0x6a, 0x0d);
868 smtc_seqw(0x6b, 0x02);
869 break;
870 default:
871 dev_err(&pdev->dev,
872 "No valid Silicon Motion display chip was detected!");
873
874 goto failed_fb;
875 }
876
877 /* can support 32 bpp */
878 if (15 == sfb->fb.var.bits_per_pixel)
879 sfb->fb.var.bits_per_pixel = 16;
880
881 sfb->fb.var.xres_virtual = sfb->fb.var.xres;
882 sfb->fb.var.yres_virtual = sfb->fb.var.yres;
883 err = smtc_map_smem(sfb, pdev, smem_size);
884 if (err)
885 goto failed;
886
887 smtcfb_setmode(sfb);
888
889 err = register_framebuffer(&sfb->fb);
890 if (err < 0)
891 goto failed;
892
893 dev_info(&pdev->dev,
894 "Silicon Motion SM%X Rev%X primary display mode %dx%d-%d Init Complete.",
895 sfb->chip_id, sfb->chip_rev_id, sfb->fb.var.xres,
896 sfb->fb.var.yres, sfb->fb.var.bits_per_pixel);
897
898 return 0;
899
900failed:
901 dev_err(&pdev->dev, "Silicon Motion, Inc. primary display init fail.");
902
903 smtc_unmap_smem(sfb);
904 smtc_unmap_mmio(sfb);
905failed_fb:
906 smtc_free_fb_info(sfb);
907
908failed_free:
909 pci_disable_device(pdev);
910
911 return err;
912}
913
914/*
915 * 0x710 (LynxEM)
916 * 0x712 (LynxEM+)
917 * 0x720 (Lynx3DM, Lynx3DM+)
918 */
919static const struct pci_device_id smtcfb_pci_table[] = {
920 { PCI_DEVICE(0x126f, 0x710), },
921 { PCI_DEVICE(0x126f, 0x712), },
922 { PCI_DEVICE(0x126f, 0x720), },
923 {0,}
924};
925
926static void smtcfb_pci_remove(struct pci_dev *pdev)
927{
928 struct smtcfb_info *sfb;
929
930 sfb = pci_get_drvdata(pdev);
931 smtc_unmap_smem(sfb);
932 smtc_unmap_mmio(sfb);
933 unregister_framebuffer(&sfb->fb);
934 smtc_free_fb_info(sfb);
935}
936
937#ifdef CONFIG_PM
938static int smtcfb_pci_suspend(struct device *device)
939{
940 struct pci_dev *pdev = to_pci_dev(device);
941 struct smtcfb_info *sfb;
942
943 sfb = pci_get_drvdata(pdev);
944
945 /* set the hw in sleep mode use external clock and self memory refresh
946 * so that we can turn off internal PLLs later on
947 */
948 smtc_seqw(0x20, (smtc_seqr(0x20) | 0xc0));
949 smtc_seqw(0x69, (smtc_seqr(0x69) & 0xf7));
950
951 console_lock();
952 fb_set_suspend(&sfb->fb, 1);
953 console_unlock();
954
955 /* additionally turn off all function blocks including internal PLLs */
956 smtc_seqw(0x21, 0xff);
957
958 return 0;
959}
960
961static int smtcfb_pci_resume(struct device *device)
962{
963 struct pci_dev *pdev = to_pci_dev(device);
964 struct smtcfb_info *sfb;
965
966 sfb = pci_get_drvdata(pdev);
967
968 /* reinit hardware */
969 sm7xx_init_hw();
970 switch (sfb->chip_id) {
971 case 0x710:
972 case 0x712:
973 /* set MCLK = 14.31818 * (0x16 / 0x2) */
974 smtc_seqw(0x6a, 0x16);
975 smtc_seqw(0x6b, 0x02);
976 smtc_seqw(0x62, 0x3e);
977 /* enable PCI burst */
978 smtc_seqw(0x17, 0x20);
979#ifdef __BIG_ENDIAN
980 if (sfb->fb.var.bits_per_pixel == 32)
981 smtc_seqw(0x17, 0x30);
982#endif
983 break;
984 case 0x720:
985 smtc_seqw(0x62, 0xff);
986 smtc_seqw(0x6a, 0x0d);
987 smtc_seqw(0x6b, 0x02);
988 break;
989 }
990
991 smtc_seqw(0x34, (smtc_seqr(0x34) | 0xc0));
992 smtc_seqw(0x33, ((smtc_seqr(0x33) | 0x08) & 0xfb));
993
994 smtcfb_setmode(sfb);
995
996 console_lock();
997 fb_set_suspend(&sfb->fb, 0);
998 console_unlock();
999
1000 return 0;
1001}
1002
1003static SIMPLE_DEV_PM_OPS(sm7xx_pm_ops, smtcfb_pci_suspend, smtcfb_pci_resume);
1004#define SM7XX_PM_OPS (&sm7xx_pm_ops)
1005
1006#else /* !CONFIG_PM */
1007
1008#define SM7XX_PM_OPS NULL
1009
1010#endif /* !CONFIG_PM */
1011
1012static struct pci_driver smtcfb_driver = {
1013 .name = "smtcfb",
1014 .id_table = smtcfb_pci_table,
1015 .probe = smtcfb_pci_probe,
1016 .remove = smtcfb_pci_remove,
1017 .driver.pm = SM7XX_PM_OPS,
1018};
1019
1020module_pci_driver(smtcfb_driver);
1021
1022MODULE_AUTHOR("Siliconmotion ");
1023MODULE_DESCRIPTION("Framebuffer driver for SMI Graphic Cards");
1024MODULE_LICENSE("GPL");
Linux kernel - Deliverables
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