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Staging: vt6655: remove dependency on WIRELESS_EXT version
[deliverable/linux.git] / drivers / staging / vt6655 / device.h
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5449c685
FB		 1/*
2 * Copyright (c) 1996, 2003 VIA Networking Technologies, Inc.
3 * All rights reserved.
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License along
16 * with this program; if not, write to the Free Software Foundation, Inc.,
17 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 * File: device.h
20 *
21 * Purpose: MAC Data structure
22 *
23 * Author: Tevin Chen
24 *
25 * Date: Mar 17, 1997
26 *
27 */
28
29#ifndef __DEVICE_H__
30#define __DEVICE_H__
31
32#ifdef MODULE
33#ifdef MODVERSIONS
34#include <linux/modversions.h>
35#endif /* MODVERSIONS */
36#include <linux/module.h>
37#endif /* MODULE */
38
39#include <linux/types.h>
40#include <linux/init.h>
41#include <linux/mm.h>
42#include <linux/errno.h>
43#include <linux/ioport.h>
44#include <linux/pci.h>
45#include <linux/kernel.h>
46#include <linux/netdevice.h>
47#include <linux/etherdevice.h>
48#include <linux/skbuff.h>
49#include <linux/delay.h>
50#include <linux/timer.h>
51#include <linux/slab.h>
52#include <linux/interrupt.h>
53#include <linux/version.h>
54#include <linux/string.h>
55#include <linux/wait.h>
56#include <linux/if_arp.h>
57#include <linux/sched.h>
58#include <asm/io.h>
59#include <linux/if.h>
60//#include <linux/config.h>
61#include <asm/uaccess.h>
62#include <linux/proc_fs.h>
63#include <linux/inetdevice.h>
64#include <linux/reboot.h>
65#ifdef SIOCETHTOOL
66#define DEVICE_ETHTOOL_IOCTL_SUPPORT
67#include <linux/ethtool.h>
68#else
69#undef DEVICE_ETHTOOL_IOCTL_SUPPORT
70#endif
71/* Include Wireless Extension definition and check version - Jean II */
72#include <linux/wireless.h>
5449c685 73#include <net/iw_handler.h> // New driver API
5449c685
FB		 74
75//2008-0409-07, <Add> by Einsn Liu
5449c685
FB		 76#ifndef WPA_SUPPLICANT_DRIVER_WEXT_SUPPORT
77#define WPA_SUPPLICANT_DRIVER_WEXT_SUPPORT
78#endif
5449c685
FB		 79//2008-4-14<add> by chester for led issue
80//#define FOR_LED_ON_NOTEBOOK
81//
82
83
84
85// device specific
86//
87#if !defined(_KCOMPAT_H)
88#include "kcompat.h"
89#endif
90
91#if !defined(__DEVICE_CONFIG_H)
92#include "device_cfg.h"
93#endif
94
95#if !defined(__TTYPE_H__)
96#include "ttype.h"
97#endif
98#if !defined(__80211HDR_H__)
99#include "80211hdr.h"
100#endif
101#if !defined(__TETHER_H__)
102#include "tether.h"
103#endif
104#if !defined(__WMGR_H__)
105#include "wmgr.h"
106#endif
107#if !defined(__WCMD_H__)
108#include "wcmd.h"
109#endif
110#if !defined(__MIB_H__)
111#include "mib.h"
112#endif
113#if !defined(__SROM_H__)
114#include "srom.h"
115#endif
116#if !defined(__RC4_H__)
117#include "rc4.h"
118#endif
119#if !defined(__TPCI_H__)
120#include "tpci.h"
121#endif
122#if !defined(__DESC_H__)
123#include "desc.h"
124#endif
125
126#if !defined(__KEY_H__)
127#include "key.h"
128#endif
129
130#if !defined(__MAC_H__)
131#include "mac.h"
132#endif
133
134//PLICE_DEBUG->
135//#define THREAD
136
137//#define TASK_LET
138//PLICE_DEBUG<-
139
140// #ifdef PRIVATE_OBJ
141//#if !defined(__DEVICE_MODULE_H)
142//#include "device_module.h"
143//#endif
144
145
146/*--------------------- Export Definitions -------------------------*/
147
148#define MAC_MAX_CONTEXT_REG (256+128)
149
150#define MAX_MULTICAST_ADDRESS_NUM 32
151#define MULTICAST_ADDRESS_LIST_SIZE (MAX_MULTICAST_ADDRESS_NUM * U_ETHER_ADDR_LEN)
152
153
154//#define OP_MODE_INFRASTRUCTURE 0
155//#define OP_MODE_ADHOC 1
156//#define OP_MODE_AP 2
157
158#define DUPLICATE_RX_CACHE_LENGTH 5
159
160#define NUM_KEY_ENTRY 11
161
162#define TX_WEP_NONE 0
163#define TX_WEP_OTF 1
164#define TX_WEP_SW 2
165#define TX_WEP_SWOTP 3
166#define TX_WEP_OTPSW 4
167#define TX_WEP_SW232 5
168
169#define KEYSEL_WEP40 0
170#define KEYSEL_WEP104 1
171#define KEYSEL_TKIP 2
172#define KEYSEL_CCMP 3
173
174
175
176#define AUTO_FB_NONE 0
177#define AUTO_FB_0 1
178#define AUTO_FB_1 2
179
180#define FB_RATE0 0
181#define FB_RATE1 1
182
183// Antenna Mode
184#define ANT_A 0
185#define ANT_B 1
186#define ANT_DIVERSITY 2
187#define ANT_RXD_TXA 3
188#define ANT_RXD_TXB 4
189#define ANT_UNKNOWN 0xFF
190
191#define MAXCHECKHANGCNT 4
192
193#define BB_VGA_LEVEL 4
194#define BB_VGA_CHANGE_THRESHOLD 16
195
196
197#ifndef RUN_AT
198#define RUN_AT(x) (jiffies+(x))
199#endif
200
201// DMA related
202#define RESERV_AC0DMA 4
203
204
205// BUILD OBJ mode
206#ifdef PRIVATE_OBJ
207
208#undef dev_kfree_skb
209#undef dev_kfree_skb_irq
210#undef dev_alloc_skb
211#undef kfree
212#undef del_timer
213#undef init_timer
214#undef add_timer
215#undef kmalloc
216#undef netif_stop_queue
217#undef netif_start_queue
218#undef netif_wake_queue
219#undef netif_queue_stopped
220#undef netif_rx
221#undef netif_running
222#undef udelay
223#undef mdelay
224#undef eth_type_trans
225#undef skb_put
226#undef HZ
227#undef RUN_AT
228#undef pci_alloc_consistent
229#undef pci_free_consistent
230#undef register_netdevice
231#undef register_netdev
232#undef unregister_netdevice
233#undef unregister_netdev
234#undef skb_queue_head_init
235#undef skb_queue_tail
236#undef skb_queue_empty
237#undef free_irq
238#undef copy_from_user
239#undef copy_to_user
240#undef spin_lock_init
241#undef pci_map_single
242#undef pci_unmap_single
243
244// redefine kernel dependent fucntion
245#define dev_kfree_skb ref_dev_kfree_skb
246#define dev_kfree_skb_irq ref_dev_kfree_skb_irq
247#define dev_alloc_skb ref_dev_alloc_skb
248#define kfree ref_kfree
249#define del_timer ref_del_timer
250#define init_timer ref_init_timer
251#define add_timer ref_add_timer
252#define kmalloc ref_kmalloc
253#define netif_stop_queue ref_netif_stop_queue
254#define netif_start_queue ref_netif_start_queue
255#define netif_wake_queue ref_netif_wake_queue
256#define netif_queue_stopped ref_netif_queue_stopped
257#define netif_rx ref_netif_rx
258#define netif_running ref_netif_running
259#define udelay ref_udelay
260#define mdelay ref_mdelay
261#define get_jiffies() ref_get_jiffies()
262#define RUN_AT(x) (get_jiffies()+(x))
263#define HZ ref_HZ_tick()
264#define eth_type_trans ref_eth_type_trans
265#define skb_put ref_skb_put
266#define skb_queue_head_init ref_skb_queue_head_init
267#define skb_queue_tail ref_skb_queue_tail
268#define skb_queue_empty ref_skb_queue_empty
269
270#define pci_alloc_consistent ref_pci_alloc_consistent
271#define pci_free_consistent ref_pci_free_consistent
272#define register_netdevice ref_register_netdevice
273#define register_netdev ref_register_netdev
274#define unregister_netdevice ref_unregister_netdevice
275#define unregister_netdev ref_unregister_netdev
276
277#define free_irq ref_free_irq
278#define copy_from_user ref_copy_from_user
279#define copy_to_user ref_copy_to_user
280#define spin_lock_init ref_spin_lock_init
281#define pci_map_single ref_pci_map_single
282#define pci_unmap_single ref_pci_unmap_single
283#endif
284
285
286#ifdef PRIVATE_OBJ
287#undef printk
288#define DEVICE_PRT(l, p, args...) {if (l<=msglevel) do {} while (0);}
289//#define DEVICE_PRT(l, p, args...) {if (l<=msglevel) printk( p ,##args);}
290#else
291#define DEVICE_PRT(l, p, args...) {if (l<=msglevel) printk( p ,##args);}
292#endif
293
294
295#define AVAIL_TD(p,q) ((p)->sOpts.nTxDescs[(q)]-((p)->iTDUsed[(q)]))
296
297//PLICE_DEBUG ->
298#define NUM 64
299//PLICE_DEUBG <-
300
301
302
303/*--------------------- Export Types ------------------------------*/
304
305
306//0:11A 1:11B 2:11G
307typedef enum _VIA_BB_TYPE
308{
309 BB_TYPE_11A=0,
310 BB_TYPE_11B,
311 BB_TYPE_11G
312} VIA_BB_TYPE, *PVIA_BB_TYPE;
313
314//0:11a,1:11b,2:11gb(only CCK in BasicRate),3:11ga(OFDM in Basic Rate)
315typedef enum _VIA_PKT_TYPE
316{
317 PK_TYPE_11A=0,
318 PK_TYPE_11B,
319 PK_TYPE_11GB,
320 PK_TYPE_11GA
321} VIA_PKT_TYPE, *PVIA_PKT_TYPE;
322
323
324typedef enum __device_msg_level {
325 MSG_LEVEL_ERR=0, //Errors that will cause abnormal operation.
326 MSG_LEVEL_NOTICE=1, //Some errors need users to be notified.
327 MSG_LEVEL_INFO=2, //Normal message.
328 MSG_LEVEL_VERBOSE=3, //Will report all trival errors.
329 MSG_LEVEL_DEBUG=4 //Only for debug purpose.
330} DEVICE_MSG_LEVEL, *PDEVICE_MSG_LEVEL;
331
332typedef enum __device_init_type {
333 DEVICE_INIT_COLD=0, // cold init
334 DEVICE_INIT_RESET, // reset init or Dx to D0 power remain init
335 DEVICE_INIT_DXPL // Dx to D0 power lost init
336} DEVICE_INIT_TYPE, *PDEVICE_INIT_TYPE;
337
338
339//++ NDIS related
340
341#define MAX_BSSIDINFO_4_PMKID 16
342#define MAX_PMKIDLIST 5
343//Flags for PMKID Candidate list structure
344#define NDIS_802_11_PMKID_CANDIDATE_PREAUTH_ENABLED 0x01
345
346// PMKID Structures
347typedef UCHAR NDIS_802_11_PMKID_VALUE[16];
348
349
350typedef enum _NDIS_802_11_WEP_STATUS
351{
352 Ndis802_11WEPEnabled,
353 Ndis802_11Encryption1Enabled = Ndis802_11WEPEnabled,
354 Ndis802_11WEPDisabled,
355 Ndis802_11EncryptionDisabled = Ndis802_11WEPDisabled,
356 Ndis802_11WEPKeyAbsent,
357 Ndis802_11Encryption1KeyAbsent = Ndis802_11WEPKeyAbsent,
358 Ndis802_11WEPNotSupported,
359 Ndis802_11EncryptionNotSupported = Ndis802_11WEPNotSupported,
360 Ndis802_11Encryption2Enabled,
361 Ndis802_11Encryption2KeyAbsent,
362 Ndis802_11Encryption3Enabled,
363 Ndis802_11Encryption3KeyAbsent
364} NDIS_802_11_WEP_STATUS, *PNDIS_802_11_WEP_STATUS,
365 NDIS_802_11_ENCRYPTION_STATUS, *PNDIS_802_11_ENCRYPTION_STATUS;
366
367
368typedef enum _NDIS_802_11_STATUS_TYPE
369{
370 Ndis802_11StatusType_Authentication,
371 Ndis802_11StatusType_MediaStreamMode,
372 Ndis802_11StatusType_PMKID_CandidateList,
373 Ndis802_11StatusTypeMax // not a real type, defined as an upper bound
374} NDIS_802_11_STATUS_TYPE, *PNDIS_802_11_STATUS_TYPE;
375
376//Added new types for PMKID Candidate lists.
377typedef struct _PMKID_CANDIDATE {
378 NDIS_802_11_MAC_ADDRESS BSSID;
379 ULONG Flags;
380} PMKID_CANDIDATE, *PPMKID_CANDIDATE;
381
382
383typedef struct _BSSID_INFO
384{
385 NDIS_802_11_MAC_ADDRESS BSSID;
386 NDIS_802_11_PMKID_VALUE PMKID;
387} BSSID_INFO, *PBSSID_INFO;
388
389typedef struct tagSPMKID {
390 ULONG Length;
391 ULONG BSSIDInfoCount;
392 BSSID_INFO BSSIDInfo[MAX_BSSIDINFO_4_PMKID];
393} SPMKID, *PSPMKID;
394
395typedef struct tagSPMKIDCandidateEvent {
396 NDIS_802_11_STATUS_TYPE StatusType;
397 ULONG Version; // Version of the structure
398 ULONG NumCandidates; // No. of pmkid candidates
399 PMKID_CANDIDATE CandidateList[MAX_PMKIDLIST];
400} SPMKIDCandidateEvent, DEF* PSPMKIDCandidateEvent;
401
402
403//--
404
405//++ 802.11h related
406#define MAX_QUIET_COUNT 8
407
408typedef struct tagSQuietControl {
409 BOOL bEnable;
410 DWORD dwStartTime;
411 BYTE byPeriod;
412 WORD wDuration;
413} SQuietControl, DEF* PSQuietControl;
414
415//--
416typedef struct __chip_info_tbl{
417 CHIP_TYPE chip_id;
418 char* name;
419 int io_size;
420 int nTxQueue;
421 U32 flags;
422} CHIP_INFO, *PCHIP_INFO;
423
424
425typedef enum {
426 OWNED_BY_HOST=0,
427 OWNED_BY_NIC=1
428} DEVICE_OWNER_TYPE, *PDEVICE_OWNER_TYPE;
429
430
431// The receive duplicate detection cache entry
432typedef struct tagSCacheEntry{
433 WORD wFmSequence;
434 BYTE abyAddr2[U_ETHER_ADDR_LEN];
435} SCacheEntry, *PSCacheEntry;
436
437
438typedef struct tagSCache{
439/* The receive cache is updated circularly. The next entry to be written is
440 * indexed by the "InPtr".
441*/
442 UINT uInPtr; // Place to use next
443 SCacheEntry asCacheEntry[DUPLICATE_RX_CACHE_LENGTH];
444} SCache, *PSCache;
445
446#define CB_MAX_RX_FRAG 64
447// DeFragment Control Block, used for collecting fragments prior to reassembly
448typedef struct tagSDeFragControlBlock
449{
450 WORD wSequence;
451 WORD wFragNum;
452 BYTE abyAddr2[U_ETHER_ADDR_LEN];
453 UINT uLifetime;
454 struct sk_buff* skb;
455#ifdef PRIVATE_OBJ
456 ref_sk_buff ref_skb;
457#endif
458 PBYTE pbyRxBuffer;
459 UINT cbFrameLength;
460 BOOL bInUse;
461} SDeFragControlBlock, DEF* PSDeFragControlBlock;
462
463
464
465
466//flags for options
467#define DEVICE_FLAGS_IP_ALIGN 0x00000001UL
468#define DEVICE_FLAGS_PREAMBLE_TYPE 0x00000002UL
469#define DEVICE_FLAGS_OP_MODE 0x00000004UL
470#define DEVICE_FLAGS_PS_MODE 0x00000008UL
471#define DEVICE_FLAGS_80211h_MODE 0x00000010UL
472#define DEVICE_FLAGS_DiversityANT 0x00000020UL
473
474//flags for driver status
475#define DEVICE_FLAGS_OPENED 0x00010000UL
476#define DEVICE_FLAGS_WOL_ENABLED 0x00080000UL
477//flags for capbilities
478#define DEVICE_FLAGS_TX_ALIGN 0x01000000UL
479#define DEVICE_FLAGS_HAVE_CAM 0x02000000UL
480#define DEVICE_FLAGS_FLOW_CTRL 0x04000000UL
481
482//flags for MII status
483#define DEVICE_LINK_FAIL 0x00000001UL
484#define DEVICE_SPEED_10 0x00000002UL
485#define DEVICE_SPEED_100 0x00000004UL
486#define DEVICE_SPEED_1000 0x00000008UL
487#define DEVICE_DUPLEX_FULL 0x00000010UL
488#define DEVICE_AUTONEG_ENABLE 0x00000020UL
489#define DEVICE_FORCED_BY_EEPROM 0x00000040UL
490//for device_set_media_duplex
491#define DEVICE_LINK_CHANGE 0x00000001UL
492
493
494//PLICE_DEBUG->
495
496
497typedef struct _RxManagementQueue
498{
499 int packet_num;
500 int head,tail;
501 PSRxMgmtPacket Q[NUM];
502} RxManagementQueue,*PSRxManagementQueue;
503
504
505
506//PLICE_DEBUG<-
507
508
509typedef struct __device_opt {
510 int nRxDescs0; //Number of RX descriptors0
511 int nRxDescs1; //Number of RX descriptors1
512 int nTxDescs[2]; //Number of TX descriptors 0, 1
513 int int_works; //interrupt limits
514 int rts_thresh; //rts threshold
515 int frag_thresh;
516 int data_rate;
517 int channel_num;
518 int short_retry;
519 int long_retry;
520 int bbp_type;
521 U32 flags;
522} OPTIONS, *POPTIONS;
523
524
525typedef struct __device_info {
526 struct __device_info* next;
527 struct __device_info* prev;
528
529 struct pci_dev* pcid;
530
531#if CONFIG_PM
532 u32 pci_state[16];
533#endif
534
535// netdev
536 struct net_device* dev;
537 struct net_device* next_module;
538 struct net_device_stats stats;
539
540//dma addr, rx/tx pool
541 dma_addr_t pool_dma;
542 dma_addr_t rd0_pool_dma;
543 dma_addr_t rd1_pool_dma;
544
545 dma_addr_t td0_pool_dma;
546 dma_addr_t td1_pool_dma;
547
548 dma_addr_t tx_bufs_dma0;
549 dma_addr_t tx_bufs_dma1;
550 dma_addr_t tx_beacon_dma;
551
552 PBYTE tx0_bufs;
553 PBYTE tx1_bufs;
554 PBYTE tx_beacon_bufs;
555
556 CHIP_TYPE chip_id;
557
558 U32 PortOffset;
559 DWORD dwIsr;
560 U32 memaddr;
561 U32 ioaddr;
562 U32 io_size;
563
564 BYTE byRevId;
565 WORD SubSystemID;
566 WORD SubVendorID;
567
568 int nTxQueues;
569 volatile int iTDUsed[TYPE_MAXTD];
570
571 volatile PSTxDesc apCurrTD[TYPE_MAXTD];
572 volatile PSTxDesc apTailTD[TYPE_MAXTD];
573
574 volatile PSTxDesc apTD0Rings;
575 volatile PSTxDesc apTD1Rings;
576
577 volatile PSRxDesc aRD0Ring;
578 volatile PSRxDesc aRD1Ring;
579 volatile PSRxDesc pCurrRD[TYPE_MAXRD];
580 SCache sDupRxCache;
581
582 SDeFragControlBlock sRxDFCB[CB_MAX_RX_FRAG];
583 UINT cbDFCB;
584 UINT cbFreeDFCB;
585 UINT uCurrentDFCBIdx;
586
587 OPTIONS sOpts;
588
589 U32 flags;
590
591 U32 rx_buf_sz;
592 int multicast_limit;
593 BYTE byRxMode;
594
595 spinlock_t lock;
596//PLICE_DEBUG->
597 struct tasklet_struct RxMngWorkItem;
598 RxManagementQueue rxManeQueue;
599//PLICE_DEBUG<-
600//PLICE_DEBUG ->
601 pid_t MLMEThr_pid;
602 struct completion notify;
603 struct semaphore mlme_semaphore;
604//PLICE_DEBUG <-
605
606
607 U32 rx_bytes;
608
609 // Version control
610 BYTE byLocalID;
611 BYTE byRFType;
612
613 BYTE byMaxPwrLevel;
614 BYTE byZoneType;
615 BOOL bZoneRegExist;
616 BYTE byOriginalZonetype;
617 BYTE abyMacContext[MAC_MAX_CONTEXT_REG];
618 BOOL bLinkPass; // link status: OK or fail
619 BYTE abyCurrentNetAddr[U_ETHER_ADDR_LEN];
620
621 // Adapter statistics
622 SStatCounter scStatistic;
623 // 802.11 counter
624 SDot11Counters s802_11Counter;
625
626
627 // 802.11 management
628 PSMgmtObject pMgmt;
629 SMgmtObject sMgmtObj;
630
631 // 802.11 MAC specific
632 UINT uCurrRSSI;
633 BYTE byCurrSQ;
634
635 DWORD dwTxAntennaSel;
636 DWORD dwRxAntennaSel;
637 BYTE byAntennaCount;
638 BYTE byRxAntennaMode;
639 BYTE byTxAntennaMode;
640 BOOL bTxRxAntInv;
641
642 PBYTE pbyTmpBuff;
643 UINT uSIFS; //Current SIFS
644 UINT uDIFS; //Current DIFS
645 UINT uEIFS; //Current EIFS
646 UINT uSlot; //Current SlotTime
647 UINT uCwMin; //Current CwMin
648 UINT uCwMax; //CwMax is fixed on 1023.
649 // PHY parameter
650 BYTE bySIFS;
651 BYTE byDIFS;
652 BYTE byEIFS;
653 BYTE bySlot;
654 BYTE byCWMaxMin;
655 CARD_PHY_TYPE eCurrentPHYType;
656
657
658 VIA_BB_TYPE byBBType; //0: 11A, 1:11B, 2:11G
659 VIA_PKT_TYPE byPacketType; //0:11a,1:11b,2:11gb(only CCK in BasicRate),3:11ga(OFDM in Basic Rate)
660 WORD wBasicRate;
661 BYTE byACKRate;
662 BYTE byTopOFDMBasicRate;
663 BYTE byTopCCKBasicRate;
664
665 BYTE byMinChannel;
666 BYTE byMaxChannel;
667 UINT uConnectionRate;
668
669 BYTE byPreambleType;
670 BYTE byShortPreamble;
671
672 WORD wCurrentRate;
673 WORD wRTSThreshold;
674 WORD wFragmentationThreshold;
675 BYTE byShortRetryLimit;
676 BYTE byLongRetryLimit;
677 CARD_OP_MODE eOPMode;
678 BYTE byOpMode;
679 BOOL bBSSIDFilter;
680 WORD wMaxTransmitMSDULifetime;
681 BYTE abyBSSID[U_ETHER_ADDR_LEN];
682 BYTE abyDesireBSSID[U_ETHER_ADDR_LEN];
683 WORD wCTSDuration; // update while speed change
684 WORD wACKDuration; // update while speed change
685 WORD wRTSTransmitLen; // update while speed change
686 BYTE byRTSServiceField; // update while speed change
687 BYTE byRTSSignalField; // update while speed change
688
689 DWORD dwMaxReceiveLifetime; // dot11MaxReceiveLifetime
690
691 BOOL bCCK;
692 BOOL bEncryptionEnable;
693 BOOL bLongHeader;
694 BOOL bShortSlotTime;
695 BOOL bProtectMode;
696 BOOL bNonERPPresent;
697 BOOL bBarkerPreambleMd;
698
699 BYTE byERPFlag;
700 WORD wUseProtectCntDown;
701
702 BOOL bRadioControlOff;
703 BOOL bRadioOff;
704 BOOL bEnablePSMode;
705 WORD wListenInterval;
706 BOOL bPWBitOn;
707 WMAC_POWER_MODE ePSMode;
708
709
710 // GPIO Radio Control
711 BYTE byRadioCtl;
712 BYTE byGPIO;
713 BOOL bHWRadioOff;
714 BOOL bPrvActive4RadioOFF;
715 BOOL bGPIOBlockRead;
716
717 // Beacon releated
718 WORD wSeqCounter;
719 WORD wBCNBufLen;
720 BOOL bBeaconBufReady;
721 BOOL bBeaconSent;
722 BOOL bIsBeaconBufReadySet;
723 UINT cbBeaconBufReadySetCnt;
724 BOOL bFixRate;
725 BYTE byCurrentCh;
726 UINT uScanTime;
727
728 CMD_STATE eCommandState;
729
730 CMD_CODE eCommand;
731 BOOL bBeaconTx;
732
733 BOOL bStopBeacon;
734 BOOL bStopDataPkt;
735 BOOL bStopTx0Pkt;
736 UINT uAutoReConnectTime;
737
738 // 802.11 counter
739
740 CMD_ITEM eCmdQueue[CMD_Q_SIZE];
741 UINT uCmdDequeueIdx;
742 UINT uCmdEnqueueIdx;
743 UINT cbFreeCmdQueue;
744 BOOL bCmdRunning;
745 BOOL bCmdClear;
746
747
748
749 BOOL bRoaming;
750 //WOW
751 BYTE abyIPAddr[4];
752
753 ULONG ulTxPower;
754 NDIS_802_11_WEP_STATUS eEncryptionStatus;
755 BOOL bTransmitKey;
756//2007-0925-01<Add>by MikeLiu
757//mike add :save old Encryption
758 NDIS_802_11_WEP_STATUS eOldEncryptionStatus;
759 SKeyManagement sKey;
760 DWORD dwIVCounter;
761
762 QWORD qwPacketNumber; //For CCMP and TKIP as TSC(6 bytes)
763 UINT uCurrentWEPMode;
764
765 RC4Ext SBox;
766 BYTE abyPRNG[WLAN_WEPMAX_KEYLEN+3];
767
768 BYTE byKeyIndex;
769 UINT uKeyLength;
770 BYTE abyKey[WLAN_WEP232_KEYLEN];
771
772 BOOL bAES;
773 BYTE byCntMeasure;
774
775 // for AP mode
776 UINT uAssocCount;
777 BOOL bMoreData;
778
779 // QoS
780 BOOL bGrpAckPolicy;
781
782 // for OID_802_11_ASSOCIATION_INFORMATION
783 BOOL bAssocInfoSet;
784
785
786 BYTE byAutoFBCtrl;
787
788 BOOL bTxMICFail;
789 BOOL bRxMICFail;
790
791
792 UINT uRATEIdx;
793
794
795 // For Update BaseBand VGA Gain Offset
796 BOOL bUpdateBBVGA;
797 UINT uBBVGADiffCount;
798 BYTE byBBVGANew;
799 BYTE byBBVGACurrent;
800 BYTE abyBBVGA[BB_VGA_LEVEL];
801 LONG ldBmThreshold[BB_VGA_LEVEL];
802
803 BYTE byBBPreEDRSSI;
804 BYTE byBBPreEDIndex;
805
806 BOOL bRadioCmd;
807 DWORD dwDiagRefCount;
808
809 // For FOE Tuning
810 BYTE byFOETuning;
811
812 // For Auto Power Tunning
813
814 BYTE byAutoPwrTunning;
815 SHORT sPSetPointCCK;
816 SHORT sPSetPointOFDMG;
817 SHORT sPSetPointOFDMA;
818 LONG lPFormulaOffset;
819 SHORT sPThreshold;
820 CHAR cAdjustStep;
821 CHAR cMinTxAGC;
822
823 // For RF Power table
824 BYTE byCCKPwr;
825 BYTE byOFDMPwrG;
826 BYTE byCurPwr;
827 I8 byCurPwrdBm;
828 BYTE abyCCKPwrTbl[CB_MAX_CHANNEL_24G+1];
829 BYTE abyOFDMPwrTbl[CB_MAX_CHANNEL+1];
830 I8 abyCCKDefaultPwr[CB_MAX_CHANNEL_24G+1];
831 I8 abyOFDMDefaultPwr[CB_MAX_CHANNEL+1];
832 I8 abyRegPwr[CB_MAX_CHANNEL+1];
833 I8 abyLocalPwr[CB_MAX_CHANNEL+1];
834
835
836 // BaseBand Loopback Use
837 BYTE byBBCR4d;
838 BYTE byBBCRc9;
839 BYTE byBBCR88;
840 BYTE byBBCR09;
841
842 // command timer
843 struct timer_list sTimerCommand;
844#ifdef TxInSleep
845 struct timer_list sTimerTxData;
846 ULONG nTxDataTimeCout;
847 BOOL fTxDataInSleep;
848 BOOL IsTxDataTrigger;
849#endif
850
851#ifdef WPA_SM_Transtatus
852 BOOL fWPA_Authened; //is WPA/WPA-PSK or WPA2/WPA2-PSK authen??
853#endif
854 BYTE byReAssocCount; //mike add:re-association retry times!
855 BYTE byLinkWaitCount;
856
857
858 BYTE abyNodeName[17];
859
860 BOOL bDiversityRegCtlON;
861 BOOL bDiversityEnable;
862 ULONG ulDiversityNValue;
863 ULONG ulDiversityMValue;
864 BYTE byTMax;
865 BYTE byTMax2;
866 BYTE byTMax3;
867 ULONG ulSQ3TH;
868
869// ANT diversity
870 ULONG uDiversityCnt;
871 BYTE byAntennaState;
872 ULONG ulRatio_State0;
873 ULONG ulRatio_State1;
874
875 //SQ3 functions for antenna diversity
876 struct timer_list TimerSQ3Tmax1;
877 struct timer_list TimerSQ3Tmax2;
878 struct timer_list TimerSQ3Tmax3;
879
880
881 ULONG uNumSQ3[MAX_RATE];
882 WORD wAntDiversityMaxRate;
883
884
885 SEthernetHeader sTxEthHeader;
886 SEthernetHeader sRxEthHeader;
887 BYTE abyBroadcastAddr[U_ETHER_ADDR_LEN];
888 BYTE abySNAP_RFC1042[U_ETHER_ADDR_LEN];
889 BYTE abySNAP_Bridgetunnel[U_ETHER_ADDR_LEN];
890 BYTE abyEEPROM[EEP_MAX_CONTEXT_SIZE]; //DWORD alignment
891 // Pre-Authentication & PMK cache
892 SPMKID gsPMKID;
893 SPMKIDCandidateEvent gsPMKIDCandidate;
894
895
896 // for 802.11h
897 BOOL b11hEnable;
898 BYTE abyCountryCode[3];
899 // for 802.11h DFS
900 UINT uNumOfMeasureEIDs;
901 PWLAN_IE_MEASURE_REQ pCurrMeasureEID;
902 BOOL bMeasureInProgress;
903 BYTE byOrgChannel;
904 BYTE byOrgRCR;
905 DWORD dwOrgMAR0;
906 DWORD dwOrgMAR4;
907 BYTE byBasicMap;
908 BYTE byCCAFraction;
909 BYTE abyRPIs[8];
910 DWORD dwRPIs[8];
911 BOOL bChannelSwitch;
912 BYTE byNewChannel;
913 BYTE byChannelSwitchCount;
914 BOOL bQuietEnable;
915 BOOL bEnableFirstQuiet;
916 BYTE byQuietStartCount;
917 UINT uQuietEnqueue;
918 DWORD dwCurrentQuietEndTime;
919 SQuietControl sQuiet[MAX_QUIET_COUNT];
920 // for 802.11h TPC
921 BOOL bCountryInfo5G;
922 BOOL bCountryInfo24G;
923
924 WORD wBeaconInterval;
925
926 //WPA supplicant deamon
927 struct net_device *wpadev;
928 BOOL bWPADEVUp;
929 struct sk_buff *skb;
930#ifdef WPA_SUPPLICANT_DRIVER_WEXT_SUPPORT
931/*
932 BOOL bwextstep0;
933 BOOL bwextstep1;
934 BOOL bwextstep2;
935 BOOL bwextstep3;
936 */
937 UINT bwextcount;
938 BOOL bWPASuppWextEnabled;
939#endif
940
941 //--
942#ifdef HOSTAP
943 // user space daemon: hostapd, is used for HOSTAP
944 BOOL bEnableHostapd;
945 BOOL bEnable8021x;
946 BOOL bEnableHostWEP;
947 struct net_device *apdev;
948 int (*tx_80211)(struct sk_buff *skb, struct net_device *dev);
949#endif
950 UINT uChannel;
951 BOOL bMACSuspend;
952
953#ifdef WIRELESS_EXT
954 struct iw_statistics wstats; // wireless stats
955#endif /* WIRELESS_EXT */
956 BOOL bCommit;
957
958} DEVICE_INFO, *PSDevice;
959
960
961//PLICE_DEBUG->
962
963
964 inline static VOID EnQueue (PSDevice pDevice,PSRxMgmtPacket pRxMgmtPacket)
965{
966 //printk("Enter EnQueue:tail is %d\n",pDevice->rxManeQueue.tail);
967 if ((pDevice->rxManeQueue.tail+1) % NUM == pDevice->rxManeQueue.head)
968 {
969 //printk("Queue is Full,tail is %d\n",pDevice->rxManeQueue.tail);
970 return ;
971 }
972 else
973 {
974 pDevice->rxManeQueue.tail = (pDevice->rxManeQueue.tail+1)% NUM;
975 pDevice->rxManeQueue.Q[pDevice->rxManeQueue.tail] = pRxMgmtPacket;
976 pDevice->rxManeQueue.packet_num++;
977 //printk("packet num is %d\n",pDevice->rxManeQueue.packet_num);
978 }
979}
980
981
982
983
984 inline static PSRxMgmtPacket DeQueue (PSDevice pDevice)
985{
986 PSRxMgmtPacket pRxMgmtPacket;
987 if (pDevice->rxManeQueue.tail == pDevice->rxManeQueue.head)
988 {
989 printk("Queue is Empty\n");
990 return NULL;
991 }
992 else
993 {
994 int x;
995 //x=pDevice->rxManeQueue.head = (pDevice->rxManeQueue.head+1)%NUM;
996 pDevice->rxManeQueue.head = (pDevice->rxManeQueue.head+1)%NUM;
997 x = pDevice->rxManeQueue.head;
998 //printk("Enter DeQueue:head is %d\n",x);
999 pRxMgmtPacket = pDevice->rxManeQueue.Q[x];
1000 pDevice->rxManeQueue.packet_num--;
1001 return pRxMgmtPacket;
1002 }
1003}
1004
1005VOID InitRxManagementQueue(PSDevice pDevice);
1006
1007
1008
1009//PLICE_DEBUG<-
1010
1011
1012
1013
1014
1015
1016inline static BOOL device_get_ip(PSDevice pInfo) {
1017 struct in_device* in_dev=(struct in_device*) pInfo->dev->ip_ptr;
1018 struct in_ifaddr* ifa;
1019
1020 if (in_dev!=NULL) {
1021 ifa=(struct in_ifaddr*) in_dev->ifa_list;
1022 if (ifa!=NULL) {
1023 memcpy(pInfo->abyIPAddr,&ifa->ifa_address,4);
1024 return TRUE;
1025 }
1026 }
1027 return FALSE;
1028}
1029
1030
1031
1032static inline PDEVICE_RD_INFO alloc_rd_info(void) {
1033 PDEVICE_RD_INFO ptr;
1034 if ((ptr = (PDEVICE_RD_INFO)kmalloc((int)sizeof(DEVICE_RD_INFO), (int)GFP_ATOMIC)) == NULL)
1035 return NULL;
1036 else {
1037 memset(ptr,0,sizeof(DEVICE_RD_INFO));
1038 return ptr;
1039 }
1040}
1041
1042static inline PDEVICE_TD_INFO alloc_td_info(void) {
1043 PDEVICE_TD_INFO ptr;
1044 if ((ptr = (PDEVICE_TD_INFO)kmalloc((int)sizeof(DEVICE_TD_INFO), (int)GFP_ATOMIC))==NULL)
1045 return NULL;
1046 else {
1047 memset(ptr,0,sizeof(DEVICE_TD_INFO));
1048 return ptr;
1049 }
1050}
1051
1052/*--------------------- Export Functions --------------------------*/
1053
1054BOOL device_dma0_xmit(PSDevice pDevice, struct sk_buff *skb, UINT uNodeIndex);
1055BOOL device_alloc_frag_buf(PSDevice pDevice, PSDeFragControlBlock pDeF);
1056int Config_FileOperation(PSDevice pDevice,BOOL fwrite,unsigned char *Parameter);
1057#endif
1058
1059
Linux kernel - Deliverables
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