Merge branch 'serge-next-1' of git://git.kernel.org/pub/scm/linux/kernel/git/sergeh...
[deliverable/linux.git] / drivers / staging / vt6656 / baseband.c
CommitLineData
92b96797
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1/*
2 * Copyright (c) 1996, 2003 VIA Networking Technologies, Inc.
3 * All rights reserved.
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License along
16 * with this program; if not, write to the Free Software Foundation, Inc.,
17 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 *
20 * File: baseband.c
21 *
22 * Purpose: Implement functions to access baseband
23 *
24 * Author: Jerry Chen
25 *
26 * Date: Jun. 5, 2002
27 *
28 * Functions:
29 * BBuGetFrameTime - Calculate data frame transmitting time
bda79783 30 * BBvCalculateParameter - Calculate PhyLength, PhyService and Phy Signal parameter for baseband Tx
92b96797 31 * BBbVT3184Init - VIA VT3184 baseband chip init code
92b96797
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32 *
33 * Revision History:
34 *
35 *
36 */
37
92b96797 38#include "tmacro.h"
92b96797 39#include "tether.h"
92b96797 40#include "mac.h"
92b96797 41#include "baseband.h"
92b96797 42#include "rf.h"
62c8526d 43#include "usbpipe.h"
92b96797 44#include "datarate.h"
92b96797 45
3b138851 46static u8 abyVT3184_AGC[] = {
92b96797
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47 0x00, //0
48 0x00, //1
49 0x02, //2
50 0x02, //3 //RobertYu:20060505, 0x04, //3
51 0x04, //4
52 0x04, //5 //RobertYu:20060505, 0x06, //5
53 0x06, //6
54 0x06, //7
55 0x08, //8
56 0x08, //9
57 0x0A, //A
58 0x0A, //B
59 0x0C, //C
60 0x0C, //D
61 0x0E, //E
62 0x0E, //F
63 0x10, //10
64 0x10, //11
65 0x12, //12
66 0x12, //13
67 0x14, //14
68 0x14, //15
69 0x16, //16
70 0x16, //17
71 0x18, //18
72 0x18, //19
73 0x1A, //1A
74 0x1A, //1B
75 0x1C, //1C
76 0x1C, //1D
77 0x1E, //1E
78 0x1E, //1F
79 0x20, //20
80 0x20, //21
81 0x22, //22
82 0x22, //23
83 0x24, //24
84 0x24, //25
85 0x26, //26
86 0x26, //27
87 0x28, //28
88 0x28, //29
89 0x2A, //2A
90 0x2A, //2B
91 0x2C, //2C
92 0x2C, //2D
93 0x2E, //2E
94 0x2E, //2F
95 0x30, //30
96 0x30, //31
97 0x32, //32
98 0x32, //33
99 0x34, //34
100 0x34, //35
101 0x36, //36
102 0x36, //37
103 0x38, //38
104 0x38, //39
105 0x3A, //3A
106 0x3A, //3B
107 0x3C, //3C
108 0x3C, //3D
109 0x3E, //3E
110 0x3E //3F
111};
112
3b138851 113static u8 abyVT3184_AL2230[] = {
92b96797
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114 0x31,//00
115 0x00,
116 0x00,
117 0x00,
118 0x00,
119 0x80,
120 0x00,
121 0x00,
122 0x70,
123 0x45,//tx //0x64 for FPGA
124 0x2A,
125 0x76,
126 0x00,
127 0x00,
128 0x80,
129 0x00,
130 0x00,//10
131 0x00,
132 0x00,
133 0x00,
134 0x00,
135 0x00,
136 0x00,
137 0x00,
138 0x00,
139 0x00,
140 0x00,
141 0x8e, //RobertYu:20060522, //0x8d,
142 0x0a, //RobertYu:20060515, //0x09,
143 0x00,
144 0x00,
145 0x00,
146 0x00,//20
147 0x00,
148 0x00,
149 0x00,
150 0x00,
151 0x4a,
152 0x00,
153 0x00,
154 0x00,
155 0x00,
156 0x00,
157 0x00,
158 0x00,
159 0x4a,
160 0x00,
161 0x0c, //RobertYu:20060522, //0x10,
162 0x26,//30
163 0x5b,
164 0x00,
165 0x00,
166 0x00,
167 0x00,
168 0xaa,
169 0xaa,
170 0xff,
171 0xff,
172 0x79,
173 0x00,
174 0x00,
175 0x0b,
176 0x48,
177 0x04,
178 0x00,//40
179 0x08,
180 0x00,
181 0x08,
182 0x08,
183 0x14,
184 0x05,
185 0x09,
186 0x00,
187 0x00,
188 0x00,
189 0x00,
190 0x09,
191 0x73,
192 0x00,
193 0xc5,
194 0x00,//50 //RobertYu:20060505, //0x15,//50
195 0x19,
196 0x00,
197 0x00,
198 0x00,
199 0x00,
200 0x00,
201 0x00,
202 0x00,
203 0xd0, //RobertYu:20060505, //0xb0,
204 0x00,
205 0x00,
206 0x00,
207 0x00,
208 0x00,
209 0x00,
210 0xe4,//60
211 0x80,
212 0x00,
213 0x00,
214 0x00,
215 0x00,
216 0x98,
217 0x0a,
218 0x00,
219 0x00,
220 0x00,
221 0x00,
222 0x00, //0x80 for FPGA
223 0x03,
224 0x01,
225 0x00,
226 0x00,//70
227 0x00,
228 0x00,
229 0x00,
230 0x00,
231 0x00,
232 0x00,
233 0x00,
234 0x00,
235 0x00,
236 0x00,
237 0x00,
238 0x00,
239 0x00,
240 0x00,
241 0x00,
242 0x8c,//80
243 0x01,
244 0x09,
245 0x00,
246 0x00,
247 0x00,
248 0x00,
249 0x00,
250 0x08,
251 0x00,
252 0x1f, //RobertYu:20060516, //0x0f,
253 0xb7,
254 0x88,
255 0x47,
256 0xaa,
257 0x00, //RobertYu:20060505, //0x02,
258 0x20,//90 //RobertYu:20060505, //0x22,//90
259 0x00,
260 0x00,
261 0x00,
262 0x00,
263 0x00,
264 0x00,
265 0xeb,
266 0x00,
267 0x00,
268 0x00,
269 0x00,
270 0x00,
271 0x00,
272 0x00,
273 0x01,
274 0x00,//a0
275 0x00,
276 0x00,
277 0x00,
278 0x00,
279 0x00,
280 0x10,
281 0x00,
282 0x18,
283 0x00,
284 0x00,
285 0x00,
286 0x00,
287 0x15, //RobertYu:20060516, //0x00,
288 0x00,
289 0x18,
290 0x38,//b0
291 0x30,
292 0x00,
293 0x00,
294 0xff,
295 0x0f,
296 0xe4,
297 0xe2,
298 0x00,
299 0x00,
300 0x00,
301 0x03,
302 0x01,
303 0x00,
304 0x00,
305 0x00,
306 0x18,//c0
307 0x20,
308 0x07,
309 0x18,
310 0xff,
311 0xff, //RobertYu:20060509, //0x2c,
312 0x0e, //RobertYu:20060530, //0x0c,
313 0x0a,
314 0x0e,
315 0x00, //RobertYu:20060505, //0x01,
316 0x82, //RobertYu:20060516, //0x8f,
317 0xa7,
318 0x3c,
319 0x10,
320 0x30, //RobertYu:20060627, //0x0b,
321 0x05, //RobertYu:20060516, //0x25,
322 0x40,//d0
323 0x12,
324 0x00,
325 0x00,
326 0x10,
327 0x28,
328 0x80,
329 0x2A,
330 0x00,
331 0x00,
332 0x00,
333 0x00,
334 0x00,
335 0x00,
336 0x00,
337 0x00,
338 0x00,//e0
339 0xf3, //RobertYu:20060516, //0xd3,
340 0x00,
341 0x00,
342 0x00,
343 0x10,
344 0x00,
345 0x12, //RobertYu:20060627, //0x10,
346 0x00,
347 0xf4,
348 0x00,
349 0xff,
350 0x79,
351 0x20,
352 0x30,
353 0x05, //RobertYu:20060516, //0x0c,
354 0x00,//f0
355 0x3e,
356 0x00,
357 0x00,
358 0x00,
359 0x00,
360 0x00,
361 0x00,
362 0x00,
363 0x00,
364 0x00,
365 0x00,
366 0x00,
367 0x00,
368 0x00,
369 0x00
370};
371
92b96797 372//{{RobertYu:20060515, new BB setting for VT3226D0
3b138851 373static u8 abyVT3184_VT3226D0[] = {
92b96797
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374 0x31,//00
375 0x00,
376 0x00,
377 0x00,
378 0x00,
379 0x80,
380 0x00,
381 0x00,
382 0x70,
383 0x45,//tx //0x64 for FPGA
384 0x2A,
385 0x76,
386 0x00,
387 0x00,
388 0x80,
389 0x00,
390 0x00,//10
391 0x00,
392 0x00,
393 0x00,
394 0x00,
395 0x00,
396 0x00,
397 0x00,
398 0x00,
399 0x00,
400 0x00,
401 0x8e, //RobertYu:20060525, //0x8d,
402 0x0a, //RobertYu:20060515, //0x09,
403 0x00,
404 0x00,
405 0x00,
406 0x00,//20
407 0x00,
408 0x00,
409 0x00,
410 0x00,
411 0x4a,
412 0x00,
413 0x00,
414 0x00,
415 0x00,
416 0x00,
417 0x00,
418 0x00,
419 0x4a,
420 0x00,
421 0x0c, //RobertYu:20060525, //0x10,
422 0x26,//30
423 0x5b,
424 0x00,
425 0x00,
426 0x00,
427 0x00,
428 0xaa,
429 0xaa,
430 0xff,
431 0xff,
432 0x79,
433 0x00,
434 0x00,
435 0x0b,
436 0x48,
437 0x04,
438 0x00,//40
439 0x08,
440 0x00,
441 0x08,
442 0x08,
443 0x14,
444 0x05,
445 0x09,
446 0x00,
447 0x00,
448 0x00,
449 0x00,
450 0x09,
451 0x73,
452 0x00,
453 0xc5,
454 0x00,//50 //RobertYu:20060505, //0x15,//50
455 0x19,
456 0x00,
457 0x00,
458 0x00,
459 0x00,
460 0x00,
461 0x00,
462 0x00,
463 0xd0, //RobertYu:20060505, //0xb0,
464 0x00,
465 0x00,
466 0x00,
467 0x00,
468 0x00,
469 0x00,
470 0xe4,//60
471 0x80,
472 0x00,
473 0x00,
474 0x00,
475 0x00,
476 0x98,
477 0x0a,
478 0x00,
479 0x00,
480 0x00,
481 0x00,
482 0x00, //0x80 for FPGA
483 0x03,
484 0x01,
485 0x00,
486 0x00,//70
487 0x00,
488 0x00,
489 0x00,
490 0x00,
491 0x00,
492 0x00,
493 0x00,
494 0x00,
495 0x00,
496 0x00,
497 0x00,
498 0x00,
499 0x00,
500 0x00,
501 0x00,
502 0x8c,//80
503 0x01,
504 0x09,
505 0x00,
506 0x00,
507 0x00,
508 0x00,
509 0x00,
510 0x08,
511 0x00,
512 0x1f, //RobertYu:20060515, //0x0f,
513 0xb7,
514 0x88,
515 0x47,
516 0xaa,
517 0x00, //RobertYu:20060505, //0x02,
518 0x20,//90 //RobertYu:20060505, //0x22,//90
519 0x00,
520 0x00,
521 0x00,
522 0x00,
523 0x00,
524 0x00,
525 0xeb,
526 0x00,
527 0x00,
528 0x00,
529 0x00,
530 0x00,
531 0x00,
532 0x00,
533 0x01,
534 0x00,//a0
535 0x00,
536 0x00,
537 0x00,
538 0x00,
539 0x00,
540 0x10,
541 0x00,
542 0x18,
543 0x00,
544 0x00,
545 0x00,
546 0x00,
547 0x00,
548 0x00,
549 0x18,
550 0x38,//b0
551 0x30,
552 0x00,
553 0x00,
554 0xff,
555 0x0f,
556 0xe4,
557 0xe2,
558 0x00,
559 0x00,
560 0x00,
561 0x03,
562 0x01,
563 0x00,
564 0x00,
565 0x00,
566 0x18,//c0
567 0x20,
568 0x07,
569 0x18,
570 0xff,
571 0xff, //RobertYu:20060509, //0x2c,
572 0x10, //RobertYu:20060525, //0x0c,
573 0x0a,
574 0x0e,
575 0x00, //RobertYu:20060505, //0x01,
576 0x84, //RobertYu:20060525, //0x8f,
577 0xa7,
578 0x3c,
579 0x10,
580 0x24, //RobertYu:20060627, //0x18,
581 0x05, //RobertYu:20060515, //0x25,
582 0x40,//d0
583 0x12,
584 0x00,
585 0x00,
586 0x10,
587 0x28,
588 0x80,
589 0x2A,
590 0x00,
591 0x00,
592 0x00,
593 0x00,
594 0x00,
595 0x00,
596 0x00,
597 0x00,
598 0x00,//e0
599 0xf3, //RobertYu:20060515, //0xd3,
600 0x00,
601 0x00,
602 0x00,
603 0x10,
604 0x00,
605 0x10, //RobertYu:20060627, //0x0e,
606 0x00,
607 0xf4,
608 0x00,
609 0xff,
610 0x79,
611 0x20,
612 0x30,
613 0x08, //RobertYu:20060515, //0x0c,
614 0x00,//f0
615 0x3e,
616 0x00,
617 0x00,
618 0x00,
619 0x00,
620 0x00,
621 0x00,
622 0x00,
623 0x00,
624 0x00,
625 0x00,
626 0x00,
627 0x00,
628 0x00,
629 0x00,
630};
631
3b138851 632static const u16 awcFrameTime[MAX_RATE] =
92b96797
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633{10, 20, 55, 110, 24, 36, 48, 72, 96, 144, 192, 216};
634
92b96797
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635/*
636 * Description: Calculate data frame transmitting time
637 *
638 * Parameters:
639 * In:
030ede1e
MP
640 * preamble_type - Preamble Type
641 * pkt_type - PK_TYPE_11A, PK_TYPE_11B, PK_TYPE_11GB, PK_TYPE_11GA
642 * frame_length - Baseband Type
3b5a89ca 643 * tx_rate - Tx Rate
92b96797
FB
644 * Out:
645 *
646 * Return Value: FrameTime
647 *
648 */
030ede1e
MP
649unsigned int BBuGetFrameTime(u8 preamble_type, u8 pkt_type,
650 unsigned int frame_length, u16 tx_rate)
92b96797 651{
030ede1e
MP
652 unsigned int frame_time;
653 unsigned int preamble;
654 unsigned int tmp;
655 unsigned int rate = 0;
92b96797 656
3b5a89ca 657 if (tx_rate > RATE_54M)
4d99952d 658 return 0;
92b96797 659
030ede1e 660 rate = (unsigned int)awcFrameTime[tx_rate];
92b96797 661
3b5a89ca 662 if (tx_rate <= 3) {
030ede1e
MP
663 if (preamble_type == 1)
664 preamble = 96;
4d99952d 665 else
030ede1e 666 preamble = 192;
92b96797 667
030ede1e
MP
668 frame_time = (frame_length * 80) / rate;
669 tmp = (frame_time * rate) / 80;
92b96797 670
030ede1e
MP
671 if (frame_length != tmp)
672 frame_time++;
4d99952d 673
030ede1e 674 return preamble + frame_time;
4d99952d 675 } else {
030ede1e
MP
676 frame_time = (frame_length * 8 + 22) / rate;
677 tmp = ((frame_time * rate) - 22) / 8;
4d99952d 678
030ede1e
MP
679 if (frame_length != tmp)
680 frame_time++;
4d99952d 681
030ede1e 682 frame_time = frame_time * 4;
4d99952d 683
030ede1e
MP
684 if (pkt_type != PK_TYPE_11A)
685 frame_time += 6;
4d99952d 686
030ede1e 687 return 20 + frame_time;
4d99952d 688 }
92b96797
FB
689}
690
691/*
a0a1f61a 692 * Description: Calculate Length, Service, and Signal fields of Phy for Tx
92b96797
FB
693 *
694 * Parameters:
695 * In:
a1ff5435
MP
696 * priv - Device Structure
697 * frame_length - Tx Frame Length
698 * tx_rate - Tx Rate
92b96797 699 * Out:
aed387c7
MP
700 * struct vnt_phy_field *phy
701 * - pointer to Phy Length field
702 * - pointer to Phy Service field
703 * - pointer to Phy Signal field
92b96797
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704 *
705 * Return Value: none
706 *
707 */
a1ff5435
MP
708void BBvCalculateParameter(struct vnt_private *priv, u32 frame_length,
709 u16 tx_rate, u8 pkt_type, struct vnt_phy_field *phy)
92b96797 710{
a1ff5435
MP
711 u32 bit_count;
712 u32 count = 0;
713 u32 tmp;
714 int ext_bit;
715 u8 preamble_type = priv->byPreambleType;
92b96797 716
a1ff5435
MP
717 bit_count = frame_length * 8;
718 ext_bit = false;
a4fb3e78 719
a1ff5435 720 switch (tx_rate) {
a4fb3e78 721 case RATE_1M:
a1ff5435 722 count = bit_count;
a4fb3e78
MP
723
724 phy->signal = 0x00;
725
726 break;
727 case RATE_2M:
a1ff5435 728 count = bit_count / 2;
a4fb3e78 729
a1ff5435 730 if (preamble_type == 1)
a4fb3e78
MP
731 phy->signal = 0x09;
732 else
733 phy->signal = 0x01;
734
735 break;
736 case RATE_5M:
a1ff5435
MP
737 count = (bit_count * 10) / 55;
738 tmp = (count * 55) / 10;
a4fb3e78 739
a1ff5435
MP
740 if (tmp != bit_count)
741 count++;
a4fb3e78 742
a1ff5435 743 if (preamble_type == 1)
a4fb3e78
MP
744 phy->signal = 0x0a;
745 else
746 phy->signal = 0x02;
747
748 break;
749 case RATE_11M:
a1ff5435
MP
750 count = bit_count / 11;
751 tmp = count * 11;
a4fb3e78 752
a1ff5435
MP
753 if (tmp != bit_count) {
754 count++;
a4fb3e78 755
a1ff5435
MP
756 if ((bit_count - tmp) <= 3)
757 ext_bit = true;
a4fb3e78
MP
758 }
759
a1ff5435 760 if (preamble_type == 1)
a4fb3e78
MP
761 phy->signal = 0x0b;
762 else
763 phy->signal = 0x03;
764
765 break;
766 case RATE_6M:
a1ff5435 767 if (pkt_type == PK_TYPE_11A)
a4fb3e78
MP
768 phy->signal = 0x9b;
769 else
770 phy->signal = 0x8b;
771
772 break;
773 case RATE_9M:
a1ff5435 774 if (pkt_type == PK_TYPE_11A)
a4fb3e78
MP
775 phy->signal = 0x9f;
776 else
777 phy->signal = 0x8f;
778
779 break;
780 case RATE_12M:
a1ff5435 781 if (pkt_type == PK_TYPE_11A)
a4fb3e78
MP
782 phy->signal = 0x9a;
783 else
784 phy->signal = 0x8a;
785
786 break;
787 case RATE_18M:
a1ff5435 788 if (pkt_type == PK_TYPE_11A)
a4fb3e78
MP
789 phy->signal = 0x9e;
790 else
791 phy->signal = 0x8e;
792
793 break;
794 case RATE_24M:
a1ff5435 795 if (pkt_type == PK_TYPE_11A)
a4fb3e78
MP
796 phy->signal = 0x99;
797 else
798 phy->signal = 0x89;
799
800 break;
801 case RATE_36M:
a1ff5435 802 if (pkt_type == PK_TYPE_11A)
a4fb3e78
MP
803 phy->signal = 0x9d;
804 else
805 phy->signal = 0x8d;
806
807 break;
808 case RATE_48M:
a1ff5435 809 if (pkt_type == PK_TYPE_11A)
a4fb3e78
MP
810 phy->signal = 0x98;
811 else
812 phy->signal = 0x88;
813
814 break;
815 case RATE_54M:
a1ff5435 816 if (pkt_type == PK_TYPE_11A)
a4fb3e78
MP
817 phy->signal = 0x9c;
818 else
819 phy->signal = 0x8c;
820 break;
821 default:
a1ff5435 822 if (pkt_type == PK_TYPE_11A)
a4fb3e78
MP
823 phy->signal = 0x9c;
824 else
825 phy->signal = 0x8c;
826 break;
827 }
92b96797 828
a1ff5435 829 if (pkt_type == PK_TYPE_11B) {
aed387c7 830 phy->service = 0x00;
a1ff5435 831 if (ext_bit)
aed387c7 832 phy->service |= 0x80;
a1ff5435 833 phy->len = cpu_to_le16((u16)count);
4ac306e0 834 } else {
aed387c7 835 phy->service = 0x00;
a1ff5435 836 phy->len = cpu_to_le16((u16)frame_length);
4ac306e0 837 }
92b96797
FB
838}
839
92b96797
FB
840/*
841 * Description: Set Antenna mode
842 *
843 * Parameters:
844 * In:
53dab328
MP
845 * priv - Device Structure
846 * antenna_mode - Antenna Mode
92b96797
FB
847 * Out:
848 * none
849 *
850 * Return Value: none
851 *
852 */
53dab328 853void BBvSetAntennaMode(struct vnt_private *priv, u8 antenna_mode)
92b96797 854{
53dab328 855 switch (antenna_mode) {
efe40c09
MP
856 case ANT_TXA:
857 case ANT_TXB:
858 break;
859 case ANT_RXA:
53dab328 860 priv->byBBRxConf &= 0xFC;
efe40c09
MP
861 break;
862 case ANT_RXB:
53dab328
MP
863 priv->byBBRxConf &= 0xFE;
864 priv->byBBRxConf |= 0x02;
efe40c09
MP
865 break;
866 }
867
1390b02a 868 vnt_control_out(priv, MESSAGE_TYPE_SET_ANTMD,
53dab328 869 (u16)antenna_mode, 0, 0, NULL);
92b96797
FB
870}
871
872/*
873 * Description: Set Antenna mode
874 *
875 * Parameters:
876 * In:
877 * pDevice - Device Structure
878 * byAntennaMode - Antenna Mode
879 * Out:
880 * none
881 *
882 * Return Value: none
883 *
884 */
6487c49e 885
9b89b049 886int BBbVT3184Init(struct vnt_private *priv)
92b96797 887{
9b89b049 888 int status;
4237fe4f 889 u16 length;
9b89b049
MP
890 u8 *addr;
891 u8 *agc;
4237fe4f 892 u16 length_agc;
9b89b049 893 u8 array[256];
9df68292 894 u8 data;
92b96797 895
441c21c3 896 status = vnt_control_in(priv, MESSAGE_TYPE_READ, 0,
9b89b049
MP
897 MESSAGE_REQUEST_EEPROM, EEP_MAX_CONTEXT_SIZE,
898 priv->abyEEPROM);
899 if (status != STATUS_SUCCESS)
900 return false;
901
902 /* zonetype initial */
903 priv->byOriginalZonetype = priv->abyEEPROM[EEP_OFS_ZONETYPE];
904
905 if (priv->config_file.ZoneType >= 0) {
906 if ((priv->config_file.ZoneType == 0) &&
907 (priv->abyEEPROM[EEP_OFS_ZONETYPE] != 0x00)) {
908 priv->abyEEPROM[EEP_OFS_ZONETYPE] = 0;
909 priv->abyEEPROM[EEP_OFS_MAXCHANNEL] = 0x0B;
7b1f9eef
MP
910
911 dev_dbg(&priv->usb->dev, "Init Zone Type :USA\n");
9b89b049
MP
912 } else if ((priv->config_file.ZoneType == 1) &&
913 (priv->abyEEPROM[EEP_OFS_ZONETYPE] != 0x01)) {
914 priv->abyEEPROM[EEP_OFS_ZONETYPE] = 0x01;
915 priv->abyEEPROM[EEP_OFS_MAXCHANNEL] = 0x0D;
7b1f9eef
MP
916
917 dev_dbg(&priv->usb->dev, "Init Zone Type :Japan\n");
9b89b049
MP
918 } else if ((priv->config_file.ZoneType == 2) &&
919 (priv->abyEEPROM[EEP_OFS_ZONETYPE] != 0x02)) {
920 priv->abyEEPROM[EEP_OFS_ZONETYPE] = 0x02;
921 priv->abyEEPROM[EEP_OFS_MAXCHANNEL] = 0x0D;
7b1f9eef
MP
922
923 dev_dbg(&priv->usb->dev, "Init Zone Type :Europe\n");
9b89b049
MP
924 } else {
925 if (priv->config_file.ZoneType !=
926 priv->abyEEPROM[EEP_OFS_ZONETYPE])
927 printk("zonetype in file[%02x]\
928 mismatch with in EEPROM[%02x]\n",
929 priv->config_file.ZoneType,
930 priv->abyEEPROM[EEP_OFS_ZONETYPE]);
931 else
932 printk("Read Zonetype file success,\
933 use default zonetype setting[%02x]\n",
934 priv->config_file.ZoneType);
935 }
936 }
92b96797 937
9b89b049
MP
938 if (!priv->bZoneRegExist)
939 priv->byZoneType = priv->abyEEPROM[EEP_OFS_ZONETYPE];
940
941 priv->byRFType = priv->abyEEPROM[EEP_OFS_RFTYPE];
942
7b1f9eef 943 dev_dbg(&priv->usb->dev, "Zone Type %x\n", priv->byZoneType);
9b89b049 944
7b1f9eef 945 dev_dbg(&priv->usb->dev, "RF Type %d\n", priv->byRFType);
9b89b049
MP
946
947 if ((priv->byRFType == RF_AL2230) ||
948 (priv->byRFType == RF_AL2230S)) {
949 priv->byBBRxConf = abyVT3184_AL2230[10];
4237fe4f 950 length = sizeof(abyVT3184_AL2230);
9b89b049
MP
951 addr = abyVT3184_AL2230;
952 agc = abyVT3184_AGC;
4237fe4f 953 length_agc = sizeof(abyVT3184_AGC);
9b89b049
MP
954
955 priv->abyBBVGA[0] = 0x1C;
956 priv->abyBBVGA[1] = 0x10;
957 priv->abyBBVGA[2] = 0x0;
958 priv->abyBBVGA[3] = 0x0;
959 priv->ldBmThreshold[0] = -70;
960 priv->ldBmThreshold[1] = -48;
961 priv->ldBmThreshold[2] = 0;
962 priv->ldBmThreshold[3] = 0;
963 } else if (priv->byRFType == RF_AIROHA7230) {
964 priv->byBBRxConf = abyVT3184_AL2230[10];
4237fe4f 965 length = sizeof(abyVT3184_AL2230);
9b89b049
MP
966 addr = abyVT3184_AL2230;
967 agc = abyVT3184_AGC;
4237fe4f 968 length_agc = sizeof(abyVT3184_AGC);
9b89b049
MP
969
970 addr[0xd7] = 0x06;
971
972 priv->abyBBVGA[0] = 0x1c;
973 priv->abyBBVGA[1] = 0x10;
974 priv->abyBBVGA[2] = 0x0;
975 priv->abyBBVGA[3] = 0x0;
976 priv->ldBmThreshold[0] = -70;
977 priv->ldBmThreshold[1] = -48;
978 priv->ldBmThreshold[2] = 0;
979 priv->ldBmThreshold[3] = 0;
980 } else if ((priv->byRFType == RF_VT3226) ||
981 (priv->byRFType == RF_VT3226D0)) {
982 priv->byBBRxConf = abyVT3184_VT3226D0[10];
4237fe4f 983 length = sizeof(abyVT3184_VT3226D0);
9b89b049
MP
984 addr = abyVT3184_VT3226D0;
985 agc = abyVT3184_AGC;
4237fe4f 986 length_agc = sizeof(abyVT3184_AGC);
9b89b049
MP
987
988 priv->abyBBVGA[0] = 0x20;
989 priv->abyBBVGA[1] = 0x10;
990 priv->abyBBVGA[2] = 0x0;
991 priv->abyBBVGA[3] = 0x0;
992 priv->ldBmThreshold[0] = -70;
993 priv->ldBmThreshold[1] = -48;
994 priv->ldBmThreshold[2] = 0;
995 priv->ldBmThreshold[3] = 0;
996 /* Fix VT3226 DFC system timing issue */
997 MACvRegBitsOn(priv, MAC_REG_SOFTPWRCTL2, SOFTPWRCTL_RFLEOPT);
998 } else if ((priv->byRFType == RF_VT3342A0)) {
999 priv->byBBRxConf = abyVT3184_VT3226D0[10];
4237fe4f 1000 length = sizeof(abyVT3184_VT3226D0);
9b89b049
MP
1001 addr = abyVT3184_VT3226D0;
1002 agc = abyVT3184_AGC;
4237fe4f 1003 length_agc = sizeof(abyVT3184_AGC);
9b89b049
MP
1004
1005 priv->abyBBVGA[0] = 0x20;
1006 priv->abyBBVGA[1] = 0x10;
1007 priv->abyBBVGA[2] = 0x0;
1008 priv->abyBBVGA[3] = 0x0;
1009 priv->ldBmThreshold[0] = -70;
1010 priv->ldBmThreshold[1] = -48;
1011 priv->ldBmThreshold[2] = 0;
1012 priv->ldBmThreshold[3] = 0;
1013 /* Fix VT3226 DFC system timing issue */
1014 MACvRegBitsOn(priv, MAC_REG_SOFTPWRCTL2, SOFTPWRCTL_RFLEOPT);
1015 } else {
1016 return true;
1017 }
92b96797 1018
4237fe4f 1019 memcpy(array, addr, length);
92b96797 1020
1390b02a 1021 vnt_control_out(priv, MESSAGE_TYPE_WRITE, 0,
4237fe4f 1022 MESSAGE_REQUEST_BBREG, length, array);
9b89b049 1023
4237fe4f 1024 memcpy(array, agc, length_agc);
9b89b049 1025
1390b02a 1026 vnt_control_out(priv, MESSAGE_TYPE_WRITE, 0,
4237fe4f 1027 MESSAGE_REQUEST_BBAGC, length_agc, array);
9b89b049
MP
1028
1029 if ((priv->byRFType == RF_VT3226) ||
1030 (priv->byRFType == RF_VT3342A0)) {
285d58c4 1031 vnt_control_out_u8(priv, MESSAGE_REQUEST_MACREG,
9b89b049
MP
1032 MAC_REG_ITRTMSET, 0x23);
1033 MACvRegBitsOn(priv, MAC_REG_PAPEDELAY, 0x01);
1034 } else if (priv->byRFType == RF_VT3226D0) {
285d58c4 1035 vnt_control_out_u8(priv, MESSAGE_REQUEST_MACREG,
9b89b049
MP
1036 MAC_REG_ITRTMSET, 0x11);
1037 MACvRegBitsOn(priv, MAC_REG_PAPEDELAY, 0x01);
1038 }
1039
285d58c4
MP
1040 vnt_control_out_u8(priv, MESSAGE_REQUEST_BBREG, 0x04, 0x7f);
1041 vnt_control_out_u8(priv, MESSAGE_REQUEST_BBREG, 0x0d, 0x01);
92b96797 1042
c49d7550 1043 vnt_rf_table_download(priv);
9df68292
MP
1044
1045 /* Fix for TX USB resets from vendors driver */
441c21c3 1046 vnt_control_in(priv, MESSAGE_TYPE_READ, USB_REG4,
9df68292
MP
1047 MESSAGE_REQUEST_MEM, sizeof(data), &data);
1048
1049 data |= 0x2;
1050
1390b02a 1051 vnt_control_out(priv, MESSAGE_TYPE_WRITE, USB_REG4,
9df68292
MP
1052 MESSAGE_REQUEST_MEM, sizeof(data), &data);
1053
9b89b049 1054 return true;
92b96797
FB
1055}
1056
92b96797
FB
1057/*
1058 * Description: Set ShortSlotTime mode
1059 *
1060 * Parameters:
1061 * In:
4bdb3120 1062 * priv - Device Structure
92b96797
FB
1063 * Out:
1064 * none
1065 *
1066 * Return Value: none
1067 *
1068 */
4bdb3120 1069void BBvSetShortSlotTime(struct vnt_private *priv)
92b96797 1070{
4bdb3120 1071 u8 bb_vga = 0;
92b96797 1072
4bdb3120
MP
1073 if (priv->bShortSlotTime)
1074 priv->byBBRxConf &= 0xdf;
f001d7e2 1075 else
4bdb3120
MP
1076 priv->byBBRxConf |= 0x20;
1077
53742906 1078 vnt_control_in_u8(priv, MESSAGE_REQUEST_BBREG, 0xe7, &bb_vga);
92b96797 1079
4bdb3120
MP
1080 if (bb_vga == priv->abyBBVGA[0])
1081 priv->byBBRxConf |= 0x20;
92b96797 1082
285d58c4 1083 vnt_control_out_u8(priv, MESSAGE_REQUEST_BBREG, 0x0a, priv->byBBRxConf);
92b96797
FB
1084}
1085
15897f67 1086void BBvSetVGAGainOffset(struct vnt_private *priv, u8 data)
92b96797
FB
1087{
1088
285d58c4 1089 vnt_control_out_u8(priv, MESSAGE_REQUEST_BBREG, 0xE7, data);
92b96797 1090
15897f67
MP
1091 /* patch for 3253B0 Baseband with Cardbus module */
1092 if (priv->bShortSlotTime)
1093 priv->byBBRxConf &= 0xdf; /* 1101 1111 */
f001d7e2 1094 else
15897f67 1095 priv->byBBRxConf |= 0x20; /* 0010 0000 */
f001d7e2 1096
285d58c4 1097 vnt_control_out_u8(priv, MESSAGE_REQUEST_BBREG, 0x0a, priv->byBBRxConf);
92b96797
FB
1098}
1099
92b96797
FB
1100/*
1101 * Description: BBvSetDeepSleep
1102 *
1103 * Parameters:
1104 * In:
07c116f2 1105 * priv - Device Structure
92b96797
FB
1106 * Out:
1107 * none
1108 *
1109 * Return Value: none
1110 *
1111 */
07c116f2 1112void BBvSetDeepSleep(struct vnt_private *priv)
92b96797 1113{
285d58c4
MP
1114 vnt_control_out_u8(priv, MESSAGE_REQUEST_BBREG, 0x0c, 0x17);/* CR12 */
1115 vnt_control_out_u8(priv, MESSAGE_REQUEST_BBREG, 0x0d, 0xB9);/* CR13 */
92b96797
FB
1116}
1117
36c69f3c 1118void BBvExitDeepSleep(struct vnt_private *priv)
92b96797 1119{
285d58c4
MP
1120 vnt_control_out_u8(priv, MESSAGE_REQUEST_BBREG, 0x0c, 0x00);/* CR12 */
1121 vnt_control_out_u8(priv, MESSAGE_REQUEST_BBREG, 0x0d, 0x01);/* CR13 */
92b96797
FB
1122}
1123
19440266 1124void BBvUpdatePreEDThreshold(struct vnt_private *priv, int scanning)
92b96797 1125{
7794dad6 1126 u8 cr_201 = 0x0, cr_206 = 0x0;
19440266
MP
1127 u8 ed_inx = priv->byBBPreEDIndex;
1128
1129 switch (priv->byRFType) {
1130 case RF_AL2230:
1131 case RF_AL2230S:
1132 case RF_AIROHA7230:
1133 if (scanning) { /* Max sensitivity */
1134 ed_inx = 0;
1135 cr_206 = 0x30;
1136 break;
1137 }
92b96797 1138
19440266
MP
1139 if (priv->byBBPreEDRSSI <= 45) {
1140 ed_inx = 20;
1141 cr_201 = 0xff;
1142 } else if (priv->byBBPreEDRSSI <= 46) {
1143 ed_inx = 19;
1144 cr_201 = 0x1a;
1145 } else if (priv->byBBPreEDRSSI <= 47) {
1146 ed_inx = 18;
1147 cr_201 = 0x15;
1148 } else if (priv->byBBPreEDRSSI <= 49) {
1149 ed_inx = 17;
1150 cr_201 = 0xe;
1151 } else if (priv->byBBPreEDRSSI <= 51) {
1152 ed_inx = 16;
1153 cr_201 = 0x9;
1154 } else if (priv->byBBPreEDRSSI <= 53) {
1155 ed_inx = 15;
1156 cr_201 = 0x6;
1157 } else if (priv->byBBPreEDRSSI <= 55) {
1158 ed_inx = 14;
1159 cr_201 = 0x3;
1160 } else if (priv->byBBPreEDRSSI <= 56) {
1161 ed_inx = 13;
1162 cr_201 = 0x2;
1163 cr_206 = 0xa0;
1164 } else if (priv->byBBPreEDRSSI <= 57) {
1165 ed_inx = 12;
1166 cr_201 = 0x2;
1167 cr_206 = 0x20;
1168 } else if (priv->byBBPreEDRSSI <= 58) {
1169 ed_inx = 11;
1170 cr_201 = 0x1;
1171 cr_206 = 0xa0;
1172 } else if (priv->byBBPreEDRSSI <= 59) {
1173 ed_inx = 10;
1174 cr_201 = 0x1;
1175 cr_206 = 0x54;
1176 } else if (priv->byBBPreEDRSSI <= 60) {
1177 ed_inx = 9;
1178 cr_201 = 0x1;
1179 cr_206 = 0x18;
1180 } else if (priv->byBBPreEDRSSI <= 61) {
1181 ed_inx = 8;
1182 cr_206 = 0xe3;
1183 } else if (priv->byBBPreEDRSSI <= 62) {
1184 ed_inx = 7;
1185 cr_206 = 0xb9;
1186 } else if (priv->byBBPreEDRSSI <= 63) {
1187 ed_inx = 6;
1188 cr_206 = 0x93;
1189 } else if (priv->byBBPreEDRSSI <= 64) {
1190 ed_inx = 5;
1191 cr_206 = 0x79;
1192 } else if (priv->byBBPreEDRSSI <= 65) {
1193 ed_inx = 4;
1194 cr_206 = 0x62;
1195 } else if (priv->byBBPreEDRSSI <= 66) {
1196 ed_inx = 3;
1197 cr_206 = 0x51;
1198 } else if (priv->byBBPreEDRSSI <= 67) {
1199 ed_inx = 2;
1200 cr_206 = 0x43;
1201 } else if (priv->byBBPreEDRSSI <= 68) {
1202 ed_inx = 1;
1203 cr_206 = 0x36;
1204 } else {
1205 ed_inx = 0;
1206 cr_206 = 0x30;
1207 }
1208 break;
92b96797 1209
19440266
MP
1210 case RF_VT3226:
1211 case RF_VT3226D0:
1212 if (scanning) { /* Max sensitivity */
1213 ed_inx = 0;
1214 cr_206 = 0x24;
1215 break;
1216 }
92b96797 1217
19440266
MP
1218 if (priv->byBBPreEDRSSI <= 41) {
1219 ed_inx = 22;
1220 cr_201 = 0xff;
1221 } else if (priv->byBBPreEDRSSI <= 42) {
1222 ed_inx = 21;
1223 cr_201 = 0x36;
1224 } else if (priv->byBBPreEDRSSI <= 43) {
1225 ed_inx = 20;
1226 cr_201 = 0x26;
1227 } else if (priv->byBBPreEDRSSI <= 45) {
1228 ed_inx = 19;
1229 cr_201 = 0x18;
1230 } else if (priv->byBBPreEDRSSI <= 47) {
1231 ed_inx = 18;
1232 cr_201 = 0x11;
1233 } else if (priv->byBBPreEDRSSI <= 49) {
1234 ed_inx = 17;
1235 cr_201 = 0xa;
1236 } else if (priv->byBBPreEDRSSI <= 51) {
1237 ed_inx = 16;
1238 cr_201 = 0x7;
1239 } else if (priv->byBBPreEDRSSI <= 53) {
1240 ed_inx = 15;
1241 cr_201 = 0x4;
1242 } else if (priv->byBBPreEDRSSI <= 55) {
1243 ed_inx = 14;
1244 cr_201 = 0x2;
1245 cr_206 = 0xc0;
1246 } else if (priv->byBBPreEDRSSI <= 56) {
1247 ed_inx = 13;
1248 cr_201 = 0x2;
1249 cr_206 = 0x30;
1250 } else if (priv->byBBPreEDRSSI <= 57) {
1251 ed_inx = 12;
1252 cr_201 = 0x1;
1253 cr_206 = 0xb0;
1254 } else if (priv->byBBPreEDRSSI <= 58) {
1255 ed_inx = 11;
1256 cr_201 = 0x1;
1257 cr_206 = 0x70;
1258 } else if (priv->byBBPreEDRSSI <= 59) {
1259 ed_inx = 10;
1260 cr_201 = 0x1;
1261 cr_206 = 0x30;
1262 } else if (priv->byBBPreEDRSSI <= 60) {
1263 ed_inx = 9;
1264 cr_206 = 0xea;
1265 } else if (priv->byBBPreEDRSSI <= 61) {
1266 ed_inx = 8;
1267 cr_206 = 0xc0;
1268 } else if (priv->byBBPreEDRSSI <= 62) {
1269 ed_inx = 7;
1270 cr_206 = 0x9c;
1271 } else if (priv->byBBPreEDRSSI <= 63) {
1272 ed_inx = 6;
1273 cr_206 = 0x80;
1274 } else if (priv->byBBPreEDRSSI <= 64) {
1275 ed_inx = 5;
1276 cr_206 = 0x68;
1277 } else if (priv->byBBPreEDRSSI <= 65) {
1278 ed_inx = 4;
1279 cr_206 = 0x52;
1280 } else if (priv->byBBPreEDRSSI <= 66) {
1281 ed_inx = 3;
1282 cr_206 = 0x43;
1283 } else if (priv->byBBPreEDRSSI <= 67) {
1284 ed_inx = 2;
1285 cr_206 = 0x36;
1286 } else if (priv->byBBPreEDRSSI <= 68) {
1287 ed_inx = 1;
1288 cr_206 = 0x2d;
1289 } else {
1290 ed_inx = 0;
1291 cr_206 = 0x24;
1292 }
1293 break;
92b96797 1294
19440266
MP
1295 case RF_VT3342A0:
1296 if (scanning) { /* need Max sensitivity */
1297 ed_inx = 0;
1298 cr_206 = 0x38;
1299 break;
1300 }
92b96797 1301
19440266
MP
1302 if (priv->byBBPreEDRSSI <= 41) {
1303 ed_inx = 20;
1304 cr_201 = 0xff;
1305 } else if (priv->byBBPreEDRSSI <= 42) {
1306 ed_inx = 19;
1307 cr_201 = 0x36;
1308 } else if (priv->byBBPreEDRSSI <= 43) {
1309 ed_inx = 18;
1310 cr_201 = 0x26;
1311 } else if (priv->byBBPreEDRSSI <= 45) {
1312 ed_inx = 17;
1313 cr_201 = 0x18;
1314 } else if (priv->byBBPreEDRSSI <= 47) {
1315 ed_inx = 16;
1316 cr_201 = 0x11;
1317 } else if (priv->byBBPreEDRSSI <= 49) {
1318 ed_inx = 15;
1319 cr_201 = 0xa;
1320 } else if (priv->byBBPreEDRSSI <= 51) {
1321 ed_inx = 14;
1322 cr_201 = 0x7;
1323 } else if (priv->byBBPreEDRSSI <= 53) {
1324 ed_inx = 13;
1325 cr_201 = 0x4;
1326 } else if (priv->byBBPreEDRSSI <= 55) {
1327 ed_inx = 12;
1328 cr_201 = 0x2;
1329 cr_206 = 0xc0;
1330 } else if (priv->byBBPreEDRSSI <= 56) {
1331 ed_inx = 11;
1332 cr_201 = 0x2;
1333 cr_206 = 0x30;
1334 } else if (priv->byBBPreEDRSSI <= 57) {
1335 ed_inx = 10;
1336 cr_201 = 0x1;
1337 cr_206 = 0xb0;
1338 } else if (priv->byBBPreEDRSSI <= 58) {
1339 ed_inx = 9;
1340 cr_201 = 0x1;
1341 cr_206 = 0x70;
1342 } else if (priv->byBBPreEDRSSI <= 59) {
1343 ed_inx = 8;
1344 cr_201 = 0x1;
1345 cr_206 = 0x30;
1346 } else if (priv->byBBPreEDRSSI <= 60) {
1347 ed_inx = 7;
1348 cr_206 = 0xea;
1349 } else if (priv->byBBPreEDRSSI <= 61) {
1350 ed_inx = 6;
1351 cr_206 = 0xc0;
1352 } else if (priv->byBBPreEDRSSI <= 62) {
1353 ed_inx = 5;
1354 cr_206 = 0x9c;
1355 } else if (priv->byBBPreEDRSSI <= 63) {
1356 ed_inx = 4;
1357 cr_206 = 0x80;
1358 } else if (priv->byBBPreEDRSSI <= 64) {
1359 ed_inx = 3;
1360 cr_206 = 0x68;
1361 } else if (priv->byBBPreEDRSSI <= 65) {
1362 ed_inx = 2;
1363 cr_206 = 0x52;
1364 } else if (priv->byBBPreEDRSSI <= 66) {
1365 ed_inx = 1;
1366 cr_206 = 0x43;
1367 } else {
1368 ed_inx = 0;
1369 cr_206 = 0x38;
1370 }
1371 break;
92b96797 1372
19440266 1373 }
92b96797 1374
19440266 1375 if (ed_inx == priv->byBBPreEDIndex && !scanning)
6d5485af
MP
1376 return;
1377
19440266 1378 priv->byBBPreEDIndex = ed_inx;
6d5485af 1379
19440266
MP
1380 dev_dbg(&priv->usb->dev, "%s byBBPreEDRSSI %d\n",
1381 __func__, priv->byBBPreEDRSSI);
0b7021f5 1382
7794dad6
MP
1383 if (!cr_201 && !cr_206)
1384 return;
1385
285d58c4
MP
1386 vnt_control_out_u8(priv, MESSAGE_REQUEST_BBREG, 0xc9, cr_201);
1387 vnt_control_out_u8(priv, MESSAGE_REQUEST_BBREG, 0xce, cr_206);
92b96797
FB
1388}
1389
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