Commit | Line | Data |
---|---|---|
1da177e4 | 1 | /* |
1da177e4 LT |
2 | * Driver for the serial port on the 21285 StrongArm-110 core logic chip. |
3 | * | |
4 | * Based on drivers/char/serial.c | |
1da177e4 | 5 | */ |
1da177e4 LT |
6 | #include <linux/module.h> |
7 | #include <linux/tty.h> | |
8 | #include <linux/ioport.h> | |
9 | #include <linux/init.h> | |
10 | #include <linux/console.h> | |
11 | #include <linux/device.h> | |
12 | #include <linux/tty_flip.h> | |
13 | #include <linux/serial_core.h> | |
14 | #include <linux/serial.h> | |
99730225 | 15 | #include <linux/io.h> |
1da177e4 | 16 | |
1da177e4 LT |
17 | #include <asm/irq.h> |
18 | #include <asm/mach-types.h> | |
9f97da78 | 19 | #include <asm/system_info.h> |
1da177e4 | 20 | #include <asm/hardware/dec21285.h> |
a09e64fb | 21 | #include <mach/hardware.h> |
1da177e4 LT |
22 | |
23 | #define BAUD_BASE (mem_fclk_21285/64) | |
24 | ||
25 | #define SERIAL_21285_NAME "ttyFB" | |
26 | #define SERIAL_21285_MAJOR 204 | |
27 | #define SERIAL_21285_MINOR 4 | |
28 | ||
29 | #define RXSTAT_DUMMY_READ 0x80000000 | |
30 | #define RXSTAT_FRAME (1 << 0) | |
31 | #define RXSTAT_PARITY (1 << 1) | |
32 | #define RXSTAT_OVERRUN (1 << 2) | |
33 | #define RXSTAT_ANYERR (RXSTAT_FRAME|RXSTAT_PARITY|RXSTAT_OVERRUN) | |
34 | ||
35 | #define H_UBRLCR_BREAK (1 << 0) | |
36 | #define H_UBRLCR_PARENB (1 << 1) | |
37 | #define H_UBRLCR_PAREVN (1 << 2) | |
38 | #define H_UBRLCR_STOPB (1 << 3) | |
39 | #define H_UBRLCR_FIFO (1 << 4) | |
40 | ||
41 | static const char serial21285_name[] = "Footbridge UART"; | |
42 | ||
43 | #define tx_enabled(port) ((port)->unused[0]) | |
44 | #define rx_enabled(port) ((port)->unused[1]) | |
45 | ||
46 | /* | |
47 | * The documented expression for selecting the divisor is: | |
48 | * BAUD_BASE / baud - 1 | |
49 | * However, typically BAUD_BASE is not divisible by baud, so | |
50 | * we want to select the divisor that gives us the minimum | |
51 | * error. Therefore, we want: | |
52 | * int(BAUD_BASE / baud - 0.5) -> | |
53 | * int(BAUD_BASE / baud - (baud >> 1) / baud) -> | |
54 | * int((BAUD_BASE - (baud >> 1)) / baud) | |
55 | */ | |
56 | ||
b129a8cc | 57 | static void serial21285_stop_tx(struct uart_port *port) |
1da177e4 LT |
58 | { |
59 | if (tx_enabled(port)) { | |
cc20b900 | 60 | disable_irq_nosync(IRQ_CONTX); |
1da177e4 LT |
61 | tx_enabled(port) = 0; |
62 | } | |
63 | } | |
64 | ||
b129a8cc | 65 | static void serial21285_start_tx(struct uart_port *port) |
1da177e4 LT |
66 | { |
67 | if (!tx_enabled(port)) { | |
68 | enable_irq(IRQ_CONTX); | |
69 | tx_enabled(port) = 1; | |
70 | } | |
71 | } | |
72 | ||
73 | static void serial21285_stop_rx(struct uart_port *port) | |
74 | { | |
75 | if (rx_enabled(port)) { | |
cc20b900 | 76 | disable_irq_nosync(IRQ_CONRX); |
1da177e4 LT |
77 | rx_enabled(port) = 0; |
78 | } | |
79 | } | |
80 | ||
81 | static void serial21285_enable_ms(struct uart_port *port) | |
82 | { | |
83 | } | |
84 | ||
7d12e780 | 85 | static irqreturn_t serial21285_rx_chars(int irq, void *dev_id) |
1da177e4 LT |
86 | { |
87 | struct uart_port *port = dev_id; | |
ebd2c8f6 | 88 | struct tty_struct *tty = port->state->port.tty; |
1da177e4 LT |
89 | unsigned int status, ch, flag, rxs, max_count = 256; |
90 | ||
91 | status = *CSR_UARTFLG; | |
92 | while (!(status & 0x10) && max_count--) { | |
1da177e4 LT |
93 | ch = *CSR_UARTDR; |
94 | flag = TTY_NORMAL; | |
95 | port->icount.rx++; | |
96 | ||
97 | rxs = *CSR_RXSTAT | RXSTAT_DUMMY_READ; | |
45849282 | 98 | if (unlikely(rxs & RXSTAT_ANYERR)) { |
1da177e4 LT |
99 | if (rxs & RXSTAT_PARITY) |
100 | port->icount.parity++; | |
101 | else if (rxs & RXSTAT_FRAME) | |
102 | port->icount.frame++; | |
103 | if (rxs & RXSTAT_OVERRUN) | |
104 | port->icount.overrun++; | |
105 | ||
106 | rxs &= port->read_status_mask; | |
107 | ||
108 | if (rxs & RXSTAT_PARITY) | |
109 | flag = TTY_PARITY; | |
110 | else if (rxs & RXSTAT_FRAME) | |
111 | flag = TTY_FRAME; | |
112 | } | |
113 | ||
05ab3014 RK |
114 | uart_insert_char(port, rxs, RXSTAT_OVERRUN, ch, flag); |
115 | ||
1da177e4 LT |
116 | status = *CSR_UARTFLG; |
117 | } | |
118 | tty_flip_buffer_push(tty); | |
119 | ||
120 | return IRQ_HANDLED; | |
121 | } | |
122 | ||
7d12e780 | 123 | static irqreturn_t serial21285_tx_chars(int irq, void *dev_id) |
1da177e4 LT |
124 | { |
125 | struct uart_port *port = dev_id; | |
ebd2c8f6 | 126 | struct circ_buf *xmit = &port->state->xmit; |
1da177e4 LT |
127 | int count = 256; |
128 | ||
129 | if (port->x_char) { | |
130 | *CSR_UARTDR = port->x_char; | |
131 | port->icount.tx++; | |
132 | port->x_char = 0; | |
133 | goto out; | |
134 | } | |
135 | if (uart_circ_empty(xmit) || uart_tx_stopped(port)) { | |
b129a8cc | 136 | serial21285_stop_tx(port); |
1da177e4 LT |
137 | goto out; |
138 | } | |
139 | ||
140 | do { | |
141 | *CSR_UARTDR = xmit->buf[xmit->tail]; | |
142 | xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1); | |
143 | port->icount.tx++; | |
144 | if (uart_circ_empty(xmit)) | |
145 | break; | |
146 | } while (--count > 0 && !(*CSR_UARTFLG & 0x20)); | |
147 | ||
148 | if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS) | |
149 | uart_write_wakeup(port); | |
150 | ||
151 | if (uart_circ_empty(xmit)) | |
b129a8cc | 152 | serial21285_stop_tx(port); |
1da177e4 LT |
153 | |
154 | out: | |
155 | return IRQ_HANDLED; | |
156 | } | |
157 | ||
158 | static unsigned int serial21285_tx_empty(struct uart_port *port) | |
159 | { | |
160 | return (*CSR_UARTFLG & 8) ? 0 : TIOCSER_TEMT; | |
161 | } | |
162 | ||
163 | /* no modem control lines */ | |
164 | static unsigned int serial21285_get_mctrl(struct uart_port *port) | |
165 | { | |
166 | return TIOCM_CAR | TIOCM_DSR | TIOCM_CTS; | |
167 | } | |
168 | ||
169 | static void serial21285_set_mctrl(struct uart_port *port, unsigned int mctrl) | |
170 | { | |
171 | } | |
172 | ||
173 | static void serial21285_break_ctl(struct uart_port *port, int break_state) | |
174 | { | |
175 | unsigned long flags; | |
176 | unsigned int h_lcr; | |
177 | ||
178 | spin_lock_irqsave(&port->lock, flags); | |
179 | h_lcr = *CSR_H_UBRLCR; | |
180 | if (break_state) | |
181 | h_lcr |= H_UBRLCR_BREAK; | |
182 | else | |
183 | h_lcr &= ~H_UBRLCR_BREAK; | |
184 | *CSR_H_UBRLCR = h_lcr; | |
185 | spin_unlock_irqrestore(&port->lock, flags); | |
186 | } | |
187 | ||
188 | static int serial21285_startup(struct uart_port *port) | |
189 | { | |
190 | int ret; | |
191 | ||
192 | tx_enabled(port) = 1; | |
193 | rx_enabled(port) = 1; | |
194 | ||
195 | ret = request_irq(IRQ_CONRX, serial21285_rx_chars, 0, | |
196 | serial21285_name, port); | |
197 | if (ret == 0) { | |
198 | ret = request_irq(IRQ_CONTX, serial21285_tx_chars, 0, | |
199 | serial21285_name, port); | |
200 | if (ret) | |
201 | free_irq(IRQ_CONRX, port); | |
202 | } | |
203 | ||
204 | return ret; | |
205 | } | |
206 | ||
207 | static void serial21285_shutdown(struct uart_port *port) | |
208 | { | |
209 | free_irq(IRQ_CONTX, port); | |
210 | free_irq(IRQ_CONRX, port); | |
211 | } | |
212 | ||
213 | static void | |
606d099c AC |
214 | serial21285_set_termios(struct uart_port *port, struct ktermios *termios, |
215 | struct ktermios *old) | |
1da177e4 LT |
216 | { |
217 | unsigned long flags; | |
eab4f5af | 218 | unsigned int baud, quot, h_lcr, b; |
1da177e4 LT |
219 | |
220 | /* | |
221 | * We don't support modem control lines. | |
222 | */ | |
223 | termios->c_cflag &= ~(HUPCL | CRTSCTS | CMSPAR); | |
224 | termios->c_cflag |= CLOCAL; | |
225 | ||
226 | /* | |
227 | * We don't support BREAK character recognition. | |
228 | */ | |
229 | termios->c_iflag &= ~(IGNBRK | BRKINT); | |
230 | ||
231 | /* | |
232 | * Ask the core to calculate the divisor for us. | |
233 | */ | |
234 | baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16); | |
235 | quot = uart_get_divisor(port, baud); | |
eab4f5af AC |
236 | b = port->uartclk / (16 * quot); |
237 | tty_termios_encode_baud_rate(termios, b, b); | |
2f65baff | 238 | |
1da177e4 LT |
239 | switch (termios->c_cflag & CSIZE) { |
240 | case CS5: | |
241 | h_lcr = 0x00; | |
242 | break; | |
243 | case CS6: | |
244 | h_lcr = 0x20; | |
245 | break; | |
246 | case CS7: | |
247 | h_lcr = 0x40; | |
248 | break; | |
249 | default: /* CS8 */ | |
250 | h_lcr = 0x60; | |
251 | break; | |
252 | } | |
253 | ||
254 | if (termios->c_cflag & CSTOPB) | |
255 | h_lcr |= H_UBRLCR_STOPB; | |
256 | if (termios->c_cflag & PARENB) { | |
257 | h_lcr |= H_UBRLCR_PARENB; | |
258 | if (!(termios->c_cflag & PARODD)) | |
259 | h_lcr |= H_UBRLCR_PAREVN; | |
260 | } | |
261 | ||
262 | if (port->fifosize) | |
263 | h_lcr |= H_UBRLCR_FIFO; | |
264 | ||
265 | spin_lock_irqsave(&port->lock, flags); | |
266 | ||
267 | /* | |
268 | * Update the per-port timeout. | |
269 | */ | |
270 | uart_update_timeout(port, termios->c_cflag, baud); | |
271 | ||
272 | /* | |
273 | * Which character status flags are we interested in? | |
274 | */ | |
275 | port->read_status_mask = RXSTAT_OVERRUN; | |
276 | if (termios->c_iflag & INPCK) | |
277 | port->read_status_mask |= RXSTAT_FRAME | RXSTAT_PARITY; | |
278 | ||
279 | /* | |
280 | * Which character status flags should we ignore? | |
281 | */ | |
282 | port->ignore_status_mask = 0; | |
283 | if (termios->c_iflag & IGNPAR) | |
284 | port->ignore_status_mask |= RXSTAT_FRAME | RXSTAT_PARITY; | |
285 | if (termios->c_iflag & IGNBRK && termios->c_iflag & IGNPAR) | |
286 | port->ignore_status_mask |= RXSTAT_OVERRUN; | |
287 | ||
288 | /* | |
289 | * Ignore all characters if CREAD is not set. | |
290 | */ | |
291 | if ((termios->c_cflag & CREAD) == 0) | |
292 | port->ignore_status_mask |= RXSTAT_DUMMY_READ; | |
293 | ||
294 | quot -= 1; | |
295 | ||
296 | *CSR_UARTCON = 0; | |
297 | *CSR_L_UBRLCR = quot & 0xff; | |
298 | *CSR_M_UBRLCR = (quot >> 8) & 0x0f; | |
299 | *CSR_H_UBRLCR = h_lcr; | |
300 | *CSR_UARTCON = 1; | |
301 | ||
302 | spin_unlock_irqrestore(&port->lock, flags); | |
303 | } | |
304 | ||
305 | static const char *serial21285_type(struct uart_port *port) | |
306 | { | |
307 | return port->type == PORT_21285 ? "DC21285" : NULL; | |
308 | } | |
309 | ||
310 | static void serial21285_release_port(struct uart_port *port) | |
311 | { | |
312 | release_mem_region(port->mapbase, 32); | |
313 | } | |
314 | ||
315 | static int serial21285_request_port(struct uart_port *port) | |
316 | { | |
317 | return request_mem_region(port->mapbase, 32, serial21285_name) | |
318 | != NULL ? 0 : -EBUSY; | |
319 | } | |
320 | ||
321 | static void serial21285_config_port(struct uart_port *port, int flags) | |
322 | { | |
323 | if (flags & UART_CONFIG_TYPE && serial21285_request_port(port) == 0) | |
324 | port->type = PORT_21285; | |
325 | } | |
326 | ||
327 | /* | |
328 | * verify the new serial_struct (for TIOCSSERIAL). | |
329 | */ | |
330 | static int serial21285_verify_port(struct uart_port *port, struct serial_struct *ser) | |
331 | { | |
332 | int ret = 0; | |
333 | if (ser->type != PORT_UNKNOWN && ser->type != PORT_21285) | |
334 | ret = -EINVAL; | |
d4e33fac | 335 | if (ser->irq <= 0) |
1da177e4 LT |
336 | ret = -EINVAL; |
337 | if (ser->baud_base != port->uartclk / 16) | |
338 | ret = -EINVAL; | |
339 | return ret; | |
340 | } | |
341 | ||
342 | static struct uart_ops serial21285_ops = { | |
343 | .tx_empty = serial21285_tx_empty, | |
344 | .get_mctrl = serial21285_get_mctrl, | |
345 | .set_mctrl = serial21285_set_mctrl, | |
346 | .stop_tx = serial21285_stop_tx, | |
347 | .start_tx = serial21285_start_tx, | |
348 | .stop_rx = serial21285_stop_rx, | |
349 | .enable_ms = serial21285_enable_ms, | |
350 | .break_ctl = serial21285_break_ctl, | |
351 | .startup = serial21285_startup, | |
352 | .shutdown = serial21285_shutdown, | |
353 | .set_termios = serial21285_set_termios, | |
354 | .type = serial21285_type, | |
355 | .release_port = serial21285_release_port, | |
356 | .request_port = serial21285_request_port, | |
357 | .config_port = serial21285_config_port, | |
358 | .verify_port = serial21285_verify_port, | |
359 | }; | |
360 | ||
361 | static struct uart_port serial21285_port = { | |
362 | .mapbase = 0x42000160, | |
9b4a1617 | 363 | .iotype = UPIO_MEM, |
d4e33fac | 364 | .irq = 0, |
1da177e4 LT |
365 | .fifosize = 16, |
366 | .ops = &serial21285_ops, | |
ce8337cb | 367 | .flags = UPF_BOOT_AUTOCONF, |
1da177e4 LT |
368 | }; |
369 | ||
370 | static void serial21285_setup_ports(void) | |
371 | { | |
372 | serial21285_port.uartclk = mem_fclk_21285 / 4; | |
373 | } | |
374 | ||
375 | #ifdef CONFIG_SERIAL_21285_CONSOLE | |
d358788f RK |
376 | static void serial21285_console_putchar(struct uart_port *port, int ch) |
377 | { | |
378 | while (*CSR_UARTFLG & 0x20) | |
379 | barrier(); | |
380 | *CSR_UARTDR = ch; | |
381 | } | |
1da177e4 LT |
382 | |
383 | static void | |
384 | serial21285_console_write(struct console *co, const char *s, | |
385 | unsigned int count) | |
386 | { | |
d358788f | 387 | uart_console_write(&serial21285_port, s, count, serial21285_console_putchar); |
1da177e4 LT |
388 | } |
389 | ||
390 | static void __init | |
391 | serial21285_get_options(struct uart_port *port, int *baud, | |
392 | int *parity, int *bits) | |
393 | { | |
394 | if (*CSR_UARTCON == 1) { | |
395 | unsigned int tmp; | |
396 | ||
397 | tmp = *CSR_H_UBRLCR; | |
398 | switch (tmp & 0x60) { | |
399 | case 0x00: | |
400 | *bits = 5; | |
401 | break; | |
402 | case 0x20: | |
403 | *bits = 6; | |
404 | break; | |
405 | case 0x40: | |
406 | *bits = 7; | |
407 | break; | |
408 | default: | |
409 | case 0x60: | |
410 | *bits = 8; | |
411 | break; | |
412 | } | |
413 | ||
414 | if (tmp & H_UBRLCR_PARENB) { | |
415 | *parity = 'o'; | |
416 | if (tmp & H_UBRLCR_PAREVN) | |
417 | *parity = 'e'; | |
418 | } | |
419 | ||
420 | tmp = *CSR_L_UBRLCR | (*CSR_M_UBRLCR << 8); | |
421 | ||
422 | *baud = port->uartclk / (16 * (tmp + 1)); | |
423 | } | |
424 | } | |
425 | ||
426 | static int __init serial21285_console_setup(struct console *co, char *options) | |
427 | { | |
428 | struct uart_port *port = &serial21285_port; | |
429 | int baud = 9600; | |
430 | int bits = 8; | |
431 | int parity = 'n'; | |
432 | int flow = 'n'; | |
433 | ||
434 | if (machine_is_personal_server()) | |
435 | baud = 57600; | |
436 | ||
437 | /* | |
438 | * Check whether an invalid uart number has been specified, and | |
439 | * if so, search for the first available port that does have | |
440 | * console support. | |
441 | */ | |
442 | if (options) | |
443 | uart_parse_options(options, &baud, &parity, &bits, &flow); | |
444 | else | |
445 | serial21285_get_options(port, &baud, &parity, &bits); | |
446 | ||
447 | return uart_set_options(port, co, baud, parity, bits, flow); | |
448 | } | |
449 | ||
2d93486c | 450 | static struct uart_driver serial21285_reg; |
1da177e4 LT |
451 | |
452 | static struct console serial21285_console = | |
453 | { | |
454 | .name = SERIAL_21285_NAME, | |
455 | .write = serial21285_console_write, | |
456 | .device = uart_console_device, | |
457 | .setup = serial21285_console_setup, | |
458 | .flags = CON_PRINTBUFFER, | |
459 | .index = -1, | |
460 | .data = &serial21285_reg, | |
461 | }; | |
462 | ||
463 | static int __init rs285_console_init(void) | |
464 | { | |
465 | serial21285_setup_ports(); | |
466 | register_console(&serial21285_console); | |
467 | return 0; | |
468 | } | |
469 | console_initcall(rs285_console_init); | |
470 | ||
471 | #define SERIAL_21285_CONSOLE &serial21285_console | |
472 | #else | |
473 | #define SERIAL_21285_CONSOLE NULL | |
474 | #endif | |
475 | ||
476 | static struct uart_driver serial21285_reg = { | |
477 | .owner = THIS_MODULE, | |
478 | .driver_name = "ttyFB", | |
479 | .dev_name = "ttyFB", | |
1da177e4 LT |
480 | .major = SERIAL_21285_MAJOR, |
481 | .minor = SERIAL_21285_MINOR, | |
482 | .nr = 1, | |
483 | .cons = SERIAL_21285_CONSOLE, | |
484 | }; | |
485 | ||
486 | static int __init serial21285_init(void) | |
487 | { | |
488 | int ret; | |
489 | ||
d87a6d95 | 490 | printk(KERN_INFO "Serial: 21285 driver\n"); |
1da177e4 LT |
491 | |
492 | serial21285_setup_ports(); | |
493 | ||
494 | ret = uart_register_driver(&serial21285_reg); | |
495 | if (ret == 0) | |
496 | uart_add_one_port(&serial21285_reg, &serial21285_port); | |
497 | ||
498 | return ret; | |
499 | } | |
500 | ||
501 | static void __exit serial21285_exit(void) | |
502 | { | |
503 | uart_remove_one_port(&serial21285_reg, &serial21285_port); | |
504 | uart_unregister_driver(&serial21285_reg); | |
505 | } | |
506 | ||
507 | module_init(serial21285_init); | |
508 | module_exit(serial21285_exit); | |
509 | ||
510 | MODULE_LICENSE("GPL"); | |
d87a6d95 | 511 | MODULE_DESCRIPTION("Intel Footbridge (21285) serial driver"); |
1da177e4 | 512 | MODULE_ALIAS_CHARDEV(SERIAL_21285_MAJOR, SERIAL_21285_MINOR); |