[deliverable/linux.git] / drivers / tty / serial / clps711x.c

/*
 *  Driver for CLPS711x serial ports
 *
 *  Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o.
 *
 *  Copyright 1999 ARM Limited
 *  Copyright (C) 2000 Deep Blue Solutions Ltd.
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or
 * (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
 */

#if defined(CONFIG_SERIAL_CLPS711X_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
#define SUPPORT_SYSRQ
#endif

#include <linux/module.h>
#include <linux/ioport.h>
#include <linux/init.h>
#include <linux/console.h>
#include <linux/sysrq.h>
#include <linux/spinlock.h>
#include <linux/device.h>
#include <linux/tty.h>
#include <linux/tty_flip.h>
#include <linux/serial_core.h>
#include <linux/serial.h>
#include <linux/io.h>
#include <linux/platform_device.h>

#include <mach/hardware.h>
#include <asm/irq.h>

#define UART_CLPS711X_NAME	"uart-clps711x"

#define UART_NR		2

#define SERIAL_CLPS711X_MAJOR	204
#define SERIAL_CLPS711X_MINOR	40
#define SERIAL_CLPS711X_NR	UART_NR

/*
 * We use the relevant SYSCON register as a base address for these ports.
 */
#define UBRLCR(port)		((port)->iobase + UBRLCR1 - SYSCON1)
#define UARTDR(port)		((port)->iobase + UARTDR1 - SYSCON1)
#define SYSFLG(port)		((port)->iobase + SYSFLG1 - SYSCON1)
#define SYSCON(port)		((port)->iobase + SYSCON1 - SYSCON1)

#define TX_IRQ(port)		((port)->irq)
#define RX_IRQ(port)		((port)->irq + 1)

#define UART_ANY_ERR		(UARTDR_FRMERR | UARTDR_PARERR | UARTDR_OVERR)

#define tx_enabled(port)	((port)->unused[0])

static void clps711xuart_stop_tx(struct uart_port *port)
{
	if (tx_enabled(port)) {
		disable_irq(TX_IRQ(port));
		tx_enabled(port) = 0;
	}
}

static void clps711xuart_start_tx(struct uart_port *port)
{
	if (!tx_enabled(port)) {
		enable_irq(TX_IRQ(port));
		tx_enabled(port) = 1;
	}
}

static void clps711xuart_stop_rx(struct uart_port *port)
{
	disable_irq(RX_IRQ(port));
}

static void clps711xuart_enable_ms(struct uart_port *port)
{
}

static irqreturn_t clps711xuart_int_rx(int irq, void *dev_id)
{
	struct uart_port *port = dev_id;
	struct tty_struct *tty = port->state->port.tty;
	unsigned int status, ch, flg;

	status = clps_readl(SYSFLG(port));
	while (!(status & SYSFLG_URXFE)) {
		ch = clps_readl(UARTDR(port));

		port->icount.rx++;

		flg = TTY_NORMAL;

		/*
		 * Note that the error handling code is
		 * out of the main execution path
		 */
		if (unlikely(ch & UART_ANY_ERR)) {
			if (ch & UARTDR_PARERR)
				port->icount.parity++;
			else if (ch & UARTDR_FRMERR)
				port->icount.frame++;
			if (ch & UARTDR_OVERR)
				port->icount.overrun++;

			ch &= port->read_status_mask;

			if (ch & UARTDR_PARERR)
				flg = TTY_PARITY;
			else if (ch & UARTDR_FRMERR)
				flg = TTY_FRAME;

#ifdef SUPPORT_SYSRQ
			port->sysrq = 0;
#endif
		}

		if (uart_handle_sysrq_char(port, ch))
			goto ignore_char;

		/*
		 * CHECK: does overrun affect the current character?
		 * ASSUMPTION: it does not.
		 */
		uart_insert_char(port, ch, UARTDR_OVERR, ch, flg);

	ignore_char:
		status = clps_readl(SYSFLG(port));
	}
	tty_flip_buffer_push(tty);
	return IRQ_HANDLED;
}

static irqreturn_t clps711xuart_int_tx(int irq, void *dev_id)
{
	struct uart_port *port = dev_id;
	struct circ_buf *xmit = &port->state->xmit;
	int count;

	if (port->x_char) {
		clps_writel(port->x_char, UARTDR(port));
		port->icount.tx++;
		port->x_char = 0;
		return IRQ_HANDLED;
	}

	if (uart_circ_empty(xmit) || uart_tx_stopped(port))
		goto disable_tx_irq;

	count = port->fifosize >> 1;
	do {
		clps_writel(xmit->buf[xmit->tail], UARTDR(port));
		xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
		port->icount.tx++;
		if (uart_circ_empty(xmit))
			break;
	} while (--count > 0);

	if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
		uart_write_wakeup(port);

	if (uart_circ_empty(xmit)) {
	disable_tx_irq:
		disable_irq_nosync(TX_IRQ(port));
		tx_enabled(port) = 0;
	}

	return IRQ_HANDLED;
}

static unsigned int clps711xuart_tx_empty(struct uart_port *port)
{
	unsigned int status = clps_readl(SYSFLG(port));
	return status & SYSFLG_UBUSY ? 0 : TIOCSER_TEMT;
}

static unsigned int clps711xuart_get_mctrl(struct uart_port *port)
{
	unsigned int port_addr;
	unsigned int result = 0;
	unsigned int status;

	port_addr = SYSFLG(port);
	if (port_addr == SYSFLG1) {
		status = clps_readl(SYSFLG1);
		if (status & SYSFLG1_DCD)
			result |= TIOCM_CAR;
		if (status & SYSFLG1_DSR)
			result |= TIOCM_DSR;
		if (status & SYSFLG1_CTS)
			result |= TIOCM_CTS;
	}

	return result;
}

static void
clps711xuart_set_mctrl_null(struct uart_port *port, unsigned int mctrl)
{
}

static void clps711xuart_break_ctl(struct uart_port *port, int break_state)
{
	unsigned long flags;
	unsigned int ubrlcr;

	spin_lock_irqsave(&port->lock, flags);
	ubrlcr = clps_readl(UBRLCR(port));
	if (break_state == -1)
		ubrlcr |= UBRLCR_BREAK;
	else
		ubrlcr &= ~UBRLCR_BREAK;
	clps_writel(ubrlcr, UBRLCR(port));
	spin_unlock_irqrestore(&port->lock, flags);
}

static int clps711xuart_startup(struct uart_port *port)
{
	unsigned int syscon;
	int retval;

	tx_enabled(port) = 1;

	/*
	 * Allocate the IRQs
	 */
	retval = request_irq(TX_IRQ(port), clps711xuart_int_tx, 0,
			     "clps711xuart_tx", port);
	if (retval)
		return retval;

	retval = request_irq(RX_IRQ(port), clps711xuart_int_rx, 0,
			     "clps711xuart_rx", port);
	if (retval) {
		free_irq(TX_IRQ(port), port);
		return retval;
	}

	/*
	 * enable the port
	 */
	syscon = clps_readl(SYSCON(port));
	syscon |= SYSCON_UARTEN;
	clps_writel(syscon, SYSCON(port));

	return 0;
}

static void clps711xuart_shutdown(struct uart_port *port)
{
	unsigned int ubrlcr, syscon;

	/*
	 * Free the interrupt
	 */
	free_irq(TX_IRQ(port), port);	/* TX interrupt */
	free_irq(RX_IRQ(port), port);	/* RX interrupt */

	/*
	 * disable the port
	 */
	syscon = clps_readl(SYSCON(port));
	syscon &= ~SYSCON_UARTEN;
	clps_writel(syscon, SYSCON(port));

	/*
	 * disable break condition and fifos
	 */
	ubrlcr = clps_readl(UBRLCR(port));
	ubrlcr &= ~(UBRLCR_FIFOEN | UBRLCR_BREAK);
	clps_writel(ubrlcr, UBRLCR(port));
}

static void
clps711xuart_set_termios(struct uart_port *port, struct ktermios *termios,
			 struct ktermios *old)
{
	unsigned int ubrlcr, baud, quot;
	unsigned long flags;

	/*
	 * We don't implement CREAD.
	 */
	termios->c_cflag |= CREAD;

	/*
	 * Ask the core to calculate the divisor for us.
	 */
	baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16); 
	quot = uart_get_divisor(port, baud);

	switch (termios->c_cflag & CSIZE) {
	case CS5:
		ubrlcr = UBRLCR_WRDLEN5;
		break;
	case CS6:
		ubrlcr = UBRLCR_WRDLEN6;
		break;
	case CS7:
		ubrlcr = UBRLCR_WRDLEN7;
		break;
	default: // CS8
		ubrlcr = UBRLCR_WRDLEN8;
		break;
	}
	if (termios->c_cflag & CSTOPB)
		ubrlcr |= UBRLCR_XSTOP;
	if (termios->c_cflag & PARENB) {
		ubrlcr |= UBRLCR_PRTEN;
		if (!(termios->c_cflag & PARODD))
			ubrlcr |= UBRLCR_EVENPRT;
	}
	if (port->fifosize > 1)
		ubrlcr |= UBRLCR_FIFOEN;

	spin_lock_irqsave(&port->lock, flags);

	/*
	 * Update the per-port timeout.
	 */
	uart_update_timeout(port, termios->c_cflag, baud);

	port->read_status_mask = UARTDR_OVERR;
	if (termios->c_iflag & INPCK)
		port->read_status_mask |= UARTDR_PARERR | UARTDR_FRMERR;

	/*
	 * Characters to ignore
	 */
	port->ignore_status_mask = 0;
	if (termios->c_iflag & IGNPAR)
		port->ignore_status_mask |= UARTDR_FRMERR | UARTDR_PARERR;
	if (termios->c_iflag & IGNBRK) {
		/*
		 * If we're ignoring parity and break indicators,
		 * ignore overruns to (for real raw support).
		 */
		if (termios->c_iflag & IGNPAR)
			port->ignore_status_mask |= UARTDR_OVERR;
	}

	quot -= 1;

	clps_writel(ubrlcr | quot, UBRLCR(port));

	spin_unlock_irqrestore(&port->lock, flags);
}

static const char *clps711xuart_type(struct uart_port *port)
{
	return port->type == PORT_CLPS711X ? "CLPS711x" : NULL;
}

/*
 * Configure/autoconfigure the port.
 */
static void clps711xuart_config_port(struct uart_port *port, int flags)
{
	if (flags & UART_CONFIG_TYPE)
		port->type = PORT_CLPS711X;
}

static void clps711xuart_release_port(struct uart_port *port)
{
}

static int clps711xuart_request_port(struct uart_port *port)
{
	return 0;
}

static struct uart_ops clps711x_pops = {
	.tx_empty	= clps711xuart_tx_empty,
	.set_mctrl	= clps711xuart_set_mctrl_null,
	.get_mctrl	= clps711xuart_get_mctrl,
	.stop_tx	= clps711xuart_stop_tx,
	.start_tx	= clps711xuart_start_tx,
	.stop_rx	= clps711xuart_stop_rx,
	.enable_ms	= clps711xuart_enable_ms,
	.break_ctl	= clps711xuart_break_ctl,
	.startup	= clps711xuart_startup,
	.shutdown	= clps711xuart_shutdown,
	.set_termios	= clps711xuart_set_termios,
	.type		= clps711xuart_type,
	.config_port	= clps711xuart_config_port,
	.release_port	= clps711xuart_release_port,
	.request_port	= clps711xuart_request_port,
};

static struct uart_port clps711x_ports[UART_NR] = {
	{
		.iobase		= SYSCON1,
		.irq		= IRQ_UTXINT1, /* IRQ_URXINT1, IRQ_UMSINT */
		.uartclk	= 3686400,
		.fifosize	= 16,
		.ops		= &clps711x_pops,
		.line		= 0,
		.flags		= UPF_BOOT_AUTOCONF,
	},
	{
		.iobase		= SYSCON2,
		.irq		= IRQ_UTXINT2, /* IRQ_URXINT2 */
		.uartclk	= 3686400,
		.fifosize	= 16,
		.ops		= &clps711x_pops,
		.line		= 1,
		.flags		= UPF_BOOT_AUTOCONF,
	}
};

#ifdef CONFIG_SERIAL_CLPS711X_CONSOLE
static void clps711xuart_console_putchar(struct uart_port *port, int ch)
{
	while (clps_readl(SYSFLG(port)) & SYSFLG_UTXFF)
		barrier();
	clps_writel(ch, UARTDR(port));
}

/*
 *	Print a string to the serial port trying not to disturb
 *	any possible real use of the port...
 *
 *	The console_lock must be held when we get here.
 *
 *	Note that this is called with interrupts already disabled
 */
static void
clps711xuart_console_write(struct console *co, const char *s,
			   unsigned int count)
{
	struct uart_port *port = clps711x_ports + co->index;
	unsigned int status, syscon;

	/*
	 *	Ensure that the port is enabled.
	 */
	syscon = clps_readl(SYSCON(port));
	clps_writel(syscon | SYSCON_UARTEN, SYSCON(port));

	uart_console_write(port, s, count, clps711xuart_console_putchar);

	/*
	 *	Finally, wait for transmitter to become empty
	 *	and restore the uart state.
	 */
	do {
		status = clps_readl(SYSFLG(port));
	} while (status & SYSFLG_UBUSY);

	clps_writel(syscon, SYSCON(port));
}

static void __init
clps711xuart_console_get_options(struct uart_port *port, int *baud,
				 int *parity, int *bits)
{
	if (clps_readl(SYSCON(port)) & SYSCON_UARTEN) {
		unsigned int ubrlcr, quot;

		ubrlcr = clps_readl(UBRLCR(port));

		*parity = 'n';
		if (ubrlcr & UBRLCR_PRTEN) {
			if (ubrlcr & UBRLCR_EVENPRT)
				*parity = 'e';
			else
				*parity = 'o';
		}

		if ((ubrlcr & UBRLCR_WRDLEN_MASK) == UBRLCR_WRDLEN7)
			*bits = 7;
		else
			*bits = 8;

		quot = ubrlcr & UBRLCR_BAUD_MASK;
		*baud = port->uartclk / (16 * (quot + 1));
	}
}

static int __init clps711xuart_console_setup(struct console *co, char *options)
{
	struct uart_port *port;
	int baud = 38400;
	int bits = 8;
	int parity = 'n';
	int flow = 'n';

	/*
	 * Check whether an invalid uart number has been specified, and
	 * if so, search for the first available port that does have
	 * console support.
	 */
	port = uart_get_console(clps711x_ports, UART_NR, co);

	if (options)
		uart_parse_options(options, &baud, &parity, &bits, &flow);
	else
		clps711xuart_console_get_options(port, &baud, &parity, &bits);

	return uart_set_options(port, co, baud, parity, bits, flow);
}

static struct uart_driver clps711x_reg;
static struct console clps711x_console = {
	.name		= "ttyCL",
	.write		= clps711xuart_console_write,
	.device		= uart_console_device,
	.setup		= clps711xuart_console_setup,
	.flags		= CON_PRINTBUFFER,
	.index		= -1,
	.data		= &clps711x_reg,
};

static int __init clps711xuart_console_init(void)
{
	register_console(&clps711x_console);
	return 0;
}
console_initcall(clps711xuart_console_init);

#define CLPS711X_CONSOLE	&clps711x_console
#else
#define CLPS711X_CONSOLE	NULL
#endif

static struct uart_driver clps711x_reg = {
	.driver_name		= "ttyCL",
	.dev_name		= "ttyCL",
	.major			= SERIAL_CLPS711X_MAJOR,
	.minor			= SERIAL_CLPS711X_MINOR,
	.nr			= UART_NR,

	.cons			= CLPS711X_CONSOLE,
};

static int __devinit uart_clps711x_probe(struct platform_device *pdev)
{
	int ret, i;

	printk(KERN_INFO "Serial: CLPS711x driver\n");

	ret = uart_register_driver(&clps711x_reg);
	if (ret)
		return ret;

	for (i = 0; i < UART_NR; i++)
		uart_add_one_port(&clps711x_reg, &clps711x_ports[i]);

	return 0;
}

static int __devexit uart_clps711x_remove(struct platform_device *pdev)
{
	int i;

	for (i = 0; i < UART_NR; i++)
		uart_remove_one_port(&clps711x_reg, &clps711x_ports[i]);

	uart_unregister_driver(&clps711x_reg);

	return 0;
}

static struct platform_driver clps711x_uart_driver = {
	.driver = {
		.name	= UART_CLPS711X_NAME,
		.owner	= THIS_MODULE,
	},
	.probe	= uart_clps711x_probe,
	.remove	= __devexit_p(uart_clps711x_remove),
};
module_platform_driver(clps711x_uart_driver);

static struct platform_device clps711x_uart_device = {
	.name	= UART_CLPS711X_NAME,
};

static int __init uart_clps711x_init(void)
{
	return platform_device_register(&clps711x_uart_device);
}
module_init(uart_clps711x_init);

static void __exit uart_clps711x_exit(void)
{
	platform_device_unregister(&clps711x_uart_device);
}
module_exit(uart_clps711x_exit);

MODULE_AUTHOR("Deep Blue Solutions Ltd");
MODULE_DESCRIPTION("CLPS711X serial driver");
MODULE_LICENSE("GPL");
Commit	Line	Data
1da177e4	1	/*
1da177e4 LT	2	* Driver for CLPS711x serial ports
	3	*
	4	* Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o.
	5	*
	6	* Copyright 1999 ARM Limited
	7	* Copyright (C) 2000 Deep Blue Solutions Ltd.
	8	*
	9	* This program is free software; you can redistribute it and/or modify
	10	* it under the terms of the GNU General Public License as published by
	11	* the Free Software Foundation; either version 2 of the License, or
	12	* (at your option) any later version.
	13	*
	14	* This program is distributed in the hope that it will be useful,
	15	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	16	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	17	* GNU General Public License for more details.
	18	*
	19	* You should have received a copy of the GNU General Public License
	20	* along with this program; if not, write to the Free Software
	21	* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
1da177e4	22	*/
1da177e4 LT	23
	24	#if defined(CONFIG_SERIAL_CLPS711X_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
	25	#define SUPPORT_SYSRQ
	26	#endif
	27
	28	#include <linux/module.h>
	29	#include <linux/ioport.h>
	30	#include <linux/init.h>
	31	#include <linux/console.h>
	32	#include <linux/sysrq.h>
	33	#include <linux/spinlock.h>
	34	#include <linux/device.h>
	35	#include <linux/tty.h>
	36	#include <linux/tty_flip.h>
	37	#include <linux/serial_core.h>
	38	#include <linux/serial.h>
99730225	39	#include <linux/io.h>
95113728	40	#include <linux/platform_device.h>
1da177e4	41
a09e64fb	42	#include <mach/hardware.h>
1da177e4	43	#include <asm/irq.h>
1da177e4	44
95113728 AS	45	#define UART_CLPS711X_NAME "uart-clps711x"
95113728 AS	46
1da177e4 LT	47	#define UART_NR 2
	48
	49	#define SERIAL_CLPS711X_MAJOR 204
	50	#define SERIAL_CLPS711X_MINOR 40
	51	#define SERIAL_CLPS711X_NR UART_NR
	52
	53	/*
	54	* We use the relevant SYSCON register as a base address for these ports.
	55	*/
	56	#define UBRLCR(port) ((port)->iobase + UBRLCR1 - SYSCON1)
	57	#define UARTDR(port) ((port)->iobase + UARTDR1 - SYSCON1)
	58	#define SYSFLG(port) ((port)->iobase + SYSFLG1 - SYSCON1)
	59	#define SYSCON(port) ((port)->iobase + SYSCON1 - SYSCON1)
	60
	61	#define TX_IRQ(port) ((port)->irq)
	62	#define RX_IRQ(port) ((port)->irq + 1)
	63
	64	#define UART_ANY_ERR (UARTDR_FRMERR \| UARTDR_PARERR \| UARTDR_OVERR)
	65
	66	#define tx_enabled(port) ((port)->unused[0])
	67
b129a8cc	68	static void clps711xuart_stop_tx(struct uart_port *port)
1da177e4 LT	69	{
	70	if (tx_enabled(port)) {
	71	disable_irq(TX_IRQ(port));
	72	tx_enabled(port) = 0;
	73	}
	74	}
	75
b129a8cc	76	static void clps711xuart_start_tx(struct uart_port *port)
1da177e4 LT	77	{
	78	if (!tx_enabled(port)) {
	79	enable_irq(TX_IRQ(port));
	80	tx_enabled(port) = 1;
	81	}
	82	}
	83
	84	static void clps711xuart_stop_rx(struct uart_port *port)
	85	{
	86	disable_irq(RX_IRQ(port));
	87	}
	88
	89	static void clps711xuart_enable_ms(struct uart_port *port)
	90	{
	91	}
	92
7d12e780	93	static irqreturn_t clps711xuart_int_rx(int irq, void *dev_id)
1da177e4 LT	94	{
1da177e4 LT	95	struct uart_port *port = dev_id;
ebd2c8f6	96	struct tty_struct *tty = port->state->port.tty;
f9937242	97	unsigned int status, ch, flg;
1da177e4 LT	98
	99	status = clps_readl(SYSFLG(port));
	100	while (!(status & SYSFLG_URXFE)) {
	101	ch = clps_readl(UARTDR(port));
	102
1da177e4 LT	103	port->icount.rx++;
	104
	105	flg = TTY_NORMAL;
	106
	107	/*
	108	* Note that the error handling code is
	109	* out of the main execution path
	110	*/
2a9604b8 RK	111	if (unlikely(ch & UART_ANY_ERR)) {
	112	if (ch & UARTDR_PARERR)
	113	port->icount.parity++;
	114	else if (ch & UARTDR_FRMERR)
	115	port->icount.frame++;
	116	if (ch & UARTDR_OVERR)
	117	port->icount.overrun++;
1da177e4	118
2a9604b8	119	ch &= port->read_status_mask;
1da177e4	120
2a9604b8 RK	121	if (ch & UARTDR_PARERR)
	122	flg = TTY_PARITY;
	123	else if (ch & UARTDR_FRMERR)
	124	flg = TTY_FRAME;
1da177e4	125
2a9604b8 RK	126	#ifdef SUPPORT_SYSRQ
	127	port->sysrq = 0;
	128	#endif
	129	}
1da177e4	130
7d12e780	131	if (uart_handle_sysrq_char(port, ch))
2a9604b8	132	goto ignore_char;
1da177e4	133
1da177e4 LT	134	/*
	135	* CHECK: does overrun affect the current character?
	136	* ASSUMPTION: it does not.
	137	*/
05ab3014	138	uart_insert_char(port, ch, UARTDR_OVERR, ch, flg);
2a9604b8 RK	139
	140	ignore_char:
	141	status = clps_readl(SYSFLG(port));
1da177e4	142	}
2a9604b8 RK	143	tty_flip_buffer_push(tty);
2a9604b8 RK	144	return IRQ_HANDLED;
1da177e4 LT	145	}
1da177e4 LT	146
7d12e780	147	static irqreturn_t clps711xuart_int_tx(int irq, void *dev_id)
1da177e4 LT	148	{
1da177e4 LT	149	struct uart_port *port = dev_id;
ebd2c8f6	150	struct circ_buf *xmit = &port->state->xmit;
1da177e4 LT	151	int count;
	152
	153	if (port->x_char) {
	154	clps_writel(port->x_char, UARTDR(port));
	155	port->icount.tx++;
	156	port->x_char = 0;
	157	return IRQ_HANDLED;
	158	}
7a6fbc9a AS	159
	160	if (uart_circ_empty(xmit) \|\| uart_tx_stopped(port))
	161	goto disable_tx_irq;
1da177e4 LT	162
	163	count = port->fifosize >> 1;
	164	do {
	165	clps_writel(xmit->buf[xmit->tail], UARTDR(port));
	166	xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
	167	port->icount.tx++;
	168	if (uart_circ_empty(xmit))
	169	break;
	170	} while (--count > 0);
	171
	172	if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
	173	uart_write_wakeup(port);
	174
7a6fbc9a AS	175	if (uart_circ_empty(xmit)) {
	176	disable_tx_irq:
	177	disable_irq_nosync(TX_IRQ(port));
	178	tx_enabled(port) = 0;
	179	}
1da177e4 LT	180
	181	return IRQ_HANDLED;
	182	}
	183
	184	static unsigned int clps711xuart_tx_empty(struct uart_port *port)
	185	{
	186	unsigned int status = clps_readl(SYSFLG(port));
	187	return status & SYSFLG_UBUSY ? 0 : TIOCSER_TEMT;
	188	}
	189
	190	static unsigned int clps711xuart_get_mctrl(struct uart_port *port)
	191	{
	192	unsigned int port_addr;
	193	unsigned int result = 0;
	194	unsigned int status;
	195
	196	port_addr = SYSFLG(port);
	197	if (port_addr == SYSFLG1) {
	198	status = clps_readl(SYSFLG1);
	199	if (status & SYSFLG1_DCD)
	200	result \|= TIOCM_CAR;
	201	if (status & SYSFLG1_DSR)
	202	result \|= TIOCM_DSR;
	203	if (status & SYSFLG1_CTS)
	204	result \|= TIOCM_CTS;
	205	}
	206
	207	return result;
	208	}
	209
	210	static void
	211	clps711xuart_set_mctrl_null(struct uart_port *port, unsigned int mctrl)
	212	{
	213	}
	214
	215	static void clps711xuart_break_ctl(struct uart_port *port, int break_state)
	216	{
	217	unsigned long flags;
	218	unsigned int ubrlcr;
	219
	220	spin_lock_irqsave(&port->lock, flags);
	221	ubrlcr = clps_readl(UBRLCR(port));
	222	if (break_state == -1)
	223	ubrlcr \|= UBRLCR_BREAK;
	224	else
	225	ubrlcr &= ~UBRLCR_BREAK;
	226	clps_writel(ubrlcr, UBRLCR(port));
	227	spin_unlock_irqrestore(&port->lock, flags);
	228	}
	229
	230	static int clps711xuart_startup(struct uart_port *port)
	231	{
	232	unsigned int syscon;
	233	int retval;
	234
	235	tx_enabled(port) = 1;
	236
	237	/*
	238	* Allocate the IRQs
	239	*/
	240	retval = request_irq(TX_IRQ(port), clps711xuart_int_tx, 0,
	241	"clps711xuart_tx", port);
	242	if (retval)
	243	return retval;
244
245	retval = request_irq(RX_IRQ(port), clps711xuart_int_rx, 0,
246	"clps711xuart_rx", port);
247	if (retval) {
248	free_irq(TX_IRQ(port), port);
249	return retval;
250	}
251
252	/*
253	* enable the port
254	*/
255	syscon = clps_readl(SYSCON(port));
256	syscon \|= SYSCON_UARTEN;
257	clps_writel(syscon, SYSCON(port));
258
259	return 0;
260	}
261
262	static void clps711xuart_shutdown(struct uart_port *port)
263	{
264	unsigned int ubrlcr, syscon;
265
266	/*
267	* Free the interrupt
268	*/
269	free_irq(TX_IRQ(port), port); /* TX interrupt */
270	free_irq(RX_IRQ(port), port); /* RX interrupt */
271
272	/*
273	* disable the port
274	*/
275	syscon = clps_readl(SYSCON(port));
276	syscon &= ~SYSCON_UARTEN;
277	clps_writel(syscon, SYSCON(port));
278
279	/*
280	* disable break condition and fifos
281	*/
282	ubrlcr = clps_readl(UBRLCR(port));
283	ubrlcr &= ~(UBRLCR_FIFOEN \| UBRLCR_BREAK);
284	clps_writel(ubrlcr, UBRLCR(port));
285	}
286
287	static void
606d099c AC	288	clps711xuart_set_termios(struct uart_port port, struct ktermios termios,
606d099c AC	289	struct ktermios *old)
1da177e4 LT	290	{
	291	unsigned int ubrlcr, baud, quot;
	292	unsigned long flags;
	293
	294	/*
	295	* We don't implement CREAD.
	296	*/
	297	termios->c_cflag \|= CREAD;
	298
	299	/*
	300	* Ask the core to calculate the divisor for us.
	301	*/
	302	baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16);
	303	quot = uart_get_divisor(port, baud);
	304
	305	switch (termios->c_cflag & CSIZE) {
	306	case CS5:
	307	ubrlcr = UBRLCR_WRDLEN5;
	308	break;
	309	case CS6:
	310	ubrlcr = UBRLCR_WRDLEN6;
	311	break;
	312	case CS7:
	313	ubrlcr = UBRLCR_WRDLEN7;
	314	break;
	315	default: // CS8
	316	ubrlcr = UBRLCR_WRDLEN8;
	317	break;
	318	}
	319	if (termios->c_cflag & CSTOPB)
	320	ubrlcr \|= UBRLCR_XSTOP;
	321	if (termios->c_cflag & PARENB) {
	322	ubrlcr \|= UBRLCR_PRTEN;
	323	if (!(termios->c_cflag & PARODD))
	324	ubrlcr \|= UBRLCR_EVENPRT;
	325	}
	326	if (port->fifosize > 1)
	327	ubrlcr \|= UBRLCR_FIFOEN;
	328
	329	spin_lock_irqsave(&port->lock, flags);
	330
	331	/*
	332	* Update the per-port timeout.
	333	*/
	334	uart_update_timeout(port, termios->c_cflag, baud);
	335
	336	port->read_status_mask = UARTDR_OVERR;
	337	if (termios->c_iflag & INPCK)
	338	port->read_status_mask \|= UARTDR_PARERR \| UARTDR_FRMERR;
	339
	340	/*
	341	* Characters to ignore
	342	*/
	343	port->ignore_status_mask = 0;
	344	if (termios->c_iflag & IGNPAR)
	345	port->ignore_status_mask \|= UARTDR_FRMERR \| UARTDR_PARERR;
	346	if (termios->c_iflag & IGNBRK) {
	347	/*
	348	* If we're ignoring parity and break indicators,
	349	* ignore overruns to (for real raw support).
	350	*/
	351	if (termios->c_iflag & IGNPAR)
	352	port->ignore_status_mask \|= UARTDR_OVERR;
	353	}
354
355	quot -= 1;
356
357	clps_writel(ubrlcr \| quot, UBRLCR(port));
358
359	spin_unlock_irqrestore(&port->lock, flags);
360	}
361
362	static const char clps711xuart_type(struct uart_port port)
363	{
364	return port->type == PORT_CLPS711X ? "CLPS711x" : NULL;
365	}
366
367	/*
368	* Configure/autoconfigure the port.
369	*/
370	static void clps711xuart_config_port(struct uart_port *port, int flags)
371	{
372	if (flags & UART_CONFIG_TYPE)
373	port->type = PORT_CLPS711X;
374	}
375
376	static void clps711xuart_release_port(struct uart_port *port)
377	{
378	}
379
380	static int clps711xuart_request_port(struct uart_port *port)
381	{
382	return 0;
383	}
384
385	static struct uart_ops clps711x_pops = {
386	.tx_empty = clps711xuart_tx_empty,
387	.set_mctrl = clps711xuart_set_mctrl_null,
388	.get_mctrl = clps711xuart_get_mctrl,
389	.stop_tx = clps711xuart_stop_tx,
390	.start_tx = clps711xuart_start_tx,
391	.stop_rx = clps711xuart_stop_rx,
392	.enable_ms = clps711xuart_enable_ms,
393	.break_ctl = clps711xuart_break_ctl,
394	.startup = clps711xuart_startup,
395	.shutdown = clps711xuart_shutdown,
396	.set_termios = clps711xuart_set_termios,
397	.type = clps711xuart_type,
398	.config_port = clps711xuart_config_port,
399	.release_port = clps711xuart_release_port,
400	.request_port = clps711xuart_request_port,
401	};
402
403	static struct uart_port clps711x_ports[UART_NR] = {
404	{
405	.iobase = SYSCON1,
406	.irq = IRQ_UTXINT1, /* IRQ_URXINT1, IRQ_UMSINT */
407	.uartclk = 3686400,
408	.fifosize = 16,
409	.ops = &clps711x_pops,
410	.line = 0,
ce8337cb	411	.flags = UPF_BOOT_AUTOCONF,
1da177e4 LT	412	},
	413	{
	414	.iobase = SYSCON2,
	415	.irq = IRQ_UTXINT2, /* IRQ_URXINT2 */
	416	.uartclk = 3686400,
	417	.fifosize = 16,
	418	.ops = &clps711x_pops,
	419	.line = 1,
ce8337cb	420	.flags = UPF_BOOT_AUTOCONF,
1da177e4 LT	421	}
	422	};
	423
	424	#ifdef CONFIG_SERIAL_CLPS711X_CONSOLE
d358788f RK	425	static void clps711xuart_console_putchar(struct uart_port *port, int ch)
	426	{
	427	while (clps_readl(SYSFLG(port)) & SYSFLG_UTXFF)
	428	barrier();
	429	clps_writel(ch, UARTDR(port));
	430	}
	431
1da177e4 LT	432	/*
	433	* Print a string to the serial port trying not to disturb
	434	* any possible real use of the port...
	435	*
	436	* The console_lock must be held when we get here.
	437	*
	438	* Note that this is called with interrupts already disabled
	439	*/
	440	static void
	441	clps711xuart_console_write(struct console co, const char s,
	442	unsigned int count)
	443	{
	444	struct uart_port *port = clps711x_ports + co->index;
	445	unsigned int status, syscon;
1da177e4 LT	446
	447	/*
	448	* Ensure that the port is enabled.
	449	*/
	450	syscon = clps_readl(SYSCON(port));
	451	clps_writel(syscon \| SYSCON_UARTEN, SYSCON(port));
	452
d358788f	453	uart_console_write(port, s, count, clps711xuart_console_putchar);
1da177e4 LT	454
	455	/*
	456	* Finally, wait for transmitter to become empty
	457	* and restore the uart state.
	458	*/
	459	do {
	460	status = clps_readl(SYSFLG(port));
	461	} while (status & SYSFLG_UBUSY);
	462
	463	clps_writel(syscon, SYSCON(port));
	464	}
	465
	466	static void __init
	467	clps711xuart_console_get_options(struct uart_port port, int baud,
	468	int parity, int bits)
	469	{
	470	if (clps_readl(SYSCON(port)) & SYSCON_UARTEN) {
	471	unsigned int ubrlcr, quot;
	472
	473	ubrlcr = clps_readl(UBRLCR(port));
	474
	475	*parity = 'n';
	476	if (ubrlcr & UBRLCR_PRTEN) {
	477	if (ubrlcr & UBRLCR_EVENPRT)
	478	*parity = 'e';
	479	else
	480	*parity = 'o';
	481	}
	482
	483	if ((ubrlcr & UBRLCR_WRDLEN_MASK) == UBRLCR_WRDLEN7)
	484	*bits = 7;
	485	else
	486	*bits = 8;
	487
	488	quot = ubrlcr & UBRLCR_BAUD_MASK;
	489	baud = port->uartclk / (16 (quot + 1));
	490	}
	491	}
	492
	493	static int __init clps711xuart_console_setup(struct console co, char options)
	494	{
	495	struct uart_port *port;
	496	int baud = 38400;
	497	int bits = 8;
	498	int parity = 'n';
	499	int flow = 'n';
	500
	501	/*
	502	* Check whether an invalid uart number has been specified, and
	503	* if so, search for the first available port that does have
	504	* console support.
	505	*/
	506	port = uart_get_console(clps711x_ports, UART_NR, co);
	507
	508	if (options)
	509	uart_parse_options(options, &baud, &parity, &bits, &flow);
	510	else
	511	clps711xuart_console_get_options(port, &baud, &parity, &bits);
	512
	513	return uart_set_options(port, co, baud, parity, bits, flow);
	514	}
	515
2d93486c	516	static struct uart_driver clps711x_reg;
1da177e4 LT	517	static struct console clps711x_console = {
	518	.name = "ttyCL",
	519	.write = clps711xuart_console_write,
	520	.device = uart_console_device,
	521	.setup = clps711xuart_console_setup,
	522	.flags = CON_PRINTBUFFER,
	523	.index = -1,
	524	.data = &clps711x_reg,
	525	};
	526
	527	static int __init clps711xuart_console_init(void)
	528	{
	529	register_console(&clps711x_console);
	530	return 0;
	531	}
	532	console_initcall(clps711xuart_console_init);
	533
	534	#define CLPS711X_CONSOLE &clps711x_console
	535	#else
	536	#define CLPS711X_CONSOLE NULL
	537	#endif
	538
	539	static struct uart_driver clps711x_reg = {
	540	.driver_name = "ttyCL",
	541	.dev_name = "ttyCL",
	542	.major = SERIAL_CLPS711X_MAJOR,
	543	.minor = SERIAL_CLPS711X_MINOR,
	544	.nr = UART_NR,
	545
	546	.cons = CLPS711X_CONSOLE,
	547	};
	548
95113728	549	static int __devinit uart_clps711x_probe(struct platform_device *pdev)
1da177e4 LT	550	{
	551	int ret, i;
	552
d87a6d95	553	printk(KERN_INFO "Serial: CLPS711x driver\n");
1da177e4 LT	554
	555	ret = uart_register_driver(&clps711x_reg);
	556	if (ret)
	557	return ret;
	558
	559	for (i = 0; i < UART_NR; i++)
	560	uart_add_one_port(&clps711x_reg, &clps711x_ports[i]);
	561
	562	return 0;
	563	}
	564
95113728	565	static int __devexit uart_clps711x_remove(struct platform_device *pdev)
1da177e4 LT	566	{
	567	int i;
	568
	569	for (i = 0; i < UART_NR; i++)
	570	uart_remove_one_port(&clps711x_reg, &clps711x_ports[i]);
	571
	572	uart_unregister_driver(&clps711x_reg);
95113728 AS	573
95113728 AS	574	return 0;
1da177e4 LT	575	}
1da177e4 LT	576
95113728 AS	577	static struct platform_driver clps711x_uart_driver = {
	578	.driver = {
	579	.name = UART_CLPS711X_NAME,
	580	.owner = THIS_MODULE,
	581	},
	582	.probe = uart_clps711x_probe,
	583	.remove = __devexit_p(uart_clps711x_remove),
	584	};
	585	module_platform_driver(clps711x_uart_driver);
	586
	587	static struct platform_device clps711x_uart_device = {
	588	.name = UART_CLPS711X_NAME,
	589	};
	590
	591	static int __init uart_clps711x_init(void)
	592	{
	593	return platform_device_register(&clps711x_uart_device);
	594	}
	595	module_init(uart_clps711x_init);
	596
	597	static void __exit uart_clps711x_exit(void)
	598	{
	599	platform_device_unregister(&clps711x_uart_device);
	600	}
	601	module_exit(uart_clps711x_exit);
1da177e4 LT	602
1da177e4 LT	603	MODULE_AUTHOR("Deep Blue Solutions Ltd");
95113728	604	MODULE_DESCRIPTION("CLPS711X serial driver");
1da177e4	605	MODULE_LICENSE("GPL");