Commit | Line | Data |
---|---|---|
1da177e4 | 1 | /* |
1da177e4 LT |
2 | * Derived from many drivers using generic_serial interface, |
3 | * especially serial_tx3912.c by Steven J. Hill and r39xx_serial.c | |
4 | * (was in Linux/VR tree) by Jim Pick. | |
5 | * | |
6 | * Copyright (C) 1999 Harald Koerfgen | |
7 | * Copyright (C) 2000 Jim Pick <jim@jimpick.com> | |
8 | * Copyright (C) 2001 Steven J. Hill (sjhill@realitydiluted.com) | |
9 | * Copyright (C) 2000-2002 Toshiba Corporation | |
10 | * | |
11 | * This program is free software; you can redistribute it and/or modify | |
12 | * it under the terms of the GNU General Public License version 2 as | |
13 | * published by the Free Software Foundation. | |
14 | * | |
15 | * Serial driver for TX3927/TX4927/TX4925/TX4938 internal SIO controller | |
1da177e4 | 16 | */ |
1da177e4 LT |
17 | |
18 | #if defined(CONFIG_SERIAL_TXX9_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ) | |
19 | #define SUPPORT_SYSRQ | |
20 | #endif | |
21 | ||
22 | #include <linux/module.h> | |
23 | #include <linux/ioport.h> | |
24 | #include <linux/init.h> | |
25 | #include <linux/console.h> | |
1da177e4 | 26 | #include <linux/delay.h> |
0970769a | 27 | #include <linux/platform_device.h> |
1da177e4 | 28 | #include <linux/pci.h> |
1da177e4 LT |
29 | #include <linux/serial_core.h> |
30 | #include <linux/serial.h> | |
ee160a38 JS |
31 | #include <linux/tty.h> |
32 | #include <linux/tty_flip.h> | |
1da177e4 LT |
33 | |
34 | #include <asm/io.h> | |
1da177e4 | 35 | |
37a6c7d0 | 36 | static char *serial_version = "1.11"; |
1da177e4 LT |
37 | static char *serial_name = "TX39/49 Serial driver"; |
38 | ||
39 | #define PASS_LIMIT 256 | |
40 | ||
41 | #if !defined(CONFIG_SERIAL_TXX9_STDSERIAL) | |
42 | /* "ttyS" is used for standard serial driver */ | |
43 | #define TXX9_TTY_NAME "ttyTX" | |
07bafde3 AN |
44 | #define TXX9_TTY_MINOR_START 196 |
45 | #define TXX9_TTY_MAJOR 204 | |
1da177e4 LT |
46 | #else |
47 | /* acts like standard serial driver */ | |
48 | #define TXX9_TTY_NAME "ttyS" | |
1da177e4 | 49 | #define TXX9_TTY_MINOR_START 64 |
1da177e4 | 50 | #define TXX9_TTY_MAJOR TTY_MAJOR |
07bafde3 | 51 | #endif |
1da177e4 LT |
52 | |
53 | /* flag aliases */ | |
54 | #define UPF_TXX9_HAVE_CTS_LINE UPF_BUGGY_UART | |
55 | #define UPF_TXX9_USE_SCLK UPF_MAGIC_MULTIPLIER | |
56 | ||
57 | #ifdef CONFIG_PCI | |
58 | /* support for Toshiba TC86C001 SIO */ | |
59 | #define ENABLE_SERIAL_TXX9_PCI | |
60 | #endif | |
61 | ||
62 | /* | |
63 | * Number of serial ports | |
64 | */ | |
138c5d25 | 65 | #define UART_NR CONFIG_SERIAL_TXX9_NR_UARTS |
1da177e4 LT |
66 | |
67 | struct uart_txx9_port { | |
68 | struct uart_port port; | |
0970769a | 69 | /* No additional info for now */ |
1da177e4 LT |
70 | }; |
71 | ||
72 | #define TXX9_REGION_SIZE 0x24 | |
73 | ||
74 | /* TXX9 Serial Registers */ | |
75 | #define TXX9_SILCR 0x00 | |
76 | #define TXX9_SIDICR 0x04 | |
77 | #define TXX9_SIDISR 0x08 | |
78 | #define TXX9_SICISR 0x0c | |
79 | #define TXX9_SIFCR 0x10 | |
80 | #define TXX9_SIFLCR 0x14 | |
81 | #define TXX9_SIBGR 0x18 | |
82 | #define TXX9_SITFIFO 0x1c | |
83 | #define TXX9_SIRFIFO 0x20 | |
84 | ||
85 | /* SILCR : Line Control */ | |
86 | #define TXX9_SILCR_SCS_MASK 0x00000060 | |
87 | #define TXX9_SILCR_SCS_IMCLK 0x00000000 | |
88 | #define TXX9_SILCR_SCS_IMCLK_BG 0x00000020 | |
89 | #define TXX9_SILCR_SCS_SCLK 0x00000040 | |
90 | #define TXX9_SILCR_SCS_SCLK_BG 0x00000060 | |
91 | #define TXX9_SILCR_UEPS 0x00000010 | |
92 | #define TXX9_SILCR_UPEN 0x00000008 | |
93 | #define TXX9_SILCR_USBL_MASK 0x00000004 | |
94 | #define TXX9_SILCR_USBL_1BIT 0x00000000 | |
95 | #define TXX9_SILCR_USBL_2BIT 0x00000004 | |
96 | #define TXX9_SILCR_UMODE_MASK 0x00000003 | |
97 | #define TXX9_SILCR_UMODE_8BIT 0x00000000 | |
98 | #define TXX9_SILCR_UMODE_7BIT 0x00000001 | |
99 | ||
100 | /* SIDICR : DMA/Int. Control */ | |
101 | #define TXX9_SIDICR_TDE 0x00008000 | |
102 | #define TXX9_SIDICR_RDE 0x00004000 | |
103 | #define TXX9_SIDICR_TIE 0x00002000 | |
104 | #define TXX9_SIDICR_RIE 0x00001000 | |
105 | #define TXX9_SIDICR_SPIE 0x00000800 | |
106 | #define TXX9_SIDICR_CTSAC 0x00000600 | |
107 | #define TXX9_SIDICR_STIE_MASK 0x0000003f | |
108 | #define TXX9_SIDICR_STIE_OERS 0x00000020 | |
109 | #define TXX9_SIDICR_STIE_CTSS 0x00000010 | |
110 | #define TXX9_SIDICR_STIE_RBRKD 0x00000008 | |
111 | #define TXX9_SIDICR_STIE_TRDY 0x00000004 | |
112 | #define TXX9_SIDICR_STIE_TXALS 0x00000002 | |
113 | #define TXX9_SIDICR_STIE_UBRKD 0x00000001 | |
114 | ||
115 | /* SIDISR : DMA/Int. Status */ | |
116 | #define TXX9_SIDISR_UBRK 0x00008000 | |
117 | #define TXX9_SIDISR_UVALID 0x00004000 | |
118 | #define TXX9_SIDISR_UFER 0x00002000 | |
119 | #define TXX9_SIDISR_UPER 0x00001000 | |
120 | #define TXX9_SIDISR_UOER 0x00000800 | |
121 | #define TXX9_SIDISR_ERI 0x00000400 | |
122 | #define TXX9_SIDISR_TOUT 0x00000200 | |
123 | #define TXX9_SIDISR_TDIS 0x00000100 | |
124 | #define TXX9_SIDISR_RDIS 0x00000080 | |
125 | #define TXX9_SIDISR_STIS 0x00000040 | |
126 | #define TXX9_SIDISR_RFDN_MASK 0x0000001f | |
127 | ||
128 | /* SICISR : Change Int. Status */ | |
129 | #define TXX9_SICISR_OERS 0x00000020 | |
130 | #define TXX9_SICISR_CTSS 0x00000010 | |
131 | #define TXX9_SICISR_RBRKD 0x00000008 | |
132 | #define TXX9_SICISR_TRDY 0x00000004 | |
133 | #define TXX9_SICISR_TXALS 0x00000002 | |
134 | #define TXX9_SICISR_UBRKD 0x00000001 | |
135 | ||
136 | /* SIFCR : FIFO Control */ | |
137 | #define TXX9_SIFCR_SWRST 0x00008000 | |
138 | #define TXX9_SIFCR_RDIL_MASK 0x00000180 | |
139 | #define TXX9_SIFCR_RDIL_1 0x00000000 | |
140 | #define TXX9_SIFCR_RDIL_4 0x00000080 | |
141 | #define TXX9_SIFCR_RDIL_8 0x00000100 | |
142 | #define TXX9_SIFCR_RDIL_12 0x00000180 | |
143 | #define TXX9_SIFCR_RDIL_MAX 0x00000180 | |
144 | #define TXX9_SIFCR_TDIL_MASK 0x00000018 | |
1da177e4 LT |
145 | #define TXX9_SIFCR_TDIL_1 0x00000000 |
146 | #define TXX9_SIFCR_TDIL_4 0x00000001 | |
147 | #define TXX9_SIFCR_TDIL_8 0x00000010 | |
148 | #define TXX9_SIFCR_TDIL_MAX 0x00000010 | |
149 | #define TXX9_SIFCR_TFRST 0x00000004 | |
150 | #define TXX9_SIFCR_RFRST 0x00000002 | |
151 | #define TXX9_SIFCR_FRSTE 0x00000001 | |
152 | #define TXX9_SIO_TX_FIFO 8 | |
153 | #define TXX9_SIO_RX_FIFO 16 | |
154 | ||
155 | /* SIFLCR : Flow Control */ | |
156 | #define TXX9_SIFLCR_RCS 0x00001000 | |
157 | #define TXX9_SIFLCR_TES 0x00000800 | |
158 | #define TXX9_SIFLCR_RTSSC 0x00000200 | |
159 | #define TXX9_SIFLCR_RSDE 0x00000100 | |
160 | #define TXX9_SIFLCR_TSDE 0x00000080 | |
161 | #define TXX9_SIFLCR_RTSTL_MASK 0x0000001e | |
162 | #define TXX9_SIFLCR_RTSTL_MAX 0x0000001e | |
163 | #define TXX9_SIFLCR_TBRK 0x00000001 | |
164 | ||
165 | /* SIBGR : Baudrate Control */ | |
166 | #define TXX9_SIBGR_BCLK_MASK 0x00000300 | |
167 | #define TXX9_SIBGR_BCLK_T0 0x00000000 | |
168 | #define TXX9_SIBGR_BCLK_T2 0x00000100 | |
169 | #define TXX9_SIBGR_BCLK_T4 0x00000200 | |
170 | #define TXX9_SIBGR_BCLK_T6 0x00000300 | |
171 | #define TXX9_SIBGR_BRD_MASK 0x000000ff | |
172 | ||
173 | static inline unsigned int sio_in(struct uart_txx9_port *up, int offset) | |
174 | { | |
175 | switch (up->port.iotype) { | |
176 | default: | |
83485f82 | 177 | return __raw_readl(up->port.membase + offset); |
1da177e4 LT |
178 | case UPIO_PORT: |
179 | return inl(up->port.iobase + offset); | |
180 | } | |
181 | } | |
182 | ||
183 | static inline void | |
184 | sio_out(struct uart_txx9_port *up, int offset, int value) | |
185 | { | |
186 | switch (up->port.iotype) { | |
187 | default: | |
83485f82 | 188 | __raw_writel(value, up->port.membase + offset); |
1da177e4 LT |
189 | break; |
190 | case UPIO_PORT: | |
191 | outl(value, up->port.iobase + offset); | |
192 | break; | |
193 | } | |
194 | } | |
195 | ||
196 | static inline void | |
197 | sio_mask(struct uart_txx9_port *up, int offset, unsigned int value) | |
198 | { | |
199 | sio_out(up, offset, sio_in(up, offset) & ~value); | |
200 | } | |
201 | static inline void | |
202 | sio_set(struct uart_txx9_port *up, int offset, unsigned int value) | |
203 | { | |
204 | sio_out(up, offset, sio_in(up, offset) | value); | |
205 | } | |
206 | ||
207 | static inline void | |
208 | sio_quot_set(struct uart_txx9_port *up, int quot) | |
209 | { | |
210 | quot >>= 1; | |
211 | if (quot < 256) | |
212 | sio_out(up, TXX9_SIBGR, quot | TXX9_SIBGR_BCLK_T0); | |
213 | else if (quot < (256 << 2)) | |
214 | sio_out(up, TXX9_SIBGR, (quot >> 2) | TXX9_SIBGR_BCLK_T2); | |
215 | else if (quot < (256 << 4)) | |
216 | sio_out(up, TXX9_SIBGR, (quot >> 4) | TXX9_SIBGR_BCLK_T4); | |
217 | else if (quot < (256 << 6)) | |
218 | sio_out(up, TXX9_SIBGR, (quot >> 6) | TXX9_SIBGR_BCLK_T6); | |
219 | else | |
220 | sio_out(up, TXX9_SIBGR, 0xff | TXX9_SIBGR_BCLK_T6); | |
221 | } | |
222 | ||
aa76224a AN |
223 | static struct uart_txx9_port *to_uart_txx9_port(struct uart_port *port) |
224 | { | |
225 | return container_of(port, struct uart_txx9_port, port); | |
226 | } | |
227 | ||
b129a8cc | 228 | static void serial_txx9_stop_tx(struct uart_port *port) |
1da177e4 | 229 | { |
aa76224a | 230 | struct uart_txx9_port *up = to_uart_txx9_port(port); |
1da177e4 | 231 | sio_mask(up, TXX9_SIDICR, TXX9_SIDICR_TIE); |
1da177e4 LT |
232 | } |
233 | ||
b129a8cc | 234 | static void serial_txx9_start_tx(struct uart_port *port) |
1da177e4 | 235 | { |
aa76224a | 236 | struct uart_txx9_port *up = to_uart_txx9_port(port); |
1da177e4 | 237 | sio_set(up, TXX9_SIDICR, TXX9_SIDICR_TIE); |
1da177e4 LT |
238 | } |
239 | ||
240 | static void serial_txx9_stop_rx(struct uart_port *port) | |
241 | { | |
aa76224a | 242 | struct uart_txx9_port *up = to_uart_txx9_port(port); |
1da177e4 | 243 | up->port.read_status_mask &= ~TXX9_SIDISR_RDIS; |
1da177e4 LT |
244 | } |
245 | ||
0970769a AN |
246 | static void serial_txx9_initialize(struct uart_port *port) |
247 | { | |
aa76224a | 248 | struct uart_txx9_port *up = to_uart_txx9_port(port); |
0970769a AN |
249 | unsigned int tmout = 10000; |
250 | ||
251 | sio_out(up, TXX9_SIFCR, TXX9_SIFCR_SWRST); | |
252 | /* TX4925 BUG WORKAROUND. Accessing SIOC register | |
253 | * immediately after soft reset causes bus error. */ | |
254 | mmiowb(); | |
255 | udelay(1); | |
256 | while ((sio_in(up, TXX9_SIFCR) & TXX9_SIFCR_SWRST) && --tmout) | |
257 | udelay(1); | |
258 | /* TX Int by FIFO Empty, RX Int by Receiving 1 char. */ | |
259 | sio_set(up, TXX9_SIFCR, | |
260 | TXX9_SIFCR_TDIL_MAX | TXX9_SIFCR_RDIL_1); | |
261 | /* initial settings */ | |
262 | sio_out(up, TXX9_SILCR, | |
263 | TXX9_SILCR_UMODE_8BIT | TXX9_SILCR_USBL_1BIT | | |
264 | ((up->port.flags & UPF_TXX9_USE_SCLK) ? | |
265 | TXX9_SILCR_SCS_SCLK_BG : TXX9_SILCR_SCS_IMCLK_BG)); | |
266 | sio_quot_set(up, uart_get_divisor(port, 9600)); | |
267 | sio_out(up, TXX9_SIFLCR, TXX9_SIFLCR_RTSTL_MAX /* 15 */); | |
268 | sio_out(up, TXX9_SIDICR, 0); | |
269 | } | |
270 | ||
1da177e4 | 271 | static inline void |
7d12e780 | 272 | receive_chars(struct uart_txx9_port *up, unsigned int *status) |
1da177e4 | 273 | { |
1da177e4 LT |
274 | unsigned char ch; |
275 | unsigned int disr = *status; | |
276 | int max_count = 256; | |
277 | char flag; | |
83485f82 | 278 | unsigned int next_ignore_status_mask; |
1da177e4 LT |
279 | |
280 | do { | |
1da177e4 LT |
281 | ch = sio_in(up, TXX9_SIRFIFO); |
282 | flag = TTY_NORMAL; | |
283 | up->port.icount.rx++; | |
284 | ||
83485f82 AN |
285 | /* mask out RFDN_MASK bit added by previous overrun */ |
286 | next_ignore_status_mask = | |
287 | up->port.ignore_status_mask & ~TXX9_SIDISR_RFDN_MASK; | |
1da177e4 LT |
288 | if (unlikely(disr & (TXX9_SIDISR_UBRK | TXX9_SIDISR_UPER | |
289 | TXX9_SIDISR_UFER | TXX9_SIDISR_UOER))) { | |
290 | /* | |
291 | * For statistics only | |
292 | */ | |
293 | if (disr & TXX9_SIDISR_UBRK) { | |
294 | disr &= ~(TXX9_SIDISR_UFER | TXX9_SIDISR_UPER); | |
295 | up->port.icount.brk++; | |
296 | /* | |
297 | * We do the SysRQ and SAK checking | |
298 | * here because otherwise the break | |
299 | * may get masked by ignore_status_mask | |
300 | * or read_status_mask. | |
301 | */ | |
302 | if (uart_handle_break(&up->port)) | |
303 | goto ignore_char; | |
304 | } else if (disr & TXX9_SIDISR_UPER) | |
305 | up->port.icount.parity++; | |
306 | else if (disr & TXX9_SIDISR_UFER) | |
307 | up->port.icount.frame++; | |
83485f82 | 308 | if (disr & TXX9_SIDISR_UOER) { |
1da177e4 | 309 | up->port.icount.overrun++; |
83485f82 AN |
310 | /* |
311 | * The receiver read buffer still hold | |
312 | * a char which caused overrun. | |
313 | * Ignore next char by adding RFDN_MASK | |
314 | * to ignore_status_mask temporarily. | |
315 | */ | |
316 | next_ignore_status_mask |= | |
317 | TXX9_SIDISR_RFDN_MASK; | |
318 | } | |
1da177e4 LT |
319 | |
320 | /* | |
321 | * Mask off conditions which should be ingored. | |
322 | */ | |
323 | disr &= up->port.read_status_mask; | |
324 | ||
325 | if (disr & TXX9_SIDISR_UBRK) { | |
326 | flag = TTY_BREAK; | |
327 | } else if (disr & TXX9_SIDISR_UPER) | |
328 | flag = TTY_PARITY; | |
329 | else if (disr & TXX9_SIDISR_UFER) | |
330 | flag = TTY_FRAME; | |
331 | } | |
7d12e780 | 332 | if (uart_handle_sysrq_char(&up->port, ch)) |
1da177e4 | 333 | goto ignore_char; |
05ab3014 RK |
334 | |
335 | uart_insert_char(&up->port, disr, TXX9_SIDISR_UOER, ch, flag); | |
336 | ||
1da177e4 | 337 | ignore_char: |
83485f82 | 338 | up->port.ignore_status_mask = next_ignore_status_mask; |
1da177e4 LT |
339 | disr = sio_in(up, TXX9_SIDISR); |
340 | } while (!(disr & TXX9_SIDISR_UVALID) && (max_count-- > 0)); | |
f5ee56cc | 341 | spin_unlock(&up->port.lock); |
2e124b4a | 342 | tty_flip_buffer_push(&up->port.state->port); |
f5ee56cc | 343 | spin_lock(&up->port.lock); |
1da177e4 LT |
344 | *status = disr; |
345 | } | |
346 | ||
347 | static inline void transmit_chars(struct uart_txx9_port *up) | |
348 | { | |
ebd2c8f6 | 349 | struct circ_buf *xmit = &up->port.state->xmit; |
1da177e4 LT |
350 | int count; |
351 | ||
352 | if (up->port.x_char) { | |
353 | sio_out(up, TXX9_SITFIFO, up->port.x_char); | |
354 | up->port.icount.tx++; | |
355 | up->port.x_char = 0; | |
356 | return; | |
357 | } | |
358 | if (uart_circ_empty(xmit) || uart_tx_stopped(&up->port)) { | |
b129a8cc | 359 | serial_txx9_stop_tx(&up->port); |
1da177e4 LT |
360 | return; |
361 | } | |
362 | ||
363 | count = TXX9_SIO_TX_FIFO; | |
364 | do { | |
365 | sio_out(up, TXX9_SITFIFO, xmit->buf[xmit->tail]); | |
366 | xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1); | |
367 | up->port.icount.tx++; | |
368 | if (uart_circ_empty(xmit)) | |
369 | break; | |
370 | } while (--count > 0); | |
371 | ||
372 | if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS) | |
373 | uart_write_wakeup(&up->port); | |
374 | ||
375 | if (uart_circ_empty(xmit)) | |
b129a8cc | 376 | serial_txx9_stop_tx(&up->port); |
1da177e4 LT |
377 | } |
378 | ||
7d12e780 | 379 | static irqreturn_t serial_txx9_interrupt(int irq, void *dev_id) |
1da177e4 LT |
380 | { |
381 | int pass_counter = 0; | |
382 | struct uart_txx9_port *up = dev_id; | |
383 | unsigned int status; | |
384 | ||
385 | while (1) { | |
386 | spin_lock(&up->port.lock); | |
387 | status = sio_in(up, TXX9_SIDISR); | |
388 | if (!(sio_in(up, TXX9_SIDICR) & TXX9_SIDICR_TIE)) | |
389 | status &= ~TXX9_SIDISR_TDIS; | |
390 | if (!(status & (TXX9_SIDISR_TDIS | TXX9_SIDISR_RDIS | | |
391 | TXX9_SIDISR_TOUT))) { | |
392 | spin_unlock(&up->port.lock); | |
393 | break; | |
394 | } | |
395 | ||
396 | if (status & TXX9_SIDISR_RDIS) | |
7d12e780 | 397 | receive_chars(up, &status); |
1da177e4 LT |
398 | if (status & TXX9_SIDISR_TDIS) |
399 | transmit_chars(up); | |
400 | /* Clear TX/RX Int. Status */ | |
401 | sio_mask(up, TXX9_SIDISR, | |
402 | TXX9_SIDISR_TDIS | TXX9_SIDISR_RDIS | | |
403 | TXX9_SIDISR_TOUT); | |
404 | spin_unlock(&up->port.lock); | |
405 | ||
406 | if (pass_counter++ > PASS_LIMIT) | |
407 | break; | |
408 | } | |
409 | ||
410 | return pass_counter ? IRQ_HANDLED : IRQ_NONE; | |
411 | } | |
412 | ||
413 | static unsigned int serial_txx9_tx_empty(struct uart_port *port) | |
414 | { | |
aa76224a | 415 | struct uart_txx9_port *up = to_uart_txx9_port(port); |
1da177e4 LT |
416 | unsigned long flags; |
417 | unsigned int ret; | |
418 | ||
419 | spin_lock_irqsave(&up->port.lock, flags); | |
420 | ret = (sio_in(up, TXX9_SICISR) & TXX9_SICISR_TXALS) ? TIOCSER_TEMT : 0; | |
421 | spin_unlock_irqrestore(&up->port.lock, flags); | |
422 | ||
423 | return ret; | |
424 | } | |
425 | ||
426 | static unsigned int serial_txx9_get_mctrl(struct uart_port *port) | |
427 | { | |
aa76224a | 428 | struct uart_txx9_port *up = to_uart_txx9_port(port); |
1da177e4 LT |
429 | unsigned int ret; |
430 | ||
99999961 AN |
431 | /* no modem control lines */ |
432 | ret = TIOCM_CAR | TIOCM_DSR; | |
433 | ret |= (sio_in(up, TXX9_SIFLCR) & TXX9_SIFLCR_RTSSC) ? 0 : TIOCM_RTS; | |
434 | ret |= (sio_in(up, TXX9_SICISR) & TXX9_SICISR_CTSS) ? 0 : TIOCM_CTS; | |
1da177e4 LT |
435 | |
436 | return ret; | |
437 | } | |
438 | ||
439 | static void serial_txx9_set_mctrl(struct uart_port *port, unsigned int mctrl) | |
440 | { | |
aa76224a | 441 | struct uart_txx9_port *up = to_uart_txx9_port(port); |
1da177e4 | 442 | |
1da177e4 LT |
443 | if (mctrl & TIOCM_RTS) |
444 | sio_mask(up, TXX9_SIFLCR, TXX9_SIFLCR_RTSSC); | |
445 | else | |
446 | sio_set(up, TXX9_SIFLCR, TXX9_SIFLCR_RTSSC); | |
1da177e4 LT |
447 | } |
448 | ||
449 | static void serial_txx9_break_ctl(struct uart_port *port, int break_state) | |
450 | { | |
aa76224a | 451 | struct uart_txx9_port *up = to_uart_txx9_port(port); |
1da177e4 LT |
452 | unsigned long flags; |
453 | ||
454 | spin_lock_irqsave(&up->port.lock, flags); | |
455 | if (break_state == -1) | |
456 | sio_set(up, TXX9_SIFLCR, TXX9_SIFLCR_TBRK); | |
457 | else | |
458 | sio_mask(up, TXX9_SIFLCR, TXX9_SIFLCR_TBRK); | |
459 | spin_unlock_irqrestore(&up->port.lock, flags); | |
460 | } | |
461 | ||
f109293f | 462 | #if defined(CONFIG_SERIAL_TXX9_CONSOLE) || defined(CONFIG_CONSOLE_POLL) |
a10b32db AN |
463 | /* |
464 | * Wait for transmitter & holding register to empty | |
465 | */ | |
466 | static void wait_for_xmitr(struct uart_txx9_port *up) | |
467 | { | |
468 | unsigned int tmout = 10000; | |
469 | ||
470 | /* Wait up to 10ms for the character(s) to be sent. */ | |
471 | while (--tmout && | |
472 | !(sio_in(up, TXX9_SICISR) & TXX9_SICISR_TXALS)) | |
473 | udelay(1); | |
474 | ||
475 | /* Wait up to 1s for flow control if necessary */ | |
476 | if (up->port.flags & UPF_CONS_FLOW) { | |
477 | tmout = 1000000; | |
478 | while (--tmout && | |
479 | (sio_in(up, TXX9_SICISR) & TXX9_SICISR_CTSS)) | |
480 | udelay(1); | |
481 | } | |
482 | } | |
483 | #endif | |
484 | ||
485 | #ifdef CONFIG_CONSOLE_POLL | |
486 | /* | |
487 | * Console polling routines for writing and reading from the uart while | |
488 | * in an interrupt or debug context. | |
489 | */ | |
490 | ||
491 | static int serial_txx9_get_poll_char(struct uart_port *port) | |
492 | { | |
493 | unsigned int ier; | |
494 | unsigned char c; | |
aa76224a | 495 | struct uart_txx9_port *up = to_uart_txx9_port(port); |
a10b32db AN |
496 | |
497 | /* | |
498 | * First save the IER then disable the interrupts | |
499 | */ | |
500 | ier = sio_in(up, TXX9_SIDICR); | |
501 | sio_out(up, TXX9_SIDICR, 0); | |
502 | ||
503 | while (sio_in(up, TXX9_SIDISR) & TXX9_SIDISR_UVALID) | |
504 | ; | |
505 | ||
506 | c = sio_in(up, TXX9_SIRFIFO); | |
507 | ||
508 | /* | |
509 | * Finally, clear RX interrupt status | |
510 | * and restore the IER | |
511 | */ | |
512 | sio_mask(up, TXX9_SIDISR, TXX9_SIDISR_RDIS); | |
513 | sio_out(up, TXX9_SIDICR, ier); | |
514 | return c; | |
515 | } | |
516 | ||
517 | ||
518 | static void serial_txx9_put_poll_char(struct uart_port *port, unsigned char c) | |
519 | { | |
520 | unsigned int ier; | |
aa76224a | 521 | struct uart_txx9_port *up = to_uart_txx9_port(port); |
a10b32db AN |
522 | |
523 | /* | |
524 | * First save the IER then disable the interrupts | |
525 | */ | |
526 | ier = sio_in(up, TXX9_SIDICR); | |
527 | sio_out(up, TXX9_SIDICR, 0); | |
528 | ||
529 | wait_for_xmitr(up); | |
530 | /* | |
531 | * Send the character out. | |
a10b32db AN |
532 | */ |
533 | sio_out(up, TXX9_SITFIFO, c); | |
a10b32db AN |
534 | |
535 | /* | |
536 | * Finally, wait for transmitter to become empty | |
537 | * and restore the IER | |
538 | */ | |
539 | wait_for_xmitr(up); | |
540 | sio_out(up, TXX9_SIDICR, ier); | |
541 | } | |
542 | ||
543 | #endif /* CONFIG_CONSOLE_POLL */ | |
544 | ||
1da177e4 LT |
545 | static int serial_txx9_startup(struct uart_port *port) |
546 | { | |
aa76224a | 547 | struct uart_txx9_port *up = to_uart_txx9_port(port); |
1da177e4 LT |
548 | unsigned long flags; |
549 | int retval; | |
550 | ||
551 | /* | |
552 | * Clear the FIFO buffers and disable them. | |
7f927fcc | 553 | * (they will be reenabled in set_termios()) |
1da177e4 LT |
554 | */ |
555 | sio_set(up, TXX9_SIFCR, | |
556 | TXX9_SIFCR_TFRST | TXX9_SIFCR_RFRST | TXX9_SIFCR_FRSTE); | |
557 | /* clear reset */ | |
558 | sio_mask(up, TXX9_SIFCR, | |
559 | TXX9_SIFCR_TFRST | TXX9_SIFCR_RFRST | TXX9_SIFCR_FRSTE); | |
560 | sio_out(up, TXX9_SIDICR, 0); | |
561 | ||
562 | /* | |
563 | * Clear the interrupt registers. | |
564 | */ | |
565 | sio_out(up, TXX9_SIDISR, 0); | |
566 | ||
567 | retval = request_irq(up->port.irq, serial_txx9_interrupt, | |
40663cc7 | 568 | IRQF_SHARED, "serial_txx9", up); |
1da177e4 LT |
569 | if (retval) |
570 | return retval; | |
571 | ||
572 | /* | |
573 | * Now, initialize the UART | |
574 | */ | |
575 | spin_lock_irqsave(&up->port.lock, flags); | |
576 | serial_txx9_set_mctrl(&up->port, up->port.mctrl); | |
577 | spin_unlock_irqrestore(&up->port.lock, flags); | |
578 | ||
579 | /* Enable RX/TX */ | |
580 | sio_mask(up, TXX9_SIFLCR, TXX9_SIFLCR_RSDE | TXX9_SIFLCR_TSDE); | |
581 | ||
582 | /* | |
583 | * Finally, enable interrupts. | |
584 | */ | |
585 | sio_set(up, TXX9_SIDICR, TXX9_SIDICR_RIE); | |
586 | ||
587 | return 0; | |
588 | } | |
589 | ||
590 | static void serial_txx9_shutdown(struct uart_port *port) | |
591 | { | |
aa76224a | 592 | struct uart_txx9_port *up = to_uart_txx9_port(port); |
1da177e4 LT |
593 | unsigned long flags; |
594 | ||
595 | /* | |
596 | * Disable interrupts from this port | |
597 | */ | |
598 | sio_out(up, TXX9_SIDICR, 0); /* disable all intrs */ | |
599 | ||
600 | spin_lock_irqsave(&up->port.lock, flags); | |
601 | serial_txx9_set_mctrl(&up->port, up->port.mctrl); | |
602 | spin_unlock_irqrestore(&up->port.lock, flags); | |
603 | ||
604 | /* | |
605 | * Disable break condition | |
606 | */ | |
607 | sio_mask(up, TXX9_SIFLCR, TXX9_SIFLCR_TBRK); | |
608 | ||
609 | #ifdef CONFIG_SERIAL_TXX9_CONSOLE | |
610 | if (up->port.cons && up->port.line == up->port.cons->index) { | |
611 | free_irq(up->port.irq, up); | |
612 | return; | |
613 | } | |
614 | #endif | |
615 | /* reset FIFOs */ | |
616 | sio_set(up, TXX9_SIFCR, | |
617 | TXX9_SIFCR_TFRST | TXX9_SIFCR_RFRST | TXX9_SIFCR_FRSTE); | |
618 | /* clear reset */ | |
619 | sio_mask(up, TXX9_SIFCR, | |
620 | TXX9_SIFCR_TFRST | TXX9_SIFCR_RFRST | TXX9_SIFCR_FRSTE); | |
621 | ||
622 | /* Disable RX/TX */ | |
623 | sio_set(up, TXX9_SIFLCR, TXX9_SIFLCR_RSDE | TXX9_SIFLCR_TSDE); | |
624 | ||
625 | free_irq(up->port.irq, up); | |
626 | } | |
627 | ||
628 | static void | |
606d099c AC |
629 | serial_txx9_set_termios(struct uart_port *port, struct ktermios *termios, |
630 | struct ktermios *old) | |
1da177e4 | 631 | { |
aa76224a | 632 | struct uart_txx9_port *up = to_uart_txx9_port(port); |
1da177e4 LT |
633 | unsigned int cval, fcr = 0; |
634 | unsigned long flags; | |
635 | unsigned int baud, quot; | |
636 | ||
99999961 AN |
637 | /* |
638 | * We don't support modem control lines. | |
639 | */ | |
640 | termios->c_cflag &= ~(HUPCL | CMSPAR); | |
641 | termios->c_cflag |= CLOCAL; | |
642 | ||
1da177e4 LT |
643 | cval = sio_in(up, TXX9_SILCR); |
644 | /* byte size and parity */ | |
645 | cval &= ~TXX9_SILCR_UMODE_MASK; | |
646 | switch (termios->c_cflag & CSIZE) { | |
647 | case CS7: | |
648 | cval |= TXX9_SILCR_UMODE_7BIT; | |
649 | break; | |
650 | default: | |
651 | case CS5: /* not supported */ | |
652 | case CS6: /* not supported */ | |
653 | case CS8: | |
654 | cval |= TXX9_SILCR_UMODE_8BIT; | |
655 | break; | |
656 | } | |
657 | ||
658 | cval &= ~TXX9_SILCR_USBL_MASK; | |
659 | if (termios->c_cflag & CSTOPB) | |
660 | cval |= TXX9_SILCR_USBL_2BIT; | |
661 | else | |
662 | cval |= TXX9_SILCR_USBL_1BIT; | |
663 | cval &= ~(TXX9_SILCR_UPEN | TXX9_SILCR_UEPS); | |
664 | if (termios->c_cflag & PARENB) | |
665 | cval |= TXX9_SILCR_UPEN; | |
666 | if (!(termios->c_cflag & PARODD)) | |
667 | cval |= TXX9_SILCR_UEPS; | |
668 | ||
669 | /* | |
670 | * Ask the core to calculate the divisor for us. | |
671 | */ | |
672 | baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16/2); | |
673 | quot = uart_get_divisor(port, baud); | |
674 | ||
675 | /* Set up FIFOs */ | |
676 | /* TX Int by FIFO Empty, RX Int by Receiving 1 char. */ | |
677 | fcr = TXX9_SIFCR_TDIL_MAX | TXX9_SIFCR_RDIL_1; | |
678 | ||
679 | /* | |
680 | * Ok, we're now changing the port state. Do it with | |
681 | * interrupts disabled. | |
682 | */ | |
683 | spin_lock_irqsave(&up->port.lock, flags); | |
684 | ||
685 | /* | |
686 | * Update the per-port timeout. | |
687 | */ | |
688 | uart_update_timeout(port, termios->c_cflag, baud); | |
689 | ||
690 | up->port.read_status_mask = TXX9_SIDISR_UOER | | |
691 | TXX9_SIDISR_TDIS | TXX9_SIDISR_RDIS; | |
692 | if (termios->c_iflag & INPCK) | |
693 | up->port.read_status_mask |= TXX9_SIDISR_UFER | TXX9_SIDISR_UPER; | |
ef8b9ddc | 694 | if (termios->c_iflag & (IGNBRK | BRKINT | PARMRK)) |
1da177e4 LT |
695 | up->port.read_status_mask |= TXX9_SIDISR_UBRK; |
696 | ||
697 | /* | |
698 | * Characteres to ignore | |
699 | */ | |
700 | up->port.ignore_status_mask = 0; | |
701 | if (termios->c_iflag & IGNPAR) | |
702 | up->port.ignore_status_mask |= TXX9_SIDISR_UPER | TXX9_SIDISR_UFER; | |
703 | if (termios->c_iflag & IGNBRK) { | |
704 | up->port.ignore_status_mask |= TXX9_SIDISR_UBRK; | |
705 | /* | |
706 | * If we're ignoring parity and break indicators, | |
707 | * ignore overruns too (for real raw support). | |
708 | */ | |
709 | if (termios->c_iflag & IGNPAR) | |
710 | up->port.ignore_status_mask |= TXX9_SIDISR_UOER; | |
711 | } | |
712 | ||
713 | /* | |
714 | * ignore all characters if CREAD is not set | |
715 | */ | |
716 | if ((termios->c_cflag & CREAD) == 0) | |
717 | up->port.ignore_status_mask |= TXX9_SIDISR_RDIS; | |
718 | ||
719 | /* CTS flow control flag */ | |
720 | if ((termios->c_cflag & CRTSCTS) && | |
721 | (up->port.flags & UPF_TXX9_HAVE_CTS_LINE)) { | |
722 | sio_set(up, TXX9_SIFLCR, | |
723 | TXX9_SIFLCR_RCS | TXX9_SIFLCR_TES); | |
724 | } else { | |
725 | sio_mask(up, TXX9_SIFLCR, | |
726 | TXX9_SIFLCR_RCS | TXX9_SIFLCR_TES); | |
727 | } | |
728 | ||
729 | sio_out(up, TXX9_SILCR, cval); | |
730 | sio_quot_set(up, quot); | |
731 | sio_out(up, TXX9_SIFCR, fcr); | |
732 | ||
733 | serial_txx9_set_mctrl(&up->port, up->port.mctrl); | |
734 | spin_unlock_irqrestore(&up->port.lock, flags); | |
735 | } | |
736 | ||
737 | static void | |
738 | serial_txx9_pm(struct uart_port *port, unsigned int state, | |
739 | unsigned int oldstate) | |
740 | { | |
23f42b7b AN |
741 | /* |
742 | * If oldstate was -1 this is called from | |
743 | * uart_configure_port(). In this case do not initialize the | |
744 | * port now, because the port was already initialized (for | |
745 | * non-console port) or should not be initialized here (for | |
746 | * console port). If we initialized the port here we lose | |
747 | * serial console settings. | |
748 | */ | |
749 | if (state == 0 && oldstate != -1) | |
0970769a | 750 | serial_txx9_initialize(port); |
1da177e4 LT |
751 | } |
752 | ||
753 | static int serial_txx9_request_resource(struct uart_txx9_port *up) | |
754 | { | |
755 | unsigned int size = TXX9_REGION_SIZE; | |
756 | int ret = 0; | |
757 | ||
758 | switch (up->port.iotype) { | |
759 | default: | |
760 | if (!up->port.mapbase) | |
761 | break; | |
762 | ||
763 | if (!request_mem_region(up->port.mapbase, size, "serial_txx9")) { | |
764 | ret = -EBUSY; | |
765 | break; | |
766 | } | |
767 | ||
768 | if (up->port.flags & UPF_IOREMAP) { | |
769 | up->port.membase = ioremap(up->port.mapbase, size); | |
770 | if (!up->port.membase) { | |
771 | release_mem_region(up->port.mapbase, size); | |
772 | ret = -ENOMEM; | |
773 | } | |
774 | } | |
775 | break; | |
776 | ||
777 | case UPIO_PORT: | |
778 | if (!request_region(up->port.iobase, size, "serial_txx9")) | |
779 | ret = -EBUSY; | |
780 | break; | |
781 | } | |
782 | return ret; | |
783 | } | |
784 | ||
785 | static void serial_txx9_release_resource(struct uart_txx9_port *up) | |
786 | { | |
787 | unsigned int size = TXX9_REGION_SIZE; | |
788 | ||
789 | switch (up->port.iotype) { | |
790 | default: | |
791 | if (!up->port.mapbase) | |
792 | break; | |
793 | ||
794 | if (up->port.flags & UPF_IOREMAP) { | |
795 | iounmap(up->port.membase); | |
796 | up->port.membase = NULL; | |
797 | } | |
798 | ||
799 | release_mem_region(up->port.mapbase, size); | |
800 | break; | |
801 | ||
802 | case UPIO_PORT: | |
803 | release_region(up->port.iobase, size); | |
804 | break; | |
805 | } | |
806 | } | |
807 | ||
808 | static void serial_txx9_release_port(struct uart_port *port) | |
809 | { | |
aa76224a | 810 | struct uart_txx9_port *up = to_uart_txx9_port(port); |
1da177e4 LT |
811 | serial_txx9_release_resource(up); |
812 | } | |
813 | ||
814 | static int serial_txx9_request_port(struct uart_port *port) | |
815 | { | |
aa76224a | 816 | struct uart_txx9_port *up = to_uart_txx9_port(port); |
1da177e4 LT |
817 | return serial_txx9_request_resource(up); |
818 | } | |
819 | ||
820 | static void serial_txx9_config_port(struct uart_port *port, int uflags) | |
821 | { | |
aa76224a | 822 | struct uart_txx9_port *up = to_uart_txx9_port(port); |
1da177e4 LT |
823 | int ret; |
824 | ||
825 | /* | |
826 | * Find the region that we can probe for. This in turn | |
827 | * tells us whether we can probe for the type of port. | |
828 | */ | |
829 | ret = serial_txx9_request_resource(up); | |
830 | if (ret < 0) | |
831 | return; | |
832 | port->type = PORT_TXX9; | |
833 | up->port.fifosize = TXX9_SIO_TX_FIFO; | |
834 | ||
835 | #ifdef CONFIG_SERIAL_TXX9_CONSOLE | |
836 | if (up->port.line == up->port.cons->index) | |
837 | return; | |
838 | #endif | |
0970769a | 839 | serial_txx9_initialize(port); |
1da177e4 LT |
840 | } |
841 | ||
1da177e4 LT |
842 | static const char * |
843 | serial_txx9_type(struct uart_port *port) | |
844 | { | |
845 | return "txx9"; | |
846 | } | |
847 | ||
848 | static struct uart_ops serial_txx9_pops = { | |
849 | .tx_empty = serial_txx9_tx_empty, | |
850 | .set_mctrl = serial_txx9_set_mctrl, | |
851 | .get_mctrl = serial_txx9_get_mctrl, | |
852 | .stop_tx = serial_txx9_stop_tx, | |
853 | .start_tx = serial_txx9_start_tx, | |
854 | .stop_rx = serial_txx9_stop_rx, | |
1da177e4 LT |
855 | .break_ctl = serial_txx9_break_ctl, |
856 | .startup = serial_txx9_startup, | |
857 | .shutdown = serial_txx9_shutdown, | |
858 | .set_termios = serial_txx9_set_termios, | |
859 | .pm = serial_txx9_pm, | |
860 | .type = serial_txx9_type, | |
861 | .release_port = serial_txx9_release_port, | |
862 | .request_port = serial_txx9_request_port, | |
863 | .config_port = serial_txx9_config_port, | |
a10b32db AN |
864 | #ifdef CONFIG_CONSOLE_POLL |
865 | .poll_get_char = serial_txx9_get_poll_char, | |
866 | .poll_put_char = serial_txx9_put_poll_char, | |
867 | #endif | |
1da177e4 LT |
868 | }; |
869 | ||
870 | static struct uart_txx9_port serial_txx9_ports[UART_NR]; | |
871 | ||
0970769a AN |
872 | static void __init serial_txx9_register_ports(struct uart_driver *drv, |
873 | struct device *dev) | |
1da177e4 LT |
874 | { |
875 | int i; | |
876 | ||
877 | for (i = 0; i < UART_NR; i++) { | |
878 | struct uart_txx9_port *up = &serial_txx9_ports[i]; | |
879 | ||
880 | up->port.line = i; | |
881 | up->port.ops = &serial_txx9_pops; | |
0970769a | 882 | up->port.dev = dev; |
83485f82 AN |
883 | if (up->port.iobase || up->port.mapbase) |
884 | uart_add_one_port(drv, &up->port); | |
1da177e4 LT |
885 | } |
886 | } | |
887 | ||
888 | #ifdef CONFIG_SERIAL_TXX9_CONSOLE | |
889 | ||
d358788f RK |
890 | static void serial_txx9_console_putchar(struct uart_port *port, int ch) |
891 | { | |
aa76224a | 892 | struct uart_txx9_port *up = to_uart_txx9_port(port); |
d358788f RK |
893 | |
894 | wait_for_xmitr(up); | |
895 | sio_out(up, TXX9_SITFIFO, ch); | |
896 | } | |
897 | ||
1da177e4 LT |
898 | /* |
899 | * Print a string to the serial port trying not to disturb | |
900 | * any possible real use of the port... | |
901 | * | |
902 | * The console_lock must be held when we get here. | |
903 | */ | |
904 | static void | |
905 | serial_txx9_console_write(struct console *co, const char *s, unsigned int count) | |
906 | { | |
907 | struct uart_txx9_port *up = &serial_txx9_ports[co->index]; | |
908 | unsigned int ier, flcr; | |
1da177e4 LT |
909 | |
910 | /* | |
911 | * First save the UER then disable the interrupts | |
912 | */ | |
913 | ier = sio_in(up, TXX9_SIDICR); | |
914 | sio_out(up, TXX9_SIDICR, 0); | |
915 | /* | |
916 | * Disable flow-control if enabled (and unnecessary) | |
917 | */ | |
918 | flcr = sio_in(up, TXX9_SIFLCR); | |
919 | if (!(up->port.flags & UPF_CONS_FLOW) && (flcr & TXX9_SIFLCR_TES)) | |
920 | sio_out(up, TXX9_SIFLCR, flcr & ~TXX9_SIFLCR_TES); | |
921 | ||
d358788f | 922 | uart_console_write(&up->port, s, count, serial_txx9_console_putchar); |
1da177e4 LT |
923 | |
924 | /* | |
925 | * Finally, wait for transmitter to become empty | |
926 | * and restore the IER | |
927 | */ | |
928 | wait_for_xmitr(up); | |
929 | sio_out(up, TXX9_SIFLCR, flcr); | |
930 | sio_out(up, TXX9_SIDICR, ier); | |
931 | } | |
932 | ||
0970769a | 933 | static int __init serial_txx9_console_setup(struct console *co, char *options) |
1da177e4 LT |
934 | { |
935 | struct uart_port *port; | |
936 | struct uart_txx9_port *up; | |
937 | int baud = 9600; | |
938 | int bits = 8; | |
939 | int parity = 'n'; | |
940 | int flow = 'n'; | |
941 | ||
942 | /* | |
943 | * Check whether an invalid uart number has been specified, and | |
944 | * if so, search for the first available port that does have | |
945 | * console support. | |
946 | */ | |
947 | if (co->index >= UART_NR) | |
948 | co->index = 0; | |
949 | up = &serial_txx9_ports[co->index]; | |
950 | port = &up->port; | |
951 | if (!port->ops) | |
952 | return -ENODEV; | |
953 | ||
0970769a | 954 | serial_txx9_initialize(&up->port); |
1da177e4 LT |
955 | |
956 | if (options) | |
957 | uart_parse_options(options, &baud, &parity, &bits, &flow); | |
958 | ||
959 | return uart_set_options(port, co, baud, parity, bits, flow); | |
960 | } | |
961 | ||
962 | static struct uart_driver serial_txx9_reg; | |
963 | static struct console serial_txx9_console = { | |
964 | .name = TXX9_TTY_NAME, | |
965 | .write = serial_txx9_console_write, | |
966 | .device = uart_console_device, | |
967 | .setup = serial_txx9_console_setup, | |
968 | .flags = CON_PRINTBUFFER, | |
969 | .index = -1, | |
970 | .data = &serial_txx9_reg, | |
971 | }; | |
972 | ||
973 | static int __init serial_txx9_console_init(void) | |
974 | { | |
975 | register_console(&serial_txx9_console); | |
976 | return 0; | |
977 | } | |
978 | console_initcall(serial_txx9_console_init); | |
979 | ||
1da177e4 LT |
980 | #define SERIAL_TXX9_CONSOLE &serial_txx9_console |
981 | #else | |
982 | #define SERIAL_TXX9_CONSOLE NULL | |
983 | #endif | |
984 | ||
985 | static struct uart_driver serial_txx9_reg = { | |
986 | .owner = THIS_MODULE, | |
987 | .driver_name = "serial_txx9", | |
1da177e4 LT |
988 | .dev_name = TXX9_TTY_NAME, |
989 | .major = TXX9_TTY_MAJOR, | |
990 | .minor = TXX9_TTY_MINOR_START, | |
991 | .nr = UART_NR, | |
992 | .cons = SERIAL_TXX9_CONSOLE, | |
993 | }; | |
994 | ||
995 | int __init early_serial_txx9_setup(struct uart_port *port) | |
996 | { | |
997 | if (port->line >= ARRAY_SIZE(serial_txx9_ports)) | |
998 | return -ENODEV; | |
999 | ||
1000 | serial_txx9_ports[port->line].port = *port; | |
1001 | serial_txx9_ports[port->line].port.ops = &serial_txx9_pops; | |
37a6c7d0 AN |
1002 | serial_txx9_ports[port->line].port.flags |= |
1003 | UPF_BOOT_AUTOCONF | UPF_FIXED_PORT; | |
1da177e4 LT |
1004 | return 0; |
1005 | } | |
1006 | ||
f392ecfa | 1007 | static DEFINE_MUTEX(serial_txx9_mutex); |
f5ee56cc RB |
1008 | |
1009 | /** | |
1010 | * serial_txx9_register_port - register a serial port | |
1011 | * @port: serial port template | |
1012 | * | |
1013 | * Configure the serial port specified by the request. | |
1014 | * | |
1015 | * The port is then probed and if necessary the IRQ is autodetected | |
1016 | * If this fails an error is returned. | |
1017 | * | |
1018 | * On success the port is ready to use and the line number is returned. | |
1019 | */ | |
9671f099 | 1020 | static int serial_txx9_register_port(struct uart_port *port) |
f5ee56cc RB |
1021 | { |
1022 | int i; | |
1023 | struct uart_txx9_port *uart; | |
1024 | int ret = -ENOSPC; | |
1025 | ||
f392ecfa | 1026 | mutex_lock(&serial_txx9_mutex); |
f5ee56cc RB |
1027 | for (i = 0; i < UART_NR; i++) { |
1028 | uart = &serial_txx9_ports[i]; | |
0970769a AN |
1029 | if (uart_match_port(&uart->port, port)) { |
1030 | uart_remove_one_port(&serial_txx9_reg, &uart->port); | |
f5ee56cc | 1031 | break; |
0970769a AN |
1032 | } |
1033 | } | |
1034 | if (i == UART_NR) { | |
1035 | /* Find unused port */ | |
1036 | for (i = 0; i < UART_NR; i++) { | |
1037 | uart = &serial_txx9_ports[i]; | |
1038 | if (!(uart->port.iobase || uart->port.mapbase)) | |
1039 | break; | |
1040 | } | |
f5ee56cc RB |
1041 | } |
1042 | if (i < UART_NR) { | |
f5ee56cc RB |
1043 | uart->port.iobase = port->iobase; |
1044 | uart->port.membase = port->membase; | |
1045 | uart->port.irq = port->irq; | |
1046 | uart->port.uartclk = port->uartclk; | |
1047 | uart->port.iotype = port->iotype; | |
37a6c7d0 AN |
1048 | uart->port.flags = port->flags |
1049 | | UPF_BOOT_AUTOCONF | UPF_FIXED_PORT; | |
f5ee56cc RB |
1050 | uart->port.mapbase = port->mapbase; |
1051 | if (port->dev) | |
1052 | uart->port.dev = port->dev; | |
1053 | ret = uart_add_one_port(&serial_txx9_reg, &uart->port); | |
1054 | if (ret == 0) | |
1055 | ret = uart->port.line; | |
1056 | } | |
f392ecfa | 1057 | mutex_unlock(&serial_txx9_mutex); |
f5ee56cc RB |
1058 | return ret; |
1059 | } | |
1060 | ||
1061 | /** | |
1062 | * serial_txx9_unregister_port - remove a txx9 serial port at runtime | |
1063 | * @line: serial line number | |
1064 | * | |
1065 | * Remove one serial port. This may not be called from interrupt | |
1066 | * context. We hand the port back to the our control. | |
1067 | */ | |
ae8d8a14 | 1068 | static void serial_txx9_unregister_port(int line) |
f5ee56cc RB |
1069 | { |
1070 | struct uart_txx9_port *uart = &serial_txx9_ports[line]; | |
1071 | ||
f392ecfa | 1072 | mutex_lock(&serial_txx9_mutex); |
f5ee56cc RB |
1073 | uart_remove_one_port(&serial_txx9_reg, &uart->port); |
1074 | uart->port.flags = 0; | |
1075 | uart->port.type = PORT_UNKNOWN; | |
1076 | uart->port.iobase = 0; | |
1077 | uart->port.mapbase = 0; | |
83485f82 | 1078 | uart->port.membase = NULL; |
f5ee56cc | 1079 | uart->port.dev = NULL; |
f392ecfa | 1080 | mutex_unlock(&serial_txx9_mutex); |
f5ee56cc RB |
1081 | } |
1082 | ||
0970769a AN |
1083 | /* |
1084 | * Register a set of serial devices attached to a platform device. | |
1085 | */ | |
9671f099 | 1086 | static int serial_txx9_probe(struct platform_device *dev) |
0970769a | 1087 | { |
574de559 | 1088 | struct uart_port *p = dev_get_platdata(&dev->dev); |
0970769a AN |
1089 | struct uart_port port; |
1090 | int ret, i; | |
1091 | ||
1092 | memset(&port, 0, sizeof(struct uart_port)); | |
1093 | for (i = 0; p && p->uartclk != 0; p++, i++) { | |
1094 | port.iobase = p->iobase; | |
1095 | port.membase = p->membase; | |
1096 | port.irq = p->irq; | |
1097 | port.uartclk = p->uartclk; | |
1098 | port.iotype = p->iotype; | |
1099 | port.flags = p->flags; | |
1100 | port.mapbase = p->mapbase; | |
1101 | port.dev = &dev->dev; | |
1102 | ret = serial_txx9_register_port(&port); | |
1103 | if (ret < 0) { | |
1104 | dev_err(&dev->dev, "unable to register port at index %d " | |
8433ac61 | 1105 | "(IO%lx MEM%llx IRQ%d): %d\n", i, |
ddb437b7 AN |
1106 | p->iobase, (unsigned long long)p->mapbase, |
1107 | p->irq, ret); | |
0970769a AN |
1108 | } |
1109 | } | |
1110 | return 0; | |
1111 | } | |
1112 | ||
1113 | /* | |
1114 | * Remove serial ports registered against a platform device. | |
1115 | */ | |
ae8d8a14 | 1116 | static int serial_txx9_remove(struct platform_device *dev) |
0970769a AN |
1117 | { |
1118 | int i; | |
1119 | ||
1120 | for (i = 0; i < UART_NR; i++) { | |
1121 | struct uart_txx9_port *up = &serial_txx9_ports[i]; | |
1122 | ||
1123 | if (up->port.dev == &dev->dev) | |
1124 | serial_txx9_unregister_port(i); | |
1125 | } | |
1126 | return 0; | |
1127 | } | |
1128 | ||
1129 | #ifdef CONFIG_PM | |
1130 | static int serial_txx9_suspend(struct platform_device *dev, pm_message_t state) | |
1131 | { | |
1132 | int i; | |
1133 | ||
1134 | for (i = 0; i < UART_NR; i++) { | |
1135 | struct uart_txx9_port *up = &serial_txx9_ports[i]; | |
1136 | ||
1137 | if (up->port.type != PORT_UNKNOWN && up->port.dev == &dev->dev) | |
1138 | uart_suspend_port(&serial_txx9_reg, &up->port); | |
1139 | } | |
1140 | ||
1141 | return 0; | |
1142 | } | |
1143 | ||
1144 | static int serial_txx9_resume(struct platform_device *dev) | |
1145 | { | |
1146 | int i; | |
1147 | ||
1148 | for (i = 0; i < UART_NR; i++) { | |
1149 | struct uart_txx9_port *up = &serial_txx9_ports[i]; | |
1150 | ||
1151 | if (up->port.type != PORT_UNKNOWN && up->port.dev == &dev->dev) | |
1152 | uart_resume_port(&serial_txx9_reg, &up->port); | |
1153 | } | |
1154 | ||
1155 | return 0; | |
1156 | } | |
1157 | #endif | |
1158 | ||
1159 | static struct platform_driver serial_txx9_plat_driver = { | |
1160 | .probe = serial_txx9_probe, | |
2d47b716 | 1161 | .remove = serial_txx9_remove, |
0970769a AN |
1162 | #ifdef CONFIG_PM |
1163 | .suspend = serial_txx9_suspend, | |
1164 | .resume = serial_txx9_resume, | |
1165 | #endif | |
1166 | .driver = { | |
1167 | .name = "serial_txx9", | |
0970769a AN |
1168 | }, |
1169 | }; | |
1170 | ||
1171 | #ifdef ENABLE_SERIAL_TXX9_PCI | |
1da177e4 LT |
1172 | /* |
1173 | * Probe one serial board. Unfortunately, there is no rhyme nor reason | |
1174 | * to the arrangement of serial ports on a PCI card. | |
1175 | */ | |
9671f099 | 1176 | static int |
1da177e4 LT |
1177 | pciserial_txx9_init_one(struct pci_dev *dev, const struct pci_device_id *ent) |
1178 | { | |
1179 | struct uart_port port; | |
1180 | int line; | |
1181 | int rc; | |
1182 | ||
1183 | rc = pci_enable_device(dev); | |
1184 | if (rc) | |
1185 | return rc; | |
1186 | ||
1187 | memset(&port, 0, sizeof(port)); | |
1188 | port.ops = &serial_txx9_pops; | |
1da177e4 LT |
1189 | port.flags |= UPF_TXX9_HAVE_CTS_LINE; |
1190 | port.uartclk = 66670000; | |
1191 | port.irq = dev->irq; | |
1192 | port.iotype = UPIO_PORT; | |
1193 | port.iobase = pci_resource_start(dev, 1); | |
f5ee56cc RB |
1194 | port.dev = &dev->dev; |
1195 | line = serial_txx9_register_port(&port); | |
1da177e4 LT |
1196 | if (line < 0) { |
1197 | printk(KERN_WARNING "Couldn't register serial port %s: %d\n", pci_name(dev), line); | |
0970769a AN |
1198 | pci_disable_device(dev); |
1199 | return line; | |
1da177e4 | 1200 | } |
0970769a | 1201 | pci_set_drvdata(dev, &serial_txx9_ports[line]); |
1da177e4 LT |
1202 | |
1203 | return 0; | |
1204 | } | |
1205 | ||
ae8d8a14 | 1206 | static void pciserial_txx9_remove_one(struct pci_dev *dev) |
1da177e4 | 1207 | { |
0970769a | 1208 | struct uart_txx9_port *up = pci_get_drvdata(dev); |
1da177e4 | 1209 | |
0970769a AN |
1210 | if (up) { |
1211 | serial_txx9_unregister_port(up->port.line); | |
1da177e4 LT |
1212 | pci_disable_device(dev); |
1213 | } | |
1214 | } | |
1215 | ||
138c5d25 | 1216 | #ifdef CONFIG_PM |
0370affe | 1217 | static int pciserial_txx9_suspend_one(struct pci_dev *dev, pm_message_t state) |
1da177e4 | 1218 | { |
0970769a | 1219 | struct uart_txx9_port *up = pci_get_drvdata(dev); |
1da177e4 | 1220 | |
0970769a AN |
1221 | if (up) |
1222 | uart_suspend_port(&serial_txx9_reg, &up->port); | |
f5ee56cc RB |
1223 | pci_save_state(dev); |
1224 | pci_set_power_state(dev, pci_choose_state(dev, state)); | |
1da177e4 LT |
1225 | return 0; |
1226 | } | |
1227 | ||
1228 | static int pciserial_txx9_resume_one(struct pci_dev *dev) | |
1229 | { | |
0970769a | 1230 | struct uart_txx9_port *up = pci_get_drvdata(dev); |
1da177e4 | 1231 | |
f5ee56cc RB |
1232 | pci_set_power_state(dev, PCI_D0); |
1233 | pci_restore_state(dev); | |
0970769a AN |
1234 | if (up) |
1235 | uart_resume_port(&serial_txx9_reg, &up->port); | |
1da177e4 LT |
1236 | return 0; |
1237 | } | |
138c5d25 | 1238 | #endif |
1da177e4 | 1239 | |
138c5d25 AN |
1240 | static const struct pci_device_id serial_txx9_pci_tbl[] = { |
1241 | { PCI_DEVICE(PCI_VENDOR_ID_TOSHIBA_2, PCI_DEVICE_ID_TOSHIBA_TC86C001_MISC) }, | |
1da177e4 LT |
1242 | { 0, } |
1243 | }; | |
1244 | ||
1245 | static struct pci_driver serial_txx9_pci_driver = { | |
1246 | .name = "serial_txx9", | |
1247 | .probe = pciserial_txx9_init_one, | |
2d47b716 | 1248 | .remove = pciserial_txx9_remove_one, |
138c5d25 | 1249 | #ifdef CONFIG_PM |
1da177e4 LT |
1250 | .suspend = pciserial_txx9_suspend_one, |
1251 | .resume = pciserial_txx9_resume_one, | |
138c5d25 | 1252 | #endif |
1da177e4 LT |
1253 | .id_table = serial_txx9_pci_tbl, |
1254 | }; | |
1255 | ||
1256 | MODULE_DEVICE_TABLE(pci, serial_txx9_pci_tbl); | |
1257 | #endif /* ENABLE_SERIAL_TXX9_PCI */ | |
1258 | ||
0970769a AN |
1259 | static struct platform_device *serial_txx9_plat_devs; |
1260 | ||
1da177e4 LT |
1261 | static int __init serial_txx9_init(void) |
1262 | { | |
1263 | int ret; | |
1264 | ||
1265 | printk(KERN_INFO "%s version %s\n", serial_name, serial_version); | |
1266 | ||
1267 | ret = uart_register_driver(&serial_txx9_reg); | |
0970769a AN |
1268 | if (ret) |
1269 | goto out; | |
1270 | ||
1271 | serial_txx9_plat_devs = platform_device_alloc("serial_txx9", -1); | |
1272 | if (!serial_txx9_plat_devs) { | |
1273 | ret = -ENOMEM; | |
1274 | goto unreg_uart_drv; | |
1275 | } | |
1276 | ||
1277 | ret = platform_device_add(serial_txx9_plat_devs); | |
1278 | if (ret) | |
1279 | goto put_dev; | |
1280 | ||
1281 | serial_txx9_register_ports(&serial_txx9_reg, | |
1282 | &serial_txx9_plat_devs->dev); | |
1283 | ||
1284 | ret = platform_driver_register(&serial_txx9_plat_driver); | |
1285 | if (ret) | |
1286 | goto del_dev; | |
1da177e4 LT |
1287 | |
1288 | #ifdef ENABLE_SERIAL_TXX9_PCI | |
0970769a | 1289 | ret = pci_register_driver(&serial_txx9_pci_driver); |
1da177e4 | 1290 | #endif |
0970769a AN |
1291 | if (ret == 0) |
1292 | goto out; | |
1293 | ||
1294 | del_dev: | |
1295 | platform_device_del(serial_txx9_plat_devs); | |
1296 | put_dev: | |
1297 | platform_device_put(serial_txx9_plat_devs); | |
1298 | unreg_uart_drv: | |
1299 | uart_unregister_driver(&serial_txx9_reg); | |
1300 | out: | |
1da177e4 LT |
1301 | return ret; |
1302 | } | |
1303 | ||
1304 | static void __exit serial_txx9_exit(void) | |
1305 | { | |
1306 | int i; | |
1307 | ||
1308 | #ifdef ENABLE_SERIAL_TXX9_PCI | |
1309 | pci_unregister_driver(&serial_txx9_pci_driver); | |
1310 | #endif | |
0970769a AN |
1311 | platform_driver_unregister(&serial_txx9_plat_driver); |
1312 | platform_device_unregister(serial_txx9_plat_devs); | |
83485f82 AN |
1313 | for (i = 0; i < UART_NR; i++) { |
1314 | struct uart_txx9_port *up = &serial_txx9_ports[i]; | |
1315 | if (up->port.iobase || up->port.mapbase) | |
1316 | uart_remove_one_port(&serial_txx9_reg, &up->port); | |
1317 | } | |
1da177e4 LT |
1318 | |
1319 | uart_unregister_driver(&serial_txx9_reg); | |
1320 | } | |
1321 | ||
1322 | module_init(serial_txx9_init); | |
1323 | module_exit(serial_txx9_exit); | |
1324 | ||
1325 | MODULE_LICENSE("GPL"); | |
1326 | MODULE_DESCRIPTION("TX39/49 serial driver"); | |
1327 | ||
1328 | MODULE_ALIAS_CHARDEV_MAJOR(TXX9_TTY_MAJOR); |