Commit | Line | Data |
---|---|---|
aa69a809 | 1 | /* |
eb70e5ab | 2 | * udc.c - ChipIdea UDC driver |
aa69a809 DL |
3 | * |
4 | * Copyright (C) 2008 Chipidea - MIPS Technologies, Inc. All rights reserved. | |
5 | * | |
6 | * Author: David Lopo | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or modify | |
9 | * it under the terms of the GNU General Public License version 2 as | |
10 | * published by the Free Software Foundation. | |
11 | */ | |
12 | ||
36825a2d | 13 | #include <linux/delay.h> |
aa69a809 DL |
14 | #include <linux/device.h> |
15 | #include <linux/dmapool.h> | |
ded017ee | 16 | #include <linux/err.h> |
5b08319f | 17 | #include <linux/irqreturn.h> |
aa69a809 | 18 | #include <linux/kernel.h> |
5a0e3ad6 | 19 | #include <linux/slab.h> |
c036019e | 20 | #include <linux/pm_runtime.h> |
aa69a809 DL |
21 | #include <linux/usb/ch9.h> |
22 | #include <linux/usb/gadget.h> | |
e443b333 | 23 | #include <linux/usb/chipidea.h> |
aa69a809 | 24 | |
e443b333 AS |
25 | #include "ci.h" |
26 | #include "udc.h" | |
27 | #include "bits.h" | |
28 | #include "debug.h" | |
3f124d23 | 29 | #include "otg.h" |
954aad8c | 30 | |
aa69a809 DL |
31 | /* control endpoint description */ |
32 | static const struct usb_endpoint_descriptor | |
ca9cfea0 | 33 | ctrl_endpt_out_desc = { |
aa69a809 DL |
34 | .bLength = USB_DT_ENDPOINT_SIZE, |
35 | .bDescriptorType = USB_DT_ENDPOINT, | |
36 | ||
ca9cfea0 PK |
37 | .bEndpointAddress = USB_DIR_OUT, |
38 | .bmAttributes = USB_ENDPOINT_XFER_CONTROL, | |
39 | .wMaxPacketSize = cpu_to_le16(CTRL_PAYLOAD_MAX), | |
40 | }; | |
41 | ||
42 | static const struct usb_endpoint_descriptor | |
43 | ctrl_endpt_in_desc = { | |
44 | .bLength = USB_DT_ENDPOINT_SIZE, | |
45 | .bDescriptorType = USB_DT_ENDPOINT, | |
46 | ||
47 | .bEndpointAddress = USB_DIR_IN, | |
aa69a809 DL |
48 | .bmAttributes = USB_ENDPOINT_XFER_CONTROL, |
49 | .wMaxPacketSize = cpu_to_le16(CTRL_PAYLOAD_MAX), | |
50 | }; | |
51 | ||
aa69a809 DL |
52 | /** |
53 | * hw_ep_bit: calculates the bit number | |
54 | * @num: endpoint number | |
55 | * @dir: endpoint direction | |
56 | * | |
57 | * This function returns bit number | |
58 | */ | |
59 | static inline int hw_ep_bit(int num, int dir) | |
60 | { | |
61 | return num + (dir ? 16 : 0); | |
62 | } | |
63 | ||
8e22978c | 64 | static inline int ep_to_bit(struct ci_hdrc *ci, int n) |
dd39c358 | 65 | { |
26c696c6 | 66 | int fill = 16 - ci->hw_ep_max / 2; |
dd39c358 | 67 | |
26c696c6 | 68 | if (n >= ci->hw_ep_max / 2) |
dd39c358 MKB |
69 | n += fill; |
70 | ||
71 | return n; | |
72 | } | |
73 | ||
aa69a809 | 74 | /** |
c0a48e6c | 75 | * hw_device_state: enables/disables interrupts (execute without interruption) |
aa69a809 DL |
76 | * @dma: 0 => disable, !0 => enable and set dma engine |
77 | * | |
78 | * This function returns an error code | |
79 | */ | |
8e22978c | 80 | static int hw_device_state(struct ci_hdrc *ci, u32 dma) |
aa69a809 DL |
81 | { |
82 | if (dma) { | |
26c696c6 | 83 | hw_write(ci, OP_ENDPTLISTADDR, ~0, dma); |
aa69a809 | 84 | /* interrupt, error, port change, reset, sleep/suspend */ |
26c696c6 | 85 | hw_write(ci, OP_USBINTR, ~0, |
aa69a809 | 86 | USBi_UI|USBi_UEI|USBi_PCI|USBi_URI|USBi_SLI); |
a107f8c5 | 87 | hw_write(ci, OP_USBCMD, USBCMD_RS, USBCMD_RS); |
aa69a809 | 88 | } else { |
26c696c6 | 89 | hw_write(ci, OP_USBINTR, ~0, 0); |
a107f8c5 | 90 | hw_write(ci, OP_USBCMD, USBCMD_RS, 0); |
aa69a809 DL |
91 | } |
92 | return 0; | |
93 | } | |
94 | ||
95 | /** | |
96 | * hw_ep_flush: flush endpoint fifo (execute without interruption) | |
97 | * @num: endpoint number | |
98 | * @dir: endpoint direction | |
99 | * | |
100 | * This function returns an error code | |
101 | */ | |
8e22978c | 102 | static int hw_ep_flush(struct ci_hdrc *ci, int num, int dir) |
aa69a809 DL |
103 | { |
104 | int n = hw_ep_bit(num, dir); | |
105 | ||
106 | do { | |
107 | /* flush any pending transfer */ | |
26c696c6 RZ |
108 | hw_write(ci, OP_ENDPTFLUSH, BIT(n), BIT(n)); |
109 | while (hw_read(ci, OP_ENDPTFLUSH, BIT(n))) | |
aa69a809 | 110 | cpu_relax(); |
26c696c6 | 111 | } while (hw_read(ci, OP_ENDPTSTAT, BIT(n))); |
aa69a809 DL |
112 | |
113 | return 0; | |
114 | } | |
115 | ||
116 | /** | |
117 | * hw_ep_disable: disables endpoint (execute without interruption) | |
118 | * @num: endpoint number | |
119 | * @dir: endpoint direction | |
120 | * | |
121 | * This function returns an error code | |
122 | */ | |
8e22978c | 123 | static int hw_ep_disable(struct ci_hdrc *ci, int num, int dir) |
aa69a809 | 124 | { |
26c696c6 RZ |
125 | hw_ep_flush(ci, num, dir); |
126 | hw_write(ci, OP_ENDPTCTRL + num, | |
d3595d13 | 127 | dir ? ENDPTCTRL_TXE : ENDPTCTRL_RXE, 0); |
aa69a809 DL |
128 | return 0; |
129 | } | |
130 | ||
131 | /** | |
132 | * hw_ep_enable: enables endpoint (execute without interruption) | |
133 | * @num: endpoint number | |
134 | * @dir: endpoint direction | |
135 | * @type: endpoint type | |
136 | * | |
137 | * This function returns an error code | |
138 | */ | |
8e22978c | 139 | static int hw_ep_enable(struct ci_hdrc *ci, int num, int dir, int type) |
aa69a809 DL |
140 | { |
141 | u32 mask, data; | |
142 | ||
143 | if (dir) { | |
144 | mask = ENDPTCTRL_TXT; /* type */ | |
727b4ddb | 145 | data = type << __ffs(mask); |
aa69a809 DL |
146 | |
147 | mask |= ENDPTCTRL_TXS; /* unstall */ | |
148 | mask |= ENDPTCTRL_TXR; /* reset data toggle */ | |
149 | data |= ENDPTCTRL_TXR; | |
150 | mask |= ENDPTCTRL_TXE; /* enable */ | |
151 | data |= ENDPTCTRL_TXE; | |
152 | } else { | |
153 | mask = ENDPTCTRL_RXT; /* type */ | |
727b4ddb | 154 | data = type << __ffs(mask); |
aa69a809 DL |
155 | |
156 | mask |= ENDPTCTRL_RXS; /* unstall */ | |
157 | mask |= ENDPTCTRL_RXR; /* reset data toggle */ | |
158 | data |= ENDPTCTRL_RXR; | |
159 | mask |= ENDPTCTRL_RXE; /* enable */ | |
160 | data |= ENDPTCTRL_RXE; | |
161 | } | |
26c696c6 | 162 | hw_write(ci, OP_ENDPTCTRL + num, mask, data); |
aa69a809 DL |
163 | return 0; |
164 | } | |
165 | ||
166 | /** | |
167 | * hw_ep_get_halt: return endpoint halt status | |
168 | * @num: endpoint number | |
169 | * @dir: endpoint direction | |
170 | * | |
171 | * This function returns 1 if endpoint halted | |
172 | */ | |
8e22978c | 173 | static int hw_ep_get_halt(struct ci_hdrc *ci, int num, int dir) |
aa69a809 DL |
174 | { |
175 | u32 mask = dir ? ENDPTCTRL_TXS : ENDPTCTRL_RXS; | |
176 | ||
26c696c6 | 177 | return hw_read(ci, OP_ENDPTCTRL + num, mask) ? 1 : 0; |
aa69a809 DL |
178 | } |
179 | ||
aa69a809 DL |
180 | /** |
181 | * hw_test_and_clear_setup_status: test & clear setup status (execute without | |
182 | * interruption) | |
dd39c358 | 183 | * @n: endpoint number |
aa69a809 DL |
184 | * |
185 | * This function returns setup status | |
186 | */ | |
8e22978c | 187 | static int hw_test_and_clear_setup_status(struct ci_hdrc *ci, int n) |
aa69a809 | 188 | { |
26c696c6 RZ |
189 | n = ep_to_bit(ci, n); |
190 | return hw_test_and_clear(ci, OP_ENDPTSETUPSTAT, BIT(n)); | |
aa69a809 DL |
191 | } |
192 | ||
193 | /** | |
194 | * hw_ep_prime: primes endpoint (execute without interruption) | |
195 | * @num: endpoint number | |
196 | * @dir: endpoint direction | |
197 | * @is_ctrl: true if control endpoint | |
198 | * | |
199 | * This function returns an error code | |
200 | */ | |
8e22978c | 201 | static int hw_ep_prime(struct ci_hdrc *ci, int num, int dir, int is_ctrl) |
aa69a809 DL |
202 | { |
203 | int n = hw_ep_bit(num, dir); | |
204 | ||
26c696c6 | 205 | if (is_ctrl && dir == RX && hw_read(ci, OP_ENDPTSETUPSTAT, BIT(num))) |
aa69a809 DL |
206 | return -EAGAIN; |
207 | ||
26c696c6 | 208 | hw_write(ci, OP_ENDPTPRIME, BIT(n), BIT(n)); |
aa69a809 | 209 | |
26c696c6 | 210 | while (hw_read(ci, OP_ENDPTPRIME, BIT(n))) |
aa69a809 | 211 | cpu_relax(); |
26c696c6 | 212 | if (is_ctrl && dir == RX && hw_read(ci, OP_ENDPTSETUPSTAT, BIT(num))) |
aa69a809 DL |
213 | return -EAGAIN; |
214 | ||
215 | /* status shoult be tested according with manual but it doesn't work */ | |
216 | return 0; | |
217 | } | |
218 | ||
219 | /** | |
220 | * hw_ep_set_halt: configures ep halt & resets data toggle after clear (execute | |
221 | * without interruption) | |
222 | * @num: endpoint number | |
223 | * @dir: endpoint direction | |
224 | * @value: true => stall, false => unstall | |
225 | * | |
226 | * This function returns an error code | |
227 | */ | |
8e22978c | 228 | static int hw_ep_set_halt(struct ci_hdrc *ci, int num, int dir, int value) |
aa69a809 DL |
229 | { |
230 | if (value != 0 && value != 1) | |
231 | return -EINVAL; | |
232 | ||
233 | do { | |
8e22978c | 234 | enum ci_hw_regs reg = OP_ENDPTCTRL + num; |
aa69a809 DL |
235 | u32 mask_xs = dir ? ENDPTCTRL_TXS : ENDPTCTRL_RXS; |
236 | u32 mask_xr = dir ? ENDPTCTRL_TXR : ENDPTCTRL_RXR; | |
237 | ||
238 | /* data toggle - reserved for EP0 but it's in ESS */ | |
26c696c6 | 239 | hw_write(ci, reg, mask_xs|mask_xr, |
262c1632 | 240 | value ? mask_xs : mask_xr); |
26c696c6 | 241 | } while (value != hw_ep_get_halt(ci, num, dir)); |
aa69a809 DL |
242 | |
243 | return 0; | |
244 | } | |
245 | ||
aa69a809 DL |
246 | /** |
247 | * hw_is_port_high_speed: test if port is high speed | |
248 | * | |
249 | * This function returns true if high speed port | |
250 | */ | |
8e22978c | 251 | static int hw_port_is_high_speed(struct ci_hdrc *ci) |
aa69a809 | 252 | { |
26c696c6 RZ |
253 | return ci->hw_bank.lpm ? hw_read(ci, OP_DEVLC, DEVLC_PSPD) : |
254 | hw_read(ci, OP_PORTSC, PORTSC_HSP); | |
aa69a809 DL |
255 | } |
256 | ||
aa69a809 DL |
257 | /** |
258 | * hw_read_intr_enable: returns interrupt enable register | |
259 | * | |
260 | * This function returns register data | |
261 | */ | |
8e22978c | 262 | static u32 hw_read_intr_enable(struct ci_hdrc *ci) |
aa69a809 | 263 | { |
26c696c6 | 264 | return hw_read(ci, OP_USBINTR, ~0); |
aa69a809 DL |
265 | } |
266 | ||
267 | /** | |
268 | * hw_read_intr_status: returns interrupt status register | |
269 | * | |
270 | * This function returns register data | |
271 | */ | |
8e22978c | 272 | static u32 hw_read_intr_status(struct ci_hdrc *ci) |
aa69a809 | 273 | { |
26c696c6 | 274 | return hw_read(ci, OP_USBSTS, ~0); |
aa69a809 DL |
275 | } |
276 | ||
aa69a809 DL |
277 | /** |
278 | * hw_test_and_clear_complete: test & clear complete status (execute without | |
279 | * interruption) | |
dd39c358 | 280 | * @n: endpoint number |
aa69a809 DL |
281 | * |
282 | * This function returns complete status | |
283 | */ | |
8e22978c | 284 | static int hw_test_and_clear_complete(struct ci_hdrc *ci, int n) |
aa69a809 | 285 | { |
26c696c6 RZ |
286 | n = ep_to_bit(ci, n); |
287 | return hw_test_and_clear(ci, OP_ENDPTCOMPLETE, BIT(n)); | |
aa69a809 DL |
288 | } |
289 | ||
290 | /** | |
291 | * hw_test_and_clear_intr_active: test & clear active interrupts (execute | |
292 | * without interruption) | |
293 | * | |
294 | * This function returns active interrutps | |
295 | */ | |
8e22978c | 296 | static u32 hw_test_and_clear_intr_active(struct ci_hdrc *ci) |
aa69a809 | 297 | { |
26c696c6 | 298 | u32 reg = hw_read_intr_status(ci) & hw_read_intr_enable(ci); |
aa69a809 | 299 | |
26c696c6 | 300 | hw_write(ci, OP_USBSTS, ~0, reg); |
aa69a809 DL |
301 | return reg; |
302 | } | |
303 | ||
304 | /** | |
305 | * hw_test_and_clear_setup_guard: test & clear setup guard (execute without | |
306 | * interruption) | |
307 | * | |
308 | * This function returns guard value | |
309 | */ | |
8e22978c | 310 | static int hw_test_and_clear_setup_guard(struct ci_hdrc *ci) |
aa69a809 | 311 | { |
26c696c6 | 312 | return hw_test_and_write(ci, OP_USBCMD, USBCMD_SUTW, 0); |
aa69a809 DL |
313 | } |
314 | ||
315 | /** | |
316 | * hw_test_and_set_setup_guard: test & set setup guard (execute without | |
317 | * interruption) | |
318 | * | |
319 | * This function returns guard value | |
320 | */ | |
8e22978c | 321 | static int hw_test_and_set_setup_guard(struct ci_hdrc *ci) |
aa69a809 | 322 | { |
26c696c6 | 323 | return hw_test_and_write(ci, OP_USBCMD, USBCMD_SUTW, USBCMD_SUTW); |
aa69a809 DL |
324 | } |
325 | ||
326 | /** | |
327 | * hw_usb_set_address: configures USB address (execute without interruption) | |
328 | * @value: new USB address | |
329 | * | |
ef15e549 AS |
330 | * This function explicitly sets the address, without the "USBADRA" (advance) |
331 | * feature, which is not supported by older versions of the controller. | |
aa69a809 | 332 | */ |
8e22978c | 333 | static void hw_usb_set_address(struct ci_hdrc *ci, u8 value) |
aa69a809 | 334 | { |
26c696c6 | 335 | hw_write(ci, OP_DEVICEADDR, DEVICEADDR_USBADR, |
727b4ddb | 336 | value << __ffs(DEVICEADDR_USBADR)); |
aa69a809 DL |
337 | } |
338 | ||
339 | /** | |
340 | * hw_usb_reset: restart device after a bus reset (execute without | |
341 | * interruption) | |
342 | * | |
343 | * This function returns an error code | |
344 | */ | |
8e22978c | 345 | static int hw_usb_reset(struct ci_hdrc *ci) |
aa69a809 | 346 | { |
26c696c6 | 347 | hw_usb_set_address(ci, 0); |
aa69a809 DL |
348 | |
349 | /* ESS flushes only at end?!? */ | |
26c696c6 | 350 | hw_write(ci, OP_ENDPTFLUSH, ~0, ~0); |
aa69a809 DL |
351 | |
352 | /* clear setup token semaphores */ | |
26c696c6 | 353 | hw_write(ci, OP_ENDPTSETUPSTAT, 0, 0); |
aa69a809 DL |
354 | |
355 | /* clear complete status */ | |
26c696c6 | 356 | hw_write(ci, OP_ENDPTCOMPLETE, 0, 0); |
aa69a809 DL |
357 | |
358 | /* wait until all bits cleared */ | |
26c696c6 | 359 | while (hw_read(ci, OP_ENDPTPRIME, ~0)) |
aa69a809 DL |
360 | udelay(10); /* not RTOS friendly */ |
361 | ||
362 | /* reset all endpoints ? */ | |
363 | ||
364 | /* reset internal status and wait for further instructions | |
365 | no need to verify the port reset status (ESS does it) */ | |
366 | ||
367 | return 0; | |
368 | } | |
369 | ||
aa69a809 DL |
370 | /****************************************************************************** |
371 | * UTIL block | |
372 | *****************************************************************************/ | |
cc9e6c49 | 373 | |
8e22978c | 374 | static int add_td_to_list(struct ci_hw_ep *hwep, struct ci_hw_req *hwreq, |
cc9e6c49 MG |
375 | unsigned length) |
376 | { | |
2e270412 MG |
377 | int i; |
378 | u32 temp; | |
cc9e6c49 MG |
379 | struct td_node *lastnode, *node = kzalloc(sizeof(struct td_node), |
380 | GFP_ATOMIC); | |
381 | ||
382 | if (node == NULL) | |
383 | return -ENOMEM; | |
384 | ||
2dbc5c4c | 385 | node->ptr = dma_pool_alloc(hwep->td_pool, GFP_ATOMIC, |
cc9e6c49 MG |
386 | &node->dma); |
387 | if (node->ptr == NULL) { | |
388 | kfree(node); | |
389 | return -ENOMEM; | |
390 | } | |
391 | ||
8e22978c | 392 | memset(node->ptr, 0, sizeof(struct ci_hw_td)); |
2e270412 MG |
393 | node->ptr->token = cpu_to_le32(length << __ffs(TD_TOTAL_BYTES)); |
394 | node->ptr->token &= cpu_to_le32(TD_TOTAL_BYTES); | |
395 | node->ptr->token |= cpu_to_le32(TD_STATUS_ACTIVE); | |
396 | ||
2dbc5c4c | 397 | temp = (u32) (hwreq->req.dma + hwreq->req.actual); |
2e270412 MG |
398 | if (length) { |
399 | node->ptr->page[0] = cpu_to_le32(temp); | |
400 | for (i = 1; i < TD_PAGE_COUNT; i++) { | |
8e22978c | 401 | u32 page = temp + i * CI_HDRC_PAGE_SIZE; |
2e270412 MG |
402 | page &= ~TD_RESERVED_MASK; |
403 | node->ptr->page[i] = cpu_to_le32(page); | |
404 | } | |
405 | } | |
406 | ||
2dbc5c4c | 407 | hwreq->req.actual += length; |
cc9e6c49 | 408 | |
2dbc5c4c | 409 | if (!list_empty(&hwreq->tds)) { |
cc9e6c49 | 410 | /* get the last entry */ |
2dbc5c4c | 411 | lastnode = list_entry(hwreq->tds.prev, |
cc9e6c49 MG |
412 | struct td_node, td); |
413 | lastnode->ptr->next = cpu_to_le32(node->dma); | |
414 | } | |
415 | ||
416 | INIT_LIST_HEAD(&node->td); | |
2dbc5c4c | 417 | list_add_tail(&node->td, &hwreq->tds); |
cc9e6c49 MG |
418 | |
419 | return 0; | |
420 | } | |
421 | ||
aa69a809 DL |
422 | /** |
423 | * _usb_addr: calculates endpoint address from direction & number | |
424 | * @ep: endpoint | |
425 | */ | |
8e22978c | 426 | static inline u8 _usb_addr(struct ci_hw_ep *ep) |
aa69a809 DL |
427 | { |
428 | return ((ep->dir == TX) ? USB_ENDPOINT_DIR_MASK : 0) | ep->num; | |
429 | } | |
430 | ||
431 | /** | |
432 | * _hardware_queue: configures a request at hardware level | |
433 | * @gadget: gadget | |
2dbc5c4c | 434 | * @hwep: endpoint |
aa69a809 DL |
435 | * |
436 | * This function returns an error code | |
437 | */ | |
8e22978c | 438 | static int _hardware_enqueue(struct ci_hw_ep *hwep, struct ci_hw_req *hwreq) |
aa69a809 | 439 | { |
8e22978c | 440 | struct ci_hdrc *ci = hwep->ci; |
0e6ca199 | 441 | int ret = 0; |
2dbc5c4c | 442 | unsigned rest = hwreq->req.length; |
2e270412 | 443 | int pages = TD_PAGE_COUNT; |
cc9e6c49 | 444 | struct td_node *firstnode, *lastnode; |
aa69a809 | 445 | |
aa69a809 | 446 | /* don't queue twice */ |
2dbc5c4c | 447 | if (hwreq->req.status == -EALREADY) |
aa69a809 DL |
448 | return -EALREADY; |
449 | ||
2dbc5c4c | 450 | hwreq->req.status = -EALREADY; |
aa69a809 | 451 | |
2dbc5c4c | 452 | ret = usb_gadget_map_request(&ci->gadget, &hwreq->req, hwep->dir); |
5e0aa49e AS |
453 | if (ret) |
454 | return ret; | |
455 | ||
2e270412 MG |
456 | /* |
457 | * The first buffer could be not page aligned. | |
458 | * In that case we have to span into one extra td. | |
459 | */ | |
2dbc5c4c | 460 | if (hwreq->req.dma % PAGE_SIZE) |
2e270412 | 461 | pages--; |
cc9e6c49 | 462 | |
2e270412 | 463 | if (rest == 0) |
2dbc5c4c | 464 | add_td_to_list(hwep, hwreq, 0); |
cc9e6c49 | 465 | |
2e270412 | 466 | while (rest > 0) { |
2dbc5c4c | 467 | unsigned count = min(hwreq->req.length - hwreq->req.actual, |
8e22978c | 468 | (unsigned)(pages * CI_HDRC_PAGE_SIZE)); |
2dbc5c4c | 469 | add_td_to_list(hwep, hwreq, count); |
2e270412 | 470 | rest -= count; |
0e6ca199 | 471 | } |
aa69a809 | 472 | |
2dbc5c4c AS |
473 | if (hwreq->req.zero && hwreq->req.length |
474 | && (hwreq->req.length % hwep->ep.maxpacket == 0)) | |
475 | add_td_to_list(hwep, hwreq, 0); | |
cc9e6c49 | 476 | |
2dbc5c4c | 477 | firstnode = list_first_entry(&hwreq->tds, struct td_node, td); |
2e270412 | 478 | |
2dbc5c4c | 479 | lastnode = list_entry(hwreq->tds.prev, |
cc9e6c49 MG |
480 | struct td_node, td); |
481 | ||
482 | lastnode->ptr->next = cpu_to_le32(TD_TERMINATE); | |
2dbc5c4c | 483 | if (!hwreq->req.no_interrupt) |
cc9e6c49 | 484 | lastnode->ptr->token |= cpu_to_le32(TD_IOC); |
a9c17430 MG |
485 | wmb(); |
486 | ||
2dbc5c4c AS |
487 | hwreq->req.actual = 0; |
488 | if (!list_empty(&hwep->qh.queue)) { | |
8e22978c | 489 | struct ci_hw_req *hwreqprev; |
2dbc5c4c | 490 | int n = hw_ep_bit(hwep->num, hwep->dir); |
0e6ca199 | 491 | int tmp_stat; |
cc9e6c49 MG |
492 | struct td_node *prevlastnode; |
493 | u32 next = firstnode->dma & TD_ADDR_MASK; | |
0e6ca199 | 494 | |
2dbc5c4c | 495 | hwreqprev = list_entry(hwep->qh.queue.prev, |
8e22978c | 496 | struct ci_hw_req, queue); |
2dbc5c4c | 497 | prevlastnode = list_entry(hwreqprev->tds.prev, |
cc9e6c49 MG |
498 | struct td_node, td); |
499 | ||
500 | prevlastnode->ptr->next = cpu_to_le32(next); | |
0e6ca199 | 501 | wmb(); |
26c696c6 | 502 | if (hw_read(ci, OP_ENDPTPRIME, BIT(n))) |
0e6ca199 PK |
503 | goto done; |
504 | do { | |
26c696c6 RZ |
505 | hw_write(ci, OP_USBCMD, USBCMD_ATDTW, USBCMD_ATDTW); |
506 | tmp_stat = hw_read(ci, OP_ENDPTSTAT, BIT(n)); | |
507 | } while (!hw_read(ci, OP_USBCMD, USBCMD_ATDTW)); | |
508 | hw_write(ci, OP_USBCMD, USBCMD_ATDTW, 0); | |
0e6ca199 PK |
509 | if (tmp_stat) |
510 | goto done; | |
511 | } | |
512 | ||
513 | /* QH configuration */ | |
2dbc5c4c AS |
514 | hwep->qh.ptr->td.next = cpu_to_le32(firstnode->dma); |
515 | hwep->qh.ptr->td.token &= | |
080ff5f4 | 516 | cpu_to_le32(~(TD_STATUS_HALTED|TD_STATUS_ACTIVE)); |
aa69a809 | 517 | |
2dbc5c4c AS |
518 | if (hwep->type == USB_ENDPOINT_XFER_ISOC) { |
519 | u32 mul = hwreq->req.length / hwep->ep.maxpacket; | |
e4ce4ecd | 520 | |
2dbc5c4c | 521 | if (hwreq->req.length % hwep->ep.maxpacket) |
e4ce4ecd | 522 | mul++; |
2dbc5c4c | 523 | hwep->qh.ptr->cap |= mul << __ffs(QH_MULT); |
e4ce4ecd MG |
524 | } |
525 | ||
aa69a809 DL |
526 | wmb(); /* synchronize before ep prime */ |
527 | ||
2dbc5c4c AS |
528 | ret = hw_ep_prime(ci, hwep->num, hwep->dir, |
529 | hwep->type == USB_ENDPOINT_XFER_CONTROL); | |
0e6ca199 PK |
530 | done: |
531 | return ret; | |
aa69a809 DL |
532 | } |
533 | ||
2e270412 MG |
534 | /* |
535 | * free_pending_td: remove a pending request for the endpoint | |
2dbc5c4c | 536 | * @hwep: endpoint |
2e270412 | 537 | */ |
8e22978c | 538 | static void free_pending_td(struct ci_hw_ep *hwep) |
2e270412 | 539 | { |
2dbc5c4c | 540 | struct td_node *pending = hwep->pending_td; |
2e270412 | 541 | |
2dbc5c4c AS |
542 | dma_pool_free(hwep->td_pool, pending->ptr, pending->dma); |
543 | hwep->pending_td = NULL; | |
2e270412 MG |
544 | kfree(pending); |
545 | } | |
546 | ||
aa69a809 DL |
547 | /** |
548 | * _hardware_dequeue: handles a request at hardware level | |
549 | * @gadget: gadget | |
2dbc5c4c | 550 | * @hwep: endpoint |
aa69a809 DL |
551 | * |
552 | * This function returns an error code | |
553 | */ | |
8e22978c | 554 | static int _hardware_dequeue(struct ci_hw_ep *hwep, struct ci_hw_req *hwreq) |
aa69a809 | 555 | { |
cc9e6c49 | 556 | u32 tmptoken; |
2e270412 MG |
557 | struct td_node *node, *tmpnode; |
558 | unsigned remaining_length; | |
2dbc5c4c | 559 | unsigned actual = hwreq->req.length; |
9e506438 | 560 | |
2dbc5c4c | 561 | if (hwreq->req.status != -EALREADY) |
aa69a809 DL |
562 | return -EINVAL; |
563 | ||
2dbc5c4c | 564 | hwreq->req.status = 0; |
0e6ca199 | 565 | |
2dbc5c4c | 566 | list_for_each_entry_safe(node, tmpnode, &hwreq->tds, td) { |
cc9e6c49 | 567 | tmptoken = le32_to_cpu(node->ptr->token); |
2e270412 | 568 | if ((TD_STATUS_ACTIVE & tmptoken) != 0) { |
2dbc5c4c | 569 | hwreq->req.status = -EALREADY; |
0e6ca199 | 570 | return -EBUSY; |
cc9e6c49 | 571 | } |
aa69a809 | 572 | |
2e270412 MG |
573 | remaining_length = (tmptoken & TD_TOTAL_BYTES); |
574 | remaining_length >>= __ffs(TD_TOTAL_BYTES); | |
575 | actual -= remaining_length; | |
576 | ||
2dbc5c4c AS |
577 | hwreq->req.status = tmptoken & TD_STATUS; |
578 | if ((TD_STATUS_HALTED & hwreq->req.status)) { | |
579 | hwreq->req.status = -EPIPE; | |
2e270412 | 580 | break; |
2dbc5c4c AS |
581 | } else if ((TD_STATUS_DT_ERR & hwreq->req.status)) { |
582 | hwreq->req.status = -EPROTO; | |
2e270412 | 583 | break; |
2dbc5c4c AS |
584 | } else if ((TD_STATUS_TR_ERR & hwreq->req.status)) { |
585 | hwreq->req.status = -EILSEQ; | |
2e270412 MG |
586 | break; |
587 | } | |
588 | ||
589 | if (remaining_length) { | |
2dbc5c4c AS |
590 | if (hwep->dir) { |
591 | hwreq->req.status = -EPROTO; | |
2e270412 MG |
592 | break; |
593 | } | |
594 | } | |
595 | /* | |
596 | * As the hardware could still address the freed td | |
597 | * which will run the udc unusable, the cleanup of the | |
598 | * td has to be delayed by one. | |
599 | */ | |
2dbc5c4c AS |
600 | if (hwep->pending_td) |
601 | free_pending_td(hwep); | |
2e270412 | 602 | |
2dbc5c4c | 603 | hwep->pending_td = node; |
2e270412 MG |
604 | list_del_init(&node->td); |
605 | } | |
aa69a809 | 606 | |
2dbc5c4c | 607 | usb_gadget_unmap_request(&hwep->ci->gadget, &hwreq->req, hwep->dir); |
aa69a809 | 608 | |
2dbc5c4c | 609 | hwreq->req.actual += actual; |
aa69a809 | 610 | |
2dbc5c4c AS |
611 | if (hwreq->req.status) |
612 | return hwreq->req.status; | |
aa69a809 | 613 | |
2dbc5c4c | 614 | return hwreq->req.actual; |
aa69a809 DL |
615 | } |
616 | ||
617 | /** | |
618 | * _ep_nuke: dequeues all endpoint requests | |
2dbc5c4c | 619 | * @hwep: endpoint |
aa69a809 DL |
620 | * |
621 | * This function returns an error code | |
622 | * Caller must hold lock | |
623 | */ | |
8e22978c | 624 | static int _ep_nuke(struct ci_hw_ep *hwep) |
2dbc5c4c AS |
625 | __releases(hwep->lock) |
626 | __acquires(hwep->lock) | |
aa69a809 | 627 | { |
2e270412 | 628 | struct td_node *node, *tmpnode; |
2dbc5c4c | 629 | if (hwep == NULL) |
aa69a809 DL |
630 | return -EINVAL; |
631 | ||
2dbc5c4c | 632 | hw_ep_flush(hwep->ci, hwep->num, hwep->dir); |
aa69a809 | 633 | |
2dbc5c4c | 634 | while (!list_empty(&hwep->qh.queue)) { |
aa69a809 DL |
635 | |
636 | /* pop oldest request */ | |
8e22978c AS |
637 | struct ci_hw_req *hwreq = list_entry(hwep->qh.queue.next, |
638 | struct ci_hw_req, queue); | |
7ca2cd29 | 639 | |
2dbc5c4c AS |
640 | list_for_each_entry_safe(node, tmpnode, &hwreq->tds, td) { |
641 | dma_pool_free(hwep->td_pool, node->ptr, node->dma); | |
2e270412 MG |
642 | list_del_init(&node->td); |
643 | node->ptr = NULL; | |
644 | kfree(node); | |
7ca2cd29 MG |
645 | } |
646 | ||
2dbc5c4c AS |
647 | list_del_init(&hwreq->queue); |
648 | hwreq->req.status = -ESHUTDOWN; | |
aa69a809 | 649 | |
2dbc5c4c AS |
650 | if (hwreq->req.complete != NULL) { |
651 | spin_unlock(hwep->lock); | |
652 | hwreq->req.complete(&hwep->ep, &hwreq->req); | |
653 | spin_lock(hwep->lock); | |
aa69a809 DL |
654 | } |
655 | } | |
2e270412 | 656 | |
2dbc5c4c AS |
657 | if (hwep->pending_td) |
658 | free_pending_td(hwep); | |
2e270412 | 659 | |
aa69a809 DL |
660 | return 0; |
661 | } | |
662 | ||
663 | /** | |
664 | * _gadget_stop_activity: stops all USB activity, flushes & disables all endpts | |
665 | * @gadget: gadget | |
666 | * | |
667 | * This function returns an error code | |
aa69a809 DL |
668 | */ |
669 | static int _gadget_stop_activity(struct usb_gadget *gadget) | |
aa69a809 DL |
670 | { |
671 | struct usb_ep *ep; | |
8e22978c | 672 | struct ci_hdrc *ci = container_of(gadget, struct ci_hdrc, gadget); |
e2b61c1d | 673 | unsigned long flags; |
aa69a809 | 674 | |
26c696c6 RZ |
675 | spin_lock_irqsave(&ci->lock, flags); |
676 | ci->gadget.speed = USB_SPEED_UNKNOWN; | |
677 | ci->remote_wakeup = 0; | |
678 | ci->suspended = 0; | |
679 | spin_unlock_irqrestore(&ci->lock, flags); | |
e2b61c1d | 680 | |
aa69a809 DL |
681 | /* flush all endpoints */ |
682 | gadget_for_each_ep(ep, gadget) { | |
683 | usb_ep_fifo_flush(ep); | |
684 | } | |
26c696c6 RZ |
685 | usb_ep_fifo_flush(&ci->ep0out->ep); |
686 | usb_ep_fifo_flush(&ci->ep0in->ep); | |
aa69a809 | 687 | |
aa69a809 DL |
688 | /* make sure to disable all endpoints */ |
689 | gadget_for_each_ep(ep, gadget) { | |
690 | usb_ep_disable(ep); | |
691 | } | |
aa69a809 | 692 | |
26c696c6 RZ |
693 | if (ci->status != NULL) { |
694 | usb_ep_free_request(&ci->ep0in->ep, ci->status); | |
695 | ci->status = NULL; | |
aa69a809 DL |
696 | } |
697 | ||
aa69a809 DL |
698 | return 0; |
699 | } | |
700 | ||
701 | /****************************************************************************** | |
702 | * ISR block | |
703 | *****************************************************************************/ | |
704 | /** | |
705 | * isr_reset_handler: USB reset interrupt handler | |
26c696c6 | 706 | * @ci: UDC device |
aa69a809 DL |
707 | * |
708 | * This function resets USB engine after a bus reset occurred | |
709 | */ | |
8e22978c | 710 | static void isr_reset_handler(struct ci_hdrc *ci) |
26c696c6 RZ |
711 | __releases(ci->lock) |
712 | __acquires(ci->lock) | |
aa69a809 | 713 | { |
aa69a809 DL |
714 | int retval; |
715 | ||
a3aee368 | 716 | spin_unlock(&ci->lock); |
92b336d7 PC |
717 | if (ci->gadget.speed != USB_SPEED_UNKNOWN) { |
718 | if (ci->driver) | |
719 | ci->driver->disconnect(&ci->gadget); | |
720 | } | |
721 | ||
26c696c6 | 722 | retval = _gadget_stop_activity(&ci->gadget); |
aa69a809 DL |
723 | if (retval) |
724 | goto done; | |
725 | ||
26c696c6 | 726 | retval = hw_usb_reset(ci); |
aa69a809 DL |
727 | if (retval) |
728 | goto done; | |
729 | ||
26c696c6 RZ |
730 | ci->status = usb_ep_alloc_request(&ci->ep0in->ep, GFP_ATOMIC); |
731 | if (ci->status == NULL) | |
ac1aa6a2 | 732 | retval = -ENOMEM; |
ca9cfea0 | 733 | |
b9322252 | 734 | done: |
26c696c6 | 735 | spin_lock(&ci->lock); |
aa69a809 | 736 | |
aa69a809 | 737 | if (retval) |
26c696c6 | 738 | dev_err(ci->dev, "error: %i\n", retval); |
aa69a809 DL |
739 | } |
740 | ||
741 | /** | |
742 | * isr_get_status_complete: get_status request complete function | |
743 | * @ep: endpoint | |
744 | * @req: request handled | |
745 | * | |
746 | * Caller must release lock | |
747 | */ | |
748 | static void isr_get_status_complete(struct usb_ep *ep, struct usb_request *req) | |
749 | { | |
0f089094 | 750 | if (ep == NULL || req == NULL) |
aa69a809 | 751 | return; |
aa69a809 DL |
752 | |
753 | kfree(req->buf); | |
754 | usb_ep_free_request(ep, req); | |
755 | } | |
756 | ||
dd064e9d MG |
757 | /** |
758 | * _ep_queue: queues (submits) an I/O request to an endpoint | |
759 | * | |
760 | * Caller must hold lock | |
761 | */ | |
762 | static int _ep_queue(struct usb_ep *ep, struct usb_request *req, | |
763 | gfp_t __maybe_unused gfp_flags) | |
764 | { | |
8e22978c AS |
765 | struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep); |
766 | struct ci_hw_req *hwreq = container_of(req, struct ci_hw_req, req); | |
767 | struct ci_hdrc *ci = hwep->ci; | |
dd064e9d MG |
768 | int retval = 0; |
769 | ||
2dbc5c4c | 770 | if (ep == NULL || req == NULL || hwep->ep.desc == NULL) |
dd064e9d MG |
771 | return -EINVAL; |
772 | ||
2dbc5c4c | 773 | if (hwep->type == USB_ENDPOINT_XFER_CONTROL) { |
dd064e9d | 774 | if (req->length) |
2dbc5c4c | 775 | hwep = (ci->ep0_dir == RX) ? |
dd064e9d | 776 | ci->ep0out : ci->ep0in; |
2dbc5c4c AS |
777 | if (!list_empty(&hwep->qh.queue)) { |
778 | _ep_nuke(hwep); | |
dd064e9d | 779 | retval = -EOVERFLOW; |
2dbc5c4c AS |
780 | dev_warn(hwep->ci->dev, "endpoint ctrl %X nuked\n", |
781 | _usb_addr(hwep)); | |
dd064e9d MG |
782 | } |
783 | } | |
784 | ||
2dbc5c4c AS |
785 | if (usb_endpoint_xfer_isoc(hwep->ep.desc) && |
786 | hwreq->req.length > (1 + hwep->ep.mult) * hwep->ep.maxpacket) { | |
787 | dev_err(hwep->ci->dev, "request length too big for isochronous\n"); | |
e4ce4ecd MG |
788 | return -EMSGSIZE; |
789 | } | |
790 | ||
dd064e9d | 791 | /* first nuke then test link, e.g. previous status has not sent */ |
2dbc5c4c AS |
792 | if (!list_empty(&hwreq->queue)) { |
793 | dev_err(hwep->ci->dev, "request already in queue\n"); | |
dd064e9d MG |
794 | return -EBUSY; |
795 | } | |
796 | ||
dd064e9d | 797 | /* push request */ |
2dbc5c4c AS |
798 | hwreq->req.status = -EINPROGRESS; |
799 | hwreq->req.actual = 0; | |
dd064e9d | 800 | |
2dbc5c4c | 801 | retval = _hardware_enqueue(hwep, hwreq); |
dd064e9d MG |
802 | |
803 | if (retval == -EALREADY) | |
804 | retval = 0; | |
805 | if (!retval) | |
2dbc5c4c | 806 | list_add_tail(&hwreq->queue, &hwep->qh.queue); |
dd064e9d MG |
807 | |
808 | return retval; | |
809 | } | |
810 | ||
aa69a809 DL |
811 | /** |
812 | * isr_get_status_response: get_status request response | |
26c696c6 | 813 | * @ci: ci struct |
aa69a809 DL |
814 | * @setup: setup request packet |
815 | * | |
816 | * This function returns an error code | |
817 | */ | |
8e22978c | 818 | static int isr_get_status_response(struct ci_hdrc *ci, |
aa69a809 | 819 | struct usb_ctrlrequest *setup) |
2dbc5c4c AS |
820 | __releases(hwep->lock) |
821 | __acquires(hwep->lock) | |
aa69a809 | 822 | { |
8e22978c | 823 | struct ci_hw_ep *hwep = ci->ep0in; |
aa69a809 DL |
824 | struct usb_request *req = NULL; |
825 | gfp_t gfp_flags = GFP_ATOMIC; | |
826 | int dir, num, retval; | |
827 | ||
2dbc5c4c | 828 | if (hwep == NULL || setup == NULL) |
aa69a809 DL |
829 | return -EINVAL; |
830 | ||
2dbc5c4c AS |
831 | spin_unlock(hwep->lock); |
832 | req = usb_ep_alloc_request(&hwep->ep, gfp_flags); | |
833 | spin_lock(hwep->lock); | |
aa69a809 DL |
834 | if (req == NULL) |
835 | return -ENOMEM; | |
836 | ||
837 | req->complete = isr_get_status_complete; | |
838 | req->length = 2; | |
839 | req->buf = kzalloc(req->length, gfp_flags); | |
840 | if (req->buf == NULL) { | |
841 | retval = -ENOMEM; | |
842 | goto err_free_req; | |
843 | } | |
844 | ||
845 | if ((setup->bRequestType & USB_RECIP_MASK) == USB_RECIP_DEVICE) { | |
e2b61c1d | 846 | /* Assume that device is bus powered for now. */ |
26c696c6 | 847 | *(u16 *)req->buf = ci->remote_wakeup << 1; |
aa69a809 DL |
848 | retval = 0; |
849 | } else if ((setup->bRequestType & USB_RECIP_MASK) \ | |
850 | == USB_RECIP_ENDPOINT) { | |
851 | dir = (le16_to_cpu(setup->wIndex) & USB_ENDPOINT_DIR_MASK) ? | |
852 | TX : RX; | |
853 | num = le16_to_cpu(setup->wIndex) & USB_ENDPOINT_NUMBER_MASK; | |
26c696c6 | 854 | *(u16 *)req->buf = hw_ep_get_halt(ci, num, dir); |
aa69a809 DL |
855 | } |
856 | /* else do nothing; reserved for future use */ | |
857 | ||
2dbc5c4c | 858 | retval = _ep_queue(&hwep->ep, req, gfp_flags); |
aa69a809 DL |
859 | if (retval) |
860 | goto err_free_buf; | |
861 | ||
862 | return 0; | |
863 | ||
864 | err_free_buf: | |
865 | kfree(req->buf); | |
866 | err_free_req: | |
2dbc5c4c AS |
867 | spin_unlock(hwep->lock); |
868 | usb_ep_free_request(&hwep->ep, req); | |
869 | spin_lock(hwep->lock); | |
aa69a809 DL |
870 | return retval; |
871 | } | |
872 | ||
541cace8 PK |
873 | /** |
874 | * isr_setup_status_complete: setup_status request complete function | |
875 | * @ep: endpoint | |
876 | * @req: request handled | |
877 | * | |
878 | * Caller must release lock. Put the port in test mode if test mode | |
879 | * feature is selected. | |
880 | */ | |
881 | static void | |
882 | isr_setup_status_complete(struct usb_ep *ep, struct usb_request *req) | |
883 | { | |
8e22978c | 884 | struct ci_hdrc *ci = req->context; |
541cace8 PK |
885 | unsigned long flags; |
886 | ||
26c696c6 RZ |
887 | if (ci->setaddr) { |
888 | hw_usb_set_address(ci, ci->address); | |
889 | ci->setaddr = false; | |
ef15e549 AS |
890 | } |
891 | ||
26c696c6 RZ |
892 | spin_lock_irqsave(&ci->lock, flags); |
893 | if (ci->test_mode) | |
894 | hw_port_test_set(ci, ci->test_mode); | |
895 | spin_unlock_irqrestore(&ci->lock, flags); | |
541cace8 PK |
896 | } |
897 | ||
aa69a809 DL |
898 | /** |
899 | * isr_setup_status_phase: queues the status phase of a setup transation | |
26c696c6 | 900 | * @ci: ci struct |
aa69a809 DL |
901 | * |
902 | * This function returns an error code | |
903 | */ | |
8e22978c | 904 | static int isr_setup_status_phase(struct ci_hdrc *ci) |
aa69a809 DL |
905 | { |
906 | int retval; | |
8e22978c | 907 | struct ci_hw_ep *hwep; |
aa69a809 | 908 | |
2dbc5c4c | 909 | hwep = (ci->ep0_dir == TX) ? ci->ep0out : ci->ep0in; |
26c696c6 RZ |
910 | ci->status->context = ci; |
911 | ci->status->complete = isr_setup_status_complete; | |
aa69a809 | 912 | |
2dbc5c4c | 913 | retval = _ep_queue(&hwep->ep, ci->status, GFP_ATOMIC); |
aa69a809 DL |
914 | |
915 | return retval; | |
916 | } | |
917 | ||
918 | /** | |
919 | * isr_tr_complete_low: transaction complete low level handler | |
2dbc5c4c | 920 | * @hwep: endpoint |
aa69a809 DL |
921 | * |
922 | * This function returns an error code | |
923 | * Caller must hold lock | |
924 | */ | |
8e22978c | 925 | static int isr_tr_complete_low(struct ci_hw_ep *hwep) |
2dbc5c4c AS |
926 | __releases(hwep->lock) |
927 | __acquires(hwep->lock) | |
aa69a809 | 928 | { |
8e22978c AS |
929 | struct ci_hw_req *hwreq, *hwreqtemp; |
930 | struct ci_hw_ep *hweptemp = hwep; | |
db89960e | 931 | int retval = 0; |
aa69a809 | 932 | |
2dbc5c4c | 933 | list_for_each_entry_safe(hwreq, hwreqtemp, &hwep->qh.queue, |
0e6ca199 | 934 | queue) { |
2dbc5c4c | 935 | retval = _hardware_dequeue(hwep, hwreq); |
0e6ca199 PK |
936 | if (retval < 0) |
937 | break; | |
2dbc5c4c AS |
938 | list_del_init(&hwreq->queue); |
939 | if (hwreq->req.complete != NULL) { | |
940 | spin_unlock(hwep->lock); | |
941 | if ((hwep->type == USB_ENDPOINT_XFER_CONTROL) && | |
942 | hwreq->req.length) | |
943 | hweptemp = hwep->ci->ep0in; | |
944 | hwreq->req.complete(&hweptemp->ep, &hwreq->req); | |
945 | spin_lock(hwep->lock); | |
0e6ca199 | 946 | } |
d9bb9c18 AL |
947 | } |
948 | ||
ef907482 | 949 | if (retval == -EBUSY) |
0e6ca199 | 950 | retval = 0; |
aa69a809 | 951 | |
aa69a809 DL |
952 | return retval; |
953 | } | |
954 | ||
955 | /** | |
956 | * isr_tr_complete_handler: transaction complete interrupt handler | |
26c696c6 | 957 | * @ci: UDC descriptor |
aa69a809 DL |
958 | * |
959 | * This function handles traffic events | |
960 | */ | |
8e22978c | 961 | static void isr_tr_complete_handler(struct ci_hdrc *ci) |
26c696c6 RZ |
962 | __releases(ci->lock) |
963 | __acquires(ci->lock) | |
aa69a809 DL |
964 | { |
965 | unsigned i; | |
541cace8 | 966 | u8 tmode = 0; |
aa69a809 | 967 | |
26c696c6 | 968 | for (i = 0; i < ci->hw_ep_max; i++) { |
8e22978c | 969 | struct ci_hw_ep *hwep = &ci->ci_hw_ep[i]; |
4c5212b7 | 970 | int type, num, dir, err = -EINVAL; |
aa69a809 DL |
971 | struct usb_ctrlrequest req; |
972 | ||
2dbc5c4c | 973 | if (hwep->ep.desc == NULL) |
aa69a809 DL |
974 | continue; /* not configured */ |
975 | ||
26c696c6 | 976 | if (hw_test_and_clear_complete(ci, i)) { |
2dbc5c4c AS |
977 | err = isr_tr_complete_low(hwep); |
978 | if (hwep->type == USB_ENDPOINT_XFER_CONTROL) { | |
aa69a809 | 979 | if (err > 0) /* needs status phase */ |
26c696c6 | 980 | err = isr_setup_status_phase(ci); |
aa69a809 | 981 | if (err < 0) { |
26c696c6 | 982 | spin_unlock(&ci->lock); |
2dbc5c4c | 983 | if (usb_ep_set_halt(&hwep->ep)) |
26c696c6 | 984 | dev_err(ci->dev, |
0917ba84 | 985 | "error: ep_set_halt\n"); |
26c696c6 | 986 | spin_lock(&ci->lock); |
aa69a809 DL |
987 | } |
988 | } | |
989 | } | |
990 | ||
2dbc5c4c | 991 | if (hwep->type != USB_ENDPOINT_XFER_CONTROL || |
26c696c6 | 992 | !hw_test_and_clear_setup_status(ci, i)) |
aa69a809 DL |
993 | continue; |
994 | ||
995 | if (i != 0) { | |
26c696c6 | 996 | dev_warn(ci->dev, "ctrl traffic at endpoint %d\n", i); |
aa69a809 DL |
997 | continue; |
998 | } | |
999 | ||
ca9cfea0 PK |
1000 | /* |
1001 | * Flush data and handshake transactions of previous | |
1002 | * setup packet. | |
1003 | */ | |
26c696c6 RZ |
1004 | _ep_nuke(ci->ep0out); |
1005 | _ep_nuke(ci->ep0in); | |
ca9cfea0 | 1006 | |
aa69a809 DL |
1007 | /* read_setup_packet */ |
1008 | do { | |
26c696c6 | 1009 | hw_test_and_set_setup_guard(ci); |
2dbc5c4c | 1010 | memcpy(&req, &hwep->qh.ptr->setup, sizeof(req)); |
26c696c6 | 1011 | } while (!hw_test_and_clear_setup_guard(ci)); |
aa69a809 DL |
1012 | |
1013 | type = req.bRequestType; | |
1014 | ||
26c696c6 | 1015 | ci->ep0_dir = (type & USB_DIR_IN) ? TX : RX; |
aa69a809 | 1016 | |
aa69a809 DL |
1017 | switch (req.bRequest) { |
1018 | case USB_REQ_CLEAR_FEATURE: | |
e2b61c1d PK |
1019 | if (type == (USB_DIR_OUT|USB_RECIP_ENDPOINT) && |
1020 | le16_to_cpu(req.wValue) == | |
1021 | USB_ENDPOINT_HALT) { | |
1022 | if (req.wLength != 0) | |
1023 | break; | |
1024 | num = le16_to_cpu(req.wIndex); | |
4c5212b7 | 1025 | dir = num & USB_ENDPOINT_DIR_MASK; |
e2b61c1d | 1026 | num &= USB_ENDPOINT_NUMBER_MASK; |
4c5212b7 | 1027 | if (dir) /* TX */ |
26c696c6 | 1028 | num += ci->hw_ep_max/2; |
8e22978c | 1029 | if (!ci->ci_hw_ep[num].wedge) { |
26c696c6 | 1030 | spin_unlock(&ci->lock); |
e2b61c1d | 1031 | err = usb_ep_clear_halt( |
8e22978c | 1032 | &ci->ci_hw_ep[num].ep); |
26c696c6 | 1033 | spin_lock(&ci->lock); |
e2b61c1d PK |
1034 | if (err) |
1035 | break; | |
1036 | } | |
26c696c6 | 1037 | err = isr_setup_status_phase(ci); |
e2b61c1d PK |
1038 | } else if (type == (USB_DIR_OUT|USB_RECIP_DEVICE) && |
1039 | le16_to_cpu(req.wValue) == | |
1040 | USB_DEVICE_REMOTE_WAKEUP) { | |
1041 | if (req.wLength != 0) | |
aa69a809 | 1042 | break; |
26c696c6 RZ |
1043 | ci->remote_wakeup = 0; |
1044 | err = isr_setup_status_phase(ci); | |
e2b61c1d PK |
1045 | } else { |
1046 | goto delegate; | |
aa69a809 | 1047 | } |
aa69a809 DL |
1048 | break; |
1049 | case USB_REQ_GET_STATUS: | |
1050 | if (type != (USB_DIR_IN|USB_RECIP_DEVICE) && | |
1051 | type != (USB_DIR_IN|USB_RECIP_ENDPOINT) && | |
1052 | type != (USB_DIR_IN|USB_RECIP_INTERFACE)) | |
1053 | goto delegate; | |
1054 | if (le16_to_cpu(req.wLength) != 2 || | |
1055 | le16_to_cpu(req.wValue) != 0) | |
1056 | break; | |
26c696c6 | 1057 | err = isr_get_status_response(ci, &req); |
aa69a809 DL |
1058 | break; |
1059 | case USB_REQ_SET_ADDRESS: | |
1060 | if (type != (USB_DIR_OUT|USB_RECIP_DEVICE)) | |
1061 | goto delegate; | |
1062 | if (le16_to_cpu(req.wLength) != 0 || | |
1063 | le16_to_cpu(req.wIndex) != 0) | |
1064 | break; | |
26c696c6 RZ |
1065 | ci->address = (u8)le16_to_cpu(req.wValue); |
1066 | ci->setaddr = true; | |
1067 | err = isr_setup_status_phase(ci); | |
aa69a809 DL |
1068 | break; |
1069 | case USB_REQ_SET_FEATURE: | |
e2b61c1d PK |
1070 | if (type == (USB_DIR_OUT|USB_RECIP_ENDPOINT) && |
1071 | le16_to_cpu(req.wValue) == | |
1072 | USB_ENDPOINT_HALT) { | |
1073 | if (req.wLength != 0) | |
1074 | break; | |
1075 | num = le16_to_cpu(req.wIndex); | |
4c5212b7 | 1076 | dir = num & USB_ENDPOINT_DIR_MASK; |
e2b61c1d | 1077 | num &= USB_ENDPOINT_NUMBER_MASK; |
4c5212b7 | 1078 | if (dir) /* TX */ |
26c696c6 | 1079 | num += ci->hw_ep_max/2; |
aa69a809 | 1080 | |
26c696c6 | 1081 | spin_unlock(&ci->lock); |
8e22978c | 1082 | err = usb_ep_set_halt(&ci->ci_hw_ep[num].ep); |
26c696c6 | 1083 | spin_lock(&ci->lock); |
e2b61c1d | 1084 | if (!err) |
26c696c6 | 1085 | isr_setup_status_phase(ci); |
541cace8 | 1086 | } else if (type == (USB_DIR_OUT|USB_RECIP_DEVICE)) { |
e2b61c1d PK |
1087 | if (req.wLength != 0) |
1088 | break; | |
541cace8 PK |
1089 | switch (le16_to_cpu(req.wValue)) { |
1090 | case USB_DEVICE_REMOTE_WAKEUP: | |
26c696c6 RZ |
1091 | ci->remote_wakeup = 1; |
1092 | err = isr_setup_status_phase(ci); | |
541cace8 PK |
1093 | break; |
1094 | case USB_DEVICE_TEST_MODE: | |
1095 | tmode = le16_to_cpu(req.wIndex) >> 8; | |
1096 | switch (tmode) { | |
1097 | case TEST_J: | |
1098 | case TEST_K: | |
1099 | case TEST_SE0_NAK: | |
1100 | case TEST_PACKET: | |
1101 | case TEST_FORCE_EN: | |
26c696c6 | 1102 | ci->test_mode = tmode; |
541cace8 | 1103 | err = isr_setup_status_phase( |
26c696c6 | 1104 | ci); |
541cace8 PK |
1105 | break; |
1106 | default: | |
1107 | break; | |
1108 | } | |
1109 | default: | |
1110 | goto delegate; | |
1111 | } | |
e2b61c1d PK |
1112 | } else { |
1113 | goto delegate; | |
1114 | } | |
aa69a809 DL |
1115 | break; |
1116 | default: | |
1117 | delegate: | |
1118 | if (req.wLength == 0) /* no data phase */ | |
26c696c6 | 1119 | ci->ep0_dir = TX; |
aa69a809 | 1120 | |
26c696c6 RZ |
1121 | spin_unlock(&ci->lock); |
1122 | err = ci->driver->setup(&ci->gadget, &req); | |
1123 | spin_lock(&ci->lock); | |
aa69a809 DL |
1124 | break; |
1125 | } | |
1126 | ||
1127 | if (err < 0) { | |
26c696c6 | 1128 | spin_unlock(&ci->lock); |
2dbc5c4c | 1129 | if (usb_ep_set_halt(&hwep->ep)) |
26c696c6 RZ |
1130 | dev_err(ci->dev, "error: ep_set_halt\n"); |
1131 | spin_lock(&ci->lock); | |
aa69a809 DL |
1132 | } |
1133 | } | |
1134 | } | |
1135 | ||
1136 | /****************************************************************************** | |
1137 | * ENDPT block | |
1138 | *****************************************************************************/ | |
1139 | /** | |
1140 | * ep_enable: configure endpoint, making it usable | |
1141 | * | |
1142 | * Check usb_ep_enable() at "usb_gadget.h" for details | |
1143 | */ | |
1144 | static int ep_enable(struct usb_ep *ep, | |
1145 | const struct usb_endpoint_descriptor *desc) | |
1146 | { | |
8e22978c | 1147 | struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep); |
ca9cfea0 | 1148 | int retval = 0; |
aa69a809 | 1149 | unsigned long flags; |
1cd12a9c | 1150 | u32 cap = 0; |
aa69a809 | 1151 | |
aa69a809 DL |
1152 | if (ep == NULL || desc == NULL) |
1153 | return -EINVAL; | |
1154 | ||
2dbc5c4c | 1155 | spin_lock_irqsave(hwep->lock, flags); |
aa69a809 DL |
1156 | |
1157 | /* only internal SW should enable ctrl endpts */ | |
1158 | ||
2dbc5c4c | 1159 | hwep->ep.desc = desc; |
aa69a809 | 1160 | |
2dbc5c4c AS |
1161 | if (!list_empty(&hwep->qh.queue)) |
1162 | dev_warn(hwep->ci->dev, "enabling a non-empty endpoint!\n"); | |
aa69a809 | 1163 | |
2dbc5c4c AS |
1164 | hwep->dir = usb_endpoint_dir_in(desc) ? TX : RX; |
1165 | hwep->num = usb_endpoint_num(desc); | |
1166 | hwep->type = usb_endpoint_type(desc); | |
aa69a809 | 1167 | |
2dbc5c4c AS |
1168 | hwep->ep.maxpacket = usb_endpoint_maxp(desc) & 0x07ff; |
1169 | hwep->ep.mult = QH_ISO_MULT(usb_endpoint_maxp(desc)); | |
aa69a809 | 1170 | |
2dbc5c4c | 1171 | if (hwep->type == USB_ENDPOINT_XFER_CONTROL) |
1cd12a9c | 1172 | cap |= QH_IOS; |
2dbc5c4c | 1173 | if (hwep->num) |
776ffc16 | 1174 | cap |= QH_ZLT; |
2dbc5c4c | 1175 | cap |= (hwep->ep.maxpacket << __ffs(QH_MAX_PKT)) & QH_MAX_PKT; |
1cd12a9c | 1176 | |
2dbc5c4c | 1177 | hwep->qh.ptr->cap = cpu_to_le32(cap); |
1cd12a9c | 1178 | |
2dbc5c4c | 1179 | hwep->qh.ptr->td.next |= cpu_to_le32(TD_TERMINATE); /* needed? */ |
aa69a809 | 1180 | |
ac1aa6a2 A |
1181 | /* |
1182 | * Enable endpoints in the HW other than ep0 as ep0 | |
1183 | * is always enabled | |
1184 | */ | |
2dbc5c4c AS |
1185 | if (hwep->num) |
1186 | retval |= hw_ep_enable(hwep->ci, hwep->num, hwep->dir, | |
1187 | hwep->type); | |
aa69a809 | 1188 | |
2dbc5c4c | 1189 | spin_unlock_irqrestore(hwep->lock, flags); |
aa69a809 DL |
1190 | return retval; |
1191 | } | |
1192 | ||
1193 | /** | |
1194 | * ep_disable: endpoint is no longer usable | |
1195 | * | |
1196 | * Check usb_ep_disable() at "usb_gadget.h" for details | |
1197 | */ | |
1198 | static int ep_disable(struct usb_ep *ep) | |
1199 | { | |
8e22978c | 1200 | struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep); |
aa69a809 DL |
1201 | int direction, retval = 0; |
1202 | unsigned long flags; | |
1203 | ||
aa69a809 DL |
1204 | if (ep == NULL) |
1205 | return -EINVAL; | |
2dbc5c4c | 1206 | else if (hwep->ep.desc == NULL) |
aa69a809 DL |
1207 | return -EBUSY; |
1208 | ||
2dbc5c4c | 1209 | spin_lock_irqsave(hwep->lock, flags); |
aa69a809 DL |
1210 | |
1211 | /* only internal SW should disable ctrl endpts */ | |
1212 | ||
2dbc5c4c | 1213 | direction = hwep->dir; |
aa69a809 | 1214 | do { |
2dbc5c4c AS |
1215 | retval |= _ep_nuke(hwep); |
1216 | retval |= hw_ep_disable(hwep->ci, hwep->num, hwep->dir); | |
aa69a809 | 1217 | |
2dbc5c4c AS |
1218 | if (hwep->type == USB_ENDPOINT_XFER_CONTROL) |
1219 | hwep->dir = (hwep->dir == TX) ? RX : TX; | |
aa69a809 | 1220 | |
2dbc5c4c | 1221 | } while (hwep->dir != direction); |
aa69a809 | 1222 | |
2dbc5c4c | 1223 | hwep->ep.desc = NULL; |
aa69a809 | 1224 | |
2dbc5c4c | 1225 | spin_unlock_irqrestore(hwep->lock, flags); |
aa69a809 DL |
1226 | return retval; |
1227 | } | |
1228 | ||
1229 | /** | |
1230 | * ep_alloc_request: allocate a request object to use with this endpoint | |
1231 | * | |
1232 | * Check usb_ep_alloc_request() at "usb_gadget.h" for details | |
1233 | */ | |
1234 | static struct usb_request *ep_alloc_request(struct usb_ep *ep, gfp_t gfp_flags) | |
1235 | { | |
8e22978c | 1236 | struct ci_hw_req *hwreq = NULL; |
aa69a809 | 1237 | |
0f089094 | 1238 | if (ep == NULL) |
aa69a809 | 1239 | return NULL; |
aa69a809 | 1240 | |
8e22978c | 1241 | hwreq = kzalloc(sizeof(struct ci_hw_req), gfp_flags); |
2dbc5c4c AS |
1242 | if (hwreq != NULL) { |
1243 | INIT_LIST_HEAD(&hwreq->queue); | |
1244 | INIT_LIST_HEAD(&hwreq->tds); | |
aa69a809 DL |
1245 | } |
1246 | ||
2dbc5c4c | 1247 | return (hwreq == NULL) ? NULL : &hwreq->req; |
aa69a809 DL |
1248 | } |
1249 | ||
1250 | /** | |
1251 | * ep_free_request: frees a request object | |
1252 | * | |
1253 | * Check usb_ep_free_request() at "usb_gadget.h" for details | |
1254 | */ | |
1255 | static void ep_free_request(struct usb_ep *ep, struct usb_request *req) | |
1256 | { | |
8e22978c AS |
1257 | struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep); |
1258 | struct ci_hw_req *hwreq = container_of(req, struct ci_hw_req, req); | |
2e270412 | 1259 | struct td_node *node, *tmpnode; |
aa69a809 DL |
1260 | unsigned long flags; |
1261 | ||
aa69a809 | 1262 | if (ep == NULL || req == NULL) { |
aa69a809 | 1263 | return; |
2dbc5c4c AS |
1264 | } else if (!list_empty(&hwreq->queue)) { |
1265 | dev_err(hwep->ci->dev, "freeing queued request\n"); | |
aa69a809 DL |
1266 | return; |
1267 | } | |
1268 | ||
2dbc5c4c | 1269 | spin_lock_irqsave(hwep->lock, flags); |
aa69a809 | 1270 | |
2dbc5c4c AS |
1271 | list_for_each_entry_safe(node, tmpnode, &hwreq->tds, td) { |
1272 | dma_pool_free(hwep->td_pool, node->ptr, node->dma); | |
2e270412 MG |
1273 | list_del_init(&node->td); |
1274 | node->ptr = NULL; | |
1275 | kfree(node); | |
1276 | } | |
cc9e6c49 | 1277 | |
2dbc5c4c | 1278 | kfree(hwreq); |
aa69a809 | 1279 | |
2dbc5c4c | 1280 | spin_unlock_irqrestore(hwep->lock, flags); |
aa69a809 DL |
1281 | } |
1282 | ||
1283 | /** | |
1284 | * ep_queue: queues (submits) an I/O request to an endpoint | |
1285 | * | |
1286 | * Check usb_ep_queue()* at usb_gadget.h" for details | |
1287 | */ | |
1288 | static int ep_queue(struct usb_ep *ep, struct usb_request *req, | |
1289 | gfp_t __maybe_unused gfp_flags) | |
1290 | { | |
8e22978c | 1291 | struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep); |
aa69a809 DL |
1292 | int retval = 0; |
1293 | unsigned long flags; | |
1294 | ||
2dbc5c4c | 1295 | if (ep == NULL || req == NULL || hwep->ep.desc == NULL) |
aa69a809 DL |
1296 | return -EINVAL; |
1297 | ||
2dbc5c4c | 1298 | spin_lock_irqsave(hwep->lock, flags); |
dd064e9d | 1299 | retval = _ep_queue(ep, req, gfp_flags); |
2dbc5c4c | 1300 | spin_unlock_irqrestore(hwep->lock, flags); |
aa69a809 DL |
1301 | return retval; |
1302 | } | |
1303 | ||
1304 | /** | |
1305 | * ep_dequeue: dequeues (cancels, unlinks) an I/O request from an endpoint | |
1306 | * | |
1307 | * Check usb_ep_dequeue() at "usb_gadget.h" for details | |
1308 | */ | |
1309 | static int ep_dequeue(struct usb_ep *ep, struct usb_request *req) | |
1310 | { | |
8e22978c AS |
1311 | struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep); |
1312 | struct ci_hw_req *hwreq = container_of(req, struct ci_hw_req, req); | |
aa69a809 DL |
1313 | unsigned long flags; |
1314 | ||
2dbc5c4c AS |
1315 | if (ep == NULL || req == NULL || hwreq->req.status != -EALREADY || |
1316 | hwep->ep.desc == NULL || list_empty(&hwreq->queue) || | |
1317 | list_empty(&hwep->qh.queue)) | |
aa69a809 DL |
1318 | return -EINVAL; |
1319 | ||
2dbc5c4c | 1320 | spin_lock_irqsave(hwep->lock, flags); |
aa69a809 | 1321 | |
2dbc5c4c | 1322 | hw_ep_flush(hwep->ci, hwep->num, hwep->dir); |
aa69a809 DL |
1323 | |
1324 | /* pop request */ | |
2dbc5c4c | 1325 | list_del_init(&hwreq->queue); |
5e0aa49e | 1326 | |
2dbc5c4c | 1327 | usb_gadget_unmap_request(&hwep->ci->gadget, req, hwep->dir); |
5e0aa49e | 1328 | |
aa69a809 DL |
1329 | req->status = -ECONNRESET; |
1330 | ||
2dbc5c4c AS |
1331 | if (hwreq->req.complete != NULL) { |
1332 | spin_unlock(hwep->lock); | |
1333 | hwreq->req.complete(&hwep->ep, &hwreq->req); | |
1334 | spin_lock(hwep->lock); | |
aa69a809 DL |
1335 | } |
1336 | ||
2dbc5c4c | 1337 | spin_unlock_irqrestore(hwep->lock, flags); |
aa69a809 DL |
1338 | return 0; |
1339 | } | |
1340 | ||
1341 | /** | |
1342 | * ep_set_halt: sets the endpoint halt feature | |
1343 | * | |
1344 | * Check usb_ep_set_halt() at "usb_gadget.h" for details | |
1345 | */ | |
1346 | static int ep_set_halt(struct usb_ep *ep, int value) | |
1347 | { | |
8e22978c | 1348 | struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep); |
aa69a809 DL |
1349 | int direction, retval = 0; |
1350 | unsigned long flags; | |
1351 | ||
2dbc5c4c | 1352 | if (ep == NULL || hwep->ep.desc == NULL) |
aa69a809 DL |
1353 | return -EINVAL; |
1354 | ||
2dbc5c4c | 1355 | if (usb_endpoint_xfer_isoc(hwep->ep.desc)) |
e4ce4ecd MG |
1356 | return -EOPNOTSUPP; |
1357 | ||
2dbc5c4c | 1358 | spin_lock_irqsave(hwep->lock, flags); |
aa69a809 DL |
1359 | |
1360 | #ifndef STALL_IN | |
1361 | /* g_file_storage MS compliant but g_zero fails chapter 9 compliance */ | |
2dbc5c4c AS |
1362 | if (value && hwep->type == USB_ENDPOINT_XFER_BULK && hwep->dir == TX && |
1363 | !list_empty(&hwep->qh.queue)) { | |
1364 | spin_unlock_irqrestore(hwep->lock, flags); | |
aa69a809 DL |
1365 | return -EAGAIN; |
1366 | } | |
1367 | #endif | |
1368 | ||
2dbc5c4c | 1369 | direction = hwep->dir; |
aa69a809 | 1370 | do { |
2dbc5c4c | 1371 | retval |= hw_ep_set_halt(hwep->ci, hwep->num, hwep->dir, value); |
aa69a809 DL |
1372 | |
1373 | if (!value) | |
2dbc5c4c | 1374 | hwep->wedge = 0; |
aa69a809 | 1375 | |
2dbc5c4c AS |
1376 | if (hwep->type == USB_ENDPOINT_XFER_CONTROL) |
1377 | hwep->dir = (hwep->dir == TX) ? RX : TX; | |
aa69a809 | 1378 | |
2dbc5c4c | 1379 | } while (hwep->dir != direction); |
aa69a809 | 1380 | |
2dbc5c4c | 1381 | spin_unlock_irqrestore(hwep->lock, flags); |
aa69a809 DL |
1382 | return retval; |
1383 | } | |
1384 | ||
1385 | /** | |
1386 | * ep_set_wedge: sets the halt feature and ignores clear requests | |
1387 | * | |
1388 | * Check usb_ep_set_wedge() at "usb_gadget.h" for details | |
1389 | */ | |
1390 | static int ep_set_wedge(struct usb_ep *ep) | |
1391 | { | |
8e22978c | 1392 | struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep); |
aa69a809 DL |
1393 | unsigned long flags; |
1394 | ||
2dbc5c4c | 1395 | if (ep == NULL || hwep->ep.desc == NULL) |
aa69a809 DL |
1396 | return -EINVAL; |
1397 | ||
2dbc5c4c AS |
1398 | spin_lock_irqsave(hwep->lock, flags); |
1399 | hwep->wedge = 1; | |
1400 | spin_unlock_irqrestore(hwep->lock, flags); | |
aa69a809 DL |
1401 | |
1402 | return usb_ep_set_halt(ep); | |
1403 | } | |
1404 | ||
1405 | /** | |
1406 | * ep_fifo_flush: flushes contents of a fifo | |
1407 | * | |
1408 | * Check usb_ep_fifo_flush() at "usb_gadget.h" for details | |
1409 | */ | |
1410 | static void ep_fifo_flush(struct usb_ep *ep) | |
1411 | { | |
8e22978c | 1412 | struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep); |
aa69a809 DL |
1413 | unsigned long flags; |
1414 | ||
aa69a809 | 1415 | if (ep == NULL) { |
2dbc5c4c | 1416 | dev_err(hwep->ci->dev, "%02X: -EINVAL\n", _usb_addr(hwep)); |
aa69a809 DL |
1417 | return; |
1418 | } | |
1419 | ||
2dbc5c4c | 1420 | spin_lock_irqsave(hwep->lock, flags); |
aa69a809 | 1421 | |
2dbc5c4c | 1422 | hw_ep_flush(hwep->ci, hwep->num, hwep->dir); |
aa69a809 | 1423 | |
2dbc5c4c | 1424 | spin_unlock_irqrestore(hwep->lock, flags); |
aa69a809 DL |
1425 | } |
1426 | ||
1427 | /** | |
1428 | * Endpoint-specific part of the API to the USB controller hardware | |
1429 | * Check "usb_gadget.h" for details | |
1430 | */ | |
1431 | static const struct usb_ep_ops usb_ep_ops = { | |
1432 | .enable = ep_enable, | |
1433 | .disable = ep_disable, | |
1434 | .alloc_request = ep_alloc_request, | |
1435 | .free_request = ep_free_request, | |
1436 | .queue = ep_queue, | |
1437 | .dequeue = ep_dequeue, | |
1438 | .set_halt = ep_set_halt, | |
1439 | .set_wedge = ep_set_wedge, | |
1440 | .fifo_flush = ep_fifo_flush, | |
1441 | }; | |
1442 | ||
1443 | /****************************************************************************** | |
1444 | * GADGET block | |
1445 | *****************************************************************************/ | |
8e22978c | 1446 | static int ci_udc_vbus_session(struct usb_gadget *_gadget, int is_active) |
f01ef574 | 1447 | { |
8e22978c | 1448 | struct ci_hdrc *ci = container_of(_gadget, struct ci_hdrc, gadget); |
f01ef574 PK |
1449 | unsigned long flags; |
1450 | int gadget_ready = 0; | |
1451 | ||
26c696c6 RZ |
1452 | spin_lock_irqsave(&ci->lock, flags); |
1453 | ci->vbus_active = is_active; | |
1454 | if (ci->driver) | |
f01ef574 | 1455 | gadget_ready = 1; |
26c696c6 | 1456 | spin_unlock_irqrestore(&ci->lock, flags); |
f01ef574 PK |
1457 | |
1458 | if (gadget_ready) { | |
1459 | if (is_active) { | |
c036019e | 1460 | pm_runtime_get_sync(&_gadget->dev); |
26c696c6 RZ |
1461 | hw_device_reset(ci, USBMODE_CM_DC); |
1462 | hw_device_state(ci, ci->ep0out->qh.dma); | |
a107f8c5 | 1463 | dev_dbg(ci->dev, "Connected to host\n"); |
f01ef574 | 1464 | } else { |
92b336d7 PC |
1465 | if (ci->driver) |
1466 | ci->driver->disconnect(&ci->gadget); | |
26c696c6 RZ |
1467 | hw_device_state(ci, 0); |
1468 | if (ci->platdata->notify_event) | |
1469 | ci->platdata->notify_event(ci, | |
8e22978c | 1470 | CI_HDRC_CONTROLLER_STOPPED_EVENT); |
26c696c6 | 1471 | _gadget_stop_activity(&ci->gadget); |
c036019e | 1472 | pm_runtime_put_sync(&_gadget->dev); |
a107f8c5 | 1473 | dev_dbg(ci->dev, "Disconnected from host\n"); |
f01ef574 PK |
1474 | } |
1475 | } | |
1476 | ||
1477 | return 0; | |
1478 | } | |
1479 | ||
8e22978c | 1480 | static int ci_udc_wakeup(struct usb_gadget *_gadget) |
e2b61c1d | 1481 | { |
8e22978c | 1482 | struct ci_hdrc *ci = container_of(_gadget, struct ci_hdrc, gadget); |
e2b61c1d PK |
1483 | unsigned long flags; |
1484 | int ret = 0; | |
1485 | ||
26c696c6 RZ |
1486 | spin_lock_irqsave(&ci->lock, flags); |
1487 | if (!ci->remote_wakeup) { | |
e2b61c1d | 1488 | ret = -EOPNOTSUPP; |
e2b61c1d PK |
1489 | goto out; |
1490 | } | |
26c696c6 | 1491 | if (!hw_read(ci, OP_PORTSC, PORTSC_SUSP)) { |
e2b61c1d | 1492 | ret = -EINVAL; |
e2b61c1d PK |
1493 | goto out; |
1494 | } | |
26c696c6 | 1495 | hw_write(ci, OP_PORTSC, PORTSC_FPR, PORTSC_FPR); |
e2b61c1d | 1496 | out: |
26c696c6 | 1497 | spin_unlock_irqrestore(&ci->lock, flags); |
e2b61c1d PK |
1498 | return ret; |
1499 | } | |
1500 | ||
8e22978c | 1501 | static int ci_udc_vbus_draw(struct usb_gadget *_gadget, unsigned ma) |
d860852e | 1502 | { |
8e22978c | 1503 | struct ci_hdrc *ci = container_of(_gadget, struct ci_hdrc, gadget); |
d860852e | 1504 | |
26c696c6 | 1505 | if (ci->transceiver) |
2dbc5c4c | 1506 | return usb_phy_set_power(ci->transceiver, ma); |
d860852e PK |
1507 | return -ENOTSUPP; |
1508 | } | |
1509 | ||
c0a48e6c MG |
1510 | /* Change Data+ pullup status |
1511 | * this func is used by usb_gadget_connect/disconnet | |
1512 | */ | |
8e22978c | 1513 | static int ci_udc_pullup(struct usb_gadget *_gadget, int is_on) |
c0a48e6c | 1514 | { |
8e22978c | 1515 | struct ci_hdrc *ci = container_of(_gadget, struct ci_hdrc, gadget); |
c0a48e6c | 1516 | |
4a64783b PC |
1517 | if (!ci->vbus_active) |
1518 | return -EOPNOTSUPP; | |
1519 | ||
c0a48e6c MG |
1520 | if (is_on) |
1521 | hw_write(ci, OP_USBCMD, USBCMD_RS, USBCMD_RS); | |
1522 | else | |
1523 | hw_write(ci, OP_USBCMD, USBCMD_RS, 0); | |
1524 | ||
1525 | return 0; | |
1526 | } | |
1527 | ||
8e22978c | 1528 | static int ci_udc_start(struct usb_gadget *gadget, |
1f339d84 | 1529 | struct usb_gadget_driver *driver); |
8e22978c | 1530 | static int ci_udc_stop(struct usb_gadget *gadget, |
1f339d84 | 1531 | struct usb_gadget_driver *driver); |
aa69a809 DL |
1532 | /** |
1533 | * Device operations part of the API to the USB controller hardware, | |
1534 | * which don't involve endpoints (or i/o) | |
1535 | * Check "usb_gadget.h" for details | |
1536 | */ | |
f01ef574 | 1537 | static const struct usb_gadget_ops usb_gadget_ops = { |
8e22978c AS |
1538 | .vbus_session = ci_udc_vbus_session, |
1539 | .wakeup = ci_udc_wakeup, | |
1540 | .pullup = ci_udc_pullup, | |
1541 | .vbus_draw = ci_udc_vbus_draw, | |
1542 | .udc_start = ci_udc_start, | |
1543 | .udc_stop = ci_udc_stop, | |
f01ef574 | 1544 | }; |
aa69a809 | 1545 | |
8e22978c | 1546 | static int init_eps(struct ci_hdrc *ci) |
aa69a809 | 1547 | { |
790c2d52 | 1548 | int retval = 0, i, j; |
aa69a809 | 1549 | |
26c696c6 | 1550 | for (i = 0; i < ci->hw_ep_max/2; i++) |
ca9cfea0 | 1551 | for (j = RX; j <= TX; j++) { |
26c696c6 | 1552 | int k = i + j * ci->hw_ep_max/2; |
8e22978c | 1553 | struct ci_hw_ep *hwep = &ci->ci_hw_ep[k]; |
aa69a809 | 1554 | |
2dbc5c4c | 1555 | scnprintf(hwep->name, sizeof(hwep->name), "ep%i%s", i, |
ca9cfea0 | 1556 | (j == TX) ? "in" : "out"); |
aa69a809 | 1557 | |
2dbc5c4c AS |
1558 | hwep->ci = ci; |
1559 | hwep->lock = &ci->lock; | |
1560 | hwep->td_pool = ci->td_pool; | |
aa69a809 | 1561 | |
2dbc5c4c AS |
1562 | hwep->ep.name = hwep->name; |
1563 | hwep->ep.ops = &usb_ep_ops; | |
7f67c38b MG |
1564 | /* |
1565 | * for ep0: maxP defined in desc, for other | |
1566 | * eps, maxP is set by epautoconfig() called | |
1567 | * by gadget layer | |
1568 | */ | |
e117e742 | 1569 | usb_ep_set_maxpacket_limit(&hwep->ep, (unsigned short)~0); |
aa69a809 | 1570 | |
2dbc5c4c AS |
1571 | INIT_LIST_HEAD(&hwep->qh.queue); |
1572 | hwep->qh.ptr = dma_pool_alloc(ci->qh_pool, GFP_KERNEL, | |
1573 | &hwep->qh.dma); | |
1574 | if (hwep->qh.ptr == NULL) | |
aa69a809 DL |
1575 | retval = -ENOMEM; |
1576 | else | |
2dbc5c4c | 1577 | memset(hwep->qh.ptr, 0, sizeof(*hwep->qh.ptr)); |
ca9cfea0 | 1578 | |
d36ade60 AS |
1579 | /* |
1580 | * set up shorthands for ep0 out and in endpoints, | |
1581 | * don't add to gadget's ep_list | |
1582 | */ | |
1583 | if (i == 0) { | |
1584 | if (j == RX) | |
2dbc5c4c | 1585 | ci->ep0out = hwep; |
d36ade60 | 1586 | else |
2dbc5c4c | 1587 | ci->ep0in = hwep; |
d36ade60 | 1588 | |
e117e742 | 1589 | usb_ep_set_maxpacket_limit(&hwep->ep, CTRL_PAYLOAD_MAX); |
ca9cfea0 | 1590 | continue; |
d36ade60 | 1591 | } |
ca9cfea0 | 1592 | |
2dbc5c4c | 1593 | list_add_tail(&hwep->ep.ep_list, &ci->gadget.ep_list); |
ca9cfea0 | 1594 | } |
790c2d52 AS |
1595 | |
1596 | return retval; | |
1597 | } | |
1598 | ||
8e22978c | 1599 | static void destroy_eps(struct ci_hdrc *ci) |
ad6b1b97 MKB |
1600 | { |
1601 | int i; | |
1602 | ||
1603 | for (i = 0; i < ci->hw_ep_max; i++) { | |
8e22978c | 1604 | struct ci_hw_ep *hwep = &ci->ci_hw_ep[i]; |
ad6b1b97 | 1605 | |
4a29567b PC |
1606 | if (hwep->pending_td) |
1607 | free_pending_td(hwep); | |
2dbc5c4c | 1608 | dma_pool_free(ci->qh_pool, hwep->qh.ptr, hwep->qh.dma); |
ad6b1b97 MKB |
1609 | } |
1610 | } | |
1611 | ||
790c2d52 | 1612 | /** |
8e22978c | 1613 | * ci_udc_start: register a gadget driver |
1f339d84 | 1614 | * @gadget: our gadget |
790c2d52 | 1615 | * @driver: the driver being registered |
790c2d52 | 1616 | * |
790c2d52 AS |
1617 | * Interrupts are enabled here. |
1618 | */ | |
8e22978c | 1619 | static int ci_udc_start(struct usb_gadget *gadget, |
1f339d84 | 1620 | struct usb_gadget_driver *driver) |
790c2d52 | 1621 | { |
8e22978c | 1622 | struct ci_hdrc *ci = container_of(gadget, struct ci_hdrc, gadget); |
790c2d52 | 1623 | unsigned long flags; |
790c2d52 AS |
1624 | int retval = -ENOMEM; |
1625 | ||
1f339d84 | 1626 | if (driver->disconnect == NULL) |
790c2d52 | 1627 | return -EINVAL; |
790c2d52 | 1628 | |
790c2d52 | 1629 | |
26c696c6 RZ |
1630 | ci->ep0out->ep.desc = &ctrl_endpt_out_desc; |
1631 | retval = usb_ep_enable(&ci->ep0out->ep); | |
ac1aa6a2 A |
1632 | if (retval) |
1633 | return retval; | |
877c1f54 | 1634 | |
26c696c6 RZ |
1635 | ci->ep0in->ep.desc = &ctrl_endpt_in_desc; |
1636 | retval = usb_ep_enable(&ci->ep0in->ep); | |
ac1aa6a2 A |
1637 | if (retval) |
1638 | return retval; | |
26c696c6 RZ |
1639 | |
1640 | ci->driver = driver; | |
1641 | pm_runtime_get_sync(&ci->gadget.dev); | |
d268e9bc | 1642 | if (ci->vbus_active) { |
65b2fb32 | 1643 | spin_lock_irqsave(&ci->lock, flags); |
d268e9bc PC |
1644 | hw_device_reset(ci, USBMODE_CM_DC); |
1645 | } else { | |
1646 | pm_runtime_put_sync(&ci->gadget.dev); | |
65b2fb32 | 1647 | return retval; |
f01ef574 PK |
1648 | } |
1649 | ||
26c696c6 | 1650 | retval = hw_device_state(ci, ci->ep0out->qh.dma); |
65b2fb32 | 1651 | spin_unlock_irqrestore(&ci->lock, flags); |
c036019e | 1652 | if (retval) |
26c696c6 | 1653 | pm_runtime_put_sync(&ci->gadget.dev); |
aa69a809 | 1654 | |
aa69a809 DL |
1655 | return retval; |
1656 | } | |
aa69a809 DL |
1657 | |
1658 | /** | |
8e22978c | 1659 | * ci_udc_stop: unregister a gadget driver |
aa69a809 | 1660 | */ |
8e22978c | 1661 | static int ci_udc_stop(struct usb_gadget *gadget, |
1f339d84 | 1662 | struct usb_gadget_driver *driver) |
aa69a809 | 1663 | { |
8e22978c | 1664 | struct ci_hdrc *ci = container_of(gadget, struct ci_hdrc, gadget); |
1f339d84 | 1665 | unsigned long flags; |
aa69a809 | 1666 | |
26c696c6 | 1667 | spin_lock_irqsave(&ci->lock, flags); |
aa69a809 | 1668 | |
d268e9bc | 1669 | if (ci->vbus_active) { |
26c696c6 RZ |
1670 | hw_device_state(ci, 0); |
1671 | if (ci->platdata->notify_event) | |
1672 | ci->platdata->notify_event(ci, | |
8e22978c | 1673 | CI_HDRC_CONTROLLER_STOPPED_EVENT); |
26c696c6 RZ |
1674 | spin_unlock_irqrestore(&ci->lock, flags); |
1675 | _gadget_stop_activity(&ci->gadget); | |
1676 | spin_lock_irqsave(&ci->lock, flags); | |
1677 | pm_runtime_put(&ci->gadget.dev); | |
f01ef574 | 1678 | } |
aa69a809 | 1679 | |
f84839da | 1680 | ci->driver = NULL; |
26c696c6 | 1681 | spin_unlock_irqrestore(&ci->lock, flags); |
aa69a809 | 1682 | |
aa69a809 DL |
1683 | return 0; |
1684 | } | |
aa69a809 DL |
1685 | |
1686 | /****************************************************************************** | |
1687 | * BUS block | |
1688 | *****************************************************************************/ | |
1689 | /** | |
26c696c6 | 1690 | * udc_irq: ci interrupt handler |
aa69a809 DL |
1691 | * |
1692 | * This function returns IRQ_HANDLED if the IRQ has been handled | |
1693 | * It locks access to registers | |
1694 | */ | |
8e22978c | 1695 | static irqreturn_t udc_irq(struct ci_hdrc *ci) |
aa69a809 | 1696 | { |
aa69a809 DL |
1697 | irqreturn_t retval; |
1698 | u32 intr; | |
1699 | ||
26c696c6 | 1700 | if (ci == NULL) |
aa69a809 | 1701 | return IRQ_HANDLED; |
aa69a809 | 1702 | |
26c696c6 | 1703 | spin_lock(&ci->lock); |
f01ef574 | 1704 | |
8e22978c | 1705 | if (ci->platdata->flags & CI_HDRC_REGS_SHARED) { |
26c696c6 | 1706 | if (hw_read(ci, OP_USBMODE, USBMODE_CM) != |
758fc986 | 1707 | USBMODE_CM_DC) { |
26c696c6 | 1708 | spin_unlock(&ci->lock); |
f01ef574 PK |
1709 | return IRQ_NONE; |
1710 | } | |
1711 | } | |
26c696c6 | 1712 | intr = hw_test_and_clear_intr_active(ci); |
aa69a809 | 1713 | |
e443b333 | 1714 | if (intr) { |
aa69a809 | 1715 | /* order defines priority - do NOT change it */ |
e443b333 | 1716 | if (USBi_URI & intr) |
26c696c6 | 1717 | isr_reset_handler(ci); |
e443b333 | 1718 | |
aa69a809 | 1719 | if (USBi_PCI & intr) { |
26c696c6 | 1720 | ci->gadget.speed = hw_port_is_high_speed(ci) ? |
aa69a809 | 1721 | USB_SPEED_HIGH : USB_SPEED_FULL; |
26c696c6 RZ |
1722 | if (ci->suspended && ci->driver->resume) { |
1723 | spin_unlock(&ci->lock); | |
1724 | ci->driver->resume(&ci->gadget); | |
1725 | spin_lock(&ci->lock); | |
1726 | ci->suspended = 0; | |
e2b61c1d | 1727 | } |
aa69a809 | 1728 | } |
e443b333 AS |
1729 | |
1730 | if (USBi_UI & intr) | |
26c696c6 | 1731 | isr_tr_complete_handler(ci); |
e443b333 | 1732 | |
e2b61c1d | 1733 | if (USBi_SLI & intr) { |
26c696c6 RZ |
1734 | if (ci->gadget.speed != USB_SPEED_UNKNOWN && |
1735 | ci->driver->suspend) { | |
1736 | ci->suspended = 1; | |
1737 | spin_unlock(&ci->lock); | |
1738 | ci->driver->suspend(&ci->gadget); | |
1739 | spin_lock(&ci->lock); | |
e2b61c1d | 1740 | } |
e2b61c1d | 1741 | } |
aa69a809 DL |
1742 | retval = IRQ_HANDLED; |
1743 | } else { | |
aa69a809 DL |
1744 | retval = IRQ_NONE; |
1745 | } | |
26c696c6 | 1746 | spin_unlock(&ci->lock); |
aa69a809 DL |
1747 | |
1748 | return retval; | |
1749 | } | |
1750 | ||
aa69a809 | 1751 | /** |
5f36e231 | 1752 | * udc_start: initialize gadget role |
26c696c6 | 1753 | * @ci: chipidea controller |
aa69a809 | 1754 | */ |
8e22978c | 1755 | static int udc_start(struct ci_hdrc *ci) |
aa69a809 | 1756 | { |
26c696c6 | 1757 | struct device *dev = ci->dev; |
aa69a809 DL |
1758 | int retval = 0; |
1759 | ||
26c696c6 | 1760 | spin_lock_init(&ci->lock); |
aa69a809 | 1761 | |
26c696c6 RZ |
1762 | ci->gadget.ops = &usb_gadget_ops; |
1763 | ci->gadget.speed = USB_SPEED_UNKNOWN; | |
1764 | ci->gadget.max_speed = USB_SPEED_HIGH; | |
1765 | ci->gadget.is_otg = 0; | |
1766 | ci->gadget.name = ci->platdata->name; | |
aa69a809 | 1767 | |
26c696c6 | 1768 | INIT_LIST_HEAD(&ci->gadget.ep_list); |
aa69a809 | 1769 | |
790c2d52 | 1770 | /* alloc resources */ |
8e22978c AS |
1771 | ci->qh_pool = dma_pool_create("ci_hw_qh", dev, |
1772 | sizeof(struct ci_hw_qh), | |
1773 | 64, CI_HDRC_PAGE_SIZE); | |
26c696c6 | 1774 | if (ci->qh_pool == NULL) |
5f36e231 | 1775 | return -ENOMEM; |
790c2d52 | 1776 | |
8e22978c AS |
1777 | ci->td_pool = dma_pool_create("ci_hw_td", dev, |
1778 | sizeof(struct ci_hw_td), | |
1779 | 64, CI_HDRC_PAGE_SIZE); | |
26c696c6 | 1780 | if (ci->td_pool == NULL) { |
790c2d52 AS |
1781 | retval = -ENOMEM; |
1782 | goto free_qh_pool; | |
1783 | } | |
1784 | ||
26c696c6 | 1785 | retval = init_eps(ci); |
790c2d52 AS |
1786 | if (retval) |
1787 | goto free_pools; | |
1788 | ||
26c696c6 | 1789 | ci->gadget.ep0 = &ci->ep0in->ep; |
f01ef574 | 1790 | |
26c696c6 | 1791 | retval = usb_add_gadget_udc(dev, &ci->gadget); |
0f91349b | 1792 | if (retval) |
74475ede | 1793 | goto destroy_eps; |
0f91349b | 1794 | |
26c696c6 RZ |
1795 | pm_runtime_no_callbacks(&ci->gadget.dev); |
1796 | pm_runtime_enable(&ci->gadget.dev); | |
aa69a809 | 1797 | |
a107f8c5 PC |
1798 | /* Update ci->vbus_active */ |
1799 | ci_handle_vbus_change(ci); | |
1800 | ||
aa69a809 DL |
1801 | return retval; |
1802 | ||
ad6b1b97 MKB |
1803 | destroy_eps: |
1804 | destroy_eps(ci); | |
790c2d52 | 1805 | free_pools: |
26c696c6 | 1806 | dma_pool_destroy(ci->td_pool); |
790c2d52 | 1807 | free_qh_pool: |
26c696c6 | 1808 | dma_pool_destroy(ci->qh_pool); |
aa69a809 DL |
1809 | return retval; |
1810 | } | |
1811 | ||
1812 | /** | |
3f124d23 | 1813 | * ci_hdrc_gadget_destroy: parent remove must call this to remove UDC |
aa69a809 DL |
1814 | * |
1815 | * No interrupts active, the IRQ has been released | |
1816 | */ | |
3f124d23 | 1817 | void ci_hdrc_gadget_destroy(struct ci_hdrc *ci) |
aa69a809 | 1818 | { |
3f124d23 | 1819 | if (!ci->roles[CI_ROLE_GADGET]) |
aa69a809 | 1820 | return; |
0f089094 | 1821 | |
26c696c6 | 1822 | usb_del_gadget_udc(&ci->gadget); |
aa69a809 | 1823 | |
ad6b1b97 | 1824 | destroy_eps(ci); |
790c2d52 | 1825 | |
26c696c6 RZ |
1826 | dma_pool_destroy(ci->td_pool); |
1827 | dma_pool_destroy(ci->qh_pool); | |
790c2d52 | 1828 | |
d343f4e8 | 1829 | if (ci->transceiver) { |
26c696c6 | 1830 | otg_set_peripheral(ci->transceiver->otg, NULL); |
a2c3d690 RZ |
1831 | if (ci->global_phy) |
1832 | usb_put_phy(ci->transceiver); | |
f01ef574 | 1833 | } |
3f124d23 PC |
1834 | } |
1835 | ||
1836 | static int udc_id_switch_for_device(struct ci_hdrc *ci) | |
1837 | { | |
1838 | if (ci->is_otg) { | |
1839 | ci_clear_otg_interrupt(ci, OTGSC_BSVIS); | |
1840 | ci_enable_otg_interrupt(ci, OTGSC_BSVIE); | |
1841 | } | |
1842 | ||
1843 | return 0; | |
1844 | } | |
1845 | ||
1846 | static void udc_id_switch_for_host(struct ci_hdrc *ci) | |
1847 | { | |
1848 | if (ci->is_otg) { | |
1849 | /* host doesn't care B_SESSION_VALID event */ | |
1850 | ci_clear_otg_interrupt(ci, OTGSC_BSVIS); | |
1851 | ci_disable_otg_interrupt(ci, OTGSC_BSVIE); | |
1852 | } | |
5f36e231 AS |
1853 | } |
1854 | ||
1855 | /** | |
1856 | * ci_hdrc_gadget_init - initialize device related bits | |
1857 | * ci: the controller | |
1858 | * | |
3f124d23 | 1859 | * This function initializes the gadget, if the device is "device capable". |
5f36e231 | 1860 | */ |
8e22978c | 1861 | int ci_hdrc_gadget_init(struct ci_hdrc *ci) |
5f36e231 AS |
1862 | { |
1863 | struct ci_role_driver *rdrv; | |
1864 | ||
1865 | if (!hw_read(ci, CAP_DCCPARAMS, DCCPARAMS_DC)) | |
1866 | return -ENXIO; | |
1867 | ||
1868 | rdrv = devm_kzalloc(ci->dev, sizeof(struct ci_role_driver), GFP_KERNEL); | |
1869 | if (!rdrv) | |
1870 | return -ENOMEM; | |
1871 | ||
3f124d23 PC |
1872 | rdrv->start = udc_id_switch_for_device; |
1873 | rdrv->stop = udc_id_switch_for_host; | |
5f36e231 AS |
1874 | rdrv->irq = udc_irq; |
1875 | rdrv->name = "gadget"; | |
1876 | ci->roles[CI_ROLE_GADGET] = rdrv; | |
aa69a809 | 1877 | |
3f124d23 | 1878 | return udc_start(ci); |
aa69a809 | 1879 | } |