Commit | Line | Data |
---|---|---|
aa69a809 | 1 | /* |
eb70e5ab | 2 | * udc.c - ChipIdea UDC driver |
aa69a809 DL |
3 | * |
4 | * Copyright (C) 2008 Chipidea - MIPS Technologies, Inc. All rights reserved. | |
5 | * | |
6 | * Author: David Lopo | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or modify | |
9 | * it under the terms of the GNU General Public License version 2 as | |
10 | * published by the Free Software Foundation. | |
11 | */ | |
12 | ||
36825a2d | 13 | #include <linux/delay.h> |
aa69a809 DL |
14 | #include <linux/device.h> |
15 | #include <linux/dmapool.h> | |
ded017ee | 16 | #include <linux/err.h> |
5b08319f | 17 | #include <linux/irqreturn.h> |
aa69a809 | 18 | #include <linux/kernel.h> |
5a0e3ad6 | 19 | #include <linux/slab.h> |
c036019e | 20 | #include <linux/pm_runtime.h> |
aa69a809 DL |
21 | #include <linux/usb/ch9.h> |
22 | #include <linux/usb/gadget.h> | |
95f5555f | 23 | #include <linux/usb/otg-fsm.h> |
e443b333 | 24 | #include <linux/usb/chipidea.h> |
aa69a809 | 25 | |
e443b333 AS |
26 | #include "ci.h" |
27 | #include "udc.h" | |
28 | #include "bits.h" | |
3f124d23 | 29 | #include "otg.h" |
4dcf720c | 30 | #include "otg_fsm.h" |
954aad8c | 31 | |
aa69a809 DL |
32 | /* control endpoint description */ |
33 | static const struct usb_endpoint_descriptor | |
ca9cfea0 | 34 | ctrl_endpt_out_desc = { |
aa69a809 DL |
35 | .bLength = USB_DT_ENDPOINT_SIZE, |
36 | .bDescriptorType = USB_DT_ENDPOINT, | |
37 | ||
ca9cfea0 PK |
38 | .bEndpointAddress = USB_DIR_OUT, |
39 | .bmAttributes = USB_ENDPOINT_XFER_CONTROL, | |
40 | .wMaxPacketSize = cpu_to_le16(CTRL_PAYLOAD_MAX), | |
41 | }; | |
42 | ||
43 | static const struct usb_endpoint_descriptor | |
44 | ctrl_endpt_in_desc = { | |
45 | .bLength = USB_DT_ENDPOINT_SIZE, | |
46 | .bDescriptorType = USB_DT_ENDPOINT, | |
47 | ||
48 | .bEndpointAddress = USB_DIR_IN, | |
aa69a809 DL |
49 | .bmAttributes = USB_ENDPOINT_XFER_CONTROL, |
50 | .wMaxPacketSize = cpu_to_le16(CTRL_PAYLOAD_MAX), | |
51 | }; | |
52 | ||
aa69a809 DL |
53 | /** |
54 | * hw_ep_bit: calculates the bit number | |
55 | * @num: endpoint number | |
56 | * @dir: endpoint direction | |
57 | * | |
58 | * This function returns bit number | |
59 | */ | |
60 | static inline int hw_ep_bit(int num, int dir) | |
61 | { | |
bc9d32f0 | 62 | return num + ((dir == TX) ? 16 : 0); |
aa69a809 DL |
63 | } |
64 | ||
8e22978c | 65 | static inline int ep_to_bit(struct ci_hdrc *ci, int n) |
dd39c358 | 66 | { |
26c696c6 | 67 | int fill = 16 - ci->hw_ep_max / 2; |
dd39c358 | 68 | |
26c696c6 | 69 | if (n >= ci->hw_ep_max / 2) |
dd39c358 MKB |
70 | n += fill; |
71 | ||
72 | return n; | |
73 | } | |
74 | ||
aa69a809 | 75 | /** |
c0a48e6c | 76 | * hw_device_state: enables/disables interrupts (execute without interruption) |
aa69a809 DL |
77 | * @dma: 0 => disable, !0 => enable and set dma engine |
78 | * | |
79 | * This function returns an error code | |
80 | */ | |
8e22978c | 81 | static int hw_device_state(struct ci_hdrc *ci, u32 dma) |
aa69a809 DL |
82 | { |
83 | if (dma) { | |
26c696c6 | 84 | hw_write(ci, OP_ENDPTLISTADDR, ~0, dma); |
aa69a809 | 85 | /* interrupt, error, port change, reset, sleep/suspend */ |
26c696c6 | 86 | hw_write(ci, OP_USBINTR, ~0, |
aa69a809 | 87 | USBi_UI|USBi_UEI|USBi_PCI|USBi_URI|USBi_SLI); |
aa69a809 | 88 | } else { |
26c696c6 | 89 | hw_write(ci, OP_USBINTR, ~0, 0); |
aa69a809 DL |
90 | } |
91 | return 0; | |
92 | } | |
93 | ||
94 | /** | |
95 | * hw_ep_flush: flush endpoint fifo (execute without interruption) | |
96 | * @num: endpoint number | |
97 | * @dir: endpoint direction | |
98 | * | |
99 | * This function returns an error code | |
100 | */ | |
8e22978c | 101 | static int hw_ep_flush(struct ci_hdrc *ci, int num, int dir) |
aa69a809 DL |
102 | { |
103 | int n = hw_ep_bit(num, dir); | |
104 | ||
105 | do { | |
106 | /* flush any pending transfer */ | |
5bf5dbed | 107 | hw_write(ci, OP_ENDPTFLUSH, ~0, BIT(n)); |
26c696c6 | 108 | while (hw_read(ci, OP_ENDPTFLUSH, BIT(n))) |
aa69a809 | 109 | cpu_relax(); |
26c696c6 | 110 | } while (hw_read(ci, OP_ENDPTSTAT, BIT(n))); |
aa69a809 DL |
111 | |
112 | return 0; | |
113 | } | |
114 | ||
115 | /** | |
116 | * hw_ep_disable: disables endpoint (execute without interruption) | |
117 | * @num: endpoint number | |
118 | * @dir: endpoint direction | |
119 | * | |
120 | * This function returns an error code | |
121 | */ | |
8e22978c | 122 | static int hw_ep_disable(struct ci_hdrc *ci, int num, int dir) |
aa69a809 | 123 | { |
26c696c6 | 124 | hw_write(ci, OP_ENDPTCTRL + num, |
bc9d32f0 | 125 | (dir == TX) ? ENDPTCTRL_TXE : ENDPTCTRL_RXE, 0); |
aa69a809 DL |
126 | return 0; |
127 | } | |
128 | ||
129 | /** | |
130 | * hw_ep_enable: enables endpoint (execute without interruption) | |
131 | * @num: endpoint number | |
132 | * @dir: endpoint direction | |
133 | * @type: endpoint type | |
134 | * | |
135 | * This function returns an error code | |
136 | */ | |
8e22978c | 137 | static int hw_ep_enable(struct ci_hdrc *ci, int num, int dir, int type) |
aa69a809 DL |
138 | { |
139 | u32 mask, data; | |
140 | ||
bc9d32f0 | 141 | if (dir == TX) { |
aa69a809 | 142 | mask = ENDPTCTRL_TXT; /* type */ |
727b4ddb | 143 | data = type << __ffs(mask); |
aa69a809 DL |
144 | |
145 | mask |= ENDPTCTRL_TXS; /* unstall */ | |
146 | mask |= ENDPTCTRL_TXR; /* reset data toggle */ | |
147 | data |= ENDPTCTRL_TXR; | |
148 | mask |= ENDPTCTRL_TXE; /* enable */ | |
149 | data |= ENDPTCTRL_TXE; | |
150 | } else { | |
151 | mask = ENDPTCTRL_RXT; /* type */ | |
727b4ddb | 152 | data = type << __ffs(mask); |
aa69a809 DL |
153 | |
154 | mask |= ENDPTCTRL_RXS; /* unstall */ | |
155 | mask |= ENDPTCTRL_RXR; /* reset data toggle */ | |
156 | data |= ENDPTCTRL_RXR; | |
157 | mask |= ENDPTCTRL_RXE; /* enable */ | |
158 | data |= ENDPTCTRL_RXE; | |
159 | } | |
26c696c6 | 160 | hw_write(ci, OP_ENDPTCTRL + num, mask, data); |
aa69a809 DL |
161 | return 0; |
162 | } | |
163 | ||
164 | /** | |
165 | * hw_ep_get_halt: return endpoint halt status | |
166 | * @num: endpoint number | |
167 | * @dir: endpoint direction | |
168 | * | |
169 | * This function returns 1 if endpoint halted | |
170 | */ | |
8e22978c | 171 | static int hw_ep_get_halt(struct ci_hdrc *ci, int num, int dir) |
aa69a809 | 172 | { |
bc9d32f0 | 173 | u32 mask = (dir == TX) ? ENDPTCTRL_TXS : ENDPTCTRL_RXS; |
aa69a809 | 174 | |
26c696c6 | 175 | return hw_read(ci, OP_ENDPTCTRL + num, mask) ? 1 : 0; |
aa69a809 DL |
176 | } |
177 | ||
aa69a809 DL |
178 | /** |
179 | * hw_ep_prime: primes endpoint (execute without interruption) | |
180 | * @num: endpoint number | |
181 | * @dir: endpoint direction | |
182 | * @is_ctrl: true if control endpoint | |
183 | * | |
184 | * This function returns an error code | |
185 | */ | |
8e22978c | 186 | static int hw_ep_prime(struct ci_hdrc *ci, int num, int dir, int is_ctrl) |
aa69a809 DL |
187 | { |
188 | int n = hw_ep_bit(num, dir); | |
189 | ||
192d0643 SW |
190 | /* Synchronize before ep prime */ |
191 | wmb(); | |
192 | ||
26c696c6 | 193 | if (is_ctrl && dir == RX && hw_read(ci, OP_ENDPTSETUPSTAT, BIT(num))) |
aa69a809 DL |
194 | return -EAGAIN; |
195 | ||
5bf5dbed | 196 | hw_write(ci, OP_ENDPTPRIME, ~0, BIT(n)); |
aa69a809 | 197 | |
26c696c6 | 198 | while (hw_read(ci, OP_ENDPTPRIME, BIT(n))) |
aa69a809 | 199 | cpu_relax(); |
26c696c6 | 200 | if (is_ctrl && dir == RX && hw_read(ci, OP_ENDPTSETUPSTAT, BIT(num))) |
aa69a809 DL |
201 | return -EAGAIN; |
202 | ||
203 | /* status shoult be tested according with manual but it doesn't work */ | |
204 | return 0; | |
205 | } | |
206 | ||
207 | /** | |
208 | * hw_ep_set_halt: configures ep halt & resets data toggle after clear (execute | |
209 | * without interruption) | |
210 | * @num: endpoint number | |
211 | * @dir: endpoint direction | |
212 | * @value: true => stall, false => unstall | |
213 | * | |
214 | * This function returns an error code | |
215 | */ | |
8e22978c | 216 | static int hw_ep_set_halt(struct ci_hdrc *ci, int num, int dir, int value) |
aa69a809 DL |
217 | { |
218 | if (value != 0 && value != 1) | |
219 | return -EINVAL; | |
220 | ||
221 | do { | |
8e22978c | 222 | enum ci_hw_regs reg = OP_ENDPTCTRL + num; |
bc9d32f0 SW |
223 | u32 mask_xs = (dir == TX) ? ENDPTCTRL_TXS : ENDPTCTRL_RXS; |
224 | u32 mask_xr = (dir == TX) ? ENDPTCTRL_TXR : ENDPTCTRL_RXR; | |
aa69a809 DL |
225 | |
226 | /* data toggle - reserved for EP0 but it's in ESS */ | |
26c696c6 | 227 | hw_write(ci, reg, mask_xs|mask_xr, |
262c1632 | 228 | value ? mask_xs : mask_xr); |
26c696c6 | 229 | } while (value != hw_ep_get_halt(ci, num, dir)); |
aa69a809 DL |
230 | |
231 | return 0; | |
232 | } | |
233 | ||
aa69a809 DL |
234 | /** |
235 | * hw_is_port_high_speed: test if port is high speed | |
236 | * | |
237 | * This function returns true if high speed port | |
238 | */ | |
8e22978c | 239 | static int hw_port_is_high_speed(struct ci_hdrc *ci) |
aa69a809 | 240 | { |
26c696c6 RZ |
241 | return ci->hw_bank.lpm ? hw_read(ci, OP_DEVLC, DEVLC_PSPD) : |
242 | hw_read(ci, OP_PORTSC, PORTSC_HSP); | |
aa69a809 DL |
243 | } |
244 | ||
aa69a809 DL |
245 | /** |
246 | * hw_test_and_clear_complete: test & clear complete status (execute without | |
247 | * interruption) | |
dd39c358 | 248 | * @n: endpoint number |
aa69a809 DL |
249 | * |
250 | * This function returns complete status | |
251 | */ | |
8e22978c | 252 | static int hw_test_and_clear_complete(struct ci_hdrc *ci, int n) |
aa69a809 | 253 | { |
26c696c6 RZ |
254 | n = ep_to_bit(ci, n); |
255 | return hw_test_and_clear(ci, OP_ENDPTCOMPLETE, BIT(n)); | |
aa69a809 DL |
256 | } |
257 | ||
258 | /** | |
259 | * hw_test_and_clear_intr_active: test & clear active interrupts (execute | |
260 | * without interruption) | |
261 | * | |
262 | * This function returns active interrutps | |
263 | */ | |
8e22978c | 264 | static u32 hw_test_and_clear_intr_active(struct ci_hdrc *ci) |
aa69a809 | 265 | { |
26c696c6 | 266 | u32 reg = hw_read_intr_status(ci) & hw_read_intr_enable(ci); |
aa69a809 | 267 | |
26c696c6 | 268 | hw_write(ci, OP_USBSTS, ~0, reg); |
aa69a809 DL |
269 | return reg; |
270 | } | |
271 | ||
272 | /** | |
273 | * hw_test_and_clear_setup_guard: test & clear setup guard (execute without | |
274 | * interruption) | |
275 | * | |
276 | * This function returns guard value | |
277 | */ | |
8e22978c | 278 | static int hw_test_and_clear_setup_guard(struct ci_hdrc *ci) |
aa69a809 | 279 | { |
26c696c6 | 280 | return hw_test_and_write(ci, OP_USBCMD, USBCMD_SUTW, 0); |
aa69a809 DL |
281 | } |
282 | ||
283 | /** | |
284 | * hw_test_and_set_setup_guard: test & set setup guard (execute without | |
285 | * interruption) | |
286 | * | |
287 | * This function returns guard value | |
288 | */ | |
8e22978c | 289 | static int hw_test_and_set_setup_guard(struct ci_hdrc *ci) |
aa69a809 | 290 | { |
26c696c6 | 291 | return hw_test_and_write(ci, OP_USBCMD, USBCMD_SUTW, USBCMD_SUTW); |
aa69a809 DL |
292 | } |
293 | ||
294 | /** | |
295 | * hw_usb_set_address: configures USB address (execute without interruption) | |
296 | * @value: new USB address | |
297 | * | |
ef15e549 AS |
298 | * This function explicitly sets the address, without the "USBADRA" (advance) |
299 | * feature, which is not supported by older versions of the controller. | |
aa69a809 | 300 | */ |
8e22978c | 301 | static void hw_usb_set_address(struct ci_hdrc *ci, u8 value) |
aa69a809 | 302 | { |
26c696c6 | 303 | hw_write(ci, OP_DEVICEADDR, DEVICEADDR_USBADR, |
727b4ddb | 304 | value << __ffs(DEVICEADDR_USBADR)); |
aa69a809 DL |
305 | } |
306 | ||
307 | /** | |
308 | * hw_usb_reset: restart device after a bus reset (execute without | |
309 | * interruption) | |
310 | * | |
311 | * This function returns an error code | |
312 | */ | |
8e22978c | 313 | static int hw_usb_reset(struct ci_hdrc *ci) |
aa69a809 | 314 | { |
26c696c6 | 315 | hw_usb_set_address(ci, 0); |
aa69a809 DL |
316 | |
317 | /* ESS flushes only at end?!? */ | |
26c696c6 | 318 | hw_write(ci, OP_ENDPTFLUSH, ~0, ~0); |
aa69a809 DL |
319 | |
320 | /* clear setup token semaphores */ | |
26c696c6 | 321 | hw_write(ci, OP_ENDPTSETUPSTAT, 0, 0); |
aa69a809 DL |
322 | |
323 | /* clear complete status */ | |
26c696c6 | 324 | hw_write(ci, OP_ENDPTCOMPLETE, 0, 0); |
aa69a809 DL |
325 | |
326 | /* wait until all bits cleared */ | |
26c696c6 | 327 | while (hw_read(ci, OP_ENDPTPRIME, ~0)) |
aa69a809 DL |
328 | udelay(10); /* not RTOS friendly */ |
329 | ||
330 | /* reset all endpoints ? */ | |
331 | ||
332 | /* reset internal status and wait for further instructions | |
333 | no need to verify the port reset status (ESS does it) */ | |
334 | ||
335 | return 0; | |
336 | } | |
337 | ||
aa69a809 DL |
338 | /****************************************************************************** |
339 | * UTIL block | |
340 | *****************************************************************************/ | |
cc9e6c49 | 341 | |
8e22978c | 342 | static int add_td_to_list(struct ci_hw_ep *hwep, struct ci_hw_req *hwreq, |
cc9e6c49 MG |
343 | unsigned length) |
344 | { | |
2e270412 MG |
345 | int i; |
346 | u32 temp; | |
cc9e6c49 MG |
347 | struct td_node *lastnode, *node = kzalloc(sizeof(struct td_node), |
348 | GFP_ATOMIC); | |
349 | ||
350 | if (node == NULL) | |
351 | return -ENOMEM; | |
352 | ||
84c1eeb0 | 353 | node->ptr = dma_pool_zalloc(hwep->td_pool, GFP_ATOMIC, |
cc9e6c49 MG |
354 | &node->dma); |
355 | if (node->ptr == NULL) { | |
356 | kfree(node); | |
357 | return -ENOMEM; | |
358 | } | |
359 | ||
2e270412 MG |
360 | node->ptr->token = cpu_to_le32(length << __ffs(TD_TOTAL_BYTES)); |
361 | node->ptr->token &= cpu_to_le32(TD_TOTAL_BYTES); | |
362 | node->ptr->token |= cpu_to_le32(TD_STATUS_ACTIVE); | |
2fc5a7da PC |
363 | if (hwep->type == USB_ENDPOINT_XFER_ISOC && hwep->dir == TX) { |
364 | u32 mul = hwreq->req.length / hwep->ep.maxpacket; | |
365 | ||
366 | if (hwreq->req.length == 0 | |
367 | || hwreq->req.length % hwep->ep.maxpacket) | |
368 | mul++; | |
369 | node->ptr->token |= mul << __ffs(TD_MULTO); | |
370 | } | |
2e270412 | 371 | |
2dbc5c4c | 372 | temp = (u32) (hwreq->req.dma + hwreq->req.actual); |
2e270412 MG |
373 | if (length) { |
374 | node->ptr->page[0] = cpu_to_le32(temp); | |
375 | for (i = 1; i < TD_PAGE_COUNT; i++) { | |
8e22978c | 376 | u32 page = temp + i * CI_HDRC_PAGE_SIZE; |
2e270412 MG |
377 | page &= ~TD_RESERVED_MASK; |
378 | node->ptr->page[i] = cpu_to_le32(page); | |
379 | } | |
380 | } | |
381 | ||
2dbc5c4c | 382 | hwreq->req.actual += length; |
cc9e6c49 | 383 | |
2dbc5c4c | 384 | if (!list_empty(&hwreq->tds)) { |
cc9e6c49 | 385 | /* get the last entry */ |
2dbc5c4c | 386 | lastnode = list_entry(hwreq->tds.prev, |
cc9e6c49 MG |
387 | struct td_node, td); |
388 | lastnode->ptr->next = cpu_to_le32(node->dma); | |
389 | } | |
390 | ||
391 | INIT_LIST_HEAD(&node->td); | |
2dbc5c4c | 392 | list_add_tail(&node->td, &hwreq->tds); |
cc9e6c49 MG |
393 | |
394 | return 0; | |
395 | } | |
396 | ||
aa69a809 DL |
397 | /** |
398 | * _usb_addr: calculates endpoint address from direction & number | |
399 | * @ep: endpoint | |
400 | */ | |
8e22978c | 401 | static inline u8 _usb_addr(struct ci_hw_ep *ep) |
aa69a809 DL |
402 | { |
403 | return ((ep->dir == TX) ? USB_ENDPOINT_DIR_MASK : 0) | ep->num; | |
404 | } | |
405 | ||
406 | /** | |
e46fed9f | 407 | * _hardware_enqueue: configures a request at hardware level |
2dbc5c4c | 408 | * @hwep: endpoint |
e46fed9f | 409 | * @hwreq: request |
aa69a809 DL |
410 | * |
411 | * This function returns an error code | |
412 | */ | |
8e22978c | 413 | static int _hardware_enqueue(struct ci_hw_ep *hwep, struct ci_hw_req *hwreq) |
aa69a809 | 414 | { |
8e22978c | 415 | struct ci_hdrc *ci = hwep->ci; |
0e6ca199 | 416 | int ret = 0; |
2dbc5c4c | 417 | unsigned rest = hwreq->req.length; |
2e270412 | 418 | int pages = TD_PAGE_COUNT; |
cc9e6c49 | 419 | struct td_node *firstnode, *lastnode; |
aa69a809 | 420 | |
aa69a809 | 421 | /* don't queue twice */ |
2dbc5c4c | 422 | if (hwreq->req.status == -EALREADY) |
aa69a809 DL |
423 | return -EALREADY; |
424 | ||
2dbc5c4c | 425 | hwreq->req.status = -EALREADY; |
aa69a809 | 426 | |
2dbc5c4c | 427 | ret = usb_gadget_map_request(&ci->gadget, &hwreq->req, hwep->dir); |
5e0aa49e AS |
428 | if (ret) |
429 | return ret; | |
430 | ||
2e270412 MG |
431 | /* |
432 | * The first buffer could be not page aligned. | |
433 | * In that case we have to span into one extra td. | |
434 | */ | |
2dbc5c4c | 435 | if (hwreq->req.dma % PAGE_SIZE) |
2e270412 | 436 | pages--; |
cc9e6c49 | 437 | |
779debdf FT |
438 | if (rest == 0) { |
439 | ret = add_td_to_list(hwep, hwreq, 0); | |
440 | if (ret < 0) | |
441 | goto done; | |
442 | } | |
cc9e6c49 | 443 | |
2e270412 | 444 | while (rest > 0) { |
2dbc5c4c | 445 | unsigned count = min(hwreq->req.length - hwreq->req.actual, |
8e22978c | 446 | (unsigned)(pages * CI_HDRC_PAGE_SIZE)); |
779debdf FT |
447 | ret = add_td_to_list(hwep, hwreq, count); |
448 | if (ret < 0) | |
449 | goto done; | |
450 | ||
2e270412 | 451 | rest -= count; |
0e6ca199 | 452 | } |
aa69a809 | 453 | |
a4da4f12 | 454 | if (hwreq->req.zero && hwreq->req.length && hwep->dir == TX |
779debdf FT |
455 | && (hwreq->req.length % hwep->ep.maxpacket == 0)) { |
456 | ret = add_td_to_list(hwep, hwreq, 0); | |
457 | if (ret < 0) | |
458 | goto done; | |
459 | } | |
cc9e6c49 | 460 | |
2dbc5c4c | 461 | firstnode = list_first_entry(&hwreq->tds, struct td_node, td); |
2e270412 | 462 | |
2dbc5c4c | 463 | lastnode = list_entry(hwreq->tds.prev, |
cc9e6c49 MG |
464 | struct td_node, td); |
465 | ||
466 | lastnode->ptr->next = cpu_to_le32(TD_TERMINATE); | |
2dbc5c4c | 467 | if (!hwreq->req.no_interrupt) |
cc9e6c49 | 468 | lastnode->ptr->token |= cpu_to_le32(TD_IOC); |
a9c17430 MG |
469 | wmb(); |
470 | ||
2dbc5c4c AS |
471 | hwreq->req.actual = 0; |
472 | if (!list_empty(&hwep->qh.queue)) { | |
8e22978c | 473 | struct ci_hw_req *hwreqprev; |
2dbc5c4c | 474 | int n = hw_ep_bit(hwep->num, hwep->dir); |
0e6ca199 | 475 | int tmp_stat; |
cc9e6c49 MG |
476 | struct td_node *prevlastnode; |
477 | u32 next = firstnode->dma & TD_ADDR_MASK; | |
0e6ca199 | 478 | |
2dbc5c4c | 479 | hwreqprev = list_entry(hwep->qh.queue.prev, |
8e22978c | 480 | struct ci_hw_req, queue); |
2dbc5c4c | 481 | prevlastnode = list_entry(hwreqprev->tds.prev, |
cc9e6c49 MG |
482 | struct td_node, td); |
483 | ||
484 | prevlastnode->ptr->next = cpu_to_le32(next); | |
0e6ca199 | 485 | wmb(); |
26c696c6 | 486 | if (hw_read(ci, OP_ENDPTPRIME, BIT(n))) |
0e6ca199 PK |
487 | goto done; |
488 | do { | |
26c696c6 RZ |
489 | hw_write(ci, OP_USBCMD, USBCMD_ATDTW, USBCMD_ATDTW); |
490 | tmp_stat = hw_read(ci, OP_ENDPTSTAT, BIT(n)); | |
491 | } while (!hw_read(ci, OP_USBCMD, USBCMD_ATDTW)); | |
492 | hw_write(ci, OP_USBCMD, USBCMD_ATDTW, 0); | |
0e6ca199 PK |
493 | if (tmp_stat) |
494 | goto done; | |
495 | } | |
496 | ||
497 | /* QH configuration */ | |
2dbc5c4c AS |
498 | hwep->qh.ptr->td.next = cpu_to_le32(firstnode->dma); |
499 | hwep->qh.ptr->td.token &= | |
080ff5f4 | 500 | cpu_to_le32(~(TD_STATUS_HALTED|TD_STATUS_ACTIVE)); |
aa69a809 | 501 | |
2fc5a7da | 502 | if (hwep->type == USB_ENDPOINT_XFER_ISOC && hwep->dir == RX) { |
2dbc5c4c | 503 | u32 mul = hwreq->req.length / hwep->ep.maxpacket; |
e4ce4ecd | 504 | |
2fc5a7da PC |
505 | if (hwreq->req.length == 0 |
506 | || hwreq->req.length % hwep->ep.maxpacket) | |
e4ce4ecd | 507 | mul++; |
2dbc5c4c | 508 | hwep->qh.ptr->cap |= mul << __ffs(QH_MULT); |
e4ce4ecd MG |
509 | } |
510 | ||
2dbc5c4c AS |
511 | ret = hw_ep_prime(ci, hwep->num, hwep->dir, |
512 | hwep->type == USB_ENDPOINT_XFER_CONTROL); | |
0e6ca199 PK |
513 | done: |
514 | return ret; | |
aa69a809 DL |
515 | } |
516 | ||
2e270412 MG |
517 | /* |
518 | * free_pending_td: remove a pending request for the endpoint | |
2dbc5c4c | 519 | * @hwep: endpoint |
2e270412 | 520 | */ |
8e22978c | 521 | static void free_pending_td(struct ci_hw_ep *hwep) |
2e270412 | 522 | { |
2dbc5c4c | 523 | struct td_node *pending = hwep->pending_td; |
2e270412 | 524 | |
2dbc5c4c AS |
525 | dma_pool_free(hwep->td_pool, pending->ptr, pending->dma); |
526 | hwep->pending_td = NULL; | |
2e270412 MG |
527 | kfree(pending); |
528 | } | |
529 | ||
06bdfcdb SM |
530 | static int reprime_dtd(struct ci_hdrc *ci, struct ci_hw_ep *hwep, |
531 | struct td_node *node) | |
532 | { | |
533 | hwep->qh.ptr->td.next = node->dma; | |
534 | hwep->qh.ptr->td.token &= | |
535 | cpu_to_le32(~(TD_STATUS_HALTED | TD_STATUS_ACTIVE)); | |
536 | ||
06bdfcdb SM |
537 | return hw_ep_prime(ci, hwep->num, hwep->dir, |
538 | hwep->type == USB_ENDPOINT_XFER_CONTROL); | |
539 | } | |
540 | ||
aa69a809 DL |
541 | /** |
542 | * _hardware_dequeue: handles a request at hardware level | |
543 | * @gadget: gadget | |
2dbc5c4c | 544 | * @hwep: endpoint |
aa69a809 DL |
545 | * |
546 | * This function returns an error code | |
547 | */ | |
8e22978c | 548 | static int _hardware_dequeue(struct ci_hw_ep *hwep, struct ci_hw_req *hwreq) |
aa69a809 | 549 | { |
cc9e6c49 | 550 | u32 tmptoken; |
2e270412 MG |
551 | struct td_node *node, *tmpnode; |
552 | unsigned remaining_length; | |
2dbc5c4c | 553 | unsigned actual = hwreq->req.length; |
06bdfcdb | 554 | struct ci_hdrc *ci = hwep->ci; |
9e506438 | 555 | |
2dbc5c4c | 556 | if (hwreq->req.status != -EALREADY) |
aa69a809 DL |
557 | return -EINVAL; |
558 | ||
2dbc5c4c | 559 | hwreq->req.status = 0; |
0e6ca199 | 560 | |
2dbc5c4c | 561 | list_for_each_entry_safe(node, tmpnode, &hwreq->tds, td) { |
cc9e6c49 | 562 | tmptoken = le32_to_cpu(node->ptr->token); |
2e270412 | 563 | if ((TD_STATUS_ACTIVE & tmptoken) != 0) { |
06bdfcdb SM |
564 | int n = hw_ep_bit(hwep->num, hwep->dir); |
565 | ||
566 | if (ci->rev == CI_REVISION_24) | |
567 | if (!hw_read(ci, OP_ENDPTSTAT, BIT(n))) | |
568 | reprime_dtd(ci, hwep, node); | |
2dbc5c4c | 569 | hwreq->req.status = -EALREADY; |
0e6ca199 | 570 | return -EBUSY; |
cc9e6c49 | 571 | } |
aa69a809 | 572 | |
2e270412 MG |
573 | remaining_length = (tmptoken & TD_TOTAL_BYTES); |
574 | remaining_length >>= __ffs(TD_TOTAL_BYTES); | |
575 | actual -= remaining_length; | |
576 | ||
2dbc5c4c AS |
577 | hwreq->req.status = tmptoken & TD_STATUS; |
578 | if ((TD_STATUS_HALTED & hwreq->req.status)) { | |
579 | hwreq->req.status = -EPIPE; | |
2e270412 | 580 | break; |
2dbc5c4c AS |
581 | } else if ((TD_STATUS_DT_ERR & hwreq->req.status)) { |
582 | hwreq->req.status = -EPROTO; | |
2e270412 | 583 | break; |
2dbc5c4c AS |
584 | } else if ((TD_STATUS_TR_ERR & hwreq->req.status)) { |
585 | hwreq->req.status = -EILSEQ; | |
2e270412 MG |
586 | break; |
587 | } | |
588 | ||
589 | if (remaining_length) { | |
bc9d32f0 | 590 | if (hwep->dir == TX) { |
2dbc5c4c | 591 | hwreq->req.status = -EPROTO; |
2e270412 MG |
592 | break; |
593 | } | |
594 | } | |
595 | /* | |
596 | * As the hardware could still address the freed td | |
597 | * which will run the udc unusable, the cleanup of the | |
598 | * td has to be delayed by one. | |
599 | */ | |
2dbc5c4c AS |
600 | if (hwep->pending_td) |
601 | free_pending_td(hwep); | |
2e270412 | 602 | |
2dbc5c4c | 603 | hwep->pending_td = node; |
2e270412 MG |
604 | list_del_init(&node->td); |
605 | } | |
aa69a809 | 606 | |
2dbc5c4c | 607 | usb_gadget_unmap_request(&hwep->ci->gadget, &hwreq->req, hwep->dir); |
aa69a809 | 608 | |
2dbc5c4c | 609 | hwreq->req.actual += actual; |
aa69a809 | 610 | |
2dbc5c4c AS |
611 | if (hwreq->req.status) |
612 | return hwreq->req.status; | |
aa69a809 | 613 | |
2dbc5c4c | 614 | return hwreq->req.actual; |
aa69a809 DL |
615 | } |
616 | ||
617 | /** | |
618 | * _ep_nuke: dequeues all endpoint requests | |
2dbc5c4c | 619 | * @hwep: endpoint |
aa69a809 DL |
620 | * |
621 | * This function returns an error code | |
622 | * Caller must hold lock | |
623 | */ | |
8e22978c | 624 | static int _ep_nuke(struct ci_hw_ep *hwep) |
2dbc5c4c AS |
625 | __releases(hwep->lock) |
626 | __acquires(hwep->lock) | |
aa69a809 | 627 | { |
2e270412 | 628 | struct td_node *node, *tmpnode; |
2dbc5c4c | 629 | if (hwep == NULL) |
aa69a809 DL |
630 | return -EINVAL; |
631 | ||
2dbc5c4c | 632 | hw_ep_flush(hwep->ci, hwep->num, hwep->dir); |
aa69a809 | 633 | |
2dbc5c4c | 634 | while (!list_empty(&hwep->qh.queue)) { |
aa69a809 DL |
635 | |
636 | /* pop oldest request */ | |
8e22978c AS |
637 | struct ci_hw_req *hwreq = list_entry(hwep->qh.queue.next, |
638 | struct ci_hw_req, queue); | |
7ca2cd29 | 639 | |
2dbc5c4c AS |
640 | list_for_each_entry_safe(node, tmpnode, &hwreq->tds, td) { |
641 | dma_pool_free(hwep->td_pool, node->ptr, node->dma); | |
2e270412 MG |
642 | list_del_init(&node->td); |
643 | node->ptr = NULL; | |
644 | kfree(node); | |
7ca2cd29 MG |
645 | } |
646 | ||
2dbc5c4c AS |
647 | list_del_init(&hwreq->queue); |
648 | hwreq->req.status = -ESHUTDOWN; | |
aa69a809 | 649 | |
2dbc5c4c AS |
650 | if (hwreq->req.complete != NULL) { |
651 | spin_unlock(hwep->lock); | |
304f7e5e | 652 | usb_gadget_giveback_request(&hwep->ep, &hwreq->req); |
2dbc5c4c | 653 | spin_lock(hwep->lock); |
aa69a809 DL |
654 | } |
655 | } | |
2e270412 | 656 | |
2dbc5c4c AS |
657 | if (hwep->pending_td) |
658 | free_pending_td(hwep); | |
2e270412 | 659 | |
aa69a809 DL |
660 | return 0; |
661 | } | |
662 | ||
56ffa1d1 PC |
663 | static int _ep_set_halt(struct usb_ep *ep, int value, bool check_transfer) |
664 | { | |
665 | struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep); | |
666 | int direction, retval = 0; | |
667 | unsigned long flags; | |
668 | ||
669 | if (ep == NULL || hwep->ep.desc == NULL) | |
670 | return -EINVAL; | |
671 | ||
672 | if (usb_endpoint_xfer_isoc(hwep->ep.desc)) | |
673 | return -EOPNOTSUPP; | |
674 | ||
675 | spin_lock_irqsave(hwep->lock, flags); | |
676 | ||
677 | if (value && hwep->dir == TX && check_transfer && | |
678 | !list_empty(&hwep->qh.queue) && | |
679 | !usb_endpoint_xfer_control(hwep->ep.desc)) { | |
680 | spin_unlock_irqrestore(hwep->lock, flags); | |
681 | return -EAGAIN; | |
682 | } | |
683 | ||
684 | direction = hwep->dir; | |
685 | do { | |
686 | retval |= hw_ep_set_halt(hwep->ci, hwep->num, hwep->dir, value); | |
687 | ||
688 | if (!value) | |
689 | hwep->wedge = 0; | |
690 | ||
691 | if (hwep->type == USB_ENDPOINT_XFER_CONTROL) | |
692 | hwep->dir = (hwep->dir == TX) ? RX : TX; | |
693 | ||
694 | } while (hwep->dir != direction); | |
695 | ||
696 | spin_unlock_irqrestore(hwep->lock, flags); | |
697 | return retval; | |
698 | } | |
699 | ||
700 | ||
aa69a809 DL |
701 | /** |
702 | * _gadget_stop_activity: stops all USB activity, flushes & disables all endpts | |
703 | * @gadget: gadget | |
704 | * | |
705 | * This function returns an error code | |
aa69a809 DL |
706 | */ |
707 | static int _gadget_stop_activity(struct usb_gadget *gadget) | |
aa69a809 DL |
708 | { |
709 | struct usb_ep *ep; | |
8e22978c | 710 | struct ci_hdrc *ci = container_of(gadget, struct ci_hdrc, gadget); |
e2b61c1d | 711 | unsigned long flags; |
aa69a809 | 712 | |
26c696c6 RZ |
713 | spin_lock_irqsave(&ci->lock, flags); |
714 | ci->gadget.speed = USB_SPEED_UNKNOWN; | |
715 | ci->remote_wakeup = 0; | |
716 | ci->suspended = 0; | |
717 | spin_unlock_irqrestore(&ci->lock, flags); | |
e2b61c1d | 718 | |
aa69a809 DL |
719 | /* flush all endpoints */ |
720 | gadget_for_each_ep(ep, gadget) { | |
721 | usb_ep_fifo_flush(ep); | |
722 | } | |
26c696c6 RZ |
723 | usb_ep_fifo_flush(&ci->ep0out->ep); |
724 | usb_ep_fifo_flush(&ci->ep0in->ep); | |
aa69a809 | 725 | |
aa69a809 DL |
726 | /* make sure to disable all endpoints */ |
727 | gadget_for_each_ep(ep, gadget) { | |
728 | usb_ep_disable(ep); | |
729 | } | |
aa69a809 | 730 | |
26c696c6 RZ |
731 | if (ci->status != NULL) { |
732 | usb_ep_free_request(&ci->ep0in->ep, ci->status); | |
733 | ci->status = NULL; | |
aa69a809 DL |
734 | } |
735 | ||
aa69a809 DL |
736 | return 0; |
737 | } | |
738 | ||
739 | /****************************************************************************** | |
740 | * ISR block | |
741 | *****************************************************************************/ | |
742 | /** | |
743 | * isr_reset_handler: USB reset interrupt handler | |
26c696c6 | 744 | * @ci: UDC device |
aa69a809 DL |
745 | * |
746 | * This function resets USB engine after a bus reset occurred | |
747 | */ | |
8e22978c | 748 | static void isr_reset_handler(struct ci_hdrc *ci) |
26c696c6 RZ |
749 | __releases(ci->lock) |
750 | __acquires(ci->lock) | |
aa69a809 | 751 | { |
aa69a809 DL |
752 | int retval; |
753 | ||
a3aee368 | 754 | spin_unlock(&ci->lock); |
afbe4775 PC |
755 | if (ci->gadget.speed != USB_SPEED_UNKNOWN) |
756 | usb_gadget_udc_reset(&ci->gadget, ci->driver); | |
92b336d7 | 757 | |
26c696c6 | 758 | retval = _gadget_stop_activity(&ci->gadget); |
aa69a809 DL |
759 | if (retval) |
760 | goto done; | |
761 | ||
26c696c6 | 762 | retval = hw_usb_reset(ci); |
aa69a809 DL |
763 | if (retval) |
764 | goto done; | |
765 | ||
26c696c6 RZ |
766 | ci->status = usb_ep_alloc_request(&ci->ep0in->ep, GFP_ATOMIC); |
767 | if (ci->status == NULL) | |
ac1aa6a2 | 768 | retval = -ENOMEM; |
ca9cfea0 | 769 | |
b9322252 | 770 | done: |
26c696c6 | 771 | spin_lock(&ci->lock); |
aa69a809 | 772 | |
aa69a809 | 773 | if (retval) |
26c696c6 | 774 | dev_err(ci->dev, "error: %i\n", retval); |
aa69a809 DL |
775 | } |
776 | ||
777 | /** | |
778 | * isr_get_status_complete: get_status request complete function | |
779 | * @ep: endpoint | |
780 | * @req: request handled | |
781 | * | |
782 | * Caller must release lock | |
783 | */ | |
784 | static void isr_get_status_complete(struct usb_ep *ep, struct usb_request *req) | |
785 | { | |
0f089094 | 786 | if (ep == NULL || req == NULL) |
aa69a809 | 787 | return; |
aa69a809 DL |
788 | |
789 | kfree(req->buf); | |
790 | usb_ep_free_request(ep, req); | |
791 | } | |
792 | ||
dd064e9d MG |
793 | /** |
794 | * _ep_queue: queues (submits) an I/O request to an endpoint | |
e46fed9f FT |
795 | * @ep: endpoint |
796 | * @req: request | |
797 | * @gfp_flags: GFP flags (not used) | |
dd064e9d MG |
798 | * |
799 | * Caller must hold lock | |
e46fed9f | 800 | * This function returns an error code |
dd064e9d MG |
801 | */ |
802 | static int _ep_queue(struct usb_ep *ep, struct usb_request *req, | |
803 | gfp_t __maybe_unused gfp_flags) | |
804 | { | |
8e22978c AS |
805 | struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep); |
806 | struct ci_hw_req *hwreq = container_of(req, struct ci_hw_req, req); | |
807 | struct ci_hdrc *ci = hwep->ci; | |
dd064e9d MG |
808 | int retval = 0; |
809 | ||
2dbc5c4c | 810 | if (ep == NULL || req == NULL || hwep->ep.desc == NULL) |
dd064e9d MG |
811 | return -EINVAL; |
812 | ||
2dbc5c4c | 813 | if (hwep->type == USB_ENDPOINT_XFER_CONTROL) { |
dd064e9d | 814 | if (req->length) |
2dbc5c4c | 815 | hwep = (ci->ep0_dir == RX) ? |
dd064e9d | 816 | ci->ep0out : ci->ep0in; |
2dbc5c4c AS |
817 | if (!list_empty(&hwep->qh.queue)) { |
818 | _ep_nuke(hwep); | |
2dbc5c4c AS |
819 | dev_warn(hwep->ci->dev, "endpoint ctrl %X nuked\n", |
820 | _usb_addr(hwep)); | |
dd064e9d MG |
821 | } |
822 | } | |
823 | ||
2dbc5c4c AS |
824 | if (usb_endpoint_xfer_isoc(hwep->ep.desc) && |
825 | hwreq->req.length > (1 + hwep->ep.mult) * hwep->ep.maxpacket) { | |
826 | dev_err(hwep->ci->dev, "request length too big for isochronous\n"); | |
e4ce4ecd MG |
827 | return -EMSGSIZE; |
828 | } | |
829 | ||
dd064e9d | 830 | /* first nuke then test link, e.g. previous status has not sent */ |
2dbc5c4c AS |
831 | if (!list_empty(&hwreq->queue)) { |
832 | dev_err(hwep->ci->dev, "request already in queue\n"); | |
dd064e9d MG |
833 | return -EBUSY; |
834 | } | |
835 | ||
dd064e9d | 836 | /* push request */ |
2dbc5c4c AS |
837 | hwreq->req.status = -EINPROGRESS; |
838 | hwreq->req.actual = 0; | |
dd064e9d | 839 | |
2dbc5c4c | 840 | retval = _hardware_enqueue(hwep, hwreq); |
dd064e9d MG |
841 | |
842 | if (retval == -EALREADY) | |
843 | retval = 0; | |
844 | if (!retval) | |
2dbc5c4c | 845 | list_add_tail(&hwreq->queue, &hwep->qh.queue); |
dd064e9d MG |
846 | |
847 | return retval; | |
848 | } | |
849 | ||
aa69a809 DL |
850 | /** |
851 | * isr_get_status_response: get_status request response | |
26c696c6 | 852 | * @ci: ci struct |
aa69a809 DL |
853 | * @setup: setup request packet |
854 | * | |
855 | * This function returns an error code | |
856 | */ | |
8e22978c | 857 | static int isr_get_status_response(struct ci_hdrc *ci, |
aa69a809 | 858 | struct usb_ctrlrequest *setup) |
2dbc5c4c AS |
859 | __releases(hwep->lock) |
860 | __acquires(hwep->lock) | |
aa69a809 | 861 | { |
8e22978c | 862 | struct ci_hw_ep *hwep = ci->ep0in; |
aa69a809 DL |
863 | struct usb_request *req = NULL; |
864 | gfp_t gfp_flags = GFP_ATOMIC; | |
865 | int dir, num, retval; | |
866 | ||
2dbc5c4c | 867 | if (hwep == NULL || setup == NULL) |
aa69a809 DL |
868 | return -EINVAL; |
869 | ||
2dbc5c4c AS |
870 | spin_unlock(hwep->lock); |
871 | req = usb_ep_alloc_request(&hwep->ep, gfp_flags); | |
872 | spin_lock(hwep->lock); | |
aa69a809 DL |
873 | if (req == NULL) |
874 | return -ENOMEM; | |
875 | ||
876 | req->complete = isr_get_status_complete; | |
877 | req->length = 2; | |
878 | req->buf = kzalloc(req->length, gfp_flags); | |
879 | if (req->buf == NULL) { | |
880 | retval = -ENOMEM; | |
881 | goto err_free_req; | |
882 | } | |
883 | ||
884 | if ((setup->bRequestType & USB_RECIP_MASK) == USB_RECIP_DEVICE) { | |
1009f9a3 PC |
885 | *(u16 *)req->buf = (ci->remote_wakeup << 1) | |
886 | ci->gadget.is_selfpowered; | |
aa69a809 DL |
887 | } else if ((setup->bRequestType & USB_RECIP_MASK) \ |
888 | == USB_RECIP_ENDPOINT) { | |
889 | dir = (le16_to_cpu(setup->wIndex) & USB_ENDPOINT_DIR_MASK) ? | |
890 | TX : RX; | |
891 | num = le16_to_cpu(setup->wIndex) & USB_ENDPOINT_NUMBER_MASK; | |
26c696c6 | 892 | *(u16 *)req->buf = hw_ep_get_halt(ci, num, dir); |
aa69a809 DL |
893 | } |
894 | /* else do nothing; reserved for future use */ | |
895 | ||
2dbc5c4c | 896 | retval = _ep_queue(&hwep->ep, req, gfp_flags); |
aa69a809 DL |
897 | if (retval) |
898 | goto err_free_buf; | |
899 | ||
900 | return 0; | |
901 | ||
902 | err_free_buf: | |
903 | kfree(req->buf); | |
904 | err_free_req: | |
2dbc5c4c AS |
905 | spin_unlock(hwep->lock); |
906 | usb_ep_free_request(&hwep->ep, req); | |
907 | spin_lock(hwep->lock); | |
aa69a809 DL |
908 | return retval; |
909 | } | |
910 | ||
541cace8 PK |
911 | /** |
912 | * isr_setup_status_complete: setup_status request complete function | |
913 | * @ep: endpoint | |
914 | * @req: request handled | |
915 | * | |
916 | * Caller must release lock. Put the port in test mode if test mode | |
917 | * feature is selected. | |
918 | */ | |
919 | static void | |
920 | isr_setup_status_complete(struct usb_ep *ep, struct usb_request *req) | |
921 | { | |
8e22978c | 922 | struct ci_hdrc *ci = req->context; |
541cace8 PK |
923 | unsigned long flags; |
924 | ||
26c696c6 RZ |
925 | if (ci->setaddr) { |
926 | hw_usb_set_address(ci, ci->address); | |
927 | ci->setaddr = false; | |
10775eb1 PC |
928 | if (ci->address) |
929 | usb_gadget_set_state(&ci->gadget, USB_STATE_ADDRESS); | |
ef15e549 AS |
930 | } |
931 | ||
26c696c6 RZ |
932 | spin_lock_irqsave(&ci->lock, flags); |
933 | if (ci->test_mode) | |
934 | hw_port_test_set(ci, ci->test_mode); | |
935 | spin_unlock_irqrestore(&ci->lock, flags); | |
541cace8 PK |
936 | } |
937 | ||
aa69a809 DL |
938 | /** |
939 | * isr_setup_status_phase: queues the status phase of a setup transation | |
26c696c6 | 940 | * @ci: ci struct |
aa69a809 DL |
941 | * |
942 | * This function returns an error code | |
943 | */ | |
8e22978c | 944 | static int isr_setup_status_phase(struct ci_hdrc *ci) |
aa69a809 DL |
945 | { |
946 | int retval; | |
8e22978c | 947 | struct ci_hw_ep *hwep; |
aa69a809 | 948 | |
6f3c4fb6 CG |
949 | /* |
950 | * Unexpected USB controller behavior, caused by bad signal integrity | |
951 | * or ground reference problems, can lead to isr_setup_status_phase | |
952 | * being called with ci->status equal to NULL. | |
953 | * If this situation occurs, you should review your USB hardware design. | |
954 | */ | |
955 | if (WARN_ON_ONCE(!ci->status)) | |
956 | return -EPIPE; | |
957 | ||
2dbc5c4c | 958 | hwep = (ci->ep0_dir == TX) ? ci->ep0out : ci->ep0in; |
26c696c6 RZ |
959 | ci->status->context = ci; |
960 | ci->status->complete = isr_setup_status_complete; | |
aa69a809 | 961 | |
2dbc5c4c | 962 | retval = _ep_queue(&hwep->ep, ci->status, GFP_ATOMIC); |
aa69a809 DL |
963 | |
964 | return retval; | |
965 | } | |
966 | ||
967 | /** | |
968 | * isr_tr_complete_low: transaction complete low level handler | |
2dbc5c4c | 969 | * @hwep: endpoint |
aa69a809 DL |
970 | * |
971 | * This function returns an error code | |
972 | * Caller must hold lock | |
973 | */ | |
8e22978c | 974 | static int isr_tr_complete_low(struct ci_hw_ep *hwep) |
2dbc5c4c AS |
975 | __releases(hwep->lock) |
976 | __acquires(hwep->lock) | |
aa69a809 | 977 | { |
8e22978c AS |
978 | struct ci_hw_req *hwreq, *hwreqtemp; |
979 | struct ci_hw_ep *hweptemp = hwep; | |
db89960e | 980 | int retval = 0; |
aa69a809 | 981 | |
2dbc5c4c | 982 | list_for_each_entry_safe(hwreq, hwreqtemp, &hwep->qh.queue, |
0e6ca199 | 983 | queue) { |
2dbc5c4c | 984 | retval = _hardware_dequeue(hwep, hwreq); |
0e6ca199 PK |
985 | if (retval < 0) |
986 | break; | |
2dbc5c4c AS |
987 | list_del_init(&hwreq->queue); |
988 | if (hwreq->req.complete != NULL) { | |
989 | spin_unlock(hwep->lock); | |
990 | if ((hwep->type == USB_ENDPOINT_XFER_CONTROL) && | |
991 | hwreq->req.length) | |
992 | hweptemp = hwep->ci->ep0in; | |
304f7e5e | 993 | usb_gadget_giveback_request(&hweptemp->ep, &hwreq->req); |
2dbc5c4c | 994 | spin_lock(hwep->lock); |
0e6ca199 | 995 | } |
d9bb9c18 AL |
996 | } |
997 | ||
ef907482 | 998 | if (retval == -EBUSY) |
0e6ca199 | 999 | retval = 0; |
aa69a809 | 1000 | |
aa69a809 DL |
1001 | return retval; |
1002 | } | |
1003 | ||
d20f7807 LJ |
1004 | static int otg_a_alt_hnp_support(struct ci_hdrc *ci) |
1005 | { | |
1006 | dev_warn(&ci->gadget.dev, | |
1007 | "connect the device to an alternate port if you want HNP\n"); | |
1008 | return isr_setup_status_phase(ci); | |
1009 | } | |
1010 | ||
d7b00e31 PC |
1011 | /** |
1012 | * isr_setup_packet_handler: setup packet handler | |
1013 | * @ci: UDC descriptor | |
1014 | * | |
1015 | * This function handles setup packet | |
1016 | */ | |
1017 | static void isr_setup_packet_handler(struct ci_hdrc *ci) | |
1018 | __releases(ci->lock) | |
1019 | __acquires(ci->lock) | |
1020 | { | |
1021 | struct ci_hw_ep *hwep = &ci->ci_hw_ep[0]; | |
1022 | struct usb_ctrlrequest req; | |
1023 | int type, num, dir, err = -EINVAL; | |
1024 | u8 tmode = 0; | |
1025 | ||
1026 | /* | |
1027 | * Flush data and handshake transactions of previous | |
1028 | * setup packet. | |
1029 | */ | |
1030 | _ep_nuke(ci->ep0out); | |
1031 | _ep_nuke(ci->ep0in); | |
1032 | ||
1033 | /* read_setup_packet */ | |
1034 | do { | |
1035 | hw_test_and_set_setup_guard(ci); | |
1036 | memcpy(&req, &hwep->qh.ptr->setup, sizeof(req)); | |
1037 | } while (!hw_test_and_clear_setup_guard(ci)); | |
1038 | ||
1039 | type = req.bRequestType; | |
1040 | ||
1041 | ci->ep0_dir = (type & USB_DIR_IN) ? TX : RX; | |
1042 | ||
1043 | switch (req.bRequest) { | |
1044 | case USB_REQ_CLEAR_FEATURE: | |
1045 | if (type == (USB_DIR_OUT|USB_RECIP_ENDPOINT) && | |
1046 | le16_to_cpu(req.wValue) == | |
1047 | USB_ENDPOINT_HALT) { | |
1048 | if (req.wLength != 0) | |
1049 | break; | |
1050 | num = le16_to_cpu(req.wIndex); | |
bc9d32f0 | 1051 | dir = (num & USB_ENDPOINT_DIR_MASK) ? TX : RX; |
d7b00e31 | 1052 | num &= USB_ENDPOINT_NUMBER_MASK; |
bc9d32f0 | 1053 | if (dir == TX) |
d7b00e31 PC |
1054 | num += ci->hw_ep_max / 2; |
1055 | if (!ci->ci_hw_ep[num].wedge) { | |
1056 | spin_unlock(&ci->lock); | |
1057 | err = usb_ep_clear_halt( | |
1058 | &ci->ci_hw_ep[num].ep); | |
1059 | spin_lock(&ci->lock); | |
1060 | if (err) | |
1061 | break; | |
1062 | } | |
1063 | err = isr_setup_status_phase(ci); | |
1064 | } else if (type == (USB_DIR_OUT|USB_RECIP_DEVICE) && | |
1065 | le16_to_cpu(req.wValue) == | |
1066 | USB_DEVICE_REMOTE_WAKEUP) { | |
1067 | if (req.wLength != 0) | |
1068 | break; | |
1069 | ci->remote_wakeup = 0; | |
1070 | err = isr_setup_status_phase(ci); | |
1071 | } else { | |
1072 | goto delegate; | |
1073 | } | |
1074 | break; | |
1075 | case USB_REQ_GET_STATUS: | |
d6da40af LJ |
1076 | if ((type != (USB_DIR_IN|USB_RECIP_DEVICE) || |
1077 | le16_to_cpu(req.wIndex) == OTG_STS_SELECTOR) && | |
d7b00e31 PC |
1078 | type != (USB_DIR_IN|USB_RECIP_ENDPOINT) && |
1079 | type != (USB_DIR_IN|USB_RECIP_INTERFACE)) | |
1080 | goto delegate; | |
1081 | if (le16_to_cpu(req.wLength) != 2 || | |
1082 | le16_to_cpu(req.wValue) != 0) | |
1083 | break; | |
1084 | err = isr_get_status_response(ci, &req); | |
1085 | break; | |
1086 | case USB_REQ_SET_ADDRESS: | |
1087 | if (type != (USB_DIR_OUT|USB_RECIP_DEVICE)) | |
1088 | goto delegate; | |
1089 | if (le16_to_cpu(req.wLength) != 0 || | |
1090 | le16_to_cpu(req.wIndex) != 0) | |
1091 | break; | |
1092 | ci->address = (u8)le16_to_cpu(req.wValue); | |
1093 | ci->setaddr = true; | |
1094 | err = isr_setup_status_phase(ci); | |
1095 | break; | |
1096 | case USB_REQ_SET_FEATURE: | |
1097 | if (type == (USB_DIR_OUT|USB_RECIP_ENDPOINT) && | |
1098 | le16_to_cpu(req.wValue) == | |
1099 | USB_ENDPOINT_HALT) { | |
1100 | if (req.wLength != 0) | |
1101 | break; | |
1102 | num = le16_to_cpu(req.wIndex); | |
bc9d32f0 | 1103 | dir = (num & USB_ENDPOINT_DIR_MASK) ? TX : RX; |
d7b00e31 | 1104 | num &= USB_ENDPOINT_NUMBER_MASK; |
bc9d32f0 | 1105 | if (dir == TX) |
d7b00e31 PC |
1106 | num += ci->hw_ep_max / 2; |
1107 | ||
1108 | spin_unlock(&ci->lock); | |
56ffa1d1 | 1109 | err = _ep_set_halt(&ci->ci_hw_ep[num].ep, 1, false); |
d7b00e31 PC |
1110 | spin_lock(&ci->lock); |
1111 | if (!err) | |
1112 | isr_setup_status_phase(ci); | |
1113 | } else if (type == (USB_DIR_OUT|USB_RECIP_DEVICE)) { | |
1114 | if (req.wLength != 0) | |
1115 | break; | |
1116 | switch (le16_to_cpu(req.wValue)) { | |
1117 | case USB_DEVICE_REMOTE_WAKEUP: | |
1118 | ci->remote_wakeup = 1; | |
1119 | err = isr_setup_status_phase(ci); | |
1120 | break; | |
1121 | case USB_DEVICE_TEST_MODE: | |
1122 | tmode = le16_to_cpu(req.wIndex) >> 8; | |
1123 | switch (tmode) { | |
1124 | case TEST_J: | |
1125 | case TEST_K: | |
1126 | case TEST_SE0_NAK: | |
1127 | case TEST_PACKET: | |
1128 | case TEST_FORCE_EN: | |
1129 | ci->test_mode = tmode; | |
1130 | err = isr_setup_status_phase( | |
1131 | ci); | |
1132 | break; | |
1133 | default: | |
1134 | break; | |
1135 | } | |
95f5555f LJ |
1136 | break; |
1137 | case USB_DEVICE_B_HNP_ENABLE: | |
1138 | if (ci_otg_is_fsm_mode(ci)) { | |
1139 | ci->gadget.b_hnp_enable = 1; | |
1140 | err = isr_setup_status_phase( | |
1141 | ci); | |
1142 | } | |
1143 | break; | |
d20f7807 LJ |
1144 | case USB_DEVICE_A_ALT_HNP_SUPPORT: |
1145 | if (ci_otg_is_fsm_mode(ci)) | |
1146 | err = otg_a_alt_hnp_support(ci); | |
1147 | break; | |
3520d462 PC |
1148 | case USB_DEVICE_A_HNP_SUPPORT: |
1149 | if (ci_otg_is_fsm_mode(ci)) { | |
1150 | ci->gadget.a_hnp_support = 1; | |
1151 | err = isr_setup_status_phase( | |
1152 | ci); | |
1153 | } | |
1154 | break; | |
d7b00e31 PC |
1155 | default: |
1156 | goto delegate; | |
1157 | } | |
1158 | } else { | |
1159 | goto delegate; | |
1160 | } | |
1161 | break; | |
1162 | default: | |
1163 | delegate: | |
1164 | if (req.wLength == 0) /* no data phase */ | |
1165 | ci->ep0_dir = TX; | |
1166 | ||
1167 | spin_unlock(&ci->lock); | |
1168 | err = ci->driver->setup(&ci->gadget, &req); | |
1169 | spin_lock(&ci->lock); | |
1170 | break; | |
1171 | } | |
1172 | ||
1173 | if (err < 0) { | |
1174 | spin_unlock(&ci->lock); | |
56ffa1d1 PC |
1175 | if (_ep_set_halt(&hwep->ep, 1, false)) |
1176 | dev_err(ci->dev, "error: _ep_set_halt\n"); | |
d7b00e31 PC |
1177 | spin_lock(&ci->lock); |
1178 | } | |
1179 | } | |
1180 | ||
aa69a809 DL |
1181 | /** |
1182 | * isr_tr_complete_handler: transaction complete interrupt handler | |
26c696c6 | 1183 | * @ci: UDC descriptor |
aa69a809 DL |
1184 | * |
1185 | * This function handles traffic events | |
1186 | */ | |
8e22978c | 1187 | static void isr_tr_complete_handler(struct ci_hdrc *ci) |
26c696c6 RZ |
1188 | __releases(ci->lock) |
1189 | __acquires(ci->lock) | |
aa69a809 DL |
1190 | { |
1191 | unsigned i; | |
d7b00e31 | 1192 | int err; |
aa69a809 | 1193 | |
26c696c6 | 1194 | for (i = 0; i < ci->hw_ep_max; i++) { |
8e22978c | 1195 | struct ci_hw_ep *hwep = &ci->ci_hw_ep[i]; |
aa69a809 | 1196 | |
2dbc5c4c | 1197 | if (hwep->ep.desc == NULL) |
aa69a809 DL |
1198 | continue; /* not configured */ |
1199 | ||
26c696c6 | 1200 | if (hw_test_and_clear_complete(ci, i)) { |
2dbc5c4c AS |
1201 | err = isr_tr_complete_low(hwep); |
1202 | if (hwep->type == USB_ENDPOINT_XFER_CONTROL) { | |
aa69a809 | 1203 | if (err > 0) /* needs status phase */ |
26c696c6 | 1204 | err = isr_setup_status_phase(ci); |
aa69a809 | 1205 | if (err < 0) { |
26c696c6 | 1206 | spin_unlock(&ci->lock); |
56ffa1d1 | 1207 | if (_ep_set_halt(&hwep->ep, 1, false)) |
26c696c6 | 1208 | dev_err(ci->dev, |
56ffa1d1 | 1209 | "error: _ep_set_halt\n"); |
26c696c6 | 1210 | spin_lock(&ci->lock); |
aa69a809 DL |
1211 | } |
1212 | } | |
1213 | } | |
1214 | ||
64fc06c4 | 1215 | /* Only handle setup packet below */ |
d7b00e31 PC |
1216 | if (i == 0 && |
1217 | hw_test_and_clear(ci, OP_ENDPTSETUPSTAT, BIT(0))) | |
1218 | isr_setup_packet_handler(ci); | |
aa69a809 DL |
1219 | } |
1220 | } | |
1221 | ||
1222 | /****************************************************************************** | |
1223 | * ENDPT block | |
1224 | *****************************************************************************/ | |
1225 | /** | |
1226 | * ep_enable: configure endpoint, making it usable | |
1227 | * | |
1228 | * Check usb_ep_enable() at "usb_gadget.h" for details | |
1229 | */ | |
1230 | static int ep_enable(struct usb_ep *ep, | |
1231 | const struct usb_endpoint_descriptor *desc) | |
1232 | { | |
8e22978c | 1233 | struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep); |
ca9cfea0 | 1234 | int retval = 0; |
aa69a809 | 1235 | unsigned long flags; |
1cd12a9c | 1236 | u32 cap = 0; |
aa69a809 | 1237 | |
aa69a809 DL |
1238 | if (ep == NULL || desc == NULL) |
1239 | return -EINVAL; | |
1240 | ||
2dbc5c4c | 1241 | spin_lock_irqsave(hwep->lock, flags); |
aa69a809 DL |
1242 | |
1243 | /* only internal SW should enable ctrl endpts */ | |
1244 | ||
d5d1e1be | 1245 | if (!list_empty(&hwep->qh.queue)) { |
2dbc5c4c | 1246 | dev_warn(hwep->ci->dev, "enabling a non-empty endpoint!\n"); |
d5d1e1be PC |
1247 | spin_unlock_irqrestore(hwep->lock, flags); |
1248 | return -EBUSY; | |
1249 | } | |
1250 | ||
1251 | hwep->ep.desc = desc; | |
aa69a809 | 1252 | |
2dbc5c4c AS |
1253 | hwep->dir = usb_endpoint_dir_in(desc) ? TX : RX; |
1254 | hwep->num = usb_endpoint_num(desc); | |
1255 | hwep->type = usb_endpoint_type(desc); | |
aa69a809 | 1256 | |
2dbc5c4c AS |
1257 | hwep->ep.maxpacket = usb_endpoint_maxp(desc) & 0x07ff; |
1258 | hwep->ep.mult = QH_ISO_MULT(usb_endpoint_maxp(desc)); | |
aa69a809 | 1259 | |
2dbc5c4c | 1260 | if (hwep->type == USB_ENDPOINT_XFER_CONTROL) |
1cd12a9c | 1261 | cap |= QH_IOS; |
953c6646 AR |
1262 | |
1263 | cap |= QH_ZLT; | |
2dbc5c4c | 1264 | cap |= (hwep->ep.maxpacket << __ffs(QH_MAX_PKT)) & QH_MAX_PKT; |
2fc5a7da PC |
1265 | /* |
1266 | * For ISO-TX, we set mult at QH as the largest value, and use | |
1267 | * MultO at TD as real mult value. | |
1268 | */ | |
1269 | if (hwep->type == USB_ENDPOINT_XFER_ISOC && hwep->dir == TX) | |
1270 | cap |= 3 << __ffs(QH_MULT); | |
1cd12a9c | 1271 | |
2dbc5c4c | 1272 | hwep->qh.ptr->cap = cpu_to_le32(cap); |
1cd12a9c | 1273 | |
2dbc5c4c | 1274 | hwep->qh.ptr->td.next |= cpu_to_le32(TD_TERMINATE); /* needed? */ |
aa69a809 | 1275 | |
64fc06c4 PC |
1276 | if (hwep->num != 0 && hwep->type == USB_ENDPOINT_XFER_CONTROL) { |
1277 | dev_err(hwep->ci->dev, "Set control xfer at non-ep0\n"); | |
1278 | retval = -EINVAL; | |
1279 | } | |
1280 | ||
ac1aa6a2 A |
1281 | /* |
1282 | * Enable endpoints in the HW other than ep0 as ep0 | |
1283 | * is always enabled | |
1284 | */ | |
2dbc5c4c AS |
1285 | if (hwep->num) |
1286 | retval |= hw_ep_enable(hwep->ci, hwep->num, hwep->dir, | |
1287 | hwep->type); | |
aa69a809 | 1288 | |
2dbc5c4c | 1289 | spin_unlock_irqrestore(hwep->lock, flags); |
aa69a809 DL |
1290 | return retval; |
1291 | } | |
1292 | ||
1293 | /** | |
1294 | * ep_disable: endpoint is no longer usable | |
1295 | * | |
1296 | * Check usb_ep_disable() at "usb_gadget.h" for details | |
1297 | */ | |
1298 | static int ep_disable(struct usb_ep *ep) | |
1299 | { | |
8e22978c | 1300 | struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep); |
aa69a809 DL |
1301 | int direction, retval = 0; |
1302 | unsigned long flags; | |
1303 | ||
aa69a809 DL |
1304 | if (ep == NULL) |
1305 | return -EINVAL; | |
2dbc5c4c | 1306 | else if (hwep->ep.desc == NULL) |
aa69a809 DL |
1307 | return -EBUSY; |
1308 | ||
2dbc5c4c | 1309 | spin_lock_irqsave(hwep->lock, flags); |
aa69a809 DL |
1310 | |
1311 | /* only internal SW should disable ctrl endpts */ | |
1312 | ||
2dbc5c4c | 1313 | direction = hwep->dir; |
aa69a809 | 1314 | do { |
2dbc5c4c AS |
1315 | retval |= _ep_nuke(hwep); |
1316 | retval |= hw_ep_disable(hwep->ci, hwep->num, hwep->dir); | |
aa69a809 | 1317 | |
2dbc5c4c AS |
1318 | if (hwep->type == USB_ENDPOINT_XFER_CONTROL) |
1319 | hwep->dir = (hwep->dir == TX) ? RX : TX; | |
aa69a809 | 1320 | |
2dbc5c4c | 1321 | } while (hwep->dir != direction); |
aa69a809 | 1322 | |
2dbc5c4c | 1323 | hwep->ep.desc = NULL; |
aa69a809 | 1324 | |
2dbc5c4c | 1325 | spin_unlock_irqrestore(hwep->lock, flags); |
aa69a809 DL |
1326 | return retval; |
1327 | } | |
1328 | ||
1329 | /** | |
1330 | * ep_alloc_request: allocate a request object to use with this endpoint | |
1331 | * | |
1332 | * Check usb_ep_alloc_request() at "usb_gadget.h" for details | |
1333 | */ | |
1334 | static struct usb_request *ep_alloc_request(struct usb_ep *ep, gfp_t gfp_flags) | |
1335 | { | |
8e22978c | 1336 | struct ci_hw_req *hwreq = NULL; |
aa69a809 | 1337 | |
0f089094 | 1338 | if (ep == NULL) |
aa69a809 | 1339 | return NULL; |
aa69a809 | 1340 | |
8e22978c | 1341 | hwreq = kzalloc(sizeof(struct ci_hw_req), gfp_flags); |
2dbc5c4c AS |
1342 | if (hwreq != NULL) { |
1343 | INIT_LIST_HEAD(&hwreq->queue); | |
1344 | INIT_LIST_HEAD(&hwreq->tds); | |
aa69a809 DL |
1345 | } |
1346 | ||
2dbc5c4c | 1347 | return (hwreq == NULL) ? NULL : &hwreq->req; |
aa69a809 DL |
1348 | } |
1349 | ||
1350 | /** | |
1351 | * ep_free_request: frees a request object | |
1352 | * | |
1353 | * Check usb_ep_free_request() at "usb_gadget.h" for details | |
1354 | */ | |
1355 | static void ep_free_request(struct usb_ep *ep, struct usb_request *req) | |
1356 | { | |
8e22978c AS |
1357 | struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep); |
1358 | struct ci_hw_req *hwreq = container_of(req, struct ci_hw_req, req); | |
2e270412 | 1359 | struct td_node *node, *tmpnode; |
aa69a809 DL |
1360 | unsigned long flags; |
1361 | ||
aa69a809 | 1362 | if (ep == NULL || req == NULL) { |
aa69a809 | 1363 | return; |
2dbc5c4c AS |
1364 | } else if (!list_empty(&hwreq->queue)) { |
1365 | dev_err(hwep->ci->dev, "freeing queued request\n"); | |
aa69a809 DL |
1366 | return; |
1367 | } | |
1368 | ||
2dbc5c4c | 1369 | spin_lock_irqsave(hwep->lock, flags); |
aa69a809 | 1370 | |
2dbc5c4c AS |
1371 | list_for_each_entry_safe(node, tmpnode, &hwreq->tds, td) { |
1372 | dma_pool_free(hwep->td_pool, node->ptr, node->dma); | |
2e270412 MG |
1373 | list_del_init(&node->td); |
1374 | node->ptr = NULL; | |
1375 | kfree(node); | |
1376 | } | |
cc9e6c49 | 1377 | |
2dbc5c4c | 1378 | kfree(hwreq); |
aa69a809 | 1379 | |
2dbc5c4c | 1380 | spin_unlock_irqrestore(hwep->lock, flags); |
aa69a809 DL |
1381 | } |
1382 | ||
1383 | /** | |
1384 | * ep_queue: queues (submits) an I/O request to an endpoint | |
1385 | * | |
1386 | * Check usb_ep_queue()* at usb_gadget.h" for details | |
1387 | */ | |
1388 | static int ep_queue(struct usb_ep *ep, struct usb_request *req, | |
1389 | gfp_t __maybe_unused gfp_flags) | |
1390 | { | |
8e22978c | 1391 | struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep); |
aa69a809 DL |
1392 | int retval = 0; |
1393 | unsigned long flags; | |
1394 | ||
2dbc5c4c | 1395 | if (ep == NULL || req == NULL || hwep->ep.desc == NULL) |
aa69a809 DL |
1396 | return -EINVAL; |
1397 | ||
2dbc5c4c | 1398 | spin_lock_irqsave(hwep->lock, flags); |
dd064e9d | 1399 | retval = _ep_queue(ep, req, gfp_flags); |
2dbc5c4c | 1400 | spin_unlock_irqrestore(hwep->lock, flags); |
aa69a809 DL |
1401 | return retval; |
1402 | } | |
1403 | ||
1404 | /** | |
1405 | * ep_dequeue: dequeues (cancels, unlinks) an I/O request from an endpoint | |
1406 | * | |
1407 | * Check usb_ep_dequeue() at "usb_gadget.h" for details | |
1408 | */ | |
1409 | static int ep_dequeue(struct usb_ep *ep, struct usb_request *req) | |
1410 | { | |
8e22978c AS |
1411 | struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep); |
1412 | struct ci_hw_req *hwreq = container_of(req, struct ci_hw_req, req); | |
aa69a809 | 1413 | unsigned long flags; |
e4adcff0 | 1414 | struct td_node *node, *tmpnode; |
aa69a809 | 1415 | |
2dbc5c4c AS |
1416 | if (ep == NULL || req == NULL || hwreq->req.status != -EALREADY || |
1417 | hwep->ep.desc == NULL || list_empty(&hwreq->queue) || | |
1418 | list_empty(&hwep->qh.queue)) | |
aa69a809 DL |
1419 | return -EINVAL; |
1420 | ||
2dbc5c4c | 1421 | spin_lock_irqsave(hwep->lock, flags); |
aa69a809 | 1422 | |
2dbc5c4c | 1423 | hw_ep_flush(hwep->ci, hwep->num, hwep->dir); |
aa69a809 | 1424 | |
e4adcff0 PC |
1425 | list_for_each_entry_safe(node, tmpnode, &hwreq->tds, td) { |
1426 | dma_pool_free(hwep->td_pool, node->ptr, node->dma); | |
1427 | list_del(&node->td); | |
1428 | kfree(node); | |
1429 | } | |
1430 | ||
aa69a809 | 1431 | /* pop request */ |
2dbc5c4c | 1432 | list_del_init(&hwreq->queue); |
5e0aa49e | 1433 | |
2dbc5c4c | 1434 | usb_gadget_unmap_request(&hwep->ci->gadget, req, hwep->dir); |
5e0aa49e | 1435 | |
aa69a809 DL |
1436 | req->status = -ECONNRESET; |
1437 | ||
2dbc5c4c AS |
1438 | if (hwreq->req.complete != NULL) { |
1439 | spin_unlock(hwep->lock); | |
304f7e5e | 1440 | usb_gadget_giveback_request(&hwep->ep, &hwreq->req); |
2dbc5c4c | 1441 | spin_lock(hwep->lock); |
aa69a809 DL |
1442 | } |
1443 | ||
2dbc5c4c | 1444 | spin_unlock_irqrestore(hwep->lock, flags); |
aa69a809 DL |
1445 | return 0; |
1446 | } | |
1447 | ||
1448 | /** | |
1449 | * ep_set_halt: sets the endpoint halt feature | |
1450 | * | |
1451 | * Check usb_ep_set_halt() at "usb_gadget.h" for details | |
1452 | */ | |
1453 | static int ep_set_halt(struct usb_ep *ep, int value) | |
1454 | { | |
56ffa1d1 | 1455 | return _ep_set_halt(ep, value, true); |
aa69a809 DL |
1456 | } |
1457 | ||
1458 | /** | |
1459 | * ep_set_wedge: sets the halt feature and ignores clear requests | |
1460 | * | |
1461 | * Check usb_ep_set_wedge() at "usb_gadget.h" for details | |
1462 | */ | |
1463 | static int ep_set_wedge(struct usb_ep *ep) | |
1464 | { | |
8e22978c | 1465 | struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep); |
aa69a809 DL |
1466 | unsigned long flags; |
1467 | ||
2dbc5c4c | 1468 | if (ep == NULL || hwep->ep.desc == NULL) |
aa69a809 DL |
1469 | return -EINVAL; |
1470 | ||
2dbc5c4c AS |
1471 | spin_lock_irqsave(hwep->lock, flags); |
1472 | hwep->wedge = 1; | |
1473 | spin_unlock_irqrestore(hwep->lock, flags); | |
aa69a809 DL |
1474 | |
1475 | return usb_ep_set_halt(ep); | |
1476 | } | |
1477 | ||
1478 | /** | |
1479 | * ep_fifo_flush: flushes contents of a fifo | |
1480 | * | |
1481 | * Check usb_ep_fifo_flush() at "usb_gadget.h" for details | |
1482 | */ | |
1483 | static void ep_fifo_flush(struct usb_ep *ep) | |
1484 | { | |
8e22978c | 1485 | struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep); |
aa69a809 DL |
1486 | unsigned long flags; |
1487 | ||
aa69a809 | 1488 | if (ep == NULL) { |
2dbc5c4c | 1489 | dev_err(hwep->ci->dev, "%02X: -EINVAL\n", _usb_addr(hwep)); |
aa69a809 DL |
1490 | return; |
1491 | } | |
1492 | ||
2dbc5c4c | 1493 | spin_lock_irqsave(hwep->lock, flags); |
aa69a809 | 1494 | |
2dbc5c4c | 1495 | hw_ep_flush(hwep->ci, hwep->num, hwep->dir); |
aa69a809 | 1496 | |
2dbc5c4c | 1497 | spin_unlock_irqrestore(hwep->lock, flags); |
aa69a809 DL |
1498 | } |
1499 | ||
1500 | /** | |
1501 | * Endpoint-specific part of the API to the USB controller hardware | |
1502 | * Check "usb_gadget.h" for details | |
1503 | */ | |
1504 | static const struct usb_ep_ops usb_ep_ops = { | |
1505 | .enable = ep_enable, | |
1506 | .disable = ep_disable, | |
1507 | .alloc_request = ep_alloc_request, | |
1508 | .free_request = ep_free_request, | |
1509 | .queue = ep_queue, | |
1510 | .dequeue = ep_dequeue, | |
1511 | .set_halt = ep_set_halt, | |
1512 | .set_wedge = ep_set_wedge, | |
1513 | .fifo_flush = ep_fifo_flush, | |
1514 | }; | |
1515 | ||
1516 | /****************************************************************************** | |
1517 | * GADGET block | |
1518 | *****************************************************************************/ | |
8e22978c | 1519 | static int ci_udc_vbus_session(struct usb_gadget *_gadget, int is_active) |
f01ef574 | 1520 | { |
8e22978c | 1521 | struct ci_hdrc *ci = container_of(_gadget, struct ci_hdrc, gadget); |
f01ef574 PK |
1522 | unsigned long flags; |
1523 | int gadget_ready = 0; | |
1524 | ||
26c696c6 RZ |
1525 | spin_lock_irqsave(&ci->lock, flags); |
1526 | ci->vbus_active = is_active; | |
1527 | if (ci->driver) | |
f01ef574 | 1528 | gadget_ready = 1; |
26c696c6 | 1529 | spin_unlock_irqrestore(&ci->lock, flags); |
f01ef574 PK |
1530 | |
1531 | if (gadget_ready) { | |
1532 | if (is_active) { | |
c036019e | 1533 | pm_runtime_get_sync(&_gadget->dev); |
5b157300 | 1534 | hw_device_reset(ci); |
26c696c6 | 1535 | hw_device_state(ci, ci->ep0out->qh.dma); |
10775eb1 | 1536 | usb_gadget_set_state(_gadget, USB_STATE_POWERED); |
467a78c8 | 1537 | usb_udc_vbus_handler(_gadget, true); |
f01ef574 | 1538 | } else { |
467a78c8 | 1539 | usb_udc_vbus_handler(_gadget, false); |
92b336d7 PC |
1540 | if (ci->driver) |
1541 | ci->driver->disconnect(&ci->gadget); | |
26c696c6 RZ |
1542 | hw_device_state(ci, 0); |
1543 | if (ci->platdata->notify_event) | |
1544 | ci->platdata->notify_event(ci, | |
8e22978c | 1545 | CI_HDRC_CONTROLLER_STOPPED_EVENT); |
26c696c6 | 1546 | _gadget_stop_activity(&ci->gadget); |
c036019e | 1547 | pm_runtime_put_sync(&_gadget->dev); |
10775eb1 | 1548 | usb_gadget_set_state(_gadget, USB_STATE_NOTATTACHED); |
f01ef574 PK |
1549 | } |
1550 | } | |
1551 | ||
1552 | return 0; | |
1553 | } | |
1554 | ||
8e22978c | 1555 | static int ci_udc_wakeup(struct usb_gadget *_gadget) |
e2b61c1d | 1556 | { |
8e22978c | 1557 | struct ci_hdrc *ci = container_of(_gadget, struct ci_hdrc, gadget); |
e2b61c1d PK |
1558 | unsigned long flags; |
1559 | int ret = 0; | |
1560 | ||
26c696c6 RZ |
1561 | spin_lock_irqsave(&ci->lock, flags); |
1562 | if (!ci->remote_wakeup) { | |
e2b61c1d | 1563 | ret = -EOPNOTSUPP; |
e2b61c1d PK |
1564 | goto out; |
1565 | } | |
26c696c6 | 1566 | if (!hw_read(ci, OP_PORTSC, PORTSC_SUSP)) { |
e2b61c1d | 1567 | ret = -EINVAL; |
e2b61c1d PK |
1568 | goto out; |
1569 | } | |
26c696c6 | 1570 | hw_write(ci, OP_PORTSC, PORTSC_FPR, PORTSC_FPR); |
e2b61c1d | 1571 | out: |
26c696c6 | 1572 | spin_unlock_irqrestore(&ci->lock, flags); |
e2b61c1d PK |
1573 | return ret; |
1574 | } | |
1575 | ||
8e22978c | 1576 | static int ci_udc_vbus_draw(struct usb_gadget *_gadget, unsigned ma) |
d860852e | 1577 | { |
8e22978c | 1578 | struct ci_hdrc *ci = container_of(_gadget, struct ci_hdrc, gadget); |
d860852e | 1579 | |
ef44cb42 AT |
1580 | if (ci->usb_phy) |
1581 | return usb_phy_set_power(ci->usb_phy, ma); | |
d860852e PK |
1582 | return -ENOTSUPP; |
1583 | } | |
1584 | ||
1009f9a3 PC |
1585 | static int ci_udc_selfpowered(struct usb_gadget *_gadget, int is_on) |
1586 | { | |
1587 | struct ci_hdrc *ci = container_of(_gadget, struct ci_hdrc, gadget); | |
1588 | struct ci_hw_ep *hwep = ci->ep0in; | |
1589 | unsigned long flags; | |
1590 | ||
1591 | spin_lock_irqsave(hwep->lock, flags); | |
1592 | _gadget->is_selfpowered = (is_on != 0); | |
1593 | spin_unlock_irqrestore(hwep->lock, flags); | |
1594 | ||
1595 | return 0; | |
1596 | } | |
1597 | ||
c0a48e6c MG |
1598 | /* Change Data+ pullup status |
1599 | * this func is used by usb_gadget_connect/disconnet | |
1600 | */ | |
8e22978c | 1601 | static int ci_udc_pullup(struct usb_gadget *_gadget, int is_on) |
c0a48e6c | 1602 | { |
8e22978c | 1603 | struct ci_hdrc *ci = container_of(_gadget, struct ci_hdrc, gadget); |
c0a48e6c | 1604 | |
c4e94174 LJ |
1605 | /* |
1606 | * Data+ pullup controlled by OTG state machine in OTG fsm mode; | |
1607 | * and don't touch Data+ in host mode for dual role config. | |
1608 | */ | |
1609 | if (ci_otg_is_fsm_mode(ci) || ci->role == CI_ROLE_HOST) | |
9b6567e1 LJ |
1610 | return 0; |
1611 | ||
467a78c8 | 1612 | pm_runtime_get_sync(&ci->gadget.dev); |
c0a48e6c MG |
1613 | if (is_on) |
1614 | hw_write(ci, OP_USBCMD, USBCMD_RS, USBCMD_RS); | |
1615 | else | |
1616 | hw_write(ci, OP_USBCMD, USBCMD_RS, 0); | |
467a78c8 | 1617 | pm_runtime_put_sync(&ci->gadget.dev); |
c0a48e6c MG |
1618 | |
1619 | return 0; | |
1620 | } | |
1621 | ||
8e22978c | 1622 | static int ci_udc_start(struct usb_gadget *gadget, |
1f339d84 | 1623 | struct usb_gadget_driver *driver); |
22835b80 | 1624 | static int ci_udc_stop(struct usb_gadget *gadget); |
aa69a809 DL |
1625 | /** |
1626 | * Device operations part of the API to the USB controller hardware, | |
1627 | * which don't involve endpoints (or i/o) | |
1628 | * Check "usb_gadget.h" for details | |
1629 | */ | |
f01ef574 | 1630 | static const struct usb_gadget_ops usb_gadget_ops = { |
8e22978c AS |
1631 | .vbus_session = ci_udc_vbus_session, |
1632 | .wakeup = ci_udc_wakeup, | |
1009f9a3 | 1633 | .set_selfpowered = ci_udc_selfpowered, |
8e22978c AS |
1634 | .pullup = ci_udc_pullup, |
1635 | .vbus_draw = ci_udc_vbus_draw, | |
1636 | .udc_start = ci_udc_start, | |
1637 | .udc_stop = ci_udc_stop, | |
f01ef574 | 1638 | }; |
aa69a809 | 1639 | |
8e22978c | 1640 | static int init_eps(struct ci_hdrc *ci) |
aa69a809 | 1641 | { |
790c2d52 | 1642 | int retval = 0, i, j; |
aa69a809 | 1643 | |
26c696c6 | 1644 | for (i = 0; i < ci->hw_ep_max/2; i++) |
ca9cfea0 | 1645 | for (j = RX; j <= TX; j++) { |
26c696c6 | 1646 | int k = i + j * ci->hw_ep_max/2; |
8e22978c | 1647 | struct ci_hw_ep *hwep = &ci->ci_hw_ep[k]; |
aa69a809 | 1648 | |
2dbc5c4c | 1649 | scnprintf(hwep->name, sizeof(hwep->name), "ep%i%s", i, |
ca9cfea0 | 1650 | (j == TX) ? "in" : "out"); |
aa69a809 | 1651 | |
2dbc5c4c AS |
1652 | hwep->ci = ci; |
1653 | hwep->lock = &ci->lock; | |
1654 | hwep->td_pool = ci->td_pool; | |
aa69a809 | 1655 | |
2dbc5c4c AS |
1656 | hwep->ep.name = hwep->name; |
1657 | hwep->ep.ops = &usb_ep_ops; | |
a7e3f141 RB |
1658 | |
1659 | if (i == 0) { | |
1660 | hwep->ep.caps.type_control = true; | |
1661 | } else { | |
1662 | hwep->ep.caps.type_iso = true; | |
1663 | hwep->ep.caps.type_bulk = true; | |
1664 | hwep->ep.caps.type_int = true; | |
1665 | } | |
1666 | ||
1667 | if (j == TX) | |
1668 | hwep->ep.caps.dir_in = true; | |
1669 | else | |
1670 | hwep->ep.caps.dir_out = true; | |
1671 | ||
7f67c38b MG |
1672 | /* |
1673 | * for ep0: maxP defined in desc, for other | |
1674 | * eps, maxP is set by epautoconfig() called | |
1675 | * by gadget layer | |
1676 | */ | |
e117e742 | 1677 | usb_ep_set_maxpacket_limit(&hwep->ep, (unsigned short)~0); |
aa69a809 | 1678 | |
2dbc5c4c AS |
1679 | INIT_LIST_HEAD(&hwep->qh.queue); |
1680 | hwep->qh.ptr = dma_pool_alloc(ci->qh_pool, GFP_KERNEL, | |
1681 | &hwep->qh.dma); | |
1682 | if (hwep->qh.ptr == NULL) | |
aa69a809 DL |
1683 | retval = -ENOMEM; |
1684 | else | |
2dbc5c4c | 1685 | memset(hwep->qh.ptr, 0, sizeof(*hwep->qh.ptr)); |
ca9cfea0 | 1686 | |
d36ade60 AS |
1687 | /* |
1688 | * set up shorthands for ep0 out and in endpoints, | |
1689 | * don't add to gadget's ep_list | |
1690 | */ | |
1691 | if (i == 0) { | |
1692 | if (j == RX) | |
2dbc5c4c | 1693 | ci->ep0out = hwep; |
d36ade60 | 1694 | else |
2dbc5c4c | 1695 | ci->ep0in = hwep; |
d36ade60 | 1696 | |
e117e742 | 1697 | usb_ep_set_maxpacket_limit(&hwep->ep, CTRL_PAYLOAD_MAX); |
ca9cfea0 | 1698 | continue; |
d36ade60 | 1699 | } |
ca9cfea0 | 1700 | |
2dbc5c4c | 1701 | list_add_tail(&hwep->ep.ep_list, &ci->gadget.ep_list); |
ca9cfea0 | 1702 | } |
790c2d52 AS |
1703 | |
1704 | return retval; | |
1705 | } | |
1706 | ||
8e22978c | 1707 | static void destroy_eps(struct ci_hdrc *ci) |
ad6b1b97 MKB |
1708 | { |
1709 | int i; | |
1710 | ||
1711 | for (i = 0; i < ci->hw_ep_max; i++) { | |
8e22978c | 1712 | struct ci_hw_ep *hwep = &ci->ci_hw_ep[i]; |
ad6b1b97 | 1713 | |
4a29567b PC |
1714 | if (hwep->pending_td) |
1715 | free_pending_td(hwep); | |
2dbc5c4c | 1716 | dma_pool_free(ci->qh_pool, hwep->qh.ptr, hwep->qh.dma); |
ad6b1b97 MKB |
1717 | } |
1718 | } | |
1719 | ||
790c2d52 | 1720 | /** |
8e22978c | 1721 | * ci_udc_start: register a gadget driver |
1f339d84 | 1722 | * @gadget: our gadget |
790c2d52 | 1723 | * @driver: the driver being registered |
790c2d52 | 1724 | * |
790c2d52 AS |
1725 | * Interrupts are enabled here. |
1726 | */ | |
8e22978c | 1727 | static int ci_udc_start(struct usb_gadget *gadget, |
1f339d84 | 1728 | struct usb_gadget_driver *driver) |
790c2d52 | 1729 | { |
8e22978c | 1730 | struct ci_hdrc *ci = container_of(gadget, struct ci_hdrc, gadget); |
790c2d52 | 1731 | unsigned long flags; |
790c2d52 AS |
1732 | int retval = -ENOMEM; |
1733 | ||
1f339d84 | 1734 | if (driver->disconnect == NULL) |
790c2d52 | 1735 | return -EINVAL; |
790c2d52 | 1736 | |
790c2d52 | 1737 | |
26c696c6 RZ |
1738 | ci->ep0out->ep.desc = &ctrl_endpt_out_desc; |
1739 | retval = usb_ep_enable(&ci->ep0out->ep); | |
ac1aa6a2 A |
1740 | if (retval) |
1741 | return retval; | |
877c1f54 | 1742 | |
26c696c6 RZ |
1743 | ci->ep0in->ep.desc = &ctrl_endpt_in_desc; |
1744 | retval = usb_ep_enable(&ci->ep0in->ep); | |
ac1aa6a2 A |
1745 | if (retval) |
1746 | return retval; | |
26c696c6 RZ |
1747 | |
1748 | ci->driver = driver; | |
4dcf720c LJ |
1749 | |
1750 | /* Start otg fsm for B-device */ | |
1751 | if (ci_otg_is_fsm_mode(ci) && ci->fsm.id) { | |
1752 | ci_hdrc_otg_fsm_start(ci); | |
1753 | return retval; | |
1754 | } | |
1755 | ||
26c696c6 | 1756 | pm_runtime_get_sync(&ci->gadget.dev); |
d268e9bc | 1757 | if (ci->vbus_active) { |
65b2fb32 | 1758 | spin_lock_irqsave(&ci->lock, flags); |
5b157300 | 1759 | hw_device_reset(ci); |
d268e9bc | 1760 | } else { |
467a78c8 | 1761 | usb_udc_vbus_handler(&ci->gadget, false); |
d268e9bc | 1762 | pm_runtime_put_sync(&ci->gadget.dev); |
65b2fb32 | 1763 | return retval; |
f01ef574 PK |
1764 | } |
1765 | ||
26c696c6 | 1766 | retval = hw_device_state(ci, ci->ep0out->qh.dma); |
65b2fb32 | 1767 | spin_unlock_irqrestore(&ci->lock, flags); |
c036019e | 1768 | if (retval) |
26c696c6 | 1769 | pm_runtime_put_sync(&ci->gadget.dev); |
aa69a809 | 1770 | |
aa69a809 DL |
1771 | return retval; |
1772 | } | |
aa69a809 | 1773 | |
85da852d LJ |
1774 | static void ci_udc_stop_for_otg_fsm(struct ci_hdrc *ci) |
1775 | { | |
1776 | if (!ci_otg_is_fsm_mode(ci)) | |
1777 | return; | |
1778 | ||
1779 | mutex_lock(&ci->fsm.lock); | |
1780 | if (ci->fsm.otg->state == OTG_STATE_A_PERIPHERAL) { | |
1781 | ci->fsm.a_bidl_adis_tmout = 1; | |
1782 | ci_hdrc_otg_fsm_start(ci); | |
1783 | } else if (ci->fsm.otg->state == OTG_STATE_B_PERIPHERAL) { | |
1784 | ci->fsm.protocol = PROTO_UNDEF; | |
1785 | ci->fsm.otg->state = OTG_STATE_UNDEFINED; | |
1786 | } | |
1787 | mutex_unlock(&ci->fsm.lock); | |
1788 | } | |
1789 | ||
aa69a809 | 1790 | /** |
8e22978c | 1791 | * ci_udc_stop: unregister a gadget driver |
aa69a809 | 1792 | */ |
22835b80 | 1793 | static int ci_udc_stop(struct usb_gadget *gadget) |
aa69a809 | 1794 | { |
8e22978c | 1795 | struct ci_hdrc *ci = container_of(gadget, struct ci_hdrc, gadget); |
1f339d84 | 1796 | unsigned long flags; |
aa69a809 | 1797 | |
26c696c6 | 1798 | spin_lock_irqsave(&ci->lock, flags); |
aa69a809 | 1799 | |
d268e9bc | 1800 | if (ci->vbus_active) { |
26c696c6 RZ |
1801 | hw_device_state(ci, 0); |
1802 | if (ci->platdata->notify_event) | |
1803 | ci->platdata->notify_event(ci, | |
8e22978c | 1804 | CI_HDRC_CONTROLLER_STOPPED_EVENT); |
26c696c6 RZ |
1805 | spin_unlock_irqrestore(&ci->lock, flags); |
1806 | _gadget_stop_activity(&ci->gadget); | |
1807 | spin_lock_irqsave(&ci->lock, flags); | |
1808 | pm_runtime_put(&ci->gadget.dev); | |
f01ef574 | 1809 | } |
aa69a809 | 1810 | |
f84839da | 1811 | ci->driver = NULL; |
26c696c6 | 1812 | spin_unlock_irqrestore(&ci->lock, flags); |
aa69a809 | 1813 | |
85da852d | 1814 | ci_udc_stop_for_otg_fsm(ci); |
aa69a809 DL |
1815 | return 0; |
1816 | } | |
aa69a809 DL |
1817 | |
1818 | /****************************************************************************** | |
1819 | * BUS block | |
1820 | *****************************************************************************/ | |
1821 | /** | |
26c696c6 | 1822 | * udc_irq: ci interrupt handler |
aa69a809 DL |
1823 | * |
1824 | * This function returns IRQ_HANDLED if the IRQ has been handled | |
1825 | * It locks access to registers | |
1826 | */ | |
8e22978c | 1827 | static irqreturn_t udc_irq(struct ci_hdrc *ci) |
aa69a809 | 1828 | { |
aa69a809 DL |
1829 | irqreturn_t retval; |
1830 | u32 intr; | |
1831 | ||
26c696c6 | 1832 | if (ci == NULL) |
aa69a809 | 1833 | return IRQ_HANDLED; |
aa69a809 | 1834 | |
26c696c6 | 1835 | spin_lock(&ci->lock); |
f01ef574 | 1836 | |
8e22978c | 1837 | if (ci->platdata->flags & CI_HDRC_REGS_SHARED) { |
26c696c6 | 1838 | if (hw_read(ci, OP_USBMODE, USBMODE_CM) != |
758fc986 | 1839 | USBMODE_CM_DC) { |
26c696c6 | 1840 | spin_unlock(&ci->lock); |
f01ef574 PK |
1841 | return IRQ_NONE; |
1842 | } | |
1843 | } | |
26c696c6 | 1844 | intr = hw_test_and_clear_intr_active(ci); |
aa69a809 | 1845 | |
e443b333 | 1846 | if (intr) { |
aa69a809 | 1847 | /* order defines priority - do NOT change it */ |
e443b333 | 1848 | if (USBi_URI & intr) |
26c696c6 | 1849 | isr_reset_handler(ci); |
e443b333 | 1850 | |
aa69a809 | 1851 | if (USBi_PCI & intr) { |
26c696c6 | 1852 | ci->gadget.speed = hw_port_is_high_speed(ci) ? |
aa69a809 | 1853 | USB_SPEED_HIGH : USB_SPEED_FULL; |
26c696c6 RZ |
1854 | if (ci->suspended && ci->driver->resume) { |
1855 | spin_unlock(&ci->lock); | |
1856 | ci->driver->resume(&ci->gadget); | |
1857 | spin_lock(&ci->lock); | |
1858 | ci->suspended = 0; | |
e2b61c1d | 1859 | } |
aa69a809 | 1860 | } |
e443b333 AS |
1861 | |
1862 | if (USBi_UI & intr) | |
26c696c6 | 1863 | isr_tr_complete_handler(ci); |
e443b333 | 1864 | |
e2b61c1d | 1865 | if (USBi_SLI & intr) { |
26c696c6 RZ |
1866 | if (ci->gadget.speed != USB_SPEED_UNKNOWN && |
1867 | ci->driver->suspend) { | |
1868 | ci->suspended = 1; | |
1869 | spin_unlock(&ci->lock); | |
1870 | ci->driver->suspend(&ci->gadget); | |
10775eb1 PC |
1871 | usb_gadget_set_state(&ci->gadget, |
1872 | USB_STATE_SUSPENDED); | |
26c696c6 | 1873 | spin_lock(&ci->lock); |
e2b61c1d | 1874 | } |
e2b61c1d | 1875 | } |
aa69a809 DL |
1876 | retval = IRQ_HANDLED; |
1877 | } else { | |
aa69a809 DL |
1878 | retval = IRQ_NONE; |
1879 | } | |
26c696c6 | 1880 | spin_unlock(&ci->lock); |
aa69a809 DL |
1881 | |
1882 | return retval; | |
1883 | } | |
1884 | ||
aa69a809 | 1885 | /** |
5f36e231 | 1886 | * udc_start: initialize gadget role |
26c696c6 | 1887 | * @ci: chipidea controller |
aa69a809 | 1888 | */ |
8e22978c | 1889 | static int udc_start(struct ci_hdrc *ci) |
aa69a809 | 1890 | { |
26c696c6 | 1891 | struct device *dev = ci->dev; |
79742351 | 1892 | struct usb_otg_caps *otg_caps = &ci->platdata->ci_otg_caps; |
aa69a809 DL |
1893 | int retval = 0; |
1894 | ||
26c696c6 | 1895 | spin_lock_init(&ci->lock); |
aa69a809 | 1896 | |
26c696c6 RZ |
1897 | ci->gadget.ops = &usb_gadget_ops; |
1898 | ci->gadget.speed = USB_SPEED_UNKNOWN; | |
1899 | ci->gadget.max_speed = USB_SPEED_HIGH; | |
26c696c6 | 1900 | ci->gadget.name = ci->platdata->name; |
79742351 LJ |
1901 | ci->gadget.otg_caps = otg_caps; |
1902 | ||
3f217e9e LJ |
1903 | if (ci->is_otg && (otg_caps->hnp_support || otg_caps->srp_support || |
1904 | otg_caps->adp_support)) | |
79742351 | 1905 | ci->gadget.is_otg = 1; |
aa69a809 | 1906 | |
26c696c6 | 1907 | INIT_LIST_HEAD(&ci->gadget.ep_list); |
aa69a809 | 1908 | |
790c2d52 | 1909 | /* alloc resources */ |
8e22978c AS |
1910 | ci->qh_pool = dma_pool_create("ci_hw_qh", dev, |
1911 | sizeof(struct ci_hw_qh), | |
1912 | 64, CI_HDRC_PAGE_SIZE); | |
26c696c6 | 1913 | if (ci->qh_pool == NULL) |
5f36e231 | 1914 | return -ENOMEM; |
790c2d52 | 1915 | |
8e22978c AS |
1916 | ci->td_pool = dma_pool_create("ci_hw_td", dev, |
1917 | sizeof(struct ci_hw_td), | |
1918 | 64, CI_HDRC_PAGE_SIZE); | |
26c696c6 | 1919 | if (ci->td_pool == NULL) { |
790c2d52 AS |
1920 | retval = -ENOMEM; |
1921 | goto free_qh_pool; | |
1922 | } | |
1923 | ||
26c696c6 | 1924 | retval = init_eps(ci); |
790c2d52 AS |
1925 | if (retval) |
1926 | goto free_pools; | |
1927 | ||
26c696c6 | 1928 | ci->gadget.ep0 = &ci->ep0in->ep; |
f01ef574 | 1929 | |
26c696c6 | 1930 | retval = usb_add_gadget_udc(dev, &ci->gadget); |
0f91349b | 1931 | if (retval) |
74475ede | 1932 | goto destroy_eps; |
0f91349b | 1933 | |
26c696c6 RZ |
1934 | pm_runtime_no_callbacks(&ci->gadget.dev); |
1935 | pm_runtime_enable(&ci->gadget.dev); | |
aa69a809 | 1936 | |
aa69a809 DL |
1937 | return retval; |
1938 | ||
ad6b1b97 MKB |
1939 | destroy_eps: |
1940 | destroy_eps(ci); | |
790c2d52 | 1941 | free_pools: |
26c696c6 | 1942 | dma_pool_destroy(ci->td_pool); |
790c2d52 | 1943 | free_qh_pool: |
26c696c6 | 1944 | dma_pool_destroy(ci->qh_pool); |
aa69a809 DL |
1945 | return retval; |
1946 | } | |
1947 | ||
1948 | /** | |
3f124d23 | 1949 | * ci_hdrc_gadget_destroy: parent remove must call this to remove UDC |
aa69a809 DL |
1950 | * |
1951 | * No interrupts active, the IRQ has been released | |
1952 | */ | |
3f124d23 | 1953 | void ci_hdrc_gadget_destroy(struct ci_hdrc *ci) |
aa69a809 | 1954 | { |
3f124d23 | 1955 | if (!ci->roles[CI_ROLE_GADGET]) |
aa69a809 | 1956 | return; |
0f089094 | 1957 | |
26c696c6 | 1958 | usb_del_gadget_udc(&ci->gadget); |
aa69a809 | 1959 | |
ad6b1b97 | 1960 | destroy_eps(ci); |
790c2d52 | 1961 | |
26c696c6 RZ |
1962 | dma_pool_destroy(ci->td_pool); |
1963 | dma_pool_destroy(ci->qh_pool); | |
3f124d23 PC |
1964 | } |
1965 | ||
1966 | static int udc_id_switch_for_device(struct ci_hdrc *ci) | |
1967 | { | |
0c33bf78 LJ |
1968 | if (ci->is_otg) |
1969 | /* Clear and enable BSV irq */ | |
1970 | hw_write_otgsc(ci, OTGSC_BSVIS | OTGSC_BSVIE, | |
1971 | OTGSC_BSVIS | OTGSC_BSVIE); | |
3f124d23 PC |
1972 | |
1973 | return 0; | |
1974 | } | |
1975 | ||
1976 | static void udc_id_switch_for_host(struct ci_hdrc *ci) | |
1977 | { | |
0c33bf78 LJ |
1978 | /* |
1979 | * host doesn't care B_SESSION_VALID event | |
1980 | * so clear and disbale BSV irq | |
1981 | */ | |
1982 | if (ci->is_otg) | |
1983 | hw_write_otgsc(ci, OTGSC_BSVIE | OTGSC_BSVIS, OTGSC_BSVIS); | |
5f36e231 AS |
1984 | } |
1985 | ||
1986 | /** | |
1987 | * ci_hdrc_gadget_init - initialize device related bits | |
1988 | * ci: the controller | |
1989 | * | |
3f124d23 | 1990 | * This function initializes the gadget, if the device is "device capable". |
5f36e231 | 1991 | */ |
8e22978c | 1992 | int ci_hdrc_gadget_init(struct ci_hdrc *ci) |
5f36e231 AS |
1993 | { |
1994 | struct ci_role_driver *rdrv; | |
1995 | ||
1996 | if (!hw_read(ci, CAP_DCCPARAMS, DCCPARAMS_DC)) | |
1997 | return -ENXIO; | |
1998 | ||
1999 | rdrv = devm_kzalloc(ci->dev, sizeof(struct ci_role_driver), GFP_KERNEL); | |
2000 | if (!rdrv) | |
2001 | return -ENOMEM; | |
2002 | ||
3f124d23 PC |
2003 | rdrv->start = udc_id_switch_for_device; |
2004 | rdrv->stop = udc_id_switch_for_host; | |
5f36e231 AS |
2005 | rdrv->irq = udc_irq; |
2006 | rdrv->name = "gadget"; | |
2007 | ci->roles[CI_ROLE_GADGET] = rdrv; | |
aa69a809 | 2008 | |
3f124d23 | 2009 | return udc_start(ci); |
aa69a809 | 2010 | } |