[deliverable/linux.git] / drivers / usb / dwc2 / platform.c

/*
 * platform.c - DesignWare HS OTG Controller platform driver
 *
 * Copyright (C) Matthijs Kooijman <matthijs@stdin.nl>
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * 1. Redistributions of source code must retain the above copyright
 *    notice, this list of conditions, and the following disclaimer,
 *    without modification.
 * 2. Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the distribution.
 * 3. The names of the above-listed copyright holders may not be used
 *    to endorse or promote products derived from this software without
 *    specific prior written permission.
 *
 * ALTERNATIVELY, this software may be distributed under the terms of the
 * GNU General Public License ("GPL") as published by the Free Software
 * Foundation; either version 2 of the License, or (at your option) any
 * later version.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS
 * IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
 * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
 * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
 * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
 * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
 * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
 * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 */

#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/slab.h>
#include <linux/clk.h>
#include <linux/device.h>
#include <linux/dma-mapping.h>
#include <linux/of_device.h>
#include <linux/mutex.h>
#include <linux/platform_device.h>
#include <linux/phy/phy.h>
#include <linux/platform_data/s3c-hsotg.h>

#include <linux/usb/of.h>

#include "core.h"
#include "hcd.h"
#include "debug.h"

static const char dwc2_driver_name[] = "dwc2";

static const struct dwc2_core_params params_bcm2835 = {
	.otg_cap			= 0,	/* HNP/SRP capable */
	.otg_ver			= 0,	/* 1.3 */
	.dma_enable			= 1,
	.dma_desc_enable		= 0,
	.dma_desc_fs_enable		= 0,
	.speed				= 0,	/* High Speed */
	.enable_dynamic_fifo		= 1,
	.en_multiple_tx_fifo		= 1,
	.host_rx_fifo_size		= 774,	/* 774 DWORDs */
	.host_nperio_tx_fifo_size	= 256,	/* 256 DWORDs */
	.host_perio_tx_fifo_size	= 512,	/* 512 DWORDs */
	.max_transfer_size		= 65535,
	.max_packet_count		= 511,
	.host_channels			= 8,
	.phy_type			= 1,	/* UTMI */
	.phy_utmi_width			= 8,	/* 8 bits */
	.phy_ulpi_ddr			= 0,	/* Single */
	.phy_ulpi_ext_vbus		= 0,
	.i2c_enable			= 0,
	.ulpi_fs_ls			= 0,
	.host_support_fs_ls_low_power	= 0,
	.host_ls_low_power_phy_clk	= 0,	/* 48 MHz */
	.ts_dline			= 0,
	.reload_ctl			= 0,
	.ahbcfg				= 0x10,
	.uframe_sched			= 0,
	.external_id_pin_ctl		= -1,
	.hibernation			= -1,
};

static const struct dwc2_core_params params_rk3066 = {
	.otg_cap			= 2,	/* non-HNP/non-SRP */
	.otg_ver			= -1,
	.dma_enable			= -1,
	.dma_desc_enable		= 0,
	.dma_desc_fs_enable		= 0,
	.speed				= -1,
	.enable_dynamic_fifo		= 1,
	.en_multiple_tx_fifo		= -1,
	.host_rx_fifo_size		= 520,	/* 520 DWORDs */
	.host_nperio_tx_fifo_size	= 128,	/* 128 DWORDs */
	.host_perio_tx_fifo_size	= 256,	/* 256 DWORDs */
	.max_transfer_size		= 65535,
	.max_packet_count		= -1,
	.host_channels			= -1,
	.phy_type			= -1,
	.phy_utmi_width			= -1,
	.phy_ulpi_ddr			= -1,
	.phy_ulpi_ext_vbus		= -1,
	.i2c_enable			= -1,
	.ulpi_fs_ls			= -1,
	.host_support_fs_ls_low_power	= -1,
	.host_ls_low_power_phy_clk	= -1,
	.ts_dline			= -1,
	.reload_ctl			= -1,
	.ahbcfg				= GAHBCFG_HBSTLEN_INCR16 <<
					  GAHBCFG_HBSTLEN_SHIFT,
	.uframe_sched			= -1,
	.external_id_pin_ctl		= -1,
	.hibernation			= -1,
};

static int __dwc2_lowlevel_hw_enable(struct dwc2_hsotg *hsotg)
{
	struct platform_device *pdev = to_platform_device(hsotg->dev);
	int ret;

	ret = regulator_bulk_enable(ARRAY_SIZE(hsotg->supplies),
				    hsotg->supplies);
	if (ret)
		return ret;

	if (hsotg->clk) {
		ret = clk_prepare_enable(hsotg->clk);
		if (ret)
			return ret;
	}

	if (hsotg->uphy)
		ret = usb_phy_init(hsotg->uphy);
	else if (hsotg->plat && hsotg->plat->phy_init)
		ret = hsotg->plat->phy_init(pdev, hsotg->plat->phy_type);
	else {
		ret = phy_power_on(hsotg->phy);
		if (ret == 0)
			ret = phy_init(hsotg->phy);
	}

	return ret;
}

/**
 * dwc2_lowlevel_hw_enable - enable platform lowlevel hw resources
 * @hsotg: The driver state
 *
 * A wrapper for platform code responsible for controlling
 * low-level USB platform resources (phy, clock, regulators)
 */
int dwc2_lowlevel_hw_enable(struct dwc2_hsotg *hsotg)
{
	int ret = __dwc2_lowlevel_hw_enable(hsotg);

	if (ret == 0)
		hsotg->ll_hw_enabled = true;
	return ret;
}

static int __dwc2_lowlevel_hw_disable(struct dwc2_hsotg *hsotg)
{
	struct platform_device *pdev = to_platform_device(hsotg->dev);
	int ret = 0;

	if (hsotg->uphy)
		usb_phy_shutdown(hsotg->uphy);
	else if (hsotg->plat && hsotg->plat->phy_exit)
		ret = hsotg->plat->phy_exit(pdev, hsotg->plat->phy_type);
	else {
		ret = phy_exit(hsotg->phy);
		if (ret == 0)
			ret = phy_power_off(hsotg->phy);
	}
	if (ret)
		return ret;

	if (hsotg->clk)
		clk_disable_unprepare(hsotg->clk);

	ret = regulator_bulk_disable(ARRAY_SIZE(hsotg->supplies),
				     hsotg->supplies);

	return ret;
}

/**
 * dwc2_lowlevel_hw_disable - disable platform lowlevel hw resources
 * @hsotg: The driver state
 *
 * A wrapper for platform code responsible for controlling
 * low-level USB platform resources (phy, clock, regulators)
 */
int dwc2_lowlevel_hw_disable(struct dwc2_hsotg *hsotg)
{
	int ret = __dwc2_lowlevel_hw_disable(hsotg);

	if (ret == 0)
		hsotg->ll_hw_enabled = false;
	return ret;
}

static int dwc2_lowlevel_hw_init(struct dwc2_hsotg *hsotg)
{
	int i, ret;

	/* Set default UTMI width */
	hsotg->phyif = GUSBCFG_PHYIF16;

	/*
	 * Attempt to find a generic PHY, then look for an old style
	 * USB PHY and then fall back to pdata
	 */
	hsotg->phy = devm_phy_get(hsotg->dev, "usb2-phy");
	if (IS_ERR(hsotg->phy)) {
		ret = PTR_ERR(hsotg->phy);
		switch (ret) {
		case -ENODEV:
		case -ENOSYS:
			hsotg->phy = NULL;
			break;
		case -EPROBE_DEFER:
			return ret;
		default:
			dev_err(hsotg->dev, "error getting phy %d\n", ret);
			return ret;
		}
	}

	if (!hsotg->phy) {
		hsotg->uphy = devm_usb_get_phy(hsotg->dev, USB_PHY_TYPE_USB2);
		if (IS_ERR(hsotg->uphy)) {
			ret = PTR_ERR(hsotg->uphy);
			switch (ret) {
			case -ENODEV:
			case -ENXIO:
				hsotg->uphy = NULL;
				break;
			case -EPROBE_DEFER:
				return ret;
			default:
				dev_err(hsotg->dev, "error getting usb phy %d\n",
					ret);
				return ret;
			}
		}
	}

	hsotg->plat = dev_get_platdata(hsotg->dev);

	if (hsotg->phy) {
		/*
		 * If using the generic PHY framework, check if the PHY bus
		 * width is 8-bit and set the phyif appropriately.
		 */
		if (phy_get_bus_width(hsotg->phy) == 8)
			hsotg->phyif = GUSBCFG_PHYIF8;
	}

	/* Clock */
	hsotg->clk = devm_clk_get(hsotg->dev, "otg");
	if (IS_ERR(hsotg->clk)) {
		hsotg->clk = NULL;
		dev_dbg(hsotg->dev, "cannot get otg clock\n");
	}

	/* Regulators */
	for (i = 0; i < ARRAY_SIZE(hsotg->supplies); i++)
		hsotg->supplies[i].supply = dwc2_hsotg_supply_names[i];

	ret = devm_regulator_bulk_get(hsotg->dev, ARRAY_SIZE(hsotg->supplies),
				      hsotg->supplies);
	if (ret) {
		dev_err(hsotg->dev, "failed to request supplies: %d\n", ret);
		return ret;
	}
	return 0;
}

/**
 * dwc2_driver_remove() - Called when the DWC_otg core is unregistered with the
 * DWC_otg driver
 *
 * @dev: Platform device
 *
 * This routine is called, for example, when the rmmod command is executed. The
 * device may or may not be electrically present. If it is present, the driver
 * stops device processing. Any resources used on behalf of this device are
 * freed.
 */
static int dwc2_driver_remove(struct platform_device *dev)
{
	struct dwc2_hsotg *hsotg = platform_get_drvdata(dev);

	dwc2_debugfs_exit(hsotg);
	if (hsotg->hcd_enabled)
		dwc2_hcd_remove(hsotg);
	if (hsotg->gadget_enabled)
		dwc2_hsotg_remove(hsotg);

	if (hsotg->ll_hw_enabled)
		dwc2_lowlevel_hw_disable(hsotg);

	return 0;
}

static const struct of_device_id dwc2_of_match_table[] = {
	{ .compatible = "brcm,bcm2835-usb", .data = &params_bcm2835 },
	{ .compatible = "rockchip,rk3066-usb", .data = &params_rk3066 },
	{ .compatible = "snps,dwc2", .data = NULL },
	{ .compatible = "samsung,s3c6400-hsotg", .data = NULL},
	{},
};
MODULE_DEVICE_TABLE(of, dwc2_of_match_table);

/**
 * dwc2_driver_probe() - Called when the DWC_otg core is bound to the DWC_otg
 * driver
 *
 * @dev: Platform device
 *
 * This routine creates the driver components required to control the device
 * (core, HCD, and PCD) and initializes the device. The driver components are
 * stored in a dwc2_hsotg structure. A reference to the dwc2_hsotg is saved
 * in the device private data. This allows the driver to access the dwc2_hsotg
 * structure on subsequent calls to driver methods for this device.
 */
static int dwc2_driver_probe(struct platform_device *dev)
{
	const struct of_device_id *match;
	const struct dwc2_core_params *params;
	struct dwc2_core_params defparams;
	struct dwc2_hsotg *hsotg;
	struct resource *res;
	int retval;
	int irq;

	match = of_match_device(dwc2_of_match_table, &dev->dev);
	if (match && match->data) {
		params = match->data;
	} else {
		/* Default all params to autodetect */
		dwc2_set_all_params(&defparams, -1);
		params = &defparams;

		/*
		 * Disable descriptor dma mode by default as the HW can support
		 * it, but does not support it for SPLIT transactions.
		 * Disable it for FS devices as well.
		 */
		defparams.dma_desc_enable = 0;
		defparams.dma_desc_fs_enable = 0;
	}

	hsotg = devm_kzalloc(&dev->dev, sizeof(*hsotg), GFP_KERNEL);
	if (!hsotg)
		return -ENOMEM;

	hsotg->dev = &dev->dev;

	/*
	 * Use reasonable defaults so platforms don't have to provide these.
	 */
	if (!dev->dev.dma_mask)
		dev->dev.dma_mask = &dev->dev.coherent_dma_mask;
	retval = dma_set_coherent_mask(&dev->dev, DMA_BIT_MASK(32));
	if (retval)
		return retval;

	res = platform_get_resource(dev, IORESOURCE_MEM, 0);
	hsotg->regs = devm_ioremap_resource(&dev->dev, res);
	if (IS_ERR(hsotg->regs))
		return PTR_ERR(hsotg->regs);

	dev_dbg(&dev->dev, "mapped PA %08lx to VA %p\n",
		(unsigned long)res->start, hsotg->regs);

	hsotg->dr_mode = usb_get_dr_mode(&dev->dev);
	if (IS_ENABLED(CONFIG_USB_DWC2_HOST) &&
			hsotg->dr_mode != USB_DR_MODE_HOST) {
		hsotg->dr_mode = USB_DR_MODE_HOST;
		dev_warn(hsotg->dev,
			"Configuration mismatch. Forcing host mode\n");
	} else if (IS_ENABLED(CONFIG_USB_DWC2_PERIPHERAL) &&
			hsotg->dr_mode != USB_DR_MODE_PERIPHERAL) {
		hsotg->dr_mode = USB_DR_MODE_PERIPHERAL;
		dev_warn(hsotg->dev,
			"Configuration mismatch. Forcing peripheral mode\n");
	}

	retval = dwc2_lowlevel_hw_init(hsotg);
	if (retval)
		return retval;

	spin_lock_init(&hsotg->lock);

	hsotg->core_params = devm_kzalloc(&dev->dev,
				sizeof(*hsotg->core_params), GFP_KERNEL);
	if (!hsotg->core_params)
		return -ENOMEM;

	dwc2_set_all_params(hsotg->core_params, -1);

	irq = platform_get_irq(dev, 0);
	if (irq < 0) {
		dev_err(&dev->dev, "missing IRQ resource\n");
		return irq;
	}

	dev_dbg(hsotg->dev, "registering common handler for irq%d\n",
		irq);
	retval = devm_request_irq(hsotg->dev, irq,
				  dwc2_handle_common_intr, IRQF_SHARED,
				  dev_name(hsotg->dev), hsotg);
	if (retval)
		return retval;

	retval = dwc2_lowlevel_hw_enable(hsotg);
	if (retval)
		return retval;

	/* Detect config values from hardware */
	retval = dwc2_get_hwparams(hsotg);
	if (retval)
		goto error;

	/* Validate parameter values */
	dwc2_set_parameters(hsotg, params);

	if (hsotg->dr_mode != USB_DR_MODE_HOST) {
		retval = dwc2_gadget_init(hsotg, irq);
		if (retval)
			goto error;
		hsotg->gadget_enabled = 1;
	}

	if (hsotg->dr_mode != USB_DR_MODE_PERIPHERAL) {
		retval = dwc2_hcd_init(hsotg, irq);
		if (retval) {
			if (hsotg->gadget_enabled)
				dwc2_hsotg_remove(hsotg);
			goto error;
		}
		hsotg->hcd_enabled = 1;
	}

	platform_set_drvdata(dev, hsotg);

	dwc2_debugfs_init(hsotg);

	/* Gadget code manages lowlevel hw on its own */
	if (hsotg->dr_mode == USB_DR_MODE_PERIPHERAL)
		dwc2_lowlevel_hw_disable(hsotg);

	return 0;

error:
	dwc2_lowlevel_hw_disable(hsotg);
	return retval;
}

static int __maybe_unused dwc2_suspend(struct device *dev)
{
	struct dwc2_hsotg *dwc2 = dev_get_drvdata(dev);
	int ret = 0;

	if (dwc2_is_device_mode(dwc2))
		dwc2_hsotg_suspend(dwc2);

	if (dwc2->ll_hw_enabled)
		ret = __dwc2_lowlevel_hw_disable(dwc2);

	return ret;
}

static int __maybe_unused dwc2_resume(struct device *dev)
{
	struct dwc2_hsotg *dwc2 = dev_get_drvdata(dev);
	int ret = 0;

	if (dwc2->ll_hw_enabled) {
		ret = __dwc2_lowlevel_hw_enable(dwc2);
		if (ret)
			return ret;
	}

	if (dwc2_is_device_mode(dwc2))
		ret = dwc2_hsotg_resume(dwc2);

	return ret;
}

static const struct dev_pm_ops dwc2_dev_pm_ops = {
	SET_SYSTEM_SLEEP_PM_OPS(dwc2_suspend, dwc2_resume)
};

static struct platform_driver dwc2_platform_driver = {
	.driver = {
		.name = dwc2_driver_name,
		.of_match_table = dwc2_of_match_table,
		.pm = &dwc2_dev_pm_ops,
	},
	.probe = dwc2_driver_probe,
	.remove = dwc2_driver_remove,
};

module_platform_driver(dwc2_platform_driver);

MODULE_DESCRIPTION("DESIGNWARE HS OTG Platform Glue");
MODULE_AUTHOR("Matthijs Kooijman <matthijs@stdin.nl>");
MODULE_LICENSE("Dual BSD/GPL");
Commit	Line	Data
5b9974b1 MK	1	/*
	2	* platform.c - DesignWare HS OTG Controller platform driver
	3	*
	4	* Copyright (C) Matthijs Kooijman <matthijs@stdin.nl>
	5	*
	6	* Redistribution and use in source and binary forms, with or without
	7	* modification, are permitted provided that the following conditions
	8	* are met:
	9	* 1. Redistributions of source code must retain the above copyright
	10	* notice, this list of conditions, and the following disclaimer,
	11	* without modification.
	12	* 2. Redistributions in binary form must reproduce the above copyright
	13	* notice, this list of conditions and the following disclaimer in the
	14	* documentation and/or other materials provided with the distribution.
	15	* 3. The names of the above-listed copyright holders may not be used
	16	* to endorse or promote products derived from this software without
	17	* specific prior written permission.
	18	*
	19	* ALTERNATIVELY, this software may be distributed under the terms of the
	20	* GNU General Public License ("GPL") as published by the Free Software
	21	* Foundation; either version 2 of the License, or (at your option) any
	22	* later version.
	23	*
	24	* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS
	25	* IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
	26	* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
	27	* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
	28	* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
	29	* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
	30	* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
	31	* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
	32	* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
	33	* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
	34	* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
	35	*/
	36
	37	#include <linux/kernel.h>
	38	#include <linux/module.h>
	39	#include <linux/slab.h>
09a75e85	40	#include <linux/clk.h>
5b9974b1 MK	41	#include <linux/device.h>
5b9974b1 MK	42	#include <linux/dma-mapping.h>
831eae69	43	#include <linux/of_device.h>
7ad8096e	44	#include <linux/mutex.h>
5b9974b1	45	#include <linux/platform_device.h>
09a75e85 MS	46	#include <linux/phy/phy.h>
09a75e85 MS	47	#include <linux/platform_data/s3c-hsotg.h>
5b9974b1	48
c0155b9d KY	49	#include <linux/usb/of.h>
c0155b9d KY	50
5b9974b1 MK	51	#include "core.h"
5b9974b1 MK	52	#include "hcd.h"
f91eea44	53	#include "debug.h"
5b9974b1 MK	54
	55	static const char dwc2_driver_name[] = "dwc2";
	56
831eae69 SW	57	static const struct dwc2_core_params params_bcm2835 = {
	58	.otg_cap = 0, /* HNP/SRP capable */
	59	.otg_ver = 0, /* 1.3 */
	60	.dma_enable = 1,
	61	.dma_desc_enable = 0,
fbb9e22b	62	.dma_desc_fs_enable = 0,
831eae69 SW	63	.speed = 0, /* High Speed */
	64	.enable_dynamic_fifo = 1,
	65	.en_multiple_tx_fifo = 1,
	66	.host_rx_fifo_size = 774, /* 774 DWORDs */
	67	.host_nperio_tx_fifo_size = 256, /* 256 DWORDs */
	68	.host_perio_tx_fifo_size = 512, /* 512 DWORDs */
	69	.max_transfer_size = 65535,
	70	.max_packet_count = 511,
	71	.host_channels = 8,
	72	.phy_type = 1, /* UTMI */
	73	.phy_utmi_width = 8, /* 8 bits */
	74	.phy_ulpi_ddr = 0, /* Single */
	75	.phy_ulpi_ext_vbus = 0,
	76	.i2c_enable = 0,
	77	.ulpi_fs_ls = 0,
	78	.host_support_fs_ls_low_power = 0,
	79	.host_ls_low_power_phy_clk = 0, /* 48 MHz */
	80	.ts_dline = 0,
	81	.reload_ctl = 0,
	82	.ahbcfg = 0x10,
58b179dc	83	.uframe_sched = 0,
a6d249d8	84	.external_id_pin_ctl = -1,
285046aa	85	.hibernation = -1,
831eae69 SW	86	};
831eae69 SW	87
95083146 KY	88	static const struct dwc2_core_params params_rk3066 = {
	89	.otg_cap = 2, /* non-HNP/non-SRP */
	90	.otg_ver = -1,
	91	.dma_enable = -1,
	92	.dma_desc_enable = 0,
fbb9e22b	93	.dma_desc_fs_enable = 0,
95083146 KY	94	.speed = -1,
	95	.enable_dynamic_fifo = 1,
	96	.en_multiple_tx_fifo = -1,
	97	.host_rx_fifo_size = 520, /* 520 DWORDs */
	98	.host_nperio_tx_fifo_size = 128, /* 128 DWORDs */
	99	.host_perio_tx_fifo_size = 256, /* 256 DWORDs */
	100	.max_transfer_size = 65535,
	101	.max_packet_count = -1,
	102	.host_channels = -1,
	103	.phy_type = -1,
	104	.phy_utmi_width = -1,
	105	.phy_ulpi_ddr = -1,
	106	.phy_ulpi_ext_vbus = -1,
	107	.i2c_enable = -1,
	108	.ulpi_fs_ls = -1,
	109	.host_support_fs_ls_low_power = -1,
	110	.host_ls_low_power_phy_clk = -1,
	111	.ts_dline = -1,
	112	.reload_ctl = -1,
f1659303 DA	113	.ahbcfg = GAHBCFG_HBSTLEN_INCR16 <<
f1659303 DA	114	GAHBCFG_HBSTLEN_SHIFT,
95083146	115	.uframe_sched = -1,
a6d249d8	116	.external_id_pin_ctl = -1,
285046aa	117	.hibernation = -1,
95083146 KY	118	};
95083146 KY	119
09a75e85 MS	120	static int __dwc2_lowlevel_hw_enable(struct dwc2_hsotg *hsotg)
	121	{
	122	struct platform_device *pdev = to_platform_device(hsotg->dev);
	123	int ret;
	124
	125	ret = regulator_bulk_enable(ARRAY_SIZE(hsotg->supplies),
	126	hsotg->supplies);
	127	if (ret)
	128	return ret;
	129
8aa90cf2 SW	130	if (hsotg->clk) {
	131	ret = clk_prepare_enable(hsotg->clk);
	132	if (ret)
	133	return ret;
	134	}
09a75e85 MS	135
	136	if (hsotg->uphy)
	137	ret = usb_phy_init(hsotg->uphy);
	138	else if (hsotg->plat && hsotg->plat->phy_init)
	139	ret = hsotg->plat->phy_init(pdev, hsotg->plat->phy_type);
	140	else {
	141	ret = phy_power_on(hsotg->phy);
	142	if (ret == 0)
	143	ret = phy_init(hsotg->phy);
	144	}
	145
	146	return ret;
	147	}
	148
	149	/**
	150	* dwc2_lowlevel_hw_enable - enable platform lowlevel hw resources
	151	* @hsotg: The driver state
	152	*
	153	* A wrapper for platform code responsible for controlling
	154	* low-level USB platform resources (phy, clock, regulators)
	155	*/
	156	int dwc2_lowlevel_hw_enable(struct dwc2_hsotg *hsotg)
	157	{
	158	int ret = __dwc2_lowlevel_hw_enable(hsotg);
	159
	160	if (ret == 0)
	161	hsotg->ll_hw_enabled = true;
	162	return ret;
	163	}
	164
	165	static int __dwc2_lowlevel_hw_disable(struct dwc2_hsotg *hsotg)
	166	{
	167	struct platform_device *pdev = to_platform_device(hsotg->dev);
	168	int ret = 0;
	169
	170	if (hsotg->uphy)
	171	usb_phy_shutdown(hsotg->uphy);
	172	else if (hsotg->plat && hsotg->plat->phy_exit)
	173	ret = hsotg->plat->phy_exit(pdev, hsotg->plat->phy_type);
	174	else {
	175	ret = phy_exit(hsotg->phy);
	176	if (ret == 0)
	177	ret = phy_power_off(hsotg->phy);
	178	}
	179	if (ret)
	180	return ret;
	181
8aa90cf2 SW	182	if (hsotg->clk)
8aa90cf2 SW	183	clk_disable_unprepare(hsotg->clk);
09a75e85 MS	184
	185	ret = regulator_bulk_disable(ARRAY_SIZE(hsotg->supplies),
	186	hsotg->supplies);
	187
	188	return ret;
	189	}
	190
	191	/**
	192	* dwc2_lowlevel_hw_disable - disable platform lowlevel hw resources
	193	* @hsotg: The driver state
	194	*
	195	* A wrapper for platform code responsible for controlling
	196	* low-level USB platform resources (phy, clock, regulators)
	197	*/
	198	int dwc2_lowlevel_hw_disable(struct dwc2_hsotg *hsotg)
	199	{
	200	int ret = __dwc2_lowlevel_hw_disable(hsotg);
	201
	202	if (ret == 0)
	203	hsotg->ll_hw_enabled = false;
	204	return ret;
	205	}
	206
	207	static int dwc2_lowlevel_hw_init(struct dwc2_hsotg *hsotg)
	208	{
	209	int i, ret;
	210
	211	/* Set default UTMI width */
	212	hsotg->phyif = GUSBCFG_PHYIF16;
	213
	214	/*
	215	* Attempt to find a generic PHY, then look for an old style
	216	* USB PHY and then fall back to pdata
	217	*/
	218	hsotg->phy = devm_phy_get(hsotg->dev, "usb2-phy");
	219	if (IS_ERR(hsotg->phy)) {
6c2dad69 SW	220	ret = PTR_ERR(hsotg->phy);
	221	switch (ret) {
	222	case -ENODEV:
	223	case -ENOSYS:
	224	hsotg->phy = NULL;
	225	break;
	226	case -EPROBE_DEFER:
	227	return ret;
	228	default:
	229	dev_err(hsotg->dev, "error getting phy %d\n", ret);
	230	return ret;
	231	}
	232	}
	233
	234	if (!hsotg->phy) {
09a75e85	235	hsotg->uphy = devm_usb_get_phy(hsotg->dev, USB_PHY_TYPE_USB2);
6c2dad69 SW	236	if (IS_ERR(hsotg->uphy)) {
	237	ret = PTR_ERR(hsotg->uphy);
	238	switch (ret) {
	239	case -ENODEV:
	240	case -ENXIO:
	241	hsotg->uphy = NULL;
	242	break;
	243	case -EPROBE_DEFER:
	244	return ret;
	245	default:
	246	dev_err(hsotg->dev, "error getting usb phy %d\n",
	247	ret);
	248	return ret;
	249	}
	250	}
09a75e85 MS	251	}
09a75e85 MS	252
6c2dad69 SW	253	hsotg->plat = dev_get_platdata(hsotg->dev);
6c2dad69 SW	254
09a75e85 MS	255	if (hsotg->phy) {
	256	/*
	257	* If using the generic PHY framework, check if the PHY bus
	258	* width is 8-bit and set the phyif appropriately.
	259	*/
	260	if (phy_get_bus_width(hsotg->phy) == 8)
	261	hsotg->phyif = GUSBCFG_PHYIF8;
	262	}
	263
09a75e85 MS	264	/* Clock */
	265	hsotg->clk = devm_clk_get(hsotg->dev, "otg");
	266	if (IS_ERR(hsotg->clk)) {
	267	hsotg->clk = NULL;
	268	dev_dbg(hsotg->dev, "cannot get otg clock\n");
	269	}
	270
	271	/* Regulators */
	272	for (i = 0; i < ARRAY_SIZE(hsotg->supplies); i++)
	273	hsotg->supplies[i].supply = dwc2_hsotg_supply_names[i];
	274
	275	ret = devm_regulator_bulk_get(hsotg->dev, ARRAY_SIZE(hsotg->supplies),
	276	hsotg->supplies);
	277	if (ret) {
	278	dev_err(hsotg->dev, "failed to request supplies: %d\n", ret);
	279	return ret;
	280	}
	281	return 0;
	282	}
	283
5b9974b1 MK	284	/**
	285	* dwc2_driver_remove() - Called when the DWC_otg core is unregistered with the
	286	* DWC_otg driver
	287	*
	288	* @dev: Platform device
	289	*
	290	* This routine is called, for example, when the rmmod command is executed. The
	291	* device may or may not be electrically present. If it is present, the driver
	292	* stops device processing. Any resources used on behalf of this device are
	293	* freed.
	294	*/
	295	static int dwc2_driver_remove(struct platform_device *dev)
	296	{
	297	struct dwc2_hsotg *hsotg = platform_get_drvdata(dev);
	298
f91eea44	299	dwc2_debugfs_exit(hsotg);
e39af88f MS	300	if (hsotg->hcd_enabled)
	301	dwc2_hcd_remove(hsotg);
	302	if (hsotg->gadget_enabled)
1f91b4cc	303	dwc2_hsotg_remove(hsotg);
5b9974b1	304
09a75e85 MS	305	if (hsotg->ll_hw_enabled)
	306	dwc2_lowlevel_hw_disable(hsotg);
	307
5b9974b1 MK	308	return 0;
	309	}
	310
831eae69 SW	311	static const struct of_device_id dwc2_of_match_table[] = {
831eae69 SW	312	{ .compatible = "brcm,bcm2835-usb", .data = &params_bcm2835 },
95083146	313	{ .compatible = "rockchip,rk3066-usb", .data = &params_rk3066 },
831eae69	314	{ .compatible = "snps,dwc2", .data = NULL },
117777b2	315	{ .compatible = "samsung,s3c6400-hsotg", .data = NULL},
831eae69 SW	316	{},
	317	};
	318	MODULE_DEVICE_TABLE(of, dwc2_of_match_table);
	319
5b9974b1 MK	320	/**
	321	* dwc2_driver_probe() - Called when the DWC_otg core is bound to the DWC_otg
	322	* driver
	323	*
	324	* @dev: Platform device
	325	*
	326	* This routine creates the driver components required to control the device
	327	* (core, HCD, and PCD) and initializes the device. The driver components are
	328	* stored in a dwc2_hsotg structure. A reference to the dwc2_hsotg is saved
	329	* in the device private data. This allows the driver to access the dwc2_hsotg
	330	* structure on subsequent calls to driver methods for this device.
	331	*/
	332	static int dwc2_driver_probe(struct platform_device *dev)
	333	{
831eae69 SW	334	const struct of_device_id *match;
	335	const struct dwc2_core_params *params;
	336	struct dwc2_core_params defparams;
5b9974b1 MK	337	struct dwc2_hsotg *hsotg;
	338	struct resource *res;
	339	int retval;
	340	int irq;
5b9974b1	341
831eae69 SW	342	match = of_match_device(dwc2_of_match_table, &dev->dev);
	343	if (match && match->data) {
	344	params = match->data;
	345	} else {
	346	/* Default all params to autodetect */
	347	dwc2_set_all_params(&defparams, -1);
	348	params = &defparams;
8b3e233e DN	349
	350	/*
	351	* Disable descriptor dma mode by default as the HW can support
	352	* it, but does not support it for SPLIT transactions.
fbb9e22b	353	* Disable it for FS devices as well.
8b3e233e DN	354	*/
8b3e233e DN	355	defparams.dma_desc_enable = 0;
fbb9e22b	356	defparams.dma_desc_fs_enable = 0;
831eae69	357	}
5b9974b1 MK	358
	359	hsotg = devm_kzalloc(&dev->dev, sizeof(*hsotg), GFP_KERNEL);
	360	if (!hsotg)
	361	return -ENOMEM;
	362
	363	hsotg->dev = &dev->dev;
	364
642f2ecc MK	365	/*
	366	* Use reasonable defaults so platforms don't have to provide these.
	367	*/
	368	if (!dev->dev.dma_mask)
	369	dev->dev.dma_mask = &dev->dev.coherent_dma_mask;
4cdbb4ff RK	370	retval = dma_set_coherent_mask(&dev->dev, DMA_BIT_MASK(32));
	371	if (retval)
	372	return retval;
642f2ecc	373
5b9974b1	374	res = platform_get_resource(dev, IORESOURCE_MEM, 0);
5b9974b1 MK	375	hsotg->regs = devm_ioremap_resource(&dev->dev, res);
	376	if (IS_ERR(hsotg->regs))
	377	return PTR_ERR(hsotg->regs);
	378
	379	dev_dbg(&dev->dev, "mapped PA %08lx to VA %p\n",
	380	(unsigned long)res->start, hsotg->regs);
	381
06e7114f	382	hsotg->dr_mode = usb_get_dr_mode(&dev->dev);
857512d0 MYK	383	if (IS_ENABLED(CONFIG_USB_DWC2_HOST) &&
	384	hsotg->dr_mode != USB_DR_MODE_HOST) {
	385	hsotg->dr_mode = USB_DR_MODE_HOST;
	386	dev_warn(hsotg->dev,
	387	"Configuration mismatch. Forcing host mode\n");
	388	} else if (IS_ENABLED(CONFIG_USB_DWC2_PERIPHERAL) &&
	389	hsotg->dr_mode != USB_DR_MODE_PERIPHERAL) {
	390	hsotg->dr_mode = USB_DR_MODE_PERIPHERAL;
	391	dev_warn(hsotg->dev,
	392	"Configuration mismatch. Forcing peripheral mode\n");
	393	}
c0155b9d	394
09a75e85	395	retval = dwc2_lowlevel_hw_init(hsotg);
ecb176c6 MYK	396	if (retval)
	397	return retval;
	398
09a75e85 MS	399	spin_lock_init(&hsotg->lock);
09a75e85 MS	400
ecb176c6 MYK	401	hsotg->core_params = devm_kzalloc(&dev->dev,
	402	sizeof(*hsotg->core_params), GFP_KERNEL);
	403	if (!hsotg->core_params)
	404	return -ENOMEM;
	405
	406	dwc2_set_all_params(hsotg->core_params, -1);
	407
f74875dc SW	408	irq = platform_get_irq(dev, 0);
	409	if (irq < 0) {
	410	dev_err(&dev->dev, "missing IRQ resource\n");
	411	return irq;
	412	}
	413
	414	dev_dbg(hsotg->dev, "registering common handler for irq%d\n",
	415	irq);
	416	retval = devm_request_irq(hsotg->dev, irq,
	417	dwc2_handle_common_intr, IRQF_SHARED,
	418	dev_name(hsotg->dev), hsotg);
	419	if (retval)
	420	return retval;
	421
09a75e85 MS	422	retval = dwc2_lowlevel_hw_enable(hsotg);
	423	if (retval)
	424	return retval;
	425
	426	/* Detect config values from hardware */
	427	retval = dwc2_get_hwparams(hsotg);
	428	if (retval)
	429	goto error;
	430
ecb176c6 MYK	431	/* Validate parameter values */
	432	dwc2_set_parameters(hsotg, params);
	433
e39af88f MS	434	if (hsotg->dr_mode != USB_DR_MODE_HOST) {
	435	retval = dwc2_gadget_init(hsotg, irq);
	436	if (retval)
09a75e85	437	goto error;
e39af88f MS	438	hsotg->gadget_enabled = 1;
	439	}
	440
	441	if (hsotg->dr_mode != USB_DR_MODE_PERIPHERAL) {
ecb176c6	442	retval = dwc2_hcd_init(hsotg, irq);
e39af88f MS	443	if (retval) {
e39af88f MS	444	if (hsotg->gadget_enabled)
1f91b4cc	445	dwc2_hsotg_remove(hsotg);
09a75e85	446	goto error;
e39af88f MS	447	}
	448	hsotg->hcd_enabled = 1;
	449	}
5b9974b1 MK	450
	451	platform_set_drvdata(dev, hsotg);
	452
f91eea44 MYK	453	dwc2_debugfs_init(hsotg);
f91eea44 MYK	454
09a75e85 MS	455	/* Gadget code manages lowlevel hw on its own */
	456	if (hsotg->dr_mode == USB_DR_MODE_PERIPHERAL)
	457	dwc2_lowlevel_hw_disable(hsotg);
	458
	459	return 0;
	460
	461	error:
	462	dwc2_lowlevel_hw_disable(hsotg);
5b9974b1 MK	463	return retval;
	464	}
	465
da9f3289	466	static int __maybe_unused dwc2_suspend(struct device *dev)
117777b2	467	{
bcc06078	468	struct dwc2_hsotg *dwc2 = dev_get_drvdata(dev);
117777b2 DN	469	int ret = 0;
117777b2 DN	470
09a75e85 MS	471	if (dwc2_is_device_mode(dwc2))
	472	dwc2_hsotg_suspend(dwc2);
	473
	474	if (dwc2->ll_hw_enabled)
	475	ret = __dwc2_lowlevel_hw_disable(dwc2);
135b3c43	476
117777b2 DN	477	return ret;
	478	}
	479
da9f3289	480	static int __maybe_unused dwc2_resume(struct device *dev)
117777b2	481	{
bcc06078	482	struct dwc2_hsotg *dwc2 = dev_get_drvdata(dev);
117777b2 DN	483	int ret = 0;
117777b2 DN	484
09a75e85 MS	485	if (dwc2->ll_hw_enabled) {
	486	ret = __dwc2_lowlevel_hw_enable(dwc2);
	487	if (ret)
	488	return ret;
	489	}
	490
	491	if (dwc2_is_device_mode(dwc2))
1f91b4cc	492	ret = dwc2_hsotg_resume(dwc2);
135b3c43	493
117777b2 DN	494	return ret;
	495	}
	496
bcc06078 DN	497	static const struct dev_pm_ops dwc2_dev_pm_ops = {
	498	SET_SYSTEM_SLEEP_PM_OPS(dwc2_suspend, dwc2_resume)
	499	};
	500
5b9974b1 MK	501	static struct platform_driver dwc2_platform_driver = {
5b9974b1 MK	502	.driver = {
1c126bc6	503	.name = dwc2_driver_name,
5b9974b1	504	.of_match_table = dwc2_of_match_table,
bcc06078	505	.pm = &dwc2_dev_pm_ops,
5b9974b1 MK	506	},
	507	.probe = dwc2_driver_probe,
	508	.remove = dwc2_driver_remove,
	509	};
	510
	511	module_platform_driver(dwc2_platform_driver);
	512
	513	MODULE_DESCRIPTION("DESIGNWARE HS OTG Platform Glue");
	514	MODULE_AUTHOR("Matthijs Kooijman <matthijs@stdin.nl>");
	515	MODULE_LICENSE("Dual BSD/GPL");