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914a3f3b HS |
1 | /* |
2 | * Driver for the Atmel USBA high speed USB device controller | |
3 | * | |
4 | * Copyright (C) 2005-2007 Atmel Corporation | |
5 | * | |
6 | * This program is free software; you can redistribute it and/or modify | |
7 | * it under the terms of the GNU General Public License version 2 as | |
8 | * published by the Free Software Foundation. | |
9 | */ | |
10 | #include <linux/clk.h> | |
11 | #include <linux/module.h> | |
12 | #include <linux/init.h> | |
13 | #include <linux/interrupt.h> | |
14 | #include <linux/io.h> | |
15 | #include <linux/device.h> | |
16 | #include <linux/dma-mapping.h> | |
17 | #include <linux/list.h> | |
18 | #include <linux/platform_device.h> | |
19 | #include <linux/usb/ch9.h> | |
20 | #include <linux/usb/gadget.h> | |
21 | #include <linux/delay.h> | |
22 | ||
23 | #include <asm/gpio.h> | |
24 | #include <asm/arch/board.h> | |
25 | ||
26 | #include "atmel_usba_udc.h" | |
27 | ||
28 | ||
29 | static struct usba_udc the_udc; | |
30 | ||
31 | #ifdef CONFIG_USB_GADGET_DEBUG_FS | |
32 | #include <linux/debugfs.h> | |
33 | #include <linux/uaccess.h> | |
34 | ||
35 | static int queue_dbg_open(struct inode *inode, struct file *file) | |
36 | { | |
37 | struct usba_ep *ep = inode->i_private; | |
38 | struct usba_request *req, *req_copy; | |
39 | struct list_head *queue_data; | |
40 | ||
41 | queue_data = kmalloc(sizeof(*queue_data), GFP_KERNEL); | |
42 | if (!queue_data) | |
43 | return -ENOMEM; | |
44 | INIT_LIST_HEAD(queue_data); | |
45 | ||
46 | spin_lock_irq(&ep->udc->lock); | |
47 | list_for_each_entry(req, &ep->queue, queue) { | |
48 | req_copy = kmalloc(sizeof(*req_copy), GFP_ATOMIC); | |
49 | if (!req_copy) | |
50 | goto fail; | |
51 | memcpy(req_copy, req, sizeof(*req_copy)); | |
52 | list_add_tail(&req_copy->queue, queue_data); | |
53 | } | |
54 | spin_unlock_irq(&ep->udc->lock); | |
55 | ||
56 | file->private_data = queue_data; | |
57 | return 0; | |
58 | ||
59 | fail: | |
60 | spin_unlock_irq(&ep->udc->lock); | |
61 | list_for_each_entry_safe(req, req_copy, queue_data, queue) { | |
62 | list_del(&req->queue); | |
63 | kfree(req); | |
64 | } | |
65 | kfree(queue_data); | |
66 | return -ENOMEM; | |
67 | } | |
68 | ||
69 | /* | |
70 | * bbbbbbbb llllllll IZS sssss nnnn FDL\n\0 | |
71 | * | |
72 | * b: buffer address | |
73 | * l: buffer length | |
74 | * I/i: interrupt/no interrupt | |
75 | * Z/z: zero/no zero | |
76 | * S/s: short ok/short not ok | |
77 | * s: status | |
78 | * n: nr_packets | |
79 | * F/f: submitted/not submitted to FIFO | |
80 | * D/d: using/not using DMA | |
81 | * L/l: last transaction/not last transaction | |
82 | */ | |
83 | static ssize_t queue_dbg_read(struct file *file, char __user *buf, | |
84 | size_t nbytes, loff_t *ppos) | |
85 | { | |
86 | struct list_head *queue = file->private_data; | |
87 | struct usba_request *req, *tmp_req; | |
88 | size_t len, remaining, actual = 0; | |
89 | char tmpbuf[38]; | |
90 | ||
91 | if (!access_ok(VERIFY_WRITE, buf, nbytes)) | |
92 | return -EFAULT; | |
93 | ||
94 | mutex_lock(&file->f_dentry->d_inode->i_mutex); | |
95 | list_for_each_entry_safe(req, tmp_req, queue, queue) { | |
96 | len = snprintf(tmpbuf, sizeof(tmpbuf), | |
97 | "%8p %08x %c%c%c %5d %c%c%c\n", | |
98 | req->req.buf, req->req.length, | |
99 | req->req.no_interrupt ? 'i' : 'I', | |
100 | req->req.zero ? 'Z' : 'z', | |
101 | req->req.short_not_ok ? 's' : 'S', | |
102 | req->req.status, | |
103 | req->submitted ? 'F' : 'f', | |
104 | req->using_dma ? 'D' : 'd', | |
105 | req->last_transaction ? 'L' : 'l'); | |
106 | len = min(len, sizeof(tmpbuf)); | |
107 | if (len > nbytes) | |
108 | break; | |
109 | ||
110 | list_del(&req->queue); | |
111 | kfree(req); | |
112 | ||
113 | remaining = __copy_to_user(buf, tmpbuf, len); | |
114 | actual += len - remaining; | |
115 | if (remaining) | |
116 | break; | |
117 | ||
118 | nbytes -= len; | |
119 | buf += len; | |
120 | } | |
121 | mutex_unlock(&file->f_dentry->d_inode->i_mutex); | |
122 | ||
123 | return actual; | |
124 | } | |
125 | ||
126 | static int queue_dbg_release(struct inode *inode, struct file *file) | |
127 | { | |
128 | struct list_head *queue_data = file->private_data; | |
129 | struct usba_request *req, *tmp_req; | |
130 | ||
131 | list_for_each_entry_safe(req, tmp_req, queue_data, queue) { | |
132 | list_del(&req->queue); | |
133 | kfree(req); | |
134 | } | |
135 | kfree(queue_data); | |
136 | return 0; | |
137 | } | |
138 | ||
139 | static int regs_dbg_open(struct inode *inode, struct file *file) | |
140 | { | |
141 | struct usba_udc *udc; | |
142 | unsigned int i; | |
143 | u32 *data; | |
144 | int ret = -ENOMEM; | |
145 | ||
146 | mutex_lock(&inode->i_mutex); | |
147 | udc = inode->i_private; | |
148 | data = kmalloc(inode->i_size, GFP_KERNEL); | |
149 | if (!data) | |
150 | goto out; | |
151 | ||
152 | spin_lock_irq(&udc->lock); | |
153 | for (i = 0; i < inode->i_size / 4; i++) | |
154 | data[i] = __raw_readl(udc->regs + i * 4); | |
155 | spin_unlock_irq(&udc->lock); | |
156 | ||
157 | file->private_data = data; | |
158 | ret = 0; | |
159 | ||
160 | out: | |
161 | mutex_unlock(&inode->i_mutex); | |
162 | ||
163 | return ret; | |
164 | } | |
165 | ||
166 | static ssize_t regs_dbg_read(struct file *file, char __user *buf, | |
167 | size_t nbytes, loff_t *ppos) | |
168 | { | |
169 | struct inode *inode = file->f_dentry->d_inode; | |
170 | int ret; | |
171 | ||
172 | mutex_lock(&inode->i_mutex); | |
173 | ret = simple_read_from_buffer(buf, nbytes, ppos, | |
174 | file->private_data, | |
175 | file->f_dentry->d_inode->i_size); | |
176 | mutex_unlock(&inode->i_mutex); | |
177 | ||
178 | return ret; | |
179 | } | |
180 | ||
181 | static int regs_dbg_release(struct inode *inode, struct file *file) | |
182 | { | |
183 | kfree(file->private_data); | |
184 | return 0; | |
185 | } | |
186 | ||
187 | const struct file_operations queue_dbg_fops = { | |
188 | .owner = THIS_MODULE, | |
189 | .open = queue_dbg_open, | |
190 | .llseek = no_llseek, | |
191 | .read = queue_dbg_read, | |
192 | .release = queue_dbg_release, | |
193 | }; | |
194 | ||
195 | const struct file_operations regs_dbg_fops = { | |
196 | .owner = THIS_MODULE, | |
197 | .open = regs_dbg_open, | |
198 | .llseek = generic_file_llseek, | |
199 | .read = regs_dbg_read, | |
200 | .release = regs_dbg_release, | |
201 | }; | |
202 | ||
203 | static void usba_ep_init_debugfs(struct usba_udc *udc, | |
204 | struct usba_ep *ep) | |
205 | { | |
206 | struct dentry *ep_root; | |
207 | ||
208 | ep_root = debugfs_create_dir(ep->ep.name, udc->debugfs_root); | |
209 | if (!ep_root) | |
210 | goto err_root; | |
211 | ep->debugfs_dir = ep_root; | |
212 | ||
213 | ep->debugfs_queue = debugfs_create_file("queue", 0400, ep_root, | |
214 | ep, &queue_dbg_fops); | |
215 | if (!ep->debugfs_queue) | |
216 | goto err_queue; | |
217 | ||
218 | if (ep->can_dma) { | |
219 | ep->debugfs_dma_status | |
220 | = debugfs_create_u32("dma_status", 0400, ep_root, | |
221 | &ep->last_dma_status); | |
222 | if (!ep->debugfs_dma_status) | |
223 | goto err_dma_status; | |
224 | } | |
225 | if (ep_is_control(ep)) { | |
226 | ep->debugfs_state | |
227 | = debugfs_create_u32("state", 0400, ep_root, | |
228 | &ep->state); | |
229 | if (!ep->debugfs_state) | |
230 | goto err_state; | |
231 | } | |
232 | ||
233 | return; | |
234 | ||
235 | err_state: | |
236 | if (ep->can_dma) | |
237 | debugfs_remove(ep->debugfs_dma_status); | |
238 | err_dma_status: | |
239 | debugfs_remove(ep->debugfs_queue); | |
240 | err_queue: | |
241 | debugfs_remove(ep_root); | |
242 | err_root: | |
243 | dev_err(&ep->udc->pdev->dev, | |
244 | "failed to create debugfs directory for %s\n", ep->ep.name); | |
245 | } | |
246 | ||
247 | static void usba_ep_cleanup_debugfs(struct usba_ep *ep) | |
248 | { | |
249 | debugfs_remove(ep->debugfs_queue); | |
250 | debugfs_remove(ep->debugfs_dma_status); | |
251 | debugfs_remove(ep->debugfs_state); | |
252 | debugfs_remove(ep->debugfs_dir); | |
253 | ep->debugfs_dma_status = NULL; | |
254 | ep->debugfs_dir = NULL; | |
255 | } | |
256 | ||
257 | static void usba_init_debugfs(struct usba_udc *udc) | |
258 | { | |
259 | struct dentry *root, *regs; | |
260 | struct resource *regs_resource; | |
261 | ||
262 | root = debugfs_create_dir(udc->gadget.name, NULL); | |
263 | if (IS_ERR(root) || !root) | |
264 | goto err_root; | |
265 | udc->debugfs_root = root; | |
266 | ||
267 | regs = debugfs_create_file("regs", 0400, root, udc, ®s_dbg_fops); | |
268 | if (!regs) | |
269 | goto err_regs; | |
270 | ||
271 | regs_resource = platform_get_resource(udc->pdev, IORESOURCE_MEM, | |
272 | CTRL_IOMEM_ID); | |
273 | regs->d_inode->i_size = regs_resource->end - regs_resource->start + 1; | |
274 | udc->debugfs_regs = regs; | |
275 | ||
276 | usba_ep_init_debugfs(udc, to_usba_ep(udc->gadget.ep0)); | |
277 | ||
278 | return; | |
279 | ||
280 | err_regs: | |
281 | debugfs_remove(root); | |
282 | err_root: | |
283 | udc->debugfs_root = NULL; | |
284 | dev_err(&udc->pdev->dev, "debugfs is not available\n"); | |
285 | } | |
286 | ||
287 | static void usba_cleanup_debugfs(struct usba_udc *udc) | |
288 | { | |
289 | usba_ep_cleanup_debugfs(to_usba_ep(udc->gadget.ep0)); | |
290 | debugfs_remove(udc->debugfs_regs); | |
291 | debugfs_remove(udc->debugfs_root); | |
292 | udc->debugfs_regs = NULL; | |
293 | udc->debugfs_root = NULL; | |
294 | } | |
295 | #else | |
296 | static inline void usba_ep_init_debugfs(struct usba_udc *udc, | |
297 | struct usba_ep *ep) | |
298 | { | |
299 | ||
300 | } | |
301 | ||
302 | static inline void usba_ep_cleanup_debugfs(struct usba_ep *ep) | |
303 | { | |
304 | ||
305 | } | |
306 | ||
307 | static inline void usba_init_debugfs(struct usba_udc *udc) | |
308 | { | |
309 | ||
310 | } | |
311 | ||
312 | static inline void usba_cleanup_debugfs(struct usba_udc *udc) | |
313 | { | |
314 | ||
315 | } | |
316 | #endif | |
317 | ||
318 | static int vbus_is_present(struct usba_udc *udc) | |
319 | { | |
320 | if (udc->vbus_pin != -1) | |
321 | return gpio_get_value(udc->vbus_pin); | |
322 | ||
323 | /* No Vbus detection: Assume always present */ | |
324 | return 1; | |
325 | } | |
326 | ||
327 | static void copy_to_fifo(void __iomem *fifo, const void *buf, int len) | |
328 | { | |
329 | unsigned long tmp; | |
330 | ||
331 | DBG(DBG_FIFO, "copy to FIFO (len %d):\n", len); | |
332 | for (; len > 0; len -= 4, buf += 4, fifo += 4) { | |
333 | tmp = *(unsigned long *)buf; | |
334 | if (len >= 4) { | |
335 | DBG(DBG_FIFO, " -> %08lx\n", tmp); | |
336 | __raw_writel(tmp, fifo); | |
337 | } else { | |
338 | do { | |
339 | DBG(DBG_FIFO, " -> %02lx\n", tmp >> 24); | |
340 | __raw_writeb(tmp >> 24, fifo); | |
341 | fifo++; | |
342 | tmp <<= 8; | |
343 | } while (--len); | |
344 | break; | |
345 | } | |
346 | } | |
347 | } | |
348 | ||
349 | static void copy_from_fifo(void *buf, void __iomem *fifo, int len) | |
350 | { | |
351 | union { | |
352 | unsigned long *w; | |
353 | unsigned char *b; | |
354 | } p; | |
355 | unsigned long tmp; | |
356 | ||
357 | DBG(DBG_FIFO, "copy from FIFO (len %d):\n", len); | |
358 | for (p.w = buf; len > 0; len -= 4, p.w++, fifo += 4) { | |
359 | if (len >= 4) { | |
360 | tmp = __raw_readl(fifo); | |
361 | *p.w = tmp; | |
362 | DBG(DBG_FIFO, " -> %08lx\n", tmp); | |
363 | } else { | |
364 | do { | |
365 | tmp = __raw_readb(fifo); | |
366 | *p.b = tmp; | |
367 | DBG(DBG_FIFO, " -> %02lx\n", tmp); | |
368 | fifo++, p.b++; | |
369 | } while (--len); | |
370 | } | |
371 | } | |
372 | } | |
373 | ||
374 | static void next_fifo_transaction(struct usba_ep *ep, struct usba_request *req) | |
375 | { | |
376 | unsigned int transaction_len; | |
377 | ||
378 | transaction_len = req->req.length - req->req.actual; | |
379 | req->last_transaction = 1; | |
380 | if (transaction_len > ep->ep.maxpacket) { | |
381 | transaction_len = ep->ep.maxpacket; | |
382 | req->last_transaction = 0; | |
383 | } else if (transaction_len == ep->ep.maxpacket && req->req.zero) | |
384 | req->last_transaction = 0; | |
385 | ||
386 | DBG(DBG_QUEUE, "%s: submit_transaction, req %p (length %d)%s\n", | |
387 | ep->ep.name, req, transaction_len, | |
388 | req->last_transaction ? ", done" : ""); | |
389 | ||
390 | copy_to_fifo(ep->fifo, req->req.buf + req->req.actual, transaction_len); | |
391 | usba_ep_writel(ep, SET_STA, USBA_TX_PK_RDY); | |
392 | req->req.actual += transaction_len; | |
393 | } | |
394 | ||
395 | static void submit_request(struct usba_ep *ep, struct usba_request *req) | |
396 | { | |
397 | DBG(DBG_QUEUE, "%s: submit_request: req %p (length %d)\n", | |
398 | ep->ep.name, req, req->req.length); | |
399 | ||
400 | req->req.actual = 0; | |
401 | req->submitted = 1; | |
402 | ||
403 | if (req->using_dma) { | |
404 | if (req->req.length == 0) { | |
405 | usba_ep_writel(ep, CTL_ENB, USBA_TX_PK_RDY); | |
406 | return; | |
407 | } | |
408 | ||
409 | if (req->req.zero) | |
410 | usba_ep_writel(ep, CTL_ENB, USBA_SHORT_PACKET); | |
411 | else | |
412 | usba_ep_writel(ep, CTL_DIS, USBA_SHORT_PACKET); | |
413 | ||
414 | usba_dma_writel(ep, ADDRESS, req->req.dma); | |
415 | usba_dma_writel(ep, CONTROL, req->ctrl); | |
416 | } else { | |
417 | next_fifo_transaction(ep, req); | |
418 | if (req->last_transaction) { | |
419 | usba_ep_writel(ep, CTL_DIS, USBA_TX_PK_RDY); | |
420 | usba_ep_writel(ep, CTL_ENB, USBA_TX_COMPLETE); | |
421 | } else { | |
422 | usba_ep_writel(ep, CTL_DIS, USBA_TX_COMPLETE); | |
423 | usba_ep_writel(ep, CTL_ENB, USBA_TX_PK_RDY); | |
424 | } | |
425 | } | |
426 | } | |
427 | ||
428 | static void submit_next_request(struct usba_ep *ep) | |
429 | { | |
430 | struct usba_request *req; | |
431 | ||
432 | if (list_empty(&ep->queue)) { | |
433 | usba_ep_writel(ep, CTL_DIS, USBA_TX_PK_RDY | USBA_RX_BK_RDY); | |
434 | return; | |
435 | } | |
436 | ||
437 | req = list_entry(ep->queue.next, struct usba_request, queue); | |
438 | if (!req->submitted) | |
439 | submit_request(ep, req); | |
440 | } | |
441 | ||
442 | static void send_status(struct usba_udc *udc, struct usba_ep *ep) | |
443 | { | |
444 | ep->state = STATUS_STAGE_IN; | |
445 | usba_ep_writel(ep, SET_STA, USBA_TX_PK_RDY); | |
446 | usba_ep_writel(ep, CTL_ENB, USBA_TX_COMPLETE); | |
447 | } | |
448 | ||
449 | static void receive_data(struct usba_ep *ep) | |
450 | { | |
451 | struct usba_udc *udc = ep->udc; | |
452 | struct usba_request *req; | |
453 | unsigned long status; | |
454 | unsigned int bytecount, nr_busy; | |
455 | int is_complete = 0; | |
456 | ||
457 | status = usba_ep_readl(ep, STA); | |
458 | nr_busy = USBA_BFEXT(BUSY_BANKS, status); | |
459 | ||
460 | DBG(DBG_QUEUE, "receive data: nr_busy=%u\n", nr_busy); | |
461 | ||
462 | while (nr_busy > 0) { | |
463 | if (list_empty(&ep->queue)) { | |
464 | usba_ep_writel(ep, CTL_DIS, USBA_RX_BK_RDY); | |
465 | break; | |
466 | } | |
467 | req = list_entry(ep->queue.next, | |
468 | struct usba_request, queue); | |
469 | ||
470 | bytecount = USBA_BFEXT(BYTE_COUNT, status); | |
471 | ||
472 | if (status & (1 << 31)) | |
473 | is_complete = 1; | |
474 | if (req->req.actual + bytecount >= req->req.length) { | |
475 | is_complete = 1; | |
476 | bytecount = req->req.length - req->req.actual; | |
477 | } | |
478 | ||
479 | copy_from_fifo(req->req.buf + req->req.actual, | |
480 | ep->fifo, bytecount); | |
481 | req->req.actual += bytecount; | |
482 | ||
483 | usba_ep_writel(ep, CLR_STA, USBA_RX_BK_RDY); | |
484 | ||
485 | if (is_complete) { | |
486 | DBG(DBG_QUEUE, "%s: request done\n", ep->ep.name); | |
487 | req->req.status = 0; | |
488 | list_del_init(&req->queue); | |
489 | usba_ep_writel(ep, CTL_DIS, USBA_RX_BK_RDY); | |
490 | spin_unlock(&udc->lock); | |
491 | req->req.complete(&ep->ep, &req->req); | |
492 | spin_lock(&udc->lock); | |
493 | } | |
494 | ||
495 | status = usba_ep_readl(ep, STA); | |
496 | nr_busy = USBA_BFEXT(BUSY_BANKS, status); | |
497 | ||
498 | if (is_complete && ep_is_control(ep)) { | |
499 | send_status(udc, ep); | |
500 | break; | |
501 | } | |
502 | } | |
503 | } | |
504 | ||
505 | static void | |
506 | request_complete(struct usba_ep *ep, struct usba_request *req, int status) | |
507 | { | |
508 | struct usba_udc *udc = ep->udc; | |
509 | ||
510 | WARN_ON(!list_empty(&req->queue)); | |
511 | ||
512 | if (req->req.status == -EINPROGRESS) | |
513 | req->req.status = status; | |
514 | ||
515 | if (req->mapped) { | |
516 | dma_unmap_single( | |
517 | &udc->pdev->dev, req->req.dma, req->req.length, | |
518 | ep->is_in ? DMA_TO_DEVICE : DMA_FROM_DEVICE); | |
519 | req->req.dma = DMA_ADDR_INVALID; | |
520 | req->mapped = 0; | |
521 | } | |
522 | ||
523 | DBG(DBG_GADGET | DBG_REQ, | |
524 | "%s: req %p complete: status %d, actual %u\n", | |
525 | ep->ep.name, req, req->req.status, req->req.actual); | |
526 | ||
527 | spin_unlock(&udc->lock); | |
528 | req->req.complete(&ep->ep, &req->req); | |
529 | spin_lock(&udc->lock); | |
530 | } | |
531 | ||
532 | static void | |
533 | request_complete_list(struct usba_ep *ep, struct list_head *list, int status) | |
534 | { | |
535 | struct usba_request *req, *tmp_req; | |
536 | ||
537 | list_for_each_entry_safe(req, tmp_req, list, queue) { | |
538 | list_del_init(&req->queue); | |
539 | request_complete(ep, req, status); | |
540 | } | |
541 | } | |
542 | ||
543 | static int | |
544 | usba_ep_enable(struct usb_ep *_ep, const struct usb_endpoint_descriptor *desc) | |
545 | { | |
546 | struct usba_ep *ep = to_usba_ep(_ep); | |
547 | struct usba_udc *udc = ep->udc; | |
548 | unsigned long flags, ept_cfg, maxpacket; | |
549 | unsigned int nr_trans; | |
550 | ||
551 | DBG(DBG_GADGET, "%s: ep_enable: desc=%p\n", ep->ep.name, desc); | |
552 | ||
553 | maxpacket = le16_to_cpu(desc->wMaxPacketSize) & 0x7ff; | |
554 | ||
555 | if (((desc->bEndpointAddress & USB_ENDPOINT_NUMBER_MASK) != ep->index) | |
556 | || ep->index == 0 | |
557 | || desc->bDescriptorType != USB_DT_ENDPOINT | |
558 | || maxpacket == 0 | |
559 | || maxpacket > ep->fifo_size) { | |
560 | DBG(DBG_ERR, "ep_enable: Invalid argument"); | |
561 | return -EINVAL; | |
562 | } | |
563 | ||
564 | ep->is_isoc = 0; | |
565 | ep->is_in = 0; | |
566 | ||
567 | if (maxpacket <= 8) | |
568 | ept_cfg = USBA_BF(EPT_SIZE, USBA_EPT_SIZE_8); | |
569 | else | |
570 | /* LSB is bit 1, not 0 */ | |
571 | ept_cfg = USBA_BF(EPT_SIZE, fls(maxpacket - 1) - 3); | |
572 | ||
573 | DBG(DBG_HW, "%s: EPT_SIZE = %lu (maxpacket = %lu)\n", | |
574 | ep->ep.name, ept_cfg, maxpacket); | |
575 | ||
576 | if ((desc->bEndpointAddress & USB_ENDPOINT_DIR_MASK) == USB_DIR_IN) { | |
577 | ep->is_in = 1; | |
578 | ept_cfg |= USBA_EPT_DIR_IN; | |
579 | } | |
580 | ||
581 | switch (desc->bmAttributes & USB_ENDPOINT_XFERTYPE_MASK) { | |
582 | case USB_ENDPOINT_XFER_CONTROL: | |
583 | ept_cfg |= USBA_BF(EPT_TYPE, USBA_EPT_TYPE_CONTROL); | |
584 | ept_cfg |= USBA_BF(BK_NUMBER, USBA_BK_NUMBER_ONE); | |
585 | break; | |
586 | case USB_ENDPOINT_XFER_ISOC: | |
587 | if (!ep->can_isoc) { | |
588 | DBG(DBG_ERR, "ep_enable: %s is not isoc capable\n", | |
589 | ep->ep.name); | |
590 | return -EINVAL; | |
591 | } | |
592 | ||
593 | /* | |
594 | * Bits 11:12 specify number of _additional_ | |
595 | * transactions per microframe. | |
596 | */ | |
597 | nr_trans = ((le16_to_cpu(desc->wMaxPacketSize) >> 11) & 3) + 1; | |
598 | if (nr_trans > 3) | |
599 | return -EINVAL; | |
600 | ||
601 | ep->is_isoc = 1; | |
602 | ept_cfg |= USBA_BF(EPT_TYPE, USBA_EPT_TYPE_ISO); | |
603 | ||
604 | /* | |
605 | * Do triple-buffering on high-bandwidth iso endpoints. | |
606 | */ | |
607 | if (nr_trans > 1 && ep->nr_banks == 3) | |
608 | ept_cfg |= USBA_BF(BK_NUMBER, USBA_BK_NUMBER_TRIPLE); | |
609 | else | |
610 | ept_cfg |= USBA_BF(BK_NUMBER, USBA_BK_NUMBER_DOUBLE); | |
611 | ept_cfg |= USBA_BF(NB_TRANS, nr_trans); | |
612 | break; | |
613 | case USB_ENDPOINT_XFER_BULK: | |
614 | ept_cfg |= USBA_BF(EPT_TYPE, USBA_EPT_TYPE_BULK); | |
615 | ept_cfg |= USBA_BF(BK_NUMBER, USBA_BK_NUMBER_DOUBLE); | |
616 | break; | |
617 | case USB_ENDPOINT_XFER_INT: | |
618 | ept_cfg |= USBA_BF(EPT_TYPE, USBA_EPT_TYPE_INT); | |
619 | ept_cfg |= USBA_BF(BK_NUMBER, USBA_BK_NUMBER_DOUBLE); | |
620 | break; | |
621 | } | |
622 | ||
623 | spin_lock_irqsave(&ep->udc->lock, flags); | |
624 | ||
625 | if (ep->desc) { | |
626 | spin_unlock_irqrestore(&ep->udc->lock, flags); | |
627 | DBG(DBG_ERR, "ep%d already enabled\n", ep->index); | |
628 | return -EBUSY; | |
629 | } | |
630 | ||
631 | ep->desc = desc; | |
632 | ep->ep.maxpacket = maxpacket; | |
633 | ||
634 | usba_ep_writel(ep, CFG, ept_cfg); | |
635 | usba_ep_writel(ep, CTL_ENB, USBA_EPT_ENABLE); | |
636 | ||
637 | if (ep->can_dma) { | |
638 | u32 ctrl; | |
639 | ||
640 | usba_writel(udc, INT_ENB, | |
641 | (usba_readl(udc, INT_ENB) | |
642 | | USBA_BF(EPT_INT, 1 << ep->index) | |
643 | | USBA_BF(DMA_INT, 1 << ep->index))); | |
644 | ctrl = USBA_AUTO_VALID | USBA_INTDIS_DMA; | |
645 | usba_ep_writel(ep, CTL_ENB, ctrl); | |
646 | } else { | |
647 | usba_writel(udc, INT_ENB, | |
648 | (usba_readl(udc, INT_ENB) | |
649 | | USBA_BF(EPT_INT, 1 << ep->index))); | |
650 | } | |
651 | ||
652 | spin_unlock_irqrestore(&udc->lock, flags); | |
653 | ||
654 | DBG(DBG_HW, "EPT_CFG%d after init: %#08lx\n", ep->index, | |
655 | (unsigned long)usba_ep_readl(ep, CFG)); | |
656 | DBG(DBG_HW, "INT_ENB after init: %#08lx\n", | |
657 | (unsigned long)usba_readl(udc, INT_ENB)); | |
658 | ||
659 | return 0; | |
660 | } | |
661 | ||
662 | static int usba_ep_disable(struct usb_ep *_ep) | |
663 | { | |
664 | struct usba_ep *ep = to_usba_ep(_ep); | |
665 | struct usba_udc *udc = ep->udc; | |
666 | LIST_HEAD(req_list); | |
667 | unsigned long flags; | |
668 | ||
669 | DBG(DBG_GADGET, "ep_disable: %s\n", ep->ep.name); | |
670 | ||
671 | spin_lock_irqsave(&udc->lock, flags); | |
672 | ||
673 | if (!ep->desc) { | |
674 | spin_unlock_irqrestore(&udc->lock, flags); | |
675 | DBG(DBG_ERR, "ep_disable: %s not enabled\n", ep->ep.name); | |
676 | return -EINVAL; | |
677 | } | |
678 | ep->desc = NULL; | |
679 | ||
680 | list_splice_init(&ep->queue, &req_list); | |
681 | if (ep->can_dma) { | |
682 | usba_dma_writel(ep, CONTROL, 0); | |
683 | usba_dma_writel(ep, ADDRESS, 0); | |
684 | usba_dma_readl(ep, STATUS); | |
685 | } | |
686 | usba_ep_writel(ep, CTL_DIS, USBA_EPT_ENABLE); | |
687 | usba_writel(udc, INT_ENB, | |
688 | usba_readl(udc, INT_ENB) | |
689 | & ~USBA_BF(EPT_INT, 1 << ep->index)); | |
690 | ||
691 | request_complete_list(ep, &req_list, -ESHUTDOWN); | |
692 | ||
693 | spin_unlock_irqrestore(&udc->lock, flags); | |
694 | ||
695 | return 0; | |
696 | } | |
697 | ||
698 | static struct usb_request * | |
699 | usba_ep_alloc_request(struct usb_ep *_ep, gfp_t gfp_flags) | |
700 | { | |
701 | struct usba_request *req; | |
702 | ||
703 | DBG(DBG_GADGET, "ep_alloc_request: %p, 0x%x\n", _ep, gfp_flags); | |
704 | ||
705 | req = kzalloc(sizeof(*req), gfp_flags); | |
706 | if (!req) | |
707 | return NULL; | |
708 | ||
709 | INIT_LIST_HEAD(&req->queue); | |
710 | req->req.dma = DMA_ADDR_INVALID; | |
711 | ||
712 | return &req->req; | |
713 | } | |
714 | ||
715 | static void | |
716 | usba_ep_free_request(struct usb_ep *_ep, struct usb_request *_req) | |
717 | { | |
718 | struct usba_request *req = to_usba_req(_req); | |
719 | ||
720 | DBG(DBG_GADGET, "ep_free_request: %p, %p\n", _ep, _req); | |
721 | ||
722 | kfree(req); | |
723 | } | |
724 | ||
725 | static int queue_dma(struct usba_udc *udc, struct usba_ep *ep, | |
726 | struct usba_request *req, gfp_t gfp_flags) | |
727 | { | |
728 | unsigned long flags; | |
729 | int ret; | |
730 | ||
731 | DBG(DBG_DMA, "%s: req l/%u d/%08x %c%c%c\n", | |
732 | ep->ep.name, req->req.length, req->req.dma, | |
733 | req->req.zero ? 'Z' : 'z', | |
734 | req->req.short_not_ok ? 'S' : 's', | |
735 | req->req.no_interrupt ? 'I' : 'i'); | |
736 | ||
737 | if (req->req.length > 0x10000) { | |
738 | /* Lengths from 0 to 65536 (inclusive) are supported */ | |
739 | DBG(DBG_ERR, "invalid request length %u\n", req->req.length); | |
740 | return -EINVAL; | |
741 | } | |
742 | ||
743 | req->using_dma = 1; | |
744 | ||
745 | if (req->req.dma == DMA_ADDR_INVALID) { | |
746 | req->req.dma = dma_map_single( | |
747 | &udc->pdev->dev, req->req.buf, req->req.length, | |
748 | ep->is_in ? DMA_TO_DEVICE : DMA_FROM_DEVICE); | |
749 | req->mapped = 1; | |
750 | } else { | |
751 | dma_sync_single_for_device( | |
752 | &udc->pdev->dev, req->req.dma, req->req.length, | |
753 | ep->is_in ? DMA_TO_DEVICE : DMA_FROM_DEVICE); | |
754 | req->mapped = 0; | |
755 | } | |
756 | ||
757 | req->ctrl = USBA_BF(DMA_BUF_LEN, req->req.length) | |
758 | | USBA_DMA_CH_EN | USBA_DMA_END_BUF_IE | |
759 | | USBA_DMA_END_TR_EN | USBA_DMA_END_TR_IE; | |
760 | ||
761 | if (ep->is_in) | |
762 | req->ctrl |= USBA_DMA_END_BUF_EN; | |
763 | ||
764 | /* | |
765 | * Add this request to the queue and submit for DMA if | |
766 | * possible. Check if we're still alive first -- we may have | |
767 | * received a reset since last time we checked. | |
768 | */ | |
769 | ret = -ESHUTDOWN; | |
770 | spin_lock_irqsave(&udc->lock, flags); | |
771 | if (ep->desc) { | |
772 | if (list_empty(&ep->queue)) | |
773 | submit_request(ep, req); | |
774 | ||
775 | list_add_tail(&req->queue, &ep->queue); | |
776 | ret = 0; | |
777 | } | |
778 | spin_unlock_irqrestore(&udc->lock, flags); | |
779 | ||
780 | return ret; | |
781 | } | |
782 | ||
783 | static int | |
784 | usba_ep_queue(struct usb_ep *_ep, struct usb_request *_req, gfp_t gfp_flags) | |
785 | { | |
786 | struct usba_request *req = to_usba_req(_req); | |
787 | struct usba_ep *ep = to_usba_ep(_ep); | |
788 | struct usba_udc *udc = ep->udc; | |
789 | unsigned long flags; | |
790 | int ret; | |
791 | ||
792 | DBG(DBG_GADGET | DBG_QUEUE | DBG_REQ, "%s: queue req %p, len %u\n", | |
793 | ep->ep.name, req, _req->length); | |
794 | ||
795 | if (!udc->driver || udc->gadget.speed == USB_SPEED_UNKNOWN || !ep->desc) | |
796 | return -ESHUTDOWN; | |
797 | ||
798 | req->submitted = 0; | |
799 | req->using_dma = 0; | |
800 | req->last_transaction = 0; | |
801 | ||
802 | _req->status = -EINPROGRESS; | |
803 | _req->actual = 0; | |
804 | ||
805 | if (ep->can_dma) | |
806 | return queue_dma(udc, ep, req, gfp_flags); | |
807 | ||
808 | /* May have received a reset since last time we checked */ | |
809 | ret = -ESHUTDOWN; | |
810 | spin_lock_irqsave(&udc->lock, flags); | |
811 | if (ep->desc) { | |
812 | list_add_tail(&req->queue, &ep->queue); | |
813 | ||
814 | if (ep->is_in || (ep_is_control(ep) | |
815 | && (ep->state == DATA_STAGE_IN | |
816 | || ep->state == STATUS_STAGE_IN))) | |
817 | usba_ep_writel(ep, CTL_ENB, USBA_TX_PK_RDY); | |
818 | else | |
819 | usba_ep_writel(ep, CTL_ENB, USBA_RX_BK_RDY); | |
820 | ret = 0; | |
821 | } | |
822 | spin_unlock_irqrestore(&udc->lock, flags); | |
823 | ||
824 | return ret; | |
825 | } | |
826 | ||
827 | static void | |
828 | usba_update_req(struct usba_ep *ep, struct usba_request *req, u32 status) | |
829 | { | |
830 | req->req.actual = req->req.length - USBA_BFEXT(DMA_BUF_LEN, status); | |
831 | } | |
832 | ||
833 | static int stop_dma(struct usba_ep *ep, u32 *pstatus) | |
834 | { | |
835 | unsigned int timeout; | |
836 | u32 status; | |
837 | ||
838 | /* | |
839 | * Stop the DMA controller. When writing both CH_EN | |
840 | * and LINK to 0, the other bits are not affected. | |
841 | */ | |
842 | usba_dma_writel(ep, CONTROL, 0); | |
843 | ||
844 | /* Wait for the FIFO to empty */ | |
845 | for (timeout = 40; timeout; --timeout) { | |
846 | status = usba_dma_readl(ep, STATUS); | |
847 | if (!(status & USBA_DMA_CH_EN)) | |
848 | break; | |
849 | udelay(1); | |
850 | } | |
851 | ||
852 | if (pstatus) | |
853 | *pstatus = status; | |
854 | ||
855 | if (timeout == 0) { | |
856 | dev_err(&ep->udc->pdev->dev, | |
857 | "%s: timed out waiting for DMA FIFO to empty\n", | |
858 | ep->ep.name); | |
859 | return -ETIMEDOUT; | |
860 | } | |
861 | ||
862 | return 0; | |
863 | } | |
864 | ||
865 | static int usba_ep_dequeue(struct usb_ep *_ep, struct usb_request *_req) | |
866 | { | |
867 | struct usba_ep *ep = to_usba_ep(_ep); | |
868 | struct usba_udc *udc = ep->udc; | |
869 | struct usba_request *req = to_usba_req(_req); | |
870 | unsigned long flags; | |
871 | u32 status; | |
872 | ||
873 | DBG(DBG_GADGET | DBG_QUEUE, "ep_dequeue: %s, req %p\n", | |
874 | ep->ep.name, req); | |
875 | ||
876 | spin_lock_irqsave(&udc->lock, flags); | |
877 | ||
878 | if (req->using_dma) { | |
879 | /* | |
880 | * If this request is currently being transferred, | |
881 | * stop the DMA controller and reset the FIFO. | |
882 | */ | |
883 | if (ep->queue.next == &req->queue) { | |
884 | status = usba_dma_readl(ep, STATUS); | |
885 | if (status & USBA_DMA_CH_EN) | |
886 | stop_dma(ep, &status); | |
887 | ||
888 | #ifdef CONFIG_USB_GADGET_DEBUG_FS | |
889 | ep->last_dma_status = status; | |
890 | #endif | |
891 | ||
892 | usba_writel(udc, EPT_RST, 1 << ep->index); | |
893 | ||
894 | usba_update_req(ep, req, status); | |
895 | } | |
896 | } | |
897 | ||
898 | /* | |
899 | * Errors should stop the queue from advancing until the | |
900 | * completion function returns. | |
901 | */ | |
902 | list_del_init(&req->queue); | |
903 | ||
904 | request_complete(ep, req, -ECONNRESET); | |
905 | ||
906 | /* Process the next request if any */ | |
907 | submit_next_request(ep); | |
908 | spin_unlock_irqrestore(&udc->lock, flags); | |
909 | ||
910 | return 0; | |
911 | } | |
912 | ||
913 | static int usba_ep_set_halt(struct usb_ep *_ep, int value) | |
914 | { | |
915 | struct usba_ep *ep = to_usba_ep(_ep); | |
916 | struct usba_udc *udc = ep->udc; | |
917 | unsigned long flags; | |
918 | int ret = 0; | |
919 | ||
920 | DBG(DBG_GADGET, "endpoint %s: %s HALT\n", ep->ep.name, | |
921 | value ? "set" : "clear"); | |
922 | ||
923 | if (!ep->desc) { | |
924 | DBG(DBG_ERR, "Attempted to halt uninitialized ep %s\n", | |
925 | ep->ep.name); | |
926 | return -ENODEV; | |
927 | } | |
928 | if (ep->is_isoc) { | |
929 | DBG(DBG_ERR, "Attempted to halt isochronous ep %s\n", | |
930 | ep->ep.name); | |
931 | return -ENOTTY; | |
932 | } | |
933 | ||
934 | spin_lock_irqsave(&udc->lock, flags); | |
935 | ||
936 | /* | |
937 | * We can't halt IN endpoints while there are still data to be | |
938 | * transferred | |
939 | */ | |
940 | if (!list_empty(&ep->queue) | |
941 | || ((value && ep->is_in && (usba_ep_readl(ep, STA) | |
942 | & USBA_BF(BUSY_BANKS, -1L))))) { | |
943 | ret = -EAGAIN; | |
944 | } else { | |
945 | if (value) | |
946 | usba_ep_writel(ep, SET_STA, USBA_FORCE_STALL); | |
947 | else | |
948 | usba_ep_writel(ep, CLR_STA, | |
949 | USBA_FORCE_STALL | USBA_TOGGLE_CLR); | |
950 | usba_ep_readl(ep, STA); | |
951 | } | |
952 | ||
953 | spin_unlock_irqrestore(&udc->lock, flags); | |
954 | ||
955 | return ret; | |
956 | } | |
957 | ||
958 | static int usba_ep_fifo_status(struct usb_ep *_ep) | |
959 | { | |
960 | struct usba_ep *ep = to_usba_ep(_ep); | |
961 | ||
962 | return USBA_BFEXT(BYTE_COUNT, usba_ep_readl(ep, STA)); | |
963 | } | |
964 | ||
965 | static void usba_ep_fifo_flush(struct usb_ep *_ep) | |
966 | { | |
967 | struct usba_ep *ep = to_usba_ep(_ep); | |
968 | struct usba_udc *udc = ep->udc; | |
969 | ||
970 | usba_writel(udc, EPT_RST, 1 << ep->index); | |
971 | } | |
972 | ||
973 | static const struct usb_ep_ops usba_ep_ops = { | |
974 | .enable = usba_ep_enable, | |
975 | .disable = usba_ep_disable, | |
976 | .alloc_request = usba_ep_alloc_request, | |
977 | .free_request = usba_ep_free_request, | |
978 | .queue = usba_ep_queue, | |
979 | .dequeue = usba_ep_dequeue, | |
980 | .set_halt = usba_ep_set_halt, | |
981 | .fifo_status = usba_ep_fifo_status, | |
982 | .fifo_flush = usba_ep_fifo_flush, | |
983 | }; | |
984 | ||
985 | static int usba_udc_get_frame(struct usb_gadget *gadget) | |
986 | { | |
987 | struct usba_udc *udc = to_usba_udc(gadget); | |
988 | ||
989 | return USBA_BFEXT(FRAME_NUMBER, usba_readl(udc, FNUM)); | |
990 | } | |
991 | ||
58ed7b94 HS |
992 | static int usba_udc_wakeup(struct usb_gadget *gadget) |
993 | { | |
994 | struct usba_udc *udc = to_usba_udc(gadget); | |
995 | unsigned long flags; | |
996 | u32 ctrl; | |
997 | int ret = -EINVAL; | |
998 | ||
999 | spin_lock_irqsave(&udc->lock, flags); | |
1000 | if (udc->devstatus & (1 << USB_DEVICE_REMOTE_WAKEUP)) { | |
1001 | ctrl = usba_readl(udc, CTRL); | |
1002 | usba_writel(udc, CTRL, ctrl | USBA_REMOTE_WAKE_UP); | |
1003 | ret = 0; | |
1004 | } | |
1005 | spin_unlock_irqrestore(&udc->lock, flags); | |
1006 | ||
1007 | return ret; | |
1008 | } | |
1009 | ||
1010 | static int | |
1011 | usba_udc_set_selfpowered(struct usb_gadget *gadget, int is_selfpowered) | |
1012 | { | |
1013 | struct usba_udc *udc = to_usba_udc(gadget); | |
1014 | unsigned long flags; | |
1015 | ||
1016 | spin_lock_irqsave(&udc->lock, flags); | |
1017 | if (is_selfpowered) | |
1018 | udc->devstatus |= 1 << USB_DEVICE_SELF_POWERED; | |
1019 | else | |
1020 | udc->devstatus &= ~(1 << USB_DEVICE_SELF_POWERED); | |
1021 | spin_unlock_irqrestore(&udc->lock, flags); | |
1022 | ||
1023 | return 0; | |
1024 | } | |
1025 | ||
914a3f3b | 1026 | static const struct usb_gadget_ops usba_udc_ops = { |
58ed7b94 HS |
1027 | .get_frame = usba_udc_get_frame, |
1028 | .wakeup = usba_udc_wakeup, | |
1029 | .set_selfpowered = usba_udc_set_selfpowered, | |
914a3f3b HS |
1030 | }; |
1031 | ||
1032 | #define EP(nam, idx, maxpkt, maxbk, dma, isoc) \ | |
1033 | { \ | |
1034 | .ep = { \ | |
1035 | .ops = &usba_ep_ops, \ | |
1036 | .name = nam, \ | |
1037 | .maxpacket = maxpkt, \ | |
1038 | }, \ | |
1039 | .udc = &the_udc, \ | |
1040 | .queue = LIST_HEAD_INIT(usba_ep[idx].queue), \ | |
1041 | .fifo_size = maxpkt, \ | |
1042 | .nr_banks = maxbk, \ | |
1043 | .index = idx, \ | |
1044 | .can_dma = dma, \ | |
1045 | .can_isoc = isoc, \ | |
1046 | } | |
1047 | ||
1048 | static struct usba_ep usba_ep[] = { | |
1049 | EP("ep0", 0, 64, 1, 0, 0), | |
1050 | EP("ep1in-bulk", 1, 512, 2, 1, 1), | |
1051 | EP("ep2out-bulk", 2, 512, 2, 1, 1), | |
1052 | EP("ep3in-int", 3, 64, 3, 1, 0), | |
1053 | EP("ep4out-int", 4, 64, 3, 1, 0), | |
1054 | EP("ep5in-iso", 5, 1024, 3, 1, 1), | |
1055 | EP("ep6out-iso", 6, 1024, 3, 1, 1), | |
1056 | }; | |
1057 | #undef EP | |
1058 | ||
1059 | static struct usb_endpoint_descriptor usba_ep0_desc = { | |
1060 | .bLength = USB_DT_ENDPOINT_SIZE, | |
1061 | .bDescriptorType = USB_DT_ENDPOINT, | |
1062 | .bEndpointAddress = 0, | |
1063 | .bmAttributes = USB_ENDPOINT_XFER_CONTROL, | |
1064 | .wMaxPacketSize = __constant_cpu_to_le16(64), | |
1065 | /* FIXME: I have no idea what to put here */ | |
1066 | .bInterval = 1, | |
1067 | }; | |
1068 | ||
1069 | static void nop_release(struct device *dev) | |
1070 | { | |
1071 | ||
1072 | } | |
1073 | ||
1074 | static struct usba_udc the_udc = { | |
1075 | .gadget = { | |
1076 | .ops = &usba_udc_ops, | |
1077 | .ep0 = &usba_ep[0].ep, | |
1078 | .ep_list = LIST_HEAD_INIT(the_udc.gadget.ep_list), | |
1079 | .is_dualspeed = 1, | |
1080 | .name = "atmel_usba_udc", | |
1081 | .dev = { | |
1082 | .bus_id = "gadget", | |
1083 | .release = nop_release, | |
1084 | }, | |
1085 | }, | |
1086 | ||
1087 | .lock = SPIN_LOCK_UNLOCKED, | |
1088 | }; | |
1089 | ||
1090 | /* | |
1091 | * Called with interrupts disabled and udc->lock held. | |
1092 | */ | |
1093 | static void reset_all_endpoints(struct usba_udc *udc) | |
1094 | { | |
1095 | struct usba_ep *ep; | |
1096 | struct usba_request *req, *tmp_req; | |
1097 | ||
1098 | usba_writel(udc, EPT_RST, ~0UL); | |
1099 | ||
1100 | ep = to_usba_ep(udc->gadget.ep0); | |
1101 | list_for_each_entry_safe(req, tmp_req, &ep->queue, queue) { | |
1102 | list_del_init(&req->queue); | |
1103 | request_complete(ep, req, -ECONNRESET); | |
1104 | } | |
1105 | ||
1106 | list_for_each_entry(ep, &udc->gadget.ep_list, ep.ep_list) { | |
58ed7b94 HS |
1107 | if (ep->desc) { |
1108 | spin_unlock(&udc->lock); | |
914a3f3b | 1109 | usba_ep_disable(&ep->ep); |
58ed7b94 HS |
1110 | spin_lock(&udc->lock); |
1111 | } | |
914a3f3b HS |
1112 | } |
1113 | } | |
1114 | ||
1115 | static struct usba_ep *get_ep_by_addr(struct usba_udc *udc, u16 wIndex) | |
1116 | { | |
1117 | struct usba_ep *ep; | |
1118 | ||
1119 | if ((wIndex & USB_ENDPOINT_NUMBER_MASK) == 0) | |
1120 | return to_usba_ep(udc->gadget.ep0); | |
1121 | ||
1122 | list_for_each_entry (ep, &udc->gadget.ep_list, ep.ep_list) { | |
1123 | u8 bEndpointAddress; | |
1124 | ||
1125 | if (!ep->desc) | |
1126 | continue; | |
1127 | bEndpointAddress = ep->desc->bEndpointAddress; | |
1128 | if ((wIndex ^ bEndpointAddress) & USB_DIR_IN) | |
1129 | continue; | |
1130 | if ((bEndpointAddress & USB_ENDPOINT_NUMBER_MASK) | |
1131 | == (wIndex & USB_ENDPOINT_NUMBER_MASK)) | |
1132 | return ep; | |
1133 | } | |
1134 | ||
1135 | return NULL; | |
1136 | } | |
1137 | ||
1138 | /* Called with interrupts disabled and udc->lock held */ | |
1139 | static inline void set_protocol_stall(struct usba_udc *udc, struct usba_ep *ep) | |
1140 | { | |
1141 | usba_ep_writel(ep, SET_STA, USBA_FORCE_STALL); | |
1142 | ep->state = WAIT_FOR_SETUP; | |
1143 | } | |
1144 | ||
1145 | static inline int is_stalled(struct usba_udc *udc, struct usba_ep *ep) | |
1146 | { | |
1147 | if (usba_ep_readl(ep, STA) & USBA_FORCE_STALL) | |
1148 | return 1; | |
1149 | return 0; | |
1150 | } | |
1151 | ||
1152 | static inline void set_address(struct usba_udc *udc, unsigned int addr) | |
1153 | { | |
1154 | u32 regval; | |
1155 | ||
1156 | DBG(DBG_BUS, "setting address %u...\n", addr); | |
1157 | regval = usba_readl(udc, CTRL); | |
1158 | regval = USBA_BFINS(DEV_ADDR, addr, regval); | |
1159 | usba_writel(udc, CTRL, regval); | |
1160 | } | |
1161 | ||
1162 | static int do_test_mode(struct usba_udc *udc) | |
1163 | { | |
1164 | static const char test_packet_buffer[] = { | |
1165 | /* JKJKJKJK * 9 */ | |
1166 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | |
1167 | /* JJKKJJKK * 8 */ | |
1168 | 0xAA, 0xAA, 0xAA, 0xAA, 0xAA, 0xAA, 0xAA, 0xAA, | |
1169 | /* JJKKJJKK * 8 */ | |
1170 | 0xEE, 0xEE, 0xEE, 0xEE, 0xEE, 0xEE, 0xEE, 0xEE, | |
1171 | /* JJJJJJJKKKKKKK * 8 */ | |
1172 | 0xFE, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, | |
1173 | 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, | |
1174 | /* JJJJJJJK * 8 */ | |
1175 | 0x7F, 0xBF, 0xDF, 0xEF, 0xF7, 0xFB, 0xFD, | |
1176 | /* {JKKKKKKK * 10}, JK */ | |
1177 | 0xFC, 0x7E, 0xBF, 0xDF, 0xEF, 0xF7, 0xFB, 0xFD, 0x7E | |
1178 | }; | |
1179 | struct usba_ep *ep; | |
1180 | struct device *dev = &udc->pdev->dev; | |
1181 | int test_mode; | |
1182 | ||
1183 | test_mode = udc->test_mode; | |
1184 | ||
1185 | /* Start from a clean slate */ | |
1186 | reset_all_endpoints(udc); | |
1187 | ||
1188 | switch (test_mode) { | |
1189 | case 0x0100: | |
1190 | /* Test_J */ | |
1191 | usba_writel(udc, TST, USBA_TST_J_MODE); | |
1192 | dev_info(dev, "Entering Test_J mode...\n"); | |
1193 | break; | |
1194 | case 0x0200: | |
1195 | /* Test_K */ | |
1196 | usba_writel(udc, TST, USBA_TST_K_MODE); | |
1197 | dev_info(dev, "Entering Test_K mode...\n"); | |
1198 | break; | |
1199 | case 0x0300: | |
1200 | /* | |
1201 | * Test_SE0_NAK: Force high-speed mode and set up ep0 | |
1202 | * for Bulk IN transfers | |
1203 | */ | |
1204 | ep = &usba_ep[0]; | |
1205 | usba_writel(udc, TST, | |
1206 | USBA_BF(SPEED_CFG, USBA_SPEED_CFG_FORCE_HIGH)); | |
1207 | usba_ep_writel(ep, CFG, | |
1208 | USBA_BF(EPT_SIZE, USBA_EPT_SIZE_64) | |
1209 | | USBA_EPT_DIR_IN | |
1210 | | USBA_BF(EPT_TYPE, USBA_EPT_TYPE_BULK) | |
1211 | | USBA_BF(BK_NUMBER, 1)); | |
1212 | if (!(usba_ep_readl(ep, CFG) & USBA_EPT_MAPPED)) { | |
1213 | set_protocol_stall(udc, ep); | |
1214 | dev_err(dev, "Test_SE0_NAK: ep0 not mapped\n"); | |
1215 | } else { | |
1216 | usba_ep_writel(ep, CTL_ENB, USBA_EPT_ENABLE); | |
1217 | dev_info(dev, "Entering Test_SE0_NAK mode...\n"); | |
1218 | } | |
1219 | break; | |
1220 | case 0x0400: | |
1221 | /* Test_Packet */ | |
1222 | ep = &usba_ep[0]; | |
1223 | usba_ep_writel(ep, CFG, | |
1224 | USBA_BF(EPT_SIZE, USBA_EPT_SIZE_64) | |
1225 | | USBA_EPT_DIR_IN | |
1226 | | USBA_BF(EPT_TYPE, USBA_EPT_TYPE_BULK) | |
1227 | | USBA_BF(BK_NUMBER, 1)); | |
1228 | if (!(usba_ep_readl(ep, CFG) & USBA_EPT_MAPPED)) { | |
1229 | set_protocol_stall(udc, ep); | |
1230 | dev_err(dev, "Test_Packet: ep0 not mapped\n"); | |
1231 | } else { | |
1232 | usba_ep_writel(ep, CTL_ENB, USBA_EPT_ENABLE); | |
1233 | usba_writel(udc, TST, USBA_TST_PKT_MODE); | |
1234 | copy_to_fifo(ep->fifo, test_packet_buffer, | |
1235 | sizeof(test_packet_buffer)); | |
1236 | usba_ep_writel(ep, SET_STA, USBA_TX_PK_RDY); | |
1237 | dev_info(dev, "Entering Test_Packet mode...\n"); | |
1238 | } | |
1239 | break; | |
1240 | default: | |
1241 | dev_err(dev, "Invalid test mode: 0x%04x\n", test_mode); | |
1242 | return -EINVAL; | |
1243 | } | |
1244 | ||
1245 | return 0; | |
1246 | } | |
1247 | ||
1248 | /* Avoid overly long expressions */ | |
1249 | static inline bool feature_is_dev_remote_wakeup(struct usb_ctrlrequest *crq) | |
1250 | { | |
1251 | if (crq->wValue == __constant_cpu_to_le16(USB_DEVICE_REMOTE_WAKEUP)) | |
1252 | return true; | |
1253 | return false; | |
1254 | } | |
1255 | ||
1256 | static inline bool feature_is_dev_test_mode(struct usb_ctrlrequest *crq) | |
1257 | { | |
1258 | if (crq->wValue == __constant_cpu_to_le16(USB_DEVICE_TEST_MODE)) | |
1259 | return true; | |
1260 | return false; | |
1261 | } | |
1262 | ||
1263 | static inline bool feature_is_ep_halt(struct usb_ctrlrequest *crq) | |
1264 | { | |
1265 | if (crq->wValue == __constant_cpu_to_le16(USB_ENDPOINT_HALT)) | |
1266 | return true; | |
1267 | return false; | |
1268 | } | |
1269 | ||
1270 | static int handle_ep0_setup(struct usba_udc *udc, struct usba_ep *ep, | |
1271 | struct usb_ctrlrequest *crq) | |
1272 | { | |
1273 | int retval = 0;; | |
1274 | ||
1275 | switch (crq->bRequest) { | |
1276 | case USB_REQ_GET_STATUS: { | |
1277 | u16 status; | |
1278 | ||
1279 | if (crq->bRequestType == (USB_DIR_IN | USB_RECIP_DEVICE)) { | |
58ed7b94 | 1280 | status = cpu_to_le16(udc->devstatus); |
914a3f3b HS |
1281 | } else if (crq->bRequestType |
1282 | == (USB_DIR_IN | USB_RECIP_INTERFACE)) { | |
1283 | status = __constant_cpu_to_le16(0); | |
1284 | } else if (crq->bRequestType | |
1285 | == (USB_DIR_IN | USB_RECIP_ENDPOINT)) { | |
1286 | struct usba_ep *target; | |
1287 | ||
1288 | target = get_ep_by_addr(udc, le16_to_cpu(crq->wIndex)); | |
1289 | if (!target) | |
1290 | goto stall; | |
1291 | ||
1292 | status = 0; | |
1293 | if (is_stalled(udc, target)) | |
1294 | status |= __constant_cpu_to_le16(1); | |
1295 | } else | |
1296 | goto delegate; | |
1297 | ||
1298 | /* Write directly to the FIFO. No queueing is done. */ | |
1299 | if (crq->wLength != __constant_cpu_to_le16(sizeof(status))) | |
1300 | goto stall; | |
1301 | ep->state = DATA_STAGE_IN; | |
1302 | __raw_writew(status, ep->fifo); | |
1303 | usba_ep_writel(ep, SET_STA, USBA_TX_PK_RDY); | |
1304 | break; | |
1305 | } | |
1306 | ||
1307 | case USB_REQ_CLEAR_FEATURE: { | |
1308 | if (crq->bRequestType == USB_RECIP_DEVICE) { | |
58ed7b94 HS |
1309 | if (feature_is_dev_remote_wakeup(crq)) |
1310 | udc->devstatus | |
1311 | &= ~(1 << USB_DEVICE_REMOTE_WAKEUP); | |
1312 | else | |
914a3f3b HS |
1313 | /* Can't CLEAR_FEATURE TEST_MODE */ |
1314 | goto stall; | |
914a3f3b HS |
1315 | } else if (crq->bRequestType == USB_RECIP_ENDPOINT) { |
1316 | struct usba_ep *target; | |
1317 | ||
1318 | if (crq->wLength != __constant_cpu_to_le16(0) | |
1319 | || !feature_is_ep_halt(crq)) | |
1320 | goto stall; | |
1321 | target = get_ep_by_addr(udc, le16_to_cpu(crq->wIndex)); | |
1322 | if (!target) | |
1323 | goto stall; | |
1324 | ||
1325 | usba_ep_writel(target, CLR_STA, USBA_FORCE_STALL); | |
1326 | if (target->index != 0) | |
1327 | usba_ep_writel(target, CLR_STA, | |
1328 | USBA_TOGGLE_CLR); | |
1329 | } else { | |
1330 | goto delegate; | |
1331 | } | |
1332 | ||
1333 | send_status(udc, ep); | |
1334 | break; | |
1335 | } | |
1336 | ||
1337 | case USB_REQ_SET_FEATURE: { | |
1338 | if (crq->bRequestType == USB_RECIP_DEVICE) { | |
1339 | if (feature_is_dev_test_mode(crq)) { | |
1340 | send_status(udc, ep); | |
1341 | ep->state = STATUS_STAGE_TEST; | |
1342 | udc->test_mode = le16_to_cpu(crq->wIndex); | |
1343 | return 0; | |
1344 | } else if (feature_is_dev_remote_wakeup(crq)) { | |
58ed7b94 | 1345 | udc->devstatus |= 1 << USB_DEVICE_REMOTE_WAKEUP; |
914a3f3b HS |
1346 | } else { |
1347 | goto stall; | |
1348 | } | |
1349 | } else if (crq->bRequestType == USB_RECIP_ENDPOINT) { | |
1350 | struct usba_ep *target; | |
1351 | ||
1352 | if (crq->wLength != __constant_cpu_to_le16(0) | |
1353 | || !feature_is_ep_halt(crq)) | |
1354 | goto stall; | |
1355 | ||
1356 | target = get_ep_by_addr(udc, le16_to_cpu(crq->wIndex)); | |
1357 | if (!target) | |
1358 | goto stall; | |
1359 | ||
1360 | usba_ep_writel(target, SET_STA, USBA_FORCE_STALL); | |
1361 | } else | |
1362 | goto delegate; | |
1363 | ||
1364 | send_status(udc, ep); | |
1365 | break; | |
1366 | } | |
1367 | ||
1368 | case USB_REQ_SET_ADDRESS: | |
1369 | if (crq->bRequestType != (USB_DIR_OUT | USB_RECIP_DEVICE)) | |
1370 | goto delegate; | |
1371 | ||
1372 | set_address(udc, le16_to_cpu(crq->wValue)); | |
1373 | send_status(udc, ep); | |
1374 | ep->state = STATUS_STAGE_ADDR; | |
1375 | break; | |
1376 | ||
1377 | default: | |
1378 | delegate: | |
1379 | spin_unlock(&udc->lock); | |
1380 | retval = udc->driver->setup(&udc->gadget, crq); | |
1381 | spin_lock(&udc->lock); | |
1382 | } | |
1383 | ||
1384 | return retval; | |
1385 | ||
1386 | stall: | |
1387 | printk(KERN_ERR | |
1388 | "udc: %s: Invalid setup request: %02x.%02x v%04x i%04x l%d, " | |
1389 | "halting endpoint...\n", | |
1390 | ep->ep.name, crq->bRequestType, crq->bRequest, | |
1391 | le16_to_cpu(crq->wValue), le16_to_cpu(crq->wIndex), | |
1392 | le16_to_cpu(crq->wLength)); | |
1393 | set_protocol_stall(udc, ep); | |
1394 | return -1; | |
1395 | } | |
1396 | ||
1397 | static void usba_control_irq(struct usba_udc *udc, struct usba_ep *ep) | |
1398 | { | |
1399 | struct usba_request *req; | |
1400 | u32 epstatus; | |
1401 | u32 epctrl; | |
1402 | ||
1403 | restart: | |
1404 | epstatus = usba_ep_readl(ep, STA); | |
1405 | epctrl = usba_ep_readl(ep, CTL); | |
1406 | ||
1407 | DBG(DBG_INT, "%s [%d]: s/%08x c/%08x\n", | |
1408 | ep->ep.name, ep->state, epstatus, epctrl); | |
1409 | ||
1410 | req = NULL; | |
1411 | if (!list_empty(&ep->queue)) | |
1412 | req = list_entry(ep->queue.next, | |
1413 | struct usba_request, queue); | |
1414 | ||
1415 | if ((epctrl & USBA_TX_PK_RDY) && !(epstatus & USBA_TX_PK_RDY)) { | |
1416 | if (req->submitted) | |
1417 | next_fifo_transaction(ep, req); | |
1418 | else | |
1419 | submit_request(ep, req); | |
1420 | ||
1421 | if (req->last_transaction) { | |
1422 | usba_ep_writel(ep, CTL_DIS, USBA_TX_PK_RDY); | |
1423 | usba_ep_writel(ep, CTL_ENB, USBA_TX_COMPLETE); | |
1424 | } | |
1425 | goto restart; | |
1426 | } | |
1427 | if ((epstatus & epctrl) & USBA_TX_COMPLETE) { | |
1428 | usba_ep_writel(ep, CLR_STA, USBA_TX_COMPLETE); | |
1429 | ||
1430 | switch (ep->state) { | |
1431 | case DATA_STAGE_IN: | |
1432 | usba_ep_writel(ep, CTL_ENB, USBA_RX_BK_RDY); | |
1433 | usba_ep_writel(ep, CTL_DIS, USBA_TX_COMPLETE); | |
1434 | ep->state = STATUS_STAGE_OUT; | |
1435 | break; | |
1436 | case STATUS_STAGE_ADDR: | |
1437 | /* Activate our new address */ | |
1438 | usba_writel(udc, CTRL, (usba_readl(udc, CTRL) | |
1439 | | USBA_FADDR_EN)); | |
1440 | usba_ep_writel(ep, CTL_DIS, USBA_TX_COMPLETE); | |
1441 | ep->state = WAIT_FOR_SETUP; | |
1442 | break; | |
1443 | case STATUS_STAGE_IN: | |
1444 | if (req) { | |
1445 | list_del_init(&req->queue); | |
1446 | request_complete(ep, req, 0); | |
1447 | submit_next_request(ep); | |
1448 | } | |
1449 | usba_ep_writel(ep, CTL_DIS, USBA_TX_COMPLETE); | |
1450 | ep->state = WAIT_FOR_SETUP; | |
1451 | break; | |
1452 | case STATUS_STAGE_TEST: | |
1453 | usba_ep_writel(ep, CTL_DIS, USBA_TX_COMPLETE); | |
1454 | ep->state = WAIT_FOR_SETUP; | |
1455 | if (do_test_mode(udc)) | |
1456 | set_protocol_stall(udc, ep); | |
1457 | break; | |
1458 | default: | |
1459 | printk(KERN_ERR | |
1460 | "udc: %s: TXCOMP: Invalid endpoint state %d, " | |
1461 | "halting endpoint...\n", | |
1462 | ep->ep.name, ep->state); | |
1463 | set_protocol_stall(udc, ep); | |
1464 | break; | |
1465 | } | |
1466 | ||
1467 | goto restart; | |
1468 | } | |
1469 | if ((epstatus & epctrl) & USBA_RX_BK_RDY) { | |
1470 | switch (ep->state) { | |
1471 | case STATUS_STAGE_OUT: | |
1472 | usba_ep_writel(ep, CLR_STA, USBA_RX_BK_RDY); | |
1473 | usba_ep_writel(ep, CTL_DIS, USBA_RX_BK_RDY); | |
1474 | ||
1475 | if (req) { | |
1476 | list_del_init(&req->queue); | |
1477 | request_complete(ep, req, 0); | |
1478 | } | |
1479 | ep->state = WAIT_FOR_SETUP; | |
1480 | break; | |
1481 | ||
1482 | case DATA_STAGE_OUT: | |
1483 | receive_data(ep); | |
1484 | break; | |
1485 | ||
1486 | default: | |
1487 | usba_ep_writel(ep, CLR_STA, USBA_RX_BK_RDY); | |
1488 | usba_ep_writel(ep, CTL_DIS, USBA_RX_BK_RDY); | |
1489 | printk(KERN_ERR | |
1490 | "udc: %s: RXRDY: Invalid endpoint state %d, " | |
1491 | "halting endpoint...\n", | |
1492 | ep->ep.name, ep->state); | |
1493 | set_protocol_stall(udc, ep); | |
1494 | break; | |
1495 | } | |
1496 | ||
1497 | goto restart; | |
1498 | } | |
1499 | if (epstatus & USBA_RX_SETUP) { | |
1500 | union { | |
1501 | struct usb_ctrlrequest crq; | |
1502 | unsigned long data[2]; | |
1503 | } crq; | |
1504 | unsigned int pkt_len; | |
1505 | int ret; | |
1506 | ||
1507 | if (ep->state != WAIT_FOR_SETUP) { | |
1508 | /* | |
1509 | * Didn't expect a SETUP packet at this | |
1510 | * point. Clean up any pending requests (which | |
1511 | * may be successful). | |
1512 | */ | |
1513 | int status = -EPROTO; | |
1514 | ||
1515 | /* | |
1516 | * RXRDY and TXCOMP are dropped when SETUP | |
1517 | * packets arrive. Just pretend we received | |
1518 | * the status packet. | |
1519 | */ | |
1520 | if (ep->state == STATUS_STAGE_OUT | |
1521 | || ep->state == STATUS_STAGE_IN) { | |
1522 | usba_ep_writel(ep, CTL_DIS, USBA_RX_BK_RDY); | |
1523 | status = 0; | |
1524 | } | |
1525 | ||
1526 | if (req) { | |
1527 | list_del_init(&req->queue); | |
1528 | request_complete(ep, req, status); | |
1529 | } | |
1530 | } | |
1531 | ||
1532 | pkt_len = USBA_BFEXT(BYTE_COUNT, usba_ep_readl(ep, STA)); | |
1533 | DBG(DBG_HW, "Packet length: %u\n", pkt_len); | |
1534 | if (pkt_len != sizeof(crq)) { | |
1535 | printk(KERN_WARNING "udc: Invalid packet length %u " | |
1536 | "(expected %lu)\n", pkt_len, sizeof(crq)); | |
1537 | set_protocol_stall(udc, ep); | |
1538 | return; | |
1539 | } | |
1540 | ||
1541 | DBG(DBG_FIFO, "Copying ctrl request from 0x%p:\n", ep->fifo); | |
1542 | copy_from_fifo(crq.data, ep->fifo, sizeof(crq)); | |
1543 | ||
1544 | /* Free up one bank in the FIFO so that we can | |
1545 | * generate or receive a reply right away. */ | |
1546 | usba_ep_writel(ep, CLR_STA, USBA_RX_SETUP); | |
1547 | ||
1548 | /* printk(KERN_DEBUG "setup: %d: %02x.%02x\n", | |
1549 | ep->state, crq.crq.bRequestType, | |
1550 | crq.crq.bRequest); */ | |
1551 | ||
1552 | if (crq.crq.bRequestType & USB_DIR_IN) { | |
1553 | /* | |
1554 | * The USB 2.0 spec states that "if wLength is | |
1555 | * zero, there is no data transfer phase." | |
1556 | * However, testusb #14 seems to actually | |
1557 | * expect a data phase even if wLength = 0... | |
1558 | */ | |
1559 | ep->state = DATA_STAGE_IN; | |
1560 | } else { | |
1561 | if (crq.crq.wLength != __constant_cpu_to_le16(0)) | |
1562 | ep->state = DATA_STAGE_OUT; | |
1563 | else | |
1564 | ep->state = STATUS_STAGE_IN; | |
1565 | } | |
1566 | ||
1567 | ret = -1; | |
1568 | if (ep->index == 0) | |
1569 | ret = handle_ep0_setup(udc, ep, &crq.crq); | |
1570 | else { | |
1571 | spin_unlock(&udc->lock); | |
1572 | ret = udc->driver->setup(&udc->gadget, &crq.crq); | |
1573 | spin_lock(&udc->lock); | |
1574 | } | |
1575 | ||
1576 | DBG(DBG_BUS, "req %02x.%02x, length %d, state %d, ret %d\n", | |
1577 | crq.crq.bRequestType, crq.crq.bRequest, | |
1578 | le16_to_cpu(crq.crq.wLength), ep->state, ret); | |
1579 | ||
1580 | if (ret < 0) { | |
1581 | /* Let the host know that we failed */ | |
1582 | set_protocol_stall(udc, ep); | |
1583 | } | |
1584 | } | |
1585 | } | |
1586 | ||
1587 | static void usba_ep_irq(struct usba_udc *udc, struct usba_ep *ep) | |
1588 | { | |
1589 | struct usba_request *req; | |
1590 | u32 epstatus; | |
1591 | u32 epctrl; | |
1592 | ||
1593 | epstatus = usba_ep_readl(ep, STA); | |
1594 | epctrl = usba_ep_readl(ep, CTL); | |
1595 | ||
1596 | DBG(DBG_INT, "%s: interrupt, status: 0x%08x\n", ep->ep.name, epstatus); | |
1597 | ||
1598 | while ((epctrl & USBA_TX_PK_RDY) && !(epstatus & USBA_TX_PK_RDY)) { | |
1599 | DBG(DBG_BUS, "%s: TX PK ready\n", ep->ep.name); | |
1600 | ||
1601 | if (list_empty(&ep->queue)) { | |
1602 | dev_warn(&udc->pdev->dev, "ep_irq: queue empty\n"); | |
1603 | usba_ep_writel(ep, CTL_DIS, USBA_TX_PK_RDY); | |
1604 | return; | |
1605 | } | |
1606 | ||
1607 | req = list_entry(ep->queue.next, struct usba_request, queue); | |
1608 | ||
1609 | if (req->using_dma) { | |
1610 | /* Send a zero-length packet */ | |
1611 | usba_ep_writel(ep, SET_STA, | |
1612 | USBA_TX_PK_RDY); | |
1613 | usba_ep_writel(ep, CTL_DIS, | |
1614 | USBA_TX_PK_RDY); | |
1615 | list_del_init(&req->queue); | |
1616 | submit_next_request(ep); | |
1617 | request_complete(ep, req, 0); | |
1618 | } else { | |
1619 | if (req->submitted) | |
1620 | next_fifo_transaction(ep, req); | |
1621 | else | |
1622 | submit_request(ep, req); | |
1623 | ||
1624 | if (req->last_transaction) { | |
1625 | list_del_init(&req->queue); | |
1626 | submit_next_request(ep); | |
1627 | request_complete(ep, req, 0); | |
1628 | } | |
1629 | } | |
1630 | ||
1631 | epstatus = usba_ep_readl(ep, STA); | |
1632 | epctrl = usba_ep_readl(ep, CTL); | |
1633 | } | |
1634 | if ((epstatus & epctrl) & USBA_RX_BK_RDY) { | |
1635 | DBG(DBG_BUS, "%s: RX data ready\n", ep->ep.name); | |
1636 | receive_data(ep); | |
1637 | usba_ep_writel(ep, CLR_STA, USBA_RX_BK_RDY); | |
1638 | } | |
1639 | } | |
1640 | ||
1641 | static void usba_dma_irq(struct usba_udc *udc, struct usba_ep *ep) | |
1642 | { | |
1643 | struct usba_request *req; | |
1644 | u32 status, control, pending; | |
1645 | ||
1646 | status = usba_dma_readl(ep, STATUS); | |
1647 | control = usba_dma_readl(ep, CONTROL); | |
1648 | #ifdef CONFIG_USB_GADGET_DEBUG_FS | |
1649 | ep->last_dma_status = status; | |
1650 | #endif | |
1651 | pending = status & control; | |
1652 | DBG(DBG_INT | DBG_DMA, "dma irq, s/%#08x, c/%#08x\n", status, control); | |
1653 | ||
1654 | if (status & USBA_DMA_CH_EN) { | |
1655 | dev_err(&udc->pdev->dev, | |
1656 | "DMA_CH_EN is set after transfer is finished!\n"); | |
1657 | dev_err(&udc->pdev->dev, | |
1658 | "status=%#08x, pending=%#08x, control=%#08x\n", | |
1659 | status, pending, control); | |
1660 | ||
1661 | /* | |
1662 | * try to pretend nothing happened. We might have to | |
1663 | * do something here... | |
1664 | */ | |
1665 | } | |
1666 | ||
1667 | if (list_empty(&ep->queue)) | |
1668 | /* Might happen if a reset comes along at the right moment */ | |
1669 | return; | |
1670 | ||
1671 | if (pending & (USBA_DMA_END_TR_ST | USBA_DMA_END_BUF_ST)) { | |
1672 | req = list_entry(ep->queue.next, struct usba_request, queue); | |
1673 | usba_update_req(ep, req, status); | |
1674 | ||
1675 | list_del_init(&req->queue); | |
1676 | submit_next_request(ep); | |
1677 | request_complete(ep, req, 0); | |
1678 | } | |
1679 | } | |
1680 | ||
1681 | static irqreturn_t usba_udc_irq(int irq, void *devid) | |
1682 | { | |
1683 | struct usba_udc *udc = devid; | |
1684 | u32 status; | |
1685 | u32 dma_status; | |
1686 | u32 ep_status; | |
1687 | ||
1688 | spin_lock(&udc->lock); | |
1689 | ||
1690 | status = usba_readl(udc, INT_STA); | |
1691 | DBG(DBG_INT, "irq, status=%#08x\n", status); | |
1692 | ||
1693 | if (status & USBA_DET_SUSPEND) { | |
1694 | usba_writel(udc, INT_CLR, USBA_DET_SUSPEND); | |
1695 | DBG(DBG_BUS, "Suspend detected\n"); | |
1696 | if (udc->gadget.speed != USB_SPEED_UNKNOWN | |
1697 | && udc->driver && udc->driver->suspend) { | |
1698 | spin_unlock(&udc->lock); | |
1699 | udc->driver->suspend(&udc->gadget); | |
1700 | spin_lock(&udc->lock); | |
1701 | } | |
1702 | } | |
1703 | ||
1704 | if (status & USBA_WAKE_UP) { | |
1705 | usba_writel(udc, INT_CLR, USBA_WAKE_UP); | |
1706 | DBG(DBG_BUS, "Wake Up CPU detected\n"); | |
1707 | } | |
1708 | ||
1709 | if (status & USBA_END_OF_RESUME) { | |
1710 | usba_writel(udc, INT_CLR, USBA_END_OF_RESUME); | |
1711 | DBG(DBG_BUS, "Resume detected\n"); | |
1712 | if (udc->gadget.speed != USB_SPEED_UNKNOWN | |
1713 | && udc->driver && udc->driver->resume) { | |
1714 | spin_unlock(&udc->lock); | |
1715 | udc->driver->resume(&udc->gadget); | |
1716 | spin_lock(&udc->lock); | |
1717 | } | |
1718 | } | |
1719 | ||
1720 | dma_status = USBA_BFEXT(DMA_INT, status); | |
1721 | if (dma_status) { | |
1722 | int i; | |
1723 | ||
1724 | for (i = 1; i < USBA_NR_ENDPOINTS; i++) | |
1725 | if (dma_status & (1 << i)) | |
1726 | usba_dma_irq(udc, &usba_ep[i]); | |
1727 | } | |
1728 | ||
1729 | ep_status = USBA_BFEXT(EPT_INT, status); | |
1730 | if (ep_status) { | |
1731 | int i; | |
1732 | ||
1733 | for (i = 0; i < USBA_NR_ENDPOINTS; i++) | |
1734 | if (ep_status & (1 << i)) { | |
1735 | if (ep_is_control(&usba_ep[i])) | |
1736 | usba_control_irq(udc, &usba_ep[i]); | |
1737 | else | |
1738 | usba_ep_irq(udc, &usba_ep[i]); | |
1739 | } | |
1740 | } | |
1741 | ||
1742 | if (status & USBA_END_OF_RESET) { | |
1743 | struct usba_ep *ep0; | |
1744 | ||
1745 | usba_writel(udc, INT_CLR, USBA_END_OF_RESET); | |
1746 | reset_all_endpoints(udc); | |
1747 | ||
1748 | if (status & USBA_HIGH_SPEED) { | |
1749 | DBG(DBG_BUS, "High-speed bus reset detected\n"); | |
1750 | udc->gadget.speed = USB_SPEED_HIGH; | |
1751 | } else { | |
1752 | DBG(DBG_BUS, "Full-speed bus reset detected\n"); | |
1753 | udc->gadget.speed = USB_SPEED_FULL; | |
1754 | } | |
1755 | ||
1756 | ep0 = &usba_ep[0]; | |
1757 | ep0->desc = &usba_ep0_desc; | |
1758 | ep0->state = WAIT_FOR_SETUP; | |
1759 | usba_ep_writel(ep0, CFG, | |
1760 | (USBA_BF(EPT_SIZE, EP0_EPT_SIZE) | |
1761 | | USBA_BF(EPT_TYPE, USBA_EPT_TYPE_CONTROL) | |
1762 | | USBA_BF(BK_NUMBER, USBA_BK_NUMBER_ONE))); | |
1763 | usba_ep_writel(ep0, CTL_ENB, | |
1764 | USBA_EPT_ENABLE | USBA_RX_SETUP); | |
1765 | usba_writel(udc, INT_ENB, | |
1766 | (usba_readl(udc, INT_ENB) | |
1767 | | USBA_BF(EPT_INT, 1) | |
1768 | | USBA_DET_SUSPEND | |
1769 | | USBA_END_OF_RESUME)); | |
1770 | ||
1771 | if (!(usba_ep_readl(ep0, CFG) & USBA_EPT_MAPPED)) | |
1772 | dev_warn(&udc->pdev->dev, | |
1773 | "WARNING: EP0 configuration is invalid!\n"); | |
1774 | } | |
1775 | ||
1776 | spin_unlock(&udc->lock); | |
1777 | ||
1778 | return IRQ_HANDLED; | |
1779 | } | |
1780 | ||
1781 | static irqreturn_t usba_vbus_irq(int irq, void *devid) | |
1782 | { | |
1783 | struct usba_udc *udc = devid; | |
1784 | int vbus; | |
1785 | ||
1786 | /* debounce */ | |
1787 | udelay(10); | |
1788 | ||
1789 | spin_lock(&udc->lock); | |
1790 | ||
1791 | /* May happen if Vbus pin toggles during probe() */ | |
1792 | if (!udc->driver) | |
1793 | goto out; | |
1794 | ||
1795 | vbus = gpio_get_value(udc->vbus_pin); | |
1796 | if (vbus != udc->vbus_prev) { | |
1797 | if (vbus) { | |
1798 | usba_writel(udc, CTRL, USBA_EN_USBA); | |
1799 | usba_writel(udc, INT_ENB, USBA_END_OF_RESET); | |
1800 | } else { | |
1801 | udc->gadget.speed = USB_SPEED_UNKNOWN; | |
1802 | reset_all_endpoints(udc); | |
1803 | usba_writel(udc, CTRL, 0); | |
1804 | spin_unlock(&udc->lock); | |
1805 | udc->driver->disconnect(&udc->gadget); | |
1806 | spin_lock(&udc->lock); | |
1807 | } | |
1808 | udc->vbus_prev = vbus; | |
1809 | } | |
1810 | ||
1811 | out: | |
1812 | spin_unlock(&udc->lock); | |
1813 | ||
1814 | return IRQ_HANDLED; | |
1815 | } | |
1816 | ||
1817 | int usb_gadget_register_driver(struct usb_gadget_driver *driver) | |
1818 | { | |
1819 | struct usba_udc *udc = &the_udc; | |
1820 | unsigned long flags; | |
1821 | int ret; | |
1822 | ||
1823 | if (!udc->pdev) | |
1824 | return -ENODEV; | |
1825 | ||
1826 | spin_lock_irqsave(&udc->lock, flags); | |
1827 | if (udc->driver) { | |
1828 | spin_unlock_irqrestore(&udc->lock, flags); | |
1829 | return -EBUSY; | |
1830 | } | |
1831 | ||
58ed7b94 | 1832 | udc->devstatus = 1 << USB_DEVICE_SELF_POWERED; |
914a3f3b HS |
1833 | udc->driver = driver; |
1834 | udc->gadget.dev.driver = &driver->driver; | |
1835 | spin_unlock_irqrestore(&udc->lock, flags); | |
1836 | ||
1837 | clk_enable(udc->pclk); | |
1838 | clk_enable(udc->hclk); | |
1839 | ||
1840 | ret = driver->bind(&udc->gadget); | |
1841 | if (ret) { | |
1842 | DBG(DBG_ERR, "Could not bind to driver %s: error %d\n", | |
1843 | driver->driver.name, ret); | |
1844 | goto err_driver_bind; | |
1845 | } | |
1846 | ||
1847 | DBG(DBG_GADGET, "registered driver `%s'\n", driver->driver.name); | |
1848 | ||
1849 | udc->vbus_prev = 0; | |
1850 | if (udc->vbus_pin != -1) | |
1851 | enable_irq(gpio_to_irq(udc->vbus_pin)); | |
1852 | ||
1853 | /* If Vbus is present, enable the controller and wait for reset */ | |
1854 | spin_lock_irqsave(&udc->lock, flags); | |
1855 | if (vbus_is_present(udc) && udc->vbus_prev == 0) { | |
1856 | usba_writel(udc, CTRL, USBA_EN_USBA); | |
1857 | usba_writel(udc, INT_ENB, USBA_END_OF_RESET); | |
1858 | } | |
1859 | spin_unlock_irqrestore(&udc->lock, flags); | |
1860 | ||
1861 | return 0; | |
1862 | ||
1863 | err_driver_bind: | |
1864 | udc->driver = NULL; | |
1865 | udc->gadget.dev.driver = NULL; | |
1866 | return ret; | |
1867 | } | |
1868 | EXPORT_SYMBOL(usb_gadget_register_driver); | |
1869 | ||
1870 | int usb_gadget_unregister_driver(struct usb_gadget_driver *driver) | |
1871 | { | |
1872 | struct usba_udc *udc = &the_udc; | |
1873 | unsigned long flags; | |
1874 | ||
1875 | if (!udc->pdev) | |
1876 | return -ENODEV; | |
1877 | if (driver != udc->driver) | |
1878 | return -EINVAL; | |
1879 | ||
1880 | if (udc->vbus_pin != -1) | |
1881 | disable_irq(gpio_to_irq(udc->vbus_pin)); | |
1882 | ||
1883 | spin_lock_irqsave(&udc->lock, flags); | |
1884 | udc->gadget.speed = USB_SPEED_UNKNOWN; | |
1885 | reset_all_endpoints(udc); | |
1886 | spin_unlock_irqrestore(&udc->lock, flags); | |
1887 | ||
1888 | /* This will also disable the DP pullup */ | |
1889 | usba_writel(udc, CTRL, 0); | |
1890 | ||
1891 | driver->unbind(&udc->gadget); | |
1892 | udc->gadget.dev.driver = NULL; | |
1893 | udc->driver = NULL; | |
1894 | ||
1895 | clk_disable(udc->hclk); | |
1896 | clk_disable(udc->pclk); | |
1897 | ||
1898 | DBG(DBG_GADGET, "unregistered driver `%s'\n", driver->driver.name); | |
1899 | ||
1900 | return 0; | |
1901 | } | |
1902 | EXPORT_SYMBOL(usb_gadget_unregister_driver); | |
1903 | ||
1904 | static int __init usba_udc_probe(struct platform_device *pdev) | |
1905 | { | |
1906 | struct usba_platform_data *pdata = pdev->dev.platform_data; | |
1907 | struct resource *regs, *fifo; | |
1908 | struct clk *pclk, *hclk; | |
1909 | struct usba_udc *udc = &the_udc; | |
1910 | int irq, ret, i; | |
1911 | ||
1912 | regs = platform_get_resource(pdev, IORESOURCE_MEM, CTRL_IOMEM_ID); | |
1913 | fifo = platform_get_resource(pdev, IORESOURCE_MEM, FIFO_IOMEM_ID); | |
1914 | if (!regs || !fifo) | |
1915 | return -ENXIO; | |
1916 | ||
1917 | irq = platform_get_irq(pdev, 0); | |
1918 | if (irq < 0) | |
1919 | return irq; | |
1920 | ||
1921 | pclk = clk_get(&pdev->dev, "pclk"); | |
1922 | if (IS_ERR(pclk)) | |
1923 | return PTR_ERR(pclk); | |
1924 | hclk = clk_get(&pdev->dev, "hclk"); | |
1925 | if (IS_ERR(hclk)) { | |
1926 | ret = PTR_ERR(hclk); | |
1927 | goto err_get_hclk; | |
1928 | } | |
1929 | ||
1930 | udc->pdev = pdev; | |
1931 | udc->pclk = pclk; | |
1932 | udc->hclk = hclk; | |
1933 | udc->vbus_pin = -1; | |
1934 | ||
1935 | ret = -ENOMEM; | |
1936 | udc->regs = ioremap(regs->start, regs->end - regs->start + 1); | |
1937 | if (!udc->regs) { | |
1938 | dev_err(&pdev->dev, "Unable to map I/O memory, aborting.\n"); | |
1939 | goto err_map_regs; | |
1940 | } | |
1941 | dev_info(&pdev->dev, "MMIO registers at 0x%08lx mapped at %p\n", | |
1942 | (unsigned long)regs->start, udc->regs); | |
1943 | udc->fifo = ioremap(fifo->start, fifo->end - fifo->start + 1); | |
1944 | if (!udc->fifo) { | |
1945 | dev_err(&pdev->dev, "Unable to map FIFO, aborting.\n"); | |
1946 | goto err_map_fifo; | |
1947 | } | |
1948 | dev_info(&pdev->dev, "FIFO at 0x%08lx mapped at %p\n", | |
1949 | (unsigned long)fifo->start, udc->fifo); | |
1950 | ||
1951 | device_initialize(&udc->gadget.dev); | |
1952 | udc->gadget.dev.parent = &pdev->dev; | |
1953 | udc->gadget.dev.dma_mask = pdev->dev.dma_mask; | |
1954 | ||
1955 | platform_set_drvdata(pdev, udc); | |
1956 | ||
1957 | /* Make sure we start from a clean slate */ | |
1958 | clk_enable(pclk); | |
1959 | usba_writel(udc, CTRL, 0); | |
1960 | clk_disable(pclk); | |
1961 | ||
1962 | INIT_LIST_HEAD(&usba_ep[0].ep.ep_list); | |
1963 | usba_ep[0].ep_regs = udc->regs + USBA_EPT_BASE(0); | |
1964 | usba_ep[0].dma_regs = udc->regs + USBA_DMA_BASE(0); | |
1965 | usba_ep[0].fifo = udc->fifo + USBA_FIFO_BASE(0); | |
1966 | for (i = 1; i < ARRAY_SIZE(usba_ep); i++) { | |
1967 | struct usba_ep *ep = &usba_ep[i]; | |
1968 | ||
1969 | ep->ep_regs = udc->regs + USBA_EPT_BASE(i); | |
1970 | ep->dma_regs = udc->regs + USBA_DMA_BASE(i); | |
1971 | ep->fifo = udc->fifo + USBA_FIFO_BASE(i); | |
1972 | ||
1973 | list_add_tail(&ep->ep.ep_list, &udc->gadget.ep_list); | |
1974 | } | |
1975 | ||
1976 | ret = request_irq(irq, usba_udc_irq, 0, "atmel_usba_udc", udc); | |
1977 | if (ret) { | |
1978 | dev_err(&pdev->dev, "Cannot request irq %d (error %d)\n", | |
1979 | irq, ret); | |
1980 | goto err_request_irq; | |
1981 | } | |
1982 | udc->irq = irq; | |
1983 | ||
1984 | ret = device_add(&udc->gadget.dev); | |
1985 | if (ret) { | |
1986 | dev_dbg(&pdev->dev, "Could not add gadget: %d\n", ret); | |
1987 | goto err_device_add; | |
1988 | } | |
1989 | ||
1990 | if (pdata && pdata->vbus_pin != GPIO_PIN_NONE) { | |
1991 | if (!gpio_request(pdata->vbus_pin, "atmel_usba_udc")) { | |
1992 | udc->vbus_pin = pdata->vbus_pin; | |
1993 | ||
1994 | ret = request_irq(gpio_to_irq(udc->vbus_pin), | |
1995 | usba_vbus_irq, 0, | |
1996 | "atmel_usba_udc", udc); | |
1997 | if (ret) { | |
1998 | gpio_free(udc->vbus_pin); | |
1999 | udc->vbus_pin = -1; | |
2000 | dev_warn(&udc->pdev->dev, | |
2001 | "failed to request vbus irq; " | |
2002 | "assuming always on\n"); | |
2003 | } else { | |
2004 | disable_irq(gpio_to_irq(udc->vbus_pin)); | |
2005 | } | |
2006 | } | |
2007 | } | |
2008 | ||
2009 | usba_init_debugfs(udc); | |
2010 | for (i = 1; i < ARRAY_SIZE(usba_ep); i++) | |
2011 | usba_ep_init_debugfs(udc, &usba_ep[i]); | |
2012 | ||
2013 | return 0; | |
2014 | ||
2015 | err_device_add: | |
2016 | free_irq(irq, udc); | |
2017 | err_request_irq: | |
2018 | iounmap(udc->fifo); | |
2019 | err_map_fifo: | |
2020 | iounmap(udc->regs); | |
2021 | err_map_regs: | |
2022 | clk_put(hclk); | |
2023 | err_get_hclk: | |
2024 | clk_put(pclk); | |
2025 | ||
2026 | platform_set_drvdata(pdev, NULL); | |
2027 | ||
2028 | return ret; | |
2029 | } | |
2030 | ||
2031 | static int __exit usba_udc_remove(struct platform_device *pdev) | |
2032 | { | |
2033 | struct usba_udc *udc; | |
2034 | int i; | |
2035 | ||
2036 | udc = platform_get_drvdata(pdev); | |
2037 | ||
2038 | for (i = 1; i < ARRAY_SIZE(usba_ep); i++) | |
2039 | usba_ep_cleanup_debugfs(&usba_ep[i]); | |
2040 | usba_cleanup_debugfs(udc); | |
2041 | ||
2042 | if (udc->vbus_pin != -1) | |
2043 | gpio_free(udc->vbus_pin); | |
2044 | ||
2045 | free_irq(udc->irq, udc); | |
2046 | iounmap(udc->fifo); | |
2047 | iounmap(udc->regs); | |
2048 | clk_put(udc->hclk); | |
2049 | clk_put(udc->pclk); | |
2050 | ||
2051 | device_unregister(&udc->gadget.dev); | |
2052 | ||
2053 | return 0; | |
2054 | } | |
2055 | ||
2056 | static struct platform_driver udc_driver = { | |
2057 | .remove = __exit_p(usba_udc_remove), | |
2058 | .driver = { | |
2059 | .name = "atmel_usba_udc", | |
2060 | }, | |
2061 | }; | |
2062 | ||
2063 | static int __init udc_init(void) | |
2064 | { | |
2065 | return platform_driver_probe(&udc_driver, usba_udc_probe); | |
2066 | } | |
2067 | module_init(udc_init); | |
2068 | ||
2069 | static void __exit udc_exit(void) | |
2070 | { | |
2071 | platform_driver_unregister(&udc_driver); | |
2072 | } | |
2073 | module_exit(udc_exit); | |
2074 | ||
2075 | MODULE_DESCRIPTION("Atmel USBA UDC driver"); | |
2076 | MODULE_AUTHOR("Haavard Skinnemoen <hskinnemoen@atmel.com>"); | |
2077 | MODULE_LICENSE("GPL"); |