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914a3f3b HS |
1 | /* |
2 | * Driver for the Atmel USBA high speed USB device controller | |
3 | * | |
4 | * Copyright (C) 2005-2007 Atmel Corporation | |
5 | * | |
6 | * This program is free software; you can redistribute it and/or modify | |
7 | * it under the terms of the GNU General Public License version 2 as | |
8 | * published by the Free Software Foundation. | |
9 | */ | |
10 | #include <linux/clk.h> | |
11 | #include <linux/module.h> | |
12 | #include <linux/init.h> | |
13 | #include <linux/interrupt.h> | |
14 | #include <linux/io.h> | |
15 | #include <linux/device.h> | |
16 | #include <linux/dma-mapping.h> | |
17 | #include <linux/list.h> | |
18 | #include <linux/platform_device.h> | |
19 | #include <linux/usb/ch9.h> | |
20 | #include <linux/usb/gadget.h> | |
8d855317 | 21 | #include <linux/usb/atmel_usba_udc.h> |
914a3f3b HS |
22 | #include <linux/delay.h> |
23 | ||
24 | #include <asm/gpio.h> | |
a09e64fb | 25 | #include <mach/board.h> |
914a3f3b HS |
26 | |
27 | #include "atmel_usba_udc.h" | |
28 | ||
29 | ||
30 | static struct usba_udc the_udc; | |
8d855317 | 31 | static struct usba_ep *usba_ep; |
914a3f3b HS |
32 | |
33 | #ifdef CONFIG_USB_GADGET_DEBUG_FS | |
34 | #include <linux/debugfs.h> | |
35 | #include <linux/uaccess.h> | |
36 | ||
37 | static int queue_dbg_open(struct inode *inode, struct file *file) | |
38 | { | |
39 | struct usba_ep *ep = inode->i_private; | |
40 | struct usba_request *req, *req_copy; | |
41 | struct list_head *queue_data; | |
42 | ||
43 | queue_data = kmalloc(sizeof(*queue_data), GFP_KERNEL); | |
44 | if (!queue_data) | |
45 | return -ENOMEM; | |
46 | INIT_LIST_HEAD(queue_data); | |
47 | ||
48 | spin_lock_irq(&ep->udc->lock); | |
49 | list_for_each_entry(req, &ep->queue, queue) { | |
50 | req_copy = kmalloc(sizeof(*req_copy), GFP_ATOMIC); | |
51 | if (!req_copy) | |
52 | goto fail; | |
53 | memcpy(req_copy, req, sizeof(*req_copy)); | |
54 | list_add_tail(&req_copy->queue, queue_data); | |
55 | } | |
56 | spin_unlock_irq(&ep->udc->lock); | |
57 | ||
58 | file->private_data = queue_data; | |
59 | return 0; | |
60 | ||
61 | fail: | |
62 | spin_unlock_irq(&ep->udc->lock); | |
63 | list_for_each_entry_safe(req, req_copy, queue_data, queue) { | |
64 | list_del(&req->queue); | |
65 | kfree(req); | |
66 | } | |
67 | kfree(queue_data); | |
68 | return -ENOMEM; | |
69 | } | |
70 | ||
71 | /* | |
72 | * bbbbbbbb llllllll IZS sssss nnnn FDL\n\0 | |
73 | * | |
74 | * b: buffer address | |
75 | * l: buffer length | |
76 | * I/i: interrupt/no interrupt | |
77 | * Z/z: zero/no zero | |
78 | * S/s: short ok/short not ok | |
79 | * s: status | |
80 | * n: nr_packets | |
81 | * F/f: submitted/not submitted to FIFO | |
82 | * D/d: using/not using DMA | |
83 | * L/l: last transaction/not last transaction | |
84 | */ | |
85 | static ssize_t queue_dbg_read(struct file *file, char __user *buf, | |
86 | size_t nbytes, loff_t *ppos) | |
87 | { | |
88 | struct list_head *queue = file->private_data; | |
89 | struct usba_request *req, *tmp_req; | |
90 | size_t len, remaining, actual = 0; | |
91 | char tmpbuf[38]; | |
92 | ||
93 | if (!access_ok(VERIFY_WRITE, buf, nbytes)) | |
94 | return -EFAULT; | |
95 | ||
96 | mutex_lock(&file->f_dentry->d_inode->i_mutex); | |
97 | list_for_each_entry_safe(req, tmp_req, queue, queue) { | |
98 | len = snprintf(tmpbuf, sizeof(tmpbuf), | |
99 | "%8p %08x %c%c%c %5d %c%c%c\n", | |
100 | req->req.buf, req->req.length, | |
101 | req->req.no_interrupt ? 'i' : 'I', | |
102 | req->req.zero ? 'Z' : 'z', | |
103 | req->req.short_not_ok ? 's' : 'S', | |
104 | req->req.status, | |
105 | req->submitted ? 'F' : 'f', | |
106 | req->using_dma ? 'D' : 'd', | |
107 | req->last_transaction ? 'L' : 'l'); | |
108 | len = min(len, sizeof(tmpbuf)); | |
109 | if (len > nbytes) | |
110 | break; | |
111 | ||
112 | list_del(&req->queue); | |
113 | kfree(req); | |
114 | ||
115 | remaining = __copy_to_user(buf, tmpbuf, len); | |
116 | actual += len - remaining; | |
117 | if (remaining) | |
118 | break; | |
119 | ||
120 | nbytes -= len; | |
121 | buf += len; | |
122 | } | |
123 | mutex_unlock(&file->f_dentry->d_inode->i_mutex); | |
124 | ||
125 | return actual; | |
126 | } | |
127 | ||
128 | static int queue_dbg_release(struct inode *inode, struct file *file) | |
129 | { | |
130 | struct list_head *queue_data = file->private_data; | |
131 | struct usba_request *req, *tmp_req; | |
132 | ||
133 | list_for_each_entry_safe(req, tmp_req, queue_data, queue) { | |
134 | list_del(&req->queue); | |
135 | kfree(req); | |
136 | } | |
137 | kfree(queue_data); | |
138 | return 0; | |
139 | } | |
140 | ||
141 | static int regs_dbg_open(struct inode *inode, struct file *file) | |
142 | { | |
143 | struct usba_udc *udc; | |
144 | unsigned int i; | |
145 | u32 *data; | |
146 | int ret = -ENOMEM; | |
147 | ||
148 | mutex_lock(&inode->i_mutex); | |
149 | udc = inode->i_private; | |
150 | data = kmalloc(inode->i_size, GFP_KERNEL); | |
151 | if (!data) | |
152 | goto out; | |
153 | ||
154 | spin_lock_irq(&udc->lock); | |
155 | for (i = 0; i < inode->i_size / 4; i++) | |
156 | data[i] = __raw_readl(udc->regs + i * 4); | |
157 | spin_unlock_irq(&udc->lock); | |
158 | ||
159 | file->private_data = data; | |
160 | ret = 0; | |
161 | ||
162 | out: | |
163 | mutex_unlock(&inode->i_mutex); | |
164 | ||
165 | return ret; | |
166 | } | |
167 | ||
168 | static ssize_t regs_dbg_read(struct file *file, char __user *buf, | |
169 | size_t nbytes, loff_t *ppos) | |
170 | { | |
171 | struct inode *inode = file->f_dentry->d_inode; | |
172 | int ret; | |
173 | ||
174 | mutex_lock(&inode->i_mutex); | |
175 | ret = simple_read_from_buffer(buf, nbytes, ppos, | |
176 | file->private_data, | |
177 | file->f_dentry->d_inode->i_size); | |
178 | mutex_unlock(&inode->i_mutex); | |
179 | ||
180 | return ret; | |
181 | } | |
182 | ||
183 | static int regs_dbg_release(struct inode *inode, struct file *file) | |
184 | { | |
185 | kfree(file->private_data); | |
186 | return 0; | |
187 | } | |
188 | ||
189 | const struct file_operations queue_dbg_fops = { | |
190 | .owner = THIS_MODULE, | |
191 | .open = queue_dbg_open, | |
192 | .llseek = no_llseek, | |
193 | .read = queue_dbg_read, | |
194 | .release = queue_dbg_release, | |
195 | }; | |
196 | ||
197 | const struct file_operations regs_dbg_fops = { | |
198 | .owner = THIS_MODULE, | |
199 | .open = regs_dbg_open, | |
200 | .llseek = generic_file_llseek, | |
201 | .read = regs_dbg_read, | |
202 | .release = regs_dbg_release, | |
203 | }; | |
204 | ||
205 | static void usba_ep_init_debugfs(struct usba_udc *udc, | |
206 | struct usba_ep *ep) | |
207 | { | |
208 | struct dentry *ep_root; | |
209 | ||
210 | ep_root = debugfs_create_dir(ep->ep.name, udc->debugfs_root); | |
211 | if (!ep_root) | |
212 | goto err_root; | |
213 | ep->debugfs_dir = ep_root; | |
214 | ||
215 | ep->debugfs_queue = debugfs_create_file("queue", 0400, ep_root, | |
216 | ep, &queue_dbg_fops); | |
217 | if (!ep->debugfs_queue) | |
218 | goto err_queue; | |
219 | ||
220 | if (ep->can_dma) { | |
221 | ep->debugfs_dma_status | |
222 | = debugfs_create_u32("dma_status", 0400, ep_root, | |
223 | &ep->last_dma_status); | |
224 | if (!ep->debugfs_dma_status) | |
225 | goto err_dma_status; | |
226 | } | |
227 | if (ep_is_control(ep)) { | |
228 | ep->debugfs_state | |
229 | = debugfs_create_u32("state", 0400, ep_root, | |
230 | &ep->state); | |
231 | if (!ep->debugfs_state) | |
232 | goto err_state; | |
233 | } | |
234 | ||
235 | return; | |
236 | ||
237 | err_state: | |
238 | if (ep->can_dma) | |
239 | debugfs_remove(ep->debugfs_dma_status); | |
240 | err_dma_status: | |
241 | debugfs_remove(ep->debugfs_queue); | |
242 | err_queue: | |
243 | debugfs_remove(ep_root); | |
244 | err_root: | |
245 | dev_err(&ep->udc->pdev->dev, | |
246 | "failed to create debugfs directory for %s\n", ep->ep.name); | |
247 | } | |
248 | ||
249 | static void usba_ep_cleanup_debugfs(struct usba_ep *ep) | |
250 | { | |
251 | debugfs_remove(ep->debugfs_queue); | |
252 | debugfs_remove(ep->debugfs_dma_status); | |
253 | debugfs_remove(ep->debugfs_state); | |
254 | debugfs_remove(ep->debugfs_dir); | |
255 | ep->debugfs_dma_status = NULL; | |
256 | ep->debugfs_dir = NULL; | |
257 | } | |
258 | ||
259 | static void usba_init_debugfs(struct usba_udc *udc) | |
260 | { | |
261 | struct dentry *root, *regs; | |
262 | struct resource *regs_resource; | |
263 | ||
264 | root = debugfs_create_dir(udc->gadget.name, NULL); | |
265 | if (IS_ERR(root) || !root) | |
266 | goto err_root; | |
267 | udc->debugfs_root = root; | |
268 | ||
269 | regs = debugfs_create_file("regs", 0400, root, udc, ®s_dbg_fops); | |
270 | if (!regs) | |
271 | goto err_regs; | |
272 | ||
273 | regs_resource = platform_get_resource(udc->pdev, IORESOURCE_MEM, | |
274 | CTRL_IOMEM_ID); | |
275 | regs->d_inode->i_size = regs_resource->end - regs_resource->start + 1; | |
276 | udc->debugfs_regs = regs; | |
277 | ||
278 | usba_ep_init_debugfs(udc, to_usba_ep(udc->gadget.ep0)); | |
279 | ||
280 | return; | |
281 | ||
282 | err_regs: | |
283 | debugfs_remove(root); | |
284 | err_root: | |
285 | udc->debugfs_root = NULL; | |
286 | dev_err(&udc->pdev->dev, "debugfs is not available\n"); | |
287 | } | |
288 | ||
289 | static void usba_cleanup_debugfs(struct usba_udc *udc) | |
290 | { | |
291 | usba_ep_cleanup_debugfs(to_usba_ep(udc->gadget.ep0)); | |
292 | debugfs_remove(udc->debugfs_regs); | |
293 | debugfs_remove(udc->debugfs_root); | |
294 | udc->debugfs_regs = NULL; | |
295 | udc->debugfs_root = NULL; | |
296 | } | |
297 | #else | |
298 | static inline void usba_ep_init_debugfs(struct usba_udc *udc, | |
299 | struct usba_ep *ep) | |
300 | { | |
301 | ||
302 | } | |
303 | ||
304 | static inline void usba_ep_cleanup_debugfs(struct usba_ep *ep) | |
305 | { | |
306 | ||
307 | } | |
308 | ||
309 | static inline void usba_init_debugfs(struct usba_udc *udc) | |
310 | { | |
311 | ||
312 | } | |
313 | ||
314 | static inline void usba_cleanup_debugfs(struct usba_udc *udc) | |
315 | { | |
316 | ||
317 | } | |
318 | #endif | |
319 | ||
320 | static int vbus_is_present(struct usba_udc *udc) | |
321 | { | |
322 | if (udc->vbus_pin != -1) | |
323 | return gpio_get_value(udc->vbus_pin); | |
324 | ||
325 | /* No Vbus detection: Assume always present */ | |
326 | return 1; | |
327 | } | |
328 | ||
16a45bc8 SP |
329 | #if defined(CONFIG_AVR32) |
330 | ||
331 | static void toggle_bias(int is_on) | |
914a3f3b | 332 | { |
914a3f3b HS |
333 | } |
334 | ||
16a45bc8 SP |
335 | #elif defined(CONFIG_ARCH_AT91) |
336 | ||
a09e64fb | 337 | #include <mach/at91_pmc.h> |
16a45bc8 SP |
338 | |
339 | static void toggle_bias(int is_on) | |
914a3f3b | 340 | { |
16a45bc8 SP |
341 | unsigned int uckr = at91_sys_read(AT91_CKGR_UCKR); |
342 | ||
343 | if (is_on) | |
344 | at91_sys_write(AT91_CKGR_UCKR, uckr | AT91_PMC_BIASEN); | |
345 | else | |
346 | at91_sys_write(AT91_CKGR_UCKR, uckr & ~(AT91_PMC_BIASEN)); | |
914a3f3b HS |
347 | } |
348 | ||
16a45bc8 SP |
349 | #endif /* CONFIG_ARCH_AT91 */ |
350 | ||
914a3f3b HS |
351 | static void next_fifo_transaction(struct usba_ep *ep, struct usba_request *req) |
352 | { | |
353 | unsigned int transaction_len; | |
354 | ||
355 | transaction_len = req->req.length - req->req.actual; | |
356 | req->last_transaction = 1; | |
357 | if (transaction_len > ep->ep.maxpacket) { | |
358 | transaction_len = ep->ep.maxpacket; | |
359 | req->last_transaction = 0; | |
360 | } else if (transaction_len == ep->ep.maxpacket && req->req.zero) | |
361 | req->last_transaction = 0; | |
362 | ||
363 | DBG(DBG_QUEUE, "%s: submit_transaction, req %p (length %d)%s\n", | |
364 | ep->ep.name, req, transaction_len, | |
365 | req->last_transaction ? ", done" : ""); | |
366 | ||
5d4c2707 | 367 | memcpy_toio(ep->fifo, req->req.buf + req->req.actual, transaction_len); |
914a3f3b HS |
368 | usba_ep_writel(ep, SET_STA, USBA_TX_PK_RDY); |
369 | req->req.actual += transaction_len; | |
370 | } | |
371 | ||
372 | static void submit_request(struct usba_ep *ep, struct usba_request *req) | |
373 | { | |
374 | DBG(DBG_QUEUE, "%s: submit_request: req %p (length %d)\n", | |
375 | ep->ep.name, req, req->req.length); | |
376 | ||
377 | req->req.actual = 0; | |
378 | req->submitted = 1; | |
379 | ||
380 | if (req->using_dma) { | |
381 | if (req->req.length == 0) { | |
382 | usba_ep_writel(ep, CTL_ENB, USBA_TX_PK_RDY); | |
383 | return; | |
384 | } | |
385 | ||
386 | if (req->req.zero) | |
387 | usba_ep_writel(ep, CTL_ENB, USBA_SHORT_PACKET); | |
388 | else | |
389 | usba_ep_writel(ep, CTL_DIS, USBA_SHORT_PACKET); | |
390 | ||
391 | usba_dma_writel(ep, ADDRESS, req->req.dma); | |
392 | usba_dma_writel(ep, CONTROL, req->ctrl); | |
393 | } else { | |
394 | next_fifo_transaction(ep, req); | |
395 | if (req->last_transaction) { | |
396 | usba_ep_writel(ep, CTL_DIS, USBA_TX_PK_RDY); | |
397 | usba_ep_writel(ep, CTL_ENB, USBA_TX_COMPLETE); | |
398 | } else { | |
399 | usba_ep_writel(ep, CTL_DIS, USBA_TX_COMPLETE); | |
400 | usba_ep_writel(ep, CTL_ENB, USBA_TX_PK_RDY); | |
401 | } | |
402 | } | |
403 | } | |
404 | ||
405 | static void submit_next_request(struct usba_ep *ep) | |
406 | { | |
407 | struct usba_request *req; | |
408 | ||
409 | if (list_empty(&ep->queue)) { | |
410 | usba_ep_writel(ep, CTL_DIS, USBA_TX_PK_RDY | USBA_RX_BK_RDY); | |
411 | return; | |
412 | } | |
413 | ||
414 | req = list_entry(ep->queue.next, struct usba_request, queue); | |
415 | if (!req->submitted) | |
416 | submit_request(ep, req); | |
417 | } | |
418 | ||
419 | static void send_status(struct usba_udc *udc, struct usba_ep *ep) | |
420 | { | |
421 | ep->state = STATUS_STAGE_IN; | |
422 | usba_ep_writel(ep, SET_STA, USBA_TX_PK_RDY); | |
423 | usba_ep_writel(ep, CTL_ENB, USBA_TX_COMPLETE); | |
424 | } | |
425 | ||
426 | static void receive_data(struct usba_ep *ep) | |
427 | { | |
428 | struct usba_udc *udc = ep->udc; | |
429 | struct usba_request *req; | |
430 | unsigned long status; | |
431 | unsigned int bytecount, nr_busy; | |
432 | int is_complete = 0; | |
433 | ||
434 | status = usba_ep_readl(ep, STA); | |
435 | nr_busy = USBA_BFEXT(BUSY_BANKS, status); | |
436 | ||
437 | DBG(DBG_QUEUE, "receive data: nr_busy=%u\n", nr_busy); | |
438 | ||
439 | while (nr_busy > 0) { | |
440 | if (list_empty(&ep->queue)) { | |
441 | usba_ep_writel(ep, CTL_DIS, USBA_RX_BK_RDY); | |
442 | break; | |
443 | } | |
444 | req = list_entry(ep->queue.next, | |
445 | struct usba_request, queue); | |
446 | ||
447 | bytecount = USBA_BFEXT(BYTE_COUNT, status); | |
448 | ||
449 | if (status & (1 << 31)) | |
450 | is_complete = 1; | |
451 | if (req->req.actual + bytecount >= req->req.length) { | |
452 | is_complete = 1; | |
453 | bytecount = req->req.length - req->req.actual; | |
454 | } | |
455 | ||
5d4c2707 | 456 | memcpy_fromio(req->req.buf + req->req.actual, |
914a3f3b HS |
457 | ep->fifo, bytecount); |
458 | req->req.actual += bytecount; | |
459 | ||
460 | usba_ep_writel(ep, CLR_STA, USBA_RX_BK_RDY); | |
461 | ||
462 | if (is_complete) { | |
463 | DBG(DBG_QUEUE, "%s: request done\n", ep->ep.name); | |
464 | req->req.status = 0; | |
465 | list_del_init(&req->queue); | |
466 | usba_ep_writel(ep, CTL_DIS, USBA_RX_BK_RDY); | |
467 | spin_unlock(&udc->lock); | |
468 | req->req.complete(&ep->ep, &req->req); | |
469 | spin_lock(&udc->lock); | |
470 | } | |
471 | ||
472 | status = usba_ep_readl(ep, STA); | |
473 | nr_busy = USBA_BFEXT(BUSY_BANKS, status); | |
474 | ||
475 | if (is_complete && ep_is_control(ep)) { | |
476 | send_status(udc, ep); | |
477 | break; | |
478 | } | |
479 | } | |
480 | } | |
481 | ||
482 | static void | |
483 | request_complete(struct usba_ep *ep, struct usba_request *req, int status) | |
484 | { | |
485 | struct usba_udc *udc = ep->udc; | |
486 | ||
487 | WARN_ON(!list_empty(&req->queue)); | |
488 | ||
489 | if (req->req.status == -EINPROGRESS) | |
490 | req->req.status = status; | |
491 | ||
492 | if (req->mapped) { | |
493 | dma_unmap_single( | |
494 | &udc->pdev->dev, req->req.dma, req->req.length, | |
495 | ep->is_in ? DMA_TO_DEVICE : DMA_FROM_DEVICE); | |
496 | req->req.dma = DMA_ADDR_INVALID; | |
497 | req->mapped = 0; | |
498 | } | |
499 | ||
500 | DBG(DBG_GADGET | DBG_REQ, | |
501 | "%s: req %p complete: status %d, actual %u\n", | |
502 | ep->ep.name, req, req->req.status, req->req.actual); | |
503 | ||
504 | spin_unlock(&udc->lock); | |
505 | req->req.complete(&ep->ep, &req->req); | |
506 | spin_lock(&udc->lock); | |
507 | } | |
508 | ||
509 | static void | |
510 | request_complete_list(struct usba_ep *ep, struct list_head *list, int status) | |
511 | { | |
512 | struct usba_request *req, *tmp_req; | |
513 | ||
514 | list_for_each_entry_safe(req, tmp_req, list, queue) { | |
515 | list_del_init(&req->queue); | |
516 | request_complete(ep, req, status); | |
517 | } | |
518 | } | |
519 | ||
520 | static int | |
521 | usba_ep_enable(struct usb_ep *_ep, const struct usb_endpoint_descriptor *desc) | |
522 | { | |
523 | struct usba_ep *ep = to_usba_ep(_ep); | |
524 | struct usba_udc *udc = ep->udc; | |
525 | unsigned long flags, ept_cfg, maxpacket; | |
526 | unsigned int nr_trans; | |
527 | ||
528 | DBG(DBG_GADGET, "%s: ep_enable: desc=%p\n", ep->ep.name, desc); | |
529 | ||
530 | maxpacket = le16_to_cpu(desc->wMaxPacketSize) & 0x7ff; | |
531 | ||
532 | if (((desc->bEndpointAddress & USB_ENDPOINT_NUMBER_MASK) != ep->index) | |
533 | || ep->index == 0 | |
534 | || desc->bDescriptorType != USB_DT_ENDPOINT | |
535 | || maxpacket == 0 | |
536 | || maxpacket > ep->fifo_size) { | |
537 | DBG(DBG_ERR, "ep_enable: Invalid argument"); | |
538 | return -EINVAL; | |
539 | } | |
540 | ||
541 | ep->is_isoc = 0; | |
542 | ep->is_in = 0; | |
543 | ||
544 | if (maxpacket <= 8) | |
545 | ept_cfg = USBA_BF(EPT_SIZE, USBA_EPT_SIZE_8); | |
546 | else | |
547 | /* LSB is bit 1, not 0 */ | |
548 | ept_cfg = USBA_BF(EPT_SIZE, fls(maxpacket - 1) - 3); | |
549 | ||
550 | DBG(DBG_HW, "%s: EPT_SIZE = %lu (maxpacket = %lu)\n", | |
551 | ep->ep.name, ept_cfg, maxpacket); | |
552 | ||
553 | if ((desc->bEndpointAddress & USB_ENDPOINT_DIR_MASK) == USB_DIR_IN) { | |
554 | ep->is_in = 1; | |
555 | ept_cfg |= USBA_EPT_DIR_IN; | |
556 | } | |
557 | ||
558 | switch (desc->bmAttributes & USB_ENDPOINT_XFERTYPE_MASK) { | |
559 | case USB_ENDPOINT_XFER_CONTROL: | |
560 | ept_cfg |= USBA_BF(EPT_TYPE, USBA_EPT_TYPE_CONTROL); | |
561 | ept_cfg |= USBA_BF(BK_NUMBER, USBA_BK_NUMBER_ONE); | |
562 | break; | |
563 | case USB_ENDPOINT_XFER_ISOC: | |
564 | if (!ep->can_isoc) { | |
565 | DBG(DBG_ERR, "ep_enable: %s is not isoc capable\n", | |
566 | ep->ep.name); | |
567 | return -EINVAL; | |
568 | } | |
569 | ||
570 | /* | |
571 | * Bits 11:12 specify number of _additional_ | |
572 | * transactions per microframe. | |
573 | */ | |
574 | nr_trans = ((le16_to_cpu(desc->wMaxPacketSize) >> 11) & 3) + 1; | |
575 | if (nr_trans > 3) | |
576 | return -EINVAL; | |
577 | ||
578 | ep->is_isoc = 1; | |
579 | ept_cfg |= USBA_BF(EPT_TYPE, USBA_EPT_TYPE_ISO); | |
580 | ||
581 | /* | |
582 | * Do triple-buffering on high-bandwidth iso endpoints. | |
583 | */ | |
584 | if (nr_trans > 1 && ep->nr_banks == 3) | |
585 | ept_cfg |= USBA_BF(BK_NUMBER, USBA_BK_NUMBER_TRIPLE); | |
586 | else | |
587 | ept_cfg |= USBA_BF(BK_NUMBER, USBA_BK_NUMBER_DOUBLE); | |
588 | ept_cfg |= USBA_BF(NB_TRANS, nr_trans); | |
589 | break; | |
590 | case USB_ENDPOINT_XFER_BULK: | |
591 | ept_cfg |= USBA_BF(EPT_TYPE, USBA_EPT_TYPE_BULK); | |
592 | ept_cfg |= USBA_BF(BK_NUMBER, USBA_BK_NUMBER_DOUBLE); | |
593 | break; | |
594 | case USB_ENDPOINT_XFER_INT: | |
595 | ept_cfg |= USBA_BF(EPT_TYPE, USBA_EPT_TYPE_INT); | |
596 | ept_cfg |= USBA_BF(BK_NUMBER, USBA_BK_NUMBER_DOUBLE); | |
597 | break; | |
598 | } | |
599 | ||
600 | spin_lock_irqsave(&ep->udc->lock, flags); | |
601 | ||
602 | if (ep->desc) { | |
603 | spin_unlock_irqrestore(&ep->udc->lock, flags); | |
604 | DBG(DBG_ERR, "ep%d already enabled\n", ep->index); | |
605 | return -EBUSY; | |
606 | } | |
607 | ||
608 | ep->desc = desc; | |
609 | ep->ep.maxpacket = maxpacket; | |
610 | ||
611 | usba_ep_writel(ep, CFG, ept_cfg); | |
612 | usba_ep_writel(ep, CTL_ENB, USBA_EPT_ENABLE); | |
613 | ||
614 | if (ep->can_dma) { | |
615 | u32 ctrl; | |
616 | ||
617 | usba_writel(udc, INT_ENB, | |
618 | (usba_readl(udc, INT_ENB) | |
619 | | USBA_BF(EPT_INT, 1 << ep->index) | |
620 | | USBA_BF(DMA_INT, 1 << ep->index))); | |
621 | ctrl = USBA_AUTO_VALID | USBA_INTDIS_DMA; | |
622 | usba_ep_writel(ep, CTL_ENB, ctrl); | |
623 | } else { | |
624 | usba_writel(udc, INT_ENB, | |
625 | (usba_readl(udc, INT_ENB) | |
626 | | USBA_BF(EPT_INT, 1 << ep->index))); | |
627 | } | |
628 | ||
629 | spin_unlock_irqrestore(&udc->lock, flags); | |
630 | ||
631 | DBG(DBG_HW, "EPT_CFG%d after init: %#08lx\n", ep->index, | |
632 | (unsigned long)usba_ep_readl(ep, CFG)); | |
633 | DBG(DBG_HW, "INT_ENB after init: %#08lx\n", | |
634 | (unsigned long)usba_readl(udc, INT_ENB)); | |
635 | ||
636 | return 0; | |
637 | } | |
638 | ||
639 | static int usba_ep_disable(struct usb_ep *_ep) | |
640 | { | |
641 | struct usba_ep *ep = to_usba_ep(_ep); | |
642 | struct usba_udc *udc = ep->udc; | |
643 | LIST_HEAD(req_list); | |
644 | unsigned long flags; | |
645 | ||
646 | DBG(DBG_GADGET, "ep_disable: %s\n", ep->ep.name); | |
647 | ||
648 | spin_lock_irqsave(&udc->lock, flags); | |
649 | ||
650 | if (!ep->desc) { | |
651 | spin_unlock_irqrestore(&udc->lock, flags); | |
40517707 DB |
652 | /* REVISIT because this driver disables endpoints in |
653 | * reset_all_endpoints() before calling disconnect(), | |
654 | * most gadget drivers would trigger this non-error ... | |
655 | */ | |
656 | if (udc->gadget.speed != USB_SPEED_UNKNOWN) | |
657 | DBG(DBG_ERR, "ep_disable: %s not enabled\n", | |
658 | ep->ep.name); | |
914a3f3b HS |
659 | return -EINVAL; |
660 | } | |
661 | ep->desc = NULL; | |
662 | ||
663 | list_splice_init(&ep->queue, &req_list); | |
664 | if (ep->can_dma) { | |
665 | usba_dma_writel(ep, CONTROL, 0); | |
666 | usba_dma_writel(ep, ADDRESS, 0); | |
667 | usba_dma_readl(ep, STATUS); | |
668 | } | |
669 | usba_ep_writel(ep, CTL_DIS, USBA_EPT_ENABLE); | |
670 | usba_writel(udc, INT_ENB, | |
671 | usba_readl(udc, INT_ENB) | |
672 | & ~USBA_BF(EPT_INT, 1 << ep->index)); | |
673 | ||
674 | request_complete_list(ep, &req_list, -ESHUTDOWN); | |
675 | ||
676 | spin_unlock_irqrestore(&udc->lock, flags); | |
677 | ||
678 | return 0; | |
679 | } | |
680 | ||
681 | static struct usb_request * | |
682 | usba_ep_alloc_request(struct usb_ep *_ep, gfp_t gfp_flags) | |
683 | { | |
684 | struct usba_request *req; | |
685 | ||
686 | DBG(DBG_GADGET, "ep_alloc_request: %p, 0x%x\n", _ep, gfp_flags); | |
687 | ||
688 | req = kzalloc(sizeof(*req), gfp_flags); | |
689 | if (!req) | |
690 | return NULL; | |
691 | ||
692 | INIT_LIST_HEAD(&req->queue); | |
693 | req->req.dma = DMA_ADDR_INVALID; | |
694 | ||
695 | return &req->req; | |
696 | } | |
697 | ||
698 | static void | |
699 | usba_ep_free_request(struct usb_ep *_ep, struct usb_request *_req) | |
700 | { | |
701 | struct usba_request *req = to_usba_req(_req); | |
702 | ||
703 | DBG(DBG_GADGET, "ep_free_request: %p, %p\n", _ep, _req); | |
704 | ||
705 | kfree(req); | |
706 | } | |
707 | ||
708 | static int queue_dma(struct usba_udc *udc, struct usba_ep *ep, | |
709 | struct usba_request *req, gfp_t gfp_flags) | |
710 | { | |
711 | unsigned long flags; | |
712 | int ret; | |
713 | ||
714 | DBG(DBG_DMA, "%s: req l/%u d/%08x %c%c%c\n", | |
715 | ep->ep.name, req->req.length, req->req.dma, | |
716 | req->req.zero ? 'Z' : 'z', | |
717 | req->req.short_not_ok ? 'S' : 's', | |
718 | req->req.no_interrupt ? 'I' : 'i'); | |
719 | ||
720 | if (req->req.length > 0x10000) { | |
721 | /* Lengths from 0 to 65536 (inclusive) are supported */ | |
722 | DBG(DBG_ERR, "invalid request length %u\n", req->req.length); | |
723 | return -EINVAL; | |
724 | } | |
725 | ||
726 | req->using_dma = 1; | |
727 | ||
728 | if (req->req.dma == DMA_ADDR_INVALID) { | |
729 | req->req.dma = dma_map_single( | |
730 | &udc->pdev->dev, req->req.buf, req->req.length, | |
731 | ep->is_in ? DMA_TO_DEVICE : DMA_FROM_DEVICE); | |
732 | req->mapped = 1; | |
733 | } else { | |
734 | dma_sync_single_for_device( | |
735 | &udc->pdev->dev, req->req.dma, req->req.length, | |
736 | ep->is_in ? DMA_TO_DEVICE : DMA_FROM_DEVICE); | |
737 | req->mapped = 0; | |
738 | } | |
739 | ||
740 | req->ctrl = USBA_BF(DMA_BUF_LEN, req->req.length) | |
741 | | USBA_DMA_CH_EN | USBA_DMA_END_BUF_IE | |
742 | | USBA_DMA_END_TR_EN | USBA_DMA_END_TR_IE; | |
743 | ||
744 | if (ep->is_in) | |
745 | req->ctrl |= USBA_DMA_END_BUF_EN; | |
746 | ||
747 | /* | |
748 | * Add this request to the queue and submit for DMA if | |
749 | * possible. Check if we're still alive first -- we may have | |
750 | * received a reset since last time we checked. | |
751 | */ | |
752 | ret = -ESHUTDOWN; | |
753 | spin_lock_irqsave(&udc->lock, flags); | |
754 | if (ep->desc) { | |
755 | if (list_empty(&ep->queue)) | |
756 | submit_request(ep, req); | |
757 | ||
758 | list_add_tail(&req->queue, &ep->queue); | |
759 | ret = 0; | |
760 | } | |
761 | spin_unlock_irqrestore(&udc->lock, flags); | |
762 | ||
763 | return ret; | |
764 | } | |
765 | ||
766 | static int | |
767 | usba_ep_queue(struct usb_ep *_ep, struct usb_request *_req, gfp_t gfp_flags) | |
768 | { | |
769 | struct usba_request *req = to_usba_req(_req); | |
770 | struct usba_ep *ep = to_usba_ep(_ep); | |
771 | struct usba_udc *udc = ep->udc; | |
772 | unsigned long flags; | |
773 | int ret; | |
774 | ||
775 | DBG(DBG_GADGET | DBG_QUEUE | DBG_REQ, "%s: queue req %p, len %u\n", | |
776 | ep->ep.name, req, _req->length); | |
777 | ||
778 | if (!udc->driver || udc->gadget.speed == USB_SPEED_UNKNOWN || !ep->desc) | |
779 | return -ESHUTDOWN; | |
780 | ||
781 | req->submitted = 0; | |
782 | req->using_dma = 0; | |
783 | req->last_transaction = 0; | |
784 | ||
785 | _req->status = -EINPROGRESS; | |
786 | _req->actual = 0; | |
787 | ||
788 | if (ep->can_dma) | |
789 | return queue_dma(udc, ep, req, gfp_flags); | |
790 | ||
791 | /* May have received a reset since last time we checked */ | |
792 | ret = -ESHUTDOWN; | |
793 | spin_lock_irqsave(&udc->lock, flags); | |
794 | if (ep->desc) { | |
795 | list_add_tail(&req->queue, &ep->queue); | |
796 | ||
797 | if (ep->is_in || (ep_is_control(ep) | |
798 | && (ep->state == DATA_STAGE_IN | |
799 | || ep->state == STATUS_STAGE_IN))) | |
800 | usba_ep_writel(ep, CTL_ENB, USBA_TX_PK_RDY); | |
801 | else | |
802 | usba_ep_writel(ep, CTL_ENB, USBA_RX_BK_RDY); | |
803 | ret = 0; | |
804 | } | |
805 | spin_unlock_irqrestore(&udc->lock, flags); | |
806 | ||
807 | return ret; | |
808 | } | |
809 | ||
810 | static void | |
811 | usba_update_req(struct usba_ep *ep, struct usba_request *req, u32 status) | |
812 | { | |
813 | req->req.actual = req->req.length - USBA_BFEXT(DMA_BUF_LEN, status); | |
814 | } | |
815 | ||
816 | static int stop_dma(struct usba_ep *ep, u32 *pstatus) | |
817 | { | |
818 | unsigned int timeout; | |
819 | u32 status; | |
820 | ||
821 | /* | |
822 | * Stop the DMA controller. When writing both CH_EN | |
823 | * and LINK to 0, the other bits are not affected. | |
824 | */ | |
825 | usba_dma_writel(ep, CONTROL, 0); | |
826 | ||
827 | /* Wait for the FIFO to empty */ | |
828 | for (timeout = 40; timeout; --timeout) { | |
829 | status = usba_dma_readl(ep, STATUS); | |
830 | if (!(status & USBA_DMA_CH_EN)) | |
831 | break; | |
832 | udelay(1); | |
833 | } | |
834 | ||
835 | if (pstatus) | |
836 | *pstatus = status; | |
837 | ||
838 | if (timeout == 0) { | |
839 | dev_err(&ep->udc->pdev->dev, | |
840 | "%s: timed out waiting for DMA FIFO to empty\n", | |
841 | ep->ep.name); | |
842 | return -ETIMEDOUT; | |
843 | } | |
844 | ||
845 | return 0; | |
846 | } | |
847 | ||
848 | static int usba_ep_dequeue(struct usb_ep *_ep, struct usb_request *_req) | |
849 | { | |
850 | struct usba_ep *ep = to_usba_ep(_ep); | |
851 | struct usba_udc *udc = ep->udc; | |
852 | struct usba_request *req = to_usba_req(_req); | |
853 | unsigned long flags; | |
854 | u32 status; | |
855 | ||
856 | DBG(DBG_GADGET | DBG_QUEUE, "ep_dequeue: %s, req %p\n", | |
857 | ep->ep.name, req); | |
858 | ||
859 | spin_lock_irqsave(&udc->lock, flags); | |
860 | ||
861 | if (req->using_dma) { | |
862 | /* | |
863 | * If this request is currently being transferred, | |
864 | * stop the DMA controller and reset the FIFO. | |
865 | */ | |
866 | if (ep->queue.next == &req->queue) { | |
867 | status = usba_dma_readl(ep, STATUS); | |
868 | if (status & USBA_DMA_CH_EN) | |
869 | stop_dma(ep, &status); | |
870 | ||
871 | #ifdef CONFIG_USB_GADGET_DEBUG_FS | |
872 | ep->last_dma_status = status; | |
873 | #endif | |
874 | ||
875 | usba_writel(udc, EPT_RST, 1 << ep->index); | |
876 | ||
877 | usba_update_req(ep, req, status); | |
878 | } | |
879 | } | |
880 | ||
881 | /* | |
882 | * Errors should stop the queue from advancing until the | |
883 | * completion function returns. | |
884 | */ | |
885 | list_del_init(&req->queue); | |
886 | ||
887 | request_complete(ep, req, -ECONNRESET); | |
888 | ||
889 | /* Process the next request if any */ | |
890 | submit_next_request(ep); | |
891 | spin_unlock_irqrestore(&udc->lock, flags); | |
892 | ||
893 | return 0; | |
894 | } | |
895 | ||
896 | static int usba_ep_set_halt(struct usb_ep *_ep, int value) | |
897 | { | |
898 | struct usba_ep *ep = to_usba_ep(_ep); | |
899 | struct usba_udc *udc = ep->udc; | |
900 | unsigned long flags; | |
901 | int ret = 0; | |
902 | ||
903 | DBG(DBG_GADGET, "endpoint %s: %s HALT\n", ep->ep.name, | |
904 | value ? "set" : "clear"); | |
905 | ||
906 | if (!ep->desc) { | |
907 | DBG(DBG_ERR, "Attempted to halt uninitialized ep %s\n", | |
908 | ep->ep.name); | |
909 | return -ENODEV; | |
910 | } | |
911 | if (ep->is_isoc) { | |
912 | DBG(DBG_ERR, "Attempted to halt isochronous ep %s\n", | |
913 | ep->ep.name); | |
914 | return -ENOTTY; | |
915 | } | |
916 | ||
917 | spin_lock_irqsave(&udc->lock, flags); | |
918 | ||
919 | /* | |
920 | * We can't halt IN endpoints while there are still data to be | |
921 | * transferred | |
922 | */ | |
923 | if (!list_empty(&ep->queue) | |
924 | || ((value && ep->is_in && (usba_ep_readl(ep, STA) | |
925 | & USBA_BF(BUSY_BANKS, -1L))))) { | |
926 | ret = -EAGAIN; | |
927 | } else { | |
928 | if (value) | |
929 | usba_ep_writel(ep, SET_STA, USBA_FORCE_STALL); | |
930 | else | |
931 | usba_ep_writel(ep, CLR_STA, | |
932 | USBA_FORCE_STALL | USBA_TOGGLE_CLR); | |
933 | usba_ep_readl(ep, STA); | |
934 | } | |
935 | ||
936 | spin_unlock_irqrestore(&udc->lock, flags); | |
937 | ||
938 | return ret; | |
939 | } | |
940 | ||
941 | static int usba_ep_fifo_status(struct usb_ep *_ep) | |
942 | { | |
943 | struct usba_ep *ep = to_usba_ep(_ep); | |
944 | ||
945 | return USBA_BFEXT(BYTE_COUNT, usba_ep_readl(ep, STA)); | |
946 | } | |
947 | ||
948 | static void usba_ep_fifo_flush(struct usb_ep *_ep) | |
949 | { | |
950 | struct usba_ep *ep = to_usba_ep(_ep); | |
951 | struct usba_udc *udc = ep->udc; | |
952 | ||
953 | usba_writel(udc, EPT_RST, 1 << ep->index); | |
954 | } | |
955 | ||
956 | static const struct usb_ep_ops usba_ep_ops = { | |
957 | .enable = usba_ep_enable, | |
958 | .disable = usba_ep_disable, | |
959 | .alloc_request = usba_ep_alloc_request, | |
960 | .free_request = usba_ep_free_request, | |
961 | .queue = usba_ep_queue, | |
962 | .dequeue = usba_ep_dequeue, | |
963 | .set_halt = usba_ep_set_halt, | |
964 | .fifo_status = usba_ep_fifo_status, | |
965 | .fifo_flush = usba_ep_fifo_flush, | |
966 | }; | |
967 | ||
968 | static int usba_udc_get_frame(struct usb_gadget *gadget) | |
969 | { | |
970 | struct usba_udc *udc = to_usba_udc(gadget); | |
971 | ||
972 | return USBA_BFEXT(FRAME_NUMBER, usba_readl(udc, FNUM)); | |
973 | } | |
974 | ||
58ed7b94 HS |
975 | static int usba_udc_wakeup(struct usb_gadget *gadget) |
976 | { | |
977 | struct usba_udc *udc = to_usba_udc(gadget); | |
978 | unsigned long flags; | |
979 | u32 ctrl; | |
980 | int ret = -EINVAL; | |
981 | ||
982 | spin_lock_irqsave(&udc->lock, flags); | |
983 | if (udc->devstatus & (1 << USB_DEVICE_REMOTE_WAKEUP)) { | |
984 | ctrl = usba_readl(udc, CTRL); | |
985 | usba_writel(udc, CTRL, ctrl | USBA_REMOTE_WAKE_UP); | |
986 | ret = 0; | |
987 | } | |
988 | spin_unlock_irqrestore(&udc->lock, flags); | |
989 | ||
990 | return ret; | |
991 | } | |
992 | ||
993 | static int | |
994 | usba_udc_set_selfpowered(struct usb_gadget *gadget, int is_selfpowered) | |
995 | { | |
996 | struct usba_udc *udc = to_usba_udc(gadget); | |
997 | unsigned long flags; | |
998 | ||
999 | spin_lock_irqsave(&udc->lock, flags); | |
1000 | if (is_selfpowered) | |
1001 | udc->devstatus |= 1 << USB_DEVICE_SELF_POWERED; | |
1002 | else | |
1003 | udc->devstatus &= ~(1 << USB_DEVICE_SELF_POWERED); | |
1004 | spin_unlock_irqrestore(&udc->lock, flags); | |
1005 | ||
1006 | return 0; | |
1007 | } | |
1008 | ||
914a3f3b | 1009 | static const struct usb_gadget_ops usba_udc_ops = { |
58ed7b94 HS |
1010 | .get_frame = usba_udc_get_frame, |
1011 | .wakeup = usba_udc_wakeup, | |
1012 | .set_selfpowered = usba_udc_set_selfpowered, | |
914a3f3b HS |
1013 | }; |
1014 | ||
914a3f3b HS |
1015 | static struct usb_endpoint_descriptor usba_ep0_desc = { |
1016 | .bLength = USB_DT_ENDPOINT_SIZE, | |
1017 | .bDescriptorType = USB_DT_ENDPOINT, | |
1018 | .bEndpointAddress = 0, | |
1019 | .bmAttributes = USB_ENDPOINT_XFER_CONTROL, | |
1020 | .wMaxPacketSize = __constant_cpu_to_le16(64), | |
1021 | /* FIXME: I have no idea what to put here */ | |
1022 | .bInterval = 1, | |
1023 | }; | |
1024 | ||
1025 | static void nop_release(struct device *dev) | |
1026 | { | |
1027 | ||
1028 | } | |
1029 | ||
1030 | static struct usba_udc the_udc = { | |
1031 | .gadget = { | |
1032 | .ops = &usba_udc_ops, | |
914a3f3b HS |
1033 | .ep_list = LIST_HEAD_INIT(the_udc.gadget.ep_list), |
1034 | .is_dualspeed = 1, | |
1035 | .name = "atmel_usba_udc", | |
1036 | .dev = { | |
c682b170 | 1037 | .init_name = "gadget", |
914a3f3b HS |
1038 | .release = nop_release, |
1039 | }, | |
1040 | }, | |
914a3f3b HS |
1041 | }; |
1042 | ||
1043 | /* | |
1044 | * Called with interrupts disabled and udc->lock held. | |
1045 | */ | |
1046 | static void reset_all_endpoints(struct usba_udc *udc) | |
1047 | { | |
1048 | struct usba_ep *ep; | |
1049 | struct usba_request *req, *tmp_req; | |
1050 | ||
1051 | usba_writel(udc, EPT_RST, ~0UL); | |
1052 | ||
1053 | ep = to_usba_ep(udc->gadget.ep0); | |
1054 | list_for_each_entry_safe(req, tmp_req, &ep->queue, queue) { | |
1055 | list_del_init(&req->queue); | |
1056 | request_complete(ep, req, -ECONNRESET); | |
1057 | } | |
1058 | ||
40517707 DB |
1059 | /* NOTE: normally, the next call to the gadget driver is in |
1060 | * charge of disabling endpoints... usually disconnect(). | |
1061 | * The exception would be entering a high speed test mode. | |
1062 | * | |
1063 | * FIXME remove this code ... and retest thoroughly. | |
1064 | */ | |
914a3f3b | 1065 | list_for_each_entry(ep, &udc->gadget.ep_list, ep.ep_list) { |
58ed7b94 HS |
1066 | if (ep->desc) { |
1067 | spin_unlock(&udc->lock); | |
914a3f3b | 1068 | usba_ep_disable(&ep->ep); |
58ed7b94 HS |
1069 | spin_lock(&udc->lock); |
1070 | } | |
914a3f3b HS |
1071 | } |
1072 | } | |
1073 | ||
1074 | static struct usba_ep *get_ep_by_addr(struct usba_udc *udc, u16 wIndex) | |
1075 | { | |
1076 | struct usba_ep *ep; | |
1077 | ||
1078 | if ((wIndex & USB_ENDPOINT_NUMBER_MASK) == 0) | |
1079 | return to_usba_ep(udc->gadget.ep0); | |
1080 | ||
1081 | list_for_each_entry (ep, &udc->gadget.ep_list, ep.ep_list) { | |
1082 | u8 bEndpointAddress; | |
1083 | ||
1084 | if (!ep->desc) | |
1085 | continue; | |
1086 | bEndpointAddress = ep->desc->bEndpointAddress; | |
1087 | if ((wIndex ^ bEndpointAddress) & USB_DIR_IN) | |
1088 | continue; | |
1089 | if ((bEndpointAddress & USB_ENDPOINT_NUMBER_MASK) | |
1090 | == (wIndex & USB_ENDPOINT_NUMBER_MASK)) | |
1091 | return ep; | |
1092 | } | |
1093 | ||
1094 | return NULL; | |
1095 | } | |
1096 | ||
1097 | /* Called with interrupts disabled and udc->lock held */ | |
1098 | static inline void set_protocol_stall(struct usba_udc *udc, struct usba_ep *ep) | |
1099 | { | |
1100 | usba_ep_writel(ep, SET_STA, USBA_FORCE_STALL); | |
1101 | ep->state = WAIT_FOR_SETUP; | |
1102 | } | |
1103 | ||
1104 | static inline int is_stalled(struct usba_udc *udc, struct usba_ep *ep) | |
1105 | { | |
1106 | if (usba_ep_readl(ep, STA) & USBA_FORCE_STALL) | |
1107 | return 1; | |
1108 | return 0; | |
1109 | } | |
1110 | ||
1111 | static inline void set_address(struct usba_udc *udc, unsigned int addr) | |
1112 | { | |
1113 | u32 regval; | |
1114 | ||
1115 | DBG(DBG_BUS, "setting address %u...\n", addr); | |
1116 | regval = usba_readl(udc, CTRL); | |
1117 | regval = USBA_BFINS(DEV_ADDR, addr, regval); | |
1118 | usba_writel(udc, CTRL, regval); | |
1119 | } | |
1120 | ||
1121 | static int do_test_mode(struct usba_udc *udc) | |
1122 | { | |
1123 | static const char test_packet_buffer[] = { | |
1124 | /* JKJKJKJK * 9 */ | |
1125 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | |
1126 | /* JJKKJJKK * 8 */ | |
1127 | 0xAA, 0xAA, 0xAA, 0xAA, 0xAA, 0xAA, 0xAA, 0xAA, | |
1128 | /* JJKKJJKK * 8 */ | |
1129 | 0xEE, 0xEE, 0xEE, 0xEE, 0xEE, 0xEE, 0xEE, 0xEE, | |
1130 | /* JJJJJJJKKKKKKK * 8 */ | |
1131 | 0xFE, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, | |
1132 | 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, | |
1133 | /* JJJJJJJK * 8 */ | |
1134 | 0x7F, 0xBF, 0xDF, 0xEF, 0xF7, 0xFB, 0xFD, | |
1135 | /* {JKKKKKKK * 10}, JK */ | |
1136 | 0xFC, 0x7E, 0xBF, 0xDF, 0xEF, 0xF7, 0xFB, 0xFD, 0x7E | |
1137 | }; | |
1138 | struct usba_ep *ep; | |
1139 | struct device *dev = &udc->pdev->dev; | |
1140 | int test_mode; | |
1141 | ||
1142 | test_mode = udc->test_mode; | |
1143 | ||
1144 | /* Start from a clean slate */ | |
1145 | reset_all_endpoints(udc); | |
1146 | ||
1147 | switch (test_mode) { | |
1148 | case 0x0100: | |
1149 | /* Test_J */ | |
1150 | usba_writel(udc, TST, USBA_TST_J_MODE); | |
1151 | dev_info(dev, "Entering Test_J mode...\n"); | |
1152 | break; | |
1153 | case 0x0200: | |
1154 | /* Test_K */ | |
1155 | usba_writel(udc, TST, USBA_TST_K_MODE); | |
1156 | dev_info(dev, "Entering Test_K mode...\n"); | |
1157 | break; | |
1158 | case 0x0300: | |
1159 | /* | |
1160 | * Test_SE0_NAK: Force high-speed mode and set up ep0 | |
1161 | * for Bulk IN transfers | |
1162 | */ | |
1163 | ep = &usba_ep[0]; | |
1164 | usba_writel(udc, TST, | |
1165 | USBA_BF(SPEED_CFG, USBA_SPEED_CFG_FORCE_HIGH)); | |
1166 | usba_ep_writel(ep, CFG, | |
1167 | USBA_BF(EPT_SIZE, USBA_EPT_SIZE_64) | |
1168 | | USBA_EPT_DIR_IN | |
1169 | | USBA_BF(EPT_TYPE, USBA_EPT_TYPE_BULK) | |
1170 | | USBA_BF(BK_NUMBER, 1)); | |
1171 | if (!(usba_ep_readl(ep, CFG) & USBA_EPT_MAPPED)) { | |
1172 | set_protocol_stall(udc, ep); | |
1173 | dev_err(dev, "Test_SE0_NAK: ep0 not mapped\n"); | |
1174 | } else { | |
1175 | usba_ep_writel(ep, CTL_ENB, USBA_EPT_ENABLE); | |
1176 | dev_info(dev, "Entering Test_SE0_NAK mode...\n"); | |
1177 | } | |
1178 | break; | |
1179 | case 0x0400: | |
1180 | /* Test_Packet */ | |
1181 | ep = &usba_ep[0]; | |
1182 | usba_ep_writel(ep, CFG, | |
1183 | USBA_BF(EPT_SIZE, USBA_EPT_SIZE_64) | |
1184 | | USBA_EPT_DIR_IN | |
1185 | | USBA_BF(EPT_TYPE, USBA_EPT_TYPE_BULK) | |
1186 | | USBA_BF(BK_NUMBER, 1)); | |
1187 | if (!(usba_ep_readl(ep, CFG) & USBA_EPT_MAPPED)) { | |
1188 | set_protocol_stall(udc, ep); | |
1189 | dev_err(dev, "Test_Packet: ep0 not mapped\n"); | |
1190 | } else { | |
1191 | usba_ep_writel(ep, CTL_ENB, USBA_EPT_ENABLE); | |
1192 | usba_writel(udc, TST, USBA_TST_PKT_MODE); | |
5d4c2707 | 1193 | memcpy_toio(ep->fifo, test_packet_buffer, |
914a3f3b HS |
1194 | sizeof(test_packet_buffer)); |
1195 | usba_ep_writel(ep, SET_STA, USBA_TX_PK_RDY); | |
1196 | dev_info(dev, "Entering Test_Packet mode...\n"); | |
1197 | } | |
1198 | break; | |
1199 | default: | |
1200 | dev_err(dev, "Invalid test mode: 0x%04x\n", test_mode); | |
1201 | return -EINVAL; | |
1202 | } | |
1203 | ||
1204 | return 0; | |
1205 | } | |
1206 | ||
1207 | /* Avoid overly long expressions */ | |
1208 | static inline bool feature_is_dev_remote_wakeup(struct usb_ctrlrequest *crq) | |
1209 | { | |
1210 | if (crq->wValue == __constant_cpu_to_le16(USB_DEVICE_REMOTE_WAKEUP)) | |
1211 | return true; | |
1212 | return false; | |
1213 | } | |
1214 | ||
1215 | static inline bool feature_is_dev_test_mode(struct usb_ctrlrequest *crq) | |
1216 | { | |
1217 | if (crq->wValue == __constant_cpu_to_le16(USB_DEVICE_TEST_MODE)) | |
1218 | return true; | |
1219 | return false; | |
1220 | } | |
1221 | ||
1222 | static inline bool feature_is_ep_halt(struct usb_ctrlrequest *crq) | |
1223 | { | |
1224 | if (crq->wValue == __constant_cpu_to_le16(USB_ENDPOINT_HALT)) | |
1225 | return true; | |
1226 | return false; | |
1227 | } | |
1228 | ||
1229 | static int handle_ep0_setup(struct usba_udc *udc, struct usba_ep *ep, | |
1230 | struct usb_ctrlrequest *crq) | |
1231 | { | |
40517707 | 1232 | int retval = 0; |
914a3f3b HS |
1233 | |
1234 | switch (crq->bRequest) { | |
1235 | case USB_REQ_GET_STATUS: { | |
1236 | u16 status; | |
1237 | ||
1238 | if (crq->bRequestType == (USB_DIR_IN | USB_RECIP_DEVICE)) { | |
58ed7b94 | 1239 | status = cpu_to_le16(udc->devstatus); |
914a3f3b HS |
1240 | } else if (crq->bRequestType |
1241 | == (USB_DIR_IN | USB_RECIP_INTERFACE)) { | |
1242 | status = __constant_cpu_to_le16(0); | |
1243 | } else if (crq->bRequestType | |
1244 | == (USB_DIR_IN | USB_RECIP_ENDPOINT)) { | |
1245 | struct usba_ep *target; | |
1246 | ||
1247 | target = get_ep_by_addr(udc, le16_to_cpu(crq->wIndex)); | |
1248 | if (!target) | |
1249 | goto stall; | |
1250 | ||
1251 | status = 0; | |
1252 | if (is_stalled(udc, target)) | |
1253 | status |= __constant_cpu_to_le16(1); | |
1254 | } else | |
1255 | goto delegate; | |
1256 | ||
1257 | /* Write directly to the FIFO. No queueing is done. */ | |
1258 | if (crq->wLength != __constant_cpu_to_le16(sizeof(status))) | |
1259 | goto stall; | |
1260 | ep->state = DATA_STAGE_IN; | |
1261 | __raw_writew(status, ep->fifo); | |
1262 | usba_ep_writel(ep, SET_STA, USBA_TX_PK_RDY); | |
1263 | break; | |
1264 | } | |
1265 | ||
1266 | case USB_REQ_CLEAR_FEATURE: { | |
1267 | if (crq->bRequestType == USB_RECIP_DEVICE) { | |
58ed7b94 HS |
1268 | if (feature_is_dev_remote_wakeup(crq)) |
1269 | udc->devstatus | |
1270 | &= ~(1 << USB_DEVICE_REMOTE_WAKEUP); | |
1271 | else | |
914a3f3b HS |
1272 | /* Can't CLEAR_FEATURE TEST_MODE */ |
1273 | goto stall; | |
914a3f3b HS |
1274 | } else if (crq->bRequestType == USB_RECIP_ENDPOINT) { |
1275 | struct usba_ep *target; | |
1276 | ||
1277 | if (crq->wLength != __constant_cpu_to_le16(0) | |
1278 | || !feature_is_ep_halt(crq)) | |
1279 | goto stall; | |
1280 | target = get_ep_by_addr(udc, le16_to_cpu(crq->wIndex)); | |
1281 | if (!target) | |
1282 | goto stall; | |
1283 | ||
1284 | usba_ep_writel(target, CLR_STA, USBA_FORCE_STALL); | |
1285 | if (target->index != 0) | |
1286 | usba_ep_writel(target, CLR_STA, | |
1287 | USBA_TOGGLE_CLR); | |
1288 | } else { | |
1289 | goto delegate; | |
1290 | } | |
1291 | ||
1292 | send_status(udc, ep); | |
1293 | break; | |
1294 | } | |
1295 | ||
1296 | case USB_REQ_SET_FEATURE: { | |
1297 | if (crq->bRequestType == USB_RECIP_DEVICE) { | |
1298 | if (feature_is_dev_test_mode(crq)) { | |
1299 | send_status(udc, ep); | |
1300 | ep->state = STATUS_STAGE_TEST; | |
1301 | udc->test_mode = le16_to_cpu(crq->wIndex); | |
1302 | return 0; | |
1303 | } else if (feature_is_dev_remote_wakeup(crq)) { | |
58ed7b94 | 1304 | udc->devstatus |= 1 << USB_DEVICE_REMOTE_WAKEUP; |
914a3f3b HS |
1305 | } else { |
1306 | goto stall; | |
1307 | } | |
1308 | } else if (crq->bRequestType == USB_RECIP_ENDPOINT) { | |
1309 | struct usba_ep *target; | |
1310 | ||
1311 | if (crq->wLength != __constant_cpu_to_le16(0) | |
1312 | || !feature_is_ep_halt(crq)) | |
1313 | goto stall; | |
1314 | ||
1315 | target = get_ep_by_addr(udc, le16_to_cpu(crq->wIndex)); | |
1316 | if (!target) | |
1317 | goto stall; | |
1318 | ||
1319 | usba_ep_writel(target, SET_STA, USBA_FORCE_STALL); | |
1320 | } else | |
1321 | goto delegate; | |
1322 | ||
1323 | send_status(udc, ep); | |
1324 | break; | |
1325 | } | |
1326 | ||
1327 | case USB_REQ_SET_ADDRESS: | |
1328 | if (crq->bRequestType != (USB_DIR_OUT | USB_RECIP_DEVICE)) | |
1329 | goto delegate; | |
1330 | ||
1331 | set_address(udc, le16_to_cpu(crq->wValue)); | |
1332 | send_status(udc, ep); | |
1333 | ep->state = STATUS_STAGE_ADDR; | |
1334 | break; | |
1335 | ||
1336 | default: | |
1337 | delegate: | |
1338 | spin_unlock(&udc->lock); | |
1339 | retval = udc->driver->setup(&udc->gadget, crq); | |
1340 | spin_lock(&udc->lock); | |
1341 | } | |
1342 | ||
1343 | return retval; | |
1344 | ||
1345 | stall: | |
00274921 | 1346 | pr_err("udc: %s: Invalid setup request: %02x.%02x v%04x i%04x l%d, " |
914a3f3b HS |
1347 | "halting endpoint...\n", |
1348 | ep->ep.name, crq->bRequestType, crq->bRequest, | |
1349 | le16_to_cpu(crq->wValue), le16_to_cpu(crq->wIndex), | |
1350 | le16_to_cpu(crq->wLength)); | |
1351 | set_protocol_stall(udc, ep); | |
1352 | return -1; | |
1353 | } | |
1354 | ||
1355 | static void usba_control_irq(struct usba_udc *udc, struct usba_ep *ep) | |
1356 | { | |
1357 | struct usba_request *req; | |
1358 | u32 epstatus; | |
1359 | u32 epctrl; | |
1360 | ||
1361 | restart: | |
1362 | epstatus = usba_ep_readl(ep, STA); | |
1363 | epctrl = usba_ep_readl(ep, CTL); | |
1364 | ||
1365 | DBG(DBG_INT, "%s [%d]: s/%08x c/%08x\n", | |
1366 | ep->ep.name, ep->state, epstatus, epctrl); | |
1367 | ||
1368 | req = NULL; | |
1369 | if (!list_empty(&ep->queue)) | |
1370 | req = list_entry(ep->queue.next, | |
1371 | struct usba_request, queue); | |
1372 | ||
1373 | if ((epctrl & USBA_TX_PK_RDY) && !(epstatus & USBA_TX_PK_RDY)) { | |
1374 | if (req->submitted) | |
1375 | next_fifo_transaction(ep, req); | |
1376 | else | |
1377 | submit_request(ep, req); | |
1378 | ||
1379 | if (req->last_transaction) { | |
1380 | usba_ep_writel(ep, CTL_DIS, USBA_TX_PK_RDY); | |
1381 | usba_ep_writel(ep, CTL_ENB, USBA_TX_COMPLETE); | |
1382 | } | |
1383 | goto restart; | |
1384 | } | |
1385 | if ((epstatus & epctrl) & USBA_TX_COMPLETE) { | |
1386 | usba_ep_writel(ep, CLR_STA, USBA_TX_COMPLETE); | |
1387 | ||
1388 | switch (ep->state) { | |
1389 | case DATA_STAGE_IN: | |
1390 | usba_ep_writel(ep, CTL_ENB, USBA_RX_BK_RDY); | |
1391 | usba_ep_writel(ep, CTL_DIS, USBA_TX_COMPLETE); | |
1392 | ep->state = STATUS_STAGE_OUT; | |
1393 | break; | |
1394 | case STATUS_STAGE_ADDR: | |
1395 | /* Activate our new address */ | |
1396 | usba_writel(udc, CTRL, (usba_readl(udc, CTRL) | |
1397 | | USBA_FADDR_EN)); | |
1398 | usba_ep_writel(ep, CTL_DIS, USBA_TX_COMPLETE); | |
1399 | ep->state = WAIT_FOR_SETUP; | |
1400 | break; | |
1401 | case STATUS_STAGE_IN: | |
1402 | if (req) { | |
1403 | list_del_init(&req->queue); | |
1404 | request_complete(ep, req, 0); | |
1405 | submit_next_request(ep); | |
1406 | } | |
1407 | usba_ep_writel(ep, CTL_DIS, USBA_TX_COMPLETE); | |
1408 | ep->state = WAIT_FOR_SETUP; | |
1409 | break; | |
1410 | case STATUS_STAGE_TEST: | |
1411 | usba_ep_writel(ep, CTL_DIS, USBA_TX_COMPLETE); | |
1412 | ep->state = WAIT_FOR_SETUP; | |
1413 | if (do_test_mode(udc)) | |
1414 | set_protocol_stall(udc, ep); | |
1415 | break; | |
1416 | default: | |
00274921 | 1417 | pr_err("udc: %s: TXCOMP: Invalid endpoint state %d, " |
914a3f3b HS |
1418 | "halting endpoint...\n", |
1419 | ep->ep.name, ep->state); | |
1420 | set_protocol_stall(udc, ep); | |
1421 | break; | |
1422 | } | |
1423 | ||
1424 | goto restart; | |
1425 | } | |
1426 | if ((epstatus & epctrl) & USBA_RX_BK_RDY) { | |
1427 | switch (ep->state) { | |
1428 | case STATUS_STAGE_OUT: | |
1429 | usba_ep_writel(ep, CLR_STA, USBA_RX_BK_RDY); | |
1430 | usba_ep_writel(ep, CTL_DIS, USBA_RX_BK_RDY); | |
1431 | ||
1432 | if (req) { | |
1433 | list_del_init(&req->queue); | |
1434 | request_complete(ep, req, 0); | |
1435 | } | |
1436 | ep->state = WAIT_FOR_SETUP; | |
1437 | break; | |
1438 | ||
1439 | case DATA_STAGE_OUT: | |
1440 | receive_data(ep); | |
1441 | break; | |
1442 | ||
1443 | default: | |
1444 | usba_ep_writel(ep, CLR_STA, USBA_RX_BK_RDY); | |
1445 | usba_ep_writel(ep, CTL_DIS, USBA_RX_BK_RDY); | |
00274921 | 1446 | pr_err("udc: %s: RXRDY: Invalid endpoint state %d, " |
914a3f3b HS |
1447 | "halting endpoint...\n", |
1448 | ep->ep.name, ep->state); | |
1449 | set_protocol_stall(udc, ep); | |
1450 | break; | |
1451 | } | |
1452 | ||
1453 | goto restart; | |
1454 | } | |
1455 | if (epstatus & USBA_RX_SETUP) { | |
1456 | union { | |
1457 | struct usb_ctrlrequest crq; | |
1458 | unsigned long data[2]; | |
1459 | } crq; | |
1460 | unsigned int pkt_len; | |
1461 | int ret; | |
1462 | ||
1463 | if (ep->state != WAIT_FOR_SETUP) { | |
1464 | /* | |
1465 | * Didn't expect a SETUP packet at this | |
1466 | * point. Clean up any pending requests (which | |
1467 | * may be successful). | |
1468 | */ | |
1469 | int status = -EPROTO; | |
1470 | ||
1471 | /* | |
1472 | * RXRDY and TXCOMP are dropped when SETUP | |
1473 | * packets arrive. Just pretend we received | |
1474 | * the status packet. | |
1475 | */ | |
1476 | if (ep->state == STATUS_STAGE_OUT | |
1477 | || ep->state == STATUS_STAGE_IN) { | |
1478 | usba_ep_writel(ep, CTL_DIS, USBA_RX_BK_RDY); | |
1479 | status = 0; | |
1480 | } | |
1481 | ||
1482 | if (req) { | |
1483 | list_del_init(&req->queue); | |
1484 | request_complete(ep, req, status); | |
1485 | } | |
1486 | } | |
1487 | ||
1488 | pkt_len = USBA_BFEXT(BYTE_COUNT, usba_ep_readl(ep, STA)); | |
1489 | DBG(DBG_HW, "Packet length: %u\n", pkt_len); | |
1490 | if (pkt_len != sizeof(crq)) { | |
00274921 | 1491 | pr_warning("udc: Invalid packet length %u " |
16a45bc8 | 1492 | "(expected %zu)\n", pkt_len, sizeof(crq)); |
914a3f3b HS |
1493 | set_protocol_stall(udc, ep); |
1494 | return; | |
1495 | } | |
1496 | ||
1497 | DBG(DBG_FIFO, "Copying ctrl request from 0x%p:\n", ep->fifo); | |
5d4c2707 | 1498 | memcpy_fromio(crq.data, ep->fifo, sizeof(crq)); |
914a3f3b HS |
1499 | |
1500 | /* Free up one bank in the FIFO so that we can | |
1501 | * generate or receive a reply right away. */ | |
1502 | usba_ep_writel(ep, CLR_STA, USBA_RX_SETUP); | |
1503 | ||
1504 | /* printk(KERN_DEBUG "setup: %d: %02x.%02x\n", | |
1505 | ep->state, crq.crq.bRequestType, | |
1506 | crq.crq.bRequest); */ | |
1507 | ||
1508 | if (crq.crq.bRequestType & USB_DIR_IN) { | |
1509 | /* | |
1510 | * The USB 2.0 spec states that "if wLength is | |
1511 | * zero, there is no data transfer phase." | |
1512 | * However, testusb #14 seems to actually | |
1513 | * expect a data phase even if wLength = 0... | |
1514 | */ | |
1515 | ep->state = DATA_STAGE_IN; | |
1516 | } else { | |
1517 | if (crq.crq.wLength != __constant_cpu_to_le16(0)) | |
1518 | ep->state = DATA_STAGE_OUT; | |
1519 | else | |
1520 | ep->state = STATUS_STAGE_IN; | |
1521 | } | |
1522 | ||
1523 | ret = -1; | |
1524 | if (ep->index == 0) | |
1525 | ret = handle_ep0_setup(udc, ep, &crq.crq); | |
1526 | else { | |
1527 | spin_unlock(&udc->lock); | |
1528 | ret = udc->driver->setup(&udc->gadget, &crq.crq); | |
1529 | spin_lock(&udc->lock); | |
1530 | } | |
1531 | ||
1532 | DBG(DBG_BUS, "req %02x.%02x, length %d, state %d, ret %d\n", | |
1533 | crq.crq.bRequestType, crq.crq.bRequest, | |
1534 | le16_to_cpu(crq.crq.wLength), ep->state, ret); | |
1535 | ||
1536 | if (ret < 0) { | |
1537 | /* Let the host know that we failed */ | |
1538 | set_protocol_stall(udc, ep); | |
1539 | } | |
1540 | } | |
1541 | } | |
1542 | ||
1543 | static void usba_ep_irq(struct usba_udc *udc, struct usba_ep *ep) | |
1544 | { | |
1545 | struct usba_request *req; | |
1546 | u32 epstatus; | |
1547 | u32 epctrl; | |
1548 | ||
1549 | epstatus = usba_ep_readl(ep, STA); | |
1550 | epctrl = usba_ep_readl(ep, CTL); | |
1551 | ||
1552 | DBG(DBG_INT, "%s: interrupt, status: 0x%08x\n", ep->ep.name, epstatus); | |
1553 | ||
1554 | while ((epctrl & USBA_TX_PK_RDY) && !(epstatus & USBA_TX_PK_RDY)) { | |
1555 | DBG(DBG_BUS, "%s: TX PK ready\n", ep->ep.name); | |
1556 | ||
1557 | if (list_empty(&ep->queue)) { | |
1558 | dev_warn(&udc->pdev->dev, "ep_irq: queue empty\n"); | |
1559 | usba_ep_writel(ep, CTL_DIS, USBA_TX_PK_RDY); | |
1560 | return; | |
1561 | } | |
1562 | ||
1563 | req = list_entry(ep->queue.next, struct usba_request, queue); | |
1564 | ||
1565 | if (req->using_dma) { | |
1566 | /* Send a zero-length packet */ | |
1567 | usba_ep_writel(ep, SET_STA, | |
1568 | USBA_TX_PK_RDY); | |
1569 | usba_ep_writel(ep, CTL_DIS, | |
1570 | USBA_TX_PK_RDY); | |
1571 | list_del_init(&req->queue); | |
1572 | submit_next_request(ep); | |
1573 | request_complete(ep, req, 0); | |
1574 | } else { | |
1575 | if (req->submitted) | |
1576 | next_fifo_transaction(ep, req); | |
1577 | else | |
1578 | submit_request(ep, req); | |
1579 | ||
1580 | if (req->last_transaction) { | |
1581 | list_del_init(&req->queue); | |
1582 | submit_next_request(ep); | |
1583 | request_complete(ep, req, 0); | |
1584 | } | |
1585 | } | |
1586 | ||
1587 | epstatus = usba_ep_readl(ep, STA); | |
1588 | epctrl = usba_ep_readl(ep, CTL); | |
1589 | } | |
1590 | if ((epstatus & epctrl) & USBA_RX_BK_RDY) { | |
1591 | DBG(DBG_BUS, "%s: RX data ready\n", ep->ep.name); | |
1592 | receive_data(ep); | |
1593 | usba_ep_writel(ep, CLR_STA, USBA_RX_BK_RDY); | |
1594 | } | |
1595 | } | |
1596 | ||
1597 | static void usba_dma_irq(struct usba_udc *udc, struct usba_ep *ep) | |
1598 | { | |
1599 | struct usba_request *req; | |
1600 | u32 status, control, pending; | |
1601 | ||
1602 | status = usba_dma_readl(ep, STATUS); | |
1603 | control = usba_dma_readl(ep, CONTROL); | |
1604 | #ifdef CONFIG_USB_GADGET_DEBUG_FS | |
1605 | ep->last_dma_status = status; | |
1606 | #endif | |
1607 | pending = status & control; | |
1608 | DBG(DBG_INT | DBG_DMA, "dma irq, s/%#08x, c/%#08x\n", status, control); | |
1609 | ||
1610 | if (status & USBA_DMA_CH_EN) { | |
1611 | dev_err(&udc->pdev->dev, | |
1612 | "DMA_CH_EN is set after transfer is finished!\n"); | |
1613 | dev_err(&udc->pdev->dev, | |
1614 | "status=%#08x, pending=%#08x, control=%#08x\n", | |
1615 | status, pending, control); | |
1616 | ||
1617 | /* | |
1618 | * try to pretend nothing happened. We might have to | |
1619 | * do something here... | |
1620 | */ | |
1621 | } | |
1622 | ||
1623 | if (list_empty(&ep->queue)) | |
1624 | /* Might happen if a reset comes along at the right moment */ | |
1625 | return; | |
1626 | ||
1627 | if (pending & (USBA_DMA_END_TR_ST | USBA_DMA_END_BUF_ST)) { | |
1628 | req = list_entry(ep->queue.next, struct usba_request, queue); | |
1629 | usba_update_req(ep, req, status); | |
1630 | ||
1631 | list_del_init(&req->queue); | |
1632 | submit_next_request(ep); | |
1633 | request_complete(ep, req, 0); | |
1634 | } | |
1635 | } | |
1636 | ||
1637 | static irqreturn_t usba_udc_irq(int irq, void *devid) | |
1638 | { | |
1639 | struct usba_udc *udc = devid; | |
1640 | u32 status; | |
1641 | u32 dma_status; | |
1642 | u32 ep_status; | |
1643 | ||
1644 | spin_lock(&udc->lock); | |
1645 | ||
1646 | status = usba_readl(udc, INT_STA); | |
1647 | DBG(DBG_INT, "irq, status=%#08x\n", status); | |
1648 | ||
1649 | if (status & USBA_DET_SUSPEND) { | |
16a45bc8 | 1650 | toggle_bias(0); |
914a3f3b HS |
1651 | usba_writel(udc, INT_CLR, USBA_DET_SUSPEND); |
1652 | DBG(DBG_BUS, "Suspend detected\n"); | |
1653 | if (udc->gadget.speed != USB_SPEED_UNKNOWN | |
1654 | && udc->driver && udc->driver->suspend) { | |
1655 | spin_unlock(&udc->lock); | |
1656 | udc->driver->suspend(&udc->gadget); | |
1657 | spin_lock(&udc->lock); | |
1658 | } | |
1659 | } | |
1660 | ||
1661 | if (status & USBA_WAKE_UP) { | |
16a45bc8 | 1662 | toggle_bias(1); |
914a3f3b HS |
1663 | usba_writel(udc, INT_CLR, USBA_WAKE_UP); |
1664 | DBG(DBG_BUS, "Wake Up CPU detected\n"); | |
1665 | } | |
1666 | ||
1667 | if (status & USBA_END_OF_RESUME) { | |
1668 | usba_writel(udc, INT_CLR, USBA_END_OF_RESUME); | |
1669 | DBG(DBG_BUS, "Resume detected\n"); | |
1670 | if (udc->gadget.speed != USB_SPEED_UNKNOWN | |
1671 | && udc->driver && udc->driver->resume) { | |
1672 | spin_unlock(&udc->lock); | |
1673 | udc->driver->resume(&udc->gadget); | |
1674 | spin_lock(&udc->lock); | |
1675 | } | |
1676 | } | |
1677 | ||
1678 | dma_status = USBA_BFEXT(DMA_INT, status); | |
1679 | if (dma_status) { | |
1680 | int i; | |
1681 | ||
1682 | for (i = 1; i < USBA_NR_ENDPOINTS; i++) | |
1683 | if (dma_status & (1 << i)) | |
1684 | usba_dma_irq(udc, &usba_ep[i]); | |
1685 | } | |
1686 | ||
1687 | ep_status = USBA_BFEXT(EPT_INT, status); | |
1688 | if (ep_status) { | |
1689 | int i; | |
1690 | ||
1691 | for (i = 0; i < USBA_NR_ENDPOINTS; i++) | |
1692 | if (ep_status & (1 << i)) { | |
1693 | if (ep_is_control(&usba_ep[i])) | |
1694 | usba_control_irq(udc, &usba_ep[i]); | |
1695 | else | |
1696 | usba_ep_irq(udc, &usba_ep[i]); | |
1697 | } | |
1698 | } | |
1699 | ||
1700 | if (status & USBA_END_OF_RESET) { | |
1701 | struct usba_ep *ep0; | |
1702 | ||
1703 | usba_writel(udc, INT_CLR, USBA_END_OF_RESET); | |
1704 | reset_all_endpoints(udc); | |
1705 | ||
40517707 DB |
1706 | if (udc->gadget.speed != USB_SPEED_UNKNOWN |
1707 | && udc->driver->disconnect) { | |
1708 | udc->gadget.speed = USB_SPEED_UNKNOWN; | |
1709 | spin_unlock(&udc->lock); | |
1710 | udc->driver->disconnect(&udc->gadget); | |
1711 | spin_lock(&udc->lock); | |
1712 | } | |
1713 | ||
914a3f3b HS |
1714 | if (status & USBA_HIGH_SPEED) { |
1715 | DBG(DBG_BUS, "High-speed bus reset detected\n"); | |
1716 | udc->gadget.speed = USB_SPEED_HIGH; | |
1717 | } else { | |
1718 | DBG(DBG_BUS, "Full-speed bus reset detected\n"); | |
1719 | udc->gadget.speed = USB_SPEED_FULL; | |
1720 | } | |
1721 | ||
1722 | ep0 = &usba_ep[0]; | |
1723 | ep0->desc = &usba_ep0_desc; | |
1724 | ep0->state = WAIT_FOR_SETUP; | |
1725 | usba_ep_writel(ep0, CFG, | |
1726 | (USBA_BF(EPT_SIZE, EP0_EPT_SIZE) | |
1727 | | USBA_BF(EPT_TYPE, USBA_EPT_TYPE_CONTROL) | |
1728 | | USBA_BF(BK_NUMBER, USBA_BK_NUMBER_ONE))); | |
1729 | usba_ep_writel(ep0, CTL_ENB, | |
1730 | USBA_EPT_ENABLE | USBA_RX_SETUP); | |
1731 | usba_writel(udc, INT_ENB, | |
1732 | (usba_readl(udc, INT_ENB) | |
1733 | | USBA_BF(EPT_INT, 1) | |
1734 | | USBA_DET_SUSPEND | |
1735 | | USBA_END_OF_RESUME)); | |
1736 | ||
40517707 DB |
1737 | /* |
1738 | * Unclear why we hit this irregularly, e.g. in usbtest, | |
1739 | * but it's clearly harmless... | |
1740 | */ | |
914a3f3b | 1741 | if (!(usba_ep_readl(ep0, CFG) & USBA_EPT_MAPPED)) |
40517707 DB |
1742 | dev_dbg(&udc->pdev->dev, |
1743 | "ODD: EP0 configuration is invalid!\n"); | |
914a3f3b HS |
1744 | } |
1745 | ||
1746 | spin_unlock(&udc->lock); | |
1747 | ||
1748 | return IRQ_HANDLED; | |
1749 | } | |
1750 | ||
1751 | static irqreturn_t usba_vbus_irq(int irq, void *devid) | |
1752 | { | |
1753 | struct usba_udc *udc = devid; | |
1754 | int vbus; | |
1755 | ||
1756 | /* debounce */ | |
1757 | udelay(10); | |
1758 | ||
1759 | spin_lock(&udc->lock); | |
1760 | ||
1761 | /* May happen if Vbus pin toggles during probe() */ | |
1762 | if (!udc->driver) | |
1763 | goto out; | |
1764 | ||
1765 | vbus = gpio_get_value(udc->vbus_pin); | |
1766 | if (vbus != udc->vbus_prev) { | |
1767 | if (vbus) { | |
16a45bc8 SP |
1768 | toggle_bias(1); |
1769 | usba_writel(udc, CTRL, USBA_ENABLE_MASK); | |
914a3f3b HS |
1770 | usba_writel(udc, INT_ENB, USBA_END_OF_RESET); |
1771 | } else { | |
1772 | udc->gadget.speed = USB_SPEED_UNKNOWN; | |
1773 | reset_all_endpoints(udc); | |
16a45bc8 SP |
1774 | toggle_bias(0); |
1775 | usba_writel(udc, CTRL, USBA_DISABLE_MASK); | |
40517707 DB |
1776 | if (udc->driver->disconnect) { |
1777 | spin_unlock(&udc->lock); | |
1778 | udc->driver->disconnect(&udc->gadget); | |
1779 | spin_lock(&udc->lock); | |
1780 | } | |
914a3f3b HS |
1781 | } |
1782 | udc->vbus_prev = vbus; | |
1783 | } | |
1784 | ||
1785 | out: | |
1786 | spin_unlock(&udc->lock); | |
1787 | ||
1788 | return IRQ_HANDLED; | |
1789 | } | |
1790 | ||
1791 | int usb_gadget_register_driver(struct usb_gadget_driver *driver) | |
1792 | { | |
1793 | struct usba_udc *udc = &the_udc; | |
1794 | unsigned long flags; | |
1795 | int ret; | |
1796 | ||
1797 | if (!udc->pdev) | |
1798 | return -ENODEV; | |
1799 | ||
1800 | spin_lock_irqsave(&udc->lock, flags); | |
1801 | if (udc->driver) { | |
1802 | spin_unlock_irqrestore(&udc->lock, flags); | |
1803 | return -EBUSY; | |
1804 | } | |
1805 | ||
58ed7b94 | 1806 | udc->devstatus = 1 << USB_DEVICE_SELF_POWERED; |
914a3f3b HS |
1807 | udc->driver = driver; |
1808 | udc->gadget.dev.driver = &driver->driver; | |
1809 | spin_unlock_irqrestore(&udc->lock, flags); | |
1810 | ||
1811 | clk_enable(udc->pclk); | |
1812 | clk_enable(udc->hclk); | |
1813 | ||
1814 | ret = driver->bind(&udc->gadget); | |
1815 | if (ret) { | |
1816 | DBG(DBG_ERR, "Could not bind to driver %s: error %d\n", | |
1817 | driver->driver.name, ret); | |
1818 | goto err_driver_bind; | |
1819 | } | |
1820 | ||
1821 | DBG(DBG_GADGET, "registered driver `%s'\n", driver->driver.name); | |
1822 | ||
1823 | udc->vbus_prev = 0; | |
1824 | if (udc->vbus_pin != -1) | |
1825 | enable_irq(gpio_to_irq(udc->vbus_pin)); | |
1826 | ||
1827 | /* If Vbus is present, enable the controller and wait for reset */ | |
1828 | spin_lock_irqsave(&udc->lock, flags); | |
1829 | if (vbus_is_present(udc) && udc->vbus_prev == 0) { | |
16a45bc8 SP |
1830 | toggle_bias(1); |
1831 | usba_writel(udc, CTRL, USBA_ENABLE_MASK); | |
914a3f3b HS |
1832 | usba_writel(udc, INT_ENB, USBA_END_OF_RESET); |
1833 | } | |
1834 | spin_unlock_irqrestore(&udc->lock, flags); | |
1835 | ||
1836 | return 0; | |
1837 | ||
1838 | err_driver_bind: | |
1839 | udc->driver = NULL; | |
1840 | udc->gadget.dev.driver = NULL; | |
1841 | return ret; | |
1842 | } | |
1843 | EXPORT_SYMBOL(usb_gadget_register_driver); | |
1844 | ||
1845 | int usb_gadget_unregister_driver(struct usb_gadget_driver *driver) | |
1846 | { | |
1847 | struct usba_udc *udc = &the_udc; | |
1848 | unsigned long flags; | |
1849 | ||
1850 | if (!udc->pdev) | |
1851 | return -ENODEV; | |
40517707 | 1852 | if (driver != udc->driver || !driver->unbind) |
914a3f3b HS |
1853 | return -EINVAL; |
1854 | ||
1855 | if (udc->vbus_pin != -1) | |
1856 | disable_irq(gpio_to_irq(udc->vbus_pin)); | |
1857 | ||
1858 | spin_lock_irqsave(&udc->lock, flags); | |
1859 | udc->gadget.speed = USB_SPEED_UNKNOWN; | |
1860 | reset_all_endpoints(udc); | |
1861 | spin_unlock_irqrestore(&udc->lock, flags); | |
1862 | ||
1863 | /* This will also disable the DP pullup */ | |
16a45bc8 SP |
1864 | toggle_bias(0); |
1865 | usba_writel(udc, CTRL, USBA_DISABLE_MASK); | |
914a3f3b | 1866 | |
40517707 DB |
1867 | if (udc->driver->disconnect) |
1868 | udc->driver->disconnect(&udc->gadget); | |
1869 | ||
914a3f3b HS |
1870 | driver->unbind(&udc->gadget); |
1871 | udc->gadget.dev.driver = NULL; | |
1872 | udc->driver = NULL; | |
1873 | ||
1874 | clk_disable(udc->hclk); | |
1875 | clk_disable(udc->pclk); | |
1876 | ||
1877 | DBG(DBG_GADGET, "unregistered driver `%s'\n", driver->driver.name); | |
1878 | ||
1879 | return 0; | |
1880 | } | |
1881 | EXPORT_SYMBOL(usb_gadget_unregister_driver); | |
1882 | ||
1883 | static int __init usba_udc_probe(struct platform_device *pdev) | |
1884 | { | |
1885 | struct usba_platform_data *pdata = pdev->dev.platform_data; | |
1886 | struct resource *regs, *fifo; | |
1887 | struct clk *pclk, *hclk; | |
1888 | struct usba_udc *udc = &the_udc; | |
1889 | int irq, ret, i; | |
1890 | ||
1891 | regs = platform_get_resource(pdev, IORESOURCE_MEM, CTRL_IOMEM_ID); | |
1892 | fifo = platform_get_resource(pdev, IORESOURCE_MEM, FIFO_IOMEM_ID); | |
8d855317 | 1893 | if (!regs || !fifo || !pdata) |
914a3f3b HS |
1894 | return -ENXIO; |
1895 | ||
1896 | irq = platform_get_irq(pdev, 0); | |
1897 | if (irq < 0) | |
1898 | return irq; | |
1899 | ||
1900 | pclk = clk_get(&pdev->dev, "pclk"); | |
1901 | if (IS_ERR(pclk)) | |
1902 | return PTR_ERR(pclk); | |
1903 | hclk = clk_get(&pdev->dev, "hclk"); | |
1904 | if (IS_ERR(hclk)) { | |
1905 | ret = PTR_ERR(hclk); | |
1906 | goto err_get_hclk; | |
1907 | } | |
1908 | ||
40517707 | 1909 | spin_lock_init(&udc->lock); |
914a3f3b HS |
1910 | udc->pdev = pdev; |
1911 | udc->pclk = pclk; | |
1912 | udc->hclk = hclk; | |
1913 | udc->vbus_pin = -1; | |
1914 | ||
1915 | ret = -ENOMEM; | |
1916 | udc->regs = ioremap(regs->start, regs->end - regs->start + 1); | |
1917 | if (!udc->regs) { | |
1918 | dev_err(&pdev->dev, "Unable to map I/O memory, aborting.\n"); | |
1919 | goto err_map_regs; | |
1920 | } | |
1921 | dev_info(&pdev->dev, "MMIO registers at 0x%08lx mapped at %p\n", | |
1922 | (unsigned long)regs->start, udc->regs); | |
1923 | udc->fifo = ioremap(fifo->start, fifo->end - fifo->start + 1); | |
1924 | if (!udc->fifo) { | |
1925 | dev_err(&pdev->dev, "Unable to map FIFO, aborting.\n"); | |
1926 | goto err_map_fifo; | |
1927 | } | |
1928 | dev_info(&pdev->dev, "FIFO at 0x%08lx mapped at %p\n", | |
1929 | (unsigned long)fifo->start, udc->fifo); | |
1930 | ||
1931 | device_initialize(&udc->gadget.dev); | |
1932 | udc->gadget.dev.parent = &pdev->dev; | |
1933 | udc->gadget.dev.dma_mask = pdev->dev.dma_mask; | |
1934 | ||
1935 | platform_set_drvdata(pdev, udc); | |
1936 | ||
1937 | /* Make sure we start from a clean slate */ | |
1938 | clk_enable(pclk); | |
16a45bc8 SP |
1939 | toggle_bias(0); |
1940 | usba_writel(udc, CTRL, USBA_DISABLE_MASK); | |
914a3f3b HS |
1941 | clk_disable(pclk); |
1942 | ||
8d855317 SP |
1943 | usba_ep = kmalloc(sizeof(struct usba_ep) * pdata->num_ep, |
1944 | GFP_KERNEL); | |
1945 | if (!usba_ep) | |
1946 | goto err_alloc_ep; | |
1947 | ||
1948 | the_udc.gadget.ep0 = &usba_ep[0].ep; | |
1949 | ||
914a3f3b HS |
1950 | INIT_LIST_HEAD(&usba_ep[0].ep.ep_list); |
1951 | usba_ep[0].ep_regs = udc->regs + USBA_EPT_BASE(0); | |
1952 | usba_ep[0].dma_regs = udc->regs + USBA_DMA_BASE(0); | |
1953 | usba_ep[0].fifo = udc->fifo + USBA_FIFO_BASE(0); | |
8d855317 SP |
1954 | usba_ep[0].ep.ops = &usba_ep_ops; |
1955 | usba_ep[0].ep.name = pdata->ep[0].name; | |
1956 | usba_ep[0].ep.maxpacket = pdata->ep[0].fifo_size; | |
1957 | usba_ep[0].udc = &the_udc; | |
1958 | INIT_LIST_HEAD(&usba_ep[0].queue); | |
1959 | usba_ep[0].fifo_size = pdata->ep[0].fifo_size; | |
1960 | usba_ep[0].nr_banks = pdata->ep[0].nr_banks; | |
1961 | usba_ep[0].index = pdata->ep[0].index; | |
1962 | usba_ep[0].can_dma = pdata->ep[0].can_dma; | |
1963 | usba_ep[0].can_isoc = pdata->ep[0].can_isoc; | |
1964 | ||
1965 | for (i = 1; i < pdata->num_ep; i++) { | |
914a3f3b HS |
1966 | struct usba_ep *ep = &usba_ep[i]; |
1967 | ||
1968 | ep->ep_regs = udc->regs + USBA_EPT_BASE(i); | |
1969 | ep->dma_regs = udc->regs + USBA_DMA_BASE(i); | |
1970 | ep->fifo = udc->fifo + USBA_FIFO_BASE(i); | |
8d855317 SP |
1971 | ep->ep.ops = &usba_ep_ops; |
1972 | ep->ep.name = pdata->ep[i].name; | |
1973 | ep->ep.maxpacket = pdata->ep[i].fifo_size; | |
1974 | ep->udc = &the_udc; | |
1975 | INIT_LIST_HEAD(&ep->queue); | |
1976 | ep->fifo_size = pdata->ep[i].fifo_size; | |
1977 | ep->nr_banks = pdata->ep[i].nr_banks; | |
1978 | ep->index = pdata->ep[i].index; | |
1979 | ep->can_dma = pdata->ep[i].can_dma; | |
1980 | ep->can_isoc = pdata->ep[i].can_isoc; | |
914a3f3b HS |
1981 | |
1982 | list_add_tail(&ep->ep.ep_list, &udc->gadget.ep_list); | |
1983 | } | |
1984 | ||
1985 | ret = request_irq(irq, usba_udc_irq, 0, "atmel_usba_udc", udc); | |
1986 | if (ret) { | |
1987 | dev_err(&pdev->dev, "Cannot request irq %d (error %d)\n", | |
1988 | irq, ret); | |
1989 | goto err_request_irq; | |
1990 | } | |
1991 | udc->irq = irq; | |
1992 | ||
1993 | ret = device_add(&udc->gadget.dev); | |
1994 | if (ret) { | |
1995 | dev_dbg(&pdev->dev, "Could not add gadget: %d\n", ret); | |
1996 | goto err_device_add; | |
1997 | } | |
1998 | ||
8d855317 | 1999 | if (pdata->vbus_pin >= 0) { |
914a3f3b HS |
2000 | if (!gpio_request(pdata->vbus_pin, "atmel_usba_udc")) { |
2001 | udc->vbus_pin = pdata->vbus_pin; | |
2002 | ||
2003 | ret = request_irq(gpio_to_irq(udc->vbus_pin), | |
2004 | usba_vbus_irq, 0, | |
2005 | "atmel_usba_udc", udc); | |
2006 | if (ret) { | |
2007 | gpio_free(udc->vbus_pin); | |
2008 | udc->vbus_pin = -1; | |
2009 | dev_warn(&udc->pdev->dev, | |
2010 | "failed to request vbus irq; " | |
2011 | "assuming always on\n"); | |
2012 | } else { | |
2013 | disable_irq(gpio_to_irq(udc->vbus_pin)); | |
2014 | } | |
2015 | } | |
2016 | } | |
2017 | ||
2018 | usba_init_debugfs(udc); | |
8d855317 | 2019 | for (i = 1; i < pdata->num_ep; i++) |
914a3f3b HS |
2020 | usba_ep_init_debugfs(udc, &usba_ep[i]); |
2021 | ||
2022 | return 0; | |
2023 | ||
2024 | err_device_add: | |
2025 | free_irq(irq, udc); | |
2026 | err_request_irq: | |
8d855317 SP |
2027 | kfree(usba_ep); |
2028 | err_alloc_ep: | |
914a3f3b HS |
2029 | iounmap(udc->fifo); |
2030 | err_map_fifo: | |
2031 | iounmap(udc->regs); | |
2032 | err_map_regs: | |
2033 | clk_put(hclk); | |
2034 | err_get_hclk: | |
2035 | clk_put(pclk); | |
2036 | ||
2037 | platform_set_drvdata(pdev, NULL); | |
2038 | ||
2039 | return ret; | |
2040 | } | |
2041 | ||
2042 | static int __exit usba_udc_remove(struct platform_device *pdev) | |
2043 | { | |
2044 | struct usba_udc *udc; | |
2045 | int i; | |
8d855317 | 2046 | struct usba_platform_data *pdata = pdev->dev.platform_data; |
914a3f3b HS |
2047 | |
2048 | udc = platform_get_drvdata(pdev); | |
2049 | ||
8d855317 | 2050 | for (i = 1; i < pdata->num_ep; i++) |
914a3f3b HS |
2051 | usba_ep_cleanup_debugfs(&usba_ep[i]); |
2052 | usba_cleanup_debugfs(udc); | |
2053 | ||
2054 | if (udc->vbus_pin != -1) | |
2055 | gpio_free(udc->vbus_pin); | |
2056 | ||
2057 | free_irq(udc->irq, udc); | |
5275653f | 2058 | kfree(usba_ep); |
914a3f3b HS |
2059 | iounmap(udc->fifo); |
2060 | iounmap(udc->regs); | |
2061 | clk_put(udc->hclk); | |
2062 | clk_put(udc->pclk); | |
2063 | ||
2064 | device_unregister(&udc->gadget.dev); | |
2065 | ||
2066 | return 0; | |
2067 | } | |
2068 | ||
2069 | static struct platform_driver udc_driver = { | |
2070 | .remove = __exit_p(usba_udc_remove), | |
2071 | .driver = { | |
2072 | .name = "atmel_usba_udc", | |
f34c32f1 | 2073 | .owner = THIS_MODULE, |
914a3f3b HS |
2074 | }, |
2075 | }; | |
2076 | ||
2077 | static int __init udc_init(void) | |
2078 | { | |
2079 | return platform_driver_probe(&udc_driver, usba_udc_probe); | |
2080 | } | |
2081 | module_init(udc_init); | |
2082 | ||
2083 | static void __exit udc_exit(void) | |
2084 | { | |
2085 | platform_driver_unregister(&udc_driver); | |
2086 | } | |
2087 | module_exit(udc_exit); | |
2088 | ||
2089 | MODULE_DESCRIPTION("Atmel USBA UDC driver"); | |
2090 | MODULE_AUTHOR("Haavard Skinnemoen <hskinnemoen@atmel.com>"); | |
2091 | MODULE_LICENSE("GPL"); | |
f34c32f1 | 2092 | MODULE_ALIAS("platform:atmel_usba_udc"); |