Commit | Line | Data |
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4cf2503c YS |
1 | /* |
2 | * M66592 UDC (USB gadget) | |
3 | * | |
4 | * Copyright (C) 2006-2007 Renesas Solutions Corp. | |
5 | * | |
6 | * Author : Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com> | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or modify | |
9 | * it under the terms of the GNU General Public License as published by | |
10 | * the Free Software Foundation; version 2 of the License. | |
11 | * | |
12 | * This program is distributed in the hope that it will be useful, | |
13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | * GNU General Public License for more details. | |
16 | * | |
17 | * You should have received a copy of the GNU General Public License | |
18 | * along with this program; if not, write to the Free Software | |
19 | * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA | |
20 | * | |
21 | */ | |
22 | ||
23 | #include <linux/module.h> | |
4cf2503c | 24 | #include <linux/interrupt.h> |
598f22e1 YS |
25 | #include <linux/delay.h> |
26 | #include <linux/io.h> | |
4cf2503c | 27 | #include <linux/platform_device.h> |
598f22e1 | 28 | |
4cf2503c YS |
29 | #include <linux/usb/ch9.h> |
30 | #include <linux/usb_gadget.h> | |
31 | ||
4cf2503c YS |
32 | #include "m66592-udc.h" |
33 | ||
598f22e1 YS |
34 | |
35 | MODULE_DESCRIPTION("M66592 USB gadget driver"); | |
4cf2503c YS |
36 | MODULE_LICENSE("GPL"); |
37 | MODULE_AUTHOR("Yoshihiro Shimoda"); | |
38 | ||
15a1d5c9 | 39 | #define DRIVER_VERSION "29 May 2007" |
4cf2503c YS |
40 | |
41 | /* module parameters */ | |
42 | static unsigned short clock = M66592_XTAL24; | |
43 | module_param(clock, ushort, 0644); | |
598f22e1 YS |
44 | MODULE_PARM_DESC(clock, "input clock: 48MHz=32768, 24MHz=16384, 12MHz=0 " |
45 | "(default=16384)"); | |
46 | ||
4cf2503c YS |
47 | static unsigned short vif = M66592_LDRV; |
48 | module_param(vif, ushort, 0644); | |
598f22e1 YS |
49 | MODULE_PARM_DESC(vif, "input VIF: 3.3V=32768, 1.5V=0 (default=32768)"); |
50 | ||
51 | static unsigned short endian; | |
4cf2503c | 52 | module_param(endian, ushort, 0644); |
598f22e1 YS |
53 | MODULE_PARM_DESC(endian, "data endian: big=256, little=0 (default=0)"); |
54 | ||
4cf2503c YS |
55 | static unsigned short irq_sense = M66592_INTL; |
56 | module_param(irq_sense, ushort, 0644); | |
598f22e1 YS |
57 | MODULE_PARM_DESC(irq_sense, "IRQ sense: low level=2, falling edge=0 " |
58 | "(default=2)"); | |
4cf2503c YS |
59 | |
60 | static const char udc_name[] = "m66592_udc"; | |
61 | static const char *m66592_ep_name[] = { | |
62 | "ep0", "ep1", "ep2", "ep3", "ep4", "ep5", "ep6", "ep7" | |
63 | }; | |
64 | ||
65 | static void disable_controller(struct m66592 *m66592); | |
66 | static void irq_ep0_write(struct m66592_ep *ep, struct m66592_request *req); | |
67 | static void irq_packet_write(struct m66592_ep *ep, struct m66592_request *req); | |
68 | static int m66592_queue(struct usb_ep *_ep, struct usb_request *_req, | |
69 | gfp_t gfp_flags); | |
70 | ||
71 | static void transfer_complete(struct m66592_ep *ep, | |
598f22e1 YS |
72 | struct m66592_request *req, int status); |
73 | ||
4cf2503c YS |
74 | /*-------------------------------------------------------------------------*/ |
75 | static inline u16 get_usb_speed(struct m66592 *m66592) | |
76 | { | |
77 | return (m66592_read(m66592, M66592_DVSTCTR) & M66592_RHST); | |
78 | } | |
79 | ||
80 | static void enable_pipe_irq(struct m66592 *m66592, u16 pipenum, | |
598f22e1 | 81 | unsigned long reg) |
4cf2503c YS |
82 | { |
83 | u16 tmp; | |
84 | ||
85 | tmp = m66592_read(m66592, M66592_INTENB0); | |
86 | m66592_bclr(m66592, M66592_BEMPE | M66592_NRDYE | M66592_BRDYE, | |
598f22e1 | 87 | M66592_INTENB0); |
4cf2503c YS |
88 | m66592_bset(m66592, (1 << pipenum), reg); |
89 | m66592_write(m66592, tmp, M66592_INTENB0); | |
90 | } | |
91 | ||
92 | static void disable_pipe_irq(struct m66592 *m66592, u16 pipenum, | |
598f22e1 | 93 | unsigned long reg) |
4cf2503c YS |
94 | { |
95 | u16 tmp; | |
96 | ||
97 | tmp = m66592_read(m66592, M66592_INTENB0); | |
98 | m66592_bclr(m66592, M66592_BEMPE | M66592_NRDYE | M66592_BRDYE, | |
598f22e1 | 99 | M66592_INTENB0); |
4cf2503c YS |
100 | m66592_bclr(m66592, (1 << pipenum), reg); |
101 | m66592_write(m66592, tmp, M66592_INTENB0); | |
102 | } | |
103 | ||
104 | static void m66592_usb_connect(struct m66592 *m66592) | |
105 | { | |
106 | m66592_bset(m66592, M66592_CTRE, M66592_INTENB0); | |
107 | m66592_bset(m66592, M66592_WDST | M66592_RDST | M66592_CMPL, | |
598f22e1 | 108 | M66592_INTENB0); |
4cf2503c YS |
109 | m66592_bset(m66592, M66592_BEMPE | M66592_BRDYE, M66592_INTENB0); |
110 | ||
111 | m66592_bset(m66592, M66592_DPRPU, M66592_SYSCFG); | |
112 | } | |
113 | ||
114 | static void m66592_usb_disconnect(struct m66592 *m66592) | |
598f22e1 YS |
115 | __releases(m66592->lock) |
116 | __acquires(m66592->lock) | |
4cf2503c YS |
117 | { |
118 | m66592_bclr(m66592, M66592_CTRE, M66592_INTENB0); | |
119 | m66592_bclr(m66592, M66592_WDST | M66592_RDST | M66592_CMPL, | |
598f22e1 | 120 | M66592_INTENB0); |
4cf2503c YS |
121 | m66592_bclr(m66592, M66592_BEMPE | M66592_BRDYE, M66592_INTENB0); |
122 | m66592_bclr(m66592, M66592_DPRPU, M66592_SYSCFG); | |
123 | ||
124 | m66592->gadget.speed = USB_SPEED_UNKNOWN; | |
125 | spin_unlock(&m66592->lock); | |
126 | m66592->driver->disconnect(&m66592->gadget); | |
127 | spin_lock(&m66592->lock); | |
128 | ||
129 | disable_controller(m66592); | |
130 | INIT_LIST_HEAD(&m66592->ep[0].queue); | |
131 | } | |
132 | ||
133 | static inline u16 control_reg_get_pid(struct m66592 *m66592, u16 pipenum) | |
134 | { | |
135 | u16 pid = 0; | |
136 | unsigned long offset; | |
137 | ||
138 | if (pipenum == 0) | |
139 | pid = m66592_read(m66592, M66592_DCPCTR) & M66592_PID; | |
140 | else if (pipenum < M66592_MAX_NUM_PIPE) { | |
141 | offset = get_pipectr_addr(pipenum); | |
142 | pid = m66592_read(m66592, offset) & M66592_PID; | |
143 | } else | |
144 | printk(KERN_ERR "unexpect pipe num (%d)\n", pipenum); | |
145 | ||
146 | return pid; | |
147 | } | |
148 | ||
149 | static inline void control_reg_set_pid(struct m66592 *m66592, u16 pipenum, | |
598f22e1 | 150 | u16 pid) |
4cf2503c YS |
151 | { |
152 | unsigned long offset; | |
153 | ||
154 | if (pipenum == 0) | |
155 | m66592_mdfy(m66592, pid, M66592_PID, M66592_DCPCTR); | |
156 | else if (pipenum < M66592_MAX_NUM_PIPE) { | |
157 | offset = get_pipectr_addr(pipenum); | |
158 | m66592_mdfy(m66592, pid, M66592_PID, offset); | |
159 | } else | |
160 | printk(KERN_ERR "unexpect pipe num (%d)\n", pipenum); | |
161 | } | |
162 | ||
163 | static inline void pipe_start(struct m66592 *m66592, u16 pipenum) | |
164 | { | |
165 | control_reg_set_pid(m66592, pipenum, M66592_PID_BUF); | |
166 | } | |
167 | ||
168 | static inline void pipe_stop(struct m66592 *m66592, u16 pipenum) | |
169 | { | |
170 | control_reg_set_pid(m66592, pipenum, M66592_PID_NAK); | |
171 | } | |
172 | ||
173 | static inline void pipe_stall(struct m66592 *m66592, u16 pipenum) | |
174 | { | |
175 | control_reg_set_pid(m66592, pipenum, M66592_PID_STALL); | |
176 | } | |
177 | ||
178 | static inline u16 control_reg_get(struct m66592 *m66592, u16 pipenum) | |
179 | { | |
180 | u16 ret = 0; | |
181 | unsigned long offset; | |
182 | ||
183 | if (pipenum == 0) | |
184 | ret = m66592_read(m66592, M66592_DCPCTR); | |
185 | else if (pipenum < M66592_MAX_NUM_PIPE) { | |
186 | offset = get_pipectr_addr(pipenum); | |
187 | ret = m66592_read(m66592, offset); | |
188 | } else | |
189 | printk(KERN_ERR "unexpect pipe num (%d)\n", pipenum); | |
190 | ||
191 | return ret; | |
192 | } | |
193 | ||
194 | static inline void control_reg_sqclr(struct m66592 *m66592, u16 pipenum) | |
195 | { | |
196 | unsigned long offset; | |
197 | ||
198 | pipe_stop(m66592, pipenum); | |
199 | ||
200 | if (pipenum == 0) | |
201 | m66592_bset(m66592, M66592_SQCLR, M66592_DCPCTR); | |
202 | else if (pipenum < M66592_MAX_NUM_PIPE) { | |
203 | offset = get_pipectr_addr(pipenum); | |
204 | m66592_bset(m66592, M66592_SQCLR, offset); | |
205 | } else | |
206 | printk(KERN_ERR "unexpect pipe num(%d)\n", pipenum); | |
207 | } | |
208 | ||
209 | static inline int get_buffer_size(struct m66592 *m66592, u16 pipenum) | |
210 | { | |
211 | u16 tmp; | |
212 | int size; | |
213 | ||
214 | if (pipenum == 0) { | |
215 | tmp = m66592_read(m66592, M66592_DCPCFG); | |
216 | if ((tmp & M66592_CNTMD) != 0) | |
217 | size = 256; | |
218 | else { | |
219 | tmp = m66592_read(m66592, M66592_DCPMAXP); | |
220 | size = tmp & M66592_MAXP; | |
221 | } | |
222 | } else { | |
223 | m66592_write(m66592, pipenum, M66592_PIPESEL); | |
224 | tmp = m66592_read(m66592, M66592_PIPECFG); | |
225 | if ((tmp & M66592_CNTMD) != 0) { | |
226 | tmp = m66592_read(m66592, M66592_PIPEBUF); | |
227 | size = ((tmp >> 10) + 1) * 64; | |
228 | } else { | |
229 | tmp = m66592_read(m66592, M66592_PIPEMAXP); | |
230 | size = tmp & M66592_MXPS; | |
231 | } | |
232 | } | |
233 | ||
234 | return size; | |
235 | } | |
236 | ||
237 | static inline void pipe_change(struct m66592 *m66592, u16 pipenum) | |
238 | { | |
239 | struct m66592_ep *ep = m66592->pipenum2ep[pipenum]; | |
240 | ||
241 | if (ep->use_dma) | |
242 | return; | |
243 | ||
244 | m66592_mdfy(m66592, pipenum, M66592_CURPIPE, ep->fifosel); | |
245 | ||
246 | ndelay(450); | |
247 | ||
248 | m66592_bset(m66592, M66592_MBW, ep->fifosel); | |
249 | } | |
250 | ||
251 | static int pipe_buffer_setting(struct m66592 *m66592, | |
598f22e1 | 252 | struct m66592_pipe_info *info) |
4cf2503c YS |
253 | { |
254 | u16 bufnum = 0, buf_bsize = 0; | |
255 | u16 pipecfg = 0; | |
256 | ||
257 | if (info->pipe == 0) | |
258 | return -EINVAL; | |
259 | ||
260 | m66592_write(m66592, info->pipe, M66592_PIPESEL); | |
261 | ||
262 | if (info->dir_in) | |
263 | pipecfg |= M66592_DIR; | |
264 | pipecfg |= info->type; | |
265 | pipecfg |= info->epnum; | |
266 | switch (info->type) { | |
267 | case M66592_INT: | |
268 | bufnum = 4 + (info->pipe - M66592_BASE_PIPENUM_INT); | |
269 | buf_bsize = 0; | |
270 | break; | |
271 | case M66592_BULK: | |
272 | bufnum = m66592->bi_bufnum + | |
273 | (info->pipe - M66592_BASE_PIPENUM_BULK) * 16; | |
274 | m66592->bi_bufnum += 16; | |
275 | buf_bsize = 7; | |
276 | pipecfg |= M66592_DBLB; | |
277 | if (!info->dir_in) | |
278 | pipecfg |= M66592_SHTNAK; | |
279 | break; | |
280 | case M66592_ISO: | |
281 | bufnum = m66592->bi_bufnum + | |
282 | (info->pipe - M66592_BASE_PIPENUM_ISOC) * 16; | |
283 | m66592->bi_bufnum += 16; | |
284 | buf_bsize = 7; | |
285 | break; | |
286 | } | |
287 | if (m66592->bi_bufnum > M66592_MAX_BUFNUM) { | |
288 | printk(KERN_ERR "m66592 pipe memory is insufficient(%d)\n", | |
598f22e1 | 289 | m66592->bi_bufnum); |
4cf2503c YS |
290 | return -ENOMEM; |
291 | } | |
292 | ||
293 | m66592_write(m66592, pipecfg, M66592_PIPECFG); | |
294 | m66592_write(m66592, (buf_bsize << 10) | (bufnum), M66592_PIPEBUF); | |
295 | m66592_write(m66592, info->maxpacket, M66592_PIPEMAXP); | |
296 | if (info->interval) | |
297 | info->interval--; | |
298 | m66592_write(m66592, info->interval, M66592_PIPEPERI); | |
299 | ||
300 | return 0; | |
301 | } | |
302 | ||
303 | static void pipe_buffer_release(struct m66592 *m66592, | |
304 | struct m66592_pipe_info *info) | |
305 | { | |
306 | if (info->pipe == 0) | |
307 | return; | |
308 | ||
309 | switch (info->type) { | |
310 | case M66592_BULK: | |
311 | if (is_bulk_pipe(info->pipe)) | |
312 | m66592->bi_bufnum -= 16; | |
313 | break; | |
314 | case M66592_ISO: | |
315 | if (is_isoc_pipe(info->pipe)) | |
316 | m66592->bi_bufnum -= 16; | |
317 | break; | |
318 | } | |
319 | ||
320 | if (is_bulk_pipe(info->pipe)) { | |
321 | m66592->bulk--; | |
322 | } else if (is_interrupt_pipe(info->pipe)) | |
323 | m66592->interrupt--; | |
324 | else if (is_isoc_pipe(info->pipe)) { | |
325 | m66592->isochronous--; | |
326 | if (info->type == M66592_BULK) | |
327 | m66592->bulk--; | |
328 | } else | |
329 | printk(KERN_ERR "ep_release: unexpect pipenum (%d)\n", | |
598f22e1 | 330 | info->pipe); |
4cf2503c YS |
331 | } |
332 | ||
333 | static void pipe_initialize(struct m66592_ep *ep) | |
334 | { | |
335 | struct m66592 *m66592 = ep->m66592; | |
336 | ||
337 | m66592_mdfy(m66592, 0, M66592_CURPIPE, ep->fifosel); | |
338 | ||
339 | m66592_write(m66592, M66592_ACLRM, ep->pipectr); | |
340 | m66592_write(m66592, 0, ep->pipectr); | |
341 | m66592_write(m66592, M66592_SQCLR, ep->pipectr); | |
342 | if (ep->use_dma) { | |
343 | m66592_mdfy(m66592, ep->pipenum, M66592_CURPIPE, ep->fifosel); | |
344 | ||
345 | ndelay(450); | |
346 | ||
347 | m66592_bset(m66592, M66592_MBW, ep->fifosel); | |
348 | } | |
349 | } | |
350 | ||
351 | static void m66592_ep_setting(struct m66592 *m66592, struct m66592_ep *ep, | |
598f22e1 YS |
352 | const struct usb_endpoint_descriptor *desc, |
353 | u16 pipenum, int dma) | |
4cf2503c YS |
354 | { |
355 | if ((pipenum != 0) && dma) { | |
356 | if (m66592->num_dma == 0) { | |
357 | m66592->num_dma++; | |
358 | ep->use_dma = 1; | |
359 | ep->fifoaddr = M66592_D0FIFO; | |
360 | ep->fifosel = M66592_D0FIFOSEL; | |
361 | ep->fifoctr = M66592_D0FIFOCTR; | |
362 | ep->fifotrn = M66592_D0FIFOTRN; | |
363 | } else if (m66592->num_dma == 1) { | |
364 | m66592->num_dma++; | |
365 | ep->use_dma = 1; | |
366 | ep->fifoaddr = M66592_D1FIFO; | |
367 | ep->fifosel = M66592_D1FIFOSEL; | |
368 | ep->fifoctr = M66592_D1FIFOCTR; | |
369 | ep->fifotrn = M66592_D1FIFOTRN; | |
370 | } else { | |
371 | ep->use_dma = 0; | |
372 | ep->fifoaddr = M66592_CFIFO; | |
373 | ep->fifosel = M66592_CFIFOSEL; | |
374 | ep->fifoctr = M66592_CFIFOCTR; | |
375 | ep->fifotrn = 0; | |
376 | } | |
377 | } else { | |
378 | ep->use_dma = 0; | |
379 | ep->fifoaddr = M66592_CFIFO; | |
380 | ep->fifosel = M66592_CFIFOSEL; | |
381 | ep->fifoctr = M66592_CFIFOCTR; | |
382 | ep->fifotrn = 0; | |
383 | } | |
384 | ||
385 | ep->pipectr = get_pipectr_addr(pipenum); | |
386 | ep->pipenum = pipenum; | |
598f22e1 | 387 | ep->ep.maxpacket = le16_to_cpu(desc->wMaxPacketSize); |
4cf2503c YS |
388 | m66592->pipenum2ep[pipenum] = ep; |
389 | m66592->epaddr2ep[desc->bEndpointAddress&USB_ENDPOINT_NUMBER_MASK] = ep; | |
390 | INIT_LIST_HEAD(&ep->queue); | |
391 | } | |
392 | ||
393 | static void m66592_ep_release(struct m66592_ep *ep) | |
394 | { | |
395 | struct m66592 *m66592 = ep->m66592; | |
396 | u16 pipenum = ep->pipenum; | |
397 | ||
398 | if (pipenum == 0) | |
399 | return; | |
400 | ||
401 | if (ep->use_dma) | |
402 | m66592->num_dma--; | |
403 | ep->pipenum = 0; | |
404 | ep->busy = 0; | |
405 | ep->use_dma = 0; | |
406 | } | |
407 | ||
408 | static int alloc_pipe_config(struct m66592_ep *ep, | |
598f22e1 | 409 | const struct usb_endpoint_descriptor *desc) |
4cf2503c YS |
410 | { |
411 | struct m66592 *m66592 = ep->m66592; | |
412 | struct m66592_pipe_info info; | |
413 | int dma = 0; | |
414 | int *counter; | |
415 | int ret; | |
416 | ||
417 | ep->desc = desc; | |
418 | ||
419 | BUG_ON(ep->pipenum); | |
420 | ||
598f22e1 | 421 | switch (desc->bmAttributes & USB_ENDPOINT_XFERTYPE_MASK) { |
4cf2503c YS |
422 | case USB_ENDPOINT_XFER_BULK: |
423 | if (m66592->bulk >= M66592_MAX_NUM_BULK) { | |
424 | if (m66592->isochronous >= M66592_MAX_NUM_ISOC) { | |
425 | printk(KERN_ERR "bulk pipe is insufficient\n"); | |
426 | return -ENODEV; | |
427 | } else { | |
598f22e1 YS |
428 | info.pipe = M66592_BASE_PIPENUM_ISOC |
429 | + m66592->isochronous; | |
4cf2503c YS |
430 | counter = &m66592->isochronous; |
431 | } | |
432 | } else { | |
433 | info.pipe = M66592_BASE_PIPENUM_BULK + m66592->bulk; | |
434 | counter = &m66592->bulk; | |
435 | } | |
436 | info.type = M66592_BULK; | |
437 | dma = 1; | |
438 | break; | |
439 | case USB_ENDPOINT_XFER_INT: | |
440 | if (m66592->interrupt >= M66592_MAX_NUM_INT) { | |
441 | printk(KERN_ERR "interrupt pipe is insufficient\n"); | |
442 | return -ENODEV; | |
443 | } | |
444 | info.pipe = M66592_BASE_PIPENUM_INT + m66592->interrupt; | |
445 | info.type = M66592_INT; | |
446 | counter = &m66592->interrupt; | |
447 | break; | |
448 | case USB_ENDPOINT_XFER_ISOC: | |
449 | if (m66592->isochronous >= M66592_MAX_NUM_ISOC) { | |
450 | printk(KERN_ERR "isochronous pipe is insufficient\n"); | |
451 | return -ENODEV; | |
452 | } | |
453 | info.pipe = M66592_BASE_PIPENUM_ISOC + m66592->isochronous; | |
454 | info.type = M66592_ISO; | |
455 | counter = &m66592->isochronous; | |
456 | break; | |
457 | default: | |
458 | printk(KERN_ERR "unexpect xfer type\n"); | |
459 | return -EINVAL; | |
460 | } | |
461 | ep->type = info.type; | |
462 | ||
463 | info.epnum = desc->bEndpointAddress & USB_ENDPOINT_NUMBER_MASK; | |
598f22e1 | 464 | info.maxpacket = le16_to_cpu(desc->wMaxPacketSize); |
4cf2503c YS |
465 | info.interval = desc->bInterval; |
466 | if (desc->bEndpointAddress & USB_ENDPOINT_DIR_MASK) | |
467 | info.dir_in = 1; | |
468 | else | |
469 | info.dir_in = 0; | |
470 | ||
471 | ret = pipe_buffer_setting(m66592, &info); | |
472 | if (ret < 0) { | |
473 | printk(KERN_ERR "pipe_buffer_setting fail\n"); | |
474 | return ret; | |
475 | } | |
476 | ||
477 | (*counter)++; | |
478 | if ((counter == &m66592->isochronous) && info.type == M66592_BULK) | |
479 | m66592->bulk++; | |
480 | ||
481 | m66592_ep_setting(m66592, ep, desc, info.pipe, dma); | |
482 | pipe_initialize(ep); | |
483 | ||
484 | return 0; | |
485 | } | |
486 | ||
487 | static int free_pipe_config(struct m66592_ep *ep) | |
488 | { | |
489 | struct m66592 *m66592 = ep->m66592; | |
490 | struct m66592_pipe_info info; | |
491 | ||
492 | info.pipe = ep->pipenum; | |
493 | info.type = ep->type; | |
494 | pipe_buffer_release(m66592, &info); | |
495 | m66592_ep_release(ep); | |
496 | ||
497 | return 0; | |
498 | } | |
499 | ||
500 | /*-------------------------------------------------------------------------*/ | |
501 | static void pipe_irq_enable(struct m66592 *m66592, u16 pipenum) | |
502 | { | |
503 | enable_irq_ready(m66592, pipenum); | |
504 | enable_irq_nrdy(m66592, pipenum); | |
505 | } | |
506 | ||
507 | static void pipe_irq_disable(struct m66592 *m66592, u16 pipenum) | |
508 | { | |
509 | disable_irq_ready(m66592, pipenum); | |
510 | disable_irq_nrdy(m66592, pipenum); | |
511 | } | |
512 | ||
513 | /* if complete is true, gadget driver complete function is not call */ | |
514 | static void control_end(struct m66592 *m66592, unsigned ccpl) | |
515 | { | |
516 | m66592->ep[0].internal_ccpl = ccpl; | |
517 | pipe_start(m66592, 0); | |
518 | m66592_bset(m66592, M66592_CCPL, M66592_DCPCTR); | |
519 | } | |
520 | ||
521 | static void start_ep0_write(struct m66592_ep *ep, struct m66592_request *req) | |
522 | { | |
523 | struct m66592 *m66592 = ep->m66592; | |
524 | ||
525 | pipe_change(m66592, ep->pipenum); | |
526 | m66592_mdfy(m66592, M66592_ISEL | M66592_PIPE0, | |
598f22e1 YS |
527 | (M66592_ISEL | M66592_CURPIPE), |
528 | M66592_CFIFOSEL); | |
4cf2503c YS |
529 | m66592_write(m66592, M66592_BCLR, ep->fifoctr); |
530 | if (req->req.length == 0) { | |
531 | m66592_bset(m66592, M66592_BVAL, ep->fifoctr); | |
532 | pipe_start(m66592, 0); | |
533 | transfer_complete(ep, req, 0); | |
534 | } else { | |
535 | m66592_write(m66592, ~M66592_BEMP0, M66592_BEMPSTS); | |
536 | irq_ep0_write(ep, req); | |
537 | } | |
538 | } | |
539 | ||
540 | static void start_packet_write(struct m66592_ep *ep, struct m66592_request *req) | |
541 | { | |
542 | struct m66592 *m66592 = ep->m66592; | |
543 | u16 tmp; | |
544 | ||
545 | pipe_change(m66592, ep->pipenum); | |
546 | disable_irq_empty(m66592, ep->pipenum); | |
547 | pipe_start(m66592, ep->pipenum); | |
548 | ||
549 | tmp = m66592_read(m66592, ep->fifoctr); | |
550 | if (unlikely((tmp & M66592_FRDY) == 0)) | |
551 | pipe_irq_enable(m66592, ep->pipenum); | |
552 | else | |
553 | irq_packet_write(ep, req); | |
554 | } | |
555 | ||
556 | static void start_packet_read(struct m66592_ep *ep, struct m66592_request *req) | |
557 | { | |
558 | struct m66592 *m66592 = ep->m66592; | |
559 | u16 pipenum = ep->pipenum; | |
560 | ||
561 | if (ep->pipenum == 0) { | |
562 | m66592_mdfy(m66592, M66592_PIPE0, | |
598f22e1 YS |
563 | (M66592_ISEL | M66592_CURPIPE), |
564 | M66592_CFIFOSEL); | |
4cf2503c YS |
565 | m66592_write(m66592, M66592_BCLR, ep->fifoctr); |
566 | pipe_start(m66592, pipenum); | |
567 | pipe_irq_enable(m66592, pipenum); | |
568 | } else { | |
569 | if (ep->use_dma) { | |
570 | m66592_bset(m66592, M66592_TRCLR, ep->fifosel); | |
571 | pipe_change(m66592, pipenum); | |
572 | m66592_bset(m66592, M66592_TRENB, ep->fifosel); | |
573 | m66592_write(m66592, | |
598f22e1 YS |
574 | (req->req.length + ep->ep.maxpacket - 1) |
575 | / ep->ep.maxpacket, | |
576 | ep->fifotrn); | |
4cf2503c YS |
577 | } |
578 | pipe_start(m66592, pipenum); /* trigger once */ | |
579 | pipe_irq_enable(m66592, pipenum); | |
580 | } | |
581 | } | |
582 | ||
583 | static void start_packet(struct m66592_ep *ep, struct m66592_request *req) | |
584 | { | |
585 | if (ep->desc->bEndpointAddress & USB_DIR_IN) | |
586 | start_packet_write(ep, req); | |
587 | else | |
588 | start_packet_read(ep, req); | |
589 | } | |
590 | ||
591 | static void start_ep0(struct m66592_ep *ep, struct m66592_request *req) | |
592 | { | |
593 | u16 ctsq; | |
594 | ||
595 | ctsq = m66592_read(ep->m66592, M66592_INTSTS0) & M66592_CTSQ; | |
596 | ||
597 | switch (ctsq) { | |
598 | case M66592_CS_RDDS: | |
599 | start_ep0_write(ep, req); | |
600 | break; | |
601 | case M66592_CS_WRDS: | |
602 | start_packet_read(ep, req); | |
603 | break; | |
604 | ||
605 | case M66592_CS_WRND: | |
606 | control_end(ep->m66592, 0); | |
607 | break; | |
608 | default: | |
609 | printk(KERN_ERR "start_ep0: unexpect ctsq(%x)\n", ctsq); | |
610 | break; | |
611 | } | |
612 | } | |
613 | ||
614 | static void init_controller(struct m66592 *m66592) | |
615 | { | |
616 | m66592_bset(m66592, (vif & M66592_LDRV) | (endian & M66592_BIGEND), | |
598f22e1 | 617 | M66592_PINCFG); |
4cf2503c YS |
618 | m66592_bset(m66592, M66592_HSE, M66592_SYSCFG); /* High spd */ |
619 | m66592_mdfy(m66592, clock & M66592_XTAL, M66592_XTAL, M66592_SYSCFG); | |
620 | ||
621 | m66592_bclr(m66592, M66592_USBE, M66592_SYSCFG); | |
622 | m66592_bclr(m66592, M66592_DPRPU, M66592_SYSCFG); | |
623 | m66592_bset(m66592, M66592_USBE, M66592_SYSCFG); | |
624 | ||
625 | m66592_bset(m66592, M66592_XCKE, M66592_SYSCFG); | |
626 | ||
627 | msleep(3); | |
628 | ||
629 | m66592_bset(m66592, M66592_RCKE | M66592_PLLC, M66592_SYSCFG); | |
630 | ||
631 | msleep(1); | |
632 | ||
633 | m66592_bset(m66592, M66592_SCKE, M66592_SYSCFG); | |
634 | ||
635 | m66592_bset(m66592, irq_sense & M66592_INTL, M66592_INTENB1); | |
636 | m66592_write(m66592, M66592_BURST | M66592_CPU_ADR_RD_WR, | |
598f22e1 | 637 | M66592_DMA0CFG); |
4cf2503c YS |
638 | } |
639 | ||
640 | static void disable_controller(struct m66592 *m66592) | |
641 | { | |
642 | m66592_bclr(m66592, M66592_SCKE, M66592_SYSCFG); | |
643 | udelay(1); | |
644 | m66592_bclr(m66592, M66592_PLLC, M66592_SYSCFG); | |
645 | udelay(1); | |
646 | m66592_bclr(m66592, M66592_RCKE, M66592_SYSCFG); | |
647 | udelay(1); | |
648 | m66592_bclr(m66592, M66592_XCKE, M66592_SYSCFG); | |
649 | } | |
650 | ||
651 | static void m66592_start_xclock(struct m66592 *m66592) | |
652 | { | |
653 | u16 tmp; | |
654 | ||
655 | tmp = m66592_read(m66592, M66592_SYSCFG); | |
656 | if (!(tmp & M66592_XCKE)) | |
657 | m66592_bset(m66592, M66592_XCKE, M66592_SYSCFG); | |
658 | } | |
659 | ||
660 | /*-------------------------------------------------------------------------*/ | |
661 | static void transfer_complete(struct m66592_ep *ep, | |
598f22e1 YS |
662 | struct m66592_request *req, int status) |
663 | __releases(m66592->lock) | |
664 | __acquires(m66592->lock) | |
4cf2503c YS |
665 | { |
666 | int restart = 0; | |
667 | ||
668 | if (unlikely(ep->pipenum == 0)) { | |
669 | if (ep->internal_ccpl) { | |
670 | ep->internal_ccpl = 0; | |
671 | return; | |
672 | } | |
673 | } | |
674 | ||
675 | list_del_init(&req->queue); | |
676 | if (ep->m66592->gadget.speed == USB_SPEED_UNKNOWN) | |
677 | req->req.status = -ESHUTDOWN; | |
678 | else | |
679 | req->req.status = status; | |
680 | ||
681 | if (!list_empty(&ep->queue)) | |
682 | restart = 1; | |
683 | ||
598f22e1 YS |
684 | spin_unlock(&ep->m66592->lock); |
685 | req->req.complete(&ep->ep, &req->req); | |
686 | spin_lock(&ep->m66592->lock); | |
4cf2503c YS |
687 | |
688 | if (restart) { | |
689 | req = list_entry(ep->queue.next, struct m66592_request, queue); | |
690 | if (ep->desc) | |
691 | start_packet(ep, req); | |
692 | } | |
693 | } | |
694 | ||
695 | static void irq_ep0_write(struct m66592_ep *ep, struct m66592_request *req) | |
696 | { | |
697 | int i; | |
598f22e1 | 698 | u16 tmp; |
4cf2503c YS |
699 | unsigned bufsize; |
700 | size_t size; | |
701 | void *buf; | |
702 | u16 pipenum = ep->pipenum; | |
703 | struct m66592 *m66592 = ep->m66592; | |
704 | ||
705 | pipe_change(m66592, pipenum); | |
706 | m66592_bset(m66592, M66592_ISEL, ep->fifosel); | |
707 | ||
708 | i = 0; | |
709 | do { | |
710 | tmp = m66592_read(m66592, ep->fifoctr); | |
711 | if (i++ > 100000) { | |
712 | printk(KERN_ERR "pipe0 is busy. maybe cpu i/o bus" | |
713 | "conflict. please power off this controller."); | |
714 | return; | |
715 | } | |
716 | ndelay(1); | |
717 | } while ((tmp & M66592_FRDY) == 0); | |
718 | ||
719 | /* prepare parameters */ | |
720 | bufsize = get_buffer_size(m66592, pipenum); | |
721 | buf = req->req.buf + req->req.actual; | |
722 | size = min(bufsize, req->req.length - req->req.actual); | |
723 | ||
724 | /* write fifo */ | |
725 | if (req->req.buf) { | |
726 | if (size > 0) | |
727 | m66592_write_fifo(m66592, ep->fifoaddr, buf, size); | |
728 | if ((size == 0) || ((size % ep->ep.maxpacket) != 0)) | |
729 | m66592_bset(m66592, M66592_BVAL, ep->fifoctr); | |
730 | } | |
731 | ||
732 | /* update parameters */ | |
733 | req->req.actual += size; | |
734 | ||
735 | /* check transfer finish */ | |
598f22e1 YS |
736 | if ((!req->req.zero && (req->req.actual == req->req.length)) |
737 | || (size % ep->ep.maxpacket) | |
738 | || (size == 0)) { | |
4cf2503c YS |
739 | disable_irq_ready(m66592, pipenum); |
740 | disable_irq_empty(m66592, pipenum); | |
741 | } else { | |
742 | disable_irq_ready(m66592, pipenum); | |
743 | enable_irq_empty(m66592, pipenum); | |
744 | } | |
745 | pipe_start(m66592, pipenum); | |
746 | } | |
747 | ||
748 | static void irq_packet_write(struct m66592_ep *ep, struct m66592_request *req) | |
749 | { | |
750 | u16 tmp; | |
751 | unsigned bufsize; | |
752 | size_t size; | |
753 | void *buf; | |
754 | u16 pipenum = ep->pipenum; | |
755 | struct m66592 *m66592 = ep->m66592; | |
756 | ||
757 | pipe_change(m66592, pipenum); | |
758 | tmp = m66592_read(m66592, ep->fifoctr); | |
759 | if (unlikely((tmp & M66592_FRDY) == 0)) { | |
760 | pipe_stop(m66592, pipenum); | |
761 | pipe_irq_disable(m66592, pipenum); | |
762 | printk(KERN_ERR "write fifo not ready. pipnum=%d\n", pipenum); | |
763 | return; | |
764 | } | |
765 | ||
766 | /* prepare parameters */ | |
767 | bufsize = get_buffer_size(m66592, pipenum); | |
768 | buf = req->req.buf + req->req.actual; | |
769 | size = min(bufsize, req->req.length - req->req.actual); | |
770 | ||
771 | /* write fifo */ | |
772 | if (req->req.buf) { | |
773 | m66592_write_fifo(m66592, ep->fifoaddr, buf, size); | |
598f22e1 YS |
774 | if ((size == 0) |
775 | || ((size % ep->ep.maxpacket) != 0) | |
776 | || ((bufsize != ep->ep.maxpacket) | |
777 | && (bufsize > size))) | |
4cf2503c YS |
778 | m66592_bset(m66592, M66592_BVAL, ep->fifoctr); |
779 | } | |
780 | ||
781 | /* update parameters */ | |
782 | req->req.actual += size; | |
783 | /* check transfer finish */ | |
598f22e1 YS |
784 | if ((!req->req.zero && (req->req.actual == req->req.length)) |
785 | || (size % ep->ep.maxpacket) | |
786 | || (size == 0)) { | |
4cf2503c YS |
787 | disable_irq_ready(m66592, pipenum); |
788 | enable_irq_empty(m66592, pipenum); | |
789 | } else { | |
790 | disable_irq_empty(m66592, pipenum); | |
791 | pipe_irq_enable(m66592, pipenum); | |
792 | } | |
793 | } | |
794 | ||
795 | static void irq_packet_read(struct m66592_ep *ep, struct m66592_request *req) | |
796 | { | |
797 | u16 tmp; | |
798 | int rcv_len, bufsize, req_len; | |
799 | int size; | |
800 | void *buf; | |
801 | u16 pipenum = ep->pipenum; | |
802 | struct m66592 *m66592 = ep->m66592; | |
803 | int finish = 0; | |
804 | ||
805 | pipe_change(m66592, pipenum); | |
806 | tmp = m66592_read(m66592, ep->fifoctr); | |
807 | if (unlikely((tmp & M66592_FRDY) == 0)) { | |
808 | req->req.status = -EPIPE; | |
809 | pipe_stop(m66592, pipenum); | |
810 | pipe_irq_disable(m66592, pipenum); | |
811 | printk(KERN_ERR "read fifo not ready"); | |
812 | return; | |
813 | } | |
814 | ||
815 | /* prepare parameters */ | |
816 | rcv_len = tmp & M66592_DTLN; | |
817 | bufsize = get_buffer_size(m66592, pipenum); | |
818 | ||
819 | buf = req->req.buf + req->req.actual; | |
820 | req_len = req->req.length - req->req.actual; | |
821 | if (rcv_len < bufsize) | |
822 | size = min(rcv_len, req_len); | |
823 | else | |
824 | size = min(bufsize, req_len); | |
825 | ||
826 | /* update parameters */ | |
827 | req->req.actual += size; | |
828 | ||
829 | /* check transfer finish */ | |
598f22e1 YS |
830 | if ((!req->req.zero && (req->req.actual == req->req.length)) |
831 | || (size % ep->ep.maxpacket) | |
832 | || (size == 0)) { | |
4cf2503c YS |
833 | pipe_stop(m66592, pipenum); |
834 | pipe_irq_disable(m66592, pipenum); | |
835 | finish = 1; | |
836 | } | |
837 | ||
838 | /* read fifo */ | |
839 | if (req->req.buf) { | |
840 | if (size == 0) | |
841 | m66592_write(m66592, M66592_BCLR, ep->fifoctr); | |
842 | else | |
843 | m66592_read_fifo(m66592, ep->fifoaddr, buf, size); | |
844 | } | |
845 | ||
846 | if ((ep->pipenum != 0) && finish) | |
847 | transfer_complete(ep, req, 0); | |
848 | } | |
849 | ||
850 | static void irq_pipe_ready(struct m66592 *m66592, u16 status, u16 enb) | |
851 | { | |
852 | u16 check; | |
853 | u16 pipenum; | |
854 | struct m66592_ep *ep; | |
855 | struct m66592_request *req; | |
856 | ||
857 | if ((status & M66592_BRDY0) && (enb & M66592_BRDY0)) { | |
858 | m66592_write(m66592, ~M66592_BRDY0, M66592_BRDYSTS); | |
859 | m66592_mdfy(m66592, M66592_PIPE0, M66592_CURPIPE, | |
598f22e1 | 860 | M66592_CFIFOSEL); |
4cf2503c YS |
861 | |
862 | ep = &m66592->ep[0]; | |
863 | req = list_entry(ep->queue.next, struct m66592_request, queue); | |
864 | irq_packet_read(ep, req); | |
865 | } else { | |
866 | for (pipenum = 1; pipenum < M66592_MAX_NUM_PIPE; pipenum++) { | |
867 | check = 1 << pipenum; | |
868 | if ((status & check) && (enb & check)) { | |
869 | m66592_write(m66592, ~check, M66592_BRDYSTS); | |
870 | ep = m66592->pipenum2ep[pipenum]; | |
871 | req = list_entry(ep->queue.next, | |
872 | struct m66592_request, queue); | |
873 | if (ep->desc->bEndpointAddress & USB_DIR_IN) | |
874 | irq_packet_write(ep, req); | |
875 | else | |
876 | irq_packet_read(ep, req); | |
877 | } | |
878 | } | |
879 | } | |
880 | } | |
881 | ||
882 | static void irq_pipe_empty(struct m66592 *m66592, u16 status, u16 enb) | |
883 | { | |
884 | u16 tmp; | |
885 | u16 check; | |
886 | u16 pipenum; | |
887 | struct m66592_ep *ep; | |
888 | struct m66592_request *req; | |
889 | ||
890 | if ((status & M66592_BEMP0) && (enb & M66592_BEMP0)) { | |
891 | m66592_write(m66592, ~M66592_BEMP0, M66592_BEMPSTS); | |
892 | ||
893 | ep = &m66592->ep[0]; | |
894 | req = list_entry(ep->queue.next, struct m66592_request, queue); | |
895 | irq_ep0_write(ep, req); | |
896 | } else { | |
897 | for (pipenum = 1; pipenum < M66592_MAX_NUM_PIPE; pipenum++) { | |
898 | check = 1 << pipenum; | |
899 | if ((status & check) && (enb & check)) { | |
900 | m66592_write(m66592, ~check, M66592_BEMPSTS); | |
901 | tmp = control_reg_get(m66592, pipenum); | |
902 | if ((tmp & M66592_INBUFM) == 0) { | |
903 | disable_irq_empty(m66592, pipenum); | |
904 | pipe_irq_disable(m66592, pipenum); | |
905 | pipe_stop(m66592, pipenum); | |
906 | ep = m66592->pipenum2ep[pipenum]; | |
907 | req = list_entry(ep->queue.next, | |
908 | struct m66592_request, | |
909 | queue); | |
910 | if (!list_empty(&ep->queue)) | |
911 | transfer_complete(ep, req, 0); | |
912 | } | |
913 | } | |
914 | } | |
915 | } | |
916 | } | |
917 | ||
918 | static void get_status(struct m66592 *m66592, struct usb_ctrlrequest *ctrl) | |
598f22e1 YS |
919 | __releases(m66592->lock) |
920 | __acquires(m66592->lock) | |
4cf2503c YS |
921 | { |
922 | struct m66592_ep *ep; | |
923 | u16 pid; | |
924 | u16 status = 0; | |
598f22e1 | 925 | u16 w_index = le16_to_cpu(ctrl->wIndex); |
4cf2503c YS |
926 | |
927 | switch (ctrl->bRequestType & USB_RECIP_MASK) { | |
928 | case USB_RECIP_DEVICE: | |
598f22e1 | 929 | status = 1 << USB_DEVICE_SELF_POWERED; |
4cf2503c YS |
930 | break; |
931 | case USB_RECIP_INTERFACE: | |
932 | status = 0; | |
933 | break; | |
934 | case USB_RECIP_ENDPOINT: | |
598f22e1 | 935 | ep = m66592->epaddr2ep[w_index & USB_ENDPOINT_NUMBER_MASK]; |
4cf2503c YS |
936 | pid = control_reg_get_pid(m66592, ep->pipenum); |
937 | if (pid == M66592_PID_STALL) | |
598f22e1 | 938 | status = 1 << USB_ENDPOINT_HALT; |
4cf2503c YS |
939 | else |
940 | status = 0; | |
941 | break; | |
942 | default: | |
943 | pipe_stall(m66592, 0); | |
944 | return; /* exit */ | |
945 | } | |
946 | ||
598f22e1 YS |
947 | m66592->ep0_data = cpu_to_le16(status); |
948 | m66592->ep0_req->buf = &m66592->ep0_data; | |
4cf2503c | 949 | m66592->ep0_req->length = 2; |
53b67950 | 950 | /* AV: what happens if we get called again before that gets through? */ |
598f22e1 | 951 | spin_unlock(&m66592->lock); |
4cf2503c | 952 | m66592_queue(m66592->gadget.ep0, m66592->ep0_req, GFP_KERNEL); |
598f22e1 | 953 | spin_lock(&m66592->lock); |
4cf2503c YS |
954 | } |
955 | ||
956 | static void clear_feature(struct m66592 *m66592, struct usb_ctrlrequest *ctrl) | |
957 | { | |
958 | switch (ctrl->bRequestType & USB_RECIP_MASK) { | |
959 | case USB_RECIP_DEVICE: | |
960 | control_end(m66592, 1); | |
961 | break; | |
962 | case USB_RECIP_INTERFACE: | |
963 | control_end(m66592, 1); | |
964 | break; | |
965 | case USB_RECIP_ENDPOINT: { | |
966 | struct m66592_ep *ep; | |
967 | struct m66592_request *req; | |
598f22e1 | 968 | u16 w_index = le16_to_cpu(ctrl->wIndex); |
4cf2503c | 969 | |
598f22e1 | 970 | ep = m66592->epaddr2ep[w_index & USB_ENDPOINT_NUMBER_MASK]; |
4cf2503c YS |
971 | pipe_stop(m66592, ep->pipenum); |
972 | control_reg_sqclr(m66592, ep->pipenum); | |
973 | ||
974 | control_end(m66592, 1); | |
975 | ||
976 | req = list_entry(ep->queue.next, | |
977 | struct m66592_request, queue); | |
978 | if (ep->busy) { | |
979 | ep->busy = 0; | |
980 | if (list_empty(&ep->queue)) | |
981 | break; | |
982 | start_packet(ep, req); | |
983 | } else if (!list_empty(&ep->queue)) | |
984 | pipe_start(m66592, ep->pipenum); | |
985 | } | |
986 | break; | |
987 | default: | |
988 | pipe_stall(m66592, 0); | |
989 | break; | |
990 | } | |
991 | } | |
992 | ||
993 | static void set_feature(struct m66592 *m66592, struct usb_ctrlrequest *ctrl) | |
994 | { | |
995 | ||
996 | switch (ctrl->bRequestType & USB_RECIP_MASK) { | |
997 | case USB_RECIP_DEVICE: | |
998 | control_end(m66592, 1); | |
999 | break; | |
1000 | case USB_RECIP_INTERFACE: | |
1001 | control_end(m66592, 1); | |
1002 | break; | |
1003 | case USB_RECIP_ENDPOINT: { | |
1004 | struct m66592_ep *ep; | |
598f22e1 | 1005 | u16 w_index = le16_to_cpu(ctrl->wIndex); |
4cf2503c | 1006 | |
598f22e1 | 1007 | ep = m66592->epaddr2ep[w_index & USB_ENDPOINT_NUMBER_MASK]; |
4cf2503c YS |
1008 | pipe_stall(m66592, ep->pipenum); |
1009 | ||
1010 | control_end(m66592, 1); | |
1011 | } | |
1012 | break; | |
1013 | default: | |
1014 | pipe_stall(m66592, 0); | |
1015 | break; | |
1016 | } | |
1017 | } | |
1018 | ||
1019 | /* if return value is true, call class driver's setup() */ | |
1020 | static int setup_packet(struct m66592 *m66592, struct usb_ctrlrequest *ctrl) | |
1021 | { | |
1022 | u16 *p = (u16 *)ctrl; | |
1023 | unsigned long offset = M66592_USBREQ; | |
1024 | int i, ret = 0; | |
1025 | ||
1026 | /* read fifo */ | |
1027 | m66592_write(m66592, ~M66592_VALID, M66592_INTSTS0); | |
1028 | ||
1029 | for (i = 0; i < 4; i++) | |
1030 | p[i] = m66592_read(m66592, offset + i*2); | |
1031 | ||
1032 | /* check request */ | |
1033 | if ((ctrl->bRequestType & USB_TYPE_MASK) == USB_TYPE_STANDARD) { | |
1034 | switch (ctrl->bRequest) { | |
1035 | case USB_REQ_GET_STATUS: | |
1036 | get_status(m66592, ctrl); | |
1037 | break; | |
1038 | case USB_REQ_CLEAR_FEATURE: | |
1039 | clear_feature(m66592, ctrl); | |
1040 | break; | |
1041 | case USB_REQ_SET_FEATURE: | |
1042 | set_feature(m66592, ctrl); | |
1043 | break; | |
1044 | default: | |
1045 | ret = 1; | |
1046 | break; | |
1047 | } | |
1048 | } else | |
1049 | ret = 1; | |
1050 | return ret; | |
1051 | } | |
1052 | ||
1053 | static void m66592_update_usb_speed(struct m66592 *m66592) | |
1054 | { | |
1055 | u16 speed = get_usb_speed(m66592); | |
1056 | ||
1057 | switch (speed) { | |
1058 | case M66592_HSMODE: | |
1059 | m66592->gadget.speed = USB_SPEED_HIGH; | |
1060 | break; | |
1061 | case M66592_FSMODE: | |
1062 | m66592->gadget.speed = USB_SPEED_FULL; | |
1063 | break; | |
1064 | default: | |
1065 | m66592->gadget.speed = USB_SPEED_UNKNOWN; | |
1066 | printk(KERN_ERR "USB speed unknown\n"); | |
1067 | } | |
1068 | } | |
1069 | ||
1070 | static void irq_device_state(struct m66592 *m66592) | |
1071 | { | |
1072 | u16 dvsq; | |
1073 | ||
1074 | dvsq = m66592_read(m66592, M66592_INTSTS0) & M66592_DVSQ; | |
1075 | m66592_write(m66592, ~M66592_DVST, M66592_INTSTS0); | |
1076 | ||
1077 | if (dvsq == M66592_DS_DFLT) { /* bus reset */ | |
1078 | m66592->driver->disconnect(&m66592->gadget); | |
1079 | m66592_update_usb_speed(m66592); | |
1080 | } | |
1081 | if (m66592->old_dvsq == M66592_DS_CNFG && dvsq != M66592_DS_CNFG) | |
1082 | m66592_update_usb_speed(m66592); | |
598f22e1 YS |
1083 | if ((dvsq == M66592_DS_CNFG || dvsq == M66592_DS_ADDS) |
1084 | && m66592->gadget.speed == USB_SPEED_UNKNOWN) | |
4cf2503c YS |
1085 | m66592_update_usb_speed(m66592); |
1086 | ||
1087 | m66592->old_dvsq = dvsq; | |
1088 | } | |
1089 | ||
1090 | static void irq_control_stage(struct m66592 *m66592) | |
598f22e1 YS |
1091 | __releases(m66592->lock) |
1092 | __acquires(m66592->lock) | |
4cf2503c YS |
1093 | { |
1094 | struct usb_ctrlrequest ctrl; | |
1095 | u16 ctsq; | |
1096 | ||
1097 | ctsq = m66592_read(m66592, M66592_INTSTS0) & M66592_CTSQ; | |
1098 | m66592_write(m66592, ~M66592_CTRT, M66592_INTSTS0); | |
1099 | ||
1100 | switch (ctsq) { | |
1101 | case M66592_CS_IDST: { | |
1102 | struct m66592_ep *ep; | |
1103 | struct m66592_request *req; | |
1104 | ep = &m66592->ep[0]; | |
1105 | req = list_entry(ep->queue.next, struct m66592_request, queue); | |
1106 | transfer_complete(ep, req, 0); | |
1107 | } | |
1108 | break; | |
1109 | ||
1110 | case M66592_CS_RDDS: | |
1111 | case M66592_CS_WRDS: | |
1112 | case M66592_CS_WRND: | |
1113 | if (setup_packet(m66592, &ctrl)) { | |
598f22e1 | 1114 | spin_unlock(&m66592->lock); |
4cf2503c YS |
1115 | if (m66592->driver->setup(&m66592->gadget, &ctrl) < 0) |
1116 | pipe_stall(m66592, 0); | |
598f22e1 | 1117 | spin_lock(&m66592->lock); |
4cf2503c YS |
1118 | } |
1119 | break; | |
1120 | case M66592_CS_RDSS: | |
1121 | case M66592_CS_WRSS: | |
1122 | control_end(m66592, 0); | |
1123 | break; | |
1124 | default: | |
1125 | printk(KERN_ERR "ctrl_stage: unexpect ctsq(%x)\n", ctsq); | |
1126 | break; | |
1127 | } | |
1128 | } | |
1129 | ||
1130 | static irqreturn_t m66592_irq(int irq, void *_m66592) | |
1131 | { | |
1132 | struct m66592 *m66592 = _m66592; | |
1133 | u16 intsts0; | |
1134 | u16 intenb0; | |
1135 | u16 brdysts, nrdysts, bempsts; | |
1136 | u16 brdyenb, nrdyenb, bempenb; | |
1137 | u16 savepipe; | |
1138 | u16 mask0; | |
1139 | ||
598f22e1 YS |
1140 | spin_lock(&m66592->lock); |
1141 | ||
4cf2503c YS |
1142 | intsts0 = m66592_read(m66592, M66592_INTSTS0); |
1143 | intenb0 = m66592_read(m66592, M66592_INTENB0); | |
1144 | ||
1145 | savepipe = m66592_read(m66592, M66592_CFIFOSEL); | |
1146 | ||
1147 | mask0 = intsts0 & intenb0; | |
1148 | if (mask0) { | |
1149 | brdysts = m66592_read(m66592, M66592_BRDYSTS); | |
1150 | nrdysts = m66592_read(m66592, M66592_NRDYSTS); | |
1151 | bempsts = m66592_read(m66592, M66592_BEMPSTS); | |
1152 | brdyenb = m66592_read(m66592, M66592_BRDYENB); | |
1153 | nrdyenb = m66592_read(m66592, M66592_NRDYENB); | |
1154 | bempenb = m66592_read(m66592, M66592_BEMPENB); | |
1155 | ||
1156 | if (mask0 & M66592_VBINT) { | |
598f22e1 YS |
1157 | m66592_write(m66592, 0xffff & ~M66592_VBINT, |
1158 | M66592_INTSTS0); | |
4cf2503c YS |
1159 | m66592_start_xclock(m66592); |
1160 | ||
1161 | /* start vbus sampling */ | |
1162 | m66592->old_vbus = m66592_read(m66592, M66592_INTSTS0) | |
598f22e1 | 1163 | & M66592_VBSTS; |
4cf2503c YS |
1164 | m66592->scount = M66592_MAX_SAMPLING; |
1165 | ||
1166 | mod_timer(&m66592->timer, | |
598f22e1 | 1167 | jiffies + msecs_to_jiffies(50)); |
4cf2503c YS |
1168 | } |
1169 | if (intsts0 & M66592_DVSQ) | |
1170 | irq_device_state(m66592); | |
1171 | ||
598f22e1 YS |
1172 | if ((intsts0 & M66592_BRDY) && (intenb0 & M66592_BRDYE) |
1173 | && (brdysts & brdyenb)) { | |
4cf2503c YS |
1174 | irq_pipe_ready(m66592, brdysts, brdyenb); |
1175 | } | |
598f22e1 YS |
1176 | if ((intsts0 & M66592_BEMP) && (intenb0 & M66592_BEMPE) |
1177 | && (bempsts & bempenb)) { | |
4cf2503c YS |
1178 | irq_pipe_empty(m66592, bempsts, bempenb); |
1179 | } | |
1180 | ||
1181 | if (intsts0 & M66592_CTRT) | |
1182 | irq_control_stage(m66592); | |
1183 | } | |
1184 | ||
1185 | m66592_write(m66592, savepipe, M66592_CFIFOSEL); | |
1186 | ||
598f22e1 | 1187 | spin_unlock(&m66592->lock); |
4cf2503c YS |
1188 | return IRQ_HANDLED; |
1189 | } | |
1190 | ||
1191 | static void m66592_timer(unsigned long _m66592) | |
1192 | { | |
1193 | struct m66592 *m66592 = (struct m66592 *)_m66592; | |
1194 | unsigned long flags; | |
1195 | u16 tmp; | |
1196 | ||
1197 | spin_lock_irqsave(&m66592->lock, flags); | |
1198 | tmp = m66592_read(m66592, M66592_SYSCFG); | |
1199 | if (!(tmp & M66592_RCKE)) { | |
1200 | m66592_bset(m66592, M66592_RCKE | M66592_PLLC, M66592_SYSCFG); | |
1201 | udelay(10); | |
1202 | m66592_bset(m66592, M66592_SCKE, M66592_SYSCFG); | |
1203 | } | |
1204 | if (m66592->scount > 0) { | |
1205 | tmp = m66592_read(m66592, M66592_INTSTS0) & M66592_VBSTS; | |
1206 | if (tmp == m66592->old_vbus) { | |
1207 | m66592->scount--; | |
1208 | if (m66592->scount == 0) { | |
1209 | if (tmp == M66592_VBSTS) | |
1210 | m66592_usb_connect(m66592); | |
1211 | else | |
1212 | m66592_usb_disconnect(m66592); | |
1213 | } else { | |
1214 | mod_timer(&m66592->timer, | |
598f22e1 | 1215 | jiffies + msecs_to_jiffies(50)); |
4cf2503c YS |
1216 | } |
1217 | } else { | |
1218 | m66592->scount = M66592_MAX_SAMPLING; | |
1219 | m66592->old_vbus = tmp; | |
1220 | mod_timer(&m66592->timer, | |
598f22e1 | 1221 | jiffies + msecs_to_jiffies(50)); |
4cf2503c YS |
1222 | } |
1223 | } | |
1224 | spin_unlock_irqrestore(&m66592->lock, flags); | |
1225 | } | |
1226 | ||
1227 | /*-------------------------------------------------------------------------*/ | |
1228 | static int m66592_enable(struct usb_ep *_ep, | |
1229 | const struct usb_endpoint_descriptor *desc) | |
1230 | { | |
1231 | struct m66592_ep *ep; | |
1232 | ||
1233 | ep = container_of(_ep, struct m66592_ep, ep); | |
1234 | return alloc_pipe_config(ep, desc); | |
1235 | } | |
1236 | ||
1237 | static int m66592_disable(struct usb_ep *_ep) | |
1238 | { | |
1239 | struct m66592_ep *ep; | |
1240 | struct m66592_request *req; | |
1241 | unsigned long flags; | |
1242 | ||
1243 | ep = container_of(_ep, struct m66592_ep, ep); | |
1244 | BUG_ON(!ep); | |
1245 | ||
1246 | while (!list_empty(&ep->queue)) { | |
1247 | req = list_entry(ep->queue.next, struct m66592_request, queue); | |
1248 | spin_lock_irqsave(&ep->m66592->lock, flags); | |
1249 | transfer_complete(ep, req, -ECONNRESET); | |
1250 | spin_unlock_irqrestore(&ep->m66592->lock, flags); | |
1251 | } | |
1252 | ||
1253 | pipe_irq_disable(ep->m66592, ep->pipenum); | |
1254 | return free_pipe_config(ep); | |
1255 | } | |
1256 | ||
1257 | static struct usb_request *m66592_alloc_request(struct usb_ep *_ep, | |
1258 | gfp_t gfp_flags) | |
1259 | { | |
1260 | struct m66592_request *req; | |
1261 | ||
1262 | req = kzalloc(sizeof(struct m66592_request), gfp_flags); | |
1263 | if (!req) | |
1264 | return NULL; | |
1265 | ||
1266 | INIT_LIST_HEAD(&req->queue); | |
1267 | ||
1268 | return &req->req; | |
1269 | } | |
1270 | ||
1271 | static void m66592_free_request(struct usb_ep *_ep, struct usb_request *_req) | |
1272 | { | |
1273 | struct m66592_request *req; | |
1274 | ||
1275 | req = container_of(_req, struct m66592_request, req); | |
1276 | kfree(req); | |
1277 | } | |
1278 | ||
4cf2503c YS |
1279 | static int m66592_queue(struct usb_ep *_ep, struct usb_request *_req, |
1280 | gfp_t gfp_flags) | |
1281 | { | |
1282 | struct m66592_ep *ep; | |
1283 | struct m66592_request *req; | |
1284 | unsigned long flags; | |
1285 | int request = 0; | |
1286 | ||
1287 | ep = container_of(_ep, struct m66592_ep, ep); | |
1288 | req = container_of(_req, struct m66592_request, req); | |
1289 | ||
1290 | if (ep->m66592->gadget.speed == USB_SPEED_UNKNOWN) | |
1291 | return -ESHUTDOWN; | |
1292 | ||
1293 | spin_lock_irqsave(&ep->m66592->lock, flags); | |
1294 | ||
1295 | if (list_empty(&ep->queue)) | |
1296 | request = 1; | |
1297 | ||
1298 | list_add_tail(&req->queue, &ep->queue); | |
1299 | req->req.actual = 0; | |
1300 | req->req.status = -EINPROGRESS; | |
1301 | ||
a9475226 | 1302 | if (ep->desc == NULL) /* control */ |
4cf2503c YS |
1303 | start_ep0(ep, req); |
1304 | else { | |
1305 | if (request && !ep->busy) | |
1306 | start_packet(ep, req); | |
1307 | } | |
1308 | ||
1309 | spin_unlock_irqrestore(&ep->m66592->lock, flags); | |
1310 | ||
1311 | return 0; | |
1312 | } | |
1313 | ||
1314 | static int m66592_dequeue(struct usb_ep *_ep, struct usb_request *_req) | |
1315 | { | |
1316 | struct m66592_ep *ep; | |
1317 | struct m66592_request *req; | |
1318 | unsigned long flags; | |
1319 | ||
1320 | ep = container_of(_ep, struct m66592_ep, ep); | |
1321 | req = container_of(_req, struct m66592_request, req); | |
1322 | ||
1323 | spin_lock_irqsave(&ep->m66592->lock, flags); | |
1324 | if (!list_empty(&ep->queue)) | |
1325 | transfer_complete(ep, req, -ECONNRESET); | |
1326 | spin_unlock_irqrestore(&ep->m66592->lock, flags); | |
1327 | ||
1328 | return 0; | |
1329 | } | |
1330 | ||
1331 | static int m66592_set_halt(struct usb_ep *_ep, int value) | |
1332 | { | |
1333 | struct m66592_ep *ep; | |
1334 | struct m66592_request *req; | |
1335 | unsigned long flags; | |
1336 | int ret = 0; | |
1337 | ||
1338 | ep = container_of(_ep, struct m66592_ep, ep); | |
1339 | req = list_entry(ep->queue.next, struct m66592_request, queue); | |
1340 | ||
1341 | spin_lock_irqsave(&ep->m66592->lock, flags); | |
1342 | if (!list_empty(&ep->queue)) { | |
1343 | ret = -EAGAIN; | |
1344 | goto out; | |
1345 | } | |
1346 | if (value) { | |
1347 | ep->busy = 1; | |
1348 | pipe_stall(ep->m66592, ep->pipenum); | |
1349 | } else { | |
1350 | ep->busy = 0; | |
1351 | pipe_stop(ep->m66592, ep->pipenum); | |
1352 | } | |
1353 | ||
1354 | out: | |
1355 | spin_unlock_irqrestore(&ep->m66592->lock, flags); | |
1356 | return ret; | |
1357 | } | |
1358 | ||
4cf2503c YS |
1359 | static void m66592_fifo_flush(struct usb_ep *_ep) |
1360 | { | |
1361 | struct m66592_ep *ep; | |
1362 | unsigned long flags; | |
1363 | ||
1364 | ep = container_of(_ep, struct m66592_ep, ep); | |
1365 | spin_lock_irqsave(&ep->m66592->lock, flags); | |
1366 | if (list_empty(&ep->queue) && !ep->busy) { | |
1367 | pipe_stop(ep->m66592, ep->pipenum); | |
1368 | m66592_bclr(ep->m66592, M66592_BCLR, ep->fifoctr); | |
1369 | } | |
1370 | spin_unlock_irqrestore(&ep->m66592->lock, flags); | |
1371 | } | |
1372 | ||
1373 | static struct usb_ep_ops m66592_ep_ops = { | |
1374 | .enable = m66592_enable, | |
1375 | .disable = m66592_disable, | |
1376 | ||
1377 | .alloc_request = m66592_alloc_request, | |
1378 | .free_request = m66592_free_request, | |
1379 | ||
4cf2503c YS |
1380 | .queue = m66592_queue, |
1381 | .dequeue = m66592_dequeue, | |
1382 | ||
1383 | .set_halt = m66592_set_halt, | |
4cf2503c YS |
1384 | .fifo_flush = m66592_fifo_flush, |
1385 | }; | |
1386 | ||
1387 | /*-------------------------------------------------------------------------*/ | |
1388 | static struct m66592 *the_controller; | |
1389 | ||
1390 | int usb_gadget_register_driver(struct usb_gadget_driver *driver) | |
1391 | { | |
1392 | struct m66592 *m66592 = the_controller; | |
1393 | int retval; | |
1394 | ||
598f22e1 YS |
1395 | if (!driver |
1396 | || driver->speed != USB_SPEED_HIGH | |
1397 | || !driver->bind | |
1398 | || !driver->setup) | |
4cf2503c YS |
1399 | return -EINVAL; |
1400 | if (!m66592) | |
1401 | return -ENODEV; | |
1402 | if (m66592->driver) | |
1403 | return -EBUSY; | |
1404 | ||
1405 | /* hook up the driver */ | |
1406 | driver->driver.bus = NULL; | |
1407 | m66592->driver = driver; | |
1408 | m66592->gadget.dev.driver = &driver->driver; | |
1409 | ||
1410 | retval = device_add(&m66592->gadget.dev); | |
1411 | if (retval) { | |
1412 | printk(KERN_ERR "device_add error (%d)\n", retval); | |
1413 | goto error; | |
1414 | } | |
1415 | ||
1416 | retval = driver->bind (&m66592->gadget); | |
1417 | if (retval) { | |
1418 | printk(KERN_ERR "bind to driver error (%d)\n", retval); | |
1419 | device_del(&m66592->gadget.dev); | |
1420 | goto error; | |
1421 | } | |
1422 | ||
1423 | m66592_bset(m66592, M66592_VBSE | M66592_URST, M66592_INTENB0); | |
1424 | if (m66592_read(m66592, M66592_INTSTS0) & M66592_VBSTS) { | |
1425 | m66592_start_xclock(m66592); | |
1426 | /* start vbus sampling */ | |
1427 | m66592->old_vbus = m66592_read(m66592, | |
1428 | M66592_INTSTS0) & M66592_VBSTS; | |
1429 | m66592->scount = M66592_MAX_SAMPLING; | |
598f22e1 | 1430 | mod_timer(&m66592->timer, jiffies + msecs_to_jiffies(50)); |
4cf2503c YS |
1431 | } |
1432 | ||
1433 | return 0; | |
1434 | ||
1435 | error: | |
1436 | m66592->driver = NULL; | |
1437 | m66592->gadget.dev.driver = NULL; | |
1438 | ||
1439 | return retval; | |
1440 | } | |
1441 | EXPORT_SYMBOL(usb_gadget_register_driver); | |
1442 | ||
1443 | int usb_gadget_unregister_driver(struct usb_gadget_driver *driver) | |
1444 | { | |
1445 | struct m66592 *m66592 = the_controller; | |
1446 | unsigned long flags; | |
1447 | ||
598f22e1 YS |
1448 | if (driver != m66592->driver || !driver->unbind) |
1449 | return -EINVAL; | |
1450 | ||
4cf2503c YS |
1451 | spin_lock_irqsave(&m66592->lock, flags); |
1452 | if (m66592->gadget.speed != USB_SPEED_UNKNOWN) | |
1453 | m66592_usb_disconnect(m66592); | |
1454 | spin_unlock_irqrestore(&m66592->lock, flags); | |
1455 | ||
1456 | m66592_bclr(m66592, M66592_VBSE | M66592_URST, M66592_INTENB0); | |
1457 | ||
1458 | driver->unbind(&m66592->gadget); | |
1459 | ||
1460 | init_controller(m66592); | |
1461 | disable_controller(m66592); | |
1462 | ||
1463 | device_del(&m66592->gadget.dev); | |
1464 | m66592->driver = NULL; | |
1465 | return 0; | |
1466 | } | |
1467 | EXPORT_SYMBOL(usb_gadget_unregister_driver); | |
1468 | ||
1469 | /*-------------------------------------------------------------------------*/ | |
1470 | static int m66592_get_frame(struct usb_gadget *_gadget) | |
1471 | { | |
1472 | struct m66592 *m66592 = gadget_to_m66592(_gadget); | |
1473 | return m66592_read(m66592, M66592_FRMNUM) & 0x03FF; | |
1474 | } | |
1475 | ||
1476 | static struct usb_gadget_ops m66592_gadget_ops = { | |
1477 | .get_frame = m66592_get_frame, | |
1478 | }; | |
1479 | ||
598f22e1 | 1480 | static int __exit m66592_remove(struct platform_device *pdev) |
4cf2503c YS |
1481 | { |
1482 | struct m66592 *m66592 = dev_get_drvdata(&pdev->dev); | |
1483 | ||
1484 | del_timer_sync(&m66592->timer); | |
1485 | iounmap(m66592->reg); | |
1486 | free_irq(platform_get_irq(pdev, 0), m66592); | |
598f22e1 | 1487 | m66592_free_request(&m66592->ep[0].ep, m66592->ep0_req); |
4cf2503c YS |
1488 | kfree(m66592); |
1489 | return 0; | |
1490 | } | |
1491 | ||
598f22e1 YS |
1492 | static void nop_completion(struct usb_ep *ep, struct usb_request *r) |
1493 | { | |
1494 | } | |
1495 | ||
4cf2503c | 1496 | #define resource_len(r) (((r)->end - (r)->start) + 1) |
598f22e1 | 1497 | |
4cf2503c YS |
1498 | static int __init m66592_probe(struct platform_device *pdev) |
1499 | { | |
598f22e1 YS |
1500 | struct resource *res; |
1501 | int irq; | |
4cf2503c YS |
1502 | void __iomem *reg = NULL; |
1503 | struct m66592 *m66592 = NULL; | |
1504 | int ret = 0; | |
1505 | int i; | |
1506 | ||
1507 | res = platform_get_resource_byname(pdev, IORESOURCE_MEM, | |
598f22e1 | 1508 | (char *)udc_name); |
4cf2503c YS |
1509 | if (!res) { |
1510 | ret = -ENODEV; | |
1511 | printk(KERN_ERR "platform_get_resource_byname error.\n"); | |
1512 | goto clean_up; | |
1513 | } | |
1514 | ||
1515 | irq = platform_get_irq(pdev, 0); | |
1516 | if (irq < 0) { | |
1517 | ret = -ENODEV; | |
1518 | printk(KERN_ERR "platform_get_irq error.\n"); | |
1519 | goto clean_up; | |
1520 | } | |
1521 | ||
1522 | reg = ioremap(res->start, resource_len(res)); | |
1523 | if (reg == NULL) { | |
1524 | ret = -ENOMEM; | |
1525 | printk(KERN_ERR "ioremap error.\n"); | |
1526 | goto clean_up; | |
1527 | } | |
1528 | ||
1529 | /* initialize ucd */ | |
1530 | m66592 = kzalloc(sizeof(struct m66592), GFP_KERNEL); | |
1531 | if (m66592 == NULL) { | |
1532 | printk(KERN_ERR "kzalloc error\n"); | |
1533 | goto clean_up; | |
1534 | } | |
1535 | ||
1536 | spin_lock_init(&m66592->lock); | |
1537 | dev_set_drvdata(&pdev->dev, m66592); | |
1538 | ||
1539 | m66592->gadget.ops = &m66592_gadget_ops; | |
1540 | device_initialize(&m66592->gadget.dev); | |
1541 | strcpy(m66592->gadget.dev.bus_id, "gadget"); | |
1542 | m66592->gadget.is_dualspeed = 1; | |
1543 | m66592->gadget.dev.parent = &pdev->dev; | |
1544 | m66592->gadget.dev.dma_mask = pdev->dev.dma_mask; | |
1545 | m66592->gadget.dev.release = pdev->dev.release; | |
1546 | m66592->gadget.name = udc_name; | |
1547 | ||
1548 | init_timer(&m66592->timer); | |
1549 | m66592->timer.function = m66592_timer; | |
1550 | m66592->timer.data = (unsigned long)m66592; | |
1551 | m66592->reg = reg; | |
1552 | ||
1553 | m66592->bi_bufnum = M66592_BASE_BUFNUM; | |
1554 | ||
15a1d5c9 | 1555 | ret = request_irq(irq, m66592_irq, IRQF_DISABLED | IRQF_SHARED, |
598f22e1 | 1556 | udc_name, m66592); |
4cf2503c YS |
1557 | if (ret < 0) { |
1558 | printk(KERN_ERR "request_irq error (%d)\n", ret); | |
1559 | goto clean_up; | |
1560 | } | |
1561 | ||
1562 | INIT_LIST_HEAD(&m66592->gadget.ep_list); | |
1563 | m66592->gadget.ep0 = &m66592->ep[0].ep; | |
1564 | INIT_LIST_HEAD(&m66592->gadget.ep0->ep_list); | |
1565 | for (i = 0; i < M66592_MAX_NUM_PIPE; i++) { | |
1566 | struct m66592_ep *ep = &m66592->ep[i]; | |
1567 | ||
1568 | if (i != 0) { | |
1569 | INIT_LIST_HEAD(&m66592->ep[i].ep.ep_list); | |
1570 | list_add_tail(&m66592->ep[i].ep.ep_list, | |
598f22e1 | 1571 | &m66592->gadget.ep_list); |
4cf2503c YS |
1572 | } |
1573 | ep->m66592 = m66592; | |
1574 | INIT_LIST_HEAD(&ep->queue); | |
1575 | ep->ep.name = m66592_ep_name[i]; | |
1576 | ep->ep.ops = &m66592_ep_ops; | |
1577 | ep->ep.maxpacket = 512; | |
1578 | } | |
1579 | m66592->ep[0].ep.maxpacket = 64; | |
1580 | m66592->ep[0].pipenum = 0; | |
1581 | m66592->ep[0].fifoaddr = M66592_CFIFO; | |
1582 | m66592->ep[0].fifosel = M66592_CFIFOSEL; | |
1583 | m66592->ep[0].fifoctr = M66592_CFIFOCTR; | |
1584 | m66592->ep[0].fifotrn = 0; | |
1585 | m66592->ep[0].pipectr = get_pipectr_addr(0); | |
1586 | m66592->pipenum2ep[0] = &m66592->ep[0]; | |
1587 | m66592->epaddr2ep[0] = &m66592->ep[0]; | |
1588 | ||
1589 | the_controller = m66592; | |
1590 | ||
1591 | m66592->ep0_req = m66592_alloc_request(&m66592->ep[0].ep, GFP_KERNEL); | |
1592 | if (m66592->ep0_req == NULL) | |
598f22e1 YS |
1593 | goto clean_up2; |
1594 | m66592->ep0_req->complete = nop_completion; | |
4cf2503c YS |
1595 | |
1596 | init_controller(m66592); | |
1597 | ||
598f22e1 | 1598 | dev_info(&pdev->dev, "version %s\n", DRIVER_VERSION); |
4cf2503c YS |
1599 | return 0; |
1600 | ||
598f22e1 YS |
1601 | clean_up2: |
1602 | free_irq(irq, m66592); | |
4cf2503c YS |
1603 | clean_up: |
1604 | if (m66592) { | |
1605 | if (m66592->ep0_req) | |
1606 | m66592_free_request(&m66592->ep[0].ep, m66592->ep0_req); | |
1607 | kfree(m66592); | |
1608 | } | |
1609 | if (reg) | |
1610 | iounmap(reg); | |
1611 | ||
1612 | return ret; | |
1613 | } | |
1614 | ||
1615 | /*-------------------------------------------------------------------------*/ | |
1616 | static struct platform_driver m66592_driver = { | |
598f22e1 | 1617 | .remove = __exit_p(m66592_remove), |
4cf2503c YS |
1618 | .driver = { |
1619 | .name = (char *) udc_name, | |
1620 | }, | |
1621 | }; | |
1622 | ||
1623 | static int __init m66592_udc_init(void) | |
1624 | { | |
598f22e1 | 1625 | return platform_driver_probe(&m66592_driver, m66592_probe); |
4cf2503c YS |
1626 | } |
1627 | module_init(m66592_udc_init); | |
1628 | ||
1629 | static void __exit m66592_udc_cleanup(void) | |
1630 | { | |
1631 | platform_driver_unregister(&m66592_driver); | |
1632 | } | |
1633 | module_exit(m66592_udc_cleanup); |