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usb: gadget: net2280: Use pr_* function
[deliverable/linux.git] / drivers / usb / gadget / net2280.c
CommitLineData
1da177e4
LT		 1/*
2 * Driver for the PLX NET2280 USB device controller.
3 * Specs and errata are available from <http://www.plxtech.com>.
4 *
901b3d75 5 * PLX Technology Inc. (formerly NetChip Technology) supported the
1da177e4
LT		 6 * development of this driver.
7 *
8 *
9 * CODE STATUS HIGHLIGHTS
10 *
11 * This driver should work well with most "gadget" drivers, including
fa06920a 12 * the Mass Storage, Serial, and Ethernet/RNDIS gadget drivers
1da177e4
LT		 13 * as well as Gadget Zero and Gadgetfs.
14 *
15 * DMA is enabled by default. Drivers using transfer queues might use
16 * DMA chaining to remove IRQ latencies between transfers. (Except when
17 * short OUT transfers happen.) Drivers can use the req->no_interrupt
18 * hint to completely eliminate some IRQs, if a later IRQ is guaranteed
19 * and DMA chaining is enabled.
20 *
adc82f77
RRD		 21 * MSI is enabled by default. The legacy IRQ is used if MSI couldn't
22 * be enabled.
23 *
1da177e4
LT		 24 * Note that almost all the errata workarounds here are only needed for
25 * rev1 chips. Rev1a silicon (0110) fixes almost all of them.
26 */
27
28/*
29 * Copyright (C) 2003 David Brownell
30 * Copyright (C) 2003-2005 PLX Technology, Inc.
adc82f77 31 * Copyright (C) 2014 Ricardo Ribalda - Qtechnology/AS
1da177e4 32 *
901b3d75
DB		 33 * Modified Seth Levy 2005 PLX Technology, Inc. to provide compatibility
34 * with 2282 chip
950ee4c8 35 *
adc82f77
RRD		 36 * Modified Ricardo Ribalda Qtechnology AS to provide compatibility
37 * with usb 338x chip. Based on PLX driver
38 *
1da177e4
LT		 39 * This program is free software; you can redistribute it and/or modify
40 * it under the terms of the GNU General Public License as published by
41 * the Free Software Foundation; either version 2 of the License, or
42 * (at your option) any later version.
1da177e4
LT		 43 */
44
1da177e4
LT		 45#include <linux/module.h>
46#include <linux/pci.h>
682d4c80 47#include <linux/dma-mapping.h>
1da177e4
LT		 48#include <linux/kernel.h>
49#include <linux/delay.h>
50#include <linux/ioport.h>
1da177e4 51#include <linux/slab.h>
1da177e4
LT		 52#include <linux/errno.h>
53#include <linux/init.h>
54#include <linux/timer.h>
55#include <linux/list.h>
56#include <linux/interrupt.h>
57#include <linux/moduleparam.h>
58#include <linux/device.h>
5f848137 59#include <linux/usb/ch9.h>
9454a57a 60#include <linux/usb/gadget.h>
b38b03b3 61#include <linux/prefetch.h>
fae3c158 62#include <linux/io.h>
1da177e4
LT		 63
64#include <asm/byteorder.h>
1da177e4 65#include <asm/irq.h>
1da177e4
LT		 66#include <asm/unaligned.h>
67
adc82f77
RRD		 68#define DRIVER_DESC "PLX NET228x/USB338x USB Peripheral Controller"
69#define DRIVER_VERSION "2005 Sept 27/v3.0"
1da177e4 70
1da177e4
LT		 71#define EP_DONTUSE 13 /* nonzero */
72
73#define USE_RDK_LEDS /* GPIO pins control three LEDs */
74
75
fae3c158
RRD		 76static const char driver_name[] = "net2280";
77static const char driver_desc[] = DRIVER_DESC;
1da177e4 78
adc82f77 79static const u32 ep_bit[9] = { 0, 17, 2, 19, 4, 1, 18, 3, 20 };
fae3c158
RRD		 80static const char ep0name[] = "ep0";
81static const char *const ep_name[] = {
1da177e4
LT		 82 ep0name,
83 "ep-a", "ep-b", "ep-c", "ep-d",
adc82f77 84 "ep-e", "ep-f", "ep-g", "ep-h",
1da177e4
LT		 85};
86
87/* use_dma -- general goodness, fewer interrupts, less cpu load (vs PIO)
88 * use_dma_chaining -- dma descriptor queueing gives even more irq reduction
89 *
90 * The net2280 DMA engines are not tightly integrated with their FIFOs;
91 * not all cases are (yet) handled well in this driver or the silicon.
92 * Some gadget drivers work better with the dma support here than others.
93 * These two parameters let you use PIO or more aggressive DMA.
94 */
00d4db0e
RRD		 95static bool use_dma = true;
96static bool use_dma_chaining;
97static bool use_msi = true;
1da177e4
LT		 98
99/* "modprobe net2280 use_dma=n" etc */
ae8e530a
RRD		 100module_param(use_dma, bool, 0444);
101module_param(use_dma_chaining, bool, 0444);
102module_param(use_msi, bool, 0444);
1da177e4
LT		 103
104/* mode 0 == ep-{a,b,c,d} 1K fifo each
105 * mode 1 == ep-{a,b} 2K fifo each, ep-{c,d} unavailable
106 * mode 2 == ep-a 2K fifo, ep-{b,c} 1K each, ep-d unavailable
107 */
fae3c158 108static ushort fifo_mode;
1da177e4
LT		 109
110/* "modprobe net2280 fifo_mode=1" etc */
ae8e530a 111module_param(fifo_mode, ushort, 0644);
1da177e4
LT		 112
113/* enable_suspend -- When enabled, the driver will respond to
114 * USB suspend requests by powering down the NET2280. Otherwise,
25985edc 115 * USB suspend requests will be ignored. This is acceptable for
950ee4c8 116 * self-powered devices
1da177e4 117 */
00d4db0e 118static bool enable_suspend;
1da177e4
LT		 119
120/* "modprobe net2280 enable_suspend=1" etc */
ae8e530a 121module_param(enable_suspend, bool, 0444);
1da177e4 122
2f076077
AS		 123/* force full-speed operation */
124static bool full_speed;
125module_param(full_speed, bool, 0444);
126MODULE_PARM_DESC(full_speed, "force full-speed mode -- for testing only!");
1da177e4
LT		 127
128#define DIR_STRING(bAddress) (((bAddress) & USB_DIR_IN) ? "in" : "out")
129
fae3c158 130static char *type_string(u8 bmAttributes)
1da177e4
LT		 131{
132 switch ((bmAttributes) & USB_ENDPOINT_XFERTYPE_MASK) {
133 case USB_ENDPOINT_XFER_BULK: return "bulk";
134 case USB_ENDPOINT_XFER_ISOC: return "iso";
135 case USB_ENDPOINT_XFER_INT: return "intr";
2b84f92b 136 }
1da177e4
LT		 137 return "control";
138}
1da177e4
LT		 139
140#include "net2280.h"
141
3e76fdcb
RRD		 142#define valid_bit cpu_to_le32(BIT(VALID_BIT))
143#define dma_done_ie cpu_to_le32(BIT(DMA_DONE_INTERRUPT_ENABLE))
1da177e4
LT		 144
145/*-------------------------------------------------------------------------*/
adc82f77
RRD		 146static inline void enable_pciirqenb(struct net2280_ep *ep)
147{
148 u32 tmp = readl(&ep->dev->regs->pciirqenb0);
149
c2db8a8a 150 if (ep->dev->pdev->vendor == PCI_VENDOR_ID_PLX_LEGACY)
3e76fdcb 151 tmp |= BIT(ep->num);
adc82f77 152 else
3e76fdcb 153 tmp |= BIT(ep_bit[ep->num]);
adc82f77
RRD		 154 writel(tmp, &ep->dev->regs->pciirqenb0);
155
156 return;
157}
1da177e4
LT		 158
159static int
fae3c158 160net2280_enable(struct usb_ep *_ep, const struct usb_endpoint_descriptor *desc)
1da177e4
LT		 161{
162 struct net2280 *dev;
163 struct net2280_ep *ep;
164 u32 max, tmp;
165 unsigned long flags;
adc82f77 166 static const u32 ep_key[9] = { 1, 0, 1, 0, 1, 1, 0, 1, 0 };
1da177e4 167
fae3c158 168 ep = container_of(_ep, struct net2280_ep, ep);
ae8e530a
RRD		 169 if (!_ep || !desc || ep->desc || _ep->name == ep0name ||
170 desc->bDescriptorType != USB_DT_ENDPOINT)
1da177e4
LT		 171 return -EINVAL;
172 dev = ep->dev;
173 if (!dev->driver || dev->gadget.speed == USB_SPEED_UNKNOWN)
174 return -ESHUTDOWN;
175
176 /* erratum 0119 workaround ties up an endpoint number */
177 if ((desc->bEndpointAddress & 0x0f) == EP_DONTUSE)
178 return -EDOM;
179
c2db8a8a 180 if (dev->pdev->vendor == PCI_VENDOR_ID_PLX) {
adc82f77
RRD		 181 if ((desc->bEndpointAddress & 0x0f) >= 0x0c)
182 return -EDOM;
183 ep->is_in = !!usb_endpoint_dir_in(desc);
184 if (dev->enhanced_mode && ep->is_in && ep_key[ep->num])
185 return -EINVAL;
186 }
187
1da177e4 188 /* sanity check ep-e/ep-f since their fifos are small */
fae3c158 189 max = usb_endpoint_maxp(desc) & 0x1fff;
c2db8a8a
RRD		 190 if (ep->num > 4 && max > 64 &&
191 (dev->pdev->vendor == PCI_VENDOR_ID_PLX_LEGACY))
1da177e4
LT		 192 return -ERANGE;
193
fae3c158 194 spin_lock_irqsave(&dev->lock, flags);
1da177e4
LT		 195 _ep->maxpacket = max & 0x7ff;
196 ep->desc = desc;
197
198 /* ep_reset() has already been called */
199 ep->stopped = 0;
8066134f 200 ep->wedged = 0;
1da177e4
LT		 201 ep->out_overflow = 0;
202
203 /* set speed-dependent max packet; may kick in high bandwidth */
adc82f77 204 set_max_speed(ep, max);
1da177e4
LT		 205
206 /* FIFO lines can't go to different packets. PIO is ok, so
207 * use it instead of troublesome (non-bulk) multi-packet DMA.
208 */
209 if (ep->dma && (max % 4) != 0 && use_dma_chaining) {
e56e69cc 210 ep_dbg(ep->dev, "%s, no dma for maxpacket %d\n",
1da177e4
LT		 211 ep->ep.name, ep->ep.maxpacket);
212 ep->dma = NULL;
213 }
214
215 /* set type, direction, address; reset fifo counters */
3e76fdcb 216 writel(BIT(FIFO_FLUSH), &ep->regs->ep_stat);
1da177e4
LT		 217 tmp = (desc->bmAttributes & USB_ENDPOINT_XFERTYPE_MASK);
218 if (tmp == USB_ENDPOINT_XFER_INT) {
219 /* erratum 0105 workaround prevents hs NYET */
ae8e530a
RRD		 220 if (dev->chiprev == 0100 &&
221 dev->gadget.speed == USB_SPEED_HIGH &&
222 !(desc->bEndpointAddress & USB_DIR_IN))
3e76fdcb 223 writel(BIT(CLEAR_NAK_OUT_PACKETS_MODE),
1da177e4
LT		 224 &ep->regs->ep_rsp);
225 } else if (tmp == USB_ENDPOINT_XFER_BULK) {
226 /* catch some particularly blatant driver bugs */
adc82f77
RRD		 227 if ((dev->gadget.speed == USB_SPEED_SUPER && max != 1024) ||
228 (dev->gadget.speed == USB_SPEED_HIGH && max != 512) ||
229 (dev->gadget.speed == USB_SPEED_FULL && max > 64)) {
230 spin_unlock_irqrestore(&dev->lock, flags);
1da177e4
LT		 231 return -ERANGE;
232 }
233 }
fae3c158 234 ep->is_iso = (tmp == USB_ENDPOINT_XFER_ISOC);
adc82f77 235 /* Enable this endpoint */
c2db8a8a 236 if (dev->pdev->vendor == PCI_VENDOR_ID_PLX_LEGACY) {
adc82f77
RRD		 237 tmp <<= ENDPOINT_TYPE;
238 tmp |= desc->bEndpointAddress;
239 /* default full fifo lines */
240 tmp |= (4 << ENDPOINT_BYTE_COUNT);
3e76fdcb 241 tmp |= BIT(ENDPOINT_ENABLE);
adc82f77
RRD		 242 ep->is_in = (tmp & USB_DIR_IN) != 0;
243 } else {
244 /* In Legacy mode, only OUT endpoints are used */
245 if (dev->enhanced_mode && ep->is_in) {
246 tmp <<= IN_ENDPOINT_TYPE;
3e76fdcb 247 tmp |= BIT(IN_ENDPOINT_ENABLE);
adc82f77 248 /* Not applicable to Legacy */
3e76fdcb 249 tmp |= BIT(ENDPOINT_DIRECTION);
adc82f77
RRD		 250 } else {
251 tmp <<= OUT_ENDPOINT_TYPE;
3e76fdcb 252 tmp |= BIT(OUT_ENDPOINT_ENABLE);
adc82f77
RRD		 253 tmp |= (ep->is_in << ENDPOINT_DIRECTION);
254 }
255
256 tmp |= usb_endpoint_num(desc);
257 tmp |= (ep->ep.maxburst << MAX_BURST_SIZE);
258 }
259
260 /* Make sure all the registers are written before ep_rsp*/
261 wmb();
1da177e4
LT		 262
263 /* for OUT transfers, block the rx fifo until a read is posted */
1da177e4 264 if (!ep->is_in)
3e76fdcb 265 writel(BIT(SET_NAK_OUT_PACKETS), &ep->regs->ep_rsp);
950ee4c8 266 else if (dev->pdev->device != 0x2280) {
901b3d75
DB		 267 /* Added for 2282, Don't use nak packets on an in endpoint,
268 * this was ignored on 2280
269 */
3e76fdcb
RRD		 270 writel(BIT(CLEAR_NAK_OUT_PACKETS) |
271 BIT(CLEAR_NAK_OUT_PACKETS_MODE), &ep->regs->ep_rsp);
950ee4c8 272 }
1da177e4 273
adc82f77 274 writel(tmp, &ep->cfg->ep_cfg);
1da177e4
LT		 275
276 /* enable irqs */
277 if (!ep->dma) { /* pio, per-packet */
adc82f77 278 enable_pciirqenb(ep);
1da177e4 279
3e76fdcb
RRD		 280 tmp = BIT(DATA_PACKET_RECEIVED_INTERRUPT_ENABLE) |
281 BIT(DATA_PACKET_TRANSMITTED_INTERRUPT_ENABLE);
950ee4c8 282 if (dev->pdev->device == 0x2280)
fae3c158
RRD		 283 tmp |= readl(&ep->regs->ep_irqenb);
284 writel(tmp, &ep->regs->ep_irqenb);
1da177e4 285 } else { /* dma, per-request */
3e76fdcb 286 tmp = BIT((8 + ep->num)); /* completion */
fae3c158
RRD		 287 tmp |= readl(&dev->regs->pciirqenb1);
288 writel(tmp, &dev->regs->pciirqenb1);
1da177e4
LT		 289
290 /* for short OUT transfers, dma completions can't
291 * advance the queue; do it pio-style, by hand.
292 * NOTE erratum 0112 workaround #2
293 */
294 if ((desc->bEndpointAddress & USB_DIR_IN) == 0) {
3e76fdcb 295 tmp = BIT(SHORT_PACKET_TRANSFERRED_INTERRUPT_ENABLE);
fae3c158 296 writel(tmp, &ep->regs->ep_irqenb);
1da177e4 297
adc82f77 298 enable_pciirqenb(ep);
1da177e4
LT		 299 }
300 }
301
302 tmp = desc->bEndpointAddress;
e56e69cc 303 ep_dbg(dev, "enabled %s (ep%d%s-%s) %s max %04x\n",
fae3c158
RRD		 304 _ep->name, tmp & 0x0f, DIR_STRING(tmp),
305 type_string(desc->bmAttributes),
1da177e4
LT		 306 ep->dma ? "dma" : "pio", max);
307
308 /* pci writes may still be posted */
fae3c158 309 spin_unlock_irqrestore(&dev->lock, flags);
1da177e4
LT		 310 return 0;
311}
312
fae3c158 313static int handshake(u32 __iomem *ptr, u32 mask, u32 done, int usec)
1da177e4
LT		 314{
315 u32 result;
316
317 do {
fae3c158 318 result = readl(ptr);
1da177e4
LT		 319 if (result == ~(u32)0) /* "device unplugged" */
320 return -ENODEV;
321 result &= mask;
322 if (result == done)
323 return 0;
fae3c158 324 udelay(1);
1da177e4
LT		 325 usec--;
326 } while (usec > 0);
327 return -ETIMEDOUT;
328}
329
901b3d75 330static const struct usb_ep_ops net2280_ep_ops;
1da177e4 331
adc82f77
RRD		 332static void ep_reset_228x(struct net2280_regs __iomem *regs,
333 struct net2280_ep *ep)
1da177e4
LT		 334{
335 u32 tmp;
336
337 ep->desc = NULL;
fae3c158 338 INIT_LIST_HEAD(&ep->queue);
1da177e4 339
e117e742 340 usb_ep_set_maxpacket_limit(&ep->ep, ~0);
1da177e4
LT		 341 ep->ep.ops = &net2280_ep_ops;
342
343 /* disable the dma, irqs, endpoint... */
344 if (ep->dma) {
fae3c158 345 writel(0, &ep->dma->dmactl);
3e76fdcb
RRD		 346 writel(BIT(DMA_SCATTER_GATHER_DONE_INTERRUPT) |
347 BIT(DMA_TRANSACTION_DONE_INTERRUPT) |
348 BIT(DMA_ABORT),
349 &ep->dma->dmastat);
1da177e4 350
fae3c158 351 tmp = readl(&regs->pciirqenb0);
3e76fdcb 352 tmp &= ~BIT(ep->num);
fae3c158 353 writel(tmp, &regs->pciirqenb0);
1da177e4 354 } else {
fae3c158 355 tmp = readl(&regs->pciirqenb1);
3e76fdcb 356 tmp &= ~BIT((8 + ep->num)); /* completion */
fae3c158 357 writel(tmp, &regs->pciirqenb1);
1da177e4 358 }
fae3c158 359 writel(0, &ep->regs->ep_irqenb);
1da177e4
LT		 360
361 /* init to our chosen defaults, notably so that we NAK OUT
362 * packets until the driver queues a read (+note erratum 0112)
363 */
950ee4c8 364 if (!ep->is_in || ep->dev->pdev->device == 0x2280) {
3e76fdcb
RRD		 365 tmp = BIT(SET_NAK_OUT_PACKETS_MODE) |
366 BIT(SET_NAK_OUT_PACKETS) |
367 BIT(CLEAR_EP_HIDE_STATUS_PHASE) |
368 BIT(CLEAR_INTERRUPT_MODE);
950ee4c8
GL		 369 } else {
370 /* added for 2282 */
3e76fdcb
RRD		 371 tmp = BIT(CLEAR_NAK_OUT_PACKETS_MODE) |
372 BIT(CLEAR_NAK_OUT_PACKETS) |
373 BIT(CLEAR_EP_HIDE_STATUS_PHASE) |
374 BIT(CLEAR_INTERRUPT_MODE);
950ee4c8 375 }
1da177e4
LT		 376
377 if (ep->num != 0) {
3e76fdcb
RRD		 378 tmp |= BIT(CLEAR_ENDPOINT_TOGGLE) |
379 BIT(CLEAR_ENDPOINT_HALT);
1da177e4 380 }
fae3c158 381 writel(tmp, &ep->regs->ep_rsp);
1da177e4
LT		 382
383 /* scrub most status bits, and flush any fifo state */
950ee4c8 384 if (ep->dev->pdev->device == 0x2280)
3e76fdcb
RRD		 385 tmp = BIT(FIFO_OVERFLOW) |
386 BIT(FIFO_UNDERFLOW);
950ee4c8
GL		 387 else
388 tmp = 0;
389
3e76fdcb
RRD		 390 writel(tmp | BIT(TIMEOUT) |
391 BIT(USB_STALL_SENT) |
392 BIT(USB_IN_NAK_SENT) |
393 BIT(USB_IN_ACK_RCVD) |
394 BIT(USB_OUT_PING_NAK_SENT) |
395 BIT(USB_OUT_ACK_SENT) |
396 BIT(FIFO_FLUSH) |
397 BIT(SHORT_PACKET_OUT_DONE_INTERRUPT) |
398 BIT(SHORT_PACKET_TRANSFERRED_INTERRUPT) |
399 BIT(DATA_PACKET_RECEIVED_INTERRUPT) |
400 BIT(DATA_PACKET_TRANSMITTED_INTERRUPT) |
401 BIT(DATA_OUT_PING_TOKEN_INTERRUPT) |
ae8e530a
RRD		 402 BIT(DATA_IN_TOKEN_INTERRUPT),
403 &ep->regs->ep_stat);
1da177e4
LT		 404
405 /* fifo size is handled separately */
406}
407
adc82f77
RRD		 408static void ep_reset_338x(struct net2280_regs __iomem *regs,
409 struct net2280_ep *ep)
410{
411 u32 tmp, dmastat;
412
413 ep->desc = NULL;
414 INIT_LIST_HEAD(&ep->queue);
415
416 usb_ep_set_maxpacket_limit(&ep->ep, ~0);
417 ep->ep.ops = &net2280_ep_ops;
418
419 /* disable the dma, irqs, endpoint... */
420 if (ep->dma) {
421 writel(0, &ep->dma->dmactl);
3e76fdcb
RRD		 422 writel(BIT(DMA_ABORT_DONE_INTERRUPT) |
423 BIT(DMA_PAUSE_DONE_INTERRUPT) |
424 BIT(DMA_SCATTER_GATHER_DONE_INTERRUPT) |
ae8e530a
RRD		 425 BIT(DMA_TRANSACTION_DONE_INTERRUPT),
426 /* | BIT(DMA_ABORT), */
427 &ep->dma->dmastat);
adc82f77
RRD		 428
429 dmastat = readl(&ep->dma->dmastat);
430 if (dmastat == 0x5002) {
e56e69cc 431 ep_warn(ep->dev, "The dmastat return = %x!!\n",
adc82f77
RRD		 432 dmastat);
433 writel(0x5a, &ep->dma->dmastat);
434 }
435
436 tmp = readl(&regs->pciirqenb0);
3e76fdcb 437 tmp &= ~BIT(ep_bit[ep->num]);
adc82f77
RRD		 438 writel(tmp, &regs->pciirqenb0);
439 } else {
440 if (ep->num < 5) {
441 tmp = readl(&regs->pciirqenb1);
3e76fdcb 442 tmp &= ~BIT((8 + ep->num)); /* completion */
adc82f77
RRD		 443 writel(tmp, &regs->pciirqenb1);
444 }
445 }
446 writel(0, &ep->regs->ep_irqenb);
447
3e76fdcb
RRD		 448 writel(BIT(SHORT_PACKET_OUT_DONE_INTERRUPT) |
449 BIT(SHORT_PACKET_TRANSFERRED_INTERRUPT) |
450 BIT(FIFO_OVERFLOW) |
451 BIT(DATA_PACKET_RECEIVED_INTERRUPT) |
452 BIT(DATA_PACKET_TRANSMITTED_INTERRUPT) |
453 BIT(DATA_OUT_PING_TOKEN_INTERRUPT) |
454 BIT(DATA_IN_TOKEN_INTERRUPT), &ep->regs->ep_stat);
adc82f77
RRD		 455}
456
fae3c158 457static void nuke(struct net2280_ep *);
1da177e4 458
fae3c158 459static int net2280_disable(struct usb_ep *_ep)
1da177e4
LT		 460{
461 struct net2280_ep *ep;
462 unsigned long flags;
463
fae3c158 464 ep = container_of(_ep, struct net2280_ep, ep);
1da177e4
LT		 465 if (!_ep || !ep->desc || _ep->name == ep0name)
466 return -EINVAL;
467
fae3c158
RRD		 468 spin_lock_irqsave(&ep->dev->lock, flags);
469 nuke(ep);
adc82f77 470
c2db8a8a 471 if (ep->dev->pdev->vendor == PCI_VENDOR_ID_PLX)
adc82f77
RRD		 472 ep_reset_338x(ep->dev->regs, ep);
473 else
474 ep_reset_228x(ep->dev->regs, ep);
1da177e4 475
e56e69cc 476 ep_vdbg(ep->dev, "disabled %s %s\n",
1da177e4
LT		 477 ep->dma ? "dma" : "pio", _ep->name);
478
479 /* synch memory views with the device */
adc82f77 480 (void)readl(&ep->cfg->ep_cfg);
1da177e4
LT		 481
482 if (use_dma && !ep->dma && ep->num >= 1 && ep->num <= 4)
fae3c158 483 ep->dma = &ep->dev->dma[ep->num - 1];
1da177e4 484
fae3c158 485 spin_unlock_irqrestore(&ep->dev->lock, flags);
1da177e4
LT		 486 return 0;
487}
488
489/*-------------------------------------------------------------------------*/
490
fae3c158
RRD		 491static struct usb_request
492*net2280_alloc_request(struct usb_ep *_ep, gfp_t gfp_flags)
1da177e4
LT		 493{
494 struct net2280_ep *ep;
495 struct net2280_request *req;
496
497 if (!_ep)
498 return NULL;
fae3c158 499 ep = container_of(_ep, struct net2280_ep, ep);
1da177e4 500
7039f422 501 req = kzalloc(sizeof(*req), gfp_flags);
1da177e4
LT		 502 if (!req)
503 return NULL;
504
fae3c158 505 INIT_LIST_HEAD(&req->queue);
1da177e4
LT		 506
507 /* this dma descriptor may be swapped with the previous dummy */
508 if (ep->dma) {
509 struct net2280_dma *td;
510
fae3c158 511 td = pci_pool_alloc(ep->dev->requests, gfp_flags,
1da177e4
LT		 512 &req->td_dma);
513 if (!td) {
fae3c158 514 kfree(req);
1da177e4
LT		 515 return NULL;
516 }
517 td->dmacount = 0; /* not VALID */
1da177e4
LT		 518 td->dmadesc = td->dmaaddr;
519 req->td = td;
520 }
521 return &req->req;
522}
523
fae3c158 524static void net2280_free_request(struct usb_ep *_ep, struct usb_request *_req)
1da177e4
LT		 525{
526 struct net2280_ep *ep;
527 struct net2280_request *req;
528
fae3c158 529 ep = container_of(_ep, struct net2280_ep, ep);
1da177e4
LT		 530 if (!_ep || !_req)
531 return;
532
fae3c158
RRD		 533 req = container_of(_req, struct net2280_request, req);
534 WARN_ON(!list_empty(&req->queue));
1da177e4 535 if (req->td)
fae3c158
RRD		 536 pci_pool_free(ep->dev->requests, req->td, req->td_dma);
537 kfree(req);
1da177e4
LT		 538}
539
540/*-------------------------------------------------------------------------*/
541
1da177e4
LT		 542/* load a packet into the fifo we use for usb IN transfers.
543 * works for all endpoints.
544 *
545 * NOTE: pio with ep-a..ep-d could stuff multiple packets into the fifo
546 * at a time, but this code is simpler because it knows it only writes
547 * one packet. ep-a..ep-d should use dma instead.
548 */
fae3c158 549static void write_fifo(struct net2280_ep *ep, struct usb_request *req)
1da177e4
LT		 550{
551 struct net2280_ep_regs __iomem *regs = ep->regs;
552 u8 *buf;
553 u32 tmp;
554 unsigned count, total;
555
556 /* INVARIANT: fifo is currently empty. (testable) */
557
558 if (req) {
559 buf = req->buf + req->actual;
fae3c158 560 prefetch(buf);
1da177e4
LT		 561 total = req->length - req->actual;
562 } else {
563 total = 0;
564 buf = NULL;
565 }
566
567 /* write just one packet at a time */
568 count = ep->ep.maxpacket;
569 if (count > total) /* min() cannot be used on a bitfield */
570 count = total;
571
e56e69cc 572 ep_vdbg(ep->dev, "write %s fifo (IN) %d bytes%s req %p\n",
1da177e4
LT		 573 ep->ep.name, count,
574 (count != ep->ep.maxpacket) ? " (short)" : "",
575 req);
576 while (count >= 4) {
577 /* NOTE be careful if you try to align these. fifo lines
578 * should normally be full (4 bytes) and successive partial
579 * lines are ok only in certain cases.
580 */
fae3c158
RRD		 581 tmp = get_unaligned((u32 *)buf);
582 cpu_to_le32s(&tmp);
583 writel(tmp, &regs->ep_data);
1da177e4
LT		 584 buf += 4;
585 count -= 4;
586 }
587
588 /* last fifo entry is "short" unless we wrote a full packet.
589 * also explicitly validate last word in (periodic) transfers
590 * when maxpacket is not a multiple of 4 bytes.
591 */
592 if (count || total < ep->ep.maxpacket) {
fae3c158
RRD		 593 tmp = count ? get_unaligned((u32 *)buf) : count;
594 cpu_to_le32s(&tmp);
595 set_fifo_bytecount(ep, count & 0x03);
596 writel(tmp, &regs->ep_data);
1da177e4
LT		 597 }
598
599 /* pci writes may still be posted */
600}
601
602/* work around erratum 0106: PCI and USB race over the OUT fifo.
603 * caller guarantees chiprev 0100, out endpoint is NAKing, and
604 * there's no real data in the fifo.
605 *
606 * NOTE: also used in cases where that erratum doesn't apply:
607 * where the host wrote "too much" data to us.
608 */
fae3c158 609static void out_flush(struct net2280_ep *ep)
1da177e4
LT		 610{
611 u32 __iomem *statp;
612 u32 tmp;
613
fae3c158 614 ASSERT_OUT_NAKING(ep);
1da177e4
LT		 615
616 statp = &ep->regs->ep_stat;
3e76fdcb 617 writel(BIT(DATA_OUT_PING_TOKEN_INTERRUPT) |
ae8e530a
RRD		 618 BIT(DATA_PACKET_RECEIVED_INTERRUPT),
619 statp);
3e76fdcb 620 writel(BIT(FIFO_FLUSH), statp);
fae3c158
RRD		 621 /* Make sure that stap is written */
622 mb();
623 tmp = readl(statp);
ae8e530a 624 if (tmp & BIT(DATA_OUT_PING_TOKEN_INTERRUPT) &&
1da177e4 625 /* high speed did bulk NYET; fifo isn't filling */
ae8e530a 626 ep->dev->gadget.speed == USB_SPEED_FULL) {
1da177e4
LT		 627 unsigned usec;
628
629 usec = 50; /* 64 byte bulk/interrupt */
3e76fdcb
RRD		 630 handshake(statp, BIT(USB_OUT_PING_NAK_SENT),
631 BIT(USB_OUT_PING_NAK_SENT), usec);
1da177e4
LT		 632 /* NAK done; now CLEAR_NAK_OUT_PACKETS is safe */
633 }
634}
635
636/* unload packet(s) from the fifo we use for usb OUT transfers.
637 * returns true iff the request completed, because of short packet
638 * or the request buffer having filled with full packets.
639 *
640 * for ep-a..ep-d this will read multiple packets out when they
641 * have been accepted.
642 */
fae3c158 643static int read_fifo(struct net2280_ep *ep, struct net2280_request *req)
1da177e4
LT		 644{
645 struct net2280_ep_regs __iomem *regs = ep->regs;
646 u8 *buf = req->req.buf + req->req.actual;
647 unsigned count, tmp, is_short;
648 unsigned cleanup = 0, prevent = 0;
649
650 /* erratum 0106 ... packets coming in during fifo reads might
651 * be incompletely rejected. not all cases have workarounds.
652 */
ae8e530a
RRD		 653 if (ep->dev->chiprev == 0x0100 &&
654 ep->dev->gadget.speed == USB_SPEED_FULL) {
fae3c158
RRD		 655 udelay(1);
656 tmp = readl(&ep->regs->ep_stat);
3e76fdcb 657 if ((tmp & BIT(NAK_OUT_PACKETS)))
1da177e4 658 cleanup = 1;
3e76fdcb 659 else if ((tmp & BIT(FIFO_FULL))) {
fae3c158 660 start_out_naking(ep);
1da177e4
LT		 661 prevent = 1;
662 }
663 /* else: hope we don't see the problem */
664 }
665
666 /* never overflow the rx buffer. the fifo reads packets until
667 * it sees a short one; we might not be ready for them all.
668 */
fae3c158
RRD		 669 prefetchw(buf);
670 count = readl(&regs->ep_avail);
671 if (unlikely(count == 0)) {
672 udelay(1);
673 tmp = readl(&ep->regs->ep_stat);
674 count = readl(&regs->ep_avail);
1da177e4 675 /* handled that data already? */
3e76fdcb 676 if (count == 0 && (tmp & BIT(NAK_OUT_PACKETS)) == 0)
1da177e4
LT		 677 return 0;
678 }
679
680 tmp = req->req.length - req->req.actual;
681 if (count > tmp) {
682 /* as with DMA, data overflow gets flushed */
683 if ((tmp % ep->ep.maxpacket) != 0) {
e56e69cc 684 ep_err(ep->dev,
1da177e4
LT		 685 "%s out fifo %d bytes, expected %d\n",
686 ep->ep.name, count, tmp);
687 req->req.status = -EOVERFLOW;
688 cleanup = 1;
689 /* NAK_OUT_PACKETS will be set, so flushing is safe;
690 * the next read will start with the next packet
691 */
692 } /* else it's a ZLP, no worries */
693 count = tmp;
694 }
695 req->req.actual += count;
696
697 is_short = (count == 0) || ((count % ep->ep.maxpacket) != 0);
698
e56e69cc 699 ep_vdbg(ep->dev, "read %s fifo (OUT) %d bytes%s%s%s req %p %d/%d\n",
1da177e4
LT		 700 ep->ep.name, count, is_short ? " (short)" : "",
701 cleanup ? " flush" : "", prevent ? " nak" : "",
702 req, req->req.actual, req->req.length);
703
704 while (count >= 4) {
fae3c158
RRD		 705 tmp = readl(&regs->ep_data);
706 cpu_to_le32s(&tmp);
707 put_unaligned(tmp, (u32 *)buf);
1da177e4
LT		 708 buf += 4;
709 count -= 4;
710 }
711 if (count) {
fae3c158 712 tmp = readl(&regs->ep_data);
1da177e4
LT		 713 /* LE conversion is implicit here: */
714 do {
715 *buf++ = (u8) tmp;
716 tmp >>= 8;
717 } while (--count);
718 }
719 if (cleanup)
fae3c158 720 out_flush(ep);
1da177e4 721 if (prevent) {
3e76fdcb 722 writel(BIT(CLEAR_NAK_OUT_PACKETS), &ep->regs->ep_rsp);
fae3c158 723 (void) readl(&ep->regs->ep_rsp);
1da177e4
LT		 724 }
725
ae8e530a
RRD		 726 return is_short || ((req->req.actual == req->req.length) &&
727 !req->req.zero);
1da177e4
LT		 728}
729
730/* fill out dma descriptor to match a given request */
fae3c158
RRD		 731static void fill_dma_desc(struct net2280_ep *ep,
732 struct net2280_request *req, int valid)
1da177e4
LT		 733{
734 struct net2280_dma *td = req->td;
735 u32 dmacount = req->req.length;
736
737 /* don't let DMA continue after a short OUT packet,
738 * so overruns can't affect the next transfer.
739 * in case of overruns on max-size packets, we can't
740 * stop the fifo from filling but we can flush it.
741 */
742 if (ep->is_in)
3e76fdcb 743 dmacount |= BIT(DMA_DIRECTION);
ae8e530a
RRD		 744 if ((!ep->is_in && (dmacount % ep->ep.maxpacket) != 0) ||
745 ep->dev->pdev->device != 0x2280)
3e76fdcb 746 dmacount |= BIT(END_OF_CHAIN);
1da177e4
LT		 747
748 req->valid = valid;
749 if (valid)
3e76fdcb 750 dmacount |= BIT(VALID_BIT);
1da177e4 751 if (likely(!req->req.no_interrupt || !use_dma_chaining))
3e76fdcb 752 dmacount |= BIT(DMA_DONE_INTERRUPT_ENABLE);
1da177e4
LT		 753
754 /* td->dmadesc = previously set by caller */
755 td->dmaaddr = cpu_to_le32 (req->req.dma);
756
757 /* 2280 may be polling VALID_BIT through ep->dma->dmadesc */
fae3c158 758 wmb();
da2bbdcc 759 td->dmacount = cpu_to_le32(dmacount);
1da177e4
LT		 760}
761
762static const u32 dmactl_default =
3e76fdcb
RRD		 763 BIT(DMA_SCATTER_GATHER_DONE_INTERRUPT) |
764 BIT(DMA_CLEAR_COUNT_ENABLE) |
1da177e4 765 /* erratum 0116 workaround part 1 (use POLLING) */
3e76fdcb
RRD		 766 (POLL_100_USEC << DESCRIPTOR_POLLING_RATE) |
767 BIT(DMA_VALID_BIT_POLLING_ENABLE) |
768 BIT(DMA_VALID_BIT_ENABLE) |
769 BIT(DMA_SCATTER_GATHER_ENABLE) |
1da177e4 770 /* erratum 0116 workaround part 2 (no AUTOSTART) */
3e76fdcb 771 BIT(DMA_ENABLE);
1da177e4 772
fae3c158 773static inline void spin_stop_dma(struct net2280_dma_regs __iomem *dma)
1da177e4 774{
3e76fdcb 775 handshake(&dma->dmactl, BIT(DMA_ENABLE), 0, 50);
1da177e4
LT		 776}
777
fae3c158 778static inline void stop_dma(struct net2280_dma_regs __iomem *dma)
1da177e4 779{
3e76fdcb 780 writel(readl(&dma->dmactl) & ~BIT(DMA_ENABLE), &dma->dmactl);
fae3c158 781 spin_stop_dma(dma);
1da177e4
LT		 782}
783
fae3c158 784static void start_queue(struct net2280_ep *ep, u32 dmactl, u32 td_dma)
1da177e4
LT		 785{
786 struct net2280_dma_regs __iomem *dma = ep->dma;
3e76fdcb 787 unsigned int tmp = BIT(VALID_BIT) | (ep->is_in << DMA_DIRECTION);
1da177e4 788
950ee4c8 789 if (ep->dev->pdev->device != 0x2280)
3e76fdcb 790 tmp |= BIT(END_OF_CHAIN);
950ee4c8 791
fae3c158
RRD		 792 writel(tmp, &dma->dmacount);
793 writel(readl(&dma->dmastat), &dma->dmastat);
1da177e4 794
fae3c158 795 writel(td_dma, &dma->dmadesc);
c2db8a8a 796 if (ep->dev->pdev->vendor == PCI_VENDOR_ID_PLX)
3e76fdcb 797 dmactl |= BIT(DMA_REQUEST_OUTSTANDING);
fae3c158 798 writel(dmactl, &dma->dmactl);
1da177e4
LT		 799
800 /* erratum 0116 workaround part 3: pci arbiter away from net2280 */
fae3c158 801 (void) readl(&ep->dev->pci->pcimstctl);
1da177e4 802
3e76fdcb 803 writel(BIT(DMA_START), &dma->dmastat);
1da177e4
LT		 804
805 if (!ep->is_in)
fae3c158 806 stop_out_naking(ep);
1da177e4
LT		 807}
808
fae3c158 809static void start_dma(struct net2280_ep *ep, struct net2280_request *req)
1da177e4
LT		 810{
811 u32 tmp;
812 struct net2280_dma_regs __iomem *dma = ep->dma;
813
814 /* FIXME can't use DMA for ZLPs */
815
816 /* on this path we "know" there's no dma active (yet) */
3e76fdcb 817 WARN_ON(readl(&dma->dmactl) & BIT(DMA_ENABLE));
fae3c158 818 writel(0, &ep->dma->dmactl);
1da177e4
LT		 819
820 /* previous OUT packet might have been short */
fae3c158
RRD		 821 if (!ep->is_in && (readl(&ep->regs->ep_stat) &
822 BIT(NAK_OUT_PACKETS))) {
3e76fdcb 823 writel(BIT(SHORT_PACKET_TRANSFERRED_INTERRUPT),
1da177e4
LT		 824 &ep->regs->ep_stat);
825
fae3c158 826 tmp = readl(&ep->regs->ep_avail);
1da177e4 827 if (tmp) {
fae3c158 828 writel(readl(&dma->dmastat), &dma->dmastat);
1da177e4
LT		 829
830 /* transfer all/some fifo data */
fae3c158
RRD		 831 writel(req->req.dma, &dma->dmaaddr);
832 tmp = min(tmp, req->req.length);
1da177e4
LT		 833
834 /* dma irq, faking scatterlist status */
fae3c158 835 req->td->dmacount = cpu_to_le32(req->req.length - tmp);
ae8e530a
RRD		 836 writel(BIT(DMA_DONE_INTERRUPT_ENABLE) | tmp,
837 &dma->dmacount);
1da177e4
LT		 838 req->td->dmadesc = 0;
839 req->valid = 1;
840
3e76fdcb
RRD		 841 writel(BIT(DMA_ENABLE), &dma->dmactl);
842 writel(BIT(DMA_START), &dma->dmastat);
1da177e4
LT		 843 return;
844 }
845 }
846
847 tmp = dmactl_default;
848
849 /* force packet boundaries between dma requests, but prevent the
850 * controller from automagically writing a last "short" packet
851 * (zero length) unless the driver explicitly said to do that.
852 */
853 if (ep->is_in) {
fae3c158
RRD		 854 if (likely((req->req.length % ep->ep.maxpacket) ||
855 req->req.zero)){
3e76fdcb 856 tmp |= BIT(DMA_FIFO_VALIDATE);
1da177e4
LT		 857 ep->in_fifo_validate = 1;
858 } else
859 ep->in_fifo_validate = 0;
860 }
861
862 /* init req->td, pointing to the current dummy */
863 req->td->dmadesc = cpu_to_le32 (ep->td_dma);
fae3c158 864 fill_dma_desc(ep, req, 1);
1da177e4
LT		 865
866 if (!use_dma_chaining)
3e76fdcb 867 req->td->dmacount |= cpu_to_le32(BIT(END_OF_CHAIN));
1da177e4 868
fae3c158 869 start_queue(ep, tmp, req->td_dma);
1da177e4
LT		 870}
871
adc82f77
RRD		 872static inline void resume_dma(struct net2280_ep *ep)
873{
3e76fdcb 874 writel(readl(&ep->dma->dmactl) | BIT(DMA_ENABLE), &ep->dma->dmactl);
adc82f77
RRD		 875
876 ep->dma_started = true;
877}
878
879static inline void ep_stop_dma(struct net2280_ep *ep)
880{
3e76fdcb 881 writel(readl(&ep->dma->dmactl) & ~BIT(DMA_ENABLE), &ep->dma->dmactl);
adc82f77
RRD		 882 spin_stop_dma(ep->dma);
883
884 ep->dma_started = false;
885}
886
1da177e4 887static inline void
fae3c158 888queue_dma(struct net2280_ep *ep, struct net2280_request *req, int valid)
1da177e4
LT		 889{
890 struct net2280_dma *end;
891 dma_addr_t tmp;
892
893 /* swap new dummy for old, link; fill and maybe activate */
894 end = ep->dummy;
895 ep->dummy = req->td;
896 req->td = end;
897
898 tmp = ep->td_dma;
899 ep->td_dma = req->td_dma;
900 req->td_dma = tmp;
901
902 end->dmadesc = cpu_to_le32 (ep->td_dma);
903
fae3c158 904 fill_dma_desc(ep, req, valid);
1da177e4
LT		 905}
906
907static void
fae3c158 908done(struct net2280_ep *ep, struct net2280_request *req, int status)
1da177e4
LT		 909{
910 struct net2280 *dev;
911 unsigned stopped = ep->stopped;
912
fae3c158 913 list_del_init(&req->queue);
1da177e4
LT		 914
915 if (req->req.status == -EINPROGRESS)
916 req->req.status = status;
917 else
918 status = req->req.status;
919
920 dev = ep->dev;
ae4d7933
FB		 921 if (ep->dma)
922 usb_gadget_unmap_request(&dev->gadget, &req->req, ep->is_in);
1da177e4
LT		 923
924 if (status && status != -ESHUTDOWN)
e56e69cc 925 ep_vdbg(dev, "complete %s req %p stat %d len %u/%u\n",
1da177e4
LT		 926 ep->ep.name, &req->req, status,
927 req->req.actual, req->req.length);
928
929 /* don't modify queue heads during completion callback */
930 ep->stopped = 1;
fae3c158
RRD		 931 spin_unlock(&dev->lock);
932 req->req.complete(&ep->ep, &req->req);
933 spin_lock(&dev->lock);
1da177e4
LT		 934 ep->stopped = stopped;
935}
936
937/*-------------------------------------------------------------------------*/
938
939static int
fae3c158 940net2280_queue(struct usb_ep *_ep, struct usb_request *_req, gfp_t gfp_flags)
1da177e4
LT		 941{
942 struct net2280_request *req;
943 struct net2280_ep *ep;
944 struct net2280 *dev;
945 unsigned long flags;
946
947 /* we always require a cpu-view buffer, so that we can
948 * always use pio (as fallback or whatever).
949 */
fae3c158
RRD		 950 req = container_of(_req, struct net2280_request, req);
951 if (!_req || !_req->complete || !_req->buf ||
952 !list_empty(&req->queue))
1da177e4
LT		 953 return -EINVAL;
954 if (_req->length > (~0 & DMA_BYTE_COUNT_MASK))
955 return -EDOM;
fae3c158 956 ep = container_of(_ep, struct net2280_ep, ep);
1da177e4
LT		 957 if (!_ep || (!ep->desc && ep->num != 0))
958 return -EINVAL;
959 dev = ep->dev;
960 if (!dev->driver || dev->gadget.speed == USB_SPEED_UNKNOWN)
961 return -ESHUTDOWN;
962
963 /* FIXME implement PIO fallback for ZLPs with DMA */
964 if (ep->dma && _req->length == 0)
965 return -EOPNOTSUPP;
966
967 /* set up dma mapping in case the caller didn't */
ae4d7933
FB		 968 if (ep->dma) {
969 int ret;
970
971 ret = usb_gadget_map_request(&dev->gadget, _req,
972 ep->is_in);
973 if (ret)
974 return ret;
1da177e4
LT		 975 }
976
977#if 0
e56e69cc 978 ep_vdbg(dev, "%s queue req %p, len %d buf %p\n",
1da177e4
LT		 979 _ep->name, _req, _req->length, _req->buf);
980#endif
981
fae3c158 982 spin_lock_irqsave(&dev->lock, flags);
1da177e4
LT		 983
984 _req->status = -EINPROGRESS;
985 _req->actual = 0;
986
987 /* kickstart this i/o queue? */
fae3c158 988 if (list_empty(&ep->queue) && !ep->stopped) {
adc82f77
RRD		 989 /* DMA request while EP halted */
990 if (ep->dma &&
3e76fdcb 991 (readl(&ep->regs->ep_rsp) & BIT(CLEAR_ENDPOINT_HALT)) &&
c2db8a8a 992 (dev->pdev->vendor == PCI_VENDOR_ID_PLX)) {
adc82f77
RRD		 993 int valid = 1;
994 if (ep->is_in) {
995 int expect;
996 expect = likely(req->req.zero ||
997 ((req->req.length %
998 ep->ep.maxpacket) != 0));
999 if (expect != ep->in_fifo_validate)
1000 valid = 0;
1001 }
1002 queue_dma(ep, req, valid);
1003 }
1da177e4 1004 /* use DMA if the endpoint supports it, else pio */
adc82f77 1005 else if (ep->dma)
fae3c158 1006 start_dma(ep, req);
1da177e4
LT		 1007 else {
1008 /* maybe there's no control data, just status ack */
1009 if (ep->num == 0 && _req->length == 0) {
fae3c158
RRD		 1010 allow_status(ep);
1011 done(ep, req, 0);
e56e69cc 1012 ep_vdbg(dev, "%s status ack\n", ep->ep.name);
1da177e4
LT		 1013 goto done;
1014 }
1015
1016 /* PIO ... stuff the fifo, or unblock it. */
1017 if (ep->is_in)
fae3c158
RRD		 1018 write_fifo(ep, _req);
1019 else if (list_empty(&ep->queue)) {
1da177e4
LT		 1020 u32 s;
1021
1022 /* OUT FIFO might have packet(s) buffered */
fae3c158 1023 s = readl(&ep->regs->ep_stat);
3e76fdcb 1024 if ((s & BIT(FIFO_EMPTY)) == 0) {
1da177e4
LT		 1025 /* note: _req->short_not_ok is
1026 * ignored here since PIO _always_
1027 * stops queue advance here, and
1028 * _req->status doesn't change for
1029 * short reads (only _req->actual)
1030 */
fae3c158
RRD		 1031 if (read_fifo(ep, req) &&
1032 ep->num == 0) {
1033 done(ep, req, 0);
1034 allow_status(ep);
1da177e4
LT		 1035 /* don't queue it */
1036 req = NULL;
fae3c158
RRD		 1037 } else if (read_fifo(ep, req) &&
1038 ep->num != 0) {
1039 done(ep, req, 0);
1040 req = NULL;
1da177e4 1041 } else
fae3c158 1042 s = readl(&ep->regs->ep_stat);
1da177e4
LT		 1043 }
1044
1045 /* don't NAK, let the fifo fill */
3e76fdcb
RRD		 1046 if (req && (s & BIT(NAK_OUT_PACKETS)))
1047 writel(BIT(CLEAR_NAK_OUT_PACKETS),
1da177e4
LT		 1048 &ep->regs->ep_rsp);
1049 }
1050 }
1051
1052 } else if (ep->dma) {
1053 int valid = 1;
1054
1055 if (ep->is_in) {
1056 int expect;
1057
1058 /* preventing magic zlps is per-engine state, not
1059 * per-transfer; irq logic must recover hiccups.
1060 */
fae3c158
RRD		 1061 expect = likely(req->req.zero ||
1062 (req->req.length % ep->ep.maxpacket));
1da177e4
LT		 1063 if (expect != ep->in_fifo_validate)
1064 valid = 0;
1065 }
fae3c158 1066 queue_dma(ep, req, valid);
1da177e4
LT		 1067
1068 } /* else the irq handler advances the queue. */
1069
1f26e28d 1070 ep->responded = 1;
1da177e4 1071 if (req)
fae3c158 1072 list_add_tail(&req->queue, &ep->queue);
1da177e4 1073done:
fae3c158 1074 spin_unlock_irqrestore(&dev->lock, flags);
1da177e4
LT		 1075
1076 /* pci writes may still be posted */
1077 return 0;
1078}
1079
1080static inline void
fae3c158
RRD		 1081dma_done(struct net2280_ep *ep, struct net2280_request *req, u32 dmacount,
1082 int status)
1da177e4
LT		 1083{
1084 req->req.actual = req->req.length - (DMA_BYTE_COUNT_MASK & dmacount);
fae3c158 1085 done(ep, req, status);
1da177e4
LT		 1086}
1087
fae3c158 1088static void restart_dma(struct net2280_ep *ep);
1da177e4 1089
fae3c158 1090static void scan_dma_completions(struct net2280_ep *ep)
1da177e4
LT		 1091{
1092 /* only look at descriptors that were "naturally" retired,
1093 * so fifo and list head state won't matter
1094 */
fae3c158 1095 while (!list_empty(&ep->queue)) {
1da177e4
LT		 1096 struct net2280_request *req;
1097 u32 tmp;
1098
fae3c158 1099 req = list_entry(ep->queue.next,
1da177e4
LT		 1100 struct net2280_request, queue);
1101 if (!req->valid)
1102 break;
fae3c158
RRD		 1103 rmb();
1104 tmp = le32_to_cpup(&req->td->dmacount);
3e76fdcb 1105 if ((tmp & BIT(VALID_BIT)) != 0)
1da177e4
LT		 1106 break;
1107
1108 /* SHORT_PACKET_TRANSFERRED_INTERRUPT handles "usb-short"
1109 * cases where DMA must be aborted; this code handles
1110 * all non-abort DMA completions.
1111 */
fae3c158 1112 if (unlikely(req->td->dmadesc == 0)) {
1da177e4 1113 /* paranoia */
fae3c158 1114 tmp = readl(&ep->dma->dmacount);
1da177e4
LT		 1115 if (tmp & DMA_BYTE_COUNT_MASK)
1116 break;
1117 /* single transfer mode */
fae3c158 1118 dma_done(ep, req, tmp, 0);
1da177e4 1119 break;
ae8e530a
RRD		 1120 } else if (!ep->is_in &&
1121 (req->req.length % ep->ep.maxpacket) != 0) {
fae3c158 1122 tmp = readl(&ep->regs->ep_stat);
c2db8a8a 1123 if (ep->dev->pdev->vendor == PCI_VENDOR_ID_PLX)
adc82f77 1124 return dma_done(ep, req, tmp, 0);
1da177e4
LT		 1125
1126 /* AVOID TROUBLE HERE by not issuing short reads from
1127 * your gadget driver. That helps avoids errata 0121,
1128 * 0122, and 0124; not all cases trigger the warning.
1129 */
3e76fdcb 1130 if ((tmp & BIT(NAK_OUT_PACKETS)) == 0) {
e56e69cc 1131 ep_warn(ep->dev, "%s lost packet sync!\n",
1da177e4
LT		 1132 ep->ep.name);
1133 req->req.status = -EOVERFLOW;
fae3c158
RRD		 1134 } else {
1135 tmp = readl(&ep->regs->ep_avail);
1136 if (tmp) {
1137 /* fifo gets flushed later */
1138 ep->out_overflow = 1;
e56e69cc 1139 ep_dbg(ep->dev,
fae3c158 1140 "%s dma, discard %d len %d\n",
1da177e4
LT		 1141 ep->ep.name, tmp,
1142 req->req.length);
fae3c158
RRD		 1143 req->req.status = -EOVERFLOW;
1144 }
1da177e4
LT		 1145 }
1146 }
fae3c158 1147 dma_done(ep, req, tmp, 0);
1da177e4
LT		 1148 }
1149}
1150
fae3c158 1151static void restart_dma(struct net2280_ep *ep)
1da177e4
LT		 1152{
1153 struct net2280_request *req;
1154 u32 dmactl = dmactl_default;
1155
1156 if (ep->stopped)
1157 return;
fae3c158 1158 req = list_entry(ep->queue.next, struct net2280_request, queue);
1da177e4
LT		 1159
1160 if (!use_dma_chaining) {
fae3c158 1161 start_dma(ep, req);
1da177e4
LT		 1162 return;
1163 }
1164
1165 /* the 2280 will be processing the queue unless queue hiccups after
1166 * the previous transfer:
1167 * IN: wanted automagic zlp, head doesn't (or vice versa)
1168 * DMA_FIFO_VALIDATE doesn't init from dma descriptors.
1169 * OUT: was "usb-short", we must restart.
1170 */
1171 if (ep->is_in && !req->valid) {
1172 struct net2280_request *entry, *prev = NULL;
1173 int reqmode, done = 0;
1174
e56e69cc 1175 ep_dbg(ep->dev, "%s dma hiccup td %p\n", ep->ep.name, req->td);
fae3c158
RRD		 1176 ep->in_fifo_validate = likely(req->req.zero ||
1177 (req->req.length % ep->ep.maxpacket) != 0);
1da177e4 1178 if (ep->in_fifo_validate)
3e76fdcb 1179 dmactl |= BIT(DMA_FIFO_VALIDATE);
fae3c158 1180 list_for_each_entry(entry, &ep->queue, queue) {
320f3459 1181 __le32 dmacount;
1da177e4
LT		 1182
1183 if (entry == req)
1184 continue;
1185 dmacount = entry->td->dmacount;
1186 if (!done) {
fae3c158
RRD		 1187 reqmode = likely(entry->req.zero ||
1188 (entry->req.length % ep->ep.maxpacket));
1da177e4
LT		 1189 if (reqmode == ep->in_fifo_validate) {
1190 entry->valid = 1;
1191 dmacount |= valid_bit;
1192 entry->td->dmacount = dmacount;
1193 prev = entry;
1194 continue;
1195 } else {
1196 /* force a hiccup */
1197 prev->td->dmacount |= dma_done_ie;
1198 done = 1;
1199 }
1200 }
1201
1202 /* walk the rest of the queue so unlinks behave */
1203 entry->valid = 0;
1204 dmacount &= ~valid_bit;
1205 entry->td->dmacount = dmacount;
1206 prev = entry;
1207 }
1208 }
1209
fae3c158
RRD		 1210 writel(0, &ep->dma->dmactl);
1211 start_queue(ep, dmactl, req->td_dma);
1da177e4
LT		 1212}
1213
adc82f77 1214static void abort_dma_228x(struct net2280_ep *ep)
1da177e4
LT		 1215{
1216 /* abort the current transfer */
fae3c158 1217 if (likely(!list_empty(&ep->queue))) {
1da177e4 1218 /* FIXME work around errata 0121, 0122, 0124 */
3e76fdcb 1219 writel(BIT(DMA_ABORT), &ep->dma->dmastat);
fae3c158 1220 spin_stop_dma(ep->dma);
1da177e4 1221 } else
fae3c158
RRD		 1222 stop_dma(ep->dma);
1223 scan_dma_completions(ep);
1da177e4
LT		 1224}
1225
adc82f77
RRD		 1226static void abort_dma_338x(struct net2280_ep *ep)
1227{
3e76fdcb 1228 writel(BIT(DMA_ABORT), &ep->dma->dmastat);
adc82f77
RRD		 1229 spin_stop_dma(ep->dma);
1230}
1231
1232static void abort_dma(struct net2280_ep *ep)
1233{
c2db8a8a 1234 if (ep->dev->pdev->vendor == PCI_VENDOR_ID_PLX_LEGACY)
adc82f77
RRD		 1235 return abort_dma_228x(ep);
1236 return abort_dma_338x(ep);
1237}
1238
1da177e4 1239/* dequeue ALL requests */
fae3c158 1240static void nuke(struct net2280_ep *ep)
1da177e4
LT		 1241{
1242 struct net2280_request *req;
1243
1244 /* called with spinlock held */
1245 ep->stopped = 1;
1246 if (ep->dma)
fae3c158
RRD		 1247 abort_dma(ep);
1248 while (!list_empty(&ep->queue)) {
1249 req = list_entry(ep->queue.next,
1da177e4
LT		 1250 struct net2280_request,
1251 queue);
fae3c158 1252 done(ep, req, -ESHUTDOWN);
1da177e4
LT		 1253 }
1254}
1255
1256/* dequeue JUST ONE request */
fae3c158 1257static int net2280_dequeue(struct usb_ep *_ep, struct usb_request *_req)
1da177e4
LT		 1258{
1259 struct net2280_ep *ep;
1260 struct net2280_request *req;
1261 unsigned long flags;
1262 u32 dmactl;
1263 int stopped;
1264
fae3c158 1265 ep = container_of(_ep, struct net2280_ep, ep);
1da177e4
LT		 1266 if (!_ep || (!ep->desc && ep->num != 0) || !_req)
1267 return -EINVAL;
1268
fae3c158 1269 spin_lock_irqsave(&ep->dev->lock, flags);
1da177e4
LT		 1270 stopped = ep->stopped;
1271
1272 /* quiesce dma while we patch the queue */
1273 dmactl = 0;
1274 ep->stopped = 1;
1275 if (ep->dma) {
fae3c158 1276 dmactl = readl(&ep->dma->dmactl);
1da177e4 1277 /* WARNING erratum 0127 may kick in ... */
fae3c158
RRD		 1278 stop_dma(ep->dma);
1279 scan_dma_completions(ep);
1da177e4
LT		 1280 }
1281
1282 /* make sure it's still queued on this endpoint */
fae3c158 1283 list_for_each_entry(req, &ep->queue, queue) {
1da177e4
LT		 1284 if (&req->req == _req)
1285 break;
1286 }
1287 if (&req->req != _req) {
fae3c158 1288 spin_unlock_irqrestore(&ep->dev->lock, flags);
1da177e4
LT		 1289 return -EINVAL;
1290 }
1291
1292 /* queue head may be partially complete. */
1293 if (ep->queue.next == &req->queue) {
1294 if (ep->dma) {
e56e69cc 1295 ep_dbg(ep->dev, "unlink (%s) dma\n", _ep->name);
1da177e4 1296 _req->status = -ECONNRESET;
fae3c158
RRD		 1297 abort_dma(ep);
1298 if (likely(ep->queue.next == &req->queue)) {
1299 /* NOTE: misreports single-transfer mode*/
1da177e4 1300 req->td->dmacount = 0; /* invalidate */
fae3c158
RRD		 1301 dma_done(ep, req,
1302 readl(&ep->dma->dmacount),
1da177e4
LT		 1303 -ECONNRESET);
1304 }
1305 } else {
e56e69cc 1306 ep_dbg(ep->dev, "unlink (%s) pio\n", _ep->name);
fae3c158 1307 done(ep, req, -ECONNRESET);
1da177e4
LT		 1308 }
1309 req = NULL;
1310
1311 /* patch up hardware chaining data */
1312 } else if (ep->dma && use_dma_chaining) {
1313 if (req->queue.prev == ep->queue.next) {
fae3c158 1314 writel(le32_to_cpu(req->td->dmadesc),
1da177e4
LT		 1315 &ep->dma->dmadesc);
1316 if (req->td->dmacount & dma_done_ie)
ae8e530a
RRD		 1317 writel(readl(&ep->dma->dmacount) |
1318 le32_to_cpu(dma_done_ie),
1da177e4
LT		 1319 &ep->dma->dmacount);
1320 } else {
1321 struct net2280_request *prev;
1322
fae3c158 1323 prev = list_entry(req->queue.prev,
1da177e4
LT		 1324 struct net2280_request, queue);
1325 prev->td->dmadesc = req->td->dmadesc;
1326 if (req->td->dmacount & dma_done_ie)
1327 prev->td->dmacount |= dma_done_ie;
1328 }
1329 }
1330
1331 if (req)
fae3c158 1332 done(ep, req, -ECONNRESET);
1da177e4
LT		 1333 ep->stopped = stopped;
1334
1335 if (ep->dma) {
1336 /* turn off dma on inactive queues */
fae3c158
RRD		 1337 if (list_empty(&ep->queue))
1338 stop_dma(ep->dma);
1da177e4
LT		 1339 else if (!ep->stopped) {
1340 /* resume current request, or start new one */
1341 if (req)
fae3c158 1342 writel(dmactl, &ep->dma->dmactl);
1da177e4 1343 else
fae3c158 1344 start_dma(ep, list_entry(ep->queue.next,
1da177e4
LT		 1345 struct net2280_request, queue));
1346 }
1347 }
1348
fae3c158 1349 spin_unlock_irqrestore(&ep->dev->lock, flags);
1da177e4
LT		 1350 return 0;
1351}
1352
1353/*-------------------------------------------------------------------------*/
1354
fae3c158 1355static int net2280_fifo_status(struct usb_ep *_ep);
1da177e4
LT		 1356
1357static int
8066134f 1358net2280_set_halt_and_wedge(struct usb_ep *_ep, int value, int wedged)
1da177e4
LT		 1359{
1360 struct net2280_ep *ep;
1361 unsigned long flags;
1362 int retval = 0;
1363
fae3c158 1364 ep = container_of(_ep, struct net2280_ep, ep);
1da177e4
LT		 1365 if (!_ep || (!ep->desc && ep->num != 0))
1366 return -EINVAL;
1367 if (!ep->dev->driver || ep->dev->gadget.speed == USB_SPEED_UNKNOWN)
1368 return -ESHUTDOWN;
1369 if (ep->desc /* not ep0 */ && (ep->desc->bmAttributes & 0x03)
1370 == USB_ENDPOINT_XFER_ISOC)
1371 return -EINVAL;
1372
fae3c158
RRD		 1373 spin_lock_irqsave(&ep->dev->lock, flags);
1374 if (!list_empty(&ep->queue))
1da177e4 1375 retval = -EAGAIN;
fae3c158 1376 else if (ep->is_in && value && net2280_fifo_status(_ep) != 0)
1da177e4
LT		 1377 retval = -EAGAIN;
1378 else {
e56e69cc 1379 ep_vdbg(ep->dev, "%s %s %s\n", _ep->name,
8066134f
AS		 1380 value ? "set" : "clear",
1381 wedged ? "wedge" : "halt");
1da177e4
LT		 1382 /* set/clear, then synch memory views with the device */
1383 if (value) {
1384 if (ep->num == 0)
1385 ep->dev->protocol_stall = 1;
1386 else
fae3c158 1387 set_halt(ep);
8066134f
AS		 1388 if (wedged)
1389 ep->wedged = 1;
1390 } else {
fae3c158 1391 clear_halt(ep);
c2db8a8a 1392 if (ep->dev->pdev->vendor == PCI_VENDOR_ID_PLX &&
adc82f77
RRD		 1393 !list_empty(&ep->queue) && ep->td_dma)
1394 restart_dma(ep);
8066134f
AS		 1395 ep->wedged = 0;
1396 }
fae3c158 1397 (void) readl(&ep->regs->ep_rsp);
1da177e4 1398 }
fae3c158 1399 spin_unlock_irqrestore(&ep->dev->lock, flags);
1da177e4
LT		 1400
1401 return retval;
1402}
1403
fae3c158 1404static int net2280_set_halt(struct usb_ep *_ep, int value)
8066134f
AS		 1405{
1406 return net2280_set_halt_and_wedge(_ep, value, 0);
1407}
1408
fae3c158 1409static int net2280_set_wedge(struct usb_ep *_ep)
8066134f
AS		 1410{
1411 if (!_ep || _ep->name == ep0name)
1412 return -EINVAL;
1413 return net2280_set_halt_and_wedge(_ep, 1, 1);
1414}
1415
fae3c158 1416static int net2280_fifo_status(struct usb_ep *_ep)
1da177e4
LT		 1417{
1418 struct net2280_ep *ep;
1419 u32 avail;
1420
fae3c158 1421 ep = container_of(_ep, struct net2280_ep, ep);
1da177e4
LT		 1422 if (!_ep || (!ep->desc && ep->num != 0))
1423 return -ENODEV;
1424 if (!ep->dev->driver || ep->dev->gadget.speed == USB_SPEED_UNKNOWN)
1425 return -ESHUTDOWN;
1426
3e76fdcb 1427 avail = readl(&ep->regs->ep_avail) & (BIT(12) - 1);
1da177e4
LT		 1428 if (avail > ep->fifo_size)
1429 return -EOVERFLOW;
1430 if (ep->is_in)
1431 avail = ep->fifo_size - avail;
1432 return avail;
1433}
1434
fae3c158 1435static void net2280_fifo_flush(struct usb_ep *_ep)
1da177e4
LT		 1436{
1437 struct net2280_ep *ep;
1438
fae3c158 1439 ep = container_of(_ep, struct net2280_ep, ep);
1da177e4
LT		 1440 if (!_ep || (!ep->desc && ep->num != 0))
1441 return;
1442 if (!ep->dev->driver || ep->dev->gadget.speed == USB_SPEED_UNKNOWN)
1443 return;
1444
3e76fdcb 1445 writel(BIT(FIFO_FLUSH), &ep->regs->ep_stat);
fae3c158 1446 (void) readl(&ep->regs->ep_rsp);
1da177e4
LT		 1447}
1448
901b3d75 1449static const struct usb_ep_ops net2280_ep_ops = {
1da177e4
LT		 1450 .enable = net2280_enable,
1451 .disable = net2280_disable,
1452
1453 .alloc_request = net2280_alloc_request,
1454 .free_request = net2280_free_request,
1455
1da177e4
LT		 1456 .queue = net2280_queue,
1457 .dequeue = net2280_dequeue,
1458
1459 .set_halt = net2280_set_halt,
8066134f 1460 .set_wedge = net2280_set_wedge,
1da177e4
LT		 1461 .fifo_status = net2280_fifo_status,
1462 .fifo_flush = net2280_fifo_flush,
1463};
1464
1465/*-------------------------------------------------------------------------*/
1466
fae3c158 1467static int net2280_get_frame(struct usb_gadget *_gadget)
1da177e4
LT		 1468{
1469 struct net2280 *dev;
1470 unsigned long flags;
1471 u16 retval;
1472
1473 if (!_gadget)
1474 return -ENODEV;
fae3c158
RRD		 1475 dev = container_of(_gadget, struct net2280, gadget);
1476 spin_lock_irqsave(&dev->lock, flags);
1477 retval = get_idx_reg(dev->regs, REG_FRAME) & 0x03ff;
1478 spin_unlock_irqrestore(&dev->lock, flags);
1da177e4
LT		 1479 return retval;
1480}
1481
fae3c158 1482static int net2280_wakeup(struct usb_gadget *_gadget)
1da177e4
LT		 1483{
1484 struct net2280 *dev;
1485 u32 tmp;
1486 unsigned long flags;
1487
1488 if (!_gadget)
1489 return 0;
fae3c158 1490 dev = container_of(_gadget, struct net2280, gadget);
1da177e4 1491
fae3c158
RRD		 1492 spin_lock_irqsave(&dev->lock, flags);
1493 tmp = readl(&dev->usb->usbctl);
3e76fdcb
RRD		 1494 if (tmp & BIT(DEVICE_REMOTE_WAKEUP_ENABLE))
1495 writel(BIT(GENERATE_RESUME), &dev->usb->usbstat);
fae3c158 1496 spin_unlock_irqrestore(&dev->lock, flags);
1da177e4
LT		 1497
1498 /* pci writes may still be posted */
1499 return 0;
1500}
1501
fae3c158 1502static int net2280_set_selfpowered(struct usb_gadget *_gadget, int value)
1da177e4
LT		 1503{
1504 struct net2280 *dev;
1505 u32 tmp;
1506 unsigned long flags;
1507
1508 if (!_gadget)
1509 return 0;
fae3c158 1510 dev = container_of(_gadget, struct net2280, gadget);
1da177e4 1511
fae3c158
RRD		 1512 spin_lock_irqsave(&dev->lock, flags);
1513 tmp = readl(&dev->usb->usbctl);
adc82f77 1514 if (value) {
3e76fdcb 1515 tmp |= BIT(SELF_POWERED_STATUS);
adc82f77
RRD		 1516 dev->selfpowered = 1;
1517 } else {
3e76fdcb 1518 tmp &= ~BIT(SELF_POWERED_STATUS);
adc82f77
RRD		 1519 dev->selfpowered = 0;
1520 }
fae3c158
RRD		 1521 writel(tmp, &dev->usb->usbctl);
1522 spin_unlock_irqrestore(&dev->lock, flags);
1da177e4
LT		 1523
1524 return 0;
1525}
1526
1527static int net2280_pullup(struct usb_gadget *_gadget, int is_on)
1528{
1529 struct net2280 *dev;
1530 u32 tmp;
1531 unsigned long flags;
1532
1533 if (!_gadget)
1534 return -ENODEV;
fae3c158 1535 dev = container_of(_gadget, struct net2280, gadget);
1da177e4 1536
fae3c158
RRD		 1537 spin_lock_irqsave(&dev->lock, flags);
1538 tmp = readl(&dev->usb->usbctl);
1da177e4
LT		 1539 dev->softconnect = (is_on != 0);
1540 if (is_on)
3e76fdcb 1541 tmp |= BIT(USB_DETECT_ENABLE);
1da177e4 1542 else
3e76fdcb 1543 tmp &= ~BIT(USB_DETECT_ENABLE);
fae3c158
RRD		 1544 writel(tmp, &dev->usb->usbctl);
1545 spin_unlock_irqrestore(&dev->lock, flags);
1da177e4
LT		 1546
1547 return 0;
1548}
1549
4cf5e00b
FB		 1550static int net2280_start(struct usb_gadget *_gadget,
1551 struct usb_gadget_driver *driver);
1552static int net2280_stop(struct usb_gadget *_gadget,
1553 struct usb_gadget_driver *driver);
0f91349b 1554
1da177e4
LT		 1555static const struct usb_gadget_ops net2280_ops = {
1556 .get_frame = net2280_get_frame,
1557 .wakeup = net2280_wakeup,
1558 .set_selfpowered = net2280_set_selfpowered,
1559 .pullup = net2280_pullup,
4cf5e00b
FB		 1560 .udc_start = net2280_start,
1561 .udc_stop = net2280_stop,
1da177e4
LT		 1562};
1563
1564/*-------------------------------------------------------------------------*/
1565
e56e69cc 1566#ifdef CONFIG_USB_GADGET_PDEBUG_FILES
1da177e4
LT		 1567
1568/* FIXME move these into procfs, and use seq_file.
1569 * Sysfs _still_ doesn't behave for arbitrarily sized files,
1570 * and also doesn't help products using this with 2.4 kernels.
1571 */
1572
1573/* "function" sysfs attribute */
ce26bd23
GKH		 1574static ssize_t function_show(struct device *_dev, struct device_attribute *attr,
1575 char *buf)
1da177e4 1576{
fae3c158 1577 struct net2280 *dev = dev_get_drvdata(_dev);
1da177e4 1578
fae3c158
RRD		 1579 if (!dev->driver || !dev->driver->function ||
1580 strlen(dev->driver->function) > PAGE_SIZE)
1da177e4 1581 return 0;
fae3c158 1582 return scnprintf(buf, PAGE_SIZE, "%s\n", dev->driver->function);
1da177e4 1583}
ce26bd23 1584static DEVICE_ATTR_RO(function);
1da177e4 1585
ce26bd23
GKH		 1586static ssize_t registers_show(struct device *_dev,
1587 struct device_attribute *attr, char *buf)
1da177e4
LT		 1588{
1589 struct net2280 *dev;
1590 char *next;
1591 unsigned size, t;
1592 unsigned long flags;
1593 int i;
1594 u32 t1, t2;
30e69598 1595 const char *s;
1da177e4 1596
fae3c158 1597 dev = dev_get_drvdata(_dev);
1da177e4
LT		 1598 next = buf;
1599 size = PAGE_SIZE;
fae3c158 1600 spin_lock_irqsave(&dev->lock, flags);
1da177e4
LT		 1601
1602 if (dev->driver)
1603 s = dev->driver->driver.name;
1604 else
1605 s = "(none)";
1606
1607 /* Main Control Registers */
fae3c158 1608 t = scnprintf(next, size, "%s version " DRIVER_VERSION
1da177e4
LT		 1609 ", chiprev %04x, dma %s\n\n"
1610 "devinit %03x fifoctl %08x gadget '%s'\n"
1611 "pci irqenb0 %02x irqenb1 %08x "
1612 "irqstat0 %04x irqstat1 %08x\n",
1613 driver_name, dev->chiprev,
1614 use_dma
1615 ? (use_dma_chaining ? "chaining" : "enabled")
1616 : "disabled",
fae3c158
RRD		 1617 readl(&dev->regs->devinit),
1618 readl(&dev->regs->fifoctl),
1da177e4 1619 s,
fae3c158
RRD		 1620 readl(&dev->regs->pciirqenb0),
1621 readl(&dev->regs->pciirqenb1),
1622 readl(&dev->regs->irqstat0),
1623 readl(&dev->regs->irqstat1));
1da177e4
LT		 1624 size -= t;
1625 next += t;
1626
1627 /* USB Control Registers */
fae3c158
RRD		 1628 t1 = readl(&dev->usb->usbctl);
1629 t2 = readl(&dev->usb->usbstat);
3e76fdcb
RRD		 1630 if (t1 & BIT(VBUS_PIN)) {
1631 if (t2 & BIT(HIGH_SPEED))
1da177e4
LT		 1632 s = "high speed";
1633 else if (dev->gadget.speed == USB_SPEED_UNKNOWN)
1634 s = "powered";
1635 else
1636 s = "full speed";
1637 /* full speed bit (6) not working?? */
1638 } else
1639 s = "not attached";
fae3c158 1640 t = scnprintf(next, size,
1da177e4
LT		 1641 "stdrsp %08x usbctl %08x usbstat %08x "
1642 "addr 0x%02x (%s)\n",
fae3c158
RRD		 1643 readl(&dev->usb->stdrsp), t1, t2,
1644 readl(&dev->usb->ouraddr), s);
1da177e4
LT		 1645 size -= t;
1646 next += t;
1647
1648 /* PCI Master Control Registers */
1649
1650 /* DMA Control Registers */
1651
1652 /* Configurable EP Control Registers */
adc82f77 1653 for (i = 0; i < dev->n_ep; i++) {
1da177e4
LT		 1654 struct net2280_ep *ep;
1655
fae3c158 1656 ep = &dev->ep[i];
1da177e4
LT		 1657 if (i && !ep->desc)
1658 continue;
1659
adc82f77 1660 t1 = readl(&ep->cfg->ep_cfg);
fae3c158
RRD		 1661 t2 = readl(&ep->regs->ep_rsp) & 0xff;
1662 t = scnprintf(next, size,
1da177e4
LT		 1663 "\n%s\tcfg %05x rsp (%02x) %s%s%s%s%s%s%s%s"
1664 "irqenb %02x\n",
1665 ep->ep.name, t1, t2,
3e76fdcb 1666 (t2 & BIT(CLEAR_NAK_OUT_PACKETS))
1da177e4 1667 ? "NAK " : "",
3e76fdcb 1668 (t2 & BIT(CLEAR_EP_HIDE_STATUS_PHASE))
1da177e4 1669 ? "hide " : "",
3e76fdcb 1670 (t2 & BIT(CLEAR_EP_FORCE_CRC_ERROR))
1da177e4 1671 ? "CRC " : "",
3e76fdcb 1672 (t2 & BIT(CLEAR_INTERRUPT_MODE))
1da177e4 1673 ? "interrupt " : "",
3e76fdcb 1674 (t2 & BIT(CLEAR_CONTROL_STATUS_PHASE_HANDSHAKE))
1da177e4 1675 ? "status " : "",
3e76fdcb 1676 (t2 & BIT(CLEAR_NAK_OUT_PACKETS_MODE))
1da177e4 1677 ? "NAKmode " : "",
3e76fdcb 1678 (t2 & BIT(CLEAR_ENDPOINT_TOGGLE))
1da177e4 1679 ? "DATA1 " : "DATA0 ",
3e76fdcb 1680 (t2 & BIT(CLEAR_ENDPOINT_HALT))
1da177e4 1681 ? "HALT " : "",
fae3c158 1682 readl(&ep->regs->ep_irqenb));
1da177e4
LT		 1683 size -= t;
1684 next += t;
1685
fae3c158 1686 t = scnprintf(next, size,
1da177e4
LT		 1687 "\tstat %08x avail %04x "
1688 "(ep%d%s-%s)%s\n",
fae3c158
RRD		 1689 readl(&ep->regs->ep_stat),
1690 readl(&ep->regs->ep_avail),
1691 t1 & 0x0f, DIR_STRING(t1),
1692 type_string(t1 >> 8),
1da177e4
LT		 1693 ep->stopped ? "*" : "");
1694 size -= t;
1695 next += t;
1696
1697 if (!ep->dma)
1698 continue;
1699
fae3c158 1700 t = scnprintf(next, size,
1da177e4
LT		 1701 " dma\tctl %08x stat %08x count %08x\n"
1702 "\taddr %08x desc %08x\n",
fae3c158
RRD		 1703 readl(&ep->dma->dmactl),
1704 readl(&ep->dma->dmastat),
1705 readl(&ep->dma->dmacount),
1706 readl(&ep->dma->dmaaddr),
1707 readl(&ep->dma->dmadesc));
1da177e4
LT		 1708 size -= t;
1709 next += t;
1710
1711 }
1712
fae3c158 1713 /* Indexed Registers (none yet) */
1da177e4
LT		 1714
1715 /* Statistics */
fae3c158 1716 t = scnprintf(next, size, "\nirqs: ");
1da177e4
LT		 1717 size -= t;
1718 next += t;
adc82f77 1719 for (i = 0; i < dev->n_ep; i++) {
1da177e4
LT		 1720 struct net2280_ep *ep;
1721
fae3c158 1722 ep = &dev->ep[i];
1da177e4
LT		 1723 if (i && !ep->irqs)
1724 continue;
fae3c158 1725 t = scnprintf(next, size, " %s/%lu", ep->ep.name, ep->irqs);
1da177e4
LT		 1726 size -= t;
1727 next += t;
1728
1729 }
fae3c158 1730 t = scnprintf(next, size, "\n");
1da177e4
LT		 1731 size -= t;
1732 next += t;
1733
fae3c158 1734 spin_unlock_irqrestore(&dev->lock, flags);
1da177e4
LT		 1735
1736 return PAGE_SIZE - size;
1737}
ce26bd23 1738static DEVICE_ATTR_RO(registers);
1da177e4 1739
ce26bd23
GKH		 1740static ssize_t queues_show(struct device *_dev, struct device_attribute *attr,
1741 char *buf)
1da177e4
LT		 1742{
1743 struct net2280 *dev;
1744 char *next;
1745 unsigned size;
1746 unsigned long flags;
1747 int i;
1748
fae3c158 1749 dev = dev_get_drvdata(_dev);
1da177e4
LT		 1750 next = buf;
1751 size = PAGE_SIZE;
fae3c158 1752 spin_lock_irqsave(&dev->lock, flags);
1da177e4 1753
adc82f77 1754 for (i = 0; i < dev->n_ep; i++) {
fae3c158 1755 struct net2280_ep *ep = &dev->ep[i];
1da177e4
LT		 1756 struct net2280_request *req;
1757 int t;
1758
1759 if (i != 0) {
1760 const struct usb_endpoint_descriptor *d;
1761
1762 d = ep->desc;
1763 if (!d)
1764 continue;
1765 t = d->bEndpointAddress;
fae3c158 1766 t = scnprintf(next, size,
1da177e4
LT		 1767 "\n%s (ep%d%s-%s) max %04x %s fifo %d\n",
1768 ep->ep.name, t & USB_ENDPOINT_NUMBER_MASK,
1769 (t & USB_DIR_IN) ? "in" : "out",
a27f37a1 1770 type_string(d->bmAttributes),
fae3c158 1771 usb_endpoint_maxp(d) & 0x1fff,
1da177e4
LT		 1772 ep->dma ? "dma" : "pio", ep->fifo_size
1773 );
1774 } else /* ep0 should only have one transfer queued */
fae3c158 1775 t = scnprintf(next, size, "ep0 max 64 pio %s\n",
1da177e4
LT		 1776 ep->is_in ? "in" : "out");
1777 if (t <= 0 || t > size)
1778 goto done;
1779 size -= t;
1780 next += t;
1781
fae3c158
RRD		 1782 if (list_empty(&ep->queue)) {
1783 t = scnprintf(next, size, "\t(nothing queued)\n");
1da177e4
LT		 1784 if (t <= 0 || t > size)
1785 goto done;
1786 size -= t;
1787 next += t;
1788 continue;
1789 }
fae3c158
RRD		 1790 list_for_each_entry(req, &ep->queue, queue) {
1791 if (ep->dma && req->td_dma == readl(&ep->dma->dmadesc))
1792 t = scnprintf(next, size,
1da177e4
LT		 1793 "\treq %p len %d/%d "
1794 "buf %p (dmacount %08x)\n",
1795 &req->req, req->req.actual,
1796 req->req.length, req->req.buf,
fae3c158 1797 readl(&ep->dma->dmacount));
1da177e4 1798 else
fae3c158 1799 t = scnprintf(next, size,
1da177e4
LT		 1800 "\treq %p len %d/%d buf %p\n",
1801 &req->req, req->req.actual,
1802 req->req.length, req->req.buf);
1803 if (t <= 0 || t > size)
1804 goto done;
1805 size -= t;
1806 next += t;
1807
1808 if (ep->dma) {
1809 struct net2280_dma *td;
1810
1811 td = req->td;
fae3c158 1812 t = scnprintf(next, size, "\t td %08x "
1da177e4
LT		 1813 " count %08x buf %08x desc %08x\n",
1814 (u32) req->td_dma,
fae3c158
RRD		 1815 le32_to_cpu(td->dmacount),
1816 le32_to_cpu(td->dmaaddr),
1817 le32_to_cpu(td->dmadesc));
1da177e4
LT		 1818 if (t <= 0 || t > size)
1819 goto done;
1820 size -= t;
1821 next += t;
1822 }
1823 }
1824 }
1825
1826done:
fae3c158 1827 spin_unlock_irqrestore(&dev->lock, flags);
1da177e4
LT		 1828 return PAGE_SIZE - size;
1829}
ce26bd23 1830static DEVICE_ATTR_RO(queues);
1da177e4
LT		 1831
1832
1833#else
1834
fae3c158
RRD		 1835#define device_create_file(a, b) (0)
1836#define device_remove_file(a, b) do { } while (0)
1da177e4
LT		 1837
1838#endif
1839
1840/*-------------------------------------------------------------------------*/
1841
1842/* another driver-specific mode might be a request type doing dma
1843 * to/from another device fifo instead of to/from memory.
1844 */
1845
fae3c158 1846static void set_fifo_mode(struct net2280 *dev, int mode)
1da177e4
LT		 1847{
1848 /* keeping high bits preserves BAR2 */
fae3c158 1849 writel((0xffff << PCI_BASE2_RANGE) | mode, &dev->regs->fifoctl);
1da177e4
LT		 1850
1851 /* always ep-{a,b,e,f} ... maybe not ep-c or ep-d */
fae3c158
RRD		 1852 INIT_LIST_HEAD(&dev->gadget.ep_list);
1853 list_add_tail(&dev->ep[1].ep.ep_list, &dev->gadget.ep_list);
1854 list_add_tail(&dev->ep[2].ep.ep_list, &dev->gadget.ep_list);
1da177e4
LT		 1855 switch (mode) {
1856 case 0:
fae3c158
RRD		 1857 list_add_tail(&dev->ep[3].ep.ep_list, &dev->gadget.ep_list);
1858 list_add_tail(&dev->ep[4].ep.ep_list, &dev->gadget.ep_list);
1859 dev->ep[1].fifo_size = dev->ep[2].fifo_size = 1024;
1da177e4
LT		 1860 break;
1861 case 1:
fae3c158 1862 dev->ep[1].fifo_size = dev->ep[2].fifo_size = 2048;
1da177e4
LT		 1863 break;
1864 case 2:
fae3c158
RRD		 1865 list_add_tail(&dev->ep[3].ep.ep_list, &dev->gadget.ep_list);
1866 dev->ep[1].fifo_size = 2048;
1867 dev->ep[2].fifo_size = 1024;
1da177e4
LT		 1868 break;
1869 }
1870 /* fifo sizes for ep0, ep-c, ep-d, ep-e, and ep-f never change */
fae3c158
RRD		 1871 list_add_tail(&dev->ep[5].ep.ep_list, &dev->gadget.ep_list);
1872 list_add_tail(&dev->ep[6].ep.ep_list, &dev->gadget.ep_list);
1da177e4
LT		 1873}
1874
adc82f77
RRD		 1875static void defect7374_disable_data_eps(struct net2280 *dev)
1876{
1877 /*
1878 * For Defect 7374, disable data EPs (and more):
1879 * - This phase undoes the earlier phase of the Defect 7374 workaround,
1880 * returing ep regs back to normal.
1881 */
1882 struct net2280_ep *ep;
1883 int i;
1884 unsigned char ep_sel;
1885 u32 tmp_reg;
1886
1887 for (i = 1; i < 5; i++) {
1888 ep = &dev->ep[i];
1889 writel(0, &ep->cfg->ep_cfg);
1890 }
1891
1892 /* CSROUT, CSRIN, PCIOUT, PCIIN, STATIN, RCIN */
1893 for (i = 0; i < 6; i++)
1894 writel(0, &dev->dep[i].dep_cfg);
1895
1896 for (ep_sel = 0; ep_sel <= 21; ep_sel++) {
1897 /* Select an endpoint for subsequent operations: */
1898 tmp_reg = readl(&dev->plregs->pl_ep_ctrl);
1899 writel(((tmp_reg & ~0x1f) | ep_sel), &dev->plregs->pl_ep_ctrl);
1900
1901 if (ep_sel < 2 || (ep_sel > 9 && ep_sel < 14) ||
1902 ep_sel == 18 || ep_sel == 20)
1903 continue;
1904
1905 /* Change settings on some selected endpoints */
1906 tmp_reg = readl(&dev->plregs->pl_ep_cfg_4);
3e76fdcb 1907 tmp_reg &= ~BIT(NON_CTRL_IN_TOLERATE_BAD_DIR);
adc82f77
RRD		 1908 writel(tmp_reg, &dev->plregs->pl_ep_cfg_4);
1909 tmp_reg = readl(&dev->plregs->pl_ep_ctrl);
3e76fdcb 1910 tmp_reg |= BIT(EP_INITIALIZED);
adc82f77
RRD		 1911 writel(tmp_reg, &dev->plregs->pl_ep_ctrl);
1912 }
1913}
1914
1915static void defect7374_enable_data_eps_zero(struct net2280 *dev)
1916{
1917 u32 tmp = 0, tmp_reg;
1918 u32 fsmvalue, scratch;
1919 int i;
1920 unsigned char ep_sel;
1921
1922 scratch = get_idx_reg(dev->regs, SCRATCH);
1923 fsmvalue = scratch & (0xf << DEFECT7374_FSM_FIELD);
1924 scratch &= ~(0xf << DEFECT7374_FSM_FIELD);
1925
1926 /*See if firmware needs to set up for workaround*/
1927 if (fsmvalue != DEFECT7374_FSM_SS_CONTROL_READ) {
e56e69cc
RRD		 1928 ep_warn(dev, "Operate Defect 7374 workaround soft this time");
1929 ep_warn(dev, "It will operate on cold-reboot and SS connect");
adc82f77
RRD		 1930
1931 /*GPEPs:*/
3e76fdcb 1932 tmp = ((0 << ENDPOINT_NUMBER) | BIT(ENDPOINT_DIRECTION) |
adc82f77
RRD		 1933 (2 << OUT_ENDPOINT_TYPE) | (2 << IN_ENDPOINT_TYPE) |
1934 ((dev->enhanced_mode) ?
3e76fdcb
RRD		 1935 BIT(OUT_ENDPOINT_ENABLE) : BIT(ENDPOINT_ENABLE)) |
1936 BIT(IN_ENDPOINT_ENABLE));
adc82f77
RRD		 1937
1938 for (i = 1; i < 5; i++)
1939 writel(tmp, &dev->ep[i].cfg->ep_cfg);
1940
1941 /* CSRIN, PCIIN, STATIN, RCIN*/
3e76fdcb 1942 tmp = ((0 << ENDPOINT_NUMBER) | BIT(ENDPOINT_ENABLE));
adc82f77
RRD		 1943 writel(tmp, &dev->dep[1].dep_cfg);
1944 writel(tmp, &dev->dep[3].dep_cfg);
1945 writel(tmp, &dev->dep[4].dep_cfg);
1946 writel(tmp, &dev->dep[5].dep_cfg);
1947
1948 /*Implemented for development and debug.
1949 * Can be refined/tuned later.*/
1950 for (ep_sel = 0; ep_sel <= 21; ep_sel++) {
1951 /* Select an endpoint for subsequent operations: */
1952 tmp_reg = readl(&dev->plregs->pl_ep_ctrl);
1953 writel(((tmp_reg & ~0x1f) | ep_sel),
1954 &dev->plregs->pl_ep_ctrl);
1955
1956 if (ep_sel == 1) {
1957 tmp =
1958 (readl(&dev->plregs->pl_ep_ctrl) |
3e76fdcb 1959 BIT(CLEAR_ACK_ERROR_CODE) | 0);
adc82f77
RRD		 1960 writel(tmp, &dev->plregs->pl_ep_ctrl);
1961 continue;
1962 }
1963
1964 if (ep_sel == 0 || (ep_sel > 9 && ep_sel < 14) ||
1965 ep_sel == 18 || ep_sel == 20)
1966 continue;
1967
1968 tmp = (readl(&dev->plregs->pl_ep_cfg_4) |
3e76fdcb 1969 BIT(NON_CTRL_IN_TOLERATE_BAD_DIR) | 0);
adc82f77
RRD		 1970 writel(tmp, &dev->plregs->pl_ep_cfg_4);
1971
1972 tmp = readl(&dev->plregs->pl_ep_ctrl) &
3e76fdcb 1973 ~BIT(EP_INITIALIZED);
adc82f77
RRD		 1974 writel(tmp, &dev->plregs->pl_ep_ctrl);
1975
1976 }
1977
1978 /* Set FSM to focus on the first Control Read:
1979 * - Tip: Connection speed is known upon the first
1980 * setup request.*/
1981 scratch |= DEFECT7374_FSM_WAITING_FOR_CONTROL_READ;
1982 set_idx_reg(dev->regs, SCRATCH, scratch);
1983
1984 } else{
e56e69cc
RRD		 1985 ep_warn(dev, "Defect 7374 workaround soft will NOT operate");
1986 ep_warn(dev, "It will operate on cold-reboot and SS connect");
adc82f77
RRD		 1987 }
1988}
1989
1da177e4
LT		 1990/* keeping it simple:
1991 * - one bus driver, initted first;
1992 * - one function driver, initted second
1993 *
1994 * most of the work to support multiple net2280 controllers would
1995 * be to associate this gadget driver (yes?) with all of them, or
1996 * perhaps to bind specific drivers to specific devices.
1997 */
1998
adc82f77 1999static void usb_reset_228x(struct net2280 *dev)
1da177e4
LT		 2000{
2001 u32 tmp;
2002
2003 dev->gadget.speed = USB_SPEED_UNKNOWN;
fae3c158 2004 (void) readl(&dev->usb->usbctl);
1da177e4 2005
fae3c158 2006 net2280_led_init(dev);
1da177e4
LT		 2007
2008 /* disable automatic responses, and irqs */
fae3c158
RRD		 2009 writel(0, &dev->usb->stdrsp);
2010 writel(0, &dev->regs->pciirqenb0);
2011 writel(0, &dev->regs->pciirqenb1);
1da177e4
LT		 2012
2013 /* clear old dma and irq state */
2014 for (tmp = 0; tmp < 4; tmp++) {
adc82f77 2015 struct net2280_ep *ep = &dev->ep[tmp + 1];
1da177e4 2016 if (ep->dma)
adc82f77 2017 abort_dma(ep);
1da177e4 2018 }
adc82f77 2019
fae3c158 2020 writel(~0, &dev->regs->irqstat0),
3e76fdcb 2021 writel(~(u32)BIT(SUSPEND_REQUEST_INTERRUPT), &dev->regs->irqstat1),
1da177e4
LT		 2022
2023 /* reset, and enable pci */
3e76fdcb
RRD		 2024 tmp = readl(&dev->regs->devinit) |
2025 BIT(PCI_ENABLE) |
2026 BIT(FIFO_SOFT_RESET) |
2027 BIT(USB_SOFT_RESET) |
2028 BIT(M8051_RESET);
fae3c158 2029 writel(tmp, &dev->regs->devinit);
1da177e4
LT		 2030
2031 /* standard fifo and endpoint allocations */
fae3c158 2032 set_fifo_mode(dev, (fifo_mode <= 2) ? fifo_mode : 0);
1da177e4
LT		 2033}
2034
adc82f77
RRD		 2035static void usb_reset_338x(struct net2280 *dev)
2036{
2037 u32 tmp;
2038 u32 fsmvalue;
2039
2040 dev->gadget.speed = USB_SPEED_UNKNOWN;
2041 (void)readl(&dev->usb->usbctl);
2042
2043 net2280_led_init(dev);
2044
2045 fsmvalue = get_idx_reg(dev->regs, SCRATCH) &
2046 (0xf << DEFECT7374_FSM_FIELD);
2047
2048 /* See if firmware needs to set up for workaround: */
2049 if (fsmvalue != DEFECT7374_FSM_SS_CONTROL_READ) {
e56e69cc 2050 ep_info(dev, "%s: Defect 7374 FsmValue 0x%08x\n", __func__,
adc82f77
RRD		 2051 fsmvalue);
2052 } else {
2053 /* disable automatic responses, and irqs */
2054 writel(0, &dev->usb->stdrsp);
2055 writel(0, &dev->regs->pciirqenb0);
2056 writel(0, &dev->regs->pciirqenb1);
2057 }
2058
2059 /* clear old dma and irq state */
2060 for (tmp = 0; tmp < 4; tmp++) {
2061 struct net2280_ep *ep = &dev->ep[tmp + 1];
2062
2063 if (ep->dma)
2064 abort_dma(ep);
2065 }
2066
2067 writel(~0, &dev->regs->irqstat0), writel(~0, &dev->regs->irqstat1);
2068
2069 if (fsmvalue == DEFECT7374_FSM_SS_CONTROL_READ) {
2070 /* reset, and enable pci */
2071 tmp = readl(&dev->regs->devinit) |
3e76fdcb
RRD		 2072 BIT(PCI_ENABLE) |
2073 BIT(FIFO_SOFT_RESET) |
2074 BIT(USB_SOFT_RESET) |
2075 BIT(M8051_RESET);
adc82f77
RRD		 2076
2077 writel(tmp, &dev->regs->devinit);
2078 }
2079
2080 /* always ep-{1,2,3,4} ... maybe not ep-3 or ep-4 */
2081 INIT_LIST_HEAD(&dev->gadget.ep_list);
2082
2083 for (tmp = 1; tmp < dev->n_ep; tmp++)
2084 list_add_tail(&dev->ep[tmp].ep.ep_list, &dev->gadget.ep_list);
2085
2086}
2087
2088static void usb_reset(struct net2280 *dev)
2089{
c2db8a8a 2090 if (dev->pdev->vendor == PCI_VENDOR_ID_PLX_LEGACY)
adc82f77
RRD		 2091 return usb_reset_228x(dev);
2092 return usb_reset_338x(dev);
2093}
2094
2095static void usb_reinit_228x(struct net2280 *dev)
1da177e4
LT		 2096{
2097 u32 tmp;
2098 int init_dma;
2099
2100 /* use_dma changes are ignored till next device re-init */
2101 init_dma = use_dma;
2102
2103 /* basic endpoint init */
2104 for (tmp = 0; tmp < 7; tmp++) {
fae3c158 2105 struct net2280_ep *ep = &dev->ep[tmp];
1da177e4 2106
fae3c158 2107 ep->ep.name = ep_name[tmp];
1da177e4
LT		 2108 ep->dev = dev;
2109 ep->num = tmp;
2110
2111 if (tmp > 0 && tmp <= 4) {
2112 ep->fifo_size = 1024;
2113 if (init_dma)
fae3c158 2114 ep->dma = &dev->dma[tmp - 1];
1da177e4
LT		 2115 } else
2116 ep->fifo_size = 64;
fae3c158 2117 ep->regs = &dev->epregs[tmp];
adc82f77
RRD		 2118 ep->cfg = &dev->epregs[tmp];
2119 ep_reset_228x(dev->regs, ep);
1da177e4 2120 }
fae3c158
RRD		 2121 usb_ep_set_maxpacket_limit(&dev->ep[0].ep, 64);
2122 usb_ep_set_maxpacket_limit(&dev->ep[5].ep, 64);
2123 usb_ep_set_maxpacket_limit(&dev->ep[6].ep, 64);
1da177e4 2124
fae3c158
RRD		 2125 dev->gadget.ep0 = &dev->ep[0].ep;
2126 dev->ep[0].stopped = 0;
2127 INIT_LIST_HEAD(&dev->gadget.ep0->ep_list);
1da177e4
LT		 2128
2129 /* we want to prevent lowlevel/insecure access from the USB host,
2130 * but erratum 0119 means this enable bit is ignored
2131 */
2132 for (tmp = 0; tmp < 5; tmp++)
fae3c158 2133 writel(EP_DONTUSE, &dev->dep[tmp].dep_cfg);
1da177e4
LT		 2134}
2135
adc82f77
RRD		 2136static void usb_reinit_338x(struct net2280 *dev)
2137{
2138 int init_dma;
2139 int i;
2140 u32 tmp, val;
2141 u32 fsmvalue;
2142 static const u32 ne[9] = { 0, 1, 2, 3, 4, 1, 2, 3, 4 };
2143 static const u32 ep_reg_addr[9] = { 0x00, 0xC0, 0x00, 0xC0, 0x00,
2144 0x00, 0xC0, 0x00, 0xC0 };
2145
2146 /* use_dma changes are ignored till next device re-init */
2147 init_dma = use_dma;
2148
2149 /* basic endpoint init */
2150 for (i = 0; i < dev->n_ep; i++) {
2151 struct net2280_ep *ep = &dev->ep[i];
2152
2153 ep->ep.name = ep_name[i];
2154 ep->dev = dev;
2155 ep->num = i;
2156
2157 if (i > 0 && i <= 4 && init_dma)
2158 ep->dma = &dev->dma[i - 1];
2159
2160 if (dev->enhanced_mode) {
2161 ep->cfg = &dev->epregs[ne[i]];
2162 ep->regs = (struct net2280_ep_regs __iomem *)
2163 (((void *)&dev->epregs[ne[i]]) +
2164 ep_reg_addr[i]);
2165 ep->fiforegs = &dev->fiforegs[i];
2166 } else {
2167 ep->cfg = &dev->epregs[i];
2168 ep->regs = &dev->epregs[i];
2169 ep->fiforegs = &dev->fiforegs[i];
2170 }
2171
2172 ep->fifo_size = (i != 0) ? 2048 : 512;
2173
2174 ep_reset_338x(dev->regs, ep);
2175 }
2176 usb_ep_set_maxpacket_limit(&dev->ep[0].ep, 512);
2177
2178 dev->gadget.ep0 = &dev->ep[0].ep;
2179 dev->ep[0].stopped = 0;
2180
2181 /* Link layer set up */
2182 fsmvalue = get_idx_reg(dev->regs, SCRATCH) &
2183 (0xf << DEFECT7374_FSM_FIELD);
2184
2185 /* See if driver needs to set up for workaround: */
2186 if (fsmvalue != DEFECT7374_FSM_SS_CONTROL_READ)
e56e69cc 2187 ep_info(dev, "%s: Defect 7374 FsmValue %08x\n",
adc82f77
RRD		 2188 __func__, fsmvalue);
2189 else {
2190 tmp = readl(&dev->usb_ext->usbctl2) &
3e76fdcb 2191 ~(BIT(U1_ENABLE) | BIT(U2_ENABLE) | BIT(LTM_ENABLE));
adc82f77
RRD		 2192 writel(tmp, &dev->usb_ext->usbctl2);
2193 }
2194
2195 /* Hardware Defect and Workaround */
2196 val = readl(&dev->ll_lfps_regs->ll_lfps_5);
2197 val &= ~(0xf << TIMER_LFPS_6US);
2198 val |= 0x5 << TIMER_LFPS_6US;
2199 writel(val, &dev->ll_lfps_regs->ll_lfps_5);
2200
2201 val = readl(&dev->ll_lfps_regs->ll_lfps_6);
2202 val &= ~(0xffff << TIMER_LFPS_80US);
2203 val |= 0x0100 << TIMER_LFPS_80US;
2204 writel(val, &dev->ll_lfps_regs->ll_lfps_6);
2205
2206 /*
2207 * AA_AB Errata. Issue 4. Workaround for SuperSpeed USB
2208 * Hot Reset Exit Handshake may Fail in Specific Case using
2209 * Default Register Settings. Workaround for Enumeration test.
2210 */
2211 val = readl(&dev->ll_tsn_regs->ll_tsn_counters_2);
2212 val &= ~(0x1f << HOT_TX_NORESET_TS2);
2213 val |= 0x10 << HOT_TX_NORESET_TS2;
2214 writel(val, &dev->ll_tsn_regs->ll_tsn_counters_2);
2215
2216 val = readl(&dev->ll_tsn_regs->ll_tsn_counters_3);
2217 val &= ~(0x1f << HOT_RX_RESET_TS2);
2218 val |= 0x3 << HOT_RX_RESET_TS2;
2219 writel(val, &dev->ll_tsn_regs->ll_tsn_counters_3);
2220
2221 /*
2222 * Set Recovery Idle to Recover bit:
2223 * - On SS connections, setting Recovery Idle to Recover Fmw improves
2224 * link robustness with various hosts and hubs.
2225 * - It is safe to set for all connection speeds; all chip revisions.
2226 * - R-M-W to leave other bits undisturbed.
2227 * - Reference PLX TT-7372
2228 */
2229 val = readl(&dev->ll_chicken_reg->ll_tsn_chicken_bit);
3e76fdcb 2230 val |= BIT(RECOVERY_IDLE_TO_RECOVER_FMW);
adc82f77
RRD		 2231 writel(val, &dev->ll_chicken_reg->ll_tsn_chicken_bit);
2232
2233 INIT_LIST_HEAD(&dev->gadget.ep0->ep_list);
2234
2235 /* disable dedicated endpoints */
2236 writel(0x0D, &dev->dep[0].dep_cfg);
2237 writel(0x0D, &dev->dep[1].dep_cfg);
2238 writel(0x0E, &dev->dep[2].dep_cfg);
2239 writel(0x0E, &dev->dep[3].dep_cfg);
2240 writel(0x0F, &dev->dep[4].dep_cfg);
2241 writel(0x0C, &dev->dep[5].dep_cfg);
2242}
2243
2244static void usb_reinit(struct net2280 *dev)
2245{
c2db8a8a 2246 if (dev->pdev->vendor == PCI_VENDOR_ID_PLX_LEGACY)
adc82f77
RRD		 2247 return usb_reinit_228x(dev);
2248 return usb_reinit_338x(dev);
2249}
2250
2251static void ep0_start_228x(struct net2280 *dev)
1da177e4 2252{
3e76fdcb
RRD		 2253 writel(BIT(CLEAR_EP_HIDE_STATUS_PHASE) |
2254 BIT(CLEAR_NAK_OUT_PACKETS) |
ae8e530a
RRD		 2255 BIT(CLEAR_CONTROL_STATUS_PHASE_HANDSHAKE),
2256 &dev->epregs[0].ep_rsp);
1da177e4
LT		 2257
2258 /*
2259 * hardware optionally handles a bunch of standard requests
2260 * that the API hides from drivers anyway. have it do so.
2261 * endpoint status/features are handled in software, to
2262 * help pass tests for some dubious behavior.
2263 */
3e76fdcb
RRD		 2264 writel(BIT(SET_TEST_MODE) |
2265 BIT(SET_ADDRESS) |
2266 BIT(DEVICE_SET_CLEAR_DEVICE_REMOTE_WAKEUP) |
2267 BIT(GET_DEVICE_STATUS) |
ae8e530a
RRD		 2268 BIT(GET_INTERFACE_STATUS),
2269 &dev->usb->stdrsp);
3e76fdcb
RRD		 2270 writel(BIT(USB_ROOT_PORT_WAKEUP_ENABLE) |
2271 BIT(SELF_POWERED_USB_DEVICE) |
2272 BIT(REMOTE_WAKEUP_SUPPORT) |
2273 (dev->softconnect << USB_DETECT_ENABLE) |
2274 BIT(SELF_POWERED_STATUS),
2275 &dev->usb->usbctl);
1da177e4
LT		 2276
2277 /* enable irqs so we can see ep0 and general operation */
3e76fdcb
RRD		 2278 writel(BIT(SETUP_PACKET_INTERRUPT_ENABLE) |
2279 BIT(ENDPOINT_0_INTERRUPT_ENABLE),
2280 &dev->regs->pciirqenb0);
2281 writel(BIT(PCI_INTERRUPT_ENABLE) |
2282 BIT(PCI_MASTER_ABORT_RECEIVED_INTERRUPT_ENABLE) |
2283 BIT(PCI_TARGET_ABORT_RECEIVED_INTERRUPT_ENABLE) |
2284 BIT(PCI_RETRY_ABORT_INTERRUPT_ENABLE) |
2285 BIT(VBUS_INTERRUPT_ENABLE) |
2286 BIT(ROOT_PORT_RESET_INTERRUPT_ENABLE) |
2287 BIT(SUSPEND_REQUEST_CHANGE_INTERRUPT_ENABLE),
2288 &dev->regs->pciirqenb1);
1da177e4
LT		 2289
2290 /* don't leave any writes posted */
fae3c158 2291 (void) readl(&dev->usb->usbctl);
1da177e4
LT		 2292}
2293
adc82f77
RRD		 2294static void ep0_start_338x(struct net2280 *dev)
2295{
2296 u32 fsmvalue;
2297
2298 fsmvalue = get_idx_reg(dev->regs, SCRATCH) &
2299 (0xf << DEFECT7374_FSM_FIELD);
2300
2301 if (fsmvalue != DEFECT7374_FSM_SS_CONTROL_READ)
e56e69cc 2302 ep_info(dev, "%s: Defect 7374 FsmValue %08x\n", __func__,
adc82f77
RRD		 2303 fsmvalue);
2304 else
3e76fdcb
RRD		 2305 writel(BIT(CLEAR_NAK_OUT_PACKETS_MODE) |
2306 BIT(SET_EP_HIDE_STATUS_PHASE),
adc82f77
RRD		 2307 &dev->epregs[0].ep_rsp);
2308
2309 /*
2310 * hardware optionally handles a bunch of standard requests
2311 * that the API hides from drivers anyway. have it do so.
2312 * endpoint status/features are handled in software, to
2313 * help pass tests for some dubious behavior.
2314 */
3e76fdcb
RRD		 2315 writel(BIT(SET_ISOCHRONOUS_DELAY) |
2316 BIT(SET_SEL) |
2317 BIT(SET_TEST_MODE) |
2318 BIT(SET_ADDRESS) |
2319 BIT(GET_INTERFACE_STATUS) |
2320 BIT(GET_DEVICE_STATUS),
adc82f77
RRD		 2321 &dev->usb->stdrsp);
2322 dev->wakeup_enable = 1;
3e76fdcb 2323 writel(BIT(USB_ROOT_PORT_WAKEUP_ENABLE) |
adc82f77 2324 (dev->softconnect << USB_DETECT_ENABLE) |
3e76fdcb 2325 BIT(DEVICE_REMOTE_WAKEUP_ENABLE),
adc82f77
RRD		 2326 &dev->usb->usbctl);
2327
2328 /* enable irqs so we can see ep0 and general operation */
3e76fdcb 2329 writel(BIT(SETUP_PACKET_INTERRUPT_ENABLE) |
ae8e530a
RRD		 2330 BIT(ENDPOINT_0_INTERRUPT_ENABLE),
2331 &dev->regs->pciirqenb0);
3e76fdcb
RRD		 2332 writel(BIT(PCI_INTERRUPT_ENABLE) |
2333 BIT(ROOT_PORT_RESET_INTERRUPT_ENABLE) |
2334 BIT(SUSPEND_REQUEST_CHANGE_INTERRUPT_ENABLE) |
2335 BIT(VBUS_INTERRUPT_ENABLE),
adc82f77
RRD		 2336 &dev->regs->pciirqenb1);
2337
2338 /* don't leave any writes posted */
2339 (void)readl(&dev->usb->usbctl);
2340}
2341
2342static void ep0_start(struct net2280 *dev)
2343{
c2db8a8a 2344 if (dev->pdev->vendor == PCI_VENDOR_ID_PLX_LEGACY)
adc82f77
RRD		 2345 return ep0_start_228x(dev);
2346 return ep0_start_338x(dev);
2347}
2348
1da177e4
LT		 2349/* when a driver is successfully registered, it will receive
2350 * control requests including set_configuration(), which enables
2351 * non-control requests. then usb traffic follows until a
2352 * disconnect is reported. then a host may connect again, or
2353 * the driver might get unbound.
2354 */
4cf5e00b
FB		 2355static int net2280_start(struct usb_gadget *_gadget,
2356 struct usb_gadget_driver *driver)
1da177e4 2357{
4cf5e00b 2358 struct net2280 *dev;
1da177e4
LT		 2359 int retval;
2360 unsigned i;
2361
2362 /* insist on high speed support from the driver, since
2363 * (dev->usb->xcvrdiag & FORCE_FULL_SPEED_MODE)
2364 * "must not be used in normal operation"
2365 */
ae8e530a
RRD		 2366 if (!driver || driver->max_speed < USB_SPEED_HIGH ||
2367 !driver->setup)
1da177e4 2368 return -EINVAL;
4cf5e00b 2369
fae3c158 2370 dev = container_of(_gadget, struct net2280, gadget);
1da177e4 2371
adc82f77 2372 for (i = 0; i < dev->n_ep; i++)
fae3c158 2373 dev->ep[i].irqs = 0;
1da177e4
LT		 2374
2375 /* hook up the driver ... */
2376 dev->softconnect = 1;
2377 driver->driver.bus = NULL;
2378 dev->driver = driver;
1da177e4 2379
fae3c158
RRD		 2380 retval = device_create_file(&dev->pdev->dev, &dev_attr_function);
2381 if (retval)
2382 goto err_unbind;
2383 retval = device_create_file(&dev->pdev->dev, &dev_attr_queues);
2384 if (retval)
2385 goto err_func;
1da177e4 2386
2f076077 2387 /* Enable force-full-speed testing mode, if desired */
c2db8a8a 2388 if (full_speed && dev->pdev->vendor == PCI_VENDOR_ID_PLX_LEGACY)
3e76fdcb 2389 writel(BIT(FORCE_FULL_SPEED_MODE), &dev->usb->xcvrdiag);
2f076077 2390
1da177e4
LT		 2391 /* ... then enable host detection and ep0; and we're ready
2392 * for set_configuration as well as eventual disconnect.
2393 */
fae3c158 2394 net2280_led_active(dev, 1);
adc82f77 2395
c2db8a8a 2396 if (dev->pdev->vendor == PCI_VENDOR_ID_PLX)
adc82f77
RRD		 2397 defect7374_enable_data_eps_zero(dev);
2398
fae3c158 2399 ep0_start(dev);
1da177e4 2400
e56e69cc 2401 ep_dbg(dev, "%s ready, usbctl %08x stdrsp %08x\n",
1da177e4 2402 driver->driver.name,
fae3c158
RRD		 2403 readl(&dev->usb->usbctl),
2404 readl(&dev->usb->stdrsp));
1da177e4
LT		 2405
2406 /* pci writes may still be posted */
2407 return 0;
b3899dac
JG		 2408
2409err_func:
fae3c158 2410 device_remove_file(&dev->pdev->dev, &dev_attr_function);
b3899dac 2411err_unbind:
b3899dac
JG		 2412 dev->driver = NULL;
2413 return retval;
1da177e4 2414}
1da177e4 2415
fae3c158 2416static void stop_activity(struct net2280 *dev, struct usb_gadget_driver *driver)
1da177e4
LT		 2417{
2418 int i;
2419
2420 /* don't disconnect if it's not connected */
2421 if (dev->gadget.speed == USB_SPEED_UNKNOWN)
2422 driver = NULL;
2423
2424 /* stop hardware; prevent new request submissions;
2425 * and kill any outstanding requests.
2426 */
fae3c158 2427 usb_reset(dev);
adc82f77 2428 for (i = 0; i < dev->n_ep; i++)
fae3c158 2429 nuke(&dev->ep[i]);
1da177e4 2430
699412d9
FB		 2431 /* report disconnect; the driver is already quiesced */
2432 if (driver) {
2433 spin_unlock(&dev->lock);
2434 driver->disconnect(&dev->gadget);
2435 spin_lock(&dev->lock);
2436 }
2437
fae3c158 2438 usb_reinit(dev);
1da177e4
LT		 2439}
2440
4cf5e00b
FB		 2441static int net2280_stop(struct usb_gadget *_gadget,
2442 struct usb_gadget_driver *driver)
1da177e4 2443{
4cf5e00b 2444 struct net2280 *dev;
1da177e4
LT		 2445 unsigned long flags;
2446
fae3c158 2447 dev = container_of(_gadget, struct net2280, gadget);
1da177e4 2448
fae3c158
RRD		 2449 spin_lock_irqsave(&dev->lock, flags);
2450 stop_activity(dev, driver);
2451 spin_unlock_irqrestore(&dev->lock, flags);
1da177e4 2452
1da177e4
LT		 2453 dev->driver = NULL;
2454
fae3c158 2455 net2280_led_active(dev, 0);
2f076077
AS		 2456
2457 /* Disable full-speed test mode */
c2db8a8a 2458 if (dev->pdev->vendor == PCI_VENDOR_ID_PLX_LEGACY)
adc82f77 2459 writel(0, &dev->usb->xcvrdiag);
2f076077 2460
fae3c158
RRD		 2461 device_remove_file(&dev->pdev->dev, &dev_attr_function);
2462 device_remove_file(&dev->pdev->dev, &dev_attr_queues);
1da177e4 2463
e56e69cc 2464 ep_dbg(dev, "unregistered driver '%s'\n",
84237bfb
RRD		 2465 driver ? driver->driver.name : "");
2466
1da177e4
LT		 2467 return 0;
2468}
1da177e4
LT		 2469
2470/*-------------------------------------------------------------------------*/
2471
2472/* handle ep0, ep-e, ep-f with 64 byte packets: packet per irq.
2473 * also works for dma-capable endpoints, in pio mode or just
2474 * to manually advance the queue after short OUT transfers.
2475 */
fae3c158 2476static void handle_ep_small(struct net2280_ep *ep)
1da177e4
LT		 2477{
2478 struct net2280_request *req;
2479 u32 t;
2480 /* 0 error, 1 mid-data, 2 done */
2481 int mode = 1;
2482
fae3c158
RRD		 2483 if (!list_empty(&ep->queue))
2484 req = list_entry(ep->queue.next,
1da177e4
LT		 2485 struct net2280_request, queue);
2486 else
2487 req = NULL;
2488
2489 /* ack all, and handle what we care about */
fae3c158 2490 t = readl(&ep->regs->ep_stat);
1da177e4
LT		 2491 ep->irqs++;
2492#if 0
e56e69cc 2493 ep_vdbg(ep->dev, "%s ack ep_stat %08x, req %p\n",
1da177e4
LT		 2494 ep->ep.name, t, req ? &req->req : 0);
2495#endif
950ee4c8 2496 if (!ep->is_in || ep->dev->pdev->device == 0x2280)
3e76fdcb 2497 writel(t & ~BIT(NAK_OUT_PACKETS), &ep->regs->ep_stat);
950ee4c8
GL		 2498 else
2499 /* Added for 2282 */
fae3c158 2500 writel(t, &ep->regs->ep_stat);
1da177e4
LT		 2501
2502 /* for ep0, monitor token irqs to catch data stage length errors
2503 * and to synchronize on status.
2504 *
2505 * also, to defer reporting of protocol stalls ... here's where
2506 * data or status first appears, handling stalls here should never
2507 * cause trouble on the host side..
2508 *
2509 * control requests could be slightly faster without token synch for
2510 * status, but status can jam up that way.
2511 */
fae3c158 2512 if (unlikely(ep->num == 0)) {
1da177e4
LT		 2513 if (ep->is_in) {
2514 /* status; stop NAKing */
3e76fdcb 2515 if (t & BIT(DATA_OUT_PING_TOKEN_INTERRUPT)) {
1da177e4
LT		 2516 if (ep->dev->protocol_stall) {
2517 ep->stopped = 1;
fae3c158 2518 set_halt(ep);
1da177e4
LT		 2519 }
2520 if (!req)
fae3c158 2521 allow_status(ep);
1da177e4
LT		 2522 mode = 2;
2523 /* reply to extra IN data tokens with a zlp */
3e76fdcb 2524 } else if (t & BIT(DATA_IN_TOKEN_INTERRUPT)) {
1da177e4
LT		 2525 if (ep->dev->protocol_stall) {
2526 ep->stopped = 1;
fae3c158 2527 set_halt(ep);
1da177e4 2528 mode = 2;
1f26e28d
AS		 2529 } else if (ep->responded &&
2530 !req && !ep->stopped)
fae3c158 2531 write_fifo(ep, NULL);
1da177e4
LT		 2532 }
2533 } else {
2534 /* status; stop NAKing */
3e76fdcb 2535 if (t & BIT(DATA_IN_TOKEN_INTERRUPT)) {
1da177e4
LT		 2536 if (ep->dev->protocol_stall) {
2537 ep->stopped = 1;
fae3c158 2538 set_halt(ep);
1da177e4
LT		 2539 }
2540 mode = 2;
2541 /* an extra OUT token is an error */
ae8e530a
RRD		 2542 } else if (((t & BIT(DATA_OUT_PING_TOKEN_INTERRUPT)) &&
2543 req &&
2544 req->req.actual == req->req.length) ||
2545 (ep->responded && !req)) {
1da177e4 2546 ep->dev->protocol_stall = 1;
fae3c158 2547 set_halt(ep);
1da177e4
LT		 2548 ep->stopped = 1;
2549 if (req)
fae3c158 2550 done(ep, req, -EOVERFLOW);
1da177e4
LT		 2551 req = NULL;
2552 }
2553 }
2554 }
2555
fae3c158 2556 if (unlikely(!req))
1da177e4
LT		 2557 return;
2558
2559 /* manual DMA queue advance after short OUT */
fae3c158 2560 if (likely(ep->dma)) {
3e76fdcb 2561 if (t & BIT(SHORT_PACKET_TRANSFERRED_INTERRUPT)) {
1da177e4
LT		 2562 u32 count;
2563 int stopped = ep->stopped;
2564
2565 /* TRANSFERRED works around OUT_DONE erratum 0112.
2566 * we expect (N <= maxpacket) bytes; host wrote M.
2567 * iff (M < N) we won't ever see a DMA interrupt.
2568 */
2569 ep->stopped = 1;
fae3c158 2570 for (count = 0; ; t = readl(&ep->regs->ep_stat)) {
1da177e4
LT		 2571
2572 /* any preceding dma transfers must finish.
2573 * dma handles (M >= N), may empty the queue
2574 */
fae3c158 2575 scan_dma_completions(ep);
ae8e530a
RRD		 2576 if (unlikely(list_empty(&ep->queue) ||
2577 ep->out_overflow)) {
1da177e4
LT		 2578 req = NULL;
2579 break;
2580 }
fae3c158 2581 req = list_entry(ep->queue.next,
1da177e4
LT		 2582 struct net2280_request, queue);
2583
2584 /* here either (M < N), a "real" short rx;
2585 * or (M == N) and the queue didn't empty
2586 */
3e76fdcb 2587 if (likely(t & BIT(FIFO_EMPTY))) {
fae3c158 2588 count = readl(&ep->dma->dmacount);
1da177e4 2589 count &= DMA_BYTE_COUNT_MASK;
fae3c158 2590 if (readl(&ep->dma->dmadesc)
1da177e4
LT		 2591 != req->td_dma)
2592 req = NULL;
2593 break;
2594 }
2595 udelay(1);
2596 }
2597
2598 /* stop DMA, leave ep NAKing */
3e76fdcb 2599 writel(BIT(DMA_ABORT), &ep->dma->dmastat);
fae3c158 2600 spin_stop_dma(ep->dma);
1da177e4 2601
fae3c158 2602 if (likely(req)) {
1da177e4 2603 req->td->dmacount = 0;
fae3c158
RRD		 2604 t = readl(&ep->regs->ep_avail);
2605 dma_done(ep, req, count,
901b3d75
DB		 2606 (ep->out_overflow || t)
2607 ? -EOVERFLOW : 0);
1da177e4
LT		 2608 }
2609
2610 /* also flush to prevent erratum 0106 trouble */
ae8e530a
RRD		 2611 if (unlikely(ep->out_overflow ||
2612 (ep->dev->chiprev == 0x0100 &&
2613 ep->dev->gadget.speed
2614 == USB_SPEED_FULL))) {
fae3c158 2615 out_flush(ep);
1da177e4
LT		 2616 ep->out_overflow = 0;
2617 }
2618
2619 /* (re)start dma if needed, stop NAKing */
2620 ep->stopped = stopped;
fae3c158
RRD		 2621 if (!list_empty(&ep->queue))
2622 restart_dma(ep);
1da177e4 2623 } else
e56e69cc 2624 ep_dbg(ep->dev, "%s dma ep_stat %08x ??\n",
1da177e4
LT		 2625 ep->ep.name, t);
2626 return;
2627
2628 /* data packet(s) received (in the fifo, OUT) */
3e76fdcb 2629 } else if (t & BIT(DATA_PACKET_RECEIVED_INTERRUPT)) {
fae3c158 2630 if (read_fifo(ep, req) && ep->num != 0)
1da177e4
LT		 2631 mode = 2;
2632
2633 /* data packet(s) transmitted (IN) */
3e76fdcb 2634 } else if (t & BIT(DATA_PACKET_TRANSMITTED_INTERRUPT)) {
1da177e4
LT		 2635 unsigned len;
2636
2637 len = req->req.length - req->req.actual;
2638 if (len > ep->ep.maxpacket)
2639 len = ep->ep.maxpacket;
2640 req->req.actual += len;
2641
2642 /* if we wrote it all, we're usually done */
fae3c158
RRD		 2643 /* send zlps until the status stage */
2644 if ((req->req.actual == req->req.length) &&
2645 (!req->req.zero || len != ep->ep.maxpacket) && ep->num)
1da177e4 2646 mode = 2;
1da177e4
LT		 2647
2648 /* there was nothing to do ... */
2649 } else if (mode == 1)
2650 return;
2651
2652 /* done */
2653 if (mode == 2) {
2654 /* stream endpoints often resubmit/unlink in completion */
fae3c158 2655 done(ep, req, 0);
1da177e4
LT		 2656
2657 /* maybe advance queue to next request */
2658 if (ep->num == 0) {
2659 /* NOTE: net2280 could let gadget driver start the
2660 * status stage later. since not all controllers let
2661 * them control that, the api doesn't (yet) allow it.
2662 */
2663 if (!ep->stopped)
fae3c158 2664 allow_status(ep);
1da177e4
LT		 2665 req = NULL;
2666 } else {
fae3c158
RRD		 2667 if (!list_empty(&ep->queue) && !ep->stopped)
2668 req = list_entry(ep->queue.next,
1da177e4
LT		 2669 struct net2280_request, queue);
2670 else
2671 req = NULL;
2672 if (req && !ep->is_in)
fae3c158 2673 stop_out_naking(ep);
1da177e4
LT		 2674 }
2675 }
2676
2677 /* is there a buffer for the next packet?
2678 * for best streaming performance, make sure there is one.
2679 */
2680 if (req && !ep->stopped) {
2681
2682 /* load IN fifo with next packet (may be zlp) */
3e76fdcb 2683 if (t & BIT(DATA_PACKET_TRANSMITTED_INTERRUPT))
fae3c158 2684 write_fifo(ep, &req->req);
1da177e4
LT		 2685 }
2686}
2687
fae3c158 2688static struct net2280_ep *get_ep_by_addr(struct net2280 *dev, u16 wIndex)
1da177e4
LT		 2689{
2690 struct net2280_ep *ep;
2691
2692 if ((wIndex & USB_ENDPOINT_NUMBER_MASK) == 0)
fae3c158
RRD		 2693 return &dev->ep[0];
2694 list_for_each_entry(ep, &dev->gadget.ep_list, ep.ep_list) {
1da177e4
LT		 2695 u8 bEndpointAddress;
2696
2697 if (!ep->desc)
2698 continue;
2699 bEndpointAddress = ep->desc->bEndpointAddress;
2700 if ((wIndex ^ bEndpointAddress) & USB_DIR_IN)
2701 continue;
2702 if ((wIndex & 0x0f) == (bEndpointAddress & 0x0f))
2703 return ep;
2704 }
2705 return NULL;
2706}
2707
adc82f77
RRD		 2708static void defect7374_workaround(struct net2280 *dev, struct usb_ctrlrequest r)
2709{
2710 u32 scratch, fsmvalue;
2711 u32 ack_wait_timeout, state;
2712
2713 /* Workaround for Defect 7374 (U1/U2 erroneously rejected): */
2714 scratch = get_idx_reg(dev->regs, SCRATCH);
2715 fsmvalue = scratch & (0xf << DEFECT7374_FSM_FIELD);
2716 scratch &= ~(0xf << DEFECT7374_FSM_FIELD);
2717
2718 if (!((fsmvalue == DEFECT7374_FSM_WAITING_FOR_CONTROL_READ) &&
2719 (r.bRequestType & USB_DIR_IN)))
2720 return;
2721
2722 /* This is the first Control Read for this connection: */
3e76fdcb 2723 if (!(readl(&dev->usb->usbstat) & BIT(SUPER_SPEED_MODE))) {
adc82f77
RRD		 2724 /*
2725 * Connection is NOT SS:
2726 * - Connection must be FS or HS.
2727 * - This FSM state should allow workaround software to
2728 * run after the next USB connection.
2729 */
2730 scratch |= DEFECT7374_FSM_NON_SS_CONTROL_READ;
2731 goto restore_data_eps;
2732 }
2733
2734 /* Connection is SS: */
2735 for (ack_wait_timeout = 0;
2736 ack_wait_timeout < DEFECT_7374_NUMBEROF_MAX_WAIT_LOOPS;
2737 ack_wait_timeout++) {
2738
2739 state = readl(&dev->plregs->pl_ep_status_1)
2740 & (0xff << STATE);
2741 if ((state >= (ACK_GOOD_NORMAL << STATE)) &&
2742 (state <= (ACK_GOOD_MORE_ACKS_TO_COME << STATE))) {
2743 scratch |= DEFECT7374_FSM_SS_CONTROL_READ;
2744 break;
2745 }
2746
2747 /*
2748 * We have not yet received host's Data Phase ACK
2749 * - Wait and try again.
2750 */
2751 udelay(DEFECT_7374_PROCESSOR_WAIT_TIME);
2752
2753 continue;
2754 }
2755
2756
2757 if (ack_wait_timeout >= DEFECT_7374_NUMBEROF_MAX_WAIT_LOOPS) {
e56e69cc 2758 ep_err(dev, "FAIL: Defect 7374 workaround waited but failed "
adc82f77 2759 "to detect SS host's data phase ACK.");
e56e69cc 2760 ep_err(dev, "PL_EP_STATUS_1(23:16):.Expected from 0x11 to 0x16"
adc82f77
RRD		 2761 "got 0x%2.2x.\n", state >> STATE);
2762 } else {
e56e69cc 2763 ep_warn(dev, "INFO: Defect 7374 workaround waited about\n"
adc82f77
RRD		 2764 "%duSec for Control Read Data Phase ACK\n",
2765 DEFECT_7374_PROCESSOR_WAIT_TIME * ack_wait_timeout);
2766 }
2767
2768restore_data_eps:
2769 /*
2770 * Restore data EPs to their pre-workaround settings (disabled,
2771 * initialized, and other details).
2772 */
2773 defect7374_disable_data_eps(dev);
2774
2775 set_idx_reg(dev->regs, SCRATCH, scratch);
2776
2777 return;
2778}
2779
2780static void ep_stall(struct net2280_ep *ep, int stall)
2781{
2782 struct net2280 *dev = ep->dev;
2783 u32 val;
2784 static const u32 ep_pl[9] = { 0, 3, 4, 7, 8, 2, 5, 6, 9 };
2785
2786 if (stall) {
3e76fdcb
RRD		 2787 writel(BIT(SET_ENDPOINT_HALT) |
2788 /* BIT(SET_NAK_PACKETS) | */
2789 BIT(CLEAR_CONTROL_STATUS_PHASE_HANDSHAKE),
adc82f77
RRD		 2790 &ep->regs->ep_rsp);
2791 ep->is_halt = 1;
2792 } else {
2793 if (dev->gadget.speed == USB_SPEED_SUPER) {
2794 /*
2795 * Workaround for SS SeqNum not cleared via
2796 * Endpoint Halt (Clear) bit. select endpoint
2797 */
2798 val = readl(&dev->plregs->pl_ep_ctrl);
2799 val = (val & ~0x1f) | ep_pl[ep->num];
2800 writel(val, &dev->plregs->pl_ep_ctrl);
2801
3e76fdcb 2802 val |= BIT(SEQUENCE_NUMBER_RESET);
adc82f77
RRD		 2803 writel(val, &dev->plregs->pl_ep_ctrl);
2804 }
2805 val = readl(&ep->regs->ep_rsp);
3e76fdcb
RRD		 2806 val |= BIT(CLEAR_ENDPOINT_HALT) |
2807 BIT(CLEAR_ENDPOINT_TOGGLE);
ae8e530a
RRD		 2808 writel(val,
2809 /* | BIT(CLEAR_NAK_PACKETS),*/
2810 &ep->regs->ep_rsp);
adc82f77
RRD		 2811 ep->is_halt = 0;
2812 val = readl(&ep->regs->ep_rsp);
2813 }
2814}
2815
2816static void ep_stdrsp(struct net2280_ep *ep, int value, int wedged)
2817{
2818 /* set/clear, then synch memory views with the device */
2819 if (value) {
2820 ep->stopped = 1;
2821 if (ep->num == 0)
2822 ep->dev->protocol_stall = 1;
2823 else {
2824 if (ep->dma)
2825 ep_stop_dma(ep);
2826 ep_stall(ep, true);
2827 }
2828
2829 if (wedged)
2830 ep->wedged = 1;
2831 } else {
2832 ep->stopped = 0;
2833 ep->wedged = 0;
2834
2835 ep_stall(ep, false);
2836
2837 /* Flush the queue */
2838 if (!list_empty(&ep->queue)) {
2839 struct net2280_request *req =
2840 list_entry(ep->queue.next, struct net2280_request,
2841 queue);
2842 if (ep->dma)
2843 resume_dma(ep);
2844 else {
2845 if (ep->is_in)
2846 write_fifo(ep, &req->req);
2847 else {
2848 if (read_fifo(ep, req))
2849 done(ep, req, 0);
2850 }
2851 }
2852 }
2853 }
2854}
2855
2856static void handle_stat0_irqs_superspeed(struct net2280 *dev,
2857 struct net2280_ep *ep, struct usb_ctrlrequest r)
2858{
2859 int tmp = 0;
2860
2861#define w_value le16_to_cpu(r.wValue)
2862#define w_index le16_to_cpu(r.wIndex)
2863#define w_length le16_to_cpu(r.wLength)
2864
2865 switch (r.bRequest) {
2866 struct net2280_ep *e;
2867 u16 status;
2868
2869 case USB_REQ_SET_CONFIGURATION:
2870 dev->addressed_state = !w_value;
2871 goto usb3_delegate;
2872
2873 case USB_REQ_GET_STATUS:
2874 switch (r.bRequestType) {
2875 case (USB_DIR_IN | USB_TYPE_STANDARD | USB_RECIP_DEVICE):
2876 status = dev->wakeup_enable ? 0x02 : 0x00;
2877 if (dev->selfpowered)
3e76fdcb 2878 status |= BIT(0);
adc82f77
RRD		 2879 status |= (dev->u1_enable << 2 | dev->u2_enable << 3 |
2880 dev->ltm_enable << 4);
2881 writel(0, &dev->epregs[0].ep_irqenb);
2882 set_fifo_bytecount(ep, sizeof(status));
2883 writel((__force u32) status, &dev->epregs[0].ep_data);
2884 allow_status_338x(ep);
2885 break;
2886
2887 case (USB_DIR_IN | USB_TYPE_STANDARD | USB_RECIP_ENDPOINT):
2888 e = get_ep_by_addr(dev, w_index);
2889 if (!e)
2890 goto do_stall3;
2891 status = readl(&e->regs->ep_rsp) &
3e76fdcb 2892 BIT(CLEAR_ENDPOINT_HALT);
adc82f77
RRD		 2893 writel(0, &dev->epregs[0].ep_irqenb);
2894 set_fifo_bytecount(ep, sizeof(status));
2895 writel((__force u32) status, &dev->epregs[0].ep_data);
2896 allow_status_338x(ep);
2897 break;
2898
2899 default:
2900 goto usb3_delegate;
2901 }
2902 break;
2903
2904 case USB_REQ_CLEAR_FEATURE:
2905 switch (r.bRequestType) {
2906 case (USB_DIR_OUT | USB_TYPE_STANDARD | USB_RECIP_DEVICE):
2907 if (!dev->addressed_state) {
2908 switch (w_value) {
2909 case USB_DEVICE_U1_ENABLE:
2910 dev->u1_enable = 0;
2911 writel(readl(&dev->usb_ext->usbctl2) &
3e76fdcb 2912 ~BIT(U1_ENABLE),
adc82f77
RRD		 2913 &dev->usb_ext->usbctl2);
2914 allow_status_338x(ep);
2915 goto next_endpoints3;
2916
2917 case USB_DEVICE_U2_ENABLE:
2918 dev->u2_enable = 0;
2919 writel(readl(&dev->usb_ext->usbctl2) &
3e76fdcb 2920 ~BIT(U2_ENABLE),
adc82f77
RRD		 2921 &dev->usb_ext->usbctl2);
2922 allow_status_338x(ep);
2923 goto next_endpoints3;
2924
2925 case USB_DEVICE_LTM_ENABLE:
2926 dev->ltm_enable = 0;
2927 writel(readl(&dev->usb_ext->usbctl2) &
3e76fdcb 2928 ~BIT(LTM_ENABLE),
adc82f77
RRD		 2929 &dev->usb_ext->usbctl2);
2930 allow_status_338x(ep);
2931 goto next_endpoints3;
2932
2933 default:
2934 break;
2935 }
2936 }
2937 if (w_value == USB_DEVICE_REMOTE_WAKEUP) {
2938 dev->wakeup_enable = 0;
2939 writel(readl(&dev->usb->usbctl) &
3e76fdcb 2940 ~BIT(DEVICE_REMOTE_WAKEUP_ENABLE),
adc82f77
RRD		 2941 &dev->usb->usbctl);
2942 allow_status_338x(ep);
2943 break;
2944 }
2945 goto usb3_delegate;
2946
2947 case (USB_DIR_OUT | USB_TYPE_STANDARD | USB_RECIP_ENDPOINT):
2948 e = get_ep_by_addr(dev, w_index);
2949 if (!e)
2950 goto do_stall3;
2951 if (w_value != USB_ENDPOINT_HALT)
2952 goto do_stall3;
e56e69cc 2953 ep_vdbg(dev, "%s clear halt\n", e->ep.name);
adc82f77
RRD		 2954 ep_stall(e, false);
2955 if (!list_empty(&e->queue) && e->td_dma)
2956 restart_dma(e);
2957 allow_status(ep);
2958 ep->stopped = 1;
2959 break;
2960
2961 default:
2962 goto usb3_delegate;
2963 }
2964 break;
2965 case USB_REQ_SET_FEATURE:
2966 switch (r.bRequestType) {
2967 case (USB_DIR_OUT | USB_TYPE_STANDARD | USB_RECIP_DEVICE):
2968 if (!dev->addressed_state) {
2969 switch (w_value) {
2970 case USB_DEVICE_U1_ENABLE:
2971 dev->u1_enable = 1;
2972 writel(readl(&dev->usb_ext->usbctl2) |
3e76fdcb 2973 BIT(U1_ENABLE),
adc82f77
RRD		 2974 &dev->usb_ext->usbctl2);
2975 allow_status_338x(ep);
2976 goto next_endpoints3;
2977
2978 case USB_DEVICE_U2_ENABLE:
2979 dev->u2_enable = 1;
2980 writel(readl(&dev->usb_ext->usbctl2) |
3e76fdcb 2981 BIT(U2_ENABLE),
adc82f77
RRD		 2982 &dev->usb_ext->usbctl2);
2983 allow_status_338x(ep);
2984 goto next_endpoints3;
2985
2986 case USB_DEVICE_LTM_ENABLE:
2987 dev->ltm_enable = 1;
2988 writel(readl(&dev->usb_ext->usbctl2) |
3e76fdcb 2989 BIT(LTM_ENABLE),
adc82f77
RRD		 2990 &dev->usb_ext->usbctl2);
2991 allow_status_338x(ep);
2992 goto next_endpoints3;
2993 default:
2994 break;
2995 }
2996 }
2997
2998 if (w_value == USB_DEVICE_REMOTE_WAKEUP) {
2999 dev->wakeup_enable = 1;
3000 writel(readl(&dev->usb->usbctl) |
3e76fdcb 3001 BIT(DEVICE_REMOTE_WAKEUP_ENABLE),
adc82f77
RRD		 3002 &dev->usb->usbctl);
3003 allow_status_338x(ep);
3004 break;
3005 }
3006 goto usb3_delegate;
3007
3008 case (USB_DIR_OUT | USB_TYPE_STANDARD | USB_RECIP_ENDPOINT):
3009 e = get_ep_by_addr(dev, w_index);
3010 if (!e || (w_value != USB_ENDPOINT_HALT))
3011 goto do_stall3;
3012 ep_stdrsp(e, true, false);
3013 allow_status_338x(ep);
3014 break;
3015
3016 default:
3017 goto usb3_delegate;
3018 }
3019
3020 break;
3021 default:
3022
3023usb3_delegate:
e56e69cc 3024 ep_vdbg(dev, "setup %02x.%02x v%04x i%04x l%04x ep_cfg %08x\n",
adc82f77
RRD		 3025 r.bRequestType, r.bRequest,
3026 w_value, w_index, w_length,
3027 readl(&ep->cfg->ep_cfg));
3028
3029 ep->responded = 0;
3030 spin_unlock(&dev->lock);
3031 tmp = dev->driver->setup(&dev->gadget, &r);
3032 spin_lock(&dev->lock);
3033 }
3034do_stall3:
3035 if (tmp < 0) {
e56e69cc 3036 ep_vdbg(dev, "req %02x.%02x protocol STALL; stat %d\n",
adc82f77
RRD		 3037 r.bRequestType, r.bRequest, tmp);
3038 dev->protocol_stall = 1;
3039 /* TD 9.9 Halt Endpoint test. TD 9.22 Set feature test */
3040 ep_stall(ep, true);
3041 }
3042
3043next_endpoints3:
3044
3045#undef w_value
3046#undef w_index
3047#undef w_length
3048
3049 return;
3050}
3051
fae3c158 3052static void handle_stat0_irqs(struct net2280 *dev, u32 stat)
1da177e4
LT		 3053{
3054 struct net2280_ep *ep;
3055 u32 num, scratch;
3056
3057 /* most of these don't need individual acks */
3e76fdcb 3058 stat &= ~BIT(INTA_ASSERTED);
1da177e4
LT		 3059 if (!stat)
3060 return;
e56e69cc 3061 /* ep_dbg(dev, "irqstat0 %04x\n", stat); */
1da177e4
LT		 3062
3063 /* starting a control request? */
3e76fdcb 3064 if (unlikely(stat & BIT(SETUP_PACKET_INTERRUPT))) {
1da177e4 3065 union {
fae3c158 3066 u32 raw[2];
1da177e4
LT		 3067 struct usb_ctrlrequest r;
3068 } u;
950ee4c8 3069 int tmp;
1da177e4
LT		 3070 struct net2280_request *req;
3071
3072 if (dev->gadget.speed == USB_SPEED_UNKNOWN) {
adc82f77 3073 u32 val = readl(&dev->usb->usbstat);
3e76fdcb 3074 if (val & BIT(SUPER_SPEED)) {
adc82f77
RRD		 3075 dev->gadget.speed = USB_SPEED_SUPER;
3076 usb_ep_set_maxpacket_limit(&dev->ep[0].ep,
3077 EP0_SS_MAX_PACKET_SIZE);
3e76fdcb 3078 } else if (val & BIT(HIGH_SPEED)) {
1da177e4 3079 dev->gadget.speed = USB_SPEED_HIGH;
adc82f77
RRD		 3080 usb_ep_set_maxpacket_limit(&dev->ep[0].ep,
3081 EP0_HS_MAX_PACKET_SIZE);
3082 } else {
1da177e4 3083 dev->gadget.speed = USB_SPEED_FULL;
adc82f77
RRD		 3084 usb_ep_set_maxpacket_limit(&dev->ep[0].ep,
3085 EP0_HS_MAX_PACKET_SIZE);
3086 }
fae3c158 3087 net2280_led_speed(dev, dev->gadget.speed);
e56e69cc 3088 ep_dbg(dev, "%s\n",
fae3c158 3089 usb_speed_string(dev->gadget.speed));
1da177e4
LT		 3090 }
3091
fae3c158 3092 ep = &dev->ep[0];
1da177e4
LT		 3093 ep->irqs++;
3094
3095 /* make sure any leftover request state is cleared */
3e76fdcb 3096 stat &= ~BIT(ENDPOINT_0_INTERRUPT);
fae3c158
RRD		 3097 while (!list_empty(&ep->queue)) {
3098 req = list_entry(ep->queue.next,
1da177e4 3099 struct net2280_request, queue);
fae3c158 3100 done(ep, req, (req->req.actual == req->req.length)
1da177e4
LT		 3101 ? 0 : -EPROTO);
3102 }
3103 ep->stopped = 0;
3104 dev->protocol_stall = 0;
c2db8a8a 3105 if (dev->pdev->vendor == PCI_VENDOR_ID_PLX)
adc82f77
RRD		 3106 ep->is_halt = 0;
3107 else{
3108 if (ep->dev->pdev->device == 0x2280)
3e76fdcb
RRD		 3109 tmp = BIT(FIFO_OVERFLOW) |
3110 BIT(FIFO_UNDERFLOW);
adc82f77
RRD		 3111 else
3112 tmp = 0;
3113
3e76fdcb
RRD		 3114 writel(tmp | BIT(TIMEOUT) |
3115 BIT(USB_STALL_SENT) |
3116 BIT(USB_IN_NAK_SENT) |
3117 BIT(USB_IN_ACK_RCVD) |
3118 BIT(USB_OUT_PING_NAK_SENT) |
3119 BIT(USB_OUT_ACK_SENT) |
3120 BIT(SHORT_PACKET_OUT_DONE_INTERRUPT) |
3121 BIT(SHORT_PACKET_TRANSFERRED_INTERRUPT) |
3122 BIT(DATA_PACKET_RECEIVED_INTERRUPT) |
3123 BIT(DATA_PACKET_TRANSMITTED_INTERRUPT) |
3124 BIT(DATA_OUT_PING_TOKEN_INTERRUPT) |
ae8e530a
RRD		 3125 BIT(DATA_IN_TOKEN_INTERRUPT),
3126 &ep->regs->ep_stat);
adc82f77
RRD		 3127 }
3128 u.raw[0] = readl(&dev->usb->setup0123);
3129 u.raw[1] = readl(&dev->usb->setup4567);
901b3d75 3130
fae3c158
RRD		 3131 cpu_to_le32s(&u.raw[0]);
3132 cpu_to_le32s(&u.raw[1]);
1da177e4 3133
c2db8a8a 3134 if (dev->pdev->vendor == PCI_VENDOR_ID_PLX)
adc82f77
RRD		 3135 defect7374_workaround(dev, u.r);
3136
950ee4c8
GL		 3137 tmp = 0;
3138
01ee7d70
DB		 3139#define w_value le16_to_cpu(u.r.wValue)
3140#define w_index le16_to_cpu(u.r.wIndex)
3141#define w_length le16_to_cpu(u.r.wLength)
1da177e4
LT		 3142
3143 /* ack the irq */
3e76fdcb
RRD		 3144 writel(BIT(SETUP_PACKET_INTERRUPT), &dev->regs->irqstat0);
3145 stat ^= BIT(SETUP_PACKET_INTERRUPT);
1da177e4
LT		 3146
3147 /* watch control traffic at the token level, and force
3148 * synchronization before letting the status stage happen.
3149 * FIXME ignore tokens we'll NAK, until driver responds.
3150 * that'll mean a lot less irqs for some drivers.
3151 */
3152 ep->is_in = (u.r.bRequestType & USB_DIR_IN) != 0;
3153 if (ep->is_in) {
3e76fdcb
RRD		 3154 scratch = BIT(DATA_PACKET_TRANSMITTED_INTERRUPT) |
3155 BIT(DATA_OUT_PING_TOKEN_INTERRUPT) |
3156 BIT(DATA_IN_TOKEN_INTERRUPT);
fae3c158 3157 stop_out_naking(ep);
1da177e4 3158 } else
3e76fdcb
RRD		 3159 scratch = BIT(DATA_PACKET_RECEIVED_INTERRUPT) |
3160 BIT(DATA_OUT_PING_TOKEN_INTERRUPT) |
3161 BIT(DATA_IN_TOKEN_INTERRUPT);
fae3c158 3162 writel(scratch, &dev->epregs[0].ep_irqenb);
1da177e4
LT		 3163
3164 /* we made the hardware handle most lowlevel requests;
3165 * everything else goes uplevel to the gadget code.
3166 */
1f26e28d 3167 ep->responded = 1;
adc82f77
RRD		 3168
3169 if (dev->gadget.speed == USB_SPEED_SUPER) {
3170 handle_stat0_irqs_superspeed(dev, ep, u.r);
3171 goto next_endpoints;
3172 }
3173
1da177e4
LT		 3174 switch (u.r.bRequest) {
3175 case USB_REQ_GET_STATUS: {
3176 struct net2280_ep *e;
320f3459 3177 __le32 status;
1da177e4
LT		 3178
3179 /* hw handles device and interface status */
3180 if (u.r.bRequestType != (USB_DIR_IN|USB_RECIP_ENDPOINT))
3181 goto delegate;
fae3c158
RRD		 3182 e = get_ep_by_addr(dev, w_index);
3183 if (!e || w_length > 2)
1da177e4
LT		 3184 goto do_stall;
3185
3e76fdcb 3186 if (readl(&e->regs->ep_rsp) & BIT(SET_ENDPOINT_HALT))
fae3c158 3187 status = cpu_to_le32(1);
1da177e4 3188 else
fae3c158 3189 status = cpu_to_le32(0);
1da177e4
LT		 3190
3191 /* don't bother with a request object! */
fae3c158
RRD		 3192 writel(0, &dev->epregs[0].ep_irqenb);
3193 set_fifo_bytecount(ep, w_length);
3194 writel((__force u32)status, &dev->epregs[0].ep_data);
3195 allow_status(ep);
e56e69cc 3196 ep_vdbg(dev, "%s stat %02x\n", ep->ep.name, status);
1da177e4
LT		 3197 goto next_endpoints;
3198 }
3199 break;
3200 case USB_REQ_CLEAR_FEATURE: {
3201 struct net2280_ep *e;
3202
3203 /* hw handles device features */
3204 if (u.r.bRequestType != USB_RECIP_ENDPOINT)
3205 goto delegate;
ae8e530a 3206 if (w_value != USB_ENDPOINT_HALT || w_length != 0)
1da177e4 3207 goto do_stall;
fae3c158
RRD		 3208 e = get_ep_by_addr(dev, w_index);
3209 if (!e)
1da177e4 3210 goto do_stall;
8066134f 3211 if (e->wedged) {
e56e69cc 3212 ep_vdbg(dev, "%s wedged, halt not cleared\n",
8066134f
AS		 3213 ep->ep.name);
3214 } else {
e56e69cc 3215 ep_vdbg(dev, "%s clear halt\n", e->ep.name);
8066134f 3216 clear_halt(e);
c2db8a8a
RRD		 3217 if (ep->dev->pdev->vendor ==
3218 PCI_VENDOR_ID_PLX &&
adc82f77
RRD		 3219 !list_empty(&e->queue) && e->td_dma)
3220 restart_dma(e);
8066134f 3221 }
fae3c158 3222 allow_status(ep);
1da177e4
LT		 3223 goto next_endpoints;
3224 }
3225 break;
3226 case USB_REQ_SET_FEATURE: {
3227 struct net2280_ep *e;
3228
3229 /* hw handles device features */
3230 if (u.r.bRequestType != USB_RECIP_ENDPOINT)
3231 goto delegate;
ae8e530a 3232 if (w_value != USB_ENDPOINT_HALT || w_length != 0)
1da177e4 3233 goto do_stall;
fae3c158
RRD		 3234 e = get_ep_by_addr(dev, w_index);
3235 if (!e)
1da177e4 3236 goto do_stall;
8066134f
AS		 3237 if (e->ep.name == ep0name)
3238 goto do_stall;
fae3c158 3239 set_halt(e);
c2db8a8a 3240 if (dev->pdev->vendor == PCI_VENDOR_ID_PLX && e->dma)
adc82f77 3241 abort_dma(e);
fae3c158 3242 allow_status(ep);
e56e69cc 3243 ep_vdbg(dev, "%s set halt\n", ep->ep.name);
1da177e4
LT		 3244 goto next_endpoints;
3245 }
3246 break;
3247 default:
3248delegate:
e56e69cc 3249 ep_vdbg(dev, "setup %02x.%02x v%04x i%04x l%04x "
1da177e4
LT		 3250 "ep_cfg %08x\n",
3251 u.r.bRequestType, u.r.bRequest,
320f3459 3252 w_value, w_index, w_length,
adc82f77 3253 readl(&ep->cfg->ep_cfg));
1f26e28d 3254 ep->responded = 0;
fae3c158
RRD		 3255 spin_unlock(&dev->lock);
3256 tmp = dev->driver->setup(&dev->gadget, &u.r);
3257 spin_lock(&dev->lock);
1da177e4
LT		 3258 }
3259
3260 /* stall ep0 on error */
3261 if (tmp < 0) {
3262do_stall:
e56e69cc 3263 ep_vdbg(dev, "req %02x.%02x protocol STALL; stat %d\n",
1da177e4
LT		 3264 u.r.bRequestType, u.r.bRequest, tmp);
3265 dev->protocol_stall = 1;
3266 }
3267
3268 /* some in/out token irq should follow; maybe stall then.
3269 * driver must queue a request (even zlp) or halt ep0
3270 * before the host times out.
3271 */
3272 }
3273
320f3459
DB		 3274#undef w_value
3275#undef w_index
3276#undef w_length
3277
1da177e4
LT		 3278next_endpoints:
3279 /* endpoint data irq ? */
3280 scratch = stat & 0x7f;
3281 stat &= ~0x7f;
3282 for (num = 0; scratch; num++) {
3283 u32 t;
3284
3285 /* do this endpoint's FIFO and queue need tending? */
3e76fdcb 3286 t = BIT(num);
1da177e4
LT		 3287 if ((scratch & t) == 0)
3288 continue;
3289 scratch ^= t;
3290
fae3c158
RRD		 3291 ep = &dev->ep[num];
3292 handle_ep_small(ep);
1da177e4
LT		 3293 }
3294
3295 if (stat)
e56e69cc 3296 ep_dbg(dev, "unhandled irqstat0 %08x\n", stat);
1da177e4
LT		 3297}
3298
3e76fdcb
RRD		 3299#define DMA_INTERRUPTS (BIT(DMA_D_INTERRUPT) | \
3300 BIT(DMA_C_INTERRUPT) | \
3301 BIT(DMA_B_INTERRUPT) | \
3302 BIT(DMA_A_INTERRUPT))
1da177e4 3303#define PCI_ERROR_INTERRUPTS ( \
3e76fdcb
RRD		 3304 BIT(PCI_MASTER_ABORT_RECEIVED_INTERRUPT) | \
3305 BIT(PCI_TARGET_ABORT_RECEIVED_INTERRUPT) | \
3306 BIT(PCI_RETRY_ABORT_INTERRUPT))
1da177e4 3307
fae3c158 3308static void handle_stat1_irqs(struct net2280 *dev, u32 stat)
1da177e4
LT		 3309{
3310 struct net2280_ep *ep;
3311 u32 tmp, num, mask, scratch;
3312
3313 /* after disconnect there's nothing else to do! */
3e76fdcb
RRD		 3314 tmp = BIT(VBUS_INTERRUPT) | BIT(ROOT_PORT_RESET_INTERRUPT);
3315 mask = BIT(SUPER_SPEED) | BIT(HIGH_SPEED) | BIT(FULL_SPEED);
1da177e4
LT		 3316
3317 /* VBUS disconnect is indicated by VBUS_PIN and VBUS_INTERRUPT set.
fb914ebf 3318 * Root Port Reset is indicated by ROOT_PORT_RESET_INTERRUPT set and
901b3d75 3319 * both HIGH_SPEED and FULL_SPEED clear (as ROOT_PORT_RESET_INTERRUPT
1da177e4
LT		 3320 * only indicates a change in the reset state).
3321 */
3322 if (stat & tmp) {
fae3c158 3323 writel(tmp, &dev->regs->irqstat1);
ae8e530a
RRD		 3324 if ((((stat & BIT(ROOT_PORT_RESET_INTERRUPT)) &&
3325 (readl(&dev->usb->usbstat) & mask)) ||
3326 ((readl(&dev->usb->usbctl) &
3327 BIT(VBUS_PIN)) == 0)) &&
3328 (dev->gadget.speed != USB_SPEED_UNKNOWN)) {
e56e69cc 3329 ep_dbg(dev, "disconnect %s\n",
1da177e4 3330 dev->driver->driver.name);
fae3c158
RRD		 3331 stop_activity(dev, dev->driver);
3332 ep0_start(dev);
1da177e4
LT		 3333 return;
3334 }
3335 stat &= ~tmp;
3336
3337 /* vBUS can bounce ... one of many reasons to ignore the
3338 * notion of hotplug events on bus connect/disconnect!
3339 */
3340 if (!stat)
3341 return;
3342 }
3343
3344 /* NOTE: chip stays in PCI D0 state for now, but it could
3345 * enter D1 to save more power
3346 */
3e76fdcb 3347 tmp = BIT(SUSPEND_REQUEST_CHANGE_INTERRUPT);
1da177e4 3348 if (stat & tmp) {
fae3c158 3349 writel(tmp, &dev->regs->irqstat1);
3e76fdcb 3350 if (stat & BIT(SUSPEND_REQUEST_INTERRUPT)) {
1da177e4 3351 if (dev->driver->suspend)
fae3c158 3352 dev->driver->suspend(&dev->gadget);
1da177e4 3353 if (!enable_suspend)
3e76fdcb 3354 stat &= ~BIT(SUSPEND_REQUEST_INTERRUPT);
1da177e4
LT		 3355 } else {
3356 if (dev->driver->resume)
fae3c158 3357 dev->driver->resume(&dev->gadget);
1da177e4
LT		 3358 /* at high speed, note erratum 0133 */
3359 }
3360 stat &= ~tmp;
3361 }
3362
3363 /* clear any other status/irqs */
3364 if (stat)
fae3c158 3365 writel(stat, &dev->regs->irqstat1);
1da177e4
LT		 3366
3367 /* some status we can just ignore */
950ee4c8 3368 if (dev->pdev->device == 0x2280)
3e76fdcb
RRD		 3369 stat &= ~(BIT(CONTROL_STATUS_INTERRUPT) |
3370 BIT(SUSPEND_REQUEST_INTERRUPT) |
3371 BIT(RESUME_INTERRUPT) |
3372 BIT(SOF_INTERRUPT));
950ee4c8 3373 else
3e76fdcb
RRD		 3374 stat &= ~(BIT(CONTROL_STATUS_INTERRUPT) |
3375 BIT(RESUME_INTERRUPT) |
3376 BIT(SOF_DOWN_INTERRUPT) |
3377 BIT(SOF_INTERRUPT));
950ee4c8 3378
1da177e4
LT		 3379 if (!stat)
3380 return;
e56e69cc 3381 /* ep_dbg(dev, "irqstat1 %08x\n", stat);*/
1da177e4
LT		 3382
3383 /* DMA status, for ep-{a,b,c,d} */
3384 scratch = stat & DMA_INTERRUPTS;
3385 stat &= ~DMA_INTERRUPTS;
3386 scratch >>= 9;
3387 for (num = 0; scratch; num++) {
3388 struct net2280_dma_regs __iomem *dma;
3389
3e76fdcb 3390 tmp = BIT(num);
1da177e4
LT		 3391 if ((tmp & scratch) == 0)
3392 continue;
3393 scratch ^= tmp;
3394
fae3c158 3395 ep = &dev->ep[num + 1];
1da177e4
LT		 3396 dma = ep->dma;
3397
3398 if (!dma)
3399 continue;
3400
3401 /* clear ep's dma status */
fae3c158
RRD		 3402 tmp = readl(&dma->dmastat);
3403 writel(tmp, &dma->dmastat);
1da177e4 3404
adc82f77 3405 /* dma sync*/
c2db8a8a 3406 if (dev->pdev->vendor == PCI_VENDOR_ID_PLX) {
adc82f77
RRD		 3407 u32 r_dmacount = readl(&dma->dmacount);
3408 if (!ep->is_in && (r_dmacount & 0x00FFFFFF) &&
3e76fdcb 3409 (tmp & BIT(DMA_TRANSACTION_DONE_INTERRUPT)))
adc82f77
RRD		 3410 continue;
3411 }
3412
1da177e4
LT		 3413 /* chaining should stop on abort, short OUT from fifo,
3414 * or (stat0 codepath) short OUT transfer.
3415 */
3416 if (!use_dma_chaining) {
3e76fdcb 3417 if (!(tmp & BIT(DMA_TRANSACTION_DONE_INTERRUPT))) {
e56e69cc 3418 ep_dbg(ep->dev, "%s no xact done? %08x\n",
1da177e4
LT		 3419 ep->ep.name, tmp);
3420 continue;
3421 }
fae3c158 3422 stop_dma(ep->dma);
1da177e4
LT		 3423 }
3424
3425 /* OUT transfers terminate when the data from the
3426 * host is in our memory. Process whatever's done.
3427 * On this path, we know transfer's last packet wasn't
3428 * less than req->length. NAK_OUT_PACKETS may be set,
3429 * or the FIFO may already be holding new packets.
3430 *
3431 * IN transfers can linger in the FIFO for a very
3432 * long time ... we ignore that for now, accounting
3433 * precisely (like PIO does) needs per-packet irqs
3434 */
fae3c158 3435 scan_dma_completions(ep);
1da177e4
LT		 3436
3437 /* disable dma on inactive queues; else maybe restart */
fae3c158 3438 if (list_empty(&ep->queue)) {
1da177e4 3439 if (use_dma_chaining)
fae3c158 3440 stop_dma(ep->dma);
1da177e4 3441 } else {
fae3c158 3442 tmp = readl(&dma->dmactl);
3e76fdcb 3443 if (!use_dma_chaining || (tmp & BIT(DMA_ENABLE)) == 0)
fae3c158 3444 restart_dma(ep);
1da177e4
LT		 3445 else if (ep->is_in && use_dma_chaining) {
3446 struct net2280_request *req;
320f3459 3447 __le32 dmacount;
1da177e4
LT		 3448
3449 /* the descriptor at the head of the chain
3450 * may still have VALID_BIT clear; that's
3451 * used to trigger changing DMA_FIFO_VALIDATE
3452 * (affects automagic zlp writes).
3453 */
fae3c158 3454 req = list_entry(ep->queue.next,
1da177e4
LT		 3455 struct net2280_request, queue);
3456 dmacount = req->td->dmacount;
3e76fdcb
RRD		 3457 dmacount &= cpu_to_le32(BIT(VALID_BIT) |
3458 DMA_BYTE_COUNT_MASK);
1da177e4 3459 if (dmacount && (dmacount & valid_bit) == 0)
fae3c158 3460 restart_dma(ep);
1da177e4
LT		 3461 }
3462 }
3463 ep->irqs++;
3464 }
3465
3466 /* NOTE: there are other PCI errors we might usefully notice.
3467 * if they appear very often, here's where to try recovering.
3468 */
3469 if (stat & PCI_ERROR_INTERRUPTS) {
e56e69cc 3470 ep_err(dev, "pci dma error; stat %08x\n", stat);
1da177e4
LT		 3471 stat &= ~PCI_ERROR_INTERRUPTS;
3472 /* these are fatal errors, but "maybe" they won't
3473 * happen again ...
3474 */
fae3c158
RRD		 3475 stop_activity(dev, dev->driver);
3476 ep0_start(dev);
1da177e4
LT		 3477 stat = 0;
3478 }
3479
3480 if (stat)
e56e69cc 3481 ep_dbg(dev, "unhandled irqstat1 %08x\n", stat);
1da177e4
LT		 3482}
3483
fae3c158 3484static irqreturn_t net2280_irq(int irq, void *_dev)
1da177e4
LT		 3485{
3486 struct net2280 *dev = _dev;
3487
658ad5e0 3488 /* shared interrupt, not ours */
c2db8a8a 3489 if (dev->pdev->vendor == PCI_VENDOR_ID_PLX_LEGACY &&
3e76fdcb 3490 (!(readl(&dev->regs->irqstat0) & BIT(INTA_ASSERTED))))
658ad5e0
AS		 3491 return IRQ_NONE;
3492
fae3c158 3493 spin_lock(&dev->lock);
1da177e4
LT		 3494
3495 /* handle disconnect, dma, and more */
fae3c158 3496 handle_stat1_irqs(dev, readl(&dev->regs->irqstat1));
1da177e4
LT		 3497
3498 /* control requests and PIO */
fae3c158 3499 handle_stat0_irqs(dev, readl(&dev->regs->irqstat0));
1da177e4 3500
c2db8a8a 3501 if (dev->pdev->vendor == PCI_VENDOR_ID_PLX) {
adc82f77
RRD		 3502 /* re-enable interrupt to trigger any possible new interrupt */
3503 u32 pciirqenb1 = readl(&dev->regs->pciirqenb1);
3504 writel(pciirqenb1 & 0x7FFFFFFF, &dev->regs->pciirqenb1);
3505 writel(pciirqenb1, &dev->regs->pciirqenb1);
3506 }
3507
fae3c158 3508 spin_unlock(&dev->lock);
1da177e4
LT		 3509
3510 return IRQ_HANDLED;
3511}
3512
3513/*-------------------------------------------------------------------------*/
3514
fae3c158 3515static void gadget_release(struct device *_dev)
1da177e4 3516{
fae3c158 3517 struct net2280 *dev = dev_get_drvdata(_dev);
1da177e4 3518
fae3c158 3519 kfree(dev);
1da177e4
LT		 3520}
3521
3522/* tear down the binding between this driver and the pci device */
3523
fae3c158 3524static void net2280_remove(struct pci_dev *pdev)
1da177e4 3525{
fae3c158 3526 struct net2280 *dev = pci_get_drvdata(pdev);
1da177e4 3527
0f91349b
SAS		 3528 usb_del_gadget_udc(&dev->gadget);
3529
6bea476c 3530 BUG_ON(dev->driver);
1da177e4
LT		 3531
3532 /* then clean up the resources we allocated during probe() */
fae3c158 3533 net2280_led_shutdown(dev);
1da177e4
LT		 3534 if (dev->requests) {
3535 int i;
3536 for (i = 1; i < 5; i++) {
fae3c158 3537 if (!dev->ep[i].dummy)
1da177e4 3538 continue;
fae3c158
RRD		 3539 pci_pool_free(dev->requests, dev->ep[i].dummy,
3540 dev->ep[i].td_dma);
1da177e4 3541 }
fae3c158 3542 pci_pool_destroy(dev->requests);
1da177e4
LT		 3543 }
3544 if (dev->got_irq)
fae3c158 3545 free_irq(pdev->irq, dev);
c2db8a8a 3546 if (use_msi && dev->pdev->vendor == PCI_VENDOR_ID_PLX)
adc82f77 3547 pci_disable_msi(pdev);
1da177e4 3548 if (dev->regs)
fae3c158 3549 iounmap(dev->regs);
1da177e4 3550 if (dev->region)
fae3c158
RRD		 3551 release_mem_region(pci_resource_start(pdev, 0),
3552 pci_resource_len(pdev, 0));
1da177e4 3553 if (dev->enabled)
fae3c158
RRD		 3554 pci_disable_device(pdev);
3555 device_remove_file(&pdev->dev, &dev_attr_registers);
1da177e4 3556
e56e69cc 3557 ep_info(dev, "unbind\n");
1da177e4
LT		 3558}
3559
3560/* wrap this driver around the specified device, but
3561 * don't respond over USB until a gadget driver binds to us.
3562 */
3563
fae3c158 3564static int net2280_probe(struct pci_dev *pdev, const struct pci_device_id *id)
1da177e4
LT		 3565{
3566 struct net2280 *dev;
3567 unsigned long resource, len;
3568 void __iomem *base = NULL;
3569 int retval, i;
1da177e4 3570
9a028e46
RRD		 3571 if (!use_dma)
3572 use_dma_chaining = 0;
3573
1da177e4 3574 /* alloc, and start init */
fae3c158
RRD		 3575 dev = kzalloc(sizeof(*dev), GFP_KERNEL);
3576 if (dev == NULL) {
1da177e4
LT		 3577 retval = -ENOMEM;
3578 goto done;
3579 }
3580
fae3c158
RRD		 3581 pci_set_drvdata(pdev, dev);
3582 spin_lock_init(&dev->lock);
1da177e4
LT		 3583 dev->pdev = pdev;
3584 dev->gadget.ops = &net2280_ops;
c2db8a8a 3585 dev->gadget.max_speed = (dev->pdev->vendor == PCI_VENDOR_ID_PLX) ?
adc82f77 3586 USB_SPEED_SUPER : USB_SPEED_HIGH;
1da177e4
LT		 3587
3588 /* the "gadget" abstracts/virtualizes the controller */
1da177e4
LT		 3589 dev->gadget.name = driver_name;
3590
3591 /* now all the pci goodies ... */
fae3c158
RRD		 3592 if (pci_enable_device(pdev) < 0) {
3593 retval = -ENODEV;
1da177e4
LT		 3594 goto done;
3595 }
3596 dev->enabled = 1;
3597
3598 /* BAR 0 holds all the registers
3599 * BAR 1 is 8051 memory; unused here (note erratum 0103)
3600 * BAR 2 is fifo memory; unused here
3601 */
fae3c158
RRD		 3602 resource = pci_resource_start(pdev, 0);
3603 len = pci_resource_len(pdev, 0);
3604 if (!request_mem_region(resource, len, driver_name)) {
e56e69cc 3605 ep_dbg(dev, "controller already in use\n");
1da177e4
LT		 3606 retval = -EBUSY;
3607 goto done;
3608 }
3609 dev->region = 1;
3610
901b3d75
DB		 3611 /* FIXME provide firmware download interface to put
3612 * 8051 code into the chip, e.g. to turn on PCI PM.
3613 */
3614
fae3c158 3615 base = ioremap_nocache(resource, len);
1da177e4 3616 if (base == NULL) {
e56e69cc 3617 ep_dbg(dev, "can't map memory\n");
1da177e4
LT		 3618 retval = -EFAULT;
3619 goto done;
3620 }
3621 dev->regs = (struct net2280_regs __iomem *) base;
3622 dev->usb = (struct net2280_usb_regs __iomem *) (base + 0x0080);
3623 dev->pci = (struct net2280_pci_regs __iomem *) (base + 0x0100);
3624 dev->dma = (struct net2280_dma_regs __iomem *) (base + 0x0180);
3625 dev->dep = (struct net2280_dep_regs __iomem *) (base + 0x0200);
3626 dev->epregs = (struct net2280_ep_regs __iomem *) (base + 0x0300);
3627
c2db8a8a 3628 if (dev->pdev->vendor == PCI_VENDOR_ID_PLX) {
adc82f77
RRD		 3629 u32 fsmvalue;
3630 u32 usbstat;
3631 dev->usb_ext = (struct usb338x_usb_ext_regs __iomem *)
3632 (base + 0x00b4);
3633 dev->fiforegs = (struct usb338x_fifo_regs __iomem *)
3634 (base + 0x0500);
3635 dev->llregs = (struct usb338x_ll_regs __iomem *)
3636 (base + 0x0700);
3637 dev->ll_lfps_regs = (struct usb338x_ll_lfps_regs __iomem *)
3638 (base + 0x0748);
3639 dev->ll_tsn_regs = (struct usb338x_ll_tsn_regs __iomem *)
3640 (base + 0x077c);
3641 dev->ll_chicken_reg = (struct usb338x_ll_chi_regs __iomem *)
3642 (base + 0x079c);
3643 dev->plregs = (struct usb338x_pl_regs __iomem *)
3644 (base + 0x0800);
3645 usbstat = readl(&dev->usb->usbstat);
fae3c158 3646 dev->enhanced_mode = !!(usbstat & BIT(11));
adc82f77
RRD		 3647 dev->n_ep = (dev->enhanced_mode) ? 9 : 5;
3648 /* put into initial config, link up all endpoints */
3649 fsmvalue = get_idx_reg(dev->regs, SCRATCH) &
3650 (0xf << DEFECT7374_FSM_FIELD);
3651 /* See if firmware needs to set up for workaround: */
3652 if (fsmvalue == DEFECT7374_FSM_SS_CONTROL_READ)
3653 writel(0, &dev->usb->usbctl);
3654 } else{
3655 dev->enhanced_mode = 0;
3656 dev->n_ep = 7;
3657 /* put into initial config, link up all endpoints */
3658 writel(0, &dev->usb->usbctl);
3659 }
3660
fae3c158
RRD		 3661 usb_reset(dev);
3662 usb_reinit(dev);
1da177e4
LT		 3663
3664 /* irq setup after old hardware is cleaned up */
3665 if (!pdev->irq) {
e56e69cc 3666 ep_err(dev, "No IRQ. Check PCI setup!\n");
1da177e4
LT		 3667 retval = -ENODEV;
3668 goto done;
3669 }
c6387a48 3670
c2db8a8a 3671 if (use_msi && dev->pdev->vendor == PCI_VENDOR_ID_PLX)
adc82f77 3672 if (pci_enable_msi(pdev))
e56e69cc 3673 ep_err(dev, "Failed to enable MSI mode\n");
adc82f77 3674
fae3c158
RRD		 3675 if (request_irq(pdev->irq, net2280_irq, IRQF_SHARED,
3676 driver_name, dev)) {
e56e69cc 3677 ep_err(dev, "request interrupt %d failed\n", pdev->irq);
1da177e4
LT		 3678 retval = -EBUSY;
3679 goto done;
3680 }
3681 dev->got_irq = 1;
3682
3683 /* DMA setup */
3684 /* NOTE: we know only the 32 LSBs of dma addresses may be nonzero */
fae3c158
RRD		 3685 dev->requests = pci_pool_create("requests", pdev,
3686 sizeof(struct net2280_dma),
1da177e4
LT		 3687 0 /* no alignment requirements */,
3688 0 /* or page-crossing issues */);
3689 if (!dev->requests) {
e56e69cc 3690 ep_dbg(dev, "can't get request pool\n");
1da177e4
LT		 3691 retval = -ENOMEM;
3692 goto done;
3693 }
3694 for (i = 1; i < 5; i++) {
3695 struct net2280_dma *td;
3696
fae3c158
RRD		 3697 td = pci_pool_alloc(dev->requests, GFP_KERNEL,
3698 &dev->ep[i].td_dma);
1da177e4 3699 if (!td) {
e56e69cc 3700 ep_dbg(dev, "can't get dummy %d\n", i);
1da177e4
LT		 3701 retval = -ENOMEM;
3702 goto done;
3703 }
3704 td->dmacount = 0; /* not VALID */
1da177e4 3705 td->dmadesc = td->dmaaddr;
fae3c158 3706 dev->ep[i].dummy = td;
1da177e4
LT		 3707 }
3708
3709 /* enable lower-overhead pci memory bursts during DMA */
c2db8a8a 3710 if (dev->pdev->vendor == PCI_VENDOR_ID_PLX_LEGACY)
3e76fdcb
RRD		 3711 writel(BIT(DMA_MEMORY_WRITE_AND_INVALIDATE_ENABLE) |
3712 /*
3713 * 256 write retries may not be enough...
3714 BIT(PCI_RETRY_ABORT_ENABLE) |
3715 */
3716 BIT(DMA_READ_MULTIPLE_ENABLE) |
3717 BIT(DMA_READ_LINE_ENABLE),
3718 &dev->pci->pcimstctl);
1da177e4 3719 /* erratum 0115 shouldn't appear: Linux inits PCI_LATENCY_TIMER */
fae3c158
RRD		 3720 pci_set_master(pdev);
3721 pci_try_set_mwi(pdev);
1da177e4
LT		 3722
3723 /* ... also flushes any posted pci writes */
fae3c158 3724 dev->chiprev = get_idx_reg(dev->regs, REG_CHIPREV) & 0xffff;
1da177e4
LT		 3725
3726 /* done */
e56e69cc
RRD		 3727 ep_info(dev, "%s\n", driver_desc);
3728 ep_info(dev, "irq %d, pci mem %p, chip rev %04x\n",
c6387a48 3729 pdev->irq, base, dev->chiprev);
e56e69cc 3730 ep_info(dev, "version: " DRIVER_VERSION "; dma %s %s\n",
adc82f77
RRD		 3731 use_dma ? (use_dma_chaining ? "chaining" : "enabled")
3732 : "disabled",
3733 dev->enhanced_mode ? "enhanced mode" : "legacy mode");
fae3c158
RRD		 3734 retval = device_create_file(&pdev->dev, &dev_attr_registers);
3735 if (retval)
3736 goto done;
1da177e4 3737
2901df68
FB		 3738 retval = usb_add_gadget_udc_release(&pdev->dev, &dev->gadget,
3739 gadget_release);
0f91349b
SAS		 3740 if (retval)
3741 goto done;
1da177e4
LT		 3742 return 0;
3743
3744done:
3745 if (dev)
fae3c158 3746 net2280_remove(pdev);
1da177e4
LT		 3747 return retval;
3748}
3749
2d61bde7
AS		 3750/* make sure the board is quiescent; otherwise it will continue
3751 * generating IRQs across the upcoming reboot.
3752 */
3753
fae3c158 3754static void net2280_shutdown(struct pci_dev *pdev)
2d61bde7 3755{
fae3c158 3756 struct net2280 *dev = pci_get_drvdata(pdev);
2d61bde7
AS		 3757
3758 /* disable IRQs */
fae3c158
RRD		 3759 writel(0, &dev->regs->pciirqenb0);
3760 writel(0, &dev->regs->pciirqenb1);
2d61bde7
AS		 3761
3762 /* disable the pullup so the host will think we're gone */
fae3c158 3763 writel(0, &dev->usb->usbctl);
2f076077
AS		 3764
3765 /* Disable full-speed test mode */
c2db8a8a 3766 if (dev->pdev->vendor == PCI_VENDOR_ID_PLX_LEGACY)
adc82f77 3767 writel(0, &dev->usb->xcvrdiag);
2d61bde7
AS		 3768}
3769
1da177e4
LT		 3770
3771/*-------------------------------------------------------------------------*/
3772
fae3c158 3773static const struct pci_device_id pci_ids[] = { {
901b3d75
DB		 3774 .class = ((PCI_CLASS_SERIAL_USB << 8) | 0xfe),
3775 .class_mask = ~0,
c2db8a8a 3776 .vendor = PCI_VENDOR_ID_PLX_LEGACY,
1da177e4
LT		 3777 .device = 0x2280,
3778 .subvendor = PCI_ANY_ID,
3779 .subdevice = PCI_ANY_ID,
ae8e530a 3780 }, {
901b3d75
DB		 3781 .class = ((PCI_CLASS_SERIAL_USB << 8) | 0xfe),
3782 .class_mask = ~0,
c2db8a8a 3783 .vendor = PCI_VENDOR_ID_PLX_LEGACY,
950ee4c8
GL		 3784 .device = 0x2282,
3785 .subvendor = PCI_ANY_ID,
3786 .subdevice = PCI_ANY_ID,
ae8e530a 3787 },
adc82f77 3788 {
ae8e530a
RRD		 3789 .class = ((PCI_CLASS_SERIAL_USB << 8) | 0xfe),
3790 .class_mask = ~0,
3791 .vendor = PCI_VENDOR_ID_PLX,
3792 .device = 0x3380,
3793 .subvendor = PCI_ANY_ID,
3794 .subdevice = PCI_ANY_ID,
adc82f77
RRD		 3795 },
3796 {
ae8e530a
RRD		 3797 .class = ((PCI_CLASS_SERIAL_USB << 8) | 0xfe),
3798 .class_mask = ~0,
3799 .vendor = PCI_VENDOR_ID_PLX,
3800 .device = 0x3382,
3801 .subvendor = PCI_ANY_ID,
3802 .subdevice = PCI_ANY_ID,
adc82f77
RRD		 3803 },
3804{ /* end: all zeroes */ }
1da177e4 3805};
fae3c158 3806MODULE_DEVICE_TABLE(pci, pci_ids);
1da177e4
LT		 3807
3808/* pci driver glue; this is a "new style" PCI driver module */
3809static struct pci_driver net2280_pci_driver = {
3810 .name = (char *) driver_name,
3811 .id_table = pci_ids,
3812
3813 .probe = net2280_probe,
3814 .remove = net2280_remove,
2d61bde7 3815 .shutdown = net2280_shutdown,
1da177e4
LT		 3816
3817 /* FIXME add power management support */
3818};
3819
9a028e46
RRD		 3820module_pci_driver(net2280_pci_driver);
3821
fae3c158
RRD		 3822MODULE_DESCRIPTION(DRIVER_DESC);
3823MODULE_AUTHOR("David Brownell");
3824MODULE_LICENSE("GPL");
Linux kernel - Deliverables
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