Merge remote-tracking branch 'usb/usb-next'
[deliverable/linux.git] / drivers / usb / host / max3421-hcd.c
CommitLineData
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1/*
2 * MAX3421 Host Controller driver for USB.
3 *
4 * Author: David Mosberger-Tang <davidm@egauge.net>
5 *
6 * (C) Copyright 2014 David Mosberger-Tang <davidm@egauge.net>
7 *
8 * MAX3421 is a chip implementing a USB 2.0 Full-/Low-Speed host
9 * controller on a SPI bus.
10 *
11 * Based on:
12 * o MAX3421E datasheet
13 * http://datasheets.maximintegrated.com/en/ds/MAX3421E.pdf
14 * o MAX3421E Programming Guide
15 * http://www.hdl.co.jp/ftpdata/utl-001/AN3785.pdf
16 * o gadget/dummy_hcd.c
17 * For USB HCD implementation.
18 * o Arduino MAX3421 driver
19 * https://github.com/felis/USB_Host_Shield_2.0/blob/master/Usb.cpp
20 *
21 * This file is licenced under the GPL v2.
22 *
23 * Important note on worst-case (full-speed) packet size constraints
24 * (See USB 2.0 Section 5.6.3 and following):
25 *
26 * - control: 64 bytes
27 * - isochronous: 1023 bytes
28 * - interrupt: 64 bytes
29 * - bulk: 64 bytes
30 *
31 * Since the MAX3421 FIFO size is 64 bytes, we do not have to work about
32 * multi-FIFO writes/reads for a single USB packet *except* for isochronous
33 * transfers. We don't support isochronous transfers at this time, so we
34 * just assume that a USB packet always fits into a single FIFO buffer.
35 *
36 * NOTE: The June 2006 version of "MAX3421E Programming Guide"
37 * (AN3785) has conflicting info for the RCVDAVIRQ bit:
38 *
39 * The description of RCVDAVIRQ says "The CPU *must* clear
40 * this IRQ bit (by writing a 1 to it) before reading the
41 * RCVFIFO data.
42 *
43 * However, the earlier section on "Programming BULK-IN
44 * Transfers" says * that:
45 *
46 * After the CPU retrieves the data, it clears the
47 * RCVDAVIRQ bit.
48 *
49 * The December 2006 version has been corrected and it consistently
50 * states the second behavior is the correct one.
51 *
52 * Synchronous SPI transactions sleep so we can't perform any such
53 * transactions while holding a spin-lock (and/or while interrupts are
54 * masked). To achieve this, all SPI transactions are issued from a
55 * single thread (max3421_spi_thread).
56 */
57
788bfe88 58#include <linux/jiffies.h>
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59#include <linux/module.h>
60#include <linux/spi/spi.h>
61#include <linux/usb.h>
62#include <linux/usb/hcd.h>
63
64#include <linux/platform_data/max3421-hcd.h>
65
66#define DRIVER_DESC "MAX3421 USB Host-Controller Driver"
67#define DRIVER_VERSION "1.0"
68
69/* 11-bit counter that wraps around (USB 2.0 Section 8.3.3): */
70#define USB_MAX_FRAME_NUMBER 0x7ff
71#define USB_MAX_RETRIES 3 /* # of retries before error is reported */
72
73/*
74 * Max. # of times we're willing to retransmit a request immediately in
75 * resposne to a NAK. Afterwards, we fall back on trying once a frame.
76 */
77#define NAK_MAX_FAST_RETRANSMITS 2
78
79#define POWER_BUDGET 500 /* in mA; use 8 for low-power port testing */
80
81/* Port-change mask: */
82#define PORT_C_MASK ((USB_PORT_STAT_C_CONNECTION | \
83 USB_PORT_STAT_C_ENABLE | \
84 USB_PORT_STAT_C_SUSPEND | \
85 USB_PORT_STAT_C_OVERCURRENT | \
86 USB_PORT_STAT_C_RESET) << 16)
87
88enum max3421_rh_state {
89 MAX3421_RH_RESET,
90 MAX3421_RH_SUSPENDED,
91 MAX3421_RH_RUNNING
92};
93
94enum pkt_state {
95 PKT_STATE_SETUP, /* waiting to send setup packet to ctrl pipe */
96 PKT_STATE_TRANSFER, /* waiting to xfer transfer_buffer */
97 PKT_STATE_TERMINATE /* waiting to terminate control transfer */
98};
99
100enum scheduling_pass {
101 SCHED_PASS_PERIODIC,
102 SCHED_PASS_NON_PERIODIC,
103 SCHED_PASS_DONE
104};
105
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106/* Bit numbers for max3421_hcd->todo: */
107enum {
108 ENABLE_IRQ = 0,
109 RESET_HCD,
110 RESET_PORT,
111 CHECK_UNLINK,
112 IOPIN_UPDATE
113};
114
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115struct max3421_dma_buf {
116 u8 data[2];
117};
118
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119struct max3421_hcd {
120 spinlock_t lock;
121
122 struct task_struct *spi_thread;
123
124 struct max3421_hcd *next;
125
126 enum max3421_rh_state rh_state;
127 /* lower 16 bits contain port status, upper 16 bits the change mask: */
128 u32 port_status;
129
130 unsigned active:1;
131
132 struct list_head ep_list; /* list of EP's with work */
133
134 /*
135 * The following are owned by spi_thread (may be accessed by
136 * SPI-thread without acquiring the HCD lock:
137 */
138 u8 rev; /* chip revision */
139 u16 frame_number;
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140 /*
141 * kmalloc'd buffers guaranteed to be in separate (DMA)
142 * cache-lines:
143 */
144 struct max3421_dma_buf *tx;
145 struct max3421_dma_buf *rx;
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146 /*
147 * URB we're currently processing. Must not be reset to NULL
148 * unless MAX3421E chip is idle:
149 */
150 struct urb *curr_urb;
151 enum scheduling_pass sched_pass;
152 struct usb_device *loaded_dev; /* dev that's loaded into the chip */
153 int loaded_epnum; /* epnum whose toggles are loaded */
154 int urb_done; /* > 0 -> no errors, < 0: errno */
155 size_t curr_len;
156 u8 hien;
157 u8 mode;
158 u8 iopins[2];
2eb5dbdd 159 unsigned long todo;
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160#ifdef DEBUG
161 unsigned long err_stat[16];
162#endif
163};
164
165struct max3421_ep {
166 struct usb_host_endpoint *ep;
167 struct list_head ep_list;
168 u32 naks;
169 u16 last_active; /* frame # this ep was last active */
170 enum pkt_state pkt_state;
171 u8 retries;
172 u8 retransmit; /* packet needs retransmission */
173};
174
175static struct max3421_hcd *max3421_hcd_list;
176
177#define MAX3421_FIFO_SIZE 64
178
179#define MAX3421_SPI_DIR_RD 0 /* read register from MAX3421 */
180#define MAX3421_SPI_DIR_WR 1 /* write register to MAX3421 */
181
182/* SPI commands: */
183#define MAX3421_SPI_DIR_SHIFT 1
184#define MAX3421_SPI_REG_SHIFT 3
185
186#define MAX3421_REG_RCVFIFO 1
187#define MAX3421_REG_SNDFIFO 2
188#define MAX3421_REG_SUDFIFO 4
189#define MAX3421_REG_RCVBC 6
190#define MAX3421_REG_SNDBC 7
191#define MAX3421_REG_USBIRQ 13
192#define MAX3421_REG_USBIEN 14
193#define MAX3421_REG_USBCTL 15
194#define MAX3421_REG_CPUCTL 16
195#define MAX3421_REG_PINCTL 17
196#define MAX3421_REG_REVISION 18
197#define MAX3421_REG_IOPINS1 20
198#define MAX3421_REG_IOPINS2 21
199#define MAX3421_REG_GPINIRQ 22
200#define MAX3421_REG_GPINIEN 23
201#define MAX3421_REG_GPINPOL 24
202#define MAX3421_REG_HIRQ 25
203#define MAX3421_REG_HIEN 26
204#define MAX3421_REG_MODE 27
205#define MAX3421_REG_PERADDR 28
206#define MAX3421_REG_HCTL 29
207#define MAX3421_REG_HXFR 30
208#define MAX3421_REG_HRSL 31
209
210enum {
211 MAX3421_USBIRQ_OSCOKIRQ_BIT = 0,
212 MAX3421_USBIRQ_NOVBUSIRQ_BIT = 5,
213 MAX3421_USBIRQ_VBUSIRQ_BIT
214};
215
216enum {
217 MAX3421_CPUCTL_IE_BIT = 0,
218 MAX3421_CPUCTL_PULSEWID0_BIT = 6,
219 MAX3421_CPUCTL_PULSEWID1_BIT
220};
221
222enum {
223 MAX3421_USBCTL_PWRDOWN_BIT = 4,
224 MAX3421_USBCTL_CHIPRES_BIT
225};
226
227enum {
228 MAX3421_PINCTL_GPXA_BIT = 0,
229 MAX3421_PINCTL_GPXB_BIT,
230 MAX3421_PINCTL_POSINT_BIT,
231 MAX3421_PINCTL_INTLEVEL_BIT,
232 MAX3421_PINCTL_FDUPSPI_BIT,
233 MAX3421_PINCTL_EP0INAK_BIT,
234 MAX3421_PINCTL_EP2INAK_BIT,
235 MAX3421_PINCTL_EP3INAK_BIT,
236};
237
238enum {
239 MAX3421_HI_BUSEVENT_BIT = 0, /* bus-reset/-resume */
240 MAX3421_HI_RWU_BIT, /* remote wakeup */
241 MAX3421_HI_RCVDAV_BIT, /* receive FIFO data available */
242 MAX3421_HI_SNDBAV_BIT, /* send buffer available */
243 MAX3421_HI_SUSDN_BIT, /* suspend operation done */
244 MAX3421_HI_CONDET_BIT, /* peripheral connect/disconnect */
245 MAX3421_HI_FRAME_BIT, /* frame generator */
246 MAX3421_HI_HXFRDN_BIT, /* host transfer done */
247};
248
249enum {
250 MAX3421_HCTL_BUSRST_BIT = 0,
251 MAX3421_HCTL_FRMRST_BIT,
252 MAX3421_HCTL_SAMPLEBUS_BIT,
253 MAX3421_HCTL_SIGRSM_BIT,
254 MAX3421_HCTL_RCVTOG0_BIT,
255 MAX3421_HCTL_RCVTOG1_BIT,
256 MAX3421_HCTL_SNDTOG0_BIT,
257 MAX3421_HCTL_SNDTOG1_BIT
258};
259
260enum {
261 MAX3421_MODE_HOST_BIT = 0,
262 MAX3421_MODE_LOWSPEED_BIT,
263 MAX3421_MODE_HUBPRE_BIT,
264 MAX3421_MODE_SOFKAENAB_BIT,
265 MAX3421_MODE_SEPIRQ_BIT,
266 MAX3421_MODE_DELAYISO_BIT,
267 MAX3421_MODE_DMPULLDN_BIT,
268 MAX3421_MODE_DPPULLDN_BIT
269};
270
271enum {
272 MAX3421_HRSL_OK = 0,
273 MAX3421_HRSL_BUSY,
274 MAX3421_HRSL_BADREQ,
275 MAX3421_HRSL_UNDEF,
276 MAX3421_HRSL_NAK,
277 MAX3421_HRSL_STALL,
278 MAX3421_HRSL_TOGERR,
279 MAX3421_HRSL_WRONGPID,
280 MAX3421_HRSL_BADBC,
281 MAX3421_HRSL_PIDERR,
282 MAX3421_HRSL_PKTERR,
283 MAX3421_HRSL_CRCERR,
284 MAX3421_HRSL_KERR,
285 MAX3421_HRSL_JERR,
286 MAX3421_HRSL_TIMEOUT,
287 MAX3421_HRSL_BABBLE,
288 MAX3421_HRSL_RESULT_MASK = 0xf,
289 MAX3421_HRSL_RCVTOGRD_BIT = 4,
290 MAX3421_HRSL_SNDTOGRD_BIT,
291 MAX3421_HRSL_KSTATUS_BIT,
292 MAX3421_HRSL_JSTATUS_BIT
293};
294
295/* Return same error-codes as ohci.h:cc_to_error: */
296static const int hrsl_to_error[] = {
297 [MAX3421_HRSL_OK] = 0,
298 [MAX3421_HRSL_BUSY] = -EINVAL,
299 [MAX3421_HRSL_BADREQ] = -EINVAL,
300 [MAX3421_HRSL_UNDEF] = -EINVAL,
301 [MAX3421_HRSL_NAK] = -EAGAIN,
302 [MAX3421_HRSL_STALL] = -EPIPE,
303 [MAX3421_HRSL_TOGERR] = -EILSEQ,
304 [MAX3421_HRSL_WRONGPID] = -EPROTO,
305 [MAX3421_HRSL_BADBC] = -EREMOTEIO,
306 [MAX3421_HRSL_PIDERR] = -EPROTO,
307 [MAX3421_HRSL_PKTERR] = -EPROTO,
308 [MAX3421_HRSL_CRCERR] = -EILSEQ,
309 [MAX3421_HRSL_KERR] = -EIO,
310 [MAX3421_HRSL_JERR] = -EIO,
311 [MAX3421_HRSL_TIMEOUT] = -ETIME,
312 [MAX3421_HRSL_BABBLE] = -EOVERFLOW
313};
314
315/*
316 * See http://www.beyondlogic.org/usbnutshell/usb4.shtml#Control for a
317 * reasonable overview of how control transfers use the the IN/OUT
318 * tokens.
319 */
320#define MAX3421_HXFR_BULK_IN(ep) (0x00 | (ep)) /* bulk or interrupt */
321#define MAX3421_HXFR_SETUP 0x10
322#define MAX3421_HXFR_BULK_OUT(ep) (0x20 | (ep)) /* bulk or interrupt */
323#define MAX3421_HXFR_ISO_IN(ep) (0x40 | (ep))
324#define MAX3421_HXFR_ISO_OUT(ep) (0x60 | (ep))
325#define MAX3421_HXFR_HS_IN 0x80 /* handshake in */
326#define MAX3421_HXFR_HS_OUT 0xa0 /* handshake out */
327
328#define field(val, bit) ((val) << (bit))
329
330static inline s16
331frame_diff(u16 left, u16 right)
332{
333 return ((unsigned) (left - right)) % (USB_MAX_FRAME_NUMBER + 1);
334}
335
336static inline struct max3421_hcd *
337hcd_to_max3421(struct usb_hcd *hcd)
338{
339 return (struct max3421_hcd *) hcd->hcd_priv;
340}
341
342static inline struct usb_hcd *
343max3421_to_hcd(struct max3421_hcd *max3421_hcd)
344{
345 return container_of((void *) max3421_hcd, struct usb_hcd, hcd_priv);
346}
347
348static u8
349spi_rd8(struct usb_hcd *hcd, unsigned int reg)
350{
05dfa5c9 351 struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
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352 struct spi_device *spi = to_spi_device(hcd->self.controller);
353 struct spi_transfer transfer;
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354 struct spi_message msg;
355
356 memset(&transfer, 0, sizeof(transfer));
357
358 spi_message_init(&msg);
359
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360 max3421_hcd->tx->data[0] =
361 (field(reg, MAX3421_SPI_REG_SHIFT) |
362 field(MAX3421_SPI_DIR_RD, MAX3421_SPI_DIR_SHIFT));
2d53139f 363
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364 transfer.tx_buf = max3421_hcd->tx->data;
365 transfer.rx_buf = max3421_hcd->rx->data;
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366 transfer.len = 2;
367
368 spi_message_add_tail(&transfer, &msg);
369 spi_sync(spi, &msg);
370
05dfa5c9 371 return max3421_hcd->rx->data[1];
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372}
373
374static void
375spi_wr8(struct usb_hcd *hcd, unsigned int reg, u8 val)
376{
377 struct spi_device *spi = to_spi_device(hcd->self.controller);
05dfa5c9 378 struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
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379 struct spi_transfer transfer;
380 struct spi_message msg;
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381
382 memset(&transfer, 0, sizeof(transfer));
383
384 spi_message_init(&msg);
385
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386 max3421_hcd->tx->data[0] =
387 (field(reg, MAX3421_SPI_REG_SHIFT) |
388 field(MAX3421_SPI_DIR_WR, MAX3421_SPI_DIR_SHIFT));
389 max3421_hcd->tx->data[1] = val;
2d53139f 390
05dfa5c9 391 transfer.tx_buf = max3421_hcd->tx->data;
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392 transfer.len = 2;
393
394 spi_message_add_tail(&transfer, &msg);
395 spi_sync(spi, &msg);
396}
397
398static void
399spi_rd_buf(struct usb_hcd *hcd, unsigned int reg, void *buf, size_t len)
400{
401 struct spi_device *spi = to_spi_device(hcd->self.controller);
05dfa5c9 402 struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
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403 struct spi_transfer transfer[2];
404 struct spi_message msg;
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405
406 memset(transfer, 0, sizeof(transfer));
407
408 spi_message_init(&msg);
409
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410 max3421_hcd->tx->data[0] =
411 (field(reg, MAX3421_SPI_REG_SHIFT) |
412 field(MAX3421_SPI_DIR_RD, MAX3421_SPI_DIR_SHIFT));
413 transfer[0].tx_buf = max3421_hcd->tx->data;
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414 transfer[0].len = 1;
415
416 transfer[1].rx_buf = buf;
417 transfer[1].len = len;
418
419 spi_message_add_tail(&transfer[0], &msg);
420 spi_message_add_tail(&transfer[1], &msg);
421 spi_sync(spi, &msg);
422}
423
424static void
425spi_wr_buf(struct usb_hcd *hcd, unsigned int reg, void *buf, size_t len)
426{
427 struct spi_device *spi = to_spi_device(hcd->self.controller);
05dfa5c9 428 struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
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429 struct spi_transfer transfer[2];
430 struct spi_message msg;
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431
432 memset(transfer, 0, sizeof(transfer));
433
434 spi_message_init(&msg);
435
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DMT
436 max3421_hcd->tx->data[0] =
437 (field(reg, MAX3421_SPI_REG_SHIFT) |
438 field(MAX3421_SPI_DIR_WR, MAX3421_SPI_DIR_SHIFT));
2d53139f 439
05dfa5c9 440 transfer[0].tx_buf = max3421_hcd->tx->data;
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441 transfer[0].len = 1;
442
443 transfer[1].tx_buf = buf;
444 transfer[1].len = len;
445
446 spi_message_add_tail(&transfer[0], &msg);
447 spi_message_add_tail(&transfer[1], &msg);
448 spi_sync(spi, &msg);
449}
450
451/*
452 * Figure out the correct setting for the LOWSPEED and HUBPRE mode
453 * bits. The HUBPRE bit needs to be set when MAX3421E operates at
454 * full speed, but it's talking to a low-speed device (i.e., through a
455 * hub). Setting that bit ensures that every low-speed packet is
456 * preceded by a full-speed PRE PID. Possible configurations:
457 *
458 * Hub speed: Device speed: => LOWSPEED bit: HUBPRE bit:
459 * FULL FULL => 0 0
460 * FULL LOW => 1 1
461 * LOW LOW => 1 0
462 * LOW FULL => 1 0
463 */
464static void
465max3421_set_speed(struct usb_hcd *hcd, struct usb_device *dev)
466{
467 struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
468 u8 mode_lowspeed, mode_hubpre, mode = max3421_hcd->mode;
469
470 mode_lowspeed = BIT(MAX3421_MODE_LOWSPEED_BIT);
471 mode_hubpre = BIT(MAX3421_MODE_HUBPRE_BIT);
472 if (max3421_hcd->port_status & USB_PORT_STAT_LOW_SPEED) {
473 mode |= mode_lowspeed;
474 mode &= ~mode_hubpre;
475 } else if (dev->speed == USB_SPEED_LOW) {
476 mode |= mode_lowspeed | mode_hubpre;
477 } else {
478 mode &= ~(mode_lowspeed | mode_hubpre);
479 }
480 if (mode != max3421_hcd->mode) {
481 max3421_hcd->mode = mode;
482 spi_wr8(hcd, MAX3421_REG_MODE, max3421_hcd->mode);
483 }
484
485}
486
487/*
488 * Caller must NOT hold HCD spinlock.
489 */
490static void
491max3421_set_address(struct usb_hcd *hcd, struct usb_device *dev, int epnum,
492 int force_toggles)
493{
494 struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
495 int old_epnum, same_ep, rcvtog, sndtog;
496 struct usb_device *old_dev;
497 u8 hctl;
498
499 old_dev = max3421_hcd->loaded_dev;
500 old_epnum = max3421_hcd->loaded_epnum;
501
502 same_ep = (dev == old_dev && epnum == old_epnum);
503 if (same_ep && !force_toggles)
504 return;
505
506 if (old_dev && !same_ep) {
507 /* save the old end-points toggles: */
508 u8 hrsl = spi_rd8(hcd, MAX3421_REG_HRSL);
509
510 rcvtog = (hrsl >> MAX3421_HRSL_RCVTOGRD_BIT) & 1;
511 sndtog = (hrsl >> MAX3421_HRSL_SNDTOGRD_BIT) & 1;
512
513 /* no locking: HCD (i.e., we) own toggles, don't we? */
514 usb_settoggle(old_dev, old_epnum, 0, rcvtog);
515 usb_settoggle(old_dev, old_epnum, 1, sndtog);
516 }
517 /* setup new endpoint's toggle bits: */
518 rcvtog = usb_gettoggle(dev, epnum, 0);
519 sndtog = usb_gettoggle(dev, epnum, 1);
520 hctl = (BIT(rcvtog + MAX3421_HCTL_RCVTOG0_BIT) |
521 BIT(sndtog + MAX3421_HCTL_SNDTOG0_BIT));
522
523 max3421_hcd->loaded_epnum = epnum;
524 spi_wr8(hcd, MAX3421_REG_HCTL, hctl);
525
526 /*
527 * Note: devnum for one and the same device can change during
528 * address-assignment so it's best to just always load the
529 * address whenever the end-point changed/was forced.
530 */
531 max3421_hcd->loaded_dev = dev;
532 spi_wr8(hcd, MAX3421_REG_PERADDR, dev->devnum);
533}
534
535static int
536max3421_ctrl_setup(struct usb_hcd *hcd, struct urb *urb)
537{
538 spi_wr_buf(hcd, MAX3421_REG_SUDFIFO, urb->setup_packet, 8);
539 return MAX3421_HXFR_SETUP;
540}
541
542static int
543max3421_transfer_in(struct usb_hcd *hcd, struct urb *urb)
544{
545 struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
546 int epnum = usb_pipeendpoint(urb->pipe);
547
548 max3421_hcd->curr_len = 0;
549 max3421_hcd->hien |= BIT(MAX3421_HI_RCVDAV_BIT);
550 return MAX3421_HXFR_BULK_IN(epnum);
551}
552
553static int
554max3421_transfer_out(struct usb_hcd *hcd, struct urb *urb, int fast_retransmit)
555{
556 struct spi_device *spi = to_spi_device(hcd->self.controller);
557 struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
558 int epnum = usb_pipeendpoint(urb->pipe);
559 u32 max_packet;
560 void *src;
561
562 src = urb->transfer_buffer + urb->actual_length;
563
564 if (fast_retransmit) {
565 if (max3421_hcd->rev == 0x12) {
566 /* work around rev 0x12 bug: */
567 spi_wr8(hcd, MAX3421_REG_SNDBC, 0);
568 spi_wr8(hcd, MAX3421_REG_SNDFIFO, ((u8 *) src)[0]);
569 spi_wr8(hcd, MAX3421_REG_SNDBC, max3421_hcd->curr_len);
570 }
571 return MAX3421_HXFR_BULK_OUT(epnum);
572 }
573
574 max_packet = usb_maxpacket(urb->dev, urb->pipe, 1);
575
576 if (max_packet > MAX3421_FIFO_SIZE) {
577 /*
578 * We do not support isochronous transfers at this
579 * time.
580 */
581 dev_err(&spi->dev,
582 "%s: packet-size of %u too big (limit is %u bytes)",
583 __func__, max_packet, MAX3421_FIFO_SIZE);
584 max3421_hcd->urb_done = -EMSGSIZE;
585 return -EMSGSIZE;
586 }
587 max3421_hcd->curr_len = min((urb->transfer_buffer_length -
588 urb->actual_length), max_packet);
589
590 spi_wr_buf(hcd, MAX3421_REG_SNDFIFO, src, max3421_hcd->curr_len);
591 spi_wr8(hcd, MAX3421_REG_SNDBC, max3421_hcd->curr_len);
592 return MAX3421_HXFR_BULK_OUT(epnum);
593}
594
595/*
596 * Issue the next host-transfer command.
597 * Caller must NOT hold HCD spinlock.
598 */
599static void
600max3421_next_transfer(struct usb_hcd *hcd, int fast_retransmit)
601{
602 struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
603 struct urb *urb = max3421_hcd->curr_urb;
f9da25c7 604 struct max3421_ep *max3421_ep;
2d53139f
DM
605 int cmd = -EINVAL;
606
607 if (!urb)
608 return; /* nothing to do */
609
f9da25c7
DMT
610 max3421_ep = urb->ep->hcpriv;
611
2d53139f
DM
612 switch (max3421_ep->pkt_state) {
613 case PKT_STATE_SETUP:
614 cmd = max3421_ctrl_setup(hcd, urb);
615 break;
616
617 case PKT_STATE_TRANSFER:
618 if (usb_urb_dir_in(urb))
619 cmd = max3421_transfer_in(hcd, urb);
620 else
621 cmd = max3421_transfer_out(hcd, urb, fast_retransmit);
622 break;
623
624 case PKT_STATE_TERMINATE:
625 /*
626 * IN transfers are terminated with HS_OUT token,
627 * OUT transfers with HS_IN:
628 */
629 if (usb_urb_dir_in(urb))
630 cmd = MAX3421_HXFR_HS_OUT;
631 else
632 cmd = MAX3421_HXFR_HS_IN;
633 break;
634 }
635
636 if (cmd < 0)
637 return;
638
639 /* issue the command and wait for host-xfer-done interrupt: */
640
641 spi_wr8(hcd, MAX3421_REG_HXFR, cmd);
642 max3421_hcd->hien |= BIT(MAX3421_HI_HXFRDN_BIT);
643}
644
645/*
646 * Find the next URB to process and start its execution.
647 *
648 * At this time, we do not anticipate ever connecting a USB hub to the
649 * MAX3421 chip, so at most USB device can be connected and we can use
650 * a simplistic scheduler: at the start of a frame, schedule all
651 * periodic transfers. Once that is done, use the remainder of the
652 * frame to process non-periodic (bulk & control) transfers.
653 *
654 * Preconditions:
655 * o Caller must NOT hold HCD spinlock.
656 * o max3421_hcd->curr_urb MUST BE NULL.
657 * o MAX3421E chip must be idle.
658 */
659static int
660max3421_select_and_start_urb(struct usb_hcd *hcd)
661{
662 struct spi_device *spi = to_spi_device(hcd->self.controller);
663 struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
664 struct urb *urb, *curr_urb = NULL;
665 struct max3421_ep *max3421_ep;
666 int epnum, force_toggles = 0;
667 struct usb_host_endpoint *ep;
668 struct list_head *pos;
669 unsigned long flags;
670
671 spin_lock_irqsave(&max3421_hcd->lock, flags);
672
673 for (;
674 max3421_hcd->sched_pass < SCHED_PASS_DONE;
675 ++max3421_hcd->sched_pass)
676 list_for_each(pos, &max3421_hcd->ep_list) {
677 urb = NULL;
678 max3421_ep = container_of(pos, struct max3421_ep,
679 ep_list);
680 ep = max3421_ep->ep;
681
682 switch (usb_endpoint_type(&ep->desc)) {
683 case USB_ENDPOINT_XFER_ISOC:
684 case USB_ENDPOINT_XFER_INT:
685 if (max3421_hcd->sched_pass !=
686 SCHED_PASS_PERIODIC)
687 continue;
688 break;
689
690 case USB_ENDPOINT_XFER_CONTROL:
691 case USB_ENDPOINT_XFER_BULK:
692 if (max3421_hcd->sched_pass !=
693 SCHED_PASS_NON_PERIODIC)
694 continue;
695 break;
696 }
697
698 if (list_empty(&ep->urb_list))
699 continue; /* nothing to do */
700 urb = list_first_entry(&ep->urb_list, struct urb,
701 urb_list);
702 if (urb->unlinked) {
703 dev_dbg(&spi->dev, "%s: URB %p unlinked=%d",
704 __func__, urb, urb->unlinked);
705 max3421_hcd->curr_urb = urb;
706 max3421_hcd->urb_done = 1;
707 spin_unlock_irqrestore(&max3421_hcd->lock,
708 flags);
709 return 1;
710 }
711
712 switch (usb_endpoint_type(&ep->desc)) {
713 case USB_ENDPOINT_XFER_CONTROL:
714 /*
715 * Allow one control transaction per
716 * frame per endpoint:
717 */
718 if (frame_diff(max3421_ep->last_active,
719 max3421_hcd->frame_number) == 0)
720 continue;
721 break;
722
723 case USB_ENDPOINT_XFER_BULK:
724 if (max3421_ep->retransmit
725 && (frame_diff(max3421_ep->last_active,
726 max3421_hcd->frame_number)
727 == 0))
728 /*
729 * We already tried this EP
730 * during this frame and got a
731 * NAK or error; wait for next frame
732 */
733 continue;
734 break;
735
736 case USB_ENDPOINT_XFER_ISOC:
737 case USB_ENDPOINT_XFER_INT:
738 if (frame_diff(max3421_hcd->frame_number,
739 max3421_ep->last_active)
740 < urb->interval)
741 /*
742 * We already processed this
743 * end-point in the current
744 * frame
745 */
746 continue;
747 break;
748 }
749
750 /* move current ep to tail: */
751 list_move_tail(pos, &max3421_hcd->ep_list);
752 curr_urb = urb;
753 goto done;
754 }
755done:
756 if (!curr_urb) {
757 spin_unlock_irqrestore(&max3421_hcd->lock, flags);
758 return 0;
759 }
760
761 urb = max3421_hcd->curr_urb = curr_urb;
762 epnum = usb_endpoint_num(&urb->ep->desc);
763 if (max3421_ep->retransmit)
764 /* restart (part of) a USB transaction: */
765 max3421_ep->retransmit = 0;
766 else {
767 /* start USB transaction: */
768 if (usb_endpoint_xfer_control(&ep->desc)) {
769 /*
770 * See USB 2.0 spec section 8.6.1
771 * Initialization via SETUP Token:
772 */
773 usb_settoggle(urb->dev, epnum, 0, 1);
774 usb_settoggle(urb->dev, epnum, 1, 1);
775 max3421_ep->pkt_state = PKT_STATE_SETUP;
776 force_toggles = 1;
777 } else
778 max3421_ep->pkt_state = PKT_STATE_TRANSFER;
779 }
780
781 spin_unlock_irqrestore(&max3421_hcd->lock, flags);
782
783 max3421_ep->last_active = max3421_hcd->frame_number;
784 max3421_set_address(hcd, urb->dev, epnum, force_toggles);
785 max3421_set_speed(hcd, urb->dev);
786 max3421_next_transfer(hcd, 0);
787 return 1;
788}
789
790/*
791 * Check all endpoints for URBs that got unlinked.
792 *
793 * Caller must NOT hold HCD spinlock.
794 */
795static int
796max3421_check_unlink(struct usb_hcd *hcd)
797{
798 struct spi_device *spi = to_spi_device(hcd->self.controller);
799 struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
2d53139f
DM
800 struct max3421_ep *max3421_ep;
801 struct usb_host_endpoint *ep;
553c2360 802 struct urb *urb, *next;
2d53139f
DM
803 unsigned long flags;
804 int retval = 0;
805
806 spin_lock_irqsave(&max3421_hcd->lock, flags);
553c2360 807 list_for_each_entry(max3421_ep, &max3421_hcd->ep_list, ep_list) {
2d53139f 808 ep = max3421_ep->ep;
553c2360 809 list_for_each_entry_safe(urb, next, &ep->urb_list, urb_list) {
2d53139f
DM
810 if (urb->unlinked) {
811 retval = 1;
812 dev_dbg(&spi->dev, "%s: URB %p unlinked=%d",
813 __func__, urb, urb->unlinked);
814 usb_hcd_unlink_urb_from_ep(hcd, urb);
815 spin_unlock_irqrestore(&max3421_hcd->lock,
816 flags);
817 usb_hcd_giveback_urb(hcd, urb, 0);
818 spin_lock_irqsave(&max3421_hcd->lock, flags);
819 }
820 }
821 }
822 spin_unlock_irqrestore(&max3421_hcd->lock, flags);
823 return retval;
824}
825
826/*
827 * Caller must NOT hold HCD spinlock.
828 */
829static void
830max3421_slow_retransmit(struct usb_hcd *hcd)
831{
832 struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
833 struct urb *urb = max3421_hcd->curr_urb;
834 struct max3421_ep *max3421_ep;
835
836 max3421_ep = urb->ep->hcpriv;
837 max3421_ep->retransmit = 1;
838 max3421_hcd->curr_urb = NULL;
839}
840
841/*
842 * Caller must NOT hold HCD spinlock.
843 */
844static void
845max3421_recv_data_available(struct usb_hcd *hcd)
846{
847 struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
848 struct urb *urb = max3421_hcd->curr_urb;
849 size_t remaining, transfer_size;
850 u8 rcvbc;
851
852 rcvbc = spi_rd8(hcd, MAX3421_REG_RCVBC);
853
854 if (rcvbc > MAX3421_FIFO_SIZE)
855 rcvbc = MAX3421_FIFO_SIZE;
856 if (urb->actual_length >= urb->transfer_buffer_length)
857 remaining = 0;
858 else
859 remaining = urb->transfer_buffer_length - urb->actual_length;
860 transfer_size = rcvbc;
861 if (transfer_size > remaining)
862 transfer_size = remaining;
863 if (transfer_size > 0) {
864 void *dst = urb->transfer_buffer + urb->actual_length;
865
866 spi_rd_buf(hcd, MAX3421_REG_RCVFIFO, dst, transfer_size);
867 urb->actual_length += transfer_size;
868 max3421_hcd->curr_len = transfer_size;
869 }
870
871 /* ack the RCVDAV irq now that the FIFO has been read: */
872 spi_wr8(hcd, MAX3421_REG_HIRQ, BIT(MAX3421_HI_RCVDAV_BIT));
873}
874
875static void
876max3421_handle_error(struct usb_hcd *hcd, u8 hrsl)
877{
878 struct spi_device *spi = to_spi_device(hcd->self.controller);
879 struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
880 u8 result_code = hrsl & MAX3421_HRSL_RESULT_MASK;
881 struct urb *urb = max3421_hcd->curr_urb;
882 struct max3421_ep *max3421_ep = urb->ep->hcpriv;
883 int switch_sndfifo;
884
885 /*
886 * If an OUT command results in any response other than OK
887 * (i.e., error or NAK), we have to perform a dummy-write to
888 * SNDBC so the FIFO gets switched back to us. Otherwise, we
889 * get out of sync with the SNDFIFO double buffer.
890 */
891 switch_sndfifo = (max3421_ep->pkt_state == PKT_STATE_TRANSFER &&
892 usb_urb_dir_out(urb));
893
894 switch (result_code) {
895 case MAX3421_HRSL_OK:
896 return; /* this shouldn't happen */
897
898 case MAX3421_HRSL_WRONGPID: /* received wrong PID */
899 case MAX3421_HRSL_BUSY: /* SIE busy */
900 case MAX3421_HRSL_BADREQ: /* bad val in HXFR */
901 case MAX3421_HRSL_UNDEF: /* reserved */
902 case MAX3421_HRSL_KERR: /* K-state instead of response */
903 case MAX3421_HRSL_JERR: /* J-state instead of response */
904 /*
905 * packet experienced an error that we cannot recover
906 * from; report error
907 */
908 max3421_hcd->urb_done = hrsl_to_error[result_code];
909 dev_dbg(&spi->dev, "%s: unexpected error HRSL=0x%02x",
910 __func__, hrsl);
911 break;
912
913 case MAX3421_HRSL_TOGERR:
914 if (usb_urb_dir_in(urb))
915 ; /* don't do anything (device will switch toggle) */
916 else {
917 /* flip the send toggle bit: */
918 int sndtog = (hrsl >> MAX3421_HRSL_SNDTOGRD_BIT) & 1;
919
920 sndtog ^= 1;
921 spi_wr8(hcd, MAX3421_REG_HCTL,
922 BIT(sndtog + MAX3421_HCTL_SNDTOG0_BIT));
923 }
924 /* FALL THROUGH */
925 case MAX3421_HRSL_BADBC: /* bad byte count */
926 case MAX3421_HRSL_PIDERR: /* received PID is corrupted */
927 case MAX3421_HRSL_PKTERR: /* packet error (stuff, EOP) */
928 case MAX3421_HRSL_CRCERR: /* CRC error */
929 case MAX3421_HRSL_BABBLE: /* device talked too long */
930 case MAX3421_HRSL_TIMEOUT:
931 if (max3421_ep->retries++ < USB_MAX_RETRIES)
932 /* retry the packet again in the next frame */
933 max3421_slow_retransmit(hcd);
934 else {
935 /* Based on ohci.h cc_to_err[]: */
936 max3421_hcd->urb_done = hrsl_to_error[result_code];
937 dev_dbg(&spi->dev, "%s: unexpected error HRSL=0x%02x",
938 __func__, hrsl);
939 }
940 break;
941
942 case MAX3421_HRSL_STALL:
943 dev_dbg(&spi->dev, "%s: unexpected error HRSL=0x%02x",
944 __func__, hrsl);
945 max3421_hcd->urb_done = hrsl_to_error[result_code];
946 break;
947
948 case MAX3421_HRSL_NAK:
949 /*
950 * Device wasn't ready for data or has no data
951 * available: retry the packet again.
952 */
953 if (max3421_ep->naks++ < NAK_MAX_FAST_RETRANSMITS) {
954 max3421_next_transfer(hcd, 1);
955 switch_sndfifo = 0;
956 } else
957 max3421_slow_retransmit(hcd);
958 break;
959 }
960 if (switch_sndfifo)
961 spi_wr8(hcd, MAX3421_REG_SNDBC, 0);
962}
963
964/*
965 * Caller must NOT hold HCD spinlock.
966 */
967static int
968max3421_transfer_in_done(struct usb_hcd *hcd, struct urb *urb)
969{
970 struct spi_device *spi = to_spi_device(hcd->self.controller);
971 struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
972 u32 max_packet;
973
974 if (urb->actual_length >= urb->transfer_buffer_length)
975 return 1; /* read is complete, so we're done */
976
977 /*
978 * USB 2.0 Section 5.3.2 Pipes: packets must be full size
979 * except for last one.
980 */
981 max_packet = usb_maxpacket(urb->dev, urb->pipe, 0);
982 if (max_packet > MAX3421_FIFO_SIZE) {
983 /*
984 * We do not support isochronous transfers at this
985 * time...
986 */
987 dev_err(&spi->dev,
988 "%s: packet-size of %u too big (limit is %u bytes)",
989 __func__, max_packet, MAX3421_FIFO_SIZE);
990 return -EINVAL;
991 }
992
993 if (max3421_hcd->curr_len < max_packet) {
994 if (urb->transfer_flags & URB_SHORT_NOT_OK) {
995 /*
996 * remaining > 0 and received an
997 * unexpected partial packet ->
998 * error
999 */
1000 return -EREMOTEIO;
1001 } else
1002 /* short read, but it's OK */
1003 return 1;
1004 }
1005 return 0; /* not done */
1006}
1007
1008/*
1009 * Caller must NOT hold HCD spinlock.
1010 */
1011static int
1012max3421_transfer_out_done(struct usb_hcd *hcd, struct urb *urb)
1013{
1014 struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
1015
1016 urb->actual_length += max3421_hcd->curr_len;
1017 if (urb->actual_length < urb->transfer_buffer_length)
1018 return 0;
1019 if (urb->transfer_flags & URB_ZERO_PACKET) {
1020 /*
1021 * Some hardware needs a zero-size packet at the end
1022 * of a bulk-out transfer if the last transfer was a
1023 * full-sized packet (i.e., such hardware use <
1024 * max_packet as an indicator that the end of the
1025 * packet has been reached).
1026 */
1027 u32 max_packet = usb_maxpacket(urb->dev, urb->pipe, 1);
1028
1029 if (max3421_hcd->curr_len == max_packet)
1030 return 0;
1031 }
1032 return 1;
1033}
1034
1035/*
1036 * Caller must NOT hold HCD spinlock.
1037 */
1038static void
1039max3421_host_transfer_done(struct usb_hcd *hcd)
1040{
1041 struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
1042 struct urb *urb = max3421_hcd->curr_urb;
1043 struct max3421_ep *max3421_ep;
1044 u8 result_code, hrsl;
1045 int urb_done = 0;
1046
1047 max3421_hcd->hien &= ~(BIT(MAX3421_HI_HXFRDN_BIT) |
1048 BIT(MAX3421_HI_RCVDAV_BIT));
1049
1050 hrsl = spi_rd8(hcd, MAX3421_REG_HRSL);
1051 result_code = hrsl & MAX3421_HRSL_RESULT_MASK;
1052
1053#ifdef DEBUG
1054 ++max3421_hcd->err_stat[result_code];
1055#endif
1056
1057 max3421_ep = urb->ep->hcpriv;
1058
1059 if (unlikely(result_code != MAX3421_HRSL_OK)) {
1060 max3421_handle_error(hcd, hrsl);
1061 return;
1062 }
1063
1064 max3421_ep->naks = 0;
1065 max3421_ep->retries = 0;
1066 switch (max3421_ep->pkt_state) {
1067
1068 case PKT_STATE_SETUP:
1069 if (urb->transfer_buffer_length > 0)
1070 max3421_ep->pkt_state = PKT_STATE_TRANSFER;
1071 else
1072 max3421_ep->pkt_state = PKT_STATE_TERMINATE;
1073 break;
1074
1075 case PKT_STATE_TRANSFER:
1076 if (usb_urb_dir_in(urb))
1077 urb_done = max3421_transfer_in_done(hcd, urb);
1078 else
1079 urb_done = max3421_transfer_out_done(hcd, urb);
1080 if (urb_done > 0 && usb_pipetype(urb->pipe) == PIPE_CONTROL) {
1081 /*
1082 * We aren't really done - we still need to
1083 * terminate the control transfer:
1084 */
1085 max3421_hcd->urb_done = urb_done = 0;
1086 max3421_ep->pkt_state = PKT_STATE_TERMINATE;
1087 }
1088 break;
1089
1090 case PKT_STATE_TERMINATE:
1091 urb_done = 1;
1092 break;
1093 }
1094
1095 if (urb_done)
1096 max3421_hcd->urb_done = urb_done;
1097 else
1098 max3421_next_transfer(hcd, 0);
1099}
1100
1101/*
1102 * Caller must NOT hold HCD spinlock.
1103 */
1104static void
1105max3421_detect_conn(struct usb_hcd *hcd)
1106{
1107 struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
1108 unsigned int jk, have_conn = 0;
1109 u32 old_port_status, chg;
1110 unsigned long flags;
1111 u8 hrsl, mode;
1112
1113 hrsl = spi_rd8(hcd, MAX3421_REG_HRSL);
1114
1115 jk = ((((hrsl >> MAX3421_HRSL_JSTATUS_BIT) & 1) << 0) |
1116 (((hrsl >> MAX3421_HRSL_KSTATUS_BIT) & 1) << 1));
1117
1118 mode = max3421_hcd->mode;
1119
1120 switch (jk) {
1121 case 0x0: /* SE0: disconnect */
1122 /*
1123 * Turn off SOFKAENAB bit to avoid getting interrupt
1124 * every milli-second:
1125 */
1126 mode &= ~BIT(MAX3421_MODE_SOFKAENAB_BIT);
1127 break;
1128
1129 case 0x1: /* J=0,K=1: low-speed (in full-speed or vice versa) */
1130 case 0x2: /* J=1,K=0: full-speed (in full-speed or vice versa) */
1131 if (jk == 0x2)
1132 /* need to switch to the other speed: */
1133 mode ^= BIT(MAX3421_MODE_LOWSPEED_BIT);
1134 /* turn on SOFKAENAB bit: */
1135 mode |= BIT(MAX3421_MODE_SOFKAENAB_BIT);
1136 have_conn = 1;
1137 break;
1138
1139 case 0x3: /* illegal */
1140 break;
1141 }
1142
1143 max3421_hcd->mode = mode;
1144 spi_wr8(hcd, MAX3421_REG_MODE, max3421_hcd->mode);
1145
1146 spin_lock_irqsave(&max3421_hcd->lock, flags);
1147 old_port_status = max3421_hcd->port_status;
1148 if (have_conn)
1149 max3421_hcd->port_status |= USB_PORT_STAT_CONNECTION;
1150 else
1151 max3421_hcd->port_status &= ~USB_PORT_STAT_CONNECTION;
1152 if (mode & BIT(MAX3421_MODE_LOWSPEED_BIT))
1153 max3421_hcd->port_status |= USB_PORT_STAT_LOW_SPEED;
1154 else
1155 max3421_hcd->port_status &= ~USB_PORT_STAT_LOW_SPEED;
1156 chg = (old_port_status ^ max3421_hcd->port_status);
1157 max3421_hcd->port_status |= chg << 16;
1158 spin_unlock_irqrestore(&max3421_hcd->lock, flags);
1159}
1160
1161static irqreturn_t
1162max3421_irq_handler(int irq, void *dev_id)
1163{
1164 struct usb_hcd *hcd = dev_id;
1165 struct spi_device *spi = to_spi_device(hcd->self.controller);
1166 struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
1167
1168 if (max3421_hcd->spi_thread &&
1169 max3421_hcd->spi_thread->state != TASK_RUNNING)
1170 wake_up_process(max3421_hcd->spi_thread);
2eb5dbdd 1171 if (!test_and_set_bit(ENABLE_IRQ, &max3421_hcd->todo))
2d53139f 1172 disable_irq_nosync(spi->irq);
2d53139f
DM
1173 return IRQ_HANDLED;
1174}
1175
1176#ifdef DEBUG
1177
1178static void
1179dump_eps(struct usb_hcd *hcd)
1180{
1181 struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
1182 struct max3421_ep *max3421_ep;
1183 struct usb_host_endpoint *ep;
2d53139f
DM
1184 char ubuf[512], *dp, *end;
1185 unsigned long flags;
1186 struct urb *urb;
1187 int epnum, ret;
1188
1189 spin_lock_irqsave(&max3421_hcd->lock, flags);
553c2360 1190 list_for_each_entry(max3421_ep, &max3421_hcd->ep_list, ep_list) {
2d53139f
DM
1191 ep = max3421_ep->ep;
1192
1193 dp = ubuf;
1194 end = dp + sizeof(ubuf);
1195 *dp = '\0';
553c2360 1196 list_for_each_entry(urb, &ep->urb_list, urb_list) {
2d53139f
DM
1197 ret = snprintf(dp, end - dp, " %p(%d.%s %d/%d)", urb,
1198 usb_pipetype(urb->pipe),
1199 usb_urb_dir_in(urb) ? "IN" : "OUT",
1200 urb->actual_length,
1201 urb->transfer_buffer_length);
1202 if (ret < 0 || ret >= end - dp)
1203 break; /* error or buffer full */
1204 dp += ret;
1205 }
1206
1207 epnum = usb_endpoint_num(&ep->desc);
1208 pr_info("EP%0u %u lst %04u rtr %u nak %6u rxmt %u: %s\n",
1209 epnum, max3421_ep->pkt_state, max3421_ep->last_active,
1210 max3421_ep->retries, max3421_ep->naks,
1211 max3421_ep->retransmit, ubuf);
1212 }
1213 spin_unlock_irqrestore(&max3421_hcd->lock, flags);
1214}
1215
1216#endif /* DEBUG */
1217
1218/* Return zero if no work was performed, 1 otherwise. */
1219static int
1220max3421_handle_irqs(struct usb_hcd *hcd)
1221{
1222 struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
1223 u32 chg, old_port_status;
1224 unsigned long flags;
1225 u8 hirq;
1226
1227 /*
1228 * Read and ack pending interrupts (CPU must never
1229 * clear SNDBAV directly and RCVDAV must be cleared by
1230 * max3421_recv_data_available()!):
1231 */
1232 hirq = spi_rd8(hcd, MAX3421_REG_HIRQ);
1233 hirq &= max3421_hcd->hien;
1234 if (!hirq)
1235 return 0;
1236
1237 spi_wr8(hcd, MAX3421_REG_HIRQ,
1238 hirq & ~(BIT(MAX3421_HI_SNDBAV_BIT) |
1239 BIT(MAX3421_HI_RCVDAV_BIT)));
1240
1241 if (hirq & BIT(MAX3421_HI_FRAME_BIT)) {
1242 max3421_hcd->frame_number = ((max3421_hcd->frame_number + 1)
1243 & USB_MAX_FRAME_NUMBER);
1244 max3421_hcd->sched_pass = SCHED_PASS_PERIODIC;
1245 }
1246
1247 if (hirq & BIT(MAX3421_HI_RCVDAV_BIT))
1248 max3421_recv_data_available(hcd);
1249
1250 if (hirq & BIT(MAX3421_HI_HXFRDN_BIT))
1251 max3421_host_transfer_done(hcd);
1252
1253 if (hirq & BIT(MAX3421_HI_CONDET_BIT))
1254 max3421_detect_conn(hcd);
1255
1256 /*
1257 * Now process interrupts that may affect HCD state
1258 * other than the end-points:
1259 */
1260 spin_lock_irqsave(&max3421_hcd->lock, flags);
1261
1262 old_port_status = max3421_hcd->port_status;
1263 if (hirq & BIT(MAX3421_HI_BUSEVENT_BIT)) {
1264 if (max3421_hcd->port_status & USB_PORT_STAT_RESET) {
1265 /* BUSEVENT due to completion of Bus Reset */
1266 max3421_hcd->port_status &= ~USB_PORT_STAT_RESET;
1267 max3421_hcd->port_status |= USB_PORT_STAT_ENABLE;
1268 } else {
1269 /* BUSEVENT due to completion of Bus Resume */
1270 pr_info("%s: BUSEVENT Bus Resume Done\n", __func__);
1271 }
1272 }
1273 if (hirq & BIT(MAX3421_HI_RWU_BIT))
1274 pr_info("%s: RWU\n", __func__);
1275 if (hirq & BIT(MAX3421_HI_SUSDN_BIT))
1276 pr_info("%s: SUSDN\n", __func__);
1277
1278 chg = (old_port_status ^ max3421_hcd->port_status);
1279 max3421_hcd->port_status |= chg << 16;
1280
1281 spin_unlock_irqrestore(&max3421_hcd->lock, flags);
1282
1283#ifdef DEBUG
1284 {
1285 static unsigned long last_time;
1286 char sbuf[16 * 16], *dp, *end;
1287 int i;
1288
788bfe88 1289 if (time_after(jiffies, last_time + 5*HZ)) {
2d53139f
DM
1290 dp = sbuf;
1291 end = sbuf + sizeof(sbuf);
1292 *dp = '\0';
1293 for (i = 0; i < 16; ++i) {
1294 int ret = snprintf(dp, end - dp, " %lu",
1295 max3421_hcd->err_stat[i]);
1296 if (ret < 0 || ret >= end - dp)
1297 break; /* error or buffer full */
1298 dp += ret;
1299 }
1300 pr_info("%s: hrsl_stats %s\n", __func__, sbuf);
1301 memset(max3421_hcd->err_stat, 0,
1302 sizeof(max3421_hcd->err_stat));
1303 last_time = jiffies;
1304
1305 dump_eps(hcd);
1306 }
1307 }
1308#endif
1309 return 1;
1310}
1311
1312static int
1313max3421_reset_hcd(struct usb_hcd *hcd)
1314{
1315 struct spi_device *spi = to_spi_device(hcd->self.controller);
1316 struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
1317 int timeout;
1318
1319 /* perform a chip reset and wait for OSCIRQ signal to appear: */
1320 spi_wr8(hcd, MAX3421_REG_USBCTL, BIT(MAX3421_USBCTL_CHIPRES_BIT));
1321 /* clear reset: */
1322 spi_wr8(hcd, MAX3421_REG_USBCTL, 0);
1323 timeout = 1000;
1324 while (1) {
1325 if (spi_rd8(hcd, MAX3421_REG_USBIRQ)
1326 & BIT(MAX3421_USBIRQ_OSCOKIRQ_BIT))
1327 break;
1328 if (--timeout < 0) {
1329 dev_err(&spi->dev,
1330 "timed out waiting for oscillator OK signal");
1331 return 1;
1332 }
1333 cond_resched();
1334 }
1335
1336 /*
1337 * Turn on host mode, automatic generation of SOF packets, and
1338 * enable pull-down registers on DM/DP:
1339 */
1340 max3421_hcd->mode = (BIT(MAX3421_MODE_HOST_BIT) |
1341 BIT(MAX3421_MODE_SOFKAENAB_BIT) |
1342 BIT(MAX3421_MODE_DMPULLDN_BIT) |
1343 BIT(MAX3421_MODE_DPPULLDN_BIT));
1344 spi_wr8(hcd, MAX3421_REG_MODE, max3421_hcd->mode);
1345
1346 /* reset frame-number: */
1347 max3421_hcd->frame_number = USB_MAX_FRAME_NUMBER;
1348 spi_wr8(hcd, MAX3421_REG_HCTL, BIT(MAX3421_HCTL_FRMRST_BIT));
1349
1350 /* sample the state of the D+ and D- lines */
1351 spi_wr8(hcd, MAX3421_REG_HCTL, BIT(MAX3421_HCTL_SAMPLEBUS_BIT));
1352 max3421_detect_conn(hcd);
1353
1354 /* enable frame, connection-detected, and bus-event interrupts: */
1355 max3421_hcd->hien = (BIT(MAX3421_HI_FRAME_BIT) |
1356 BIT(MAX3421_HI_CONDET_BIT) |
1357 BIT(MAX3421_HI_BUSEVENT_BIT));
1358 spi_wr8(hcd, MAX3421_REG_HIEN, max3421_hcd->hien);
1359
1360 /* enable interrupts: */
1361 spi_wr8(hcd, MAX3421_REG_CPUCTL, BIT(MAX3421_CPUCTL_IE_BIT));
1362 return 1;
1363}
1364
1365static int
1366max3421_urb_done(struct usb_hcd *hcd)
1367{
1368 struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
1369 unsigned long flags;
1370 struct urb *urb;
1371 int status;
1372
1373 status = max3421_hcd->urb_done;
1374 max3421_hcd->urb_done = 0;
1375 if (status > 0)
1376 status = 0;
1377 urb = max3421_hcd->curr_urb;
1378 if (urb) {
1379 max3421_hcd->curr_urb = NULL;
1380 spin_lock_irqsave(&max3421_hcd->lock, flags);
1381 usb_hcd_unlink_urb_from_ep(hcd, urb);
1382 spin_unlock_irqrestore(&max3421_hcd->lock, flags);
1383
1384 /* must be called without the HCD spinlock: */
1385 usb_hcd_giveback_urb(hcd, urb, status);
1386 }
1387 return 1;
1388}
1389
1390static int
1391max3421_spi_thread(void *dev_id)
1392{
1393 struct usb_hcd *hcd = dev_id;
1394 struct spi_device *spi = to_spi_device(hcd->self.controller);
1395 struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
1396 int i, i_worked = 1;
1397
1398 /* set full-duplex SPI mode, low-active interrupt pin: */
1399 spi_wr8(hcd, MAX3421_REG_PINCTL,
1400 (BIT(MAX3421_PINCTL_FDUPSPI_BIT) | /* full-duplex */
1401 BIT(MAX3421_PINCTL_INTLEVEL_BIT))); /* low-active irq */
1402
1403 while (!kthread_should_stop()) {
1404 max3421_hcd->rev = spi_rd8(hcd, MAX3421_REG_REVISION);
1405 if (max3421_hcd->rev == 0x12 || max3421_hcd->rev == 0x13)
1406 break;
1407 dev_err(&spi->dev, "bad rev 0x%02x", max3421_hcd->rev);
1408 msleep(10000);
1409 }
1410 dev_info(&spi->dev, "rev 0x%x, SPI clk %dHz, bpw %u, irq %d\n",
1411 max3421_hcd->rev, spi->max_speed_hz, spi->bits_per_word,
1412 spi->irq);
1413
1414 while (!kthread_should_stop()) {
1415 if (!i_worked) {
1416 /*
1417 * We'll be waiting for wakeups from the hard
1418 * interrupt handler, so now is a good time to
1419 * sync our hien with the chip:
1420 */
1421 spi_wr8(hcd, MAX3421_REG_HIEN, max3421_hcd->hien);
1422
1423 set_current_state(TASK_INTERRUPTIBLE);
2eb5dbdd 1424 if (test_and_clear_bit(ENABLE_IRQ, &max3421_hcd->todo))
2d53139f 1425 enable_irq(spi->irq);
2d53139f
DM
1426 schedule();
1427 __set_current_state(TASK_RUNNING);
1428 }
1429
1430 i_worked = 0;
1431
1432 if (max3421_hcd->urb_done)
1433 i_worked |= max3421_urb_done(hcd);
1434 else if (max3421_handle_irqs(hcd))
1435 i_worked = 1;
1436 else if (!max3421_hcd->curr_urb)
1437 i_worked |= max3421_select_and_start_urb(hcd);
1438
2eb5dbdd 1439 if (test_and_clear_bit(RESET_HCD, &max3421_hcd->todo))
2d53139f 1440 /* reset the HCD: */
2d53139f 1441 i_worked |= max3421_reset_hcd(hcd);
2eb5dbdd 1442 if (test_and_clear_bit(RESET_PORT, &max3421_hcd->todo)) {
2d53139f 1443 /* perform a USB bus reset: */
2d53139f
DM
1444 spi_wr8(hcd, MAX3421_REG_HCTL,
1445 BIT(MAX3421_HCTL_BUSRST_BIT));
1446 i_worked = 1;
1447 }
2eb5dbdd 1448 if (test_and_clear_bit(CHECK_UNLINK, &max3421_hcd->todo))
2d53139f 1449 i_worked |= max3421_check_unlink(hcd);
2eb5dbdd 1450 if (test_and_clear_bit(IOPIN_UPDATE, &max3421_hcd->todo)) {
2d53139f
DM
1451 /*
1452 * IOPINS1/IOPINS2 do not auto-increment, so we can't
1453 * use spi_wr_buf().
1454 */
1455 for (i = 0; i < ARRAY_SIZE(max3421_hcd->iopins); ++i) {
1456 u8 val = spi_rd8(hcd, MAX3421_REG_IOPINS1);
1457
1458 val = ((val & 0xf0) |
1459 (max3421_hcd->iopins[i] & 0x0f));
1460 spi_wr8(hcd, MAX3421_REG_IOPINS1 + i, val);
1461 max3421_hcd->iopins[i] = val;
1462 }
2d53139f
DM
1463 i_worked = 1;
1464 }
1465 }
1466 set_current_state(TASK_RUNNING);
1467 dev_info(&spi->dev, "SPI thread exiting");
1468 return 0;
1469}
1470
1471static int
1472max3421_reset_port(struct usb_hcd *hcd)
1473{
1474 struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
1475
1476 max3421_hcd->port_status &= ~(USB_PORT_STAT_ENABLE |
1477 USB_PORT_STAT_LOW_SPEED);
a2b63cb5 1478 max3421_hcd->port_status |= USB_PORT_STAT_RESET;
2eb5dbdd 1479 set_bit(RESET_PORT, &max3421_hcd->todo);
2d53139f
DM
1480 wake_up_process(max3421_hcd->spi_thread);
1481 return 0;
1482}
1483
1484static int
1485max3421_reset(struct usb_hcd *hcd)
1486{
1487 struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
1488
1489 hcd->self.sg_tablesize = 0;
1490 hcd->speed = HCD_USB2;
1491 hcd->self.root_hub->speed = USB_SPEED_FULL;
2eb5dbdd 1492 set_bit(RESET_HCD, &max3421_hcd->todo);
2d53139f
DM
1493 wake_up_process(max3421_hcd->spi_thread);
1494 return 0;
1495}
1496
1497static int
1498max3421_start(struct usb_hcd *hcd)
1499{
1500 struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
1501
1502 spin_lock_init(&max3421_hcd->lock);
1503 max3421_hcd->rh_state = MAX3421_RH_RUNNING;
1504
1505 INIT_LIST_HEAD(&max3421_hcd->ep_list);
1506
1507 hcd->power_budget = POWER_BUDGET;
1508 hcd->state = HC_STATE_RUNNING;
1509 hcd->uses_new_polling = 1;
1510 return 0;
1511}
1512
1513static void
1514max3421_stop(struct usb_hcd *hcd)
1515{
1516}
1517
1518static int
1519max3421_urb_enqueue(struct usb_hcd *hcd, struct urb *urb, gfp_t mem_flags)
1520{
1521 struct spi_device *spi = to_spi_device(hcd->self.controller);
1522 struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
1523 struct max3421_ep *max3421_ep;
1524 unsigned long flags;
1525 int retval;
1526
1527 switch (usb_pipetype(urb->pipe)) {
1528 case PIPE_INTERRUPT:
1529 case PIPE_ISOCHRONOUS:
1530 if (urb->interval < 0) {
1531 dev_err(&spi->dev,
1532 "%s: interval=%d for intr-/iso-pipe; expected > 0\n",
1533 __func__, urb->interval);
1534 return -EINVAL;
1535 }
1536 default:
1537 break;
1538 }
1539
1540 spin_lock_irqsave(&max3421_hcd->lock, flags);
1541
1542 max3421_ep = urb->ep->hcpriv;
1543 if (!max3421_ep) {
1544 /* gets freed in max3421_endpoint_disable: */
6c0f3695 1545 max3421_ep = kzalloc(sizeof(struct max3421_ep), GFP_ATOMIC);
00c5aa17
DMT
1546 if (!max3421_ep) {
1547 retval = -ENOMEM;
1548 goto out;
1549 }
2d53139f
DM
1550 max3421_ep->ep = urb->ep;
1551 max3421_ep->last_active = max3421_hcd->frame_number;
1552 urb->ep->hcpriv = max3421_ep;
1553
1554 list_add_tail(&max3421_ep->ep_list, &max3421_hcd->ep_list);
1555 }
1556
1557 retval = usb_hcd_link_urb_to_ep(hcd, urb);
1558 if (retval == 0) {
1559 /* Since we added to the queue, restart scheduling: */
1560 max3421_hcd->sched_pass = SCHED_PASS_PERIODIC;
1561 wake_up_process(max3421_hcd->spi_thread);
1562 }
1563
00c5aa17 1564out:
2d53139f
DM
1565 spin_unlock_irqrestore(&max3421_hcd->lock, flags);
1566 return retval;
1567}
1568
1569static int
1570max3421_urb_dequeue(struct usb_hcd *hcd, struct urb *urb, int status)
1571{
1572 struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
1573 unsigned long flags;
1574 int retval;
1575
1576 spin_lock_irqsave(&max3421_hcd->lock, flags);
1577
1578 /*
1579 * This will set urb->unlinked which in turn causes the entry
1580 * to be dropped at the next opportunity.
1581 */
1582 retval = usb_hcd_check_unlink_urb(hcd, urb, status);
1583 if (retval == 0) {
2eb5dbdd 1584 set_bit(CHECK_UNLINK, &max3421_hcd->todo);
2d53139f
DM
1585 wake_up_process(max3421_hcd->spi_thread);
1586 }
1587 spin_unlock_irqrestore(&max3421_hcd->lock, flags);
1588 return retval;
1589}
1590
1591static void
1592max3421_endpoint_disable(struct usb_hcd *hcd, struct usb_host_endpoint *ep)
1593{
1594 struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
1595 unsigned long flags;
1596
1597 spin_lock_irqsave(&max3421_hcd->lock, flags);
1598
1599 if (ep->hcpriv) {
1600 struct max3421_ep *max3421_ep = ep->hcpriv;
1601
1602 /* remove myself from the ep_list: */
1603 if (!list_empty(&max3421_ep->ep_list))
1604 list_del(&max3421_ep->ep_list);
1605 kfree(max3421_ep);
1606 ep->hcpriv = NULL;
1607 }
1608
1609 spin_unlock_irqrestore(&max3421_hcd->lock, flags);
1610}
1611
1612static int
1613max3421_get_frame_number(struct usb_hcd *hcd)
1614{
1615 struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
1616 return max3421_hcd->frame_number;
1617}
1618
1619/*
1620 * Should return a non-zero value when any port is undergoing a resume
1621 * transition while the root hub is suspended.
1622 */
1623static int
1624max3421_hub_status_data(struct usb_hcd *hcd, char *buf)
1625{
1626 struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
1627 unsigned long flags;
1628 int retval = 0;
1629
1630 spin_lock_irqsave(&max3421_hcd->lock, flags);
1631 if (!HCD_HW_ACCESSIBLE(hcd))
1632 goto done;
1633
1634 *buf = 0;
1635 if ((max3421_hcd->port_status & PORT_C_MASK) != 0) {
1636 *buf = (1 << 1); /* a hub over-current condition exists */
1637 dev_dbg(hcd->self.controller,
1638 "port status 0x%08x has changes\n",
1639 max3421_hcd->port_status);
1640 retval = 1;
1641 if (max3421_hcd->rh_state == MAX3421_RH_SUSPENDED)
1642 usb_hcd_resume_root_hub(hcd);
1643 }
1644done:
1645 spin_unlock_irqrestore(&max3421_hcd->lock, flags);
1646 return retval;
1647}
1648
1649static inline void
1650hub_descriptor(struct usb_hub_descriptor *desc)
1651{
1652 memset(desc, 0, sizeof(*desc));
1653 /*
1654 * See Table 11-13: Hub Descriptor in USB 2.0 spec.
1655 */
e3d02e0e 1656 desc->bDescriptorType = USB_DT_HUB; /* hub descriptor */
2d53139f 1657 desc->bDescLength = 9;
2e48c466
SS
1658 desc->wHubCharacteristics = cpu_to_le16(HUB_CHAR_INDV_PORT_LPSM |
1659 HUB_CHAR_COMMON_OCPM);
2d53139f
DM
1660 desc->bNbrPorts = 1;
1661}
1662
1663/*
1664 * Set the MAX3421E general-purpose output with number PIN_NUMBER to
1665 * VALUE (0 or 1). PIN_NUMBER may be in the range from 1-8. For
1666 * any other value, this function acts as a no-op.
1667 */
1668static void
1669max3421_gpout_set_value(struct usb_hcd *hcd, u8 pin_number, u8 value)
1670{
1671 struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
1672 u8 mask, idx;
1673
1674 --pin_number;
1675 if (pin_number > 7)
1676 return;
1677
59b71f77 1678 mask = 1u << (pin_number % 4);
2d53139f
DM
1679 idx = pin_number / 4;
1680
1681 if (value)
1682 max3421_hcd->iopins[idx] |= mask;
1683 else
1684 max3421_hcd->iopins[idx] &= ~mask;
2eb5dbdd 1685 set_bit(IOPIN_UPDATE, &max3421_hcd->todo);
2d53139f
DM
1686 wake_up_process(max3421_hcd->spi_thread);
1687}
1688
1689static int
1690max3421_hub_control(struct usb_hcd *hcd, u16 type_req, u16 value, u16 index,
1691 char *buf, u16 length)
1692{
1693 struct spi_device *spi = to_spi_device(hcd->self.controller);
1694 struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
1695 struct max3421_hcd_platform_data *pdata;
1696 unsigned long flags;
1697 int retval = 0;
1698
1699 spin_lock_irqsave(&max3421_hcd->lock, flags);
1700
1701 pdata = spi->dev.platform_data;
1702
1703 switch (type_req) {
1704 case ClearHubFeature:
1705 break;
1706 case ClearPortFeature:
1707 switch (value) {
1708 case USB_PORT_FEAT_SUSPEND:
1709 break;
1710 case USB_PORT_FEAT_POWER:
1711 dev_dbg(hcd->self.controller, "power-off\n");
4055e5e5
DMT
1712 max3421_gpout_set_value(hcd, pdata->vbus_gpout,
1713 !pdata->vbus_active_level);
2d53139f
DM
1714 /* FALLS THROUGH */
1715 default:
1716 max3421_hcd->port_status &= ~(1 << value);
1717 }
1718 break;
1719 case GetHubDescriptor:
1720 hub_descriptor((struct usb_hub_descriptor *) buf);
1721 break;
1722
1723 case DeviceRequest | USB_REQ_GET_DESCRIPTOR:
1724 case GetPortErrorCount:
1725 case SetHubDepth:
1726 /* USB3 only */
1727 goto error;
1728
1729 case GetHubStatus:
1730 *(__le32 *) buf = cpu_to_le32(0);
1731 break;
1732
1733 case GetPortStatus:
1734 if (index != 1) {
1735 retval = -EPIPE;
1736 goto error;
1737 }
1738 ((__le16 *) buf)[0] = cpu_to_le16(max3421_hcd->port_status);
1739 ((__le16 *) buf)[1] =
1740 cpu_to_le16(max3421_hcd->port_status >> 16);
1741 break;
1742
1743 case SetHubFeature:
1744 retval = -EPIPE;
1745 break;
1746
1747 case SetPortFeature:
1748 switch (value) {
1749 case USB_PORT_FEAT_LINK_STATE:
1750 case USB_PORT_FEAT_U1_TIMEOUT:
1751 case USB_PORT_FEAT_U2_TIMEOUT:
1752 case USB_PORT_FEAT_BH_PORT_RESET:
1753 goto error;
1754 case USB_PORT_FEAT_SUSPEND:
1755 if (max3421_hcd->active)
1756 max3421_hcd->port_status |=
1757 USB_PORT_STAT_SUSPEND;
1758 break;
1759 case USB_PORT_FEAT_POWER:
1760 dev_dbg(hcd->self.controller, "power-on\n");
1761 max3421_hcd->port_status |= USB_PORT_STAT_POWER;
4055e5e5
DMT
1762 max3421_gpout_set_value(hcd, pdata->vbus_gpout,
1763 pdata->vbus_active_level);
2d53139f
DM
1764 break;
1765 case USB_PORT_FEAT_RESET:
1766 max3421_reset_port(hcd);
1767 /* FALLS THROUGH */
1768 default:
1769 if ((max3421_hcd->port_status & USB_PORT_STAT_POWER)
1770 != 0)
1771 max3421_hcd->port_status |= (1 << value);
1772 }
1773 break;
1774
1775 default:
1776 dev_dbg(hcd->self.controller,
1777 "hub control req%04x v%04x i%04x l%d\n",
1778 type_req, value, index, length);
1779error: /* "protocol stall" on error */
1780 retval = -EPIPE;
1781 }
1782
1783 spin_unlock_irqrestore(&max3421_hcd->lock, flags);
1784 return retval;
1785}
1786
1787static int
1788max3421_bus_suspend(struct usb_hcd *hcd)
1789{
1790 return -1;
1791}
1792
1793static int
1794max3421_bus_resume(struct usb_hcd *hcd)
1795{
1796 return -1;
1797}
1798
1799/*
1800 * The SPI driver already takes care of DMA-mapping/unmapping, so no
1801 * reason to do it twice.
1802 */
1803static int
1804max3421_map_urb_for_dma(struct usb_hcd *hcd, struct urb *urb, gfp_t mem_flags)
1805{
1806 return 0;
1807}
1808
1809static void
1810max3421_unmap_urb_for_dma(struct usb_hcd *hcd, struct urb *urb)
1811{
1812}
1813
1814static struct hc_driver max3421_hcd_desc = {
1815 .description = "max3421",
1816 .product_desc = DRIVER_DESC,
1817 .hcd_priv_size = sizeof(struct max3421_hcd),
1818 .flags = HCD_USB11,
1819 .reset = max3421_reset,
1820 .start = max3421_start,
1821 .stop = max3421_stop,
1822 .get_frame_number = max3421_get_frame_number,
1823 .urb_enqueue = max3421_urb_enqueue,
1824 .urb_dequeue = max3421_urb_dequeue,
1825 .map_urb_for_dma = max3421_map_urb_for_dma,
1826 .unmap_urb_for_dma = max3421_unmap_urb_for_dma,
1827 .endpoint_disable = max3421_endpoint_disable,
1828 .hub_status_data = max3421_hub_status_data,
1829 .hub_control = max3421_hub_control,
1830 .bus_suspend = max3421_bus_suspend,
1831 .bus_resume = max3421_bus_resume,
1832};
1833
1834static int
1835max3421_probe(struct spi_device *spi)
1836{
1837 struct max3421_hcd *max3421_hcd;
05dfa5c9
DMT
1838 struct usb_hcd *hcd = NULL;
1839 int retval = -ENOMEM;
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1840
1841 if (spi_setup(spi) < 0) {
1842 dev_err(&spi->dev, "Unable to setup SPI bus");
1843 return -EFAULT;
1844 }
1845
1846 hcd = usb_create_hcd(&max3421_hcd_desc, &spi->dev,
1847 dev_name(&spi->dev));
1848 if (!hcd) {
1849 dev_err(&spi->dev, "failed to create HCD structure\n");
05dfa5c9 1850 goto error;
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1851 }
1852 set_bit(HCD_FLAG_POLL_RH, &hcd->flags);
1853 max3421_hcd = hcd_to_max3421(hcd);
1854 max3421_hcd->next = max3421_hcd_list;
1855 max3421_hcd_list = max3421_hcd;
1856 INIT_LIST_HEAD(&max3421_hcd->ep_list);
1857
05dfa5c9 1858 max3421_hcd->tx = kmalloc(sizeof(*max3421_hcd->tx), GFP_KERNEL);
13dcf780 1859 if (!max3421_hcd->tx)
05dfa5c9 1860 goto error;
05dfa5c9 1861 max3421_hcd->rx = kmalloc(sizeof(*max3421_hcd->rx), GFP_KERNEL);
13dcf780 1862 if (!max3421_hcd->rx)
05dfa5c9 1863 goto error;
05dfa5c9 1864
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1865 max3421_hcd->spi_thread = kthread_run(max3421_spi_thread, hcd,
1866 "max3421_spi_thread");
1867 if (max3421_hcd->spi_thread == ERR_PTR(-ENOMEM)) {
1868 dev_err(&spi->dev,
1869 "failed to create SPI thread (out of memory)\n");
05dfa5c9 1870 goto error;
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DM
1871 }
1872
1873 retval = usb_add_hcd(hcd, 0, 0);
1874 if (retval) {
1875 dev_err(&spi->dev, "failed to add HCD\n");
05dfa5c9 1876 goto error;
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DM
1877 }
1878
1879 retval = request_irq(spi->irq, max3421_irq_handler,
1880 IRQF_TRIGGER_LOW, "max3421", hcd);
1881 if (retval < 0) {
2d53139f 1882 dev_err(&spi->dev, "failed to request irq %d\n", spi->irq);
05dfa5c9 1883 goto error;
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DM
1884 }
1885 return 0;
05dfa5c9
DMT
1886
1887error:
1888 if (hcd) {
1889 kfree(max3421_hcd->tx);
1890 kfree(max3421_hcd->rx);
1891 if (max3421_hcd->spi_thread)
1892 kthread_stop(max3421_hcd->spi_thread);
1893 usb_put_hcd(hcd);
1894 }
1895 return retval;
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DM
1896}
1897
1898static int
1899max3421_remove(struct spi_device *spi)
1900{
1901 struct max3421_hcd *max3421_hcd = NULL, **prev;
1902 struct usb_hcd *hcd = NULL;
1903 unsigned long flags;
1904
1905 for (prev = &max3421_hcd_list; *prev; prev = &(*prev)->next) {
1906 max3421_hcd = *prev;
1907 hcd = max3421_to_hcd(max3421_hcd);
1908 if (hcd->self.controller == &spi->dev)
1909 break;
1910 }
1911 if (!max3421_hcd) {
1912 dev_err(&spi->dev, "no MAX3421 HCD found for SPI device %p\n",
1913 spi);
1914 return -ENODEV;
1915 }
1916
1917 usb_remove_hcd(hcd);
1918
1919 spin_lock_irqsave(&max3421_hcd->lock, flags);
1920
1921 kthread_stop(max3421_hcd->spi_thread);
1922 *prev = max3421_hcd->next;
1923
1924 spin_unlock_irqrestore(&max3421_hcd->lock, flags);
1925
1926 free_irq(spi->irq, hcd);
1927
1928 usb_put_hcd(hcd);
1929 return 0;
1930}
1931
1932static struct spi_driver max3421_driver = {
1933 .probe = max3421_probe,
1934 .remove = max3421_remove,
1935 .driver = {
1936 .name = "max3421-hcd",
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DM
1937 },
1938};
1939
7df45d5f 1940module_spi_driver(max3421_driver);
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1941
1942MODULE_DESCRIPTION(DRIVER_DESC);
1943MODULE_AUTHOR("David Mosberger <davidm@egauge.net>");
1944MODULE_LICENSE("GPL");
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