Commit | Line | Data |
---|---|---|
1da177e4 LT |
1 | /* |
2 | * OHCI HCD (Host Controller Driver) for USB. | |
3 | * | |
4 | * (C) Copyright 1999 Roman Weissgaerber <weissg@vienna.at> | |
5 | * (C) Copyright 2000-2005 David Brownell | |
6 | * (C) Copyright 2002 Hewlett-Packard Company | |
bd35078f | 7 | * |
1da177e4 LT |
8 | * OMAP Bus Glue |
9 | * | |
10 | * Modified for OMAP by Tony Lindgren <tony@atomide.com> | |
11 | * Based on the 2.4 OMAP OHCI driver originally done by MontaVista Software Inc. | |
12 | * and on ohci-sa1111.c by Christopher Hoover <ch@hpl.hp.com> | |
13 | * | |
14 | * This file is licenced under the GPL. | |
15 | */ | |
16 | ||
f8ce2547 | 17 | #include <linux/clk.h> |
de57a154 | 18 | #include <linux/dma-mapping.h> |
ded017ee | 19 | #include <linux/err.h> |
944e1bff | 20 | #include <linux/gpio.h> |
de57a154 MG |
21 | #include <linux/io.h> |
22 | #include <linux/jiffies.h> | |
23 | #include <linux/kernel.h> | |
24 | #include <linux/module.h> | |
25 | #include <linux/usb/otg.h> | |
26 | #include <linux/platform_device.h> | |
27 | #include <linux/signal.h> | |
28 | #include <linux/usb.h> | |
29 | #include <linux/usb/hcd.h> | |
30 | ||
31 | #include "ohci.h" | |
4e57b681 | 32 | |
1da177e4 LT |
33 | #include <asm/io.h> |
34 | #include <asm/mach-types.h> | |
35 | ||
70c494c3 | 36 | #include <mach/mux.h> |
b924b204 TL |
37 | |
38 | #include <mach/hardware.h> | |
b924b204 | 39 | #include <mach/usb.h> |
1da177e4 LT |
40 | |
41 | ||
42 | /* OMAP-1510 OHCI has its own MMU for DMA */ | |
43 | #define OMAP1510_LB_MEMSIZE 32 /* Should be same as SDRAM size */ | |
44 | #define OMAP1510_LB_CLOCK_DIV 0xfffec10c | |
45 | #define OMAP1510_LB_MMU_CTL 0xfffec208 | |
46 | #define OMAP1510_LB_MMU_LCK 0xfffec224 | |
47 | #define OMAP1510_LB_MMU_LD_TLB 0xfffec228 | |
48 | #define OMAP1510_LB_MMU_CAM_H 0xfffec22c | |
49 | #define OMAP1510_LB_MMU_CAM_L 0xfffec230 | |
50 | #define OMAP1510_LB_MMU_RAM_H 0xfffec234 | |
51 | #define OMAP1510_LB_MMU_RAM_L 0xfffec238 | |
52 | ||
de57a154 | 53 | #define DRIVER_DESC "OHCI OMAP driver" |
1da177e4 LT |
54 | |
55 | #ifdef CONFIG_TPS65010 | |
6d16bfb5 | 56 | #include <linux/i2c/tps65010.h> |
1da177e4 LT |
57 | #else |
58 | ||
59 | #define LOW 0 | |
60 | #define HIGH 1 | |
61 | ||
62 | #define GPIO1 1 | |
63 | ||
64 | static inline int tps65010_set_gpio_out_value(unsigned gpio, unsigned value) | |
65 | { | |
66 | return 0; | |
67 | } | |
68 | ||
69 | #endif | |
70 | ||
71 | extern int usb_disabled(void); | |
72 | extern int ocpi_enable(void); | |
73 | ||
74 | static struct clk *usb_host_ck; | |
bd35078f | 75 | static struct clk *usb_dc_ck; |
de57a154 MG |
76 | |
77 | static const char hcd_name[] = "ohci-omap"; | |
78 | static struct hc_driver __read_mostly ohci_omap_hc_driver; | |
1da177e4 LT |
79 | |
80 | static void omap_ohci_clock_power(int on) | |
81 | { | |
82 | if (on) { | |
bd35078f | 83 | clk_enable(usb_dc_ck); |
1da177e4 LT |
84 | clk_enable(usb_host_ck); |
85 | /* guesstimate for T5 == 1x 32K clock + APLL lock time */ | |
86 | udelay(100); | |
87 | } else { | |
88 | clk_disable(usb_host_ck); | |
bd35078f | 89 | clk_disable(usb_dc_ck); |
1da177e4 LT |
90 | } |
91 | } | |
92 | ||
93 | /* | |
94 | * Board specific gang-switched transceiver power on/off. | |
95 | * NOTE: OSK supplies power from DC, not battery. | |
96 | */ | |
97 | static int omap_ohci_transceiver_power(int on) | |
98 | { | |
99 | if (on) { | |
100 | if (machine_is_omap_innovator() && cpu_is_omap1510()) | |
4c98dc6b | 101 | __raw_writeb(__raw_readb(INNOVATOR_FPGA_CAM_USB_CONTROL) |
bd35078f | 102 | | ((1 << 5/*usb1*/) | (1 << 3/*usb2*/)), |
1da177e4 LT |
103 | INNOVATOR_FPGA_CAM_USB_CONTROL); |
104 | else if (machine_is_omap_osk()) | |
105 | tps65010_set_gpio_out_value(GPIO1, LOW); | |
106 | } else { | |
107 | if (machine_is_omap_innovator() && cpu_is_omap1510()) | |
4c98dc6b | 108 | __raw_writeb(__raw_readb(INNOVATOR_FPGA_CAM_USB_CONTROL) |
bd35078f | 109 | & ~((1 << 5/*usb1*/) | (1 << 3/*usb2*/)), |
1da177e4 LT |
110 | INNOVATOR_FPGA_CAM_USB_CONTROL); |
111 | else if (machine_is_omap_osk()) | |
112 | tps65010_set_gpio_out_value(GPIO1, HIGH); | |
113 | } | |
114 | ||
115 | return 0; | |
116 | } | |
117 | ||
bd35078f | 118 | #ifdef CONFIG_ARCH_OMAP15XX |
1da177e4 LT |
119 | /* |
120 | * OMAP-1510 specific Local Bus clock on/off | |
121 | */ | |
122 | static int omap_1510_local_bus_power(int on) | |
123 | { | |
124 | if (on) { | |
125 | omap_writel((1 << 1) | (1 << 0), OMAP1510_LB_MMU_CTL); | |
126 | udelay(200); | |
127 | } else { | |
128 | omap_writel(0, OMAP1510_LB_MMU_CTL); | |
129 | } | |
130 | ||
131 | return 0; | |
132 | } | |
133 | ||
134 | /* | |
135 | * OMAP-1510 specific Local Bus initialization | |
136 | * NOTE: This assumes 32MB memory size in OMAP1510LB_MEMSIZE. | |
bd35078f DB |
137 | * See also arch/mach-omap/memory.h for __virt_to_dma() and |
138 | * __dma_to_virt() which need to match with the physical | |
1da177e4 LT |
139 | * Local Bus address below. |
140 | */ | |
141 | static int omap_1510_local_bus_init(void) | |
142 | { | |
143 | unsigned int tlb; | |
144 | unsigned long lbaddr, physaddr; | |
145 | ||
bd35078f | 146 | omap_writel((omap_readl(OMAP1510_LB_CLOCK_DIV) & 0xfffffff8) | 0x4, |
1da177e4 LT |
147 | OMAP1510_LB_CLOCK_DIV); |
148 | ||
149 | /* Configure the Local Bus MMU table */ | |
150 | for (tlb = 0; tlb < OMAP1510_LB_MEMSIZE; tlb++) { | |
151 | lbaddr = tlb * 0x00100000 + OMAP1510_LB_OFFSET; | |
152 | physaddr = tlb * 0x00100000 + PHYS_OFFSET; | |
153 | omap_writel((lbaddr & 0x0fffffff) >> 22, OMAP1510_LB_MMU_CAM_H); | |
bd35078f | 154 | omap_writel(((lbaddr & 0x003ffc00) >> 6) | 0xc, |
1da177e4 LT |
155 | OMAP1510_LB_MMU_CAM_L); |
156 | omap_writel(physaddr >> 16, OMAP1510_LB_MMU_RAM_H); | |
157 | omap_writel((physaddr & 0x0000fc00) | 0x300, OMAP1510_LB_MMU_RAM_L); | |
158 | omap_writel(tlb << 4, OMAP1510_LB_MMU_LCK); | |
159 | omap_writel(0x1, OMAP1510_LB_MMU_LD_TLB); | |
160 | } | |
161 | ||
162 | /* Enable the walking table */ | |
163 | omap_writel(omap_readl(OMAP1510_LB_MMU_CTL) | (1 << 3), OMAP1510_LB_MMU_CTL); | |
164 | udelay(200); | |
165 | ||
166 | return 0; | |
167 | } | |
bd35078f DB |
168 | #else |
169 | #define omap_1510_local_bus_power(x) {} | |
170 | #define omap_1510_local_bus_init() {} | |
171 | #endif | |
1da177e4 LT |
172 | |
173 | #ifdef CONFIG_USB_OTG | |
174 | ||
175 | static void start_hnp(struct ohci_hcd *ohci) | |
176 | { | |
c2e935a7 RZ |
177 | struct usb_hcd *hcd = ohci_to_hcd(ohci); |
178 | const unsigned port = hcd->self.otg_port - 1; | |
1da177e4 | 179 | unsigned long flags; |
f35ae634 | 180 | u32 l; |
1da177e4 | 181 | |
3d46e73d | 182 | otg_start_hnp(hcd->usb_phy->otg); |
1da177e4 LT |
183 | |
184 | local_irq_save(flags); | |
7e1bbeb4 | 185 | hcd->usb_phy->otg->state = OTG_STATE_A_SUSPEND; |
1da177e4 | 186 | writel (RH_PS_PSS, &ohci->regs->roothub.portstatus [port]); |
f35ae634 TL |
187 | l = omap_readl(OTG_CTRL); |
188 | l &= ~OTG_A_BUSREQ; | |
189 | omap_writel(l, OTG_CTRL); | |
1da177e4 LT |
190 | local_irq_restore(flags); |
191 | } | |
192 | ||
193 | #endif | |
194 | ||
195 | /*-------------------------------------------------------------------------*/ | |
196 | ||
de57a154 | 197 | static int ohci_omap_reset(struct usb_hcd *hcd) |
1da177e4 | 198 | { |
bd35078f | 199 | struct ohci_hcd *ohci = hcd_to_ohci(hcd); |
d4f09e28 | 200 | struct omap_usb_config *config = dev_get_platdata(hcd->self.controller); |
1da177e4 LT |
201 | int need_transceiver = (config->otg != 0); |
202 | int ret; | |
203 | ||
bd35078f | 204 | dev_dbg(hcd->self.controller, "starting USB Controller\n"); |
1da177e4 LT |
205 | |
206 | if (config->otg) { | |
de57a154 | 207 | hcd->self.otg_port = config->otg; |
1da177e4 | 208 | /* default/minimum OTG power budget: 8 mA */ |
de57a154 | 209 | hcd->power_budget = 8; |
1da177e4 LT |
210 | } |
211 | ||
212 | /* boards can use OTG transceivers in non-OTG modes */ | |
213 | need_transceiver = need_transceiver | |
214 | || machine_is_omap_h2() || machine_is_omap_h3(); | |
215 | ||
d3645d39 PW |
216 | /* XXX OMAP16xx only */ |
217 | if (config->ocpi_enable) | |
218 | config->ocpi_enable(); | |
1da177e4 | 219 | |
c3df1a26 | 220 | #ifdef CONFIG_USB_OTG |
1da177e4 | 221 | if (need_transceiver) { |
3d46e73d AT |
222 | hcd->usb_phy = usb_get_phy(USB_PHY_TYPE_USB2); |
223 | if (!IS_ERR_OR_NULL(hcd->usb_phy)) { | |
224 | int status = otg_set_host(hcd->usb_phy->otg, | |
1da177e4 | 225 | &ohci_to_hcd(ohci)->self); |
c2e935a7 | 226 | dev_dbg(hcd->self.controller, "init %s phy, status %d\n", |
3d46e73d | 227 | hcd->usb_phy->label, status); |
1da177e4 | 228 | if (status) { |
3d46e73d | 229 | usb_put_phy(hcd->usb_phy); |
1da177e4 LT |
230 | return status; |
231 | } | |
232 | } else { | |
c2e935a7 | 233 | dev_err(hcd->self.controller, "can't find phy\n"); |
1da177e4 LT |
234 | return -ENODEV; |
235 | } | |
e8b24450 | 236 | ohci->start_hnp = start_hnp; |
1da177e4 LT |
237 | } |
238 | #endif | |
239 | ||
240 | omap_ohci_clock_power(1); | |
241 | ||
9b466c3b | 242 | if (cpu_is_omap15xx()) { |
1da177e4 LT |
243 | omap_1510_local_bus_power(1); |
244 | omap_1510_local_bus_init(); | |
245 | } | |
246 | ||
de57a154 MG |
247 | ret = ohci_setup(hcd); |
248 | if (ret < 0) | |
1da177e4 LT |
249 | return ret; |
250 | ||
de57a154 MG |
251 | if (config->otg || config->rwc) { |
252 | ohci->hc_control = OHCI_CTRL_RWC; | |
253 | writel(OHCI_CTRL_RWC, &ohci->regs->control); | |
254 | } | |
255 | ||
1da177e4 LT |
256 | /* board-specific power switching and overcurrent support */ |
257 | if (machine_is_omap_osk() || machine_is_omap_innovator()) { | |
258 | u32 rh = roothub_a (ohci); | |
259 | ||
260 | /* power switching (ganged by default) */ | |
261 | rh &= ~RH_A_NPS; | |
262 | ||
263 | /* TPS2045 switch for internal transceiver (port 1) */ | |
264 | if (machine_is_omap_osk()) { | |
bc96c0ad | 265 | ohci_to_hcd(ohci)->power_budget = 250; |
1da177e4 LT |
266 | |
267 | rh &= ~RH_A_NOCP; | |
268 | ||
269 | /* gpio9 for overcurrent detction */ | |
270 | omap_cfg_reg(W8_1610_GPIO9); | |
944e1bff | 271 | gpio_request(9, "OHCI overcurrent"); |
40e3925b | 272 | gpio_direction_input(9); |
1da177e4 LT |
273 | |
274 | /* for paranoia's sake: disable USB.PUEN */ | |
275 | omap_cfg_reg(W4_USB_HIGHZ); | |
276 | } | |
277 | ohci_writel(ohci, rh, &ohci->regs->roothub.a); | |
1133cd8a | 278 | ohci->flags &= ~OHCI_QUIRK_HUB_POWER; |
bd35078f DB |
279 | } else if (machine_is_nokia770()) { |
280 | /* We require a self-powered hub, which should have | |
281 | * plenty of power. */ | |
282 | ohci_to_hcd(ohci)->power_budget = 0; | |
1da177e4 LT |
283 | } |
284 | ||
37ebb549 | 285 | /* FIXME hub_wq hub requests should manage power switching */ |
1da177e4 LT |
286 | omap_ohci_transceiver_power(1); |
287 | ||
288 | /* board init will have already handled HMC and mux setup. | |
289 | * any external transceiver should already be initialized | |
290 | * too, so all configured ports use the right signaling now. | |
291 | */ | |
292 | ||
293 | return 0; | |
294 | } | |
295 | ||
1da177e4 LT |
296 | /*-------------------------------------------------------------------------*/ |
297 | ||
1da177e4 LT |
298 | /** |
299 | * usb_hcd_omap_probe - initialize OMAP-based HCDs | |
300 | * Context: !in_interrupt() | |
301 | * | |
302 | * Allocates basic resources for this USB host controller, and | |
303 | * then invokes the start() method for the HCD associated with it | |
304 | * through the hotplug entry's driver_data. | |
305 | */ | |
bd35078f | 306 | static int usb_hcd_omap_probe (const struct hc_driver *driver, |
1da177e4 LT |
307 | struct platform_device *pdev) |
308 | { | |
48944738 | 309 | int retval, irq; |
1da177e4 | 310 | struct usb_hcd *hcd = 0; |
1da177e4 LT |
311 | |
312 | if (pdev->num_resources != 2) { | |
0a3aa0d3 | 313 | dev_err(&pdev->dev, "invalid num_resources: %i\n", |
1da177e4 LT |
314 | pdev->num_resources); |
315 | return -ENODEV; | |
316 | } | |
317 | ||
bd35078f | 318 | if (pdev->resource[0].flags != IORESOURCE_MEM |
1da177e4 | 319 | || pdev->resource[1].flags != IORESOURCE_IRQ) { |
0a3aa0d3 | 320 | dev_err(&pdev->dev, "invalid resource type\n"); |
1da177e4 LT |
321 | return -ENODEV; |
322 | } | |
323 | ||
953a7e84 | 324 | usb_host_ck = clk_get(&pdev->dev, "usb_hhc_ck"); |
1da177e4 LT |
325 | if (IS_ERR(usb_host_ck)) |
326 | return PTR_ERR(usb_host_ck); | |
327 | ||
9b466c3b | 328 | if (!cpu_is_omap15xx()) |
953a7e84 | 329 | usb_dc_ck = clk_get(&pdev->dev, "usb_dc_ck"); |
bd35078f | 330 | else |
953a7e84 | 331 | usb_dc_ck = clk_get(&pdev->dev, "lb_ck"); |
bd35078f DB |
332 | |
333 | if (IS_ERR(usb_dc_ck)) { | |
334 | clk_put(usb_host_ck); | |
335 | return PTR_ERR(usb_dc_ck); | |
336 | } | |
337 | ||
338 | ||
7071a3ce | 339 | hcd = usb_create_hcd (driver, &pdev->dev, dev_name(&pdev->dev)); |
1da177e4 LT |
340 | if (!hcd) { |
341 | retval = -ENOMEM; | |
342 | goto err0; | |
343 | } | |
344 | hcd->rsrc_start = pdev->resource[0].start; | |
345 | hcd->rsrc_len = pdev->resource[0].end - pdev->resource[0].start + 1; | |
346 | ||
347 | if (!request_mem_region(hcd->rsrc_start, hcd->rsrc_len, hcd_name)) { | |
348 | dev_dbg(&pdev->dev, "request_mem_region failed\n"); | |
349 | retval = -EBUSY; | |
350 | goto err1; | |
351 | } | |
352 | ||
55c381e4 RK |
353 | hcd->regs = ioremap(hcd->rsrc_start, hcd->rsrc_len); |
354 | if (!hcd->regs) { | |
355 | dev_err(&pdev->dev, "can't ioremap OHCI HCD\n"); | |
356 | retval = -ENOMEM; | |
357 | goto err2; | |
358 | } | |
1da177e4 | 359 | |
48944738 DV |
360 | irq = platform_get_irq(pdev, 0); |
361 | if (irq < 0) { | |
362 | retval = -ENXIO; | |
55c381e4 | 363 | goto err3; |
48944738 | 364 | } |
b5dd18d8 | 365 | retval = usb_add_hcd(hcd, irq, 0); |
bd35078f | 366 | if (retval) |
55c381e4 | 367 | goto err3; |
bd35078f | 368 | |
3c9740a1 | 369 | device_wakeup_enable(hcd->self.controller); |
bd35078f | 370 | return 0; |
55c381e4 RK |
371 | err3: |
372 | iounmap(hcd->regs); | |
1da177e4 LT |
373 | err2: |
374 | release_mem_region(hcd->rsrc_start, hcd->rsrc_len); | |
375 | err1: | |
376 | usb_put_hcd(hcd); | |
377 | err0: | |
bd35078f | 378 | clk_put(usb_dc_ck); |
1da177e4 LT |
379 | clk_put(usb_host_ck); |
380 | return retval; | |
381 | } | |
382 | ||
383 | ||
384 | /* may be called with controller, bus, and devices active */ | |
385 | ||
386 | /** | |
387 | * usb_hcd_omap_remove - shutdown processing for OMAP-based HCDs | |
388 | * @dev: USB Host Controller being removed | |
389 | * Context: !in_interrupt() | |
390 | * | |
391 | * Reverses the effect of usb_hcd_omap_probe(), first invoking | |
392 | * the HCD's stop() method. It is always called from a thread | |
393 | * context, normally "rmmod", "apmd", or something similar. | |
1da177e4 | 394 | */ |
bd35078f DB |
395 | static inline void |
396 | usb_hcd_omap_remove (struct usb_hcd *hcd, struct platform_device *pdev) | |
1da177e4 | 397 | { |
de57a154 | 398 | dev_dbg(hcd->self.controller, "stopping USB Controller\n"); |
1da177e4 | 399 | usb_remove_hcd(hcd); |
de57a154 | 400 | omap_ohci_clock_power(0); |
3d46e73d AT |
401 | if (!IS_ERR_OR_NULL(hcd->usb_phy)) { |
402 | (void) otg_set_host(hcd->usb_phy->otg, 0); | |
403 | usb_put_phy(hcd->usb_phy); | |
bd35078f | 404 | } |
1da177e4 | 405 | if (machine_is_omap_osk()) |
944e1bff | 406 | gpio_free(9); |
55c381e4 | 407 | iounmap(hcd->regs); |
1da177e4 LT |
408 | release_mem_region(hcd->rsrc_start, hcd->rsrc_len); |
409 | usb_put_hcd(hcd); | |
bd35078f | 410 | clk_put(usb_dc_ck); |
1da177e4 LT |
411 | clk_put(usb_host_ck); |
412 | } | |
413 | ||
414 | /*-------------------------------------------------------------------------*/ | |
415 | ||
3ae5eaec | 416 | static int ohci_hcd_omap_drv_probe(struct platform_device *dev) |
1da177e4 | 417 | { |
3ae5eaec | 418 | return usb_hcd_omap_probe(&ohci_omap_hc_driver, dev); |
1da177e4 LT |
419 | } |
420 | ||
3ae5eaec | 421 | static int ohci_hcd_omap_drv_remove(struct platform_device *dev) |
1da177e4 | 422 | { |
3ae5eaec | 423 | struct usb_hcd *hcd = platform_get_drvdata(dev); |
1da177e4 | 424 | |
3ae5eaec | 425 | usb_hcd_omap_remove(hcd, dev); |
1da177e4 LT |
426 | |
427 | return 0; | |
428 | } | |
429 | ||
430 | /*-------------------------------------------------------------------------*/ | |
431 | ||
432 | #ifdef CONFIG_PM | |
433 | ||
10abfa13 | 434 | static int ohci_omap_suspend(struct platform_device *pdev, pm_message_t message) |
1da177e4 | 435 | { |
10abfa13 MG |
436 | struct usb_hcd *hcd = platform_get_drvdata(pdev); |
437 | struct ohci_hcd *ohci = hcd_to_ohci(hcd); | |
438 | bool do_wakeup = device_may_wakeup(&pdev->dev); | |
439 | int ret; | |
f197b2c5 DB |
440 | |
441 | if (time_before(jiffies, ohci->next_statechange)) | |
442 | msleep(5); | |
443 | ohci->next_statechange = jiffies; | |
444 | ||
10abfa13 MG |
445 | ret = ohci_suspend(hcd, do_wakeup); |
446 | if (ret) | |
447 | return ret; | |
448 | ||
f197b2c5 | 449 | omap_ohci_clock_power(0); |
10abfa13 | 450 | return ret; |
1da177e4 LT |
451 | } |
452 | ||
3ae5eaec | 453 | static int ohci_omap_resume(struct platform_device *dev) |
1da177e4 | 454 | { |
43bbb7e0 AS |
455 | struct usb_hcd *hcd = platform_get_drvdata(dev); |
456 | struct ohci_hcd *ohci = hcd_to_ohci(hcd); | |
1da177e4 | 457 | |
b404a5b0 | 458 | if (time_before(jiffies, ohci->next_statechange)) |
459 | msleep(5); | |
460 | ohci->next_statechange = jiffies; | |
f197b2c5 | 461 | |
b404a5b0 | 462 | omap_ohci_clock_power(1); |
cfa49b4b | 463 | ohci_resume(hcd, false); |
f197b2c5 | 464 | return 0; |
1da177e4 LT |
465 | } |
466 | ||
467 | #endif | |
468 | ||
469 | /*-------------------------------------------------------------------------*/ | |
470 | ||
471 | /* | |
472 | * Driver definition to register with the OMAP bus | |
473 | */ | |
3ae5eaec | 474 | static struct platform_driver ohci_hcd_omap_driver = { |
1da177e4 LT |
475 | .probe = ohci_hcd_omap_drv_probe, |
476 | .remove = ohci_hcd_omap_drv_remove, | |
dd9048af | 477 | .shutdown = usb_hcd_platform_shutdown, |
1da177e4 LT |
478 | #ifdef CONFIG_PM |
479 | .suspend = ohci_omap_suspend, | |
480 | .resume = ohci_omap_resume, | |
481 | #endif | |
3ae5eaec | 482 | .driver = { |
3ae5eaec RK |
483 | .name = "ohci", |
484 | }, | |
1da177e4 LT |
485 | }; |
486 | ||
de57a154 MG |
487 | static const struct ohci_driver_overrides omap_overrides __initconst = { |
488 | .product_desc = "OMAP OHCI", | |
489 | .reset = ohci_omap_reset | |
490 | }; | |
491 | ||
492 | static int __init ohci_omap_init(void) | |
493 | { | |
494 | if (usb_disabled()) | |
495 | return -ENODEV; | |
496 | ||
497 | pr_info("%s: " DRIVER_DESC "\n", hcd_name); | |
498 | ||
499 | ohci_init_driver(&ohci_omap_hc_driver, &omap_overrides); | |
500 | return platform_driver_register(&ohci_hcd_omap_driver); | |
501 | } | |
502 | module_init(ohci_omap_init); | |
503 | ||
504 | static void __exit ohci_omap_cleanup(void) | |
505 | { | |
506 | platform_driver_unregister(&ohci_hcd_omap_driver); | |
507 | } | |
508 | module_exit(ohci_omap_cleanup); | |
509 | ||
510 | MODULE_DESCRIPTION(DRIVER_DESC); | |
f4fce61d | 511 | MODULE_ALIAS("platform:ohci"); |
de57a154 | 512 | MODULE_LICENSE("GPL"); |