Commit | Line | Data |
---|---|---|
1da177e4 LT |
1 | /* |
2 | * SL811HS HCD (Host Controller Driver) for USB. | |
3 | * | |
4 | * Copyright (C) 2004 Psion Teklogix (for NetBook PRO) | |
1e9a47b6 DB |
5 | * Copyright (C) 2004-2005 David Brownell |
6 | * | |
1da177e4 LT |
7 | * Periodic scheduling is based on Roman's OHCI code |
8 | * Copyright (C) 1999 Roman Weissgaerber | |
9 | * | |
10 | * The SL811HS controller handles host side USB (like the SL11H, but with | |
11 | * another register set and SOF generation) as well as peripheral side USB | |
12 | * (like the SL811S). This driver version doesn't implement the Gadget API | |
13 | * for the peripheral role; or OTG (that'd need much external circuitry). | |
14 | * | |
15 | * For documentation, see the SL811HS spec and the "SL811HS Embedded Host" | |
16 | * document (providing significant pieces missing from that spec); plus | |
17 | * the SL811S spec if you want peripheral side info. | |
1e9a47b6 | 18 | */ |
1da177e4 LT |
19 | |
20 | /* | |
21 | * Status: Passed basic stress testing, works with hubs, mice, keyboards, | |
22 | * and usb-storage. | |
23 | * | |
24 | * TODO: | |
25 | * - usb suspend/resume triggered by sl811 (with USB_SUSPEND) | |
26 | * - various issues noted in the code | |
27 | * - performance work; use both register banks; ... | |
28 | * - use urb->iso_frame_desc[] with ISO transfers | |
29 | */ | |
30 | ||
31 | #undef VERBOSE | |
32 | #undef PACKET_TRACE | |
33 | ||
34 | #include <linux/config.h> | |
1da177e4 LT |
35 | #include <linux/module.h> |
36 | #include <linux/moduleparam.h> | |
37 | #include <linux/kernel.h> | |
38 | #include <linux/delay.h> | |
39 | #include <linux/ioport.h> | |
40 | #include <linux/sched.h> | |
41 | #include <linux/slab.h> | |
42 | #include <linux/smp_lock.h> | |
43 | #include <linux/errno.h> | |
44 | #include <linux/init.h> | |
45 | #include <linux/timer.h> | |
46 | #include <linux/list.h> | |
47 | #include <linux/interrupt.h> | |
48 | #include <linux/usb.h> | |
325a4af6 | 49 | #include <linux/usb/sl811.h> |
d052d1be | 50 | #include <linux/platform_device.h> |
1da177e4 LT |
51 | |
52 | #include <asm/io.h> | |
53 | #include <asm/irq.h> | |
54 | #include <asm/system.h> | |
55 | #include <asm/byteorder.h> | |
56 | ||
57 | #include "../core/hcd.h" | |
58 | #include "sl811.h" | |
59 | ||
60 | ||
61 | MODULE_DESCRIPTION("SL811HS USB Host Controller Driver"); | |
62 | MODULE_LICENSE("GPL"); | |
63 | ||
1e9a47b6 | 64 | #define DRIVER_VERSION "19 May 2005" |
1da177e4 LT |
65 | |
66 | ||
67 | #ifndef DEBUG | |
68 | # define STUB_DEBUG_FILE | |
69 | #endif | |
70 | ||
71 | /* for now, use only one transfer register bank */ | |
72 | #undef USE_B | |
73 | ||
74 | /* this doesn't understand urb->iso_frame_desc[], but if you had a driver | |
75 | * that just queued one ISO frame per URB then iso transfers "should" work | |
76 | * using the normal urb status fields. | |
77 | */ | |
78 | #define DISABLE_ISO | |
79 | ||
80 | // #define QUIRK2 | |
81 | #define QUIRK3 | |
82 | ||
83 | static const char hcd_name[] = "sl811-hcd"; | |
84 | ||
85 | /*-------------------------------------------------------------------------*/ | |
86 | ||
87 | static void port_power(struct sl811 *sl811, int is_on) | |
88 | { | |
89 | struct usb_hcd *hcd = sl811_to_hcd(sl811); | |
90 | ||
91 | /* hub is inactive unless the port is powered */ | |
92 | if (is_on) { | |
93 | if (sl811->port1 & (1 << USB_PORT_FEAT_POWER)) | |
94 | return; | |
95 | ||
96 | sl811->port1 = (1 << USB_PORT_FEAT_POWER); | |
97 | sl811->irq_enable = SL11H_INTMASK_INSRMV; | |
98 | hcd->self.controller->power.power_state = PMSG_ON; | |
99 | } else { | |
100 | sl811->port1 = 0; | |
101 | sl811->irq_enable = 0; | |
102 | hcd->state = HC_STATE_HALT; | |
103 | hcd->self.controller->power.power_state = PMSG_SUSPEND; | |
104 | } | |
105 | sl811->ctrl1 = 0; | |
106 | sl811_write(sl811, SL11H_IRQ_ENABLE, 0); | |
107 | sl811_write(sl811, SL11H_IRQ_STATUS, ~0); | |
108 | ||
109 | if (sl811->board && sl811->board->port_power) { | |
110 | /* switch VBUS, at 500mA unless hub power budget gets set */ | |
111 | DBG("power %s\n", is_on ? "on" : "off"); | |
112 | sl811->board->port_power(hcd->self.controller, is_on); | |
113 | } | |
114 | ||
115 | /* reset as thoroughly as we can */ | |
116 | if (sl811->board && sl811->board->reset) | |
117 | sl811->board->reset(hcd->self.controller); | |
1e9a47b6 DB |
118 | else { |
119 | sl811_write(sl811, SL11H_CTLREG1, SL11H_CTL1MASK_SE0); | |
120 | mdelay(20); | |
121 | } | |
1da177e4 LT |
122 | |
123 | sl811_write(sl811, SL11H_IRQ_ENABLE, 0); | |
124 | sl811_write(sl811, SL11H_CTLREG1, sl811->ctrl1); | |
125 | sl811_write(sl811, SL811HS_CTLREG2, SL811HS_CTL2_INIT); | |
126 | sl811_write(sl811, SL11H_IRQ_ENABLE, sl811->irq_enable); | |
127 | ||
128 | // if !is_on, put into lowpower mode now | |
129 | } | |
130 | ||
131 | /*-------------------------------------------------------------------------*/ | |
132 | ||
133 | /* This is a PIO-only HCD. Queueing appends URBs to the endpoint's queue, | |
134 | * and may start I/O. Endpoint queues are scanned during completion irq | |
093cf723 | 135 | * handlers (one per packet: ACK, NAK, faults, etc) and urb cancellation. |
1da177e4 LT |
136 | * |
137 | * Using an external DMA engine to copy a packet at a time could work, | |
138 | * though setup/teardown costs may be too big to make it worthwhile. | |
139 | */ | |
140 | ||
141 | /* SETUP starts a new control request. Devices are not allowed to | |
142 | * STALL or NAK these; they must cancel any pending control requests. | |
143 | */ | |
144 | static void setup_packet( | |
145 | struct sl811 *sl811, | |
146 | struct sl811h_ep *ep, | |
147 | struct urb *urb, | |
148 | u8 bank, | |
149 | u8 control | |
150 | ) | |
151 | { | |
152 | u8 addr; | |
153 | u8 len; | |
154 | void __iomem *data_reg; | |
155 | ||
156 | addr = SL811HS_PACKET_BUF(bank == 0); | |
157 | len = sizeof(struct usb_ctrlrequest); | |
158 | data_reg = sl811->data_reg; | |
159 | sl811_write_buf(sl811, addr, urb->setup_packet, len); | |
160 | ||
161 | /* autoincrementing */ | |
162 | sl811_write(sl811, bank + SL11H_BUFADDRREG, addr); | |
163 | writeb(len, data_reg); | |
164 | writeb(SL_SETUP /* | ep->epnum */, data_reg); | |
165 | writeb(usb_pipedevice(urb->pipe), data_reg); | |
166 | ||
167 | /* always OUT/data0 */ ; | |
168 | sl811_write(sl811, bank + SL11H_HOSTCTLREG, | |
169 | control | SL11H_HCTLMASK_OUT); | |
170 | ep->length = 0; | |
171 | PACKET("SETUP qh%p\n", ep); | |
172 | } | |
173 | ||
174 | /* STATUS finishes control requests, often after IN or OUT data packets */ | |
175 | static void status_packet( | |
176 | struct sl811 *sl811, | |
177 | struct sl811h_ep *ep, | |
178 | struct urb *urb, | |
179 | u8 bank, | |
180 | u8 control | |
181 | ) | |
182 | { | |
183 | int do_out; | |
184 | void __iomem *data_reg; | |
185 | ||
186 | do_out = urb->transfer_buffer_length && usb_pipein(urb->pipe); | |
187 | data_reg = sl811->data_reg; | |
188 | ||
189 | /* autoincrementing */ | |
190 | sl811_write(sl811, bank + SL11H_BUFADDRREG, 0); | |
191 | writeb(0, data_reg); | |
192 | writeb((do_out ? SL_OUT : SL_IN) /* | ep->epnum */, data_reg); | |
193 | writeb(usb_pipedevice(urb->pipe), data_reg); | |
194 | ||
195 | /* always data1; sometimes IN */ | |
196 | control |= SL11H_HCTLMASK_TOGGLE; | |
197 | if (do_out) | |
198 | control |= SL11H_HCTLMASK_OUT; | |
199 | sl811_write(sl811, bank + SL11H_HOSTCTLREG, control); | |
200 | ep->length = 0; | |
201 | PACKET("STATUS%s/%s qh%p\n", ep->nak_count ? "/retry" : "", | |
202 | do_out ? "out" : "in", ep); | |
203 | } | |
204 | ||
205 | /* IN packets can be used with any type of endpoint. here we just | |
206 | * start the transfer, data from the peripheral may arrive later. | |
207 | * urb->iso_frame_desc is currently ignored here... | |
208 | */ | |
209 | static void in_packet( | |
210 | struct sl811 *sl811, | |
211 | struct sl811h_ep *ep, | |
212 | struct urb *urb, | |
213 | u8 bank, | |
214 | u8 control | |
215 | ) | |
216 | { | |
217 | u8 addr; | |
218 | u8 len; | |
219 | void __iomem *data_reg; | |
220 | ||
221 | /* avoid losing data on overflow */ | |
222 | len = ep->maxpacket; | |
223 | addr = SL811HS_PACKET_BUF(bank == 0); | |
224 | if (!(control & SL11H_HCTLMASK_ISOCH) | |
225 | && usb_gettoggle(urb->dev, ep->epnum, 0)) | |
226 | control |= SL11H_HCTLMASK_TOGGLE; | |
227 | data_reg = sl811->data_reg; | |
228 | ||
229 | /* autoincrementing */ | |
230 | sl811_write(sl811, bank + SL11H_BUFADDRREG, addr); | |
231 | writeb(len, data_reg); | |
232 | writeb(SL_IN | ep->epnum, data_reg); | |
233 | writeb(usb_pipedevice(urb->pipe), data_reg); | |
234 | ||
235 | sl811_write(sl811, bank + SL11H_HOSTCTLREG, control); | |
236 | ep->length = min((int)len, | |
237 | urb->transfer_buffer_length - urb->actual_length); | |
238 | PACKET("IN%s/%d qh%p len%d\n", ep->nak_count ? "/retry" : "", | |
239 | !!usb_gettoggle(urb->dev, ep->epnum, 0), ep, len); | |
240 | } | |
241 | ||
242 | /* OUT packets can be used with any type of endpoint. | |
243 | * urb->iso_frame_desc is currently ignored here... | |
244 | */ | |
245 | static void out_packet( | |
246 | struct sl811 *sl811, | |
247 | struct sl811h_ep *ep, | |
248 | struct urb *urb, | |
249 | u8 bank, | |
250 | u8 control | |
251 | ) | |
252 | { | |
253 | void *buf; | |
254 | u8 addr; | |
255 | u8 len; | |
256 | void __iomem *data_reg; | |
257 | ||
258 | buf = urb->transfer_buffer + urb->actual_length; | |
259 | prefetch(buf); | |
260 | ||
261 | len = min((int)ep->maxpacket, | |
262 | urb->transfer_buffer_length - urb->actual_length); | |
263 | ||
264 | if (!(control & SL11H_HCTLMASK_ISOCH) | |
265 | && usb_gettoggle(urb->dev, ep->epnum, 1)) | |
266 | control |= SL11H_HCTLMASK_TOGGLE; | |
267 | addr = SL811HS_PACKET_BUF(bank == 0); | |
268 | data_reg = sl811->data_reg; | |
269 | ||
270 | sl811_write_buf(sl811, addr, buf, len); | |
271 | ||
272 | /* autoincrementing */ | |
273 | sl811_write(sl811, bank + SL11H_BUFADDRREG, addr); | |
274 | writeb(len, data_reg); | |
275 | writeb(SL_OUT | ep->epnum, data_reg); | |
276 | writeb(usb_pipedevice(urb->pipe), data_reg); | |
277 | ||
278 | sl811_write(sl811, bank + SL11H_HOSTCTLREG, | |
279 | control | SL11H_HCTLMASK_OUT); | |
280 | ep->length = len; | |
281 | PACKET("OUT%s/%d qh%p len%d\n", ep->nak_count ? "/retry" : "", | |
282 | !!usb_gettoggle(urb->dev, ep->epnum, 1), ep, len); | |
283 | } | |
284 | ||
285 | /*-------------------------------------------------------------------------*/ | |
286 | ||
287 | /* caller updates on-chip enables later */ | |
288 | ||
289 | static inline void sofirq_on(struct sl811 *sl811) | |
290 | { | |
291 | if (sl811->irq_enable & SL11H_INTMASK_SOFINTR) | |
292 | return; | |
293 | VDBG("sof irq on\n"); | |
294 | sl811->irq_enable |= SL11H_INTMASK_SOFINTR; | |
295 | } | |
296 | ||
297 | static inline void sofirq_off(struct sl811 *sl811) | |
298 | { | |
299 | if (!(sl811->irq_enable & SL11H_INTMASK_SOFINTR)) | |
300 | return; | |
301 | VDBG("sof irq off\n"); | |
302 | sl811->irq_enable &= ~SL11H_INTMASK_SOFINTR; | |
303 | } | |
304 | ||
305 | /*-------------------------------------------------------------------------*/ | |
306 | ||
307 | /* pick the next endpoint for a transaction, and issue it. | |
308 | * frames start with periodic transfers (after whatever is pending | |
309 | * from the previous frame), and the rest of the time is async | |
310 | * transfers, scheduled round-robin. | |
311 | */ | |
312 | static struct sl811h_ep *start(struct sl811 *sl811, u8 bank) | |
313 | { | |
314 | struct sl811h_ep *ep; | |
315 | struct urb *urb; | |
316 | int fclock; | |
317 | u8 control; | |
318 | ||
319 | /* use endpoint at schedule head */ | |
320 | if (sl811->next_periodic) { | |
321 | ep = sl811->next_periodic; | |
322 | sl811->next_periodic = ep->next; | |
323 | } else { | |
324 | if (sl811->next_async) | |
325 | ep = sl811->next_async; | |
326 | else if (!list_empty(&sl811->async)) | |
327 | ep = container_of(sl811->async.next, | |
328 | struct sl811h_ep, schedule); | |
329 | else { | |
330 | /* could set up the first fullspeed periodic | |
331 | * transfer for the next frame ... | |
332 | */ | |
333 | return NULL; | |
334 | } | |
335 | ||
336 | #ifdef USE_B | |
337 | if ((bank && sl811->active_b == ep) || sl811->active_a == ep) | |
338 | return NULL; | |
339 | #endif | |
340 | ||
341 | if (ep->schedule.next == &sl811->async) | |
342 | sl811->next_async = NULL; | |
343 | else | |
344 | sl811->next_async = container_of(ep->schedule.next, | |
345 | struct sl811h_ep, schedule); | |
346 | } | |
347 | ||
348 | if (unlikely(list_empty(&ep->hep->urb_list))) { | |
349 | DBG("empty %p queue?\n", ep); | |
350 | return NULL; | |
351 | } | |
352 | ||
353 | urb = container_of(ep->hep->urb_list.next, struct urb, urb_list); | |
354 | control = ep->defctrl; | |
355 | ||
356 | /* if this frame doesn't have enough time left to transfer this | |
357 | * packet, wait till the next frame. too-simple algorithm... | |
358 | */ | |
359 | fclock = sl811_read(sl811, SL11H_SOFTMRREG) << 6; | |
360 | fclock -= 100; /* setup takes not much time */ | |
361 | if (urb->dev->speed == USB_SPEED_LOW) { | |
362 | if (control & SL11H_HCTLMASK_PREAMBLE) { | |
363 | /* also note erratum 1: some hubs won't work */ | |
364 | fclock -= 800; | |
365 | } | |
366 | fclock -= ep->maxpacket << 8; | |
367 | ||
368 | /* erratum 2: AFTERSOF only works for fullspeed */ | |
369 | if (fclock < 0) { | |
370 | if (ep->period) | |
371 | sl811->stat_overrun++; | |
372 | sofirq_on(sl811); | |
373 | return NULL; | |
374 | } | |
375 | } else { | |
376 | fclock -= 12000 / 19; /* 19 64byte packets/msec */ | |
377 | if (fclock < 0) { | |
378 | if (ep->period) | |
379 | sl811->stat_overrun++; | |
380 | control |= SL11H_HCTLMASK_AFTERSOF; | |
381 | ||
382 | /* throttle bulk/control irq noise */ | |
383 | } else if (ep->nak_count) | |
384 | control |= SL11H_HCTLMASK_AFTERSOF; | |
385 | } | |
386 | ||
387 | ||
388 | switch (ep->nextpid) { | |
389 | case USB_PID_IN: | |
390 | in_packet(sl811, ep, urb, bank, control); | |
391 | break; | |
392 | case USB_PID_OUT: | |
393 | out_packet(sl811, ep, urb, bank, control); | |
394 | break; | |
395 | case USB_PID_SETUP: | |
396 | setup_packet(sl811, ep, urb, bank, control); | |
397 | break; | |
398 | case USB_PID_ACK: /* for control status */ | |
399 | status_packet(sl811, ep, urb, bank, control); | |
400 | break; | |
401 | default: | |
402 | DBG("bad ep%p pid %02x\n", ep, ep->nextpid); | |
403 | ep = NULL; | |
404 | } | |
405 | return ep; | |
406 | } | |
407 | ||
408 | #define MIN_JIFFIES ((msecs_to_jiffies(2) > 1) ? msecs_to_jiffies(2) : 2) | |
409 | ||
410 | static inline void start_transfer(struct sl811 *sl811) | |
411 | { | |
412 | if (sl811->port1 & (1 << USB_PORT_FEAT_SUSPEND)) | |
413 | return; | |
414 | if (sl811->active_a == NULL) { | |
415 | sl811->active_a = start(sl811, SL811_EP_A(SL811_HOST_BUF)); | |
416 | if (sl811->active_a != NULL) | |
417 | sl811->jiffies_a = jiffies + MIN_JIFFIES; | |
418 | } | |
419 | #ifdef USE_B | |
420 | if (sl811->active_b == NULL) { | |
421 | sl811->active_b = start(sl811, SL811_EP_B(SL811_HOST_BUF)); | |
422 | if (sl811->active_b != NULL) | |
423 | sl811->jiffies_b = jiffies + MIN_JIFFIES; | |
424 | } | |
425 | #endif | |
426 | } | |
427 | ||
428 | static void finish_request( | |
429 | struct sl811 *sl811, | |
430 | struct sl811h_ep *ep, | |
431 | struct urb *urb, | |
432 | struct pt_regs *regs, | |
433 | int status | |
434 | ) __releases(sl811->lock) __acquires(sl811->lock) | |
435 | { | |
436 | unsigned i; | |
437 | ||
438 | if (usb_pipecontrol(urb->pipe)) | |
439 | ep->nextpid = USB_PID_SETUP; | |
440 | ||
441 | spin_lock(&urb->lock); | |
442 | if (urb->status == -EINPROGRESS) | |
443 | urb->status = status; | |
1e9a47b6 | 444 | urb->hcpriv = NULL; |
1da177e4 LT |
445 | spin_unlock(&urb->lock); |
446 | ||
447 | spin_unlock(&sl811->lock); | |
448 | usb_hcd_giveback_urb(sl811_to_hcd(sl811), urb, regs); | |
449 | spin_lock(&sl811->lock); | |
450 | ||
451 | /* leave active endpoints in the schedule */ | |
452 | if (!list_empty(&ep->hep->urb_list)) | |
453 | return; | |
454 | ||
455 | /* async deschedule? */ | |
456 | if (!list_empty(&ep->schedule)) { | |
457 | list_del_init(&ep->schedule); | |
458 | if (ep == sl811->next_async) | |
459 | sl811->next_async = NULL; | |
460 | return; | |
461 | } | |
462 | ||
463 | /* periodic deschedule */ | |
464 | DBG("deschedule qh%d/%p branch %d\n", ep->period, ep, ep->branch); | |
465 | for (i = ep->branch; i < PERIODIC_SIZE; i += ep->period) { | |
466 | struct sl811h_ep *temp; | |
467 | struct sl811h_ep **prev = &sl811->periodic[i]; | |
468 | ||
469 | while (*prev && ((temp = *prev) != ep)) | |
470 | prev = &temp->next; | |
471 | if (*prev) | |
472 | *prev = ep->next; | |
473 | sl811->load[i] -= ep->load; | |
1e9a47b6 | 474 | } |
1da177e4 LT |
475 | ep->branch = PERIODIC_SIZE; |
476 | sl811->periodic_count--; | |
477 | sl811_to_hcd(sl811)->self.bandwidth_allocated | |
478 | -= ep->load / ep->period; | |
479 | if (ep == sl811->next_periodic) | |
480 | sl811->next_periodic = ep->next; | |
481 | ||
482 | /* we might turn SOFs back on again for the async schedule */ | |
483 | if (sl811->periodic_count == 0) | |
484 | sofirq_off(sl811); | |
485 | } | |
486 | ||
487 | static void | |
488 | done(struct sl811 *sl811, struct sl811h_ep *ep, u8 bank, struct pt_regs *regs) | |
489 | { | |
490 | u8 status; | |
491 | struct urb *urb; | |
492 | int urbstat = -EINPROGRESS; | |
493 | ||
494 | if (unlikely(!ep)) | |
495 | return; | |
496 | ||
497 | status = sl811_read(sl811, bank + SL11H_PKTSTATREG); | |
498 | ||
499 | urb = container_of(ep->hep->urb_list.next, struct urb, urb_list); | |
500 | ||
501 | /* we can safely ignore NAKs */ | |
502 | if (status & SL11H_STATMASK_NAK) { | |
503 | // PACKET("...NAK_%02x qh%p\n", bank, ep); | |
504 | if (!ep->period) | |
505 | ep->nak_count++; | |
506 | ep->error_count = 0; | |
507 | ||
508 | /* ACK advances transfer, toggle, and maybe queue */ | |
509 | } else if (status & SL11H_STATMASK_ACK) { | |
510 | struct usb_device *udev = urb->dev; | |
511 | int len; | |
512 | unsigned char *buf; | |
513 | ||
514 | /* urb->iso_frame_desc is currently ignored here... */ | |
515 | ||
516 | ep->nak_count = ep->error_count = 0; | |
517 | switch (ep->nextpid) { | |
518 | case USB_PID_OUT: | |
519 | // PACKET("...ACK/out_%02x qh%p\n", bank, ep); | |
520 | urb->actual_length += ep->length; | |
521 | usb_dotoggle(udev, ep->epnum, 1); | |
522 | if (urb->actual_length | |
523 | == urb->transfer_buffer_length) { | |
524 | if (usb_pipecontrol(urb->pipe)) | |
525 | ep->nextpid = USB_PID_ACK; | |
526 | ||
527 | /* some bulk protocols terminate OUT transfers | |
528 | * by a short packet, using ZLPs not padding. | |
529 | */ | |
530 | else if (ep->length < ep->maxpacket | |
531 | || !(urb->transfer_flags | |
532 | & URB_ZERO_PACKET)) | |
533 | urbstat = 0; | |
534 | } | |
535 | break; | |
536 | case USB_PID_IN: | |
537 | // PACKET("...ACK/in_%02x qh%p\n", bank, ep); | |
538 | buf = urb->transfer_buffer + urb->actual_length; | |
539 | prefetchw(buf); | |
540 | len = ep->maxpacket - sl811_read(sl811, | |
541 | bank + SL11H_XFERCNTREG); | |
542 | if (len > ep->length) { | |
543 | len = ep->length; | |
544 | urb->status = -EOVERFLOW; | |
545 | } | |
546 | urb->actual_length += len; | |
547 | sl811_read_buf(sl811, SL811HS_PACKET_BUF(bank == 0), | |
548 | buf, len); | |
549 | usb_dotoggle(udev, ep->epnum, 0); | |
550 | if (urb->actual_length == urb->transfer_buffer_length) | |
551 | urbstat = 0; | |
552 | else if (len < ep->maxpacket) { | |
553 | if (urb->transfer_flags & URB_SHORT_NOT_OK) | |
554 | urbstat = -EREMOTEIO; | |
555 | else | |
556 | urbstat = 0; | |
557 | } | |
558 | if (usb_pipecontrol(urb->pipe) | |
559 | && (urbstat == -EREMOTEIO | |
560 | || urbstat == 0)) { | |
561 | ||
562 | /* NOTE if the status stage STALLs (why?), | |
563 | * this reports the wrong urb status. | |
564 | */ | |
565 | spin_lock(&urb->lock); | |
566 | if (urb->status == -EINPROGRESS) | |
567 | urb->status = urbstat; | |
568 | spin_unlock(&urb->lock); | |
569 | ||
570 | urb = NULL; | |
571 | ep->nextpid = USB_PID_ACK; | |
572 | } | |
573 | break; | |
574 | case USB_PID_SETUP: | |
575 | // PACKET("...ACK/setup_%02x qh%p\n", bank, ep); | |
576 | if (urb->transfer_buffer_length == urb->actual_length) | |
577 | ep->nextpid = USB_PID_ACK; | |
578 | else if (usb_pipeout(urb->pipe)) { | |
579 | usb_settoggle(udev, 0, 1, 1); | |
580 | ep->nextpid = USB_PID_OUT; | |
581 | } else { | |
582 | usb_settoggle(udev, 0, 0, 1); | |
583 | ep->nextpid = USB_PID_IN; | |
584 | } | |
585 | break; | |
586 | case USB_PID_ACK: | |
587 | // PACKET("...ACK/status_%02x qh%p\n", bank, ep); | |
588 | urbstat = 0; | |
589 | break; | |
590 | } | |
591 | ||
592 | /* STALL stops all transfers */ | |
593 | } else if (status & SL11H_STATMASK_STALL) { | |
594 | PACKET("...STALL_%02x qh%p\n", bank, ep); | |
595 | ep->nak_count = ep->error_count = 0; | |
596 | urbstat = -EPIPE; | |
597 | ||
598 | /* error? retry, until "3 strikes" */ | |
599 | } else if (++ep->error_count >= 3) { | |
600 | if (status & SL11H_STATMASK_TMOUT) | |
601 | urbstat = -ETIMEDOUT; | |
602 | else if (status & SL11H_STATMASK_OVF) | |
603 | urbstat = -EOVERFLOW; | |
604 | else | |
605 | urbstat = -EPROTO; | |
606 | ep->error_count = 0; | |
607 | PACKET("...3STRIKES_%02x %02x qh%p stat %d\n", | |
608 | bank, status, ep, urbstat); | |
609 | } | |
610 | ||
611 | if (urb && (urbstat != -EINPROGRESS || urb->status != -EINPROGRESS)) | |
612 | finish_request(sl811, ep, urb, regs, urbstat); | |
613 | } | |
614 | ||
615 | static inline u8 checkdone(struct sl811 *sl811) | |
616 | { | |
617 | u8 ctl; | |
618 | u8 irqstat = 0; | |
619 | ||
620 | if (sl811->active_a && time_before_eq(sl811->jiffies_a, jiffies)) { | |
621 | ctl = sl811_read(sl811, SL811_EP_A(SL11H_HOSTCTLREG)); | |
622 | if (ctl & SL11H_HCTLMASK_ARM) | |
623 | sl811_write(sl811, SL811_EP_A(SL11H_HOSTCTLREG), 0); | |
624 | DBG("%s DONE_A: ctrl %02x sts %02x\n", | |
625 | (ctl & SL11H_HCTLMASK_ARM) ? "timeout" : "lost", | |
626 | ctl, | |
627 | sl811_read(sl811, SL811_EP_A(SL11H_PKTSTATREG))); | |
628 | irqstat |= SL11H_INTMASK_DONE_A; | |
629 | } | |
630 | #ifdef USE_B | |
631 | if (sl811->active_b && time_before_eq(sl811->jiffies_b, jiffies)) { | |
632 | ctl = sl811_read(sl811, SL811_EP_B(SL11H_HOSTCTLREG)); | |
633 | if (ctl & SL11H_HCTLMASK_ARM) | |
634 | sl811_write(sl811, SL811_EP_B(SL11H_HOSTCTLREG), 0); | |
635 | DBG("%s DONE_B: ctrl %02x sts %02x\n", | |
636 | (ctl & SL11H_HCTLMASK_ARM) ? "timeout" : "lost", | |
637 | ctl, | |
638 | sl811_read(sl811, SL811_EP_B(SL11H_PKTSTATREG))); | |
639 | irqstat |= SL11H_INTMASK_DONE_A; | |
640 | } | |
641 | #endif | |
642 | return irqstat; | |
643 | } | |
644 | ||
645 | static irqreturn_t sl811h_irq(struct usb_hcd *hcd, struct pt_regs *regs) | |
646 | { | |
647 | struct sl811 *sl811 = hcd_to_sl811(hcd); | |
648 | u8 irqstat; | |
649 | irqreturn_t ret = IRQ_NONE; | |
650 | unsigned retries = 5; | |
651 | ||
652 | spin_lock(&sl811->lock); | |
653 | ||
654 | retry: | |
655 | irqstat = sl811_read(sl811, SL11H_IRQ_STATUS) & ~SL11H_INTMASK_DP; | |
656 | if (irqstat) { | |
657 | sl811_write(sl811, SL11H_IRQ_STATUS, irqstat); | |
658 | irqstat &= sl811->irq_enable; | |
659 | } | |
660 | ||
661 | #ifdef QUIRK2 | |
662 | /* this may no longer be necessary ... */ | |
1e9a47b6 | 663 | if (irqstat == 0) { |
1da177e4 | 664 | irqstat = checkdone(sl811); |
1e9a47b6 | 665 | if (irqstat) |
1da177e4 LT |
666 | sl811->stat_lost++; |
667 | } | |
668 | #endif | |
669 | ||
670 | /* USB packets, not necessarily handled in the order they're | |
671 | * issued ... that's fine if they're different endpoints. | |
672 | */ | |
673 | if (irqstat & SL11H_INTMASK_DONE_A) { | |
674 | done(sl811, sl811->active_a, SL811_EP_A(SL811_HOST_BUF), regs); | |
675 | sl811->active_a = NULL; | |
676 | sl811->stat_a++; | |
677 | } | |
678 | #ifdef USE_B | |
679 | if (irqstat & SL11H_INTMASK_DONE_B) { | |
680 | done(sl811, sl811->active_b, SL811_EP_B(SL811_HOST_BUF), regs); | |
681 | sl811->active_b = NULL; | |
682 | sl811->stat_b++; | |
683 | } | |
684 | #endif | |
685 | if (irqstat & SL11H_INTMASK_SOFINTR) { | |
686 | unsigned index; | |
687 | ||
688 | index = sl811->frame++ % (PERIODIC_SIZE - 1); | |
689 | sl811->stat_sof++; | |
690 | ||
691 | /* be graceful about almost-inevitable periodic schedule | |
692 | * overruns: continue the previous frame's transfers iff | |
693 | * this one has nothing scheduled. | |
694 | */ | |
695 | if (sl811->next_periodic) { | |
696 | // ERR("overrun to slot %d\n", index); | |
697 | sl811->stat_overrun++; | |
698 | } | |
699 | if (sl811->periodic[index]) | |
700 | sl811->next_periodic = sl811->periodic[index]; | |
701 | } | |
702 | ||
703 | /* khubd manages debouncing and wakeup */ | |
704 | if (irqstat & SL11H_INTMASK_INSRMV) { | |
705 | sl811->stat_insrmv++; | |
706 | ||
707 | /* most stats are reset for each VBUS session */ | |
708 | sl811->stat_wake = 0; | |
709 | sl811->stat_sof = 0; | |
710 | sl811->stat_a = 0; | |
711 | sl811->stat_b = 0; | |
712 | sl811->stat_lost = 0; | |
713 | ||
714 | sl811->ctrl1 = 0; | |
715 | sl811_write(sl811, SL11H_CTLREG1, sl811->ctrl1); | |
716 | ||
717 | sl811->irq_enable = SL11H_INTMASK_INSRMV; | |
718 | sl811_write(sl811, SL11H_IRQ_ENABLE, sl811->irq_enable); | |
719 | ||
720 | /* usbcore nukes other pending transactions on disconnect */ | |
721 | if (sl811->active_a) { | |
722 | sl811_write(sl811, SL811_EP_A(SL11H_HOSTCTLREG), 0); | |
723 | finish_request(sl811, sl811->active_a, | |
1e9a47b6 DB |
724 | container_of(sl811->active_a |
725 | ->hep->urb_list.next, | |
1da177e4 LT |
726 | struct urb, urb_list), |
727 | NULL, -ESHUTDOWN); | |
728 | sl811->active_a = NULL; | |
729 | } | |
730 | #ifdef USE_B | |
731 | if (sl811->active_b) { | |
732 | sl811_write(sl811, SL811_EP_B(SL11H_HOSTCTLREG), 0); | |
733 | finish_request(sl811, sl811->active_b, | |
1e9a47b6 DB |
734 | container_of(sl811->active_b |
735 | ->hep->urb_list.next, | |
1da177e4 LT |
736 | struct urb, urb_list), |
737 | NULL, -ESHUTDOWN); | |
738 | sl811->active_b = NULL; | |
739 | } | |
740 | #endif | |
741 | ||
093cf723 | 742 | /* port status seems weird until after reset, so |
1da177e4 LT |
743 | * force the reset and make khubd clean up later. |
744 | */ | |
745 | sl811->port1 |= (1 << USB_PORT_FEAT_C_CONNECTION) | |
746 | | (1 << USB_PORT_FEAT_CONNECTION); | |
747 | ||
748 | } else if (irqstat & SL11H_INTMASK_RD) { | |
749 | if (sl811->port1 & (1 << USB_PORT_FEAT_SUSPEND)) { | |
750 | DBG("wakeup\n"); | |
751 | sl811->port1 |= 1 << USB_PORT_FEAT_C_SUSPEND; | |
752 | sl811->stat_wake++; | |
753 | } else | |
754 | irqstat &= ~SL11H_INTMASK_RD; | |
755 | } | |
756 | ||
757 | if (irqstat) { | |
758 | if (sl811->port1 & (1 << USB_PORT_FEAT_ENABLE)) | |
759 | start_transfer(sl811); | |
760 | ret = IRQ_HANDLED; | |
761 | if (retries--) | |
762 | goto retry; | |
763 | } | |
764 | ||
1e9a47b6 | 765 | if (sl811->periodic_count == 0 && list_empty(&sl811->async)) |
1da177e4 LT |
766 | sofirq_off(sl811); |
767 | sl811_write(sl811, SL11H_IRQ_ENABLE, sl811->irq_enable); | |
768 | ||
769 | spin_unlock(&sl811->lock); | |
770 | ||
771 | return ret; | |
772 | } | |
773 | ||
774 | /*-------------------------------------------------------------------------*/ | |
775 | ||
776 | /* usb 1.1 says max 90% of a frame is available for periodic transfers. | |
777 | * this driver doesn't promise that much since it's got to handle an | |
778 | * IRQ per packet; irq handling latencies also use up that time. | |
4b2e790a DB |
779 | * |
780 | * NOTE: the periodic schedule is a sparse tree, with the load for | |
781 | * each branch minimized. see fig 3.5 in the OHCI spec for example. | |
1da177e4 LT |
782 | */ |
783 | #define MAX_PERIODIC_LOAD 500 /* out of 1000 usec */ | |
784 | ||
785 | static int balance(struct sl811 *sl811, u16 period, u16 load) | |
786 | { | |
787 | int i, branch = -ENOSPC; | |
788 | ||
789 | /* search for the least loaded schedule branch of that period | |
790 | * which has enough bandwidth left unreserved. | |
791 | */ | |
792 | for (i = 0; i < period ; i++) { | |
793 | if (branch < 0 || sl811->load[branch] > sl811->load[i]) { | |
794 | int j; | |
795 | ||
796 | for (j = i; j < PERIODIC_SIZE; j += period) { | |
797 | if ((sl811->load[j] + load) | |
798 | > MAX_PERIODIC_LOAD) | |
799 | break; | |
800 | } | |
801 | if (j < PERIODIC_SIZE) | |
802 | continue; | |
1e9a47b6 | 803 | branch = i; |
1da177e4 LT |
804 | } |
805 | } | |
806 | return branch; | |
807 | } | |
808 | ||
809 | /*-------------------------------------------------------------------------*/ | |
810 | ||
811 | static int sl811h_urb_enqueue( | |
812 | struct usb_hcd *hcd, | |
813 | struct usb_host_endpoint *hep, | |
814 | struct urb *urb, | |
55016f10 | 815 | gfp_t mem_flags |
1da177e4 LT |
816 | ) { |
817 | struct sl811 *sl811 = hcd_to_sl811(hcd); | |
818 | struct usb_device *udev = urb->dev; | |
819 | unsigned int pipe = urb->pipe; | |
820 | int is_out = !usb_pipein(pipe); | |
821 | int type = usb_pipetype(pipe); | |
822 | int epnum = usb_pipeendpoint(pipe); | |
823 | struct sl811h_ep *ep = NULL; | |
824 | unsigned long flags; | |
825 | int i; | |
826 | int retval = 0; | |
827 | ||
828 | #ifdef DISABLE_ISO | |
829 | if (type == PIPE_ISOCHRONOUS) | |
830 | return -ENOSPC; | |
831 | #endif | |
832 | ||
833 | /* avoid all allocations within spinlocks */ | |
834 | if (!hep->hcpriv) | |
7b842b6e | 835 | ep = kzalloc(sizeof *ep, mem_flags); |
1da177e4 LT |
836 | |
837 | spin_lock_irqsave(&sl811->lock, flags); | |
838 | ||
839 | /* don't submit to a dead or disabled port */ | |
840 | if (!(sl811->port1 & (1 << USB_PORT_FEAT_ENABLE)) | |
841 | || !HC_IS_RUNNING(hcd->state)) { | |
842 | retval = -ENODEV; | |
4b2e790a | 843 | kfree(ep); |
1da177e4 LT |
844 | goto fail; |
845 | } | |
846 | ||
847 | if (hep->hcpriv) { | |
848 | kfree(ep); | |
849 | ep = hep->hcpriv; | |
850 | } else if (!ep) { | |
851 | retval = -ENOMEM; | |
852 | goto fail; | |
853 | ||
854 | } else { | |
855 | INIT_LIST_HEAD(&ep->schedule); | |
6a8e87b2 | 856 | ep->udev = udev; |
1da177e4 LT |
857 | ep->epnum = epnum; |
858 | ep->maxpacket = usb_maxpacket(udev, urb->pipe, is_out); | |
859 | ep->defctrl = SL11H_HCTLMASK_ARM | SL11H_HCTLMASK_ENABLE; | |
860 | usb_settoggle(udev, epnum, is_out, 0); | |
861 | ||
862 | if (type == PIPE_CONTROL) | |
863 | ep->nextpid = USB_PID_SETUP; | |
864 | else if (is_out) | |
865 | ep->nextpid = USB_PID_OUT; | |
866 | else | |
867 | ep->nextpid = USB_PID_IN; | |
868 | ||
869 | if (ep->maxpacket > H_MAXPACKET) { | |
870 | /* iso packets up to 240 bytes could work... */ | |
871 | DBG("dev %d ep%d maxpacket %d\n", | |
872 | udev->devnum, epnum, ep->maxpacket); | |
873 | retval = -EINVAL; | |
874 | goto fail; | |
875 | } | |
876 | ||
877 | if (udev->speed == USB_SPEED_LOW) { | |
878 | /* send preamble for external hub? */ | |
879 | if (!(sl811->ctrl1 & SL11H_CTL1MASK_LSPD)) | |
880 | ep->defctrl |= SL11H_HCTLMASK_PREAMBLE; | |
881 | } | |
882 | switch (type) { | |
883 | case PIPE_ISOCHRONOUS: | |
884 | case PIPE_INTERRUPT: | |
885 | if (urb->interval > PERIODIC_SIZE) | |
886 | urb->interval = PERIODIC_SIZE; | |
887 | ep->period = urb->interval; | |
888 | ep->branch = PERIODIC_SIZE; | |
889 | if (type == PIPE_ISOCHRONOUS) | |
890 | ep->defctrl |= SL11H_HCTLMASK_ISOCH; | |
891 | ep->load = usb_calc_bus_time(udev->speed, !is_out, | |
892 | (type == PIPE_ISOCHRONOUS), | |
893 | usb_maxpacket(udev, pipe, is_out)) | |
894 | / 1000; | |
895 | break; | |
896 | } | |
897 | ||
1e9a47b6 | 898 | ep->hep = hep; |
1da177e4 LT |
899 | hep->hcpriv = ep; |
900 | } | |
901 | ||
902 | /* maybe put endpoint into schedule */ | |
903 | switch (type) { | |
904 | case PIPE_CONTROL: | |
905 | case PIPE_BULK: | |
906 | if (list_empty(&ep->schedule)) | |
907 | list_add_tail(&ep->schedule, &sl811->async); | |
908 | break; | |
909 | case PIPE_ISOCHRONOUS: | |
910 | case PIPE_INTERRUPT: | |
911 | urb->interval = ep->period; | |
4b2e790a DB |
912 | if (ep->branch < PERIODIC_SIZE) { |
913 | /* NOTE: the phase is correct here, but the value | |
914 | * needs offsetting by the transfer queue depth. | |
915 | * All current drivers ignore start_frame, so this | |
916 | * is unlikely to ever matter... | |
917 | */ | |
918 | urb->start_frame = (sl811->frame & (PERIODIC_SIZE - 1)) | |
919 | + ep->branch; | |
1da177e4 | 920 | break; |
4b2e790a | 921 | } |
1da177e4 LT |
922 | |
923 | retval = balance(sl811, ep->period, ep->load); | |
924 | if (retval < 0) | |
925 | goto fail; | |
926 | ep->branch = retval; | |
927 | retval = 0; | |
928 | urb->start_frame = (sl811->frame & (PERIODIC_SIZE - 1)) | |
929 | + ep->branch; | |
930 | ||
931 | /* sort each schedule branch by period (slow before fast) | |
932 | * to share the faster parts of the tree without needing | |
933 | * dummy/placeholder nodes | |
934 | */ | |
935 | DBG("schedule qh%d/%p branch %d\n", ep->period, ep, ep->branch); | |
936 | for (i = ep->branch; i < PERIODIC_SIZE; i += ep->period) { | |
937 | struct sl811h_ep **prev = &sl811->periodic[i]; | |
938 | struct sl811h_ep *here = *prev; | |
939 | ||
940 | while (here && ep != here) { | |
941 | if (ep->period > here->period) | |
942 | break; | |
943 | prev = &here->next; | |
944 | here = *prev; | |
945 | } | |
946 | if (ep != here) { | |
947 | ep->next = here; | |
948 | *prev = ep; | |
949 | } | |
950 | sl811->load[i] += ep->load; | |
951 | } | |
952 | sl811->periodic_count++; | |
953 | hcd->self.bandwidth_allocated += ep->load / ep->period; | |
954 | sofirq_on(sl811); | |
955 | } | |
956 | ||
957 | /* in case of unlink-during-submit */ | |
958 | spin_lock(&urb->lock); | |
959 | if (urb->status != -EINPROGRESS) { | |
960 | spin_unlock(&urb->lock); | |
961 | finish_request(sl811, ep, urb, NULL, 0); | |
962 | retval = 0; | |
963 | goto fail; | |
964 | } | |
965 | urb->hcpriv = hep; | |
966 | spin_unlock(&urb->lock); | |
967 | ||
968 | start_transfer(sl811); | |
969 | sl811_write(sl811, SL11H_IRQ_ENABLE, sl811->irq_enable); | |
970 | fail: | |
971 | spin_unlock_irqrestore(&sl811->lock, flags); | |
972 | return retval; | |
973 | } | |
974 | ||
975 | static int sl811h_urb_dequeue(struct usb_hcd *hcd, struct urb *urb) | |
976 | { | |
977 | struct sl811 *sl811 = hcd_to_sl811(hcd); | |
1e9a47b6 | 978 | struct usb_host_endpoint *hep; |
1da177e4 LT |
979 | unsigned long flags; |
980 | struct sl811h_ep *ep; | |
981 | int retval = 0; | |
982 | ||
1e9a47b6 DB |
983 | spin_lock_irqsave(&sl811->lock, flags); |
984 | hep = urb->hcpriv; | |
1da177e4 | 985 | if (!hep) |
1e9a47b6 | 986 | goto fail; |
1da177e4 | 987 | |
1da177e4 LT |
988 | ep = hep->hcpriv; |
989 | if (ep) { | |
990 | /* finish right away if this urb can't be active ... | |
991 | * note that some drivers wrongly expect delays | |
992 | */ | |
993 | if (ep->hep->urb_list.next != &urb->urb_list) { | |
994 | /* not front of queue? never active */ | |
995 | ||
996 | /* for active transfers, we expect an IRQ */ | |
997 | } else if (sl811->active_a == ep) { | |
998 | if (time_before_eq(sl811->jiffies_a, jiffies)) { | |
999 | /* happens a lot with lowspeed?? */ | |
1000 | DBG("giveup on DONE_A: ctrl %02x sts %02x\n", | |
1001 | sl811_read(sl811, | |
1002 | SL811_EP_A(SL11H_HOSTCTLREG)), | |
1003 | sl811_read(sl811, | |
1004 | SL811_EP_A(SL11H_PKTSTATREG))); | |
1005 | sl811_write(sl811, SL811_EP_A(SL11H_HOSTCTLREG), | |
1006 | 0); | |
1007 | sl811->active_a = NULL; | |
1008 | } else | |
1009 | urb = NULL; | |
1010 | #ifdef USE_B | |
1011 | } else if (sl811->active_b == ep) { | |
1012 | if (time_before_eq(sl811->jiffies_a, jiffies)) { | |
1013 | /* happens a lot with lowspeed?? */ | |
1014 | DBG("giveup on DONE_B: ctrl %02x sts %02x\n", | |
1015 | sl811_read(sl811, | |
1016 | SL811_EP_B(SL11H_HOSTCTLREG)), | |
1017 | sl811_read(sl811, | |
1018 | SL811_EP_B(SL11H_PKTSTATREG))); | |
1019 | sl811_write(sl811, SL811_EP_B(SL11H_HOSTCTLREG), | |
1020 | 0); | |
1021 | sl811->active_b = NULL; | |
1022 | } else | |
1023 | urb = NULL; | |
1024 | #endif | |
1025 | } else { | |
1026 | /* front of queue for inactive endpoint */ | |
1027 | } | |
1028 | ||
1029 | if (urb) | |
1030 | finish_request(sl811, ep, urb, NULL, 0); | |
1031 | else | |
1032 | VDBG("dequeue, urb %p active %s; wait4irq\n", urb, | |
1033 | (sl811->active_a == ep) ? "A" : "B"); | |
1034 | } else | |
1e9a47b6 | 1035 | fail: |
1da177e4 LT |
1036 | retval = -EINVAL; |
1037 | spin_unlock_irqrestore(&sl811->lock, flags); | |
1038 | return retval; | |
1039 | } | |
1040 | ||
1041 | static void | |
1042 | sl811h_endpoint_disable(struct usb_hcd *hcd, struct usb_host_endpoint *hep) | |
1043 | { | |
1044 | struct sl811h_ep *ep = hep->hcpriv; | |
1045 | ||
1046 | if (!ep) | |
1047 | return; | |
1048 | ||
1049 | /* assume we'd just wait for the irq */ | |
1050 | if (!list_empty(&hep->urb_list)) | |
1051 | msleep(3); | |
1052 | if (!list_empty(&hep->urb_list)) | |
1053 | WARN("ep %p not empty?\n", ep); | |
1054 | ||
1da177e4 LT |
1055 | kfree(ep); |
1056 | hep->hcpriv = NULL; | |
1057 | } | |
1058 | ||
1059 | static int | |
1060 | sl811h_get_frame(struct usb_hcd *hcd) | |
1061 | { | |
1062 | struct sl811 *sl811 = hcd_to_sl811(hcd); | |
1063 | ||
1064 | /* wrong except while periodic transfers are scheduled; | |
1065 | * never matches the on-the-wire frame; | |
1066 | * subject to overruns. | |
1067 | */ | |
1068 | return sl811->frame; | |
1069 | } | |
1070 | ||
1071 | ||
1072 | /*-------------------------------------------------------------------------*/ | |
1073 | ||
1074 | /* the virtual root hub timer IRQ checks for hub status */ | |
1075 | static int | |
1076 | sl811h_hub_status_data(struct usb_hcd *hcd, char *buf) | |
1077 | { | |
1078 | struct sl811 *sl811 = hcd_to_sl811(hcd); | |
1079 | #ifdef QUIRK3 | |
1080 | unsigned long flags; | |
1081 | ||
1082 | /* non-SMP HACK: use root hub timer as i/o watchdog | |
1083 | * this seems essential when SOF IRQs aren't in use... | |
1084 | */ | |
1085 | local_irq_save(flags); | |
1086 | if (!timer_pending(&sl811->timer)) { | |
1087 | if (sl811h_irq( /* ~0, */ hcd, NULL) != IRQ_NONE) | |
1088 | sl811->stat_lost++; | |
1089 | } | |
1090 | local_irq_restore(flags); | |
1091 | #endif | |
1092 | ||
1093 | if (!(sl811->port1 & (0xffff << 16))) | |
1094 | return 0; | |
1095 | ||
1096 | /* tell khubd port 1 changed */ | |
1097 | *buf = (1 << 1); | |
1098 | return 1; | |
1099 | } | |
1100 | ||
1101 | static void | |
1102 | sl811h_hub_descriptor ( | |
1103 | struct sl811 *sl811, | |
1104 | struct usb_hub_descriptor *desc | |
1105 | ) { | |
1106 | u16 temp = 0; | |
1107 | ||
1108 | desc->bDescriptorType = 0x29; | |
1109 | desc->bHubContrCurrent = 0; | |
1110 | ||
1111 | desc->bNbrPorts = 1; | |
1112 | desc->bDescLength = 9; | |
1113 | ||
1114 | /* per-port power switching (gang of one!), or none */ | |
1115 | desc->bPwrOn2PwrGood = 0; | |
1116 | if (sl811->board && sl811->board->port_power) { | |
1117 | desc->bPwrOn2PwrGood = sl811->board->potpg; | |
1118 | if (!desc->bPwrOn2PwrGood) | |
1119 | desc->bPwrOn2PwrGood = 10; | |
1120 | temp = 0x0001; | |
1121 | } else | |
1122 | temp = 0x0002; | |
1123 | ||
1124 | /* no overcurrent errors detection/handling */ | |
1125 | temp |= 0x0010; | |
1126 | ||
1127 | desc->wHubCharacteristics = (__force __u16)cpu_to_le16(temp); | |
1128 | ||
1129 | /* two bitmaps: ports removable, and legacy PortPwrCtrlMask */ | |
4b2e790a | 1130 | desc->bitmap[0] = 0 << 1; |
1da177e4 LT |
1131 | desc->bitmap[1] = ~0; |
1132 | } | |
1133 | ||
1134 | static void | |
1135 | sl811h_timer(unsigned long _sl811) | |
1136 | { | |
1137 | struct sl811 *sl811 = (void *) _sl811; | |
1138 | unsigned long flags; | |
1139 | u8 irqstat; | |
1140 | u8 signaling = sl811->ctrl1 & SL11H_CTL1MASK_FORCE; | |
1141 | const u32 mask = (1 << USB_PORT_FEAT_CONNECTION) | |
1142 | | (1 << USB_PORT_FEAT_ENABLE) | |
1143 | | (1 << USB_PORT_FEAT_LOWSPEED); | |
1144 | ||
1145 | spin_lock_irqsave(&sl811->lock, flags); | |
1146 | ||
1147 | /* stop special signaling */ | |
1148 | sl811->ctrl1 &= ~SL11H_CTL1MASK_FORCE; | |
1149 | sl811_write(sl811, SL11H_CTLREG1, sl811->ctrl1); | |
1150 | udelay(3); | |
1151 | ||
1152 | irqstat = sl811_read(sl811, SL11H_IRQ_STATUS); | |
1153 | ||
1154 | switch (signaling) { | |
1155 | case SL11H_CTL1MASK_SE0: | |
1156 | DBG("end reset\n"); | |
1157 | sl811->port1 = (1 << USB_PORT_FEAT_C_RESET) | |
1158 | | (1 << USB_PORT_FEAT_POWER); | |
1159 | sl811->ctrl1 = 0; | |
1160 | /* don't wrongly ack RD */ | |
1161 | if (irqstat & SL11H_INTMASK_INSRMV) | |
1162 | irqstat &= ~SL11H_INTMASK_RD; | |
1163 | break; | |
1164 | case SL11H_CTL1MASK_K: | |
1165 | DBG("end resume\n"); | |
1166 | sl811->port1 &= ~(1 << USB_PORT_FEAT_SUSPEND); | |
1167 | break; | |
1168 | default: | |
1169 | DBG("odd timer signaling: %02x\n", signaling); | |
1170 | break; | |
1171 | } | |
1172 | sl811_write(sl811, SL11H_IRQ_STATUS, irqstat); | |
1173 | ||
1174 | if (irqstat & SL11H_INTMASK_RD) { | |
1175 | /* usbcore nukes all pending transactions on disconnect */ | |
1176 | if (sl811->port1 & (1 << USB_PORT_FEAT_CONNECTION)) | |
1177 | sl811->port1 |= (1 << USB_PORT_FEAT_C_CONNECTION) | |
1178 | | (1 << USB_PORT_FEAT_C_ENABLE); | |
1179 | sl811->port1 &= ~mask; | |
1180 | sl811->irq_enable = SL11H_INTMASK_INSRMV; | |
1181 | } else { | |
1182 | sl811->port1 |= mask; | |
1183 | if (irqstat & SL11H_INTMASK_DP) | |
1184 | sl811->port1 &= ~(1 << USB_PORT_FEAT_LOWSPEED); | |
1185 | sl811->irq_enable = SL11H_INTMASK_INSRMV | SL11H_INTMASK_RD; | |
1186 | } | |
1187 | ||
1188 | if (sl811->port1 & (1 << USB_PORT_FEAT_CONNECTION)) { | |
1189 | u8 ctrl2 = SL811HS_CTL2_INIT; | |
1190 | ||
1191 | sl811->irq_enable |= SL11H_INTMASK_DONE_A; | |
1192 | #ifdef USE_B | |
1193 | sl811->irq_enable |= SL11H_INTMASK_DONE_B; | |
1194 | #endif | |
1195 | if (sl811->port1 & (1 << USB_PORT_FEAT_LOWSPEED)) { | |
1196 | sl811->ctrl1 |= SL11H_CTL1MASK_LSPD; | |
1197 | ctrl2 |= SL811HS_CTL2MASK_DSWAP; | |
1198 | } | |
1199 | ||
1200 | /* start SOFs flowing, kickstarting with A registers */ | |
1201 | sl811->ctrl1 |= SL11H_CTL1MASK_SOF_ENA; | |
1202 | sl811_write(sl811, SL11H_SOFLOWREG, 0xe0); | |
1203 | sl811_write(sl811, SL811HS_CTLREG2, ctrl2); | |
1204 | ||
1205 | /* autoincrementing */ | |
1206 | sl811_write(sl811, SL811_EP_A(SL11H_BUFLNTHREG), 0); | |
1207 | writeb(SL_SOF, sl811->data_reg); | |
1208 | writeb(0, sl811->data_reg); | |
1209 | sl811_write(sl811, SL811_EP_A(SL11H_HOSTCTLREG), | |
1210 | SL11H_HCTLMASK_ARM); | |
1211 | ||
1212 | /* khubd provides debounce delay */ | |
1213 | } else { | |
1214 | sl811->ctrl1 = 0; | |
1215 | } | |
1216 | sl811_write(sl811, SL11H_CTLREG1, sl811->ctrl1); | |
1217 | ||
1218 | /* reenable irqs */ | |
1219 | sl811_write(sl811, SL11H_IRQ_ENABLE, sl811->irq_enable); | |
1220 | spin_unlock_irqrestore(&sl811->lock, flags); | |
1221 | } | |
1222 | ||
1223 | static int | |
1224 | sl811h_hub_control( | |
1225 | struct usb_hcd *hcd, | |
1226 | u16 typeReq, | |
1227 | u16 wValue, | |
1228 | u16 wIndex, | |
1229 | char *buf, | |
1230 | u16 wLength | |
1231 | ) { | |
1232 | struct sl811 *sl811 = hcd_to_sl811(hcd); | |
1233 | int retval = 0; | |
1234 | unsigned long flags; | |
1235 | ||
1236 | spin_lock_irqsave(&sl811->lock, flags); | |
1237 | ||
1238 | switch (typeReq) { | |
1239 | case ClearHubFeature: | |
1240 | case SetHubFeature: | |
1241 | switch (wValue) { | |
1242 | case C_HUB_OVER_CURRENT: | |
1243 | case C_HUB_LOCAL_POWER: | |
1244 | break; | |
1245 | default: | |
1246 | goto error; | |
1247 | } | |
1248 | break; | |
1249 | case ClearPortFeature: | |
1250 | if (wIndex != 1 || wLength != 0) | |
1251 | goto error; | |
1252 | ||
1253 | switch (wValue) { | |
1254 | case USB_PORT_FEAT_ENABLE: | |
1255 | sl811->port1 &= (1 << USB_PORT_FEAT_POWER); | |
1256 | sl811->ctrl1 = 0; | |
1257 | sl811_write(sl811, SL11H_CTLREG1, sl811->ctrl1); | |
1258 | sl811->irq_enable = SL11H_INTMASK_INSRMV; | |
1259 | sl811_write(sl811, SL11H_IRQ_ENABLE, | |
1260 | sl811->irq_enable); | |
1261 | break; | |
1262 | case USB_PORT_FEAT_SUSPEND: | |
1263 | if (!(sl811->port1 & (1 << USB_PORT_FEAT_SUSPEND))) | |
1264 | break; | |
1265 | ||
1266 | /* 20 msec of resume/K signaling, other irqs blocked */ | |
1267 | DBG("start resume...\n"); | |
1268 | sl811->irq_enable = 0; | |
1269 | sl811_write(sl811, SL11H_IRQ_ENABLE, | |
1270 | sl811->irq_enable); | |
1271 | sl811->ctrl1 |= SL11H_CTL1MASK_K; | |
1272 | sl811_write(sl811, SL11H_CTLREG1, sl811->ctrl1); | |
1273 | ||
1274 | mod_timer(&sl811->timer, jiffies | |
1275 | + msecs_to_jiffies(20)); | |
1276 | break; | |
1277 | case USB_PORT_FEAT_POWER: | |
1278 | port_power(sl811, 0); | |
1279 | break; | |
1280 | case USB_PORT_FEAT_C_ENABLE: | |
1281 | case USB_PORT_FEAT_C_SUSPEND: | |
1282 | case USB_PORT_FEAT_C_CONNECTION: | |
1283 | case USB_PORT_FEAT_C_OVER_CURRENT: | |
1284 | case USB_PORT_FEAT_C_RESET: | |
1285 | break; | |
1286 | default: | |
1287 | goto error; | |
1288 | } | |
1289 | sl811->port1 &= ~(1 << wValue); | |
1290 | break; | |
1291 | case GetHubDescriptor: | |
1292 | sl811h_hub_descriptor(sl811, (struct usb_hub_descriptor *) buf); | |
1293 | break; | |
1294 | case GetHubStatus: | |
1295 | *(__le32 *) buf = cpu_to_le32(0); | |
1296 | break; | |
1297 | case GetPortStatus: | |
1298 | if (wIndex != 1) | |
1299 | goto error; | |
1300 | *(__le32 *) buf = cpu_to_le32(sl811->port1); | |
1301 | ||
1302 | #ifndef VERBOSE | |
1303 | if (*(u16*)(buf+2)) /* only if wPortChange is interesting */ | |
1304 | #endif | |
1305 | DBG("GetPortStatus %08x\n", sl811->port1); | |
1306 | break; | |
1307 | case SetPortFeature: | |
1308 | if (wIndex != 1 || wLength != 0) | |
1309 | goto error; | |
1310 | switch (wValue) { | |
1311 | case USB_PORT_FEAT_SUSPEND: | |
1312 | if (sl811->port1 & (1 << USB_PORT_FEAT_RESET)) | |
1313 | goto error; | |
1314 | if (!(sl811->port1 & (1 << USB_PORT_FEAT_ENABLE))) | |
1315 | goto error; | |
1316 | ||
1317 | DBG("suspend...\n"); | |
1318 | sl811->ctrl1 &= ~SL11H_CTL1MASK_SOF_ENA; | |
1319 | sl811_write(sl811, SL11H_CTLREG1, sl811->ctrl1); | |
1320 | break; | |
1321 | case USB_PORT_FEAT_POWER: | |
1322 | port_power(sl811, 1); | |
1323 | break; | |
1324 | case USB_PORT_FEAT_RESET: | |
1325 | if (sl811->port1 & (1 << USB_PORT_FEAT_SUSPEND)) | |
1326 | goto error; | |
1327 | if (!(sl811->port1 & (1 << USB_PORT_FEAT_POWER))) | |
1328 | break; | |
1329 | ||
1330 | /* 50 msec of reset/SE0 signaling, irqs blocked */ | |
1331 | sl811->irq_enable = 0; | |
1332 | sl811_write(sl811, SL11H_IRQ_ENABLE, | |
1333 | sl811->irq_enable); | |
1334 | sl811->ctrl1 = SL11H_CTL1MASK_SE0; | |
1335 | sl811_write(sl811, SL11H_CTLREG1, sl811->ctrl1); | |
1336 | sl811->port1 |= (1 << USB_PORT_FEAT_RESET); | |
1337 | mod_timer(&sl811->timer, jiffies | |
1338 | + msecs_to_jiffies(50)); | |
1339 | break; | |
1340 | default: | |
1341 | goto error; | |
1342 | } | |
1343 | sl811->port1 |= 1 << wValue; | |
1344 | break; | |
1345 | ||
1346 | default: | |
1347 | error: | |
1348 | /* "protocol stall" on error */ | |
1349 | retval = -EPIPE; | |
1350 | } | |
1351 | ||
1352 | spin_unlock_irqrestore(&sl811->lock, flags); | |
1353 | return retval; | |
1354 | } | |
1355 | ||
1356 | #ifdef CONFIG_PM | |
1357 | ||
1358 | static int | |
0c0382e3 | 1359 | sl811h_bus_suspend(struct usb_hcd *hcd) |
1da177e4 LT |
1360 | { |
1361 | // SOFs off | |
1362 | DBG("%s\n", __FUNCTION__); | |
1363 | return 0; | |
1364 | } | |
1365 | ||
1366 | static int | |
0c0382e3 | 1367 | sl811h_bus_resume(struct usb_hcd *hcd) |
1da177e4 LT |
1368 | { |
1369 | // SOFs on | |
1370 | DBG("%s\n", __FUNCTION__); | |
1371 | return 0; | |
1372 | } | |
1373 | ||
1374 | #else | |
1375 | ||
0c0382e3 AS |
1376 | #define sl811h_bus_suspend NULL |
1377 | #define sl811h_bus_resume NULL | |
1da177e4 LT |
1378 | |
1379 | #endif | |
1380 | ||
1381 | ||
1382 | /*-------------------------------------------------------------------------*/ | |
1383 | ||
1384 | #ifdef STUB_DEBUG_FILE | |
1385 | ||
1386 | static inline void create_debug_file(struct sl811 *sl811) { } | |
1387 | static inline void remove_debug_file(struct sl811 *sl811) { } | |
1388 | ||
1389 | #else | |
1390 | ||
1391 | #include <linux/proc_fs.h> | |
1392 | #include <linux/seq_file.h> | |
1393 | ||
1394 | static void dump_irq(struct seq_file *s, char *label, u8 mask) | |
1395 | { | |
1396 | seq_printf(s, "%s %02x%s%s%s%s%s%s\n", label, mask, | |
1397 | (mask & SL11H_INTMASK_DONE_A) ? " done_a" : "", | |
1398 | (mask & SL11H_INTMASK_DONE_B) ? " done_b" : "", | |
1399 | (mask & SL11H_INTMASK_SOFINTR) ? " sof" : "", | |
1400 | (mask & SL11H_INTMASK_INSRMV) ? " ins/rmv" : "", | |
1401 | (mask & SL11H_INTMASK_RD) ? " rd" : "", | |
1402 | (mask & SL11H_INTMASK_DP) ? " dp" : ""); | |
1403 | } | |
1404 | ||
1405 | static int proc_sl811h_show(struct seq_file *s, void *unused) | |
1406 | { | |
1407 | struct sl811 *sl811 = s->private; | |
1408 | struct sl811h_ep *ep; | |
1409 | unsigned i; | |
1410 | ||
1411 | seq_printf(s, "%s\n%s version %s\nportstatus[1] = %08x\n", | |
1412 | sl811_to_hcd(sl811)->product_desc, | |
1413 | hcd_name, DRIVER_VERSION, | |
1414 | sl811->port1); | |
1415 | ||
1416 | seq_printf(s, "insert/remove: %ld\n", sl811->stat_insrmv); | |
1417 | seq_printf(s, "current session: done_a %ld done_b %ld " | |
1418 | "wake %ld sof %ld overrun %ld lost %ld\n\n", | |
1419 | sl811->stat_a, sl811->stat_b, | |
1420 | sl811->stat_wake, sl811->stat_sof, | |
1421 | sl811->stat_overrun, sl811->stat_lost); | |
1422 | ||
1423 | spin_lock_irq(&sl811->lock); | |
1424 | ||
1425 | if (sl811->ctrl1 & SL11H_CTL1MASK_SUSPEND) | |
1426 | seq_printf(s, "(suspended)\n\n"); | |
1427 | else { | |
1428 | u8 t = sl811_read(sl811, SL11H_CTLREG1); | |
1429 | ||
1430 | seq_printf(s, "ctrl1 %02x%s%s%s%s\n", t, | |
1431 | (t & SL11H_CTL1MASK_SOF_ENA) ? " sofgen" : "", | |
1432 | ({char *s; switch (t & SL11H_CTL1MASK_FORCE) { | |
1433 | case SL11H_CTL1MASK_NORMAL: s = ""; break; | |
1434 | case SL11H_CTL1MASK_SE0: s = " se0/reset"; break; | |
1435 | case SL11H_CTL1MASK_K: s = " k/resume"; break; | |
1436 | default: s = "j"; break; | |
1437 | }; s; }), | |
1438 | (t & SL11H_CTL1MASK_LSPD) ? " lowspeed" : "", | |
1439 | (t & SL11H_CTL1MASK_SUSPEND) ? " suspend" : ""); | |
1440 | ||
1441 | dump_irq(s, "irq_enable", | |
1442 | sl811_read(sl811, SL11H_IRQ_ENABLE)); | |
1443 | dump_irq(s, "irq_status", | |
1444 | sl811_read(sl811, SL11H_IRQ_STATUS)); | |
1445 | seq_printf(s, "frame clocks remaining: %d\n", | |
1446 | sl811_read(sl811, SL11H_SOFTMRREG) << 6); | |
1447 | } | |
1448 | ||
1449 | seq_printf(s, "A: qh%p ctl %02x sts %02x\n", sl811->active_a, | |
1450 | sl811_read(sl811, SL811_EP_A(SL11H_HOSTCTLREG)), | |
1451 | sl811_read(sl811, SL811_EP_A(SL11H_PKTSTATREG))); | |
1452 | seq_printf(s, "B: qh%p ctl %02x sts %02x\n", sl811->active_b, | |
1453 | sl811_read(sl811, SL811_EP_B(SL11H_HOSTCTLREG)), | |
1454 | sl811_read(sl811, SL811_EP_B(SL11H_PKTSTATREG))); | |
1455 | seq_printf(s, "\n"); | |
1456 | list_for_each_entry (ep, &sl811->async, schedule) { | |
1457 | struct urb *urb; | |
1458 | ||
1459 | seq_printf(s, "%s%sqh%p, ep%d%s, maxpacket %d" | |
1460 | " nak %d err %d\n", | |
1461 | (ep == sl811->active_a) ? "(A) " : "", | |
1462 | (ep == sl811->active_b) ? "(B) " : "", | |
1463 | ep, ep->epnum, | |
1464 | ({ char *s; switch (ep->nextpid) { | |
1465 | case USB_PID_IN: s = "in"; break; | |
1466 | case USB_PID_OUT: s = "out"; break; | |
1467 | case USB_PID_SETUP: s = "setup"; break; | |
1468 | case USB_PID_ACK: s = "status"; break; | |
1469 | default: s = "?"; break; | |
1470 | }; s;}), | |
1471 | ep->maxpacket, | |
1472 | ep->nak_count, ep->error_count); | |
1473 | list_for_each_entry (urb, &ep->hep->urb_list, urb_list) { | |
1474 | seq_printf(s, " urb%p, %d/%d\n", urb, | |
1475 | urb->actual_length, | |
1476 | urb->transfer_buffer_length); | |
1477 | } | |
1478 | } | |
1479 | if (!list_empty(&sl811->async)) | |
1480 | seq_printf(s, "\n"); | |
1481 | ||
1482 | seq_printf(s, "periodic size= %d\n", PERIODIC_SIZE); | |
1483 | ||
1484 | for (i = 0; i < PERIODIC_SIZE; i++) { | |
1485 | ep = sl811->periodic[i]; | |
1486 | if (!ep) | |
1487 | continue; | |
1488 | seq_printf(s, "%2d [%3d]:\n", i, sl811->load[i]); | |
1489 | ||
1490 | /* DUMB: prints shared entries multiple times */ | |
1491 | do { | |
1492 | seq_printf(s, | |
1493 | " %s%sqh%d/%p (%sdev%d ep%d%s max %d) " | |
1494 | "err %d\n", | |
1495 | (ep == sl811->active_a) ? "(A) " : "", | |
1496 | (ep == sl811->active_b) ? "(B) " : "", | |
1497 | ep->period, ep, | |
1498 | (ep->udev->speed == USB_SPEED_FULL) | |
1499 | ? "" : "ls ", | |
1500 | ep->udev->devnum, ep->epnum, | |
1501 | (ep->epnum == 0) ? "" | |
1502 | : ((ep->nextpid == USB_PID_IN) | |
1503 | ? "in" | |
1504 | : "out"), | |
1505 | ep->maxpacket, ep->error_count); | |
1506 | ep = ep->next; | |
1507 | } while (ep); | |
1508 | } | |
1509 | ||
1510 | spin_unlock_irq(&sl811->lock); | |
1511 | seq_printf(s, "\n"); | |
1512 | ||
1513 | return 0; | |
1514 | } | |
1515 | ||
1516 | static int proc_sl811h_open(struct inode *inode, struct file *file) | |
1517 | { | |
1518 | return single_open(file, proc_sl811h_show, PDE(inode)->data); | |
1519 | } | |
1520 | ||
1521 | static struct file_operations proc_ops = { | |
1522 | .open = proc_sl811h_open, | |
1523 | .read = seq_read, | |
1524 | .llseek = seq_lseek, | |
1525 | .release = single_release, | |
1526 | }; | |
1527 | ||
1528 | /* expect just one sl811 per system */ | |
1529 | static const char proc_filename[] = "driver/sl811h"; | |
1530 | ||
1531 | static void create_debug_file(struct sl811 *sl811) | |
1532 | { | |
1533 | struct proc_dir_entry *pde; | |
1534 | ||
1535 | pde = create_proc_entry(proc_filename, 0, NULL); | |
1536 | if (pde == NULL) | |
1537 | return; | |
1538 | ||
1539 | pde->proc_fops = &proc_ops; | |
1540 | pde->data = sl811; | |
1541 | sl811->pde = pde; | |
1542 | } | |
1543 | ||
1544 | static void remove_debug_file(struct sl811 *sl811) | |
1545 | { | |
1546 | if (sl811->pde) | |
1547 | remove_proc_entry(proc_filename, NULL); | |
1548 | } | |
1549 | ||
1550 | #endif | |
1551 | ||
1552 | /*-------------------------------------------------------------------------*/ | |
1553 | ||
1554 | static void | |
1555 | sl811h_stop(struct usb_hcd *hcd) | |
1556 | { | |
1557 | struct sl811 *sl811 = hcd_to_sl811(hcd); | |
1558 | unsigned long flags; | |
1559 | ||
1560 | del_timer_sync(&hcd->rh_timer); | |
1561 | ||
1562 | spin_lock_irqsave(&sl811->lock, flags); | |
1563 | port_power(sl811, 0); | |
1564 | spin_unlock_irqrestore(&sl811->lock, flags); | |
1565 | } | |
1566 | ||
1567 | static int | |
1568 | sl811h_start(struct usb_hcd *hcd) | |
1569 | { | |
1570 | struct sl811 *sl811 = hcd_to_sl811(hcd); | |
1da177e4 LT |
1571 | |
1572 | /* chip has been reset, VBUS power is off */ | |
1da177e4 LT |
1573 | hcd->state = HC_STATE_RUNNING; |
1574 | ||
bc96c0ad | 1575 | if (sl811->board) { |
0c8624f9 DB |
1576 | if (!device_can_wakeup(hcd->self.controller)) |
1577 | device_init_wakeup(hcd->self.controller, | |
1578 | sl811->board->can_wakeup); | |
bc96c0ad AS |
1579 | hcd->power_budget = sl811->board->power * 2; |
1580 | } | |
1da177e4 | 1581 | |
1e9a47b6 DB |
1582 | /* enable power and interupts */ |
1583 | port_power(sl811, 1); | |
1584 | ||
1da177e4 LT |
1585 | return 0; |
1586 | } | |
1587 | ||
1588 | /*-------------------------------------------------------------------------*/ | |
1589 | ||
1590 | static struct hc_driver sl811h_hc_driver = { | |
1591 | .description = hcd_name, | |
1592 | .hcd_priv_size = sizeof(struct sl811), | |
1593 | ||
1594 | /* | |
1595 | * generic hardware linkage | |
1596 | */ | |
1597 | .irq = sl811h_irq, | |
1598 | .flags = HCD_USB11 | HCD_MEMORY, | |
1599 | ||
1600 | /* Basic lifecycle operations */ | |
1601 | .start = sl811h_start, | |
1602 | .stop = sl811h_stop, | |
1603 | ||
1604 | /* | |
1605 | * managing i/o requests and associated device resources | |
1606 | */ | |
1607 | .urb_enqueue = sl811h_urb_enqueue, | |
1608 | .urb_dequeue = sl811h_urb_dequeue, | |
1609 | .endpoint_disable = sl811h_endpoint_disable, | |
1610 | ||
1611 | /* | |
1612 | * periodic schedule support | |
1613 | */ | |
1614 | .get_frame_number = sl811h_get_frame, | |
1615 | ||
1616 | /* | |
1617 | * root hub support | |
1618 | */ | |
1619 | .hub_status_data = sl811h_hub_status_data, | |
1620 | .hub_control = sl811h_hub_control, | |
0c0382e3 AS |
1621 | .bus_suspend = sl811h_bus_suspend, |
1622 | .bus_resume = sl811h_bus_resume, | |
1da177e4 LT |
1623 | }; |
1624 | ||
1625 | /*-------------------------------------------------------------------------*/ | |
1626 | ||
1e9a47b6 | 1627 | static int __devexit |
3ae5eaec | 1628 | sl811h_remove(struct platform_device *dev) |
1da177e4 | 1629 | { |
3ae5eaec | 1630 | struct usb_hcd *hcd = platform_get_drvdata(dev); |
1da177e4 | 1631 | struct sl811 *sl811 = hcd_to_sl811(hcd); |
1da177e4 LT |
1632 | struct resource *res; |
1633 | ||
1da177e4 LT |
1634 | remove_debug_file(sl811); |
1635 | usb_remove_hcd(hcd); | |
1636 | ||
1e9a47b6 | 1637 | /* some platforms may use IORESOURCE_IO */ |
3ae5eaec | 1638 | res = platform_get_resource(dev, IORESOURCE_MEM, 1); |
1e9a47b6 DB |
1639 | if (res) |
1640 | iounmap(sl811->data_reg); | |
1da177e4 | 1641 | |
3ae5eaec | 1642 | res = platform_get_resource(dev, IORESOURCE_MEM, 0); |
1e9a47b6 DB |
1643 | if (res) |
1644 | iounmap(sl811->addr_reg); | |
1da177e4 LT |
1645 | |
1646 | usb_put_hcd(hcd); | |
1647 | return 0; | |
1648 | } | |
1649 | ||
1e9a47b6 | 1650 | static int __devinit |
3ae5eaec | 1651 | sl811h_probe(struct platform_device *dev) |
1da177e4 LT |
1652 | { |
1653 | struct usb_hcd *hcd; | |
1654 | struct sl811 *sl811; | |
1da177e4 LT |
1655 | struct resource *addr, *data; |
1656 | int irq; | |
1657 | void __iomem *addr_reg; | |
1658 | void __iomem *data_reg; | |
1659 | int retval; | |
1e9a47b6 | 1660 | u8 tmp, ioaddr = 0; |
1da177e4 LT |
1661 | |
1662 | /* basic sanity checks first. board-specific init logic should | |
1663 | * have initialized these three resources and probably board | |
1664 | * specific platform_data. we don't probe for IRQs, and do only | |
1665 | * minimal sanity checking. | |
1666 | */ | |
3ae5eaec RK |
1667 | irq = platform_get_irq(dev, 0); |
1668 | if (dev->num_resources < 3 || irq < 0) | |
1da177e4 LT |
1669 | return -ENODEV; |
1670 | ||
1671 | /* refuse to confuse usbcore */ | |
3ae5eaec | 1672 | if (dev->dev.dma_mask) { |
1da177e4 LT |
1673 | DBG("no we won't dma\n"); |
1674 | return -EINVAL; | |
1675 | } | |
1676 | ||
1e9a47b6 | 1677 | /* the chip may be wired for either kind of addressing */ |
3ae5eaec RK |
1678 | addr = platform_get_resource(dev, IORESOURCE_MEM, 0); |
1679 | data = platform_get_resource(dev, IORESOURCE_MEM, 1); | |
1e9a47b6 DB |
1680 | retval = -EBUSY; |
1681 | if (!addr || !data) { | |
3ae5eaec RK |
1682 | addr = platform_get_resource(dev, IORESOURCE_IO, 0); |
1683 | data = platform_get_resource(dev, IORESOURCE_IO, 1); | |
1e9a47b6 DB |
1684 | if (!addr || !data) |
1685 | return -ENODEV; | |
1686 | ioaddr = 1; | |
1687 | ||
1688 | addr_reg = (void __iomem *) addr->start; | |
1689 | data_reg = (void __iomem *) data->start; | |
1690 | } else { | |
1691 | addr_reg = ioremap(addr->start, 1); | |
1692 | if (addr_reg == NULL) { | |
1693 | retval = -ENOMEM; | |
1694 | goto err2; | |
1695 | } | |
1da177e4 | 1696 | |
1e9a47b6 DB |
1697 | data_reg = ioremap(data->start, 1); |
1698 | if (data_reg == NULL) { | |
1699 | retval = -ENOMEM; | |
1700 | goto err4; | |
1701 | } | |
1da177e4 LT |
1702 | } |
1703 | ||
1704 | /* allocate and initialize hcd */ | |
3ae5eaec | 1705 | hcd = usb_create_hcd(&sl811h_hc_driver, &dev->dev, dev->dev.bus_id); |
1da177e4 LT |
1706 | if (!hcd) { |
1707 | retval = -ENOMEM; | |
1708 | goto err5; | |
1709 | } | |
1710 | hcd->rsrc_start = addr->start; | |
1711 | sl811 = hcd_to_sl811(hcd); | |
1712 | ||
1713 | spin_lock_init(&sl811->lock); | |
1714 | INIT_LIST_HEAD(&sl811->async); | |
3ae5eaec | 1715 | sl811->board = dev->dev.platform_data; |
1da177e4 LT |
1716 | init_timer(&sl811->timer); |
1717 | sl811->timer.function = sl811h_timer; | |
1718 | sl811->timer.data = (unsigned long) sl811; | |
1719 | sl811->addr_reg = addr_reg; | |
1720 | sl811->data_reg = data_reg; | |
1721 | ||
1722 | spin_lock_irq(&sl811->lock); | |
1723 | port_power(sl811, 0); | |
1724 | spin_unlock_irq(&sl811->lock); | |
1725 | msleep(200); | |
1726 | ||
1727 | tmp = sl811_read(sl811, SL11H_HWREVREG); | |
1728 | switch (tmp >> 4) { | |
1729 | case 1: | |
1730 | hcd->product_desc = "SL811HS v1.2"; | |
1731 | break; | |
1732 | case 2: | |
1733 | hcd->product_desc = "SL811HS v1.5"; | |
1734 | break; | |
1735 | default: | |
1736 | /* reject case 0, SL11S is less functional */ | |
1737 | DBG("chiprev %02x\n", tmp); | |
1738 | retval = -ENXIO; | |
1739 | goto err6; | |
1740 | } | |
1741 | ||
1e9a47b6 DB |
1742 | /* The chip's IRQ is level triggered, active high. A requirement |
1743 | * for platform device setup is to cope with things like signal | |
1744 | * inverters (e.g. CF is active low) or working only with edge | |
1745 | * triggers (e.g. most ARM CPUs). Initial driver stress testing | |
1746 | * was on a system with single edge triggering, so most sorts of | |
1747 | * triggering arrangement should work. | |
1748 | */ | |
1749 | retval = usb_add_hcd(hcd, irq, SA_INTERRUPT | SA_SHIRQ); | |
1da177e4 LT |
1750 | if (retval != 0) |
1751 | goto err6; | |
1752 | ||
1753 | create_debug_file(sl811); | |
1754 | return retval; | |
1755 | ||
1756 | err6: | |
1757 | usb_put_hcd(hcd); | |
1758 | err5: | |
1e9a47b6 DB |
1759 | if (!ioaddr) |
1760 | iounmap(data_reg); | |
1da177e4 | 1761 | err4: |
1e9a47b6 DB |
1762 | if (!ioaddr) |
1763 | iounmap(addr_reg); | |
1da177e4 | 1764 | err2: |
1da177e4 LT |
1765 | DBG("init error, %d\n", retval); |
1766 | return retval; | |
1767 | } | |
1768 | ||
1769 | #ifdef CONFIG_PM | |
1770 | ||
1771 | /* for this device there's no useful distinction between the controller | |
1e9a47b6 | 1772 | * and its root hub, except that the root hub only gets direct PM calls |
1da177e4 LT |
1773 | * when CONFIG_USB_SUSPEND is enabled. |
1774 | */ | |
1775 | ||
1776 | static int | |
3ae5eaec | 1777 | sl811h_suspend(struct platform_device *dev, pm_message_t state) |
1da177e4 | 1778 | { |
3ae5eaec | 1779 | struct usb_hcd *hcd = platform_get_drvdata(dev); |
1da177e4 LT |
1780 | struct sl811 *sl811 = hcd_to_sl811(hcd); |
1781 | int retval = 0; | |
1782 | ||
ca078bae | 1783 | if (state.event == PM_EVENT_FREEZE) |
0c0382e3 | 1784 | retval = sl811h_bus_suspend(hcd); |
ca078bae | 1785 | else if (state.event == PM_EVENT_SUSPEND) |
1da177e4 LT |
1786 | port_power(sl811, 0); |
1787 | if (retval == 0) | |
3ae5eaec | 1788 | dev->dev.power.power_state = state; |
1da177e4 LT |
1789 | return retval; |
1790 | } | |
1791 | ||
1792 | static int | |
3ae5eaec | 1793 | sl811h_resume(struct platform_device *dev) |
1da177e4 | 1794 | { |
3ae5eaec | 1795 | struct usb_hcd *hcd = platform_get_drvdata(dev); |
1da177e4 LT |
1796 | struct sl811 *sl811 = hcd_to_sl811(hcd); |
1797 | ||
1da177e4 LT |
1798 | /* with no "check to see if VBUS is still powered" board hook, |
1799 | * let's assume it'd only be powered to enable remote wakeup. | |
1800 | */ | |
3ae5eaec | 1801 | if (dev->dev.power.power_state.event == PM_EVENT_SUSPEND |
0c8624f9 | 1802 | || !device_can_wakeup(&hcd->self.root_hub->dev)) { |
1da177e4 LT |
1803 | sl811->port1 = 0; |
1804 | port_power(sl811, 1); | |
1c50c317 | 1805 | usb_root_hub_lost_power(hcd->self.root_hub); |
1da177e4 LT |
1806 | return 0; |
1807 | } | |
1808 | ||
3ae5eaec | 1809 | dev->dev.power.power_state = PMSG_ON; |
0c0382e3 | 1810 | return sl811h_bus_resume(hcd); |
1da177e4 LT |
1811 | } |
1812 | ||
1813 | #else | |
1814 | ||
1815 | #define sl811h_suspend NULL | |
1816 | #define sl811h_resume NULL | |
1817 | ||
1818 | #endif | |
1819 | ||
1820 | ||
1e9a47b6 | 1821 | /* this driver is exported so sl811_cs can depend on it */ |
3ae5eaec | 1822 | struct platform_driver sl811h_driver = { |
1da177e4 | 1823 | .probe = sl811h_probe, |
1e9a47b6 | 1824 | .remove = __devexit_p(sl811h_remove), |
1da177e4 LT |
1825 | |
1826 | .suspend = sl811h_suspend, | |
1827 | .resume = sl811h_resume, | |
3ae5eaec RK |
1828 | .driver = { |
1829 | .name = (char *) hcd_name, | |
1830 | .owner = THIS_MODULE, | |
1831 | }, | |
1da177e4 | 1832 | }; |
1e9a47b6 | 1833 | EXPORT_SYMBOL(sl811h_driver); |
1da177e4 LT |
1834 | |
1835 | /*-------------------------------------------------------------------------*/ | |
1e9a47b6 DB |
1836 | |
1837 | static int __init sl811h_init(void) | |
1da177e4 LT |
1838 | { |
1839 | if (usb_disabled()) | |
1840 | return -ENODEV; | |
1841 | ||
1842 | INFO("driver %s, %s\n", hcd_name, DRIVER_VERSION); | |
3ae5eaec | 1843 | return platform_driver_register(&sl811h_driver); |
1da177e4 LT |
1844 | } |
1845 | module_init(sl811h_init); | |
1846 | ||
1e9a47b6 DB |
1847 | static void __exit sl811h_cleanup(void) |
1848 | { | |
3ae5eaec | 1849 | platform_driver_unregister(&sl811h_driver); |
1da177e4 LT |
1850 | } |
1851 | module_exit(sl811h_cleanup); |