[PATCH] UHCI: remove hc_inaccessible flag
[deliverable/linux.git] / drivers / usb / host / uhci-hcd.c
CommitLineData
1da177e4
LT
1/*
2 * Universal Host Controller Interface driver for USB.
3 *
4 * Maintainer: Alan Stern <stern@rowland.harvard.edu>
5 *
6 * (C) Copyright 1999 Linus Torvalds
7 * (C) Copyright 1999-2002 Johannes Erdfelt, johannes@erdfelt.com
8 * (C) Copyright 1999 Randy Dunlap
9 * (C) Copyright 1999 Georg Acher, acher@in.tum.de
10 * (C) Copyright 1999 Deti Fliegl, deti@fliegl.de
11 * (C) Copyright 1999 Thomas Sailer, sailer@ife.ee.ethz.ch
12 * (C) Copyright 1999 Roman Weissgaerber, weissg@vienna.at
13 * (C) Copyright 2000 Yggdrasil Computing, Inc. (port of new PCI interface
14 * support from usb-ohci.c by Adam Richter, adam@yggdrasil.com).
15 * (C) Copyright 1999 Gregory P. Smith (from usb-ohci.c)
c4334726 16 * (C) Copyright 2004-2006 Alan Stern, stern@rowland.harvard.edu
1da177e4
LT
17 *
18 * Intel documents this fairly well, and as far as I know there
19 * are no royalties or anything like that, but even so there are
20 * people who decided that they want to do the same thing in a
21 * completely different way.
22 *
1da177e4
LT
23 */
24
25#include <linux/config.h>
1da177e4
LT
26#include <linux/module.h>
27#include <linux/pci.h>
28#include <linux/kernel.h>
29#include <linux/init.h>
30#include <linux/delay.h>
31#include <linux/ioport.h>
32#include <linux/sched.h>
33#include <linux/slab.h>
1da177e4
LT
34#include <linux/errno.h>
35#include <linux/unistd.h>
36#include <linux/interrupt.h>
37#include <linux/spinlock.h>
38#include <linux/debugfs.h>
39#include <linux/pm.h>
40#include <linux/dmapool.h>
41#include <linux/dma-mapping.h>
42#include <linux/usb.h>
43#include <linux/bitops.h>
44
45#include <asm/uaccess.h>
46#include <asm/io.h>
47#include <asm/irq.h>
48#include <asm/system.h>
49
50#include "../core/hcd.h"
51#include "uhci-hcd.h"
75e2df60 52#include "pci-quirks.h"
1da177e4
LT
53
54/*
55 * Version Information
56 */
dccf4a48 57#define DRIVER_VERSION "v3.0"
1da177e4
LT
58#define DRIVER_AUTHOR "Linus 'Frodo Rabbit' Torvalds, Johannes Erdfelt, \
59Randy Dunlap, Georg Acher, Deti Fliegl, Thomas Sailer, Roman Weissgaerber, \
60Alan Stern"
61#define DRIVER_DESC "USB Universal Host Controller Interface driver"
62
63/*
64 * debug = 0, no debugging messages
687f5f34
AS
65 * debug = 1, dump failed URBs except for stalls
66 * debug = 2, dump all failed URBs (including stalls)
1da177e4 67 * show all queues in /debug/uhci/[pci_addr]
687f5f34 68 * debug = 3, show all TDs in URBs when dumping
1da177e4
LT
69 */
70#ifdef DEBUG
8d402e1a 71#define DEBUG_CONFIGURED 1
1da177e4 72static int debug = 1;
1da177e4
LT
73module_param(debug, int, S_IRUGO | S_IWUSR);
74MODULE_PARM_DESC(debug, "Debug level");
8d402e1a
AS
75
76#else
77#define DEBUG_CONFIGURED 0
78#define debug 0
79#endif
80
1da177e4
LT
81static char *errbuf;
82#define ERRBUF_LEN (32 * 1024)
83
84static kmem_cache_t *uhci_up_cachep; /* urb_priv */
85
6c1b445c
AS
86static void suspend_rh(struct uhci_hcd *uhci, enum uhci_rh_state new_state);
87static void wakeup_rh(struct uhci_hcd *uhci);
1da177e4 88static void uhci_get_current_frame_number(struct uhci_hcd *uhci);
1da177e4 89
1da177e4
LT
90#include "uhci-debug.c"
91#include "uhci-q.c"
1f09df8b 92#include "uhci-hub.c"
1da177e4 93
a8bed8b6 94/*
bb200f6e 95 * Finish up a host controller reset and update the recorded state.
a8bed8b6 96 */
bb200f6e 97static void finish_reset(struct uhci_hcd *uhci)
1da177e4 98{
c074b416
AS
99 int port;
100
c074b416
AS
101 /* HCRESET doesn't affect the Suspend, Reset, and Resume Detect
102 * bits in the port status and control registers.
103 * We have to clear them by hand.
104 */
105 for (port = 0; port < uhci->rh_numports; ++port)
106 outw(0, uhci->io_addr + USBPORTSC1 + (port * 2));
107
8e326406 108 uhci->port_c_suspend = uhci->resuming_ports = 0;
c8f4fe43 109 uhci->rh_state = UHCI_RH_RESET;
a8bed8b6
AS
110 uhci->is_stopped = UHCI_IS_STOPPED;
111 uhci_to_hcd(uhci)->state = HC_STATE_HALT;
6c1b445c 112 uhci_to_hcd(uhci)->poll_rh = 0;
e323de46
AS
113
114 uhci->dead = 0; /* Full reset resurrects the controller */
1da177e4
LT
115}
116
4daaa87c
AS
117/*
118 * Last rites for a defunct/nonfunctional controller
02597d2d 119 * or one we don't want to use any more.
4daaa87c 120 */
e323de46 121static void uhci_hc_died(struct uhci_hcd *uhci)
4daaa87c 122{
e323de46 123 uhci_get_current_frame_number(uhci);
bb200f6e
AS
124 uhci_reset_hc(to_pci_dev(uhci_dev(uhci)), uhci->io_addr);
125 finish_reset(uhci);
e323de46
AS
126 uhci->dead = 1;
127
128 /* The current frame may already be partway finished */
129 ++uhci->frame_number;
4daaa87c
AS
130}
131
a8bed8b6 132/*
be3cbc5f
DB
133 * Initialize a controller that was newly discovered or has lost power
134 * or otherwise been reset while it was suspended. In none of these cases
135 * can we be sure of its previous state.
a8bed8b6
AS
136 */
137static void check_and_reset_hc(struct uhci_hcd *uhci)
138{
bb200f6e
AS
139 if (uhci_check_and_reset_hc(to_pci_dev(uhci_dev(uhci)), uhci->io_addr))
140 finish_reset(uhci);
a8bed8b6
AS
141}
142
143/*
144 * Store the basic register settings needed by the controller.
145 */
146static void configure_hc(struct uhci_hcd *uhci)
147{
148 /* Set the frame length to the default: 1 ms exactly */
149 outb(USBSOF_DEFAULT, uhci->io_addr + USBSOF);
150
151 /* Store the frame list base address */
a1d59ce8 152 outl(uhci->frame_dma_handle, uhci->io_addr + USBFLBASEADD);
a8bed8b6
AS
153
154 /* Set the current frame number */
c4334726
AS
155 outw(uhci->frame_number & UHCI_MAX_SOF_NUMBER,
156 uhci->io_addr + USBFRNUM);
a8bed8b6 157
f37be9b9
AS
158 /* Mark controller as not halted before we enable interrupts */
159 uhci_to_hcd(uhci)->state = HC_STATE_SUSPENDED;
a8bed8b6
AS
160 mb();
161
162 /* Enable PIRQ */
163 pci_write_config_word(to_pci_dev(uhci_dev(uhci)), USBLEGSUP,
164 USBLEGSUP_DEFAULT);
165}
166
167
c8f4fe43 168static int resume_detect_interrupts_are_broken(struct uhci_hcd *uhci)
1da177e4 169{
c8f4fe43 170 int port;
1da177e4 171
c8f4fe43
AS
172 switch (to_pci_dev(uhci_dev(uhci))->vendor) {
173 default:
174 break;
175
176 case PCI_VENDOR_ID_GENESYS:
177 /* Genesys Logic's GL880S controllers don't generate
178 * resume-detect interrupts.
179 */
180 return 1;
181
182 case PCI_VENDOR_ID_INTEL:
183 /* Some of Intel's USB controllers have a bug that causes
184 * resume-detect interrupts if any port has an over-current
185 * condition. To make matters worse, some motherboards
186 * hardwire unused USB ports' over-current inputs active!
187 * To prevent problems, we will not enable resume-detect
188 * interrupts if any ports are OC.
189 */
190 for (port = 0; port < uhci->rh_numports; ++port) {
191 if (inw(uhci->io_addr + USBPORTSC1 + port * 2) &
192 USBPORTSC_OC)
193 return 1;
194 }
195 break;
196 }
197 return 0;
198}
199
a8bed8b6 200static void suspend_rh(struct uhci_hcd *uhci, enum uhci_rh_state new_state)
c8f4fe43
AS
201__releases(uhci->lock)
202__acquires(uhci->lock)
203{
204 int auto_stop;
205 int int_enable;
206
207 auto_stop = (new_state == UHCI_RH_AUTO_STOPPED);
be3cbc5f
DB
208 dev_dbg(&uhci_to_hcd(uhci)->self.root_hub->dev,
209 "%s%s\n", __FUNCTION__,
c8f4fe43
AS
210 (auto_stop ? " (auto-stop)" : ""));
211
212 /* If we get a suspend request when we're already auto-stopped
213 * then there's nothing to do.
214 */
215 if (uhci->rh_state == UHCI_RH_AUTO_STOPPED) {
216 uhci->rh_state = new_state;
217 return;
218 }
219
220 /* Enable resume-detect interrupts if they work.
221 * Then enter Global Suspend mode, still configured.
222 */
1f09df8b
AS
223 uhci->working_RD = 1;
224 int_enable = USBINTR_RESUME;
225 if (resume_detect_interrupts_are_broken(uhci)) {
226 uhci->working_RD = int_enable = 0;
227 }
c8f4fe43
AS
228 outw(int_enable, uhci->io_addr + USBINTR);
229 outw(USBCMD_EGSM | USBCMD_CF, uhci->io_addr + USBCMD);
a8bed8b6 230 mb();
c8f4fe43
AS
231 udelay(5);
232
233 /* If we're auto-stopping then no devices have been attached
234 * for a while, so there shouldn't be any active URBs and the
235 * controller should stop after a few microseconds. Otherwise
236 * we will give the controller one frame to stop.
237 */
238 if (!auto_stop && !(inw(uhci->io_addr + USBSTS) & USBSTS_HCH)) {
239 uhci->rh_state = UHCI_RH_SUSPENDING;
240 spin_unlock_irq(&uhci->lock);
241 msleep(1);
242 spin_lock_irq(&uhci->lock);
e323de46 243 if (uhci->dead)
4daaa87c 244 return;
c8f4fe43
AS
245 }
246 if (!(inw(uhci->io_addr + USBSTS) & USBSTS_HCH))
be3cbc5f
DB
247 dev_warn(&uhci_to_hcd(uhci)->self.root_hub->dev,
248 "Controller not stopped yet!\n");
1da177e4 249
1da177e4 250 uhci_get_current_frame_number(uhci);
c8f4fe43
AS
251
252 uhci->rh_state = new_state;
1da177e4 253 uhci->is_stopped = UHCI_IS_STOPPED;
6c1b445c 254 uhci_to_hcd(uhci)->poll_rh = !int_enable;
1da177e4
LT
255
256 uhci_scan_schedule(uhci, NULL);
84afddd7 257 uhci_fsbr_off(uhci);
1da177e4
LT
258}
259
a8bed8b6
AS
260static void start_rh(struct uhci_hcd *uhci)
261{
f37be9b9 262 uhci_to_hcd(uhci)->state = HC_STATE_RUNNING;
a8bed8b6 263 uhci->is_stopped = 0;
a8bed8b6
AS
264
265 /* Mark it configured and running with a 64-byte max packet.
266 * All interrupts are enabled, even though RESUME won't do anything.
267 */
268 outw(USBCMD_RS | USBCMD_CF | USBCMD_MAXP, uhci->io_addr + USBCMD);
269 outw(USBINTR_TIMEOUT | USBINTR_RESUME | USBINTR_IOC | USBINTR_SP,
270 uhci->io_addr + USBINTR);
271 mb();
6c1b445c
AS
272 uhci->rh_state = UHCI_RH_RUNNING;
273 uhci_to_hcd(uhci)->poll_rh = 1;
a8bed8b6
AS
274}
275
276static void wakeup_rh(struct uhci_hcd *uhci)
c8f4fe43
AS
277__releases(uhci->lock)
278__acquires(uhci->lock)
1da177e4 279{
be3cbc5f
DB
280 dev_dbg(&uhci_to_hcd(uhci)->self.root_hub->dev,
281 "%s%s\n", __FUNCTION__,
c8f4fe43
AS
282 uhci->rh_state == UHCI_RH_AUTO_STOPPED ?
283 " (auto-start)" : "");
1da177e4 284
c8f4fe43
AS
285 /* If we are auto-stopped then no devices are attached so there's
286 * no need for wakeup signals. Otherwise we send Global Resume
287 * for 20 ms.
288 */
289 if (uhci->rh_state == UHCI_RH_SUSPENDED) {
290 uhci->rh_state = UHCI_RH_RESUMING;
291 outw(USBCMD_FGR | USBCMD_EGSM | USBCMD_CF,
292 uhci->io_addr + USBCMD);
293 spin_unlock_irq(&uhci->lock);
294 msleep(20);
295 spin_lock_irq(&uhci->lock);
e323de46 296 if (uhci->dead)
4daaa87c 297 return;
1da177e4 298
c8f4fe43
AS
299 /* End Global Resume and wait for EOP to be sent */
300 outw(USBCMD_CF, uhci->io_addr + USBCMD);
a8bed8b6 301 mb();
c8f4fe43
AS
302 udelay(4);
303 if (inw(uhci->io_addr + USBCMD) & USBCMD_FGR)
304 dev_warn(uhci_dev(uhci), "FGR not stopped yet!\n");
305 }
1da177e4 306
a8bed8b6 307 start_rh(uhci);
c8f4fe43 308
6c1b445c
AS
309 /* Restart root hub polling */
310 mod_timer(&uhci_to_hcd(uhci)->rh_timer, jiffies);
1da177e4
LT
311}
312
014e73c9
AS
313static irqreturn_t uhci_irq(struct usb_hcd *hcd, struct pt_regs *regs)
314{
315 struct uhci_hcd *uhci = hcd_to_uhci(hcd);
014e73c9 316 unsigned short status;
4daaa87c 317 unsigned long flags;
1da177e4
LT
318
319 /*
014e73c9
AS
320 * Read the interrupt status, and write it back to clear the
321 * interrupt cause. Contrary to the UHCI specification, the
322 * "HC Halted" status bit is persistent: it is RO, not R/WC.
1da177e4 323 */
a8bed8b6 324 status = inw(uhci->io_addr + USBSTS);
014e73c9
AS
325 if (!(status & ~USBSTS_HCH)) /* shared interrupt, not mine */
326 return IRQ_NONE;
a8bed8b6 327 outw(status, uhci->io_addr + USBSTS); /* Clear it */
014e73c9
AS
328
329 if (status & ~(USBSTS_USBINT | USBSTS_ERROR | USBSTS_RD)) {
330 if (status & USBSTS_HSE)
331 dev_err(uhci_dev(uhci), "host system error, "
332 "PCI problems?\n");
333 if (status & USBSTS_HCPE)
334 dev_err(uhci_dev(uhci), "host controller process "
335 "error, something bad happened!\n");
4daaa87c
AS
336 if (status & USBSTS_HCH) {
337 spin_lock_irqsave(&uhci->lock, flags);
338 if (uhci->rh_state >= UHCI_RH_RUNNING) {
339 dev_err(uhci_dev(uhci),
340 "host controller halted, "
014e73c9 341 "very bad!\n");
8d402e1a
AS
342 if (debug > 1 && errbuf) {
343 /* Print the schedule for debugging */
344 uhci_sprint_schedule(uhci,
345 errbuf, ERRBUF_LEN);
346 lprintk(errbuf);
347 }
e323de46 348 uhci_hc_died(uhci);
1f09df8b
AS
349
350 /* Force a callback in case there are
351 * pending unlinks */
352 mod_timer(&hcd->rh_timer, jiffies);
4daaa87c
AS
353 }
354 spin_unlock_irqrestore(&uhci->lock, flags);
1da177e4 355 }
1da177e4
LT
356 }
357
014e73c9 358 if (status & USBSTS_RD)
6c1b445c 359 usb_hcd_poll_rh_status(hcd);
1f09df8b
AS
360 else {
361 spin_lock_irqsave(&uhci->lock, flags);
362 uhci_scan_schedule(uhci, regs);
363 spin_unlock_irqrestore(&uhci->lock, flags);
364 }
1da177e4 365
014e73c9
AS
366 return IRQ_HANDLED;
367}
1da177e4 368
014e73c9
AS
369/*
370 * Store the current frame number in uhci->frame_number if the controller
c4334726
AS
371 * is runnning. Expand from 11 bits (of which we use only 10) to a
372 * full-sized integer.
373 *
374 * Like many other parts of the driver, this code relies on being polled
375 * more than once per second as long as the controller is running.
014e73c9
AS
376 */
377static void uhci_get_current_frame_number(struct uhci_hcd *uhci)
378{
c4334726
AS
379 if (!uhci->is_stopped) {
380 unsigned delta;
381
382 delta = (inw(uhci->io_addr + USBFRNUM) - uhci->frame_number) &
383 (UHCI_NUMFRAMES - 1);
384 uhci->frame_number += delta;
385 }
1da177e4
LT
386}
387
388/*
389 * De-allocate all resources
390 */
391static void release_uhci(struct uhci_hcd *uhci)
392{
393 int i;
394
8d402e1a
AS
395 if (DEBUG_CONFIGURED) {
396 spin_lock_irq(&uhci->lock);
397 uhci->is_initialized = 0;
398 spin_unlock_irq(&uhci->lock);
399
400 debugfs_remove(uhci->dentry);
401 }
402
1da177e4 403 for (i = 0; i < UHCI_NUM_SKELQH; i++)
8b4cd421 404 uhci_free_qh(uhci, uhci->skelqh[i]);
1da177e4 405
8b4cd421 406 uhci_free_td(uhci, uhci->term_td);
1da177e4 407
8b4cd421 408 dma_pool_destroy(uhci->qh_pool);
1da177e4 409
8b4cd421 410 dma_pool_destroy(uhci->td_pool);
1da177e4 411
a1d59ce8
AS
412 kfree(uhci->frame_cpu);
413
414 dma_free_coherent(uhci_dev(uhci),
415 UHCI_NUMFRAMES * sizeof(*uhci->frame),
416 uhci->frame, uhci->frame_dma_handle);
1da177e4
LT
417}
418
be3cbc5f 419static int uhci_init(struct usb_hcd *hcd)
1da177e4
LT
420{
421 struct uhci_hcd *uhci = hcd_to_uhci(hcd);
c074b416
AS
422 unsigned io_size = (unsigned) hcd->rsrc_len;
423 int port;
1da177e4
LT
424
425 uhci->io_addr = (unsigned long) hcd->rsrc_start;
426
c074b416
AS
427 /* The UHCI spec says devices must have 2 ports, and goes on to say
428 * they may have more but gives no way to determine how many there
e07fefa6 429 * are. However according to the UHCI spec, Bit 7 of the port
c074b416 430 * status and control register is always set to 1. So we try to
e07fefa6
AS
431 * use this to our advantage. Another common failure mode when
432 * a nonexistent register is addressed is to return all ones, so
433 * we test for that also.
c074b416
AS
434 */
435 for (port = 0; port < (io_size - USBPORTSC1) / 2; port++) {
436 unsigned int portstatus;
437
438 portstatus = inw(uhci->io_addr + USBPORTSC1 + (port * 2));
e07fefa6 439 if (!(portstatus & 0x0080) || portstatus == 0xffff)
c074b416
AS
440 break;
441 }
442 if (debug)
443 dev_info(uhci_dev(uhci), "detected %d ports\n", port);
444
e07fefa6
AS
445 /* Anything greater than 7 is weird so we'll ignore it. */
446 if (port > UHCI_RH_MAXCHILD) {
c074b416
AS
447 dev_info(uhci_dev(uhci), "port count misdetected? "
448 "forcing to 2 ports\n");
449 port = 2;
450 }
451 uhci->rh_numports = port;
452
a8bed8b6
AS
453 /* Kick BIOS off this hardware and reset if the controller
454 * isn't already safely quiescent.
1da177e4 455 */
a8bed8b6 456 check_and_reset_hc(uhci);
1da177e4
LT
457 return 0;
458}
459
02597d2d
AS
460/* Make sure the controller is quiescent and that we're not using it
461 * any more. This is mainly for the benefit of programs which, like kexec,
462 * expect the hardware to be idle: not doing DMA or generating IRQs.
463 *
464 * This routine may be called in a damaged or failing kernel. Hence we
465 * do not acquire the spinlock before shutting down the controller.
466 */
467static void uhci_shutdown(struct pci_dev *pdev)
468{
469 struct usb_hcd *hcd = (struct usb_hcd *) pci_get_drvdata(pdev);
470
e323de46 471 uhci_hc_died(hcd_to_uhci(hcd));
02597d2d
AS
472}
473
1da177e4
LT
474/*
475 * Allocate a frame list, and then setup the skeleton
476 *
477 * The hardware doesn't really know any difference
478 * in the queues, but the order does matter for the
479 * protocols higher up. The order is:
480 *
481 * - any isochronous events handled before any
482 * of the queues. We don't do that here, because
483 * we'll create the actual TD entries on demand.
484 * - The first queue is the interrupt queue.
485 * - The second queue is the control queue, split into low- and full-speed
486 * - The third queue is bulk queue.
487 * - The fourth queue is the bandwidth reclamation queue, which loops back
488 * to the full-speed control queue.
489 */
490static int uhci_start(struct usb_hcd *hcd)
491{
492 struct uhci_hcd *uhci = hcd_to_uhci(hcd);
493 int retval = -EBUSY;
c074b416 494 int i;
1da177e4
LT
495 struct dentry *dentry;
496
6c1b445c 497 hcd->uses_new_polling = 1;
1da177e4 498
1da177e4 499 spin_lock_init(&uhci->lock);
1da177e4 500
dccf4a48 501 INIT_LIST_HEAD(&uhci->idle_qh_list);
1da177e4
LT
502
503 init_waitqueue_head(&uhci->waitqh);
504
8d402e1a
AS
505 if (DEBUG_CONFIGURED) {
506 dentry = debugfs_create_file(hcd->self.bus_name,
507 S_IFREG|S_IRUGO|S_IWUSR, uhci_debugfs_root,
508 uhci, &uhci_debug_operations);
509 if (!dentry) {
510 dev_err(uhci_dev(uhci), "couldn't create uhci "
511 "debugfs entry\n");
512 retval = -ENOMEM;
513 goto err_create_debug_entry;
514 }
515 uhci->dentry = dentry;
516 }
517
a1d59ce8
AS
518 uhci->frame = dma_alloc_coherent(uhci_dev(uhci),
519 UHCI_NUMFRAMES * sizeof(*uhci->frame),
520 &uhci->frame_dma_handle, 0);
521 if (!uhci->frame) {
1da177e4
LT
522 dev_err(uhci_dev(uhci), "unable to allocate "
523 "consistent memory for frame list\n");
a1d59ce8 524 goto err_alloc_frame;
1da177e4 525 }
a1d59ce8 526 memset(uhci->frame, 0, UHCI_NUMFRAMES * sizeof(*uhci->frame));
1da177e4 527
a1d59ce8
AS
528 uhci->frame_cpu = kcalloc(UHCI_NUMFRAMES, sizeof(*uhci->frame_cpu),
529 GFP_KERNEL);
530 if (!uhci->frame_cpu) {
531 dev_err(uhci_dev(uhci), "unable to allocate "
532 "memory for frame pointers\n");
533 goto err_alloc_frame_cpu;
534 }
1da177e4
LT
535
536 uhci->td_pool = dma_pool_create("uhci_td", uhci_dev(uhci),
537 sizeof(struct uhci_td), 16, 0);
538 if (!uhci->td_pool) {
539 dev_err(uhci_dev(uhci), "unable to create td dma_pool\n");
540 goto err_create_td_pool;
541 }
542
543 uhci->qh_pool = dma_pool_create("uhci_qh", uhci_dev(uhci),
544 sizeof(struct uhci_qh), 16, 0);
545 if (!uhci->qh_pool) {
546 dev_err(uhci_dev(uhci), "unable to create qh dma_pool\n");
547 goto err_create_qh_pool;
548 }
549
2532178a 550 uhci->term_td = uhci_alloc_td(uhci);
1da177e4
LT
551 if (!uhci->term_td) {
552 dev_err(uhci_dev(uhci), "unable to allocate terminating TD\n");
553 goto err_alloc_term_td;
554 }
555
556 for (i = 0; i < UHCI_NUM_SKELQH; i++) {
dccf4a48 557 uhci->skelqh[i] = uhci_alloc_qh(uhci, NULL, NULL);
1da177e4
LT
558 if (!uhci->skelqh[i]) {
559 dev_err(uhci_dev(uhci), "unable to allocate QH\n");
560 goto err_alloc_skelqh;
561 }
562 }
563
564 /*
565 * 8 Interrupt queues; link all higher int queues to int1,
566 * then link int1 to control and control to bulk
567 */
568 uhci->skel_int128_qh->link =
569 uhci->skel_int64_qh->link =
570 uhci->skel_int32_qh->link =
571 uhci->skel_int16_qh->link =
572 uhci->skel_int8_qh->link =
573 uhci->skel_int4_qh->link =
dccf4a48
AS
574 uhci->skel_int2_qh->link = UHCI_PTR_QH |
575 cpu_to_le32(uhci->skel_int1_qh->dma_handle);
576
577 uhci->skel_int1_qh->link = UHCI_PTR_QH |
578 cpu_to_le32(uhci->skel_ls_control_qh->dma_handle);
579 uhci->skel_ls_control_qh->link = UHCI_PTR_QH |
580 cpu_to_le32(uhci->skel_fs_control_qh->dma_handle);
581 uhci->skel_fs_control_qh->link = UHCI_PTR_QH |
582 cpu_to_le32(uhci->skel_bulk_qh->dma_handle);
583 uhci->skel_bulk_qh->link = UHCI_PTR_QH |
584 cpu_to_le32(uhci->skel_term_qh->dma_handle);
1da177e4
LT
585
586 /* This dummy TD is to work around a bug in Intel PIIX controllers */
fa346568 587 uhci_fill_td(uhci->term_td, 0, uhci_explen(0) |
1da177e4
LT
588 (0x7f << TD_TOKEN_DEVADDR_SHIFT) | USB_PID_IN, 0);
589 uhci->term_td->link = cpu_to_le32(uhci->term_td->dma_handle);
590
591 uhci->skel_term_qh->link = UHCI_PTR_TERM;
592 uhci->skel_term_qh->element = cpu_to_le32(uhci->term_td->dma_handle);
593
594 /*
595 * Fill the frame list: make all entries point to the proper
596 * interrupt queue.
597 *
598 * The interrupt queues will be interleaved as evenly as possible.
599 * There's not much to be done about period-1 interrupts; they have
600 * to occur in every frame. But we can schedule period-2 interrupts
601 * in odd-numbered frames, period-4 interrupts in frames congruent
602 * to 2 (mod 4), and so on. This way each frame only has two
603 * interrupt QHs, which will help spread out bandwidth utilization.
604 */
605 for (i = 0; i < UHCI_NUMFRAMES; i++) {
606 int irq;
607
608 /*
609 * ffs (Find First bit Set) does exactly what we need:
dccf4a48
AS
610 * 1,3,5,... => ffs = 0 => use skel_int2_qh = skelqh[8],
611 * 2,6,10,... => ffs = 1 => use skel_int4_qh = skelqh[7], etc.
612 * ffs >= 7 => not on any high-period queue, so use
613 * skel_int1_qh = skelqh[9].
1da177e4
LT
614 * Add UHCI_NUMFRAMES to insure at least one bit is set.
615 */
dccf4a48
AS
616 irq = 8 - (int) __ffs(i + UHCI_NUMFRAMES);
617 if (irq <= 1)
618 irq = 9;
1da177e4
LT
619
620 /* Only place we don't use the frame list routines */
a1d59ce8 621 uhci->frame[i] = UHCI_PTR_QH |
1da177e4
LT
622 cpu_to_le32(uhci->skelqh[irq]->dma_handle);
623 }
624
625 /*
626 * Some architectures require a full mb() to enforce completion of
a8bed8b6 627 * the memory writes above before the I/O transfers in configure_hc().
1da177e4
LT
628 */
629 mb();
a8bed8b6
AS
630
631 configure_hc(uhci);
8d402e1a 632 uhci->is_initialized = 1;
a8bed8b6 633 start_rh(uhci);
1da177e4
LT
634 return 0;
635
636/*
637 * error exits:
638 */
1da177e4 639err_alloc_skelqh:
8b4cd421
AS
640 for (i = 0; i < UHCI_NUM_SKELQH; i++) {
641 if (uhci->skelqh[i])
1da177e4 642 uhci_free_qh(uhci, uhci->skelqh[i]);
8b4cd421 643 }
1da177e4
LT
644
645 uhci_free_td(uhci, uhci->term_td);
1da177e4
LT
646
647err_alloc_term_td:
1da177e4 648 dma_pool_destroy(uhci->qh_pool);
1da177e4
LT
649
650err_create_qh_pool:
651 dma_pool_destroy(uhci->td_pool);
1da177e4
LT
652
653err_create_td_pool:
a1d59ce8
AS
654 kfree(uhci->frame_cpu);
655
656err_alloc_frame_cpu:
657 dma_free_coherent(uhci_dev(uhci),
658 UHCI_NUMFRAMES * sizeof(*uhci->frame),
659 uhci->frame, uhci->frame_dma_handle);
1da177e4 660
a1d59ce8 661err_alloc_frame:
1da177e4 662 debugfs_remove(uhci->dentry);
1da177e4
LT
663
664err_create_debug_entry:
665 return retval;
666}
667
668static void uhci_stop(struct usb_hcd *hcd)
669{
670 struct uhci_hcd *uhci = hcd_to_uhci(hcd);
671
1da177e4 672 spin_lock_irq(&uhci->lock);
e323de46
AS
673 if (test_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags) && !uhci->dead)
674 uhci_hc_died(uhci);
1da177e4
LT
675 uhci_scan_schedule(uhci, NULL);
676 spin_unlock_irq(&uhci->lock);
6c1b445c 677
1da177e4
LT
678 release_uhci(uhci);
679}
680
681#ifdef CONFIG_PM
a8bed8b6
AS
682static int uhci_rh_suspend(struct usb_hcd *hcd)
683{
684 struct uhci_hcd *uhci = hcd_to_uhci(hcd);
be3cbc5f 685 int rc = 0;
a8bed8b6
AS
686
687 spin_lock_irq(&uhci->lock);
be3cbc5f
DB
688 if (!test_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags))
689 rc = -ESHUTDOWN;
e323de46 690 else if (!uhci->dead)
4daaa87c 691 suspend_rh(uhci, UHCI_RH_SUSPENDED);
a8bed8b6 692 spin_unlock_irq(&uhci->lock);
be3cbc5f 693 return rc;
a8bed8b6
AS
694}
695
696static int uhci_rh_resume(struct usb_hcd *hcd)
697{
698 struct uhci_hcd *uhci = hcd_to_uhci(hcd);
4daaa87c 699 int rc = 0;
a8bed8b6
AS
700
701 spin_lock_irq(&uhci->lock);
be3cbc5f
DB
702 if (!test_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags)) {
703 dev_warn(&hcd->self.root_hub->dev, "HC isn't running!\n");
704 rc = -ESHUTDOWN;
e323de46 705 } else if (!uhci->dead)
4daaa87c 706 wakeup_rh(uhci);
a8bed8b6 707 spin_unlock_irq(&uhci->lock);
4daaa87c 708 return rc;
a8bed8b6
AS
709}
710
9a5d3e98 711static int uhci_suspend(struct usb_hcd *hcd, pm_message_t message)
1da177e4
LT
712{
713 struct uhci_hcd *uhci = hcd_to_uhci(hcd);
4daaa87c 714 int rc = 0;
1da177e4 715
a8bed8b6
AS
716 dev_dbg(uhci_dev(uhci), "%s\n", __FUNCTION__);
717
1da177e4 718 spin_lock_irq(&uhci->lock);
e323de46
AS
719 if (!test_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags) || uhci->dead)
720 goto done_okay; /* Already suspended or dead */
a8bed8b6 721
4daaa87c
AS
722 if (uhci->rh_state > UHCI_RH_SUSPENDED) {
723 dev_warn(uhci_dev(uhci), "Root hub isn't suspended!\n");
4daaa87c
AS
724 rc = -EBUSY;
725 goto done;
726 };
727
a8bed8b6
AS
728 /* All PCI host controllers are required to disable IRQ generation
729 * at the source, so we must turn off PIRQ.
730 */
731 pci_write_config_word(to_pci_dev(uhci_dev(uhci)), USBLEGSUP, 0);
42245e65 732 mb();
1f09df8b 733 hcd->poll_rh = 0;
a8bed8b6
AS
734
735 /* FIXME: Enable non-PME# remote wakeup? */
736
e323de46
AS
737done_okay:
738 clear_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
4daaa87c 739done:
1da177e4 740 spin_unlock_irq(&uhci->lock);
4daaa87c 741 return rc;
1da177e4
LT
742}
743
744static int uhci_resume(struct usb_hcd *hcd)
745{
746 struct uhci_hcd *uhci = hcd_to_uhci(hcd);
1da177e4 747
a8bed8b6
AS
748 dev_dbg(uhci_dev(uhci), "%s\n", __FUNCTION__);
749
687f5f34 750 /* Since we aren't in D3 any more, it's safe to set this flag
e323de46 751 * even if the controller was dead.
8de98402
BH
752 */
753 set_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
42245e65 754 mb();
8de98402 755
1da177e4 756 spin_lock_irq(&uhci->lock);
1da177e4 757
a8bed8b6
AS
758 /* FIXME: Disable non-PME# remote wakeup? */
759
e323de46
AS
760 /* The firmware or a boot kernel may have changed the controller
761 * settings during a system wakeup. Check it and reconfigure
762 * to avoid problems.
a8bed8b6
AS
763 */
764 check_and_reset_hc(uhci);
e323de46
AS
765
766 /* If the controller was dead before, it's back alive now */
a8bed8b6
AS
767 configure_hc(uhci);
768
1c50c317
AS
769 if (uhci->rh_state == UHCI_RH_RESET) {
770
771 /* The controller had to be reset */
772 usb_root_hub_lost_power(hcd->self.root_hub);
a8bed8b6 773 suspend_rh(uhci, UHCI_RH_SUSPENDED);
1c50c317 774 }
c8f4fe43 775
a8bed8b6 776 spin_unlock_irq(&uhci->lock);
6c1b445c 777
1f09df8b
AS
778 if (!uhci->working_RD) {
779 /* Suspended root hub needs to be polled */
780 hcd->poll_rh = 1;
6c1b445c 781 usb_hcd_poll_rh_status(hcd);
1f09df8b 782 }
1da177e4
LT
783 return 0;
784}
785#endif
786
dccf4a48 787/* Wait until a particular device/endpoint's QH is idle, and free it */
1da177e4 788static void uhci_hcd_endpoint_disable(struct usb_hcd *hcd,
dccf4a48 789 struct usb_host_endpoint *hep)
1da177e4
LT
790{
791 struct uhci_hcd *uhci = hcd_to_uhci(hcd);
dccf4a48
AS
792 struct uhci_qh *qh;
793
794 spin_lock_irq(&uhci->lock);
795 qh = (struct uhci_qh *) hep->hcpriv;
796 if (qh == NULL)
797 goto done;
1da177e4 798
dccf4a48
AS
799 while (qh->state != QH_STATE_IDLE) {
800 ++uhci->num_waiting;
801 spin_unlock_irq(&uhci->lock);
802 wait_event_interruptible(uhci->waitqh,
803 qh->state == QH_STATE_IDLE);
804 spin_lock_irq(&uhci->lock);
805 --uhci->num_waiting;
806 }
807
808 uhci_free_qh(uhci, qh);
809done:
810 spin_unlock_irq(&uhci->lock);
1da177e4
LT
811}
812
813static int uhci_hcd_get_frame_number(struct usb_hcd *hcd)
814{
815 struct uhci_hcd *uhci = hcd_to_uhci(hcd);
c4334726
AS
816 unsigned frame_number;
817 unsigned delta;
1da177e4
LT
818
819 /* Minimize latency by avoiding the spinlock */
c4334726
AS
820 frame_number = uhci->frame_number;
821 barrier();
822 delta = (inw(uhci->io_addr + USBFRNUM) - frame_number) &
823 (UHCI_NUMFRAMES - 1);
824 return frame_number + delta;
1da177e4
LT
825}
826
827static const char hcd_name[] = "uhci_hcd";
828
829static const struct hc_driver uhci_driver = {
830 .description = hcd_name,
831 .product_desc = "UHCI Host Controller",
832 .hcd_priv_size = sizeof(struct uhci_hcd),
833
834 /* Generic hardware linkage */
835 .irq = uhci_irq,
836 .flags = HCD_USB11,
837
838 /* Basic lifecycle operations */
be3cbc5f 839 .reset = uhci_init,
1da177e4
LT
840 .start = uhci_start,
841#ifdef CONFIG_PM
842 .suspend = uhci_suspend,
843 .resume = uhci_resume,
0c0382e3
AS
844 .bus_suspend = uhci_rh_suspend,
845 .bus_resume = uhci_rh_resume,
1da177e4
LT
846#endif
847 .stop = uhci_stop,
848
849 .urb_enqueue = uhci_urb_enqueue,
850 .urb_dequeue = uhci_urb_dequeue,
851
852 .endpoint_disable = uhci_hcd_endpoint_disable,
853 .get_frame_number = uhci_hcd_get_frame_number,
854
855 .hub_status_data = uhci_hub_status_data,
856 .hub_control = uhci_hub_control,
857};
858
859static const struct pci_device_id uhci_pci_ids[] = { {
860 /* handle any USB UHCI controller */
c67808ee 861 PCI_DEVICE_CLASS(PCI_CLASS_SERIAL_USB_UHCI, ~0),
1da177e4
LT
862 .driver_data = (unsigned long) &uhci_driver,
863 }, { /* end: all zeroes */ }
864};
865
866MODULE_DEVICE_TABLE(pci, uhci_pci_ids);
867
868static struct pci_driver uhci_pci_driver = {
869 .name = (char *)hcd_name,
870 .id_table = uhci_pci_ids,
871
872 .probe = usb_hcd_pci_probe,
873 .remove = usb_hcd_pci_remove,
02597d2d 874 .shutdown = uhci_shutdown,
1da177e4
LT
875
876#ifdef CONFIG_PM
877 .suspend = usb_hcd_pci_suspend,
878 .resume = usb_hcd_pci_resume,
879#endif /* PM */
880};
881
882static int __init uhci_hcd_init(void)
883{
884 int retval = -ENOMEM;
885
886 printk(KERN_INFO DRIVER_DESC " " DRIVER_VERSION "\n");
887
888 if (usb_disabled())
889 return -ENODEV;
890
8d402e1a 891 if (DEBUG_CONFIGURED) {
1da177e4
LT
892 errbuf = kmalloc(ERRBUF_LEN, GFP_KERNEL);
893 if (!errbuf)
894 goto errbuf_failed;
8d402e1a
AS
895 uhci_debugfs_root = debugfs_create_dir("uhci", NULL);
896 if (!uhci_debugfs_root)
897 goto debug_failed;
1da177e4
LT
898 }
899
1da177e4
LT
900 uhci_up_cachep = kmem_cache_create("uhci_urb_priv",
901 sizeof(struct urb_priv), 0, 0, NULL, NULL);
902 if (!uhci_up_cachep)
903 goto up_failed;
904
905 retval = pci_register_driver(&uhci_pci_driver);
906 if (retval)
907 goto init_failed;
908
909 return 0;
910
911init_failed:
912 if (kmem_cache_destroy(uhci_up_cachep))
687f5f34 913 warn("not all urb_privs were freed!");
1da177e4
LT
914
915up_failed:
916 debugfs_remove(uhci_debugfs_root);
917
918debug_failed:
1bc3c9e1 919 kfree(errbuf);
1da177e4
LT
920
921errbuf_failed:
922
923 return retval;
924}
925
926static void __exit uhci_hcd_cleanup(void)
927{
928 pci_unregister_driver(&uhci_pci_driver);
929
930 if (kmem_cache_destroy(uhci_up_cachep))
687f5f34 931 warn("not all urb_privs were freed!");
1da177e4
LT
932
933 debugfs_remove(uhci_debugfs_root);
1bc3c9e1 934 kfree(errbuf);
1da177e4
LT
935}
936
937module_init(uhci_hcd_init);
938module_exit(uhci_hcd_cleanup);
939
940MODULE_AUTHOR(DRIVER_AUTHOR);
941MODULE_DESCRIPTION(DRIVER_DESC);
942MODULE_LICENSE("GPL");
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