[deliverable/linux.git] / drivers / usb / host / xhci-pci.c

/*
 * xHCI host controller driver PCI Bus Glue.
 *
 * Copyright (C) 2008 Intel Corp.
 *
 * Author: Sarah Sharp
 * Some code borrowed from the Linux EHCI driver.
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 *
 * This program is distributed in the hope that it will be useful, but
 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
 * or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
 * for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software Foundation,
 * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
 */

#include <linux/pci.h>

#include "xhci.h"

/* Device for a quirk */
#define PCI_VENDOR_ID_FRESCO_LOGIC	0x1b73
#define PCI_DEVICE_ID_FRESCO_LOGIC_PDK	0x1000

static const char hcd_name[] = "xhci_hcd";

/* called after powerup, by probe or system-pm "wakeup" */
static int xhci_pci_reinit(struct xhci_hcd *xhci, struct pci_dev *pdev)
{
	/*
	 * TODO: Implement finding debug ports later.
	 * TODO: see if there are any quirks that need to be added to handle
	 * new extended capabilities.
	 */

	/* PCI Memory-Write-Invalidate cycle support is optional (uncommon) */
	if (!pci_set_mwi(pdev))
		xhci_dbg(xhci, "MWI active\n");

	xhci_dbg(xhci, "Finished xhci_pci_reinit\n");
	return 0;
}

/* called during probe() after chip reset completes */
static int xhci_pci_setup(struct usb_hcd *hcd)
{
	struct xhci_hcd		*xhci;
	struct pci_dev		*pdev = to_pci_dev(hcd->self.controller);
	int			retval;
	u32			temp;

	hcd->self.sg_tablesize = TRBS_PER_SEGMENT - 2;

	if (usb_hcd_is_primary_hcd(hcd)) {
		xhci = kzalloc(sizeof(struct xhci_hcd), GFP_KERNEL);
		if (!xhci)
			return -ENOMEM;
		*((struct xhci_hcd **) hcd->hcd_priv) = xhci;
		xhci->main_hcd = hcd;
		/* Mark the first roothub as being USB 2.0.
		 * The xHCI driver will register the USB 3.0 roothub.
		 */
		hcd->speed = HCD_USB2;
		hcd->self.root_hub->speed = USB_SPEED_HIGH;
		/*
		 * USB 2.0 roothub under xHCI has an integrated TT,
		 * (rate matching hub) as opposed to having an OHCI/UHCI
		 * companion controller.
		 */
		hcd->has_tt = 1;
	} else {
		/* xHCI private pointer was set in xhci_pci_probe for the second
		 * registered roothub.
		 */
		xhci = hcd_to_xhci(hcd);
		temp = xhci_readl(xhci, &xhci->cap_regs->hcc_params);
		if (HCC_64BIT_ADDR(temp)) {
			xhci_dbg(xhci, "Enabling 64-bit DMA addresses.\n");
			dma_set_mask(hcd->self.controller, DMA_BIT_MASK(64));
		} else {
			dma_set_mask(hcd->self.controller, DMA_BIT_MASK(32));
		}
		return 0;
	}

	xhci->cap_regs = hcd->regs;
	xhci->op_regs = hcd->regs +
		HC_LENGTH(xhci_readl(xhci, &xhci->cap_regs->hc_capbase));
	xhci->run_regs = hcd->regs +
		(xhci_readl(xhci, &xhci->cap_regs->run_regs_off) & RTSOFF_MASK);
	/* Cache read-only capability registers */
	xhci->hcs_params1 = xhci_readl(xhci, &xhci->cap_regs->hcs_params1);
	xhci->hcs_params2 = xhci_readl(xhci, &xhci->cap_regs->hcs_params2);
	xhci->hcs_params3 = xhci_readl(xhci, &xhci->cap_regs->hcs_params3);
	xhci->hcc_params = xhci_readl(xhci, &xhci->cap_regs->hc_capbase);
	xhci->hci_version = HC_VERSION(xhci->hcc_params);
	xhci->hcc_params = xhci_readl(xhci, &xhci->cap_regs->hcc_params);
	xhci_print_registers(xhci);

	/* Look for vendor-specific quirks */
	if (pdev->vendor == PCI_VENDOR_ID_FRESCO_LOGIC &&
			pdev->device == PCI_DEVICE_ID_FRESCO_LOGIC_PDK &&
			pdev->revision == 0x0) {
			xhci->quirks |= XHCI_RESET_EP_QUIRK;
			xhci_dbg(xhci, "QUIRK: Fresco Logic xHC needs configure"
					" endpoint cmd after reset endpoint\n");
	}
	if (pdev->vendor == PCI_VENDOR_ID_NEC)
		xhci->quirks |= XHCI_NEC_HOST;

	/* Make sure the HC is halted. */
	retval = xhci_halt(xhci);
	if (retval)
		goto error;

	xhci_dbg(xhci, "Resetting HCD\n");
	/* Reset the internal HC memory state and registers. */
	retval = xhci_reset(xhci);
	if (retval)
		goto error;
	xhci_dbg(xhci, "Reset complete\n");

	temp = xhci_readl(xhci, &xhci->cap_regs->hcc_params);
	if (HCC_64BIT_ADDR(temp)) {
		xhci_dbg(xhci, "Enabling 64-bit DMA addresses.\n");
		dma_set_mask(hcd->self.controller, DMA_BIT_MASK(64));
	} else {
		dma_set_mask(hcd->self.controller, DMA_BIT_MASK(32));
	}

	xhci_dbg(xhci, "Calling HCD init\n");
	/* Initialize HCD and host controller data structures. */
	retval = xhci_init(hcd);
	if (retval)
		goto error;
	xhci_dbg(xhci, "Called HCD init\n");

	pci_read_config_byte(pdev, XHCI_SBRN_OFFSET, &xhci->sbrn);
	xhci_dbg(xhci, "Got SBRN %u\n", (unsigned int) xhci->sbrn);

	/* Find any debug ports */
	retval = xhci_pci_reinit(xhci, pdev);
	if (!retval)
		return retval;

error:
	kfree(xhci);
	return retval;
}

/*
 * We need to register our own PCI probe function (instead of the USB core's
 * function) in order to create a second roothub under xHCI.
 */
static int xhci_pci_probe(struct pci_dev *dev, const struct pci_device_id *id)
{
	int retval;
	struct xhci_hcd *xhci;
	struct hc_driver *driver;
	struct usb_hcd *hcd;

	driver = (struct hc_driver *)id->driver_data;
	/* Register the USB 2.0 roothub.
	 * FIXME: USB core must know to register the USB 2.0 roothub first.
	 * This is sort of silly, because we could just set the HCD driver flags
	 * to say USB 2.0, but I'm not sure what the implications would be in
	 * the other parts of the HCD code.
	 */
	retval = usb_hcd_pci_probe(dev, id);

	if (retval)
		return retval;

	/* USB 2.0 roothub is stored in the PCI device now. */
	hcd = dev_get_drvdata(&dev->dev);
	xhci = hcd_to_xhci(hcd);
	xhci->shared_hcd = usb_create_shared_hcd(driver, &dev->dev,
				pci_name(dev), hcd);
	if (!xhci->shared_hcd) {
		retval = -ENOMEM;
		goto dealloc_usb2_hcd;
	}

	/* Set the xHCI pointer before xhci_pci_setup() (aka hcd_driver.reset)
	 * is called by usb_add_hcd().
	 */
	*((struct xhci_hcd **) xhci->shared_hcd->hcd_priv) = xhci;

	retval = usb_add_hcd(xhci->shared_hcd, dev->irq,
			IRQF_DISABLED | IRQF_SHARED);
	if (retval)
		goto put_usb3_hcd;
	/* Roothub already marked as USB 3.0 speed */
	return 0;

put_usb3_hcd:
	usb_put_hcd(xhci->shared_hcd);
dealloc_usb2_hcd:
	usb_hcd_pci_remove(dev);
	return retval;
}

static void xhci_pci_remove(struct pci_dev *dev)
{
	struct xhci_hcd *xhci;

	xhci = hcd_to_xhci(pci_get_drvdata(dev));
	if (xhci->shared_hcd) {
		usb_remove_hcd(xhci->shared_hcd);
		usb_put_hcd(xhci->shared_hcd);
	}
	usb_hcd_pci_remove(dev);
	kfree(xhci);
}

#ifdef CONFIG_PM
static int xhci_pci_suspend(struct usb_hcd *hcd, bool do_wakeup)
{
	struct xhci_hcd	*xhci = hcd_to_xhci(hcd);
	int	retval = 0;

	if (hcd->state != HC_STATE_SUSPENDED ||
			xhci->shared_hcd->state != HC_STATE_SUSPENDED)
		return -EINVAL;

	retval = xhci_suspend(xhci);

	return retval;
}

static int xhci_pci_resume(struct usb_hcd *hcd, bool hibernated)
{
	struct xhci_hcd		*xhci = hcd_to_xhci(hcd);
	int			retval = 0;

	retval = xhci_resume(xhci, hibernated);
	return retval;
}
#endif /* CONFIG_PM */

static const struct hc_driver xhci_pci_hc_driver = {
	.description =		hcd_name,
	.product_desc =		"xHCI Host Controller",
	.hcd_priv_size =	sizeof(struct xhci_hcd *),

	/*
	 * generic hardware linkage
	 */
	.irq =			xhci_irq,
	.flags =		HCD_MEMORY | HCD_USB3 | HCD_SHARED,

	/*
	 * basic lifecycle operations
	 */
	.reset =		xhci_pci_setup,
	.start =		xhci_run,
#ifdef CONFIG_PM
	.pci_suspend =          xhci_pci_suspend,
	.pci_resume =           xhci_pci_resume,
#endif
	.stop =			xhci_stop,
	.shutdown =		xhci_shutdown,

	/*
	 * managing i/o requests and associated device resources
	 */
	.urb_enqueue =		xhci_urb_enqueue,
	.urb_dequeue =		xhci_urb_dequeue,
	.alloc_dev =		xhci_alloc_dev,
	.free_dev =		xhci_free_dev,
	.alloc_streams =	xhci_alloc_streams,
	.free_streams =		xhci_free_streams,
	.add_endpoint =		xhci_add_endpoint,
	.drop_endpoint =	xhci_drop_endpoint,
	.endpoint_reset =	xhci_endpoint_reset,
	.check_bandwidth =	xhci_check_bandwidth,
	.reset_bandwidth =	xhci_reset_bandwidth,
	.address_device =	xhci_address_device,
	.update_hub_device =	xhci_update_hub_device,
	.reset_device =		xhci_discover_or_reset_device,

	/*
	 * scheduling support
	 */
	.get_frame_number =	xhci_get_frame,

	/* Root hub support */
	.hub_control =		xhci_hub_control,
	.hub_status_data =	xhci_hub_status_data,
	.bus_suspend =		xhci_bus_suspend,
	.bus_resume =		xhci_bus_resume,
};

/*-------------------------------------------------------------------------*/

/* PCI driver selection metadata; PCI hotplugging uses this */
static const struct pci_device_id pci_ids[] = { {
	/* handle any USB 3.0 xHCI controller */
	PCI_DEVICE_CLASS(PCI_CLASS_SERIAL_USB_XHCI, ~0),
	.driver_data =	(unsigned long) &xhci_pci_hc_driver,
	},
	{ /* end: all zeroes */ }
};
MODULE_DEVICE_TABLE(pci, pci_ids);

/* pci driver glue; this is a "new style" PCI driver module */
static struct pci_driver xhci_pci_driver = {
	.name =		(char *) hcd_name,
	.id_table =	pci_ids,

	.probe =	xhci_pci_probe,
	.remove =	xhci_pci_remove,
	/* suspend and resume implemented later */

	.shutdown = 	usb_hcd_pci_shutdown,
#ifdef CONFIG_PM_SLEEP
	.driver = {
		.pm = &usb_hcd_pci_pm_ops
	},
#endif
};

int xhci_register_pci(void)
{
	return pci_register_driver(&xhci_pci_driver);
}

void xhci_unregister_pci(void)
{
	pci_unregister_driver(&xhci_pci_driver);
}
Commit	Line	Data
66d4eadd SS	1	/*
	2	* xHCI host controller driver PCI Bus Glue.
	3	*
	4	* Copyright (C) 2008 Intel Corp.
	5	*
	6	* Author: Sarah Sharp
	7	* Some code borrowed from the Linux EHCI driver.
	8	*
	9	* This program is free software; you can redistribute it and/or modify
	10	* it under the terms of the GNU General Public License version 2 as
	11	* published by the Free Software Foundation.
	12	*
	13	* This program is distributed in the hope that it will be useful, but
	14	* WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
	15	* or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
	16	* for more details.
	17	*
	18	* You should have received a copy of the GNU General Public License
	19	* along with this program; if not, write to the Free Software Foundation,
	20	* Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
	21	*/
	22
	23	#include <linux/pci.h>
	24
	25	#include "xhci.h"
	26
ac9d8fe7 SS	27	/* Device for a quirk */
	28	#define PCI_VENDOR_ID_FRESCO_LOGIC 0x1b73
	29	#define PCI_DEVICE_ID_FRESCO_LOGIC_PDK 0x1000
	30
66d4eadd SS	31	static const char hcd_name[] = "xhci_hcd";
	32
	33	/* called after powerup, by probe or system-pm "wakeup" */
	34	static int xhci_pci_reinit(struct xhci_hcd xhci, struct pci_dev pdev)
	35	{
	36	/*
	37	* TODO: Implement finding debug ports later.
	38	* TODO: see if there are any quirks that need to be added to handle
	39	* new extended capabilities.
	40	*/
	41
	42	/* PCI Memory-Write-Invalidate cycle support is optional (uncommon) */
	43	if (!pci_set_mwi(pdev))
	44	xhci_dbg(xhci, "MWI active\n");
	45
	46	xhci_dbg(xhci, "Finished xhci_pci_reinit\n");
	47	return 0;
	48	}
	49
	50	/* called during probe() after chip reset completes */
	51	static int xhci_pci_setup(struct usb_hcd *hcd)
	52	{
f6ff0ac8	53	struct xhci_hcd *xhci;
66d4eadd SS	54	struct pci_dev *pdev = to_pci_dev(hcd->self.controller);
66d4eadd SS	55	int retval;
006d5820	56	u32 temp;
66d4eadd	57
bc88d2eb	58	hcd->self.sg_tablesize = TRBS_PER_SEGMENT - 2;
4c1bd3d7	59
f6ff0ac8 SS	60	if (usb_hcd_is_primary_hcd(hcd)) {
	61	xhci = kzalloc(sizeof(struct xhci_hcd), GFP_KERNEL);
	62	if (!xhci)
	63	return -ENOMEM;
	64	((struct xhci_hcd *) hcd->hcd_priv) = xhci;
	65	xhci->main_hcd = hcd;
	66	/* Mark the first roothub as being USB 2.0.
	67	* The xHCI driver will register the USB 3.0 roothub.
	68	*/
	69	hcd->speed = HCD_USB2;
	70	hcd->self.root_hub->speed = USB_SPEED_HIGH;
	71	/*
	72	* USB 2.0 roothub under xHCI has an integrated TT,
	73	* (rate matching hub) as opposed to having an OHCI/UHCI
	74	* companion controller.
	75	*/
	76	hcd->has_tt = 1;
	77	} else {
	78	/* xHCI private pointer was set in xhci_pci_probe for the second
	79	* registered roothub.
	80	*/
	81	xhci = hcd_to_xhci(hcd);
	82	temp = xhci_readl(xhci, &xhci->cap_regs->hcc_params);
	83	if (HCC_64BIT_ADDR(temp)) {
	84	xhci_dbg(xhci, "Enabling 64-bit DMA addresses.\n");
	85	dma_set_mask(hcd->self.controller, DMA_BIT_MASK(64));
	86	} else {
	87	dma_set_mask(hcd->self.controller, DMA_BIT_MASK(32));
	88	}
	89	return 0;
	90	}
b02d0ed6	91
66d4eadd SS	92	xhci->cap_regs = hcd->regs;
	93	xhci->op_regs = hcd->regs +
	94	HC_LENGTH(xhci_readl(xhci, &xhci->cap_regs->hc_capbase));
	95	xhci->run_regs = hcd->regs +
	96	(xhci_readl(xhci, &xhci->cap_regs->run_regs_off) & RTSOFF_MASK);
	97	/* Cache read-only capability registers */
	98	xhci->hcs_params1 = xhci_readl(xhci, &xhci->cap_regs->hcs_params1);
	99	xhci->hcs_params2 = xhci_readl(xhci, &xhci->cap_regs->hcs_params2);
	100	xhci->hcs_params3 = xhci_readl(xhci, &xhci->cap_regs->hcs_params3);
ac1c1b7f SS	101	xhci->hcc_params = xhci_readl(xhci, &xhci->cap_regs->hc_capbase);
ac1c1b7f SS	102	xhci->hci_version = HC_VERSION(xhci->hcc_params);
66d4eadd SS	103	xhci->hcc_params = xhci_readl(xhci, &xhci->cap_regs->hcc_params);
	104	xhci_print_registers(xhci);
	105
ac9d8fe7 SS	106	/* Look for vendor-specific quirks */
	107	if (pdev->vendor == PCI_VENDOR_ID_FRESCO_LOGIC &&
	108	pdev->device == PCI_DEVICE_ID_FRESCO_LOGIC_PDK &&
	109	pdev->revision == 0x0) {
	110	xhci->quirks \|= XHCI_RESET_EP_QUIRK;
	111	xhci_dbg(xhci, "QUIRK: Fresco Logic xHC needs configure"
	112	" endpoint cmd after reset endpoint\n");
	113	}
0238634d SS	114	if (pdev->vendor == PCI_VENDOR_ID_NEC)
0238634d SS	115	xhci->quirks \|= XHCI_NEC_HOST;
ac9d8fe7	116
66d4eadd SS	117	/* Make sure the HC is halted. */
	118	retval = xhci_halt(xhci);
	119	if (retval)
b02d0ed6	120	goto error;
66d4eadd SS	121
	122	xhci_dbg(xhci, "Resetting HCD\n");
	123	/* Reset the internal HC memory state and registers. */
	124	retval = xhci_reset(xhci);
	125	if (retval)
b02d0ed6	126	goto error;
66d4eadd SS	127	xhci_dbg(xhci, "Reset complete\n");
66d4eadd SS	128
006d5820 SS	129	temp = xhci_readl(xhci, &xhci->cap_regs->hcc_params);
	130	if (HCC_64BIT_ADDR(temp)) {
	131	xhci_dbg(xhci, "Enabling 64-bit DMA addresses.\n");
	132	dma_set_mask(hcd->self.controller, DMA_BIT_MASK(64));
	133	} else {
	134	dma_set_mask(hcd->self.controller, DMA_BIT_MASK(32));
	135	}
	136
66d4eadd SS	137	xhci_dbg(xhci, "Calling HCD init\n");
	138	/* Initialize HCD and host controller data structures. */
	139	retval = xhci_init(hcd);
	140	if (retval)
b02d0ed6	141	goto error;
66d4eadd SS	142	xhci_dbg(xhci, "Called HCD init\n");
	143
	144	pci_read_config_byte(pdev, XHCI_SBRN_OFFSET, &xhci->sbrn);
	145	xhci_dbg(xhci, "Got SBRN %u\n", (unsigned int) xhci->sbrn);
	146
	147	/* Find any debug ports */
b02d0ed6 SS	148	retval = xhci_pci_reinit(xhci, pdev);
	149	if (!retval)
	150	return retval;
	151
	152	error:
	153	kfree(xhci);
	154	return retval;
	155	}
	156
f6ff0ac8 SS	157	/*
	158	* We need to register our own PCI probe function (instead of the USB core's
	159	* function) in order to create a second roothub under xHCI.
	160	*/
	161	static int xhci_pci_probe(struct pci_dev dev, const struct pci_device_id id)
	162	{
	163	int retval;
	164	struct xhci_hcd *xhci;
	165	struct hc_driver *driver;
	166	struct usb_hcd *hcd;
	167
	168	driver = (struct hc_driver *)id->driver_data;
	169	/* Register the USB 2.0 roothub.
	170	* FIXME: USB core must know to register the USB 2.0 roothub first.
	171	* This is sort of silly, because we could just set the HCD driver flags
	172	* to say USB 2.0, but I'm not sure what the implications would be in
	173	* the other parts of the HCD code.
	174	*/
	175	retval = usb_hcd_pci_probe(dev, id);
	176
	177	if (retval)
	178	return retval;
	179
	180	/* USB 2.0 roothub is stored in the PCI device now. */
	181	hcd = dev_get_drvdata(&dev->dev);
	182	xhci = hcd_to_xhci(hcd);
	183	xhci->shared_hcd = usb_create_shared_hcd(driver, &dev->dev,
	184	pci_name(dev), hcd);
	185	if (!xhci->shared_hcd) {
	186	retval = -ENOMEM;
	187	goto dealloc_usb2_hcd;
	188	}
	189
	190	/* Set the xHCI pointer before xhci_pci_setup() (aka hcd_driver.reset)
	191	* is called by usb_add_hcd().
	192	*/
	193	((struct xhci_hcd *) xhci->shared_hcd->hcd_priv) = xhci;
	194
	195	retval = usb_add_hcd(xhci->shared_hcd, dev->irq,
	196	IRQF_DISABLED \| IRQF_SHARED);
	197	if (retval)
	198	goto put_usb3_hcd;
	199	/* Roothub already marked as USB 3.0 speed */
	200	return 0;
	201
	202	put_usb3_hcd:
	203	usb_put_hcd(xhci->shared_hcd);
	204	dealloc_usb2_hcd:
	205	usb_hcd_pci_remove(dev);
	206	return retval;
	207	}
	208
b02d0ed6 SS	209	static void xhci_pci_remove(struct pci_dev *dev)
	210	{
	211	struct xhci_hcd *xhci;
	212
	213	xhci = hcd_to_xhci(pci_get_drvdata(dev));
f6ff0ac8 SS	214	if (xhci->shared_hcd) {
	215	usb_remove_hcd(xhci->shared_hcd);
	216	usb_put_hcd(xhci->shared_hcd);
	217	}
b02d0ed6 SS	218	usb_hcd_pci_remove(dev);
b02d0ed6 SS	219	kfree(xhci);
66d4eadd SS	220	}
66d4eadd SS	221
5535b1d5 AX	222	#ifdef CONFIG_PM
	223	static int xhci_pci_suspend(struct usb_hcd *hcd, bool do_wakeup)
	224	{
	225	struct xhci_hcd *xhci = hcd_to_xhci(hcd);
	226	int retval = 0;
	227
b3209379 SS	228	if (hcd->state != HC_STATE_SUSPENDED \|\|
b3209379 SS	229	xhci->shared_hcd->state != HC_STATE_SUSPENDED)
5535b1d5 AX	230	return -EINVAL;
	231
	232	retval = xhci_suspend(xhci);
	233
	234	return retval;
	235	}
	236
	237	static int xhci_pci_resume(struct usb_hcd *hcd, bool hibernated)
	238	{
	239	struct xhci_hcd *xhci = hcd_to_xhci(hcd);
	240	int retval = 0;
	241
	242	retval = xhci_resume(xhci, hibernated);
	243	return retval;
	244	}
	245	#endif /* CONFIG_PM */
	246
66d4eadd SS	247	static const struct hc_driver xhci_pci_hc_driver = {
	248	.description = hcd_name,
	249	.product_desc = "xHCI Host Controller",
b02d0ed6	250	.hcd_priv_size = sizeof(struct xhci_hcd *),
66d4eadd SS	251
	252	/*
	253	* generic hardware linkage
	254	*/
7f84eef0	255	.irq = xhci_irq,
f6ff0ac8	256	.flags = HCD_MEMORY \| HCD_USB3 \| HCD_SHARED,
66d4eadd SS	257
	258	/*
	259	* basic lifecycle operations
	260	*/
	261	.reset = xhci_pci_setup,
	262	.start = xhci_run,
5535b1d5 AX	263	#ifdef CONFIG_PM
	264	.pci_suspend = xhci_pci_suspend,
	265	.pci_resume = xhci_pci_resume,
	266	#endif
66d4eadd SS	267	.stop = xhci_stop,
	268	.shutdown = xhci_shutdown,
	269
3ffbba95 SS	270	/*
	271	* managing i/o requests and associated device resources
	272	*/
d0e96f5a SS	273	.urb_enqueue = xhci_urb_enqueue,
d0e96f5a SS	274	.urb_dequeue = xhci_urb_dequeue,
3ffbba95 SS	275	.alloc_dev = xhci_alloc_dev,
3ffbba95 SS	276	.free_dev = xhci_free_dev,
eab1cafc SS	277	.alloc_streams = xhci_alloc_streams,
eab1cafc SS	278	.free_streams = xhci_free_streams,
f94e0186 SS	279	.add_endpoint = xhci_add_endpoint,
f94e0186 SS	280	.drop_endpoint = xhci_drop_endpoint,
a1587d97	281	.endpoint_reset = xhci_endpoint_reset,
f94e0186 SS	282	.check_bandwidth = xhci_check_bandwidth,
f94e0186 SS	283	.reset_bandwidth = xhci_reset_bandwidth,
3ffbba95	284	.address_device = xhci_address_device,
b356b7c7	285	.update_hub_device = xhci_update_hub_device,
f0615c45	286	.reset_device = xhci_discover_or_reset_device,
3ffbba95	287
66d4eadd SS	288	/*
	289	* scheduling support
	290	*/
	291	.get_frame_number = xhci_get_frame,
	292
0f2a7930 SS	293	/* Root hub support */
	294	.hub_control = xhci_hub_control,
	295	.hub_status_data = xhci_hub_status_data,
9777e3ce AX	296	.bus_suspend = xhci_bus_suspend,
9777e3ce AX	297	.bus_resume = xhci_bus_resume,
66d4eadd SS	298	};
	299
	300	/-------------------------------------------------------------------------/
	301
	302	/* PCI driver selection metadata; PCI hotplugging uses this */
	303	static const struct pci_device_id pci_ids[] = { {
	304	/* handle any USB 3.0 xHCI controller */
	305	PCI_DEVICE_CLASS(PCI_CLASS_SERIAL_USB_XHCI, ~0),
	306	.driver_data = (unsigned long) &xhci_pci_hc_driver,
	307	},
	308	{ /* end: all zeroes */ }
	309	};
	310	MODULE_DEVICE_TABLE(pci, pci_ids);
	311
	312	/* pci driver glue; this is a "new style" PCI driver module */
	313	static struct pci_driver xhci_pci_driver = {
	314	.name = (char *) hcd_name,
	315	.id_table = pci_ids,
	316
f6ff0ac8	317	.probe = xhci_pci_probe,
b02d0ed6	318	.remove = xhci_pci_remove,
66d4eadd SS	319	/* suspend and resume implemented later */
	320
	321	.shutdown = usb_hcd_pci_shutdown,
5535b1d5 AX	322	#ifdef CONFIG_PM_SLEEP
	323	.driver = {
	324	.pm = &usb_hcd_pci_pm_ops
	325	},
	326	#endif
66d4eadd SS	327	};
66d4eadd SS	328
326b4810	329	int xhci_register_pci(void)
66d4eadd SS	330	{
	331	return pci_register_driver(&xhci_pci_driver);
	332	}
	333
326b4810	334	void xhci_unregister_pci(void)
66d4eadd SS	335	{
	336	pci_unregister_driver(&xhci_pci_driver);
	337	}