[deliverable/linux.git] / drivers / usb / musb / musb_core.h

/*
 * MUSB OTG driver defines
 *
 * Copyright 2005 Mentor Graphics Corporation
 * Copyright (C) 2005-2006 by Texas Instruments
 * Copyright (C) 2006-2007 Nokia Corporation
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License
 * version 2 as published by the Free Software Foundation.
 *
 * This program is distributed in the hope that it will be useful, but
 * WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
 * General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
 * 02110-1301 USA
 *
 * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED
 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN
 * NO EVENT SHALL THE AUTHORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 *
 */

#ifndef __MUSB_CORE_H__
#define __MUSB_CORE_H__

#include <linux/slab.h>
#include <linux/list.h>
#include <linux/interrupt.h>
#include <linux/errno.h>
#include <linux/timer.h>
#include <linux/device.h>
#include <linux/usb/ch9.h>
#include <linux/usb/gadget.h>
#include <linux/usb.h>
#include <linux/usb/otg.h>
#include <linux/usb/musb.h>

struct musb;
struct musb_hw_ep;
struct musb_ep;

/* Helper defines for struct musb->hwvers */
#define MUSB_HWVERS_MAJOR(x)	((x >> 10) & 0x1f)
#define MUSB_HWVERS_MINOR(x)	(x & 0x3ff)
#define MUSB_HWVERS_RC		0x8000
#define MUSB_HWVERS_1300	0x52C
#define MUSB_HWVERS_1400	0x590
#define MUSB_HWVERS_1800	0x720
#define MUSB_HWVERS_1900	0x784
#define MUSB_HWVERS_2000	0x800

#include "musb_debug.h"
#include "musb_dma.h"

#include "musb_io.h"
#include "musb_regs.h"

#include "musb_gadget.h"
#include <linux/usb/hcd.h>
#include "musb_host.h"

/* NOTE:  otg and peripheral-only state machines start at B_IDLE.
 * OTG or host-only go to A_IDLE when ID is sensed.
 */
#define is_peripheral_active(m)		(!(m)->is_host)
#define is_host_active(m)		((m)->is_host)

#ifdef CONFIG_PROC_FS
#include <linux/fs.h>
#define MUSB_CONFIG_PROC_FS
#endif

/****************************** CONSTANTS ********************************/

#ifndef MUSB_C_NUM_EPS
#define MUSB_C_NUM_EPS ((u8)16)
#endif

#ifndef MUSB_MAX_END0_PACKET
#define MUSB_MAX_END0_PACKET ((u16)MUSB_EP0_FIFOSIZE)
#endif

/* host side ep0 states */
enum musb_h_ep0_state {
	MUSB_EP0_IDLE,
	MUSB_EP0_START,			/* expect ack of setup */
	MUSB_EP0_IN,			/* expect IN DATA */
	MUSB_EP0_OUT,			/* expect ack of OUT DATA */
	MUSB_EP0_STATUS,		/* expect ack of STATUS */
} __attribute__ ((packed));

/* peripheral side ep0 states */
enum musb_g_ep0_state {
	MUSB_EP0_STAGE_IDLE,		/* idle, waiting for SETUP */
	MUSB_EP0_STAGE_SETUP,		/* received SETUP */
	MUSB_EP0_STAGE_TX,		/* IN data */
	MUSB_EP0_STAGE_RX,		/* OUT data */
	MUSB_EP0_STAGE_STATUSIN,	/* (after OUT data) */
	MUSB_EP0_STAGE_STATUSOUT,	/* (after IN data) */
	MUSB_EP0_STAGE_ACKWAIT,		/* after zlp, before statusin */
} __attribute__ ((packed));

/*
 * OTG protocol constants.  See USB OTG 1.3 spec,
 * sections 5.5 "Device Timings" and 6.6.5 "Timers".
 */
#define OTG_TIME_A_WAIT_VRISE	100		/* msec (max) */
#define OTG_TIME_A_WAIT_BCON	1100		/* min 1 second */
#define OTG_TIME_A_AIDL_BDIS	200		/* min 200 msec */
#define OTG_TIME_B_ASE0_BRST	100		/* min 3.125 ms */


/*************************** REGISTER ACCESS ********************************/

/* Endpoint registers (other than dynfifo setup) can be accessed either
 * directly with the "flat" model, or after setting up an index register.
 */

#if defined(CONFIG_ARCH_DAVINCI) || defined(CONFIG_SOC_OMAP2430) \
		|| defined(CONFIG_SOC_OMAP3430) || defined(CONFIG_BLACKFIN) \
		|| defined(CONFIG_ARCH_OMAP4)
/* REVISIT indexed access seemed to
 * misbehave (on DaVinci) for at least peripheral IN ...
 */
#define	MUSB_FLAT_REG
#endif

/* TUSB mapping: "flat" plus ep0 special cases */
#if defined(CONFIG_USB_MUSB_TUSB6010) || \
	defined(CONFIG_USB_MUSB_TUSB6010_MODULE)
#define musb_ep_select(_mbase, _epnum) \
	musb_writeb((_mbase), MUSB_INDEX, (_epnum))
#define	MUSB_EP_OFFSET			MUSB_TUSB_OFFSET

/* "flat" mapping: each endpoint has its own i/o address */
#elif	defined(MUSB_FLAT_REG)
#define musb_ep_select(_mbase, _epnum)	(((void)(_mbase)), ((void)(_epnum)))
#define	MUSB_EP_OFFSET			MUSB_FLAT_OFFSET

/* "indexed" mapping: INDEX register controls register bank select */
#else
#define musb_ep_select(_mbase, _epnum) \
	musb_writeb((_mbase), MUSB_INDEX, (_epnum))
#define	MUSB_EP_OFFSET			MUSB_INDEXED_OFFSET
#endif

/****************************** FUNCTIONS ********************************/

#define MUSB_HST_MODE(_musb)\
	{ (_musb)->is_host = true; }
#define MUSB_DEV_MODE(_musb) \
	{ (_musb)->is_host = false; }

#define test_devctl_hst_mode(_x) \
	(musb_readb((_x)->mregs, MUSB_DEVCTL)&MUSB_DEVCTL_HM)

#define MUSB_MODE(musb) ((musb)->is_host ? "Host" : "Peripheral")

/******************************** TYPES *************************************/

/**
 * struct musb_platform_ops - Operations passed to musb_core by HW glue layer
 * @init:	turns on clocks, sets up platform-specific registers, etc
 * @exit:	undoes @init
 * @set_mode:	forcefully changes operating mode
 * @try_ilde:	tries to idle the IP
 * @vbus_status: returns vbus status if possible
 * @set_vbus:	forces vbus status
 * @adjust_channel_params: pre check for standard dma channel_program func
 */
struct musb_platform_ops {
	int	(*init)(struct musb *musb);
	int	(*exit)(struct musb *musb);

	void	(*enable)(struct musb *musb);
	void	(*disable)(struct musb *musb);

	int	(*set_mode)(struct musb *musb, u8 mode);
	void	(*try_idle)(struct musb *musb, unsigned long timeout);

	int	(*vbus_status)(struct musb *musb);
	void	(*set_vbus)(struct musb *musb, int on);

	int	(*adjust_channel_params)(struct dma_channel *channel,
				u16 packet_sz, u8 *mode,
				dma_addr_t *dma_addr, u32 *len);
};

/*
 * struct musb_hw_ep - endpoint hardware (bidirectional)
 *
 * Ordered slightly for better cacheline locality.
 */
struct musb_hw_ep {
	struct musb		*musb;
	void __iomem		*fifo;
	void __iomem		*regs;

#if defined(CONFIG_USB_MUSB_TUSB6010) || \
	defined(CONFIG_USB_MUSB_TUSB6010_MODULE)
	void __iomem		*conf;
#endif

	/* index in musb->endpoints[]  */
	u8			epnum;

	/* hardware configuration, possibly dynamic */
	bool			is_shared_fifo;
	bool			tx_double_buffered;
	bool			rx_double_buffered;
	u16			max_packet_sz_tx;
	u16			max_packet_sz_rx;

	struct dma_channel	*tx_channel;
	struct dma_channel	*rx_channel;

#if defined(CONFIG_USB_MUSB_TUSB6010) || \
	defined(CONFIG_USB_MUSB_TUSB6010_MODULE)
	/* TUSB has "asynchronous" and "synchronous" dma modes */
	dma_addr_t		fifo_async;
	dma_addr_t		fifo_sync;
	void __iomem		*fifo_sync_va;
#endif

	void __iomem		*target_regs;

	/* currently scheduled peripheral endpoint */
	struct musb_qh		*in_qh;
	struct musb_qh		*out_qh;

	u8			rx_reinit;
	u8			tx_reinit;

	/* peripheral side */
	struct musb_ep		ep_in;			/* TX */
	struct musb_ep		ep_out;			/* RX */
};

static inline struct musb_request *next_in_request(struct musb_hw_ep *hw_ep)
{
	return next_request(&hw_ep->ep_in);
}

static inline struct musb_request *next_out_request(struct musb_hw_ep *hw_ep)
{
	return next_request(&hw_ep->ep_out);
}

struct musb_csr_regs {
	/* FIFO registers */
	u16 txmaxp, txcsr, rxmaxp, rxcsr;
	u16 rxfifoadd, txfifoadd;
	u8 txtype, txinterval, rxtype, rxinterval;
	u8 rxfifosz, txfifosz;
	u8 txfunaddr, txhubaddr, txhubport;
	u8 rxfunaddr, rxhubaddr, rxhubport;
};

struct musb_context_registers {

	u8 power;
	u8 intrusbe;
	u16 frame;
	u8 index, testmode;

	u8 devctl, busctl, misc;
	u32 otg_interfsel;

	struct musb_csr_regs index_regs[MUSB_C_NUM_EPS];
};

/*
 * struct musb - Driver instance data.
 */
struct musb {
	/* device lock */
	spinlock_t		lock;

	const struct musb_platform_ops *ops;
	struct musb_context_registers context;

	irqreturn_t		(*isr)(int, void *);
	struct work_struct	irq_work;
	u16			hwvers;

	u16			intrrxe;
	u16			intrtxe;
/* this hub status bit is reserved by USB 2.0 and not seen by usbcore */
#define MUSB_PORT_STAT_RESUME	(1 << 31)

	u32			port1_status;

	unsigned long		rh_timer;

	enum musb_h_ep0_state	ep0_stage;

	/* bulk traffic normally dedicates endpoint hardware, and each
	 * direction has its own ring of host side endpoints.
	 * we try to progress the transfer at the head of each endpoint's
	 * queue until it completes or NAKs too much; then we try the next
	 * endpoint.
	 */
	struct musb_hw_ep	*bulk_ep;

	struct list_head	control;	/* of musb_qh */
	struct list_head	in_bulk;	/* of musb_qh */
	struct list_head	out_bulk;	/* of musb_qh */

	struct timer_list	otg_timer;
	struct notifier_block	nb;

	struct dma_controller	*dma_controller;

	struct device		*controller;
	void __iomem		*ctrl_base;
	void __iomem		*mregs;

#if defined(CONFIG_USB_MUSB_TUSB6010) || \
	defined(CONFIG_USB_MUSB_TUSB6010_MODULE)
	dma_addr_t		async;
	dma_addr_t		sync;
	void __iomem		*sync_va;
#endif

	/* passed down from chip/board specific irq handlers */
	u8			int_usb;
	u16			int_rx;
	u16			int_tx;

	struct usb_phy		*xceiv;

	int nIrq;
	unsigned		irq_wake:1;

	struct musb_hw_ep	 endpoints[MUSB_C_NUM_EPS];
#define control_ep		endpoints

#define VBUSERR_RETRY_COUNT	3
	u16			vbuserr_retry;
	u16 epmask;
	u8 nr_endpoints;

	int			(*board_set_power)(int state);

	u8			min_power;	/* vbus for periph, in mA/2 */

	bool			is_host;

	int			a_wait_bcon;	/* VBUS timeout in msecs */
	unsigned long		idle_timeout;	/* Next timeout in jiffies */

	/* active means connected and not suspended */
	unsigned		is_active:1;

	unsigned is_multipoint:1;

	unsigned		hb_iso_rx:1;	/* high bandwidth iso rx? */
	unsigned		hb_iso_tx:1;	/* high bandwidth iso tx? */
	unsigned		dyn_fifo:1;	/* dynamic FIFO supported? */

	unsigned		bulk_split:1;
#define	can_bulk_split(musb,type) \
	(((type) == USB_ENDPOINT_XFER_BULK) && (musb)->bulk_split)

	unsigned		bulk_combine:1;
#define	can_bulk_combine(musb,type) \
	(((type) == USB_ENDPOINT_XFER_BULK) && (musb)->bulk_combine)

	/* is_suspended means USB B_PERIPHERAL suspend */
	unsigned		is_suspended:1;

	/* may_wakeup means remote wakeup is enabled */
	unsigned		may_wakeup:1;

	/* is_self_powered is reported in device status and the
	 * config descriptor.  is_bus_powered means B_PERIPHERAL
	 * draws some VBUS current; both can be true.
	 */
	unsigned		is_self_powered:1;
	unsigned		is_bus_powered:1;

	unsigned		set_address:1;
	unsigned		test_mode:1;
	unsigned		softconnect:1;

	u8			address;
	u8			test_mode_nr;
	u16			ackpend;		/* ep0 */
	enum musb_g_ep0_state	ep0_state;
	struct usb_gadget	g;			/* the gadget */
	struct usb_gadget_driver *gadget_driver;	/* its driver */
	struct usb_hcd		*hcd;			/* the usb hcd */

	/*
	 * FIXME: Remove this flag.
	 *
	 * This is only added to allow Blackfin to work
	 * with current driver. For some unknown reason
	 * Blackfin doesn't work with double buffering
	 * and that's enabled by default.
	 *
	 * We added this flag to forcefully disable double
	 * buffering until we get it working.
	 */
	unsigned                double_buffer_not_ok:1;

	struct musb_hdrc_config	*config;

#ifdef MUSB_CONFIG_PROC_FS
	struct proc_dir_entry *proc_entry;
#endif
	int			xceiv_old_state;
#ifdef CONFIG_DEBUG_FS
	struct dentry		*debugfs_root;
#endif
};

static inline struct musb *gadget_to_musb(struct usb_gadget *g)
{
	return container_of(g, struct musb, g);
}

#ifdef CONFIG_BLACKFIN
static inline int musb_read_fifosize(struct musb *musb,
		struct musb_hw_ep *hw_ep, u8 epnum)
{
	musb->nr_endpoints++;
	musb->epmask |= (1 << epnum);

	if (epnum < 5) {
		hw_ep->max_packet_sz_tx = 128;
		hw_ep->max_packet_sz_rx = 128;
	} else {
		hw_ep->max_packet_sz_tx = 1024;
		hw_ep->max_packet_sz_rx = 1024;
	}
	hw_ep->is_shared_fifo = false;

	return 0;
}

static inline void musb_configure_ep0(struct musb *musb)
{
	musb->endpoints[0].max_packet_sz_tx = MUSB_EP0_FIFOSIZE;
	musb->endpoints[0].max_packet_sz_rx = MUSB_EP0_FIFOSIZE;
	musb->endpoints[0].is_shared_fifo = true;
}

#else

static inline int musb_read_fifosize(struct musb *musb,
		struct musb_hw_ep *hw_ep, u8 epnum)
{
	void __iomem *mbase = musb->mregs;
	u8 reg = 0;

	/* read from core using indexed model */
	reg = musb_readb(mbase, MUSB_EP_OFFSET(epnum, MUSB_FIFOSIZE));
	/* 0's returned when no more endpoints */
	if (!reg)
		return -ENODEV;

	musb->nr_endpoints++;
	musb->epmask |= (1 << epnum);

	hw_ep->max_packet_sz_tx = 1 << (reg & 0x0f);

	/* shared TX/RX FIFO? */
	if ((reg & 0xf0) == 0xf0) {
		hw_ep->max_packet_sz_rx = hw_ep->max_packet_sz_tx;
		hw_ep->is_shared_fifo = true;
		return 0;
	} else {
		hw_ep->max_packet_sz_rx = 1 << ((reg & 0xf0) >> 4);
		hw_ep->is_shared_fifo = false;
	}

	return 0;
}

static inline void musb_configure_ep0(struct musb *musb)
{
	musb->endpoints[0].max_packet_sz_tx = MUSB_EP0_FIFOSIZE;
	musb->endpoints[0].max_packet_sz_rx = MUSB_EP0_FIFOSIZE;
	musb->endpoints[0].is_shared_fifo = true;
}
#endif /* CONFIG_BLACKFIN */


/***************************** Glue it together *****************************/

extern const char musb_driver_name[];

extern void musb_stop(struct musb *musb);

extern void musb_write_fifo(struct musb_hw_ep *ep, u16 len, const u8 *src);
extern void musb_read_fifo(struct musb_hw_ep *ep, u16 len, u8 *dst);

extern void musb_load_testpacket(struct musb *);

extern irqreturn_t musb_interrupt(struct musb *);

extern void musb_hnp_stop(struct musb *musb);

static inline void musb_platform_set_vbus(struct musb *musb, int is_on)
{
	if (musb->ops->set_vbus)
		musb->ops->set_vbus(musb, is_on);
}

static inline void musb_platform_enable(struct musb *musb)
{
	if (musb->ops->enable)
		musb->ops->enable(musb);
}

static inline void musb_platform_disable(struct musb *musb)
{
	if (musb->ops->disable)
		musb->ops->disable(musb);
}

static inline int musb_platform_set_mode(struct musb *musb, u8 mode)
{
	if (!musb->ops->set_mode)
		return 0;

	return musb->ops->set_mode(musb, mode);
}

static inline void musb_platform_try_idle(struct musb *musb,
		unsigned long timeout)
{
	if (musb->ops->try_idle)
		musb->ops->try_idle(musb, timeout);
}

static inline int musb_platform_get_vbus_status(struct musb *musb)
{
	if (!musb->ops->vbus_status)
		return 0;

	return musb->ops->vbus_status(musb);
}

static inline int musb_platform_init(struct musb *musb)
{
	if (!musb->ops->init)
		return -EINVAL;

	return musb->ops->init(musb);
}

static inline int musb_platform_exit(struct musb *musb)
{
	if (!musb->ops->exit)
		return -EINVAL;

	return musb->ops->exit(musb);
}

#endif	/* __MUSB_CORE_H__ */
Commit	Line	Data
550a7375 FB	1	/*
	2	* MUSB OTG driver defines
	3	*
	4	* Copyright 2005 Mentor Graphics Corporation
	5	* Copyright (C) 2005-2006 by Texas Instruments
	6	* Copyright (C) 2006-2007 Nokia Corporation
	7	*
	8	* This program is free software; you can redistribute it and/or
	9	* modify it under the terms of the GNU General Public License
	10	* version 2 as published by the Free Software Foundation.
	11	*
	12	* This program is distributed in the hope that it will be useful, but
	13	* WITHOUT ANY WARRANTY; without even the implied warranty of
	14	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
	15	* General Public License for more details.
	16	*
	17	* You should have received a copy of the GNU General Public License
	18	* along with this program; if not, write to the Free Software
	19	* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
	20	* 02110-1301 USA
	21	*
	22	* THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED
	23	* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
	24	* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
	25	* NO EVENT SHALL THE AUTHORS BE LIABLE FOR ANY DIRECT, INDIRECT,
	26	* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
	27	* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
	28	* USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
	29	* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
	30	* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
	31	* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
	32	*
	33	*/
	34
	35	#ifndef __MUSB_CORE_H__
	36	#define __MUSB_CORE_H__
	37
	38	#include <linux/slab.h>
	39	#include <linux/list.h>
	40	#include <linux/interrupt.h>
550a7375	41	#include <linux/errno.h>
f7f9d63e	42	#include <linux/timer.h>
550a7375 FB	43	#include <linux/device.h>
	44	#include <linux/usb/ch9.h>
	45	#include <linux/usb/gadget.h>
	46	#include <linux/usb.h>
	47	#include <linux/usb/otg.h>
	48	#include <linux/usb/musb.h>
	49
	50	struct musb;
	51	struct musb_hw_ep;
	52	struct musb_ep;
	53
0ded2f14 CC	54	/* Helper defines for struct musb->hwvers */
	55	#define MUSB_HWVERS_MAJOR(x) ((x >> 10) & 0x1f)
	56	#define MUSB_HWVERS_MINOR(x) (x & 0x3ff)
	57	#define MUSB_HWVERS_RC 0x8000
	58	#define MUSB_HWVERS_1300 0x52C
	59	#define MUSB_HWVERS_1400 0x590
	60	#define MUSB_HWVERS_1800 0x720
	61	#define MUSB_HWVERS_1900 0x784
	62	#define MUSB_HWVERS_2000 0x800
550a7375 FB	63
	64	#include "musb_debug.h"
	65	#include "musb_dma.h"
	66
550a7375 FB	67	#include "musb_io.h"
	68	#include "musb_regs.h"
	69
	70	#include "musb_gadget.h"
27729aad	71	#include <linux/usb/hcd.h>
550a7375 FB	72	#include "musb_host.h"
550a7375 FB	73
550a7375 FB	74	/* NOTE: otg and peripheral-only state machines start at B_IDLE.
	75	* OTG or host-only go to A_IDLE when ID is sensed.
	76	*/
	77	#define is_peripheral_active(m) (!(m)->is_host)
	78	#define is_host_active(m) ((m)->is_host)
	79
550a7375 FB	80	#ifdef CONFIG_PROC_FS
	81	#include <linux/fs.h>
	82	#define MUSB_CONFIG_PROC_FS
	83	#endif
	84
550a7375 FB	85	/**************************** CONSTANTS ******************************/
	86
	87	#ifndef MUSB_C_NUM_EPS
	88	#define MUSB_C_NUM_EPS ((u8)16)
	89	#endif
	90
	91	#ifndef MUSB_MAX_END0_PACKET
	92	#define MUSB_MAX_END0_PACKET ((u16)MUSB_EP0_FIFOSIZE)
	93	#endif
	94
	95	/* host side ep0 states */
	96	enum musb_h_ep0_state {
	97	MUSB_EP0_IDLE,
	98	MUSB_EP0_START, /* expect ack of setup */
	99	MUSB_EP0_IN, /* expect IN DATA */
	100	MUSB_EP0_OUT, /* expect ack of OUT DATA */
	101	MUSB_EP0_STATUS, /* expect ack of STATUS */
	102	} __attribute__ ((packed));
	103
	104	/* peripheral side ep0 states */
	105	enum musb_g_ep0_state {
a5073b52 SS	106	MUSB_EP0_STAGE_IDLE, /* idle, waiting for SETUP */
a5073b52 SS	107	MUSB_EP0_STAGE_SETUP, /* received SETUP */
550a7375 FB	108	MUSB_EP0_STAGE_TX, /* IN data */
	109	MUSB_EP0_STAGE_RX, /* OUT data */
	110	MUSB_EP0_STAGE_STATUSIN, /* (after OUT data) */
	111	MUSB_EP0_STAGE_STATUSOUT, /* (after IN data) */
	112	MUSB_EP0_STAGE_ACKWAIT, /* after zlp, before statusin */
	113	} __attribute__ ((packed));
	114
f7f9d63e DB	115	/*
	116	* OTG protocol constants. See USB OTG 1.3 spec,
	117	* sections 5.5 "Device Timings" and 6.6.5 "Timers".
	118	*/
550a7375	119	#define OTG_TIME_A_WAIT_VRISE 100 /* msec (max) */
f7f9d63e DB	120	#define OTG_TIME_A_WAIT_BCON 1100 /* min 1 second */
	121	#define OTG_TIME_A_AIDL_BDIS 200 /* min 200 msec */
	122	#define OTG_TIME_B_ASE0_BRST 100 /* min 3.125 ms */
	123
550a7375 FB	124
	125	/************************* REGISTER ACCESS ******************************/
	126
	127	/* Endpoint registers (other than dynfifo setup) can be accessed either
	128	* directly with the "flat" model, or after setting up an index register.
	129	*/
	130
59b479e0 TL	131	#if defined(CONFIG_ARCH_DAVINCI) \|\| defined(CONFIG_SOC_OMAP2430) \
59b479e0 TL	132	\|\| defined(CONFIG_SOC_OMAP3430) \|\| defined(CONFIG_BLACKFIN) \
fb9c58ed	133	\|\| defined(CONFIG_ARCH_OMAP4)
550a7375 FB	134	/* REVISIT indexed access seemed to
	135	* misbehave (on DaVinci) for at least peripheral IN ...
	136	*/
	137	#define MUSB_FLAT_REG
	138	#endif
	139
	140	/* TUSB mapping: "flat" plus ep0 special cases */
240a16e2 FB	141	#if defined(CONFIG_USB_MUSB_TUSB6010) \|\| \
240a16e2 FB	142	defined(CONFIG_USB_MUSB_TUSB6010_MODULE)
550a7375 FB	143	#define musb_ep_select(_mbase, _epnum) \
	144	musb_writeb((_mbase), MUSB_INDEX, (_epnum))
	145	#define MUSB_EP_OFFSET MUSB_TUSB_OFFSET
	146
	147	/* "flat" mapping: each endpoint has its own i/o address */
	148	#elif defined(MUSB_FLAT_REG)
	149	#define musb_ep_select(_mbase, _epnum) (((void)(_mbase)), ((void)(_epnum)))
	150	#define MUSB_EP_OFFSET MUSB_FLAT_OFFSET
	151
	152	/* "indexed" mapping: INDEX register controls register bank select */
	153	#else
	154	#define musb_ep_select(_mbase, _epnum) \
	155	musb_writeb((_mbase), MUSB_INDEX, (_epnum))
	156	#define MUSB_EP_OFFSET MUSB_INDEXED_OFFSET
	157	#endif
	158
	159	/**************************** FUNCTIONS ******************************/
	160
	161	#define MUSB_HST_MODE(_musb)\
	162	{ (_musb)->is_host = true; }
	163	#define MUSB_DEV_MODE(_musb) \
	164	{ (_musb)->is_host = false; }
	165
	166	#define test_devctl_hst_mode(_x) \
	167	(musb_readb((_x)->mregs, MUSB_DEVCTL)&MUSB_DEVCTL_HM)
	168
	169	#define MUSB_MODE(musb) ((musb)->is_host ? "Host" : "Peripheral")
	170
	171	/****************************** TYPES ***********************************/
	172
3ca8abb8 FB	173	/**
	174	* struct musb_platform_ops - Operations passed to musb_core by HW glue layer
	175	* @init: turns on clocks, sets up platform-specific registers, etc
	176	* @exit: undoes @init
3ca8abb8 FB	177	* @set_mode: forcefully changes operating mode
	178	* @try_ilde: tries to idle the IP
	179	* @vbus_status: returns vbus status if possible
	180	* @set_vbus: forces vbus status
9ea35331	181	* @adjust_channel_params: pre check for standard dma channel_program func
3ca8abb8 FB	182	*/
	183	struct musb_platform_ops {
	184	int (init)(struct musb musb);
	185	int (exit)(struct musb musb);
	186
3ca8abb8 FB	187	void (enable)(struct musb musb);
	188	void (disable)(struct musb musb);
	189
	190	int (set_mode)(struct musb musb, u8 mode);
	191	void (try_idle)(struct musb musb, unsigned long timeout);
	192
	193	int (vbus_status)(struct musb musb);
	194	void (set_vbus)(struct musb musb, int on);
13254307 MF	195
	196	int (adjust_channel_params)(struct dma_channel channel,
	197	u16 packet_sz, u8 *mode,
	198	dma_addr_t dma_addr, u32 len);
3ca8abb8 FB	199	};
3ca8abb8 FB	200
550a7375 FB	201	/*
	202	* struct musb_hw_ep - endpoint hardware (bidirectional)
	203	*
	204	* Ordered slightly for better cacheline locality.
	205	*/
	206	struct musb_hw_ep {
	207	struct musb *musb;
	208	void __iomem *fifo;
	209	void __iomem *regs;
	210
240a16e2 FB	211	#if defined(CONFIG_USB_MUSB_TUSB6010) \|\| \
240a16e2 FB	212	defined(CONFIG_USB_MUSB_TUSB6010_MODULE)
550a7375 FB	213	void __iomem *conf;
	214	#endif
	215
	216	/* index in musb->endpoints[] */
	217	u8 epnum;
	218
	219	/* hardware configuration, possibly dynamic */
	220	bool is_shared_fifo;
	221	bool tx_double_buffered;
	222	bool rx_double_buffered;
	223	u16 max_packet_sz_tx;
	224	u16 max_packet_sz_rx;
	225
	226	struct dma_channel *tx_channel;
	227	struct dma_channel *rx_channel;
	228
240a16e2 FB	229	#if defined(CONFIG_USB_MUSB_TUSB6010) \|\| \
240a16e2 FB	230	defined(CONFIG_USB_MUSB_TUSB6010_MODULE)
550a7375 FB	231	/* TUSB has "asynchronous" and "synchronous" dma modes */
	232	dma_addr_t fifo_async;
	233	dma_addr_t fifo_sync;
	234	void __iomem *fifo_sync_va;
	235	#endif
	236
550a7375 FB	237	void __iomem *target_regs;
	238
	239	/* currently scheduled peripheral endpoint */
	240	struct musb_qh *in_qh;
	241	struct musb_qh *out_qh;
	242
	243	u8 rx_reinit;
	244	u8 tx_reinit;
550a7375	245
550a7375 FB	246	/* peripheral side */
	247	struct musb_ep ep_in; /* TX */
	248	struct musb_ep ep_out; /* RX */
550a7375 FB	249	};
550a7375 FB	250
ad1adb89	251	static inline struct musb_request next_in_request(struct musb_hw_ep hw_ep)
550a7375	252	{
550a7375	253	return next_request(&hw_ep->ep_in);
550a7375 FB	254	}
550a7375 FB	255
ad1adb89	256	static inline struct musb_request next_out_request(struct musb_hw_ep hw_ep)
550a7375	257	{
550a7375	258	return next_request(&hw_ep->ep_out);
550a7375 FB	259	}
550a7375 FB	260
7421107b FB	261	struct musb_csr_regs {
	262	/* FIFO registers */
	263	u16 txmaxp, txcsr, rxmaxp, rxcsr;
	264	u16 rxfifoadd, txfifoadd;
	265	u8 txtype, txinterval, rxtype, rxinterval;
	266	u8 rxfifosz, txfifosz;
	267	u8 txfunaddr, txhubaddr, txhubport;
	268	u8 rxfunaddr, rxhubaddr, rxhubport;
	269	};
	270
	271	struct musb_context_registers {
	272
7421107b	273	u8 power;
7421107b FB	274	u8 intrusbe;
	275	u16 frame;
	276	u8 index, testmode;
	277
	278	u8 devctl, busctl, misc;
e25bec16	279	u32 otg_interfsel;
7421107b FB	280
	281	struct musb_csr_regs index_regs[MUSB_C_NUM_EPS];
	282	};
	283
550a7375 FB	284	/*
	285	* struct musb - Driver instance data.
	286	*/
	287	struct musb {
	288	/* device lock */
	289	spinlock_t lock;
743411b3 FB	290
743411b3 FB	291	const struct musb_platform_ops *ops;
7421107b	292	struct musb_context_registers context;
743411b3	293
550a7375 FB	294	irqreturn_t (isr)(int, void );
550a7375 FB	295	struct work_struct irq_work;
32c3b94e	296	u16 hwvers;
550a7375	297
af5ec14d	298	u16 intrrxe;
b18d26f6	299	u16 intrtxe;
550a7375 FB	300	/* this hub status bit is reserved by USB 2.0 and not seen by usbcore */
	301	#define MUSB_PORT_STAT_RESUME (1 << 31)
	302
	303	u32 port1_status;
	304
550a7375 FB	305	unsigned long rh_timer;
	306
	307	enum musb_h_ep0_state ep0_stage;
	308
	309	/* bulk traffic normally dedicates endpoint hardware, and each
	310	* direction has its own ring of host side endpoints.
	311	* we try to progress the transfer at the head of each endpoint's
	312	* queue until it completes or NAKs too much; then we try the next
	313	* endpoint.
	314	*/
	315	struct musb_hw_ep *bulk_ep;
	316
	317	struct list_head control; /* of musb_qh */
	318	struct list_head in_bulk; /* of musb_qh */
	319	struct list_head out_bulk; /* of musb_qh */
f7f9d63e DB	320
f7f9d63e DB	321	struct timer_list otg_timer;
594632ef	322	struct notifier_block nb;
550a7375	323
550a7375 FB	324	struct dma_controller *dma_controller;
	325
	326	struct device *controller;
	327	void __iomem *ctrl_base;
	328	void __iomem *mregs;
	329
240a16e2 FB	330	#if defined(CONFIG_USB_MUSB_TUSB6010) \|\| \
240a16e2 FB	331	defined(CONFIG_USB_MUSB_TUSB6010_MODULE)
550a7375 FB	332	dma_addr_t async;
	333	dma_addr_t sync;
	334	void __iomem *sync_va;
	335	#endif
	336
	337	/* passed down from chip/board specific irq handlers */
	338	u8 int_usb;
	339	u16 int_rx;
	340	u16 int_tx;
	341
86753811	342	struct usb_phy *xceiv;
550a7375 FB	343
550a7375 FB	344	int nIrq;
c48a5155	345	unsigned irq_wake:1;
550a7375 FB	346
	347	struct musb_hw_ep endpoints[MUSB_C_NUM_EPS];
	348	#define control_ep endpoints
	349
	350	#define VBUSERR_RETRY_COUNT 3
	351	u16 vbuserr_retry;
	352	u16 epmask;
	353	u8 nr_endpoints;
	354
550a7375 FB	355	int (*board_set_power)(int state);
550a7375 FB	356
550a7375 FB	357	u8 min_power; /* vbus for periph, in mA/2 */
	358
	359	bool is_host;
	360
	361	int a_wait_bcon; /* VBUS timeout in msecs */
	362	unsigned long idle_timeout; /* Next timeout in jiffies */
	363
	364	/* active means connected and not suspended */
	365	unsigned is_active:1;
	366
	367	unsigned is_multipoint:1;
550a7375	368
a483d706 AKG	369	unsigned hb_iso_rx:1; /* high bandwidth iso rx? */
a483d706 AKG	370	unsigned hb_iso_tx:1; /* high bandwidth iso tx? */
51bf0d0e	371	unsigned dyn_fifo:1; /* dynamic FIFO supported? */
a483d706	372
7ed069c1	373	unsigned bulk_split:1;
550a7375	374	#define can_bulk_split(musb,type) \
7ed069c1	375	(((type) == USB_ENDPOINT_XFER_BULK) && (musb)->bulk_split)
550a7375	376
7ed069c1	377	unsigned bulk_combine:1;
550a7375	378	#define can_bulk_combine(musb,type) \
7ed069c1	379	(((type) == USB_ENDPOINT_XFER_BULK) && (musb)->bulk_combine)
550a7375	380
550a7375 FB	381	/* is_suspended means USB B_PERIPHERAL suspend */
	382	unsigned is_suspended:1;
	383
	384	/* may_wakeup means remote wakeup is enabled */
	385	unsigned may_wakeup:1;
	386
	387	/* is_self_powered is reported in device status and the
	388	* config descriptor. is_bus_powered means B_PERIPHERAL
	389	* draws some VBUS current; both can be true.
	390	*/
	391	unsigned is_self_powered:1;
	392	unsigned is_bus_powered:1;
	393
	394	unsigned set_address:1;
	395	unsigned test_mode:1;
	396	unsigned softconnect:1;
5990378b FB	397
	398	u8 address;
	399	u8 test_mode_nr;
	400	u16 ackpend; /* ep0 */
	401	enum musb_g_ep0_state ep0_state;
	402	struct usb_gadget g; /* the gadget */
	403	struct usb_gadget_driver gadget_driver; / its driver */
74c2e936	404	struct usb_hcd hcd; / the usb hcd */
5990378b	405
06624818 FB	406	/*
	407	* FIXME: Remove this flag.
	408	*
	409	* This is only added to allow Blackfin to work
	410	* with current driver. For some unknown reason
	411	* Blackfin doesn't work with double buffering
	412	* and that's enabled by default.
	413	*
	414	* We added this flag to forcefully disable double
	415	* buffering until we get it working.
	416	*/
fc87e080	417	unsigned double_buffer_not_ok:1;
550a7375	418
ca6d1b13 FB	419	struct musb_hdrc_config *config;
ca6d1b13 FB	420
550a7375 FB	421	#ifdef MUSB_CONFIG_PROC_FS
550a7375 FB	422	struct proc_dir_entry *proc_entry;
8d2421e6 AKG	423	#endif
	424	int xceiv_old_state;
	425	#ifdef CONFIG_DEBUG_FS
	426	struct dentry *debugfs_root;
550a7375 FB	427	#endif
	428	};
	429
550a7375 FB	430	static inline struct musb gadget_to_musb(struct usb_gadget g)
	431	{
	432	return container_of(g, struct musb, g);
	433	}
550a7375	434
c6cf8b00 BW	435	#ifdef CONFIG_BLACKFIN
	436	static inline int musb_read_fifosize(struct musb *musb,
	437	struct musb_hw_ep *hw_ep, u8 epnum)
	438	{
	439	musb->nr_endpoints++;
	440	musb->epmask \|= (1 << epnum);
	441
	442	if (epnum < 5) {
	443	hw_ep->max_packet_sz_tx = 128;
	444	hw_ep->max_packet_sz_rx = 128;
	445	} else {
	446	hw_ep->max_packet_sz_tx = 1024;
	447	hw_ep->max_packet_sz_rx = 1024;
	448	}
	449	hw_ep->is_shared_fifo = false;
	450
	451	return 0;
	452	}
	453
	454	static inline void musb_configure_ep0(struct musb *musb)
	455	{
	456	musb->endpoints[0].max_packet_sz_tx = MUSB_EP0_FIFOSIZE;
	457	musb->endpoints[0].max_packet_sz_rx = MUSB_EP0_FIFOSIZE;
	458	musb->endpoints[0].is_shared_fifo = true;
	459	}
	460
	461	#else
	462
	463	static inline int musb_read_fifosize(struct musb *musb,
	464	struct musb_hw_ep *hw_ep, u8 epnum)
	465	{
a156544b	466	void __iomem *mbase = musb->mregs;
c6cf8b00 BW	467	u8 reg = 0;
	468
	469	/* read from core using indexed model */
32233716	470	reg = musb_readb(mbase, MUSB_EP_OFFSET(epnum, MUSB_FIFOSIZE));
c6cf8b00 BW	471	/* 0's returned when no more endpoints */
	472	if (!reg)
	473	return -ENODEV;
	474
	475	musb->nr_endpoints++;
	476	musb->epmask \|= (1 << epnum);
	477
	478	hw_ep->max_packet_sz_tx = 1 << (reg & 0x0f);
	479
	480	/* shared TX/RX FIFO? */
	481	if ((reg & 0xf0) == 0xf0) {
	482	hw_ep->max_packet_sz_rx = hw_ep->max_packet_sz_tx;
	483	hw_ep->is_shared_fifo = true;
	484	return 0;
	485	} else {
	486	hw_ep->max_packet_sz_rx = 1 << ((reg & 0xf0) >> 4);
	487	hw_ep->is_shared_fifo = false;
	488	}
	489
	490	return 0;
	491	}
	492
	493	static inline void musb_configure_ep0(struct musb *musb)
	494	{
	495	musb->endpoints[0].max_packet_sz_tx = MUSB_EP0_FIFOSIZE;
	496	musb->endpoints[0].max_packet_sz_rx = MUSB_EP0_FIFOSIZE;
32233716	497	musb->endpoints[0].is_shared_fifo = true;
c6cf8b00 BW	498	}
	499	#endif /* CONFIG_BLACKFIN */
	500
550a7375 FB	501
	502	/*************************** Glue it together ***************************/
	503
	504	extern const char musb_driver_name[];
	505
550a7375 FB	506	extern void musb_stop(struct musb *musb);
	507
	508	extern void musb_write_fifo(struct musb_hw_ep ep, u16 len, const u8 src);
	509	extern void musb_read_fifo(struct musb_hw_ep ep, u16 len, u8 dst);
	510
	511	extern void musb_load_testpacket(struct musb *);
	512
	513	extern irqreturn_t musb_interrupt(struct musb *);
	514
550a7375 FB	515	extern void musb_hnp_stop(struct musb *musb);
550a7375 FB	516
743411b3 FB	517	static inline void musb_platform_set_vbus(struct musb *musb, int is_on)
	518	{
	519	if (musb->ops->set_vbus)
	520	musb->ops->set_vbus(musb, is_on);
	521	}
	522
	523	static inline void musb_platform_enable(struct musb *musb)
	524	{
	525	if (musb->ops->enable)
	526	musb->ops->enable(musb);
	527	}
	528
	529	static inline void musb_platform_disable(struct musb *musb)
	530	{
	531	if (musb->ops->disable)
	532	musb->ops->disable(musb);
	533	}
	534
	535	static inline int musb_platform_set_mode(struct musb *musb, u8 mode)
	536	{
	537	if (!musb->ops->set_mode)
	538	return 0;
	539
	540	return musb->ops->set_mode(musb, mode);
	541	}
	542
	543	static inline void musb_platform_try_idle(struct musb *musb,
	544	unsigned long timeout)
	545	{
	546	if (musb->ops->try_idle)
	547	musb->ops->try_idle(musb, timeout);
	548	}
	549
	550	static inline int musb_platform_get_vbus_status(struct musb *musb)
	551	{
	552	if (!musb->ops->vbus_status)
	553	return 0;
	554
	555	return musb->ops->vbus_status(musb);
	556	}
	557
	558	static inline int musb_platform_init(struct musb *musb)
	559	{
	560	if (!musb->ops->init)
	561	return -EINVAL;
	562
	563	return musb->ops->init(musb);
	564	}
	565
	566	static inline int musb_platform_exit(struct musb *musb)
	567	{
	568	if (!musb->ops->exit)
	569	return -EINVAL;
	570
	571	return musb->ops->exit(musb);
	572	}
	573
550a7375	574	#endif /* __MUSB_CORE_H__ */