Commit | Line | Data |
---|---|---|
0807c500 LY |
1 | /* |
2 | * Copyright (C) 2007,2008 Freescale semiconductor, Inc. | |
3 | * | |
4 | * Author: Li Yang <LeoLi@freescale.com> | |
5 | * Jerry Huang <Chang-Ming.Huang@freescale.com> | |
6 | * | |
7 | * Initialization based on code from Shlomi Gridish. | |
8 | * | |
9 | * This program is free software; you can redistribute it and/or modify it | |
10 | * under the terms of the GNU General Public License as published by the | |
11 | * Free Software Foundation; either version 2 of the License, or (at your | |
12 | * option) any later version. | |
13 | * | |
14 | * This program is distributed in the hope that it will be useful, but | |
15 | * WITHOUT ANY WARRANTY; without even the implied warranty of | |
16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | |
17 | * General Public License for more details. | |
18 | * | |
19 | * You should have received a copy of the GNU General Public License along | |
20 | * with this program; if not, write to the Free Software Foundation, Inc., | |
21 | * 675 Mass Ave, Cambridge, MA 02139, USA. | |
22 | */ | |
23 | ||
24 | #include <linux/module.h> | |
25 | #include <linux/kernel.h> | |
26 | #include <linux/delay.h> | |
27 | #include <linux/slab.h> | |
28 | #include <linux/proc_fs.h> | |
29 | #include <linux/errno.h> | |
0807c500 LY |
30 | #include <linux/interrupt.h> |
31 | #include <linux/io.h> | |
32 | #include <linux/timer.h> | |
33 | #include <linux/usb.h> | |
34 | #include <linux/device.h> | |
35 | #include <linux/usb/ch9.h> | |
36 | #include <linux/usb/gadget.h> | |
37 | #include <linux/workqueue.h> | |
38 | #include <linux/time.h> | |
39 | #include <linux/fsl_devices.h> | |
40 | #include <linux/platform_device.h> | |
41 | #include <linux/uaccess.h> | |
42 | ||
43 | #include <asm/unaligned.h> | |
44 | ||
94ae9843 | 45 | #include "phy-fsl-usb.h" |
0807c500 LY |
46 | |
47 | #define DRIVER_VERSION "Rev. 1.55" | |
48 | #define DRIVER_AUTHOR "Jerry Huang/Li Yang" | |
49 | #define DRIVER_DESC "Freescale USB OTG Transceiver Driver" | |
50 | #define DRIVER_INFO DRIVER_DESC " " DRIVER_VERSION | |
51 | ||
52 | static const char driver_name[] = "fsl-usb2-otg"; | |
53 | ||
54 | const pm_message_t otg_suspend_state = { | |
55 | .event = 1, | |
56 | }; | |
57 | ||
58 | #define HA_DATA_PULSE | |
59 | ||
60 | static struct usb_dr_mmap *usb_dr_regs; | |
61 | static struct fsl_otg *fsl_otg_dev; | |
62 | static int srp_wait_done; | |
63 | ||
64 | /* FSM timers */ | |
65 | struct fsl_otg_timer *a_wait_vrise_tmr, *a_wait_bcon_tmr, *a_aidl_bdis_tmr, | |
66 | *b_ase0_brst_tmr, *b_se0_srp_tmr; | |
67 | ||
68 | /* Driver specific timers */ | |
69 | struct fsl_otg_timer *b_data_pulse_tmr, *b_vbus_pulse_tmr, *b_srp_fail_tmr, | |
70 | *b_srp_wait_tmr, *a_wait_enum_tmr; | |
71 | ||
72 | static struct list_head active_timers; | |
73 | ||
74 | static struct fsl_otg_config fsl_otg_initdata = { | |
75 | .otg_port = 1, | |
76 | }; | |
77 | ||
78 | #ifdef CONFIG_PPC32 | |
79 | static u32 _fsl_readl_be(const unsigned __iomem *p) | |
80 | { | |
81 | return in_be32(p); | |
82 | } | |
83 | ||
84 | static u32 _fsl_readl_le(const unsigned __iomem *p) | |
85 | { | |
86 | return in_le32(p); | |
87 | } | |
88 | ||
89 | static void _fsl_writel_be(u32 v, unsigned __iomem *p) | |
90 | { | |
91 | out_be32(p, v); | |
92 | } | |
93 | ||
94 | static void _fsl_writel_le(u32 v, unsigned __iomem *p) | |
95 | { | |
96 | out_le32(p, v); | |
97 | } | |
98 | ||
99 | static u32 (*_fsl_readl)(const unsigned __iomem *p); | |
100 | static void (*_fsl_writel)(u32 v, unsigned __iomem *p); | |
101 | ||
102 | #define fsl_readl(p) (*_fsl_readl)((p)) | |
103 | #define fsl_writel(v, p) (*_fsl_writel)((v), (p)) | |
104 | ||
105 | #else | |
106 | #define fsl_readl(addr) readl(addr) | |
107 | #define fsl_writel(val, addr) writel(val, addr) | |
108 | #endif /* CONFIG_PPC32 */ | |
109 | ||
0807c500 LY |
110 | int write_ulpi(u8 addr, u8 data) |
111 | { | |
112 | u32 temp; | |
113 | ||
114 | temp = 0x60000000 | (addr << 16) | data; | |
115 | fsl_writel(temp, &usb_dr_regs->ulpiview); | |
116 | return 0; | |
117 | } | |
118 | ||
119 | /* -------------------------------------------------------------*/ | |
120 | /* Operations that will be called from OTG Finite State Machine */ | |
121 | ||
122 | /* Charge vbus for vbus pulsing in SRP */ | |
da8cc167 | 123 | void fsl_otg_chrg_vbus(struct otg_fsm *fsm, int on) |
0807c500 LY |
124 | { |
125 | u32 tmp; | |
126 | ||
127 | tmp = fsl_readl(&usb_dr_regs->otgsc) & ~OTGSC_INTSTS_MASK; | |
128 | ||
129 | if (on) | |
130 | /* stop discharging, start charging */ | |
131 | tmp = (tmp & ~OTGSC_CTRL_VBUS_DISCHARGE) | | |
132 | OTGSC_CTRL_VBUS_CHARGE; | |
133 | else | |
134 | /* stop charging */ | |
135 | tmp &= ~OTGSC_CTRL_VBUS_CHARGE; | |
136 | ||
137 | fsl_writel(tmp, &usb_dr_regs->otgsc); | |
138 | } | |
139 | ||
140 | /* Discharge vbus through a resistor to ground */ | |
141 | void fsl_otg_dischrg_vbus(int on) | |
142 | { | |
143 | u32 tmp; | |
144 | ||
145 | tmp = fsl_readl(&usb_dr_regs->otgsc) & ~OTGSC_INTSTS_MASK; | |
146 | ||
147 | if (on) | |
148 | /* stop charging, start discharging */ | |
149 | tmp = (tmp & ~OTGSC_CTRL_VBUS_CHARGE) | | |
150 | OTGSC_CTRL_VBUS_DISCHARGE; | |
151 | else | |
152 | /* stop discharging */ | |
153 | tmp &= ~OTGSC_CTRL_VBUS_DISCHARGE; | |
154 | ||
155 | fsl_writel(tmp, &usb_dr_regs->otgsc); | |
156 | } | |
157 | ||
158 | /* A-device driver vbus, controlled through PP bit in PORTSC */ | |
da8cc167 | 159 | void fsl_otg_drv_vbus(struct otg_fsm *fsm, int on) |
0807c500 LY |
160 | { |
161 | u32 tmp; | |
162 | ||
163 | if (on) { | |
164 | tmp = fsl_readl(&usb_dr_regs->portsc) & ~PORTSC_W1C_BITS; | |
165 | fsl_writel(tmp | PORTSC_PORT_POWER, &usb_dr_regs->portsc); | |
166 | } else { | |
167 | tmp = fsl_readl(&usb_dr_regs->portsc) & | |
168 | ~PORTSC_W1C_BITS & ~PORTSC_PORT_POWER; | |
169 | fsl_writel(tmp, &usb_dr_regs->portsc); | |
170 | } | |
171 | } | |
172 | ||
173 | /* | |
174 | * Pull-up D+, signalling connect by periperal. Also used in | |
175 | * data-line pulsing in SRP | |
176 | */ | |
da8cc167 | 177 | void fsl_otg_loc_conn(struct otg_fsm *fsm, int on) |
0807c500 LY |
178 | { |
179 | u32 tmp; | |
180 | ||
181 | tmp = fsl_readl(&usb_dr_regs->otgsc) & ~OTGSC_INTSTS_MASK; | |
182 | ||
183 | if (on) | |
184 | tmp |= OTGSC_CTRL_DATA_PULSING; | |
185 | else | |
186 | tmp &= ~OTGSC_CTRL_DATA_PULSING; | |
187 | ||
188 | fsl_writel(tmp, &usb_dr_regs->otgsc); | |
189 | } | |
190 | ||
191 | /* | |
192 | * Generate SOF by host. This is controlled through suspend/resume the | |
193 | * port. In host mode, controller will automatically send SOF. | |
194 | * Suspend will block the data on the port. | |
195 | */ | |
da8cc167 | 196 | void fsl_otg_loc_sof(struct otg_fsm *fsm, int on) |
0807c500 LY |
197 | { |
198 | u32 tmp; | |
199 | ||
200 | tmp = fsl_readl(&fsl_otg_dev->dr_mem_map->portsc) & ~PORTSC_W1C_BITS; | |
201 | if (on) | |
202 | tmp |= PORTSC_PORT_FORCE_RESUME; | |
203 | else | |
204 | tmp |= PORTSC_PORT_SUSPEND; | |
205 | ||
206 | fsl_writel(tmp, &fsl_otg_dev->dr_mem_map->portsc); | |
207 | ||
208 | } | |
209 | ||
210 | /* Start SRP pulsing by data-line pulsing, followed with v-bus pulsing. */ | |
da8cc167 | 211 | void fsl_otg_start_pulse(struct otg_fsm *fsm) |
0807c500 LY |
212 | { |
213 | u32 tmp; | |
214 | ||
215 | srp_wait_done = 0; | |
216 | #ifdef HA_DATA_PULSE | |
217 | tmp = fsl_readl(&usb_dr_regs->otgsc) & ~OTGSC_INTSTS_MASK; | |
218 | tmp |= OTGSC_HA_DATA_PULSE; | |
219 | fsl_writel(tmp, &usb_dr_regs->otgsc); | |
220 | #else | |
221 | fsl_otg_loc_conn(1); | |
222 | #endif | |
223 | ||
da8cc167 | 224 | fsl_otg_add_timer(fsm, b_data_pulse_tmr); |
0807c500 LY |
225 | } |
226 | ||
227 | void b_data_pulse_end(unsigned long foo) | |
228 | { | |
229 | #ifdef HA_DATA_PULSE | |
230 | #else | |
231 | fsl_otg_loc_conn(0); | |
232 | #endif | |
233 | ||
234 | /* Do VBUS pulse after data pulse */ | |
235 | fsl_otg_pulse_vbus(); | |
236 | } | |
237 | ||
238 | void fsl_otg_pulse_vbus(void) | |
239 | { | |
240 | srp_wait_done = 0; | |
da8cc167 | 241 | fsl_otg_chrg_vbus(&fsl_otg_dev->fsm, 1); |
0807c500 | 242 | /* start the timer to end vbus charge */ |
da8cc167 | 243 | fsl_otg_add_timer(&fsl_otg_dev->fsm, b_vbus_pulse_tmr); |
0807c500 LY |
244 | } |
245 | ||
246 | void b_vbus_pulse_end(unsigned long foo) | |
247 | { | |
da8cc167 | 248 | fsl_otg_chrg_vbus(&fsl_otg_dev->fsm, 0); |
0807c500 LY |
249 | |
250 | /* | |
251 | * As USB3300 using the same a_sess_vld and b_sess_vld voltage | |
252 | * we need to discharge the bus for a while to distinguish | |
253 | * residual voltage of vbus pulsing and A device pull up | |
254 | */ | |
255 | fsl_otg_dischrg_vbus(1); | |
da8cc167 | 256 | fsl_otg_add_timer(&fsl_otg_dev->fsm, b_srp_wait_tmr); |
0807c500 LY |
257 | } |
258 | ||
259 | void b_srp_end(unsigned long foo) | |
260 | { | |
261 | fsl_otg_dischrg_vbus(0); | |
262 | srp_wait_done = 1; | |
263 | ||
e5ba1c02 | 264 | if ((fsl_otg_dev->phy.otg->state == OTG_STATE_B_SRP_INIT) && |
0807c500 LY |
265 | fsl_otg_dev->fsm.b_sess_vld) |
266 | fsl_otg_dev->fsm.b_srp_done = 1; | |
267 | } | |
268 | ||
269 | /* | |
270 | * Workaround for a_host suspending too fast. When a_bus_req=0, | |
271 | * a_host will start by SRP. It needs to set b_hnp_enable before | |
272 | * actually suspending to start HNP | |
273 | */ | |
274 | void a_wait_enum(unsigned long foo) | |
275 | { | |
276 | VDBG("a_wait_enum timeout\n"); | |
7e062c0f | 277 | if (!fsl_otg_dev->phy.otg->host->b_hnp_enable) |
da8cc167 | 278 | fsl_otg_add_timer(&fsl_otg_dev->fsm, a_wait_enum_tmr); |
0807c500 LY |
279 | else |
280 | otg_statemachine(&fsl_otg_dev->fsm); | |
281 | } | |
282 | ||
283 | /* The timeout callback function to set time out bit */ | |
284 | void set_tmout(unsigned long indicator) | |
285 | { | |
286 | *(int *)indicator = 1; | |
287 | } | |
288 | ||
289 | /* Initialize timers */ | |
290 | int fsl_otg_init_timers(struct otg_fsm *fsm) | |
291 | { | |
292 | /* FSM used timers */ | |
293 | a_wait_vrise_tmr = otg_timer_initializer(&set_tmout, TA_WAIT_VRISE, | |
294 | (unsigned long)&fsm->a_wait_vrise_tmout); | |
295 | if (!a_wait_vrise_tmr) | |
296 | return -ENOMEM; | |
297 | ||
298 | a_wait_bcon_tmr = otg_timer_initializer(&set_tmout, TA_WAIT_BCON, | |
299 | (unsigned long)&fsm->a_wait_bcon_tmout); | |
300 | if (!a_wait_bcon_tmr) | |
301 | return -ENOMEM; | |
302 | ||
303 | a_aidl_bdis_tmr = otg_timer_initializer(&set_tmout, TA_AIDL_BDIS, | |
304 | (unsigned long)&fsm->a_aidl_bdis_tmout); | |
305 | if (!a_aidl_bdis_tmr) | |
306 | return -ENOMEM; | |
307 | ||
308 | b_ase0_brst_tmr = otg_timer_initializer(&set_tmout, TB_ASE0_BRST, | |
309 | (unsigned long)&fsm->b_ase0_brst_tmout); | |
310 | if (!b_ase0_brst_tmr) | |
311 | return -ENOMEM; | |
312 | ||
313 | b_se0_srp_tmr = otg_timer_initializer(&set_tmout, TB_SE0_SRP, | |
314 | (unsigned long)&fsm->b_se0_srp); | |
315 | if (!b_se0_srp_tmr) | |
316 | return -ENOMEM; | |
317 | ||
318 | b_srp_fail_tmr = otg_timer_initializer(&set_tmout, TB_SRP_FAIL, | |
319 | (unsigned long)&fsm->b_srp_done); | |
320 | if (!b_srp_fail_tmr) | |
321 | return -ENOMEM; | |
322 | ||
323 | a_wait_enum_tmr = otg_timer_initializer(&a_wait_enum, 10, | |
324 | (unsigned long)&fsm); | |
325 | if (!a_wait_enum_tmr) | |
326 | return -ENOMEM; | |
327 | ||
328 | /* device driver used timers */ | |
329 | b_srp_wait_tmr = otg_timer_initializer(&b_srp_end, TB_SRP_WAIT, 0); | |
330 | if (!b_srp_wait_tmr) | |
331 | return -ENOMEM; | |
332 | ||
333 | b_data_pulse_tmr = otg_timer_initializer(&b_data_pulse_end, | |
334 | TB_DATA_PLS, 0); | |
335 | if (!b_data_pulse_tmr) | |
336 | return -ENOMEM; | |
337 | ||
338 | b_vbus_pulse_tmr = otg_timer_initializer(&b_vbus_pulse_end, | |
339 | TB_VBUS_PLS, 0); | |
340 | if (!b_vbus_pulse_tmr) | |
341 | return -ENOMEM; | |
342 | ||
343 | return 0; | |
344 | } | |
345 | ||
346 | /* Uninitialize timers */ | |
347 | void fsl_otg_uninit_timers(void) | |
348 | { | |
349 | /* FSM used timers */ | |
5f717919 SS |
350 | kfree(a_wait_vrise_tmr); |
351 | kfree(a_wait_bcon_tmr); | |
352 | kfree(a_aidl_bdis_tmr); | |
353 | kfree(b_ase0_brst_tmr); | |
354 | kfree(b_se0_srp_tmr); | |
355 | kfree(b_srp_fail_tmr); | |
356 | kfree(a_wait_enum_tmr); | |
0807c500 LY |
357 | |
358 | /* device driver used timers */ | |
5f717919 SS |
359 | kfree(b_srp_wait_tmr); |
360 | kfree(b_data_pulse_tmr); | |
361 | kfree(b_vbus_pulse_tmr); | |
0807c500 LY |
362 | } |
363 | ||
f6de27ee AT |
364 | static struct fsl_otg_timer *fsl_otg_get_timer(enum otg_fsm_timer t) |
365 | { | |
366 | struct fsl_otg_timer *timer; | |
367 | ||
368 | /* REVISIT: use array of pointers to timers instead */ | |
369 | switch (t) { | |
370 | case A_WAIT_VRISE: | |
371 | timer = a_wait_vrise_tmr; | |
372 | break; | |
373 | case A_WAIT_BCON: | |
374 | timer = a_wait_vrise_tmr; | |
375 | break; | |
376 | case A_AIDL_BDIS: | |
377 | timer = a_wait_vrise_tmr; | |
378 | break; | |
379 | case B_ASE0_BRST: | |
380 | timer = a_wait_vrise_tmr; | |
381 | break; | |
382 | case B_SE0_SRP: | |
383 | timer = a_wait_vrise_tmr; | |
384 | break; | |
385 | case B_SRP_FAIL: | |
386 | timer = a_wait_vrise_tmr; | |
387 | break; | |
388 | case A_WAIT_ENUM: | |
389 | timer = a_wait_vrise_tmr; | |
390 | break; | |
391 | default: | |
392 | timer = NULL; | |
393 | } | |
394 | ||
395 | return timer; | |
396 | } | |
397 | ||
0807c500 | 398 | /* Add timer to timer list */ |
da8cc167 | 399 | void fsl_otg_add_timer(struct otg_fsm *fsm, void *gtimer) |
0807c500 LY |
400 | { |
401 | struct fsl_otg_timer *timer = gtimer; | |
402 | struct fsl_otg_timer *tmp_timer; | |
403 | ||
404 | /* | |
405 | * Check if the timer is already in the active list, | |
406 | * if so update timer count | |
407 | */ | |
408 | list_for_each_entry(tmp_timer, &active_timers, list) | |
409 | if (tmp_timer == timer) { | |
410 | timer->count = timer->expires; | |
411 | return; | |
412 | } | |
413 | timer->count = timer->expires; | |
414 | list_add_tail(&timer->list, &active_timers); | |
415 | } | |
416 | ||
f6de27ee AT |
417 | static void fsl_otg_fsm_add_timer(struct otg_fsm *fsm, enum otg_fsm_timer t) |
418 | { | |
419 | struct fsl_otg_timer *timer; | |
420 | ||
421 | timer = fsl_otg_get_timer(t); | |
422 | if (!timer) | |
423 | return; | |
424 | ||
425 | fsl_otg_add_timer(fsm, timer); | |
426 | } | |
427 | ||
0807c500 | 428 | /* Remove timer from the timer list; clear timeout status */ |
da8cc167 | 429 | void fsl_otg_del_timer(struct otg_fsm *fsm, void *gtimer) |
0807c500 LY |
430 | { |
431 | struct fsl_otg_timer *timer = gtimer; | |
432 | struct fsl_otg_timer *tmp_timer, *del_tmp; | |
433 | ||
434 | list_for_each_entry_safe(tmp_timer, del_tmp, &active_timers, list) | |
435 | if (tmp_timer == timer) | |
436 | list_del(&timer->list); | |
437 | } | |
438 | ||
f6de27ee AT |
439 | static void fsl_otg_fsm_del_timer(struct otg_fsm *fsm, enum otg_fsm_timer t) |
440 | { | |
441 | struct fsl_otg_timer *timer; | |
442 | ||
443 | timer = fsl_otg_get_timer(t); | |
444 | if (!timer) | |
445 | return; | |
446 | ||
447 | fsl_otg_del_timer(fsm, timer); | |
448 | } | |
449 | ||
0807c500 LY |
450 | /* Reset controller, not reset the bus */ |
451 | void otg_reset_controller(void) | |
452 | { | |
453 | u32 command; | |
454 | ||
455 | command = fsl_readl(&usb_dr_regs->usbcmd); | |
456 | command |= (1 << 1); | |
457 | fsl_writel(command, &usb_dr_regs->usbcmd); | |
458 | while (fsl_readl(&usb_dr_regs->usbcmd) & (1 << 1)) | |
459 | ; | |
460 | } | |
461 | ||
462 | /* Call suspend/resume routines in host driver */ | |
463 | int fsl_otg_start_host(struct otg_fsm *fsm, int on) | |
464 | { | |
7e062c0f | 465 | struct usb_otg *otg = fsm->otg; |
0807c500 | 466 | struct device *dev; |
19c1eac2 AT |
467 | struct fsl_otg *otg_dev = |
468 | container_of(otg->usb_phy, struct fsl_otg, phy); | |
0807c500 LY |
469 | u32 retval = 0; |
470 | ||
7e062c0f | 471 | if (!otg->host) |
0807c500 | 472 | return -ENODEV; |
7e062c0f | 473 | dev = otg->host->controller; |
0807c500 LY |
474 | |
475 | /* | |
476 | * Update a_vbus_vld state as a_vbus_vld int is disabled | |
477 | * in device mode | |
478 | */ | |
479 | fsm->a_vbus_vld = | |
480 | !!(fsl_readl(&usb_dr_regs->otgsc) & OTGSC_STS_A_VBUS_VALID); | |
481 | if (on) { | |
482 | /* start fsl usb host controller */ | |
483 | if (otg_dev->host_working) | |
484 | goto end; | |
485 | else { | |
486 | otg_reset_controller(); | |
487 | VDBG("host on......\n"); | |
488 | if (dev->driver->pm && dev->driver->pm->resume) { | |
489 | retval = dev->driver->pm->resume(dev); | |
490 | if (fsm->id) { | |
491 | /* default-b */ | |
da8cc167 | 492 | fsl_otg_drv_vbus(fsm, 1); |
0807c500 LY |
493 | /* |
494 | * Workaround: b_host can't driver | |
495 | * vbus, but PP in PORTSC needs to | |
496 | * be 1 for host to work. | |
497 | * So we set drv_vbus bit in | |
498 | * transceiver to 0 thru ULPI. | |
499 | */ | |
500 | write_ulpi(0x0c, 0x20); | |
501 | } | |
502 | } | |
503 | ||
504 | otg_dev->host_working = 1; | |
505 | } | |
506 | } else { | |
507 | /* stop fsl usb host controller */ | |
508 | if (!otg_dev->host_working) | |
509 | goto end; | |
510 | else { | |
511 | VDBG("host off......\n"); | |
512 | if (dev && dev->driver) { | |
513 | if (dev->driver->pm && dev->driver->pm->suspend) | |
514 | retval = dev->driver->pm->suspend(dev); | |
515 | if (fsm->id) | |
516 | /* default-b */ | |
da8cc167 | 517 | fsl_otg_drv_vbus(fsm, 0); |
0807c500 LY |
518 | } |
519 | otg_dev->host_working = 0; | |
520 | } | |
521 | } | |
522 | end: | |
523 | return retval; | |
524 | } | |
525 | ||
526 | /* | |
527 | * Call suspend and resume function in udc driver | |
528 | * to stop and start udc driver. | |
529 | */ | |
530 | int fsl_otg_start_gadget(struct otg_fsm *fsm, int on) | |
531 | { | |
7e062c0f | 532 | struct usb_otg *otg = fsm->otg; |
0807c500 LY |
533 | struct device *dev; |
534 | ||
7e062c0f | 535 | if (!otg->gadget || !otg->gadget->dev.parent) |
0807c500 LY |
536 | return -ENODEV; |
537 | ||
538 | VDBG("gadget %s\n", on ? "on" : "off"); | |
7e062c0f | 539 | dev = otg->gadget->dev.parent; |
0807c500 LY |
540 | |
541 | if (on) { | |
542 | if (dev->driver->resume) | |
543 | dev->driver->resume(dev); | |
544 | } else { | |
545 | if (dev->driver->suspend) | |
546 | dev->driver->suspend(dev, otg_suspend_state); | |
547 | } | |
548 | ||
549 | return 0; | |
550 | } | |
551 | ||
552 | /* | |
553 | * Called by initialization code of host driver. Register host controller | |
554 | * to the OTG. Suspend host for OTG role detection. | |
555 | */ | |
7e062c0f | 556 | static int fsl_otg_set_host(struct usb_otg *otg, struct usb_bus *host) |
0807c500 | 557 | { |
58add6ca WY |
558 | struct fsl_otg *otg_dev; |
559 | ||
560 | if (!otg) | |
561 | return -ENODEV; | |
0807c500 | 562 | |
19c1eac2 | 563 | otg_dev = container_of(otg->usb_phy, struct fsl_otg, phy); |
58add6ca | 564 | if (otg_dev != fsl_otg_dev) |
0807c500 LY |
565 | return -ENODEV; |
566 | ||
7e062c0f | 567 | otg->host = host; |
0807c500 LY |
568 | |
569 | otg_dev->fsm.a_bus_drop = 0; | |
570 | otg_dev->fsm.a_bus_req = 1; | |
571 | ||
572 | if (host) { | |
573 | VDBG("host off......\n"); | |
574 | ||
7e062c0f HK |
575 | otg->host->otg_port = fsl_otg_initdata.otg_port; |
576 | otg->host->is_b_host = otg_dev->fsm.id; | |
0807c500 | 577 | /* |
37ebb549 | 578 | * must leave time for hub_wq to finish its thing |
0807c500 LY |
579 | * before yanking the host driver out from under it, |
580 | * so suspend the host after a short delay. | |
581 | */ | |
582 | otg_dev->host_working = 1; | |
583 | schedule_delayed_work(&otg_dev->otg_event, 100); | |
584 | return 0; | |
585 | } else { | |
586 | /* host driver going away */ | |
587 | if (!(fsl_readl(&otg_dev->dr_mem_map->otgsc) & | |
588 | OTGSC_STS_USB_ID)) { | |
589 | /* Mini-A cable connected */ | |
590 | struct otg_fsm *fsm = &otg_dev->fsm; | |
591 | ||
e5ba1c02 | 592 | otg->state = OTG_STATE_UNDEFINED; |
0807c500 LY |
593 | fsm->protocol = PROTO_UNDEF; |
594 | } | |
595 | } | |
596 | ||
597 | otg_dev->host_working = 0; | |
598 | ||
599 | otg_statemachine(&otg_dev->fsm); | |
600 | ||
601 | return 0; | |
602 | } | |
603 | ||
604 | /* Called by initialization code of udc. Register udc to OTG. */ | |
7e062c0f HK |
605 | static int fsl_otg_set_peripheral(struct usb_otg *otg, |
606 | struct usb_gadget *gadget) | |
0807c500 | 607 | { |
58add6ca | 608 | struct fsl_otg *otg_dev; |
0807c500 | 609 | |
58add6ca WY |
610 | if (!otg) |
611 | return -ENODEV; | |
612 | ||
19c1eac2 | 613 | otg_dev = container_of(otg->usb_phy, struct fsl_otg, phy); |
0807c500 LY |
614 | VDBG("otg_dev 0x%x\n", (int)otg_dev); |
615 | VDBG("fsl_otg_dev 0x%x\n", (int)fsl_otg_dev); | |
58add6ca | 616 | if (otg_dev != fsl_otg_dev) |
0807c500 LY |
617 | return -ENODEV; |
618 | ||
619 | if (!gadget) { | |
7e062c0f HK |
620 | if (!otg->default_a) |
621 | otg->gadget->ops->vbus_draw(otg->gadget, 0); | |
622 | usb_gadget_vbus_disconnect(otg->gadget); | |
623 | otg->gadget = 0; | |
0807c500 LY |
624 | otg_dev->fsm.b_bus_req = 0; |
625 | otg_statemachine(&otg_dev->fsm); | |
626 | return 0; | |
627 | } | |
628 | ||
7e062c0f HK |
629 | otg->gadget = gadget; |
630 | otg->gadget->is_a_peripheral = !otg_dev->fsm.id; | |
0807c500 LY |
631 | |
632 | otg_dev->fsm.b_bus_req = 1; | |
633 | ||
634 | /* start the gadget right away if the ID pin says Mini-B */ | |
523e531e | 635 | pr_debug("ID pin=%d\n", otg_dev->fsm.id); |
0807c500 LY |
636 | if (otg_dev->fsm.id == 1) { |
637 | fsl_otg_start_host(&otg_dev->fsm, 0); | |
638 | otg_drv_vbus(&otg_dev->fsm, 0); | |
639 | fsl_otg_start_gadget(&otg_dev->fsm, 1); | |
640 | } | |
641 | ||
642 | return 0; | |
643 | } | |
644 | ||
645 | /* Set OTG port power, only for B-device */ | |
7e062c0f | 646 | static int fsl_otg_set_power(struct usb_phy *phy, unsigned mA) |
0807c500 LY |
647 | { |
648 | if (!fsl_otg_dev) | |
649 | return -ENODEV; | |
e5ba1c02 | 650 | if (phy->otg->state == OTG_STATE_B_PERIPHERAL) |
0807c500 LY |
651 | pr_info("FSL OTG: Draw %d mA\n", mA); |
652 | ||
653 | return 0; | |
654 | } | |
655 | ||
656 | /* | |
657 | * Delayed pin detect interrupt processing. | |
658 | * | |
659 | * When the Mini-A cable is disconnected from the board, | |
42b2aa86 | 660 | * the pin-detect interrupt happens before the disconnect |
0807c500 LY |
661 | * interrupts for the connected device(s). In order to |
662 | * process the disconnect interrupt(s) prior to switching | |
663 | * roles, the pin-detect interrupts are delayed, and handled | |
664 | * by this routine. | |
665 | */ | |
666 | static void fsl_otg_event(struct work_struct *work) | |
667 | { | |
668 | struct fsl_otg *og = container_of(work, struct fsl_otg, otg_event.work); | |
669 | struct otg_fsm *fsm = &og->fsm; | |
670 | ||
671 | if (fsm->id) { /* switch to gadget */ | |
672 | fsl_otg_start_host(fsm, 0); | |
673 | otg_drv_vbus(fsm, 0); | |
674 | fsl_otg_start_gadget(fsm, 1); | |
675 | } | |
676 | } | |
677 | ||
678 | /* B-device start SRP */ | |
7e062c0f | 679 | static int fsl_otg_start_srp(struct usb_otg *otg) |
0807c500 | 680 | { |
58add6ca WY |
681 | struct fsl_otg *otg_dev; |
682 | ||
e5ba1c02 | 683 | if (!otg || otg->state != OTG_STATE_B_IDLE) |
58add6ca | 684 | return -ENODEV; |
0807c500 | 685 | |
19c1eac2 | 686 | otg_dev = container_of(otg->usb_phy, struct fsl_otg, phy); |
58add6ca | 687 | if (otg_dev != fsl_otg_dev) |
0807c500 LY |
688 | return -ENODEV; |
689 | ||
690 | otg_dev->fsm.b_bus_req = 1; | |
691 | otg_statemachine(&otg_dev->fsm); | |
692 | ||
693 | return 0; | |
694 | } | |
695 | ||
696 | /* A_host suspend will call this function to start hnp */ | |
7e062c0f | 697 | static int fsl_otg_start_hnp(struct usb_otg *otg) |
0807c500 | 698 | { |
58add6ca WY |
699 | struct fsl_otg *otg_dev; |
700 | ||
701 | if (!otg) | |
702 | return -ENODEV; | |
0807c500 | 703 | |
19c1eac2 | 704 | otg_dev = container_of(otg->usb_phy, struct fsl_otg, phy); |
58add6ca | 705 | if (otg_dev != fsl_otg_dev) |
0807c500 LY |
706 | return -ENODEV; |
707 | ||
523e531e | 708 | pr_debug("start_hnp...\n"); |
0807c500 LY |
709 | |
710 | /* clear a_bus_req to enter a_suspend state */ | |
711 | otg_dev->fsm.a_bus_req = 0; | |
712 | otg_statemachine(&otg_dev->fsm); | |
713 | ||
714 | return 0; | |
715 | } | |
716 | ||
717 | /* | |
718 | * Interrupt handler. OTG/host/peripheral share the same int line. | |
719 | * OTG driver clears OTGSC interrupts and leaves USB interrupts | |
720 | * intact. It needs to have knowledge of some USB interrupts | |
721 | * such as port change. | |
722 | */ | |
723 | irqreturn_t fsl_otg_isr(int irq, void *dev_id) | |
724 | { | |
725 | struct otg_fsm *fsm = &((struct fsl_otg *)dev_id)->fsm; | |
7e062c0f | 726 | struct usb_otg *otg = ((struct fsl_otg *)dev_id)->phy.otg; |
0807c500 LY |
727 | u32 otg_int_src, otg_sc; |
728 | ||
729 | otg_sc = fsl_readl(&usb_dr_regs->otgsc); | |
730 | otg_int_src = otg_sc & OTGSC_INTSTS_MASK & (otg_sc >> 8); | |
731 | ||
732 | /* Only clear otg interrupts */ | |
733 | fsl_writel(otg_sc, &usb_dr_regs->otgsc); | |
734 | ||
735 | /*FIXME: ID change not generate when init to 0 */ | |
736 | fsm->id = (otg_sc & OTGSC_STS_USB_ID) ? 1 : 0; | |
737 | otg->default_a = (fsm->id == 0); | |
738 | ||
739 | /* process OTG interrupts */ | |
740 | if (otg_int_src) { | |
741 | if (otg_int_src & OTGSC_INTSTS_USB_ID) { | |
742 | fsm->id = (otg_sc & OTGSC_STS_USB_ID) ? 1 : 0; | |
743 | otg->default_a = (fsm->id == 0); | |
744 | /* clear conn information */ | |
745 | if (fsm->id) | |
746 | fsm->b_conn = 0; | |
747 | else | |
748 | fsm->a_conn = 0; | |
749 | ||
750 | if (otg->host) | |
751 | otg->host->is_b_host = fsm->id; | |
752 | if (otg->gadget) | |
753 | otg->gadget->is_a_peripheral = !fsm->id; | |
754 | VDBG("ID int (ID is %d)\n", fsm->id); | |
755 | ||
756 | if (fsm->id) { /* switch to gadget */ | |
757 | schedule_delayed_work( | |
758 | &((struct fsl_otg *)dev_id)->otg_event, | |
759 | 100); | |
760 | } else { /* switch to host */ | |
761 | cancel_delayed_work(& | |
762 | ((struct fsl_otg *)dev_id)-> | |
763 | otg_event); | |
764 | fsl_otg_start_gadget(fsm, 0); | |
765 | otg_drv_vbus(fsm, 1); | |
766 | fsl_otg_start_host(fsm, 1); | |
767 | } | |
768 | return IRQ_HANDLED; | |
769 | } | |
770 | } | |
771 | return IRQ_NONE; | |
772 | } | |
773 | ||
774 | static struct otg_fsm_ops fsl_otg_ops = { | |
775 | .chrg_vbus = fsl_otg_chrg_vbus, | |
776 | .drv_vbus = fsl_otg_drv_vbus, | |
777 | .loc_conn = fsl_otg_loc_conn, | |
778 | .loc_sof = fsl_otg_loc_sof, | |
779 | .start_pulse = fsl_otg_start_pulse, | |
780 | ||
f6de27ee AT |
781 | .add_timer = fsl_otg_fsm_add_timer, |
782 | .del_timer = fsl_otg_fsm_del_timer, | |
0807c500 LY |
783 | |
784 | .start_host = fsl_otg_start_host, | |
785 | .start_gadget = fsl_otg_start_gadget, | |
786 | }; | |
787 | ||
788 | /* Initialize the global variable fsl_otg_dev and request IRQ for OTG */ | |
789 | static int fsl_otg_conf(struct platform_device *pdev) | |
790 | { | |
791 | struct fsl_otg *fsl_otg_tc; | |
792 | int status; | |
793 | ||
794 | if (fsl_otg_dev) | |
795 | return 0; | |
796 | ||
797 | /* allocate space to fsl otg device */ | |
798 | fsl_otg_tc = kzalloc(sizeof(struct fsl_otg), GFP_KERNEL); | |
799 | if (!fsl_otg_tc) | |
800 | return -ENOMEM; | |
801 | ||
7e062c0f HK |
802 | fsl_otg_tc->phy.otg = kzalloc(sizeof(struct usb_otg), GFP_KERNEL); |
803 | if (!fsl_otg_tc->phy.otg) { | |
804 | kfree(fsl_otg_tc); | |
805 | return -ENOMEM; | |
806 | } | |
807 | ||
0807c500 LY |
808 | INIT_DELAYED_WORK(&fsl_otg_tc->otg_event, fsl_otg_event); |
809 | ||
810 | INIT_LIST_HEAD(&active_timers); | |
811 | status = fsl_otg_init_timers(&fsl_otg_tc->fsm); | |
812 | if (status) { | |
813 | pr_info("Couldn't init OTG timers\n"); | |
814 | goto err; | |
815 | } | |
16e569e9 | 816 | mutex_init(&fsl_otg_tc->fsm.lock); |
0807c500 LY |
817 | |
818 | /* Set OTG state machine operations */ | |
819 | fsl_otg_tc->fsm.ops = &fsl_otg_ops; | |
820 | ||
821 | /* initialize the otg structure */ | |
7e062c0f | 822 | fsl_otg_tc->phy.label = DRIVER_DESC; |
1abd8b31 | 823 | fsl_otg_tc->phy.dev = &pdev->dev; |
7e062c0f HK |
824 | fsl_otg_tc->phy.set_power = fsl_otg_set_power; |
825 | ||
19c1eac2 | 826 | fsl_otg_tc->phy.otg->usb_phy = &fsl_otg_tc->phy; |
7e062c0f HK |
827 | fsl_otg_tc->phy.otg->set_host = fsl_otg_set_host; |
828 | fsl_otg_tc->phy.otg->set_peripheral = fsl_otg_set_peripheral; | |
829 | fsl_otg_tc->phy.otg->start_hnp = fsl_otg_start_hnp; | |
830 | fsl_otg_tc->phy.otg->start_srp = fsl_otg_start_srp; | |
0807c500 LY |
831 | |
832 | fsl_otg_dev = fsl_otg_tc; | |
833 | ||
834 | /* Store the otg transceiver */ | |
662dca54 | 835 | status = usb_add_phy(&fsl_otg_tc->phy, USB_PHY_TYPE_USB2); |
0807c500 LY |
836 | if (status) { |
837 | pr_warn(FSL_OTG_NAME ": unable to register OTG transceiver.\n"); | |
838 | goto err; | |
839 | } | |
840 | ||
841 | return 0; | |
842 | err: | |
843 | fsl_otg_uninit_timers(); | |
7e062c0f | 844 | kfree(fsl_otg_tc->phy.otg); |
0807c500 LY |
845 | kfree(fsl_otg_tc); |
846 | return status; | |
847 | } | |
848 | ||
849 | /* OTG Initialization */ | |
850 | int usb_otg_start(struct platform_device *pdev) | |
851 | { | |
852 | struct fsl_otg *p_otg; | |
662dca54 | 853 | struct usb_phy *otg_trans = usb_get_phy(USB_PHY_TYPE_USB2); |
0807c500 LY |
854 | struct otg_fsm *fsm; |
855 | int status; | |
856 | struct resource *res; | |
857 | u32 temp; | |
19f9e188 | 858 | struct fsl_usb2_platform_data *pdata = dev_get_platdata(&pdev->dev); |
0807c500 | 859 | |
7e062c0f | 860 | p_otg = container_of(otg_trans, struct fsl_otg, phy); |
0807c500 LY |
861 | fsm = &p_otg->fsm; |
862 | ||
863 | /* Initialize the state machine structure with default values */ | |
864 | SET_OTG_STATE(otg_trans, OTG_STATE_UNDEFINED); | |
7e062c0f | 865 | fsm->otg = p_otg->phy.otg; |
0807c500 LY |
866 | |
867 | /* We don't require predefined MEM/IRQ resource index */ | |
868 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); | |
869 | if (!res) | |
870 | return -ENXIO; | |
871 | ||
872 | /* We don't request_mem_region here to enable resource sharing | |
873 | * with host/device */ | |
874 | ||
875 | usb_dr_regs = ioremap(res->start, sizeof(struct usb_dr_mmap)); | |
876 | p_otg->dr_mem_map = (struct usb_dr_mmap *)usb_dr_regs; | |
877 | pdata->regs = (void *)usb_dr_regs; | |
878 | ||
879 | if (pdata->init && pdata->init(pdev) != 0) | |
880 | return -EINVAL; | |
881 | ||
882 | if (pdata->big_endian_mmio) { | |
883 | _fsl_readl = _fsl_readl_be; | |
884 | _fsl_writel = _fsl_writel_be; | |
885 | } else { | |
886 | _fsl_readl = _fsl_readl_le; | |
887 | _fsl_writel = _fsl_writel_le; | |
888 | } | |
889 | ||
890 | /* request irq */ | |
891 | p_otg->irq = platform_get_irq(pdev, 0); | |
892 | status = request_irq(p_otg->irq, fsl_otg_isr, | |
893 | IRQF_SHARED, driver_name, p_otg); | |
894 | if (status) { | |
7e062c0f | 895 | dev_dbg(p_otg->phy.dev, "can't get IRQ %d, error %d\n", |
0807c500 LY |
896 | p_otg->irq, status); |
897 | iounmap(p_otg->dr_mem_map); | |
7e062c0f | 898 | kfree(p_otg->phy.otg); |
0807c500 LY |
899 | kfree(p_otg); |
900 | return status; | |
901 | } | |
902 | ||
903 | /* stop the controller */ | |
904 | temp = fsl_readl(&p_otg->dr_mem_map->usbcmd); | |
905 | temp &= ~USB_CMD_RUN_STOP; | |
906 | fsl_writel(temp, &p_otg->dr_mem_map->usbcmd); | |
907 | ||
908 | /* reset the controller */ | |
909 | temp = fsl_readl(&p_otg->dr_mem_map->usbcmd); | |
910 | temp |= USB_CMD_CTRL_RESET; | |
911 | fsl_writel(temp, &p_otg->dr_mem_map->usbcmd); | |
912 | ||
913 | /* wait reset completed */ | |
914 | while (fsl_readl(&p_otg->dr_mem_map->usbcmd) & USB_CMD_CTRL_RESET) | |
915 | ; | |
916 | ||
917 | /* configure the VBUSHS as IDLE(both host and device) */ | |
918 | temp = USB_MODE_STREAM_DISABLE | (pdata->es ? USB_MODE_ES : 0); | |
919 | fsl_writel(temp, &p_otg->dr_mem_map->usbmode); | |
920 | ||
921 | /* configure PHY interface */ | |
922 | temp = fsl_readl(&p_otg->dr_mem_map->portsc); | |
923 | temp &= ~(PORTSC_PHY_TYPE_SEL | PORTSC_PTW); | |
924 | switch (pdata->phy_mode) { | |
925 | case FSL_USB2_PHY_ULPI: | |
926 | temp |= PORTSC_PTS_ULPI; | |
927 | break; | |
928 | case FSL_USB2_PHY_UTMI_WIDE: | |
929 | temp |= PORTSC_PTW_16BIT; | |
930 | /* fall through */ | |
931 | case FSL_USB2_PHY_UTMI: | |
932 | temp |= PORTSC_PTS_UTMI; | |
933 | /* fall through */ | |
934 | default: | |
935 | break; | |
936 | } | |
937 | fsl_writel(temp, &p_otg->dr_mem_map->portsc); | |
938 | ||
939 | if (pdata->have_sysif_regs) { | |
940 | /* configure control enable IO output, big endian register */ | |
941 | temp = __raw_readl(&p_otg->dr_mem_map->control); | |
942 | temp |= USB_CTRL_IOENB; | |
943 | __raw_writel(temp, &p_otg->dr_mem_map->control); | |
944 | } | |
945 | ||
946 | /* disable all interrupt and clear all OTGSC status */ | |
947 | temp = fsl_readl(&p_otg->dr_mem_map->otgsc); | |
948 | temp &= ~OTGSC_INTERRUPT_ENABLE_BITS_MASK; | |
949 | temp |= OTGSC_INTERRUPT_STATUS_BITS_MASK | OTGSC_CTRL_VBUS_DISCHARGE; | |
950 | fsl_writel(temp, &p_otg->dr_mem_map->otgsc); | |
951 | ||
952 | /* | |
953 | * The identification (id) input is FALSE when a Mini-A plug is inserted | |
954 | * in the devices Mini-AB receptacle. Otherwise, this input is TRUE. | |
955 | * Also: record initial state of ID pin | |
956 | */ | |
957 | if (fsl_readl(&p_otg->dr_mem_map->otgsc) & OTGSC_STS_USB_ID) { | |
e5ba1c02 | 958 | p_otg->phy.otg->state = OTG_STATE_UNDEFINED; |
0807c500 LY |
959 | p_otg->fsm.id = 1; |
960 | } else { | |
e5ba1c02 | 961 | p_otg->phy.otg->state = OTG_STATE_A_IDLE; |
0807c500 LY |
962 | p_otg->fsm.id = 0; |
963 | } | |
964 | ||
523e531e | 965 | pr_debug("initial ID pin=%d\n", p_otg->fsm.id); |
0807c500 LY |
966 | |
967 | /* enable OTG ID pin interrupt */ | |
968 | temp = fsl_readl(&p_otg->dr_mem_map->otgsc); | |
969 | temp |= OTGSC_INTR_USB_ID_EN; | |
970 | temp &= ~(OTGSC_CTRL_VBUS_DISCHARGE | OTGSC_INTR_1MS_TIMER_EN); | |
971 | fsl_writel(temp, &p_otg->dr_mem_map->otgsc); | |
972 | ||
973 | return 0; | |
974 | } | |
975 | ||
976 | /* | |
977 | * state file in sysfs | |
978 | */ | |
979 | static int show_fsl_usb2_otg_state(struct device *dev, | |
980 | struct device_attribute *attr, char *buf) | |
981 | { | |
982 | struct otg_fsm *fsm = &fsl_otg_dev->fsm; | |
983 | char *next = buf; | |
984 | unsigned size = PAGE_SIZE; | |
0807c500 LY |
985 | int t; |
986 | ||
16e569e9 | 987 | mutex_lock(&fsm->lock); |
0807c500 LY |
988 | |
989 | /* basic driver infomation */ | |
990 | t = scnprintf(next, size, | |
991 | DRIVER_DESC "\n" "fsl_usb2_otg version: %s\n\n", | |
992 | DRIVER_VERSION); | |
993 | size -= t; | |
994 | next += t; | |
995 | ||
996 | /* Registers */ | |
997 | t = scnprintf(next, size, | |
998 | "OTGSC: 0x%08x\n" | |
999 | "PORTSC: 0x%08x\n" | |
1000 | "USBMODE: 0x%08x\n" | |
1001 | "USBCMD: 0x%08x\n" | |
1002 | "USBSTS: 0x%08x\n" | |
1003 | "USBINTR: 0x%08x\n", | |
1004 | fsl_readl(&usb_dr_regs->otgsc), | |
1005 | fsl_readl(&usb_dr_regs->portsc), | |
1006 | fsl_readl(&usb_dr_regs->usbmode), | |
1007 | fsl_readl(&usb_dr_regs->usbcmd), | |
1008 | fsl_readl(&usb_dr_regs->usbsts), | |
1009 | fsl_readl(&usb_dr_regs->usbintr)); | |
1010 | size -= t; | |
1011 | next += t; | |
1012 | ||
1013 | /* State */ | |
1014 | t = scnprintf(next, size, | |
1015 | "OTG state: %s\n\n", | |
e5ba1c02 | 1016 | usb_otg_state_string(fsl_otg_dev->phy.otg->state)); |
0807c500 LY |
1017 | size -= t; |
1018 | next += t; | |
1019 | ||
1020 | /* State Machine Variables */ | |
1021 | t = scnprintf(next, size, | |
1022 | "a_bus_req: %d\n" | |
1023 | "b_bus_req: %d\n" | |
1024 | "a_bus_resume: %d\n" | |
1025 | "a_bus_suspend: %d\n" | |
1026 | "a_conn: %d\n" | |
1027 | "a_sess_vld: %d\n" | |
1028 | "a_srp_det: %d\n" | |
1029 | "a_vbus_vld: %d\n" | |
1030 | "b_bus_resume: %d\n" | |
1031 | "b_bus_suspend: %d\n" | |
1032 | "b_conn: %d\n" | |
1033 | "b_se0_srp: %d\n" | |
68041785 | 1034 | "b_ssend_srp: %d\n" |
0807c500 LY |
1035 | "b_sess_vld: %d\n" |
1036 | "id: %d\n", | |
1037 | fsm->a_bus_req, | |
1038 | fsm->b_bus_req, | |
1039 | fsm->a_bus_resume, | |
1040 | fsm->a_bus_suspend, | |
1041 | fsm->a_conn, | |
1042 | fsm->a_sess_vld, | |
1043 | fsm->a_srp_det, | |
1044 | fsm->a_vbus_vld, | |
1045 | fsm->b_bus_resume, | |
1046 | fsm->b_bus_suspend, | |
1047 | fsm->b_conn, | |
1048 | fsm->b_se0_srp, | |
68041785 | 1049 | fsm->b_ssend_srp, |
0807c500 LY |
1050 | fsm->b_sess_vld, |
1051 | fsm->id); | |
1052 | size -= t; | |
1053 | next += t; | |
1054 | ||
16e569e9 | 1055 | mutex_unlock(&fsm->lock); |
0807c500 LY |
1056 | |
1057 | return PAGE_SIZE - size; | |
1058 | } | |
1059 | ||
1060 | static DEVICE_ATTR(fsl_usb2_otg_state, S_IRUGO, show_fsl_usb2_otg_state, NULL); | |
1061 | ||
1062 | ||
1063 | /* Char driver interface to control some OTG input */ | |
1064 | ||
1065 | /* | |
1066 | * Handle some ioctl command, such as get otg | |
1067 | * status and set host suspend | |
1068 | */ | |
1069 | static long fsl_otg_ioctl(struct file *file, unsigned int cmd, | |
1070 | unsigned long arg) | |
1071 | { | |
1072 | u32 retval = 0; | |
1073 | ||
1074 | switch (cmd) { | |
1075 | case GET_OTG_STATUS: | |
1076 | retval = fsl_otg_dev->host_working; | |
1077 | break; | |
1078 | ||
1079 | case SET_A_SUSPEND_REQ: | |
cff4dab4 | 1080 | fsl_otg_dev->fsm.a_suspend_req_inf = arg; |
0807c500 LY |
1081 | break; |
1082 | ||
1083 | case SET_A_BUS_DROP: | |
1084 | fsl_otg_dev->fsm.a_bus_drop = arg; | |
1085 | break; | |
1086 | ||
1087 | case SET_A_BUS_REQ: | |
1088 | fsl_otg_dev->fsm.a_bus_req = arg; | |
1089 | break; | |
1090 | ||
1091 | case SET_B_BUS_REQ: | |
1092 | fsl_otg_dev->fsm.b_bus_req = arg; | |
1093 | break; | |
1094 | ||
1095 | default: | |
1096 | break; | |
1097 | } | |
1098 | ||
1099 | otg_statemachine(&fsl_otg_dev->fsm); | |
1100 | ||
1101 | return retval; | |
1102 | } | |
1103 | ||
1104 | static int fsl_otg_open(struct inode *inode, struct file *file) | |
1105 | { | |
1106 | return 0; | |
1107 | } | |
1108 | ||
1109 | static int fsl_otg_release(struct inode *inode, struct file *file) | |
1110 | { | |
1111 | return 0; | |
1112 | } | |
1113 | ||
1114 | static const struct file_operations otg_fops = { | |
1115 | .owner = THIS_MODULE, | |
1116 | .llseek = NULL, | |
1117 | .read = NULL, | |
1118 | .write = NULL, | |
1119 | .unlocked_ioctl = fsl_otg_ioctl, | |
1120 | .open = fsl_otg_open, | |
1121 | .release = fsl_otg_release, | |
1122 | }; | |
1123 | ||
41ac7b3a | 1124 | static int fsl_otg_probe(struct platform_device *pdev) |
0807c500 LY |
1125 | { |
1126 | int ret; | |
1127 | ||
19f9e188 | 1128 | if (!dev_get_platdata(&pdev->dev)) |
0807c500 LY |
1129 | return -ENODEV; |
1130 | ||
1131 | /* configure the OTG */ | |
1132 | ret = fsl_otg_conf(pdev); | |
1133 | if (ret) { | |
1134 | dev_err(&pdev->dev, "Couldn't configure OTG module\n"); | |
1135 | return ret; | |
1136 | } | |
1137 | ||
1138 | /* start OTG */ | |
1139 | ret = usb_otg_start(pdev); | |
1140 | if (ret) { | |
1141 | dev_err(&pdev->dev, "Can't init FSL OTG device\n"); | |
1142 | return ret; | |
1143 | } | |
1144 | ||
1145 | ret = register_chrdev(FSL_OTG_MAJOR, FSL_OTG_NAME, &otg_fops); | |
1146 | if (ret) { | |
1147 | dev_err(&pdev->dev, "unable to register FSL OTG device\n"); | |
1148 | return ret; | |
1149 | } | |
1150 | ||
1151 | ret = device_create_file(&pdev->dev, &dev_attr_fsl_usb2_otg_state); | |
1152 | if (ret) | |
1153 | dev_warn(&pdev->dev, "Can't register sysfs attribute\n"); | |
1154 | ||
1155 | return ret; | |
1156 | } | |
1157 | ||
fb4e98ab | 1158 | static int fsl_otg_remove(struct platform_device *pdev) |
0807c500 | 1159 | { |
19f9e188 | 1160 | struct fsl_usb2_platform_data *pdata = dev_get_platdata(&pdev->dev); |
0807c500 | 1161 | |
662dca54 | 1162 | usb_remove_phy(&fsl_otg_dev->phy); |
0807c500 LY |
1163 | free_irq(fsl_otg_dev->irq, fsl_otg_dev); |
1164 | ||
1165 | iounmap((void *)usb_dr_regs); | |
1166 | ||
1167 | fsl_otg_uninit_timers(); | |
7e062c0f | 1168 | kfree(fsl_otg_dev->phy.otg); |
0807c500 LY |
1169 | kfree(fsl_otg_dev); |
1170 | ||
1171 | device_remove_file(&pdev->dev, &dev_attr_fsl_usb2_otg_state); | |
1172 | ||
1173 | unregister_chrdev(FSL_OTG_MAJOR, FSL_OTG_NAME); | |
1174 | ||
1175 | if (pdata->exit) | |
1176 | pdata->exit(pdev); | |
1177 | ||
1178 | return 0; | |
1179 | } | |
1180 | ||
1181 | struct platform_driver fsl_otg_driver = { | |
1182 | .probe = fsl_otg_probe, | |
7690417d | 1183 | .remove = fsl_otg_remove, |
0807c500 LY |
1184 | .driver = { |
1185 | .name = driver_name, | |
1186 | .owner = THIS_MODULE, | |
1187 | }, | |
1188 | }; | |
1189 | ||
cc27c96c | 1190 | module_platform_driver(fsl_otg_driver); |
0807c500 LY |
1191 | |
1192 | MODULE_DESCRIPTION(DRIVER_INFO); | |
1193 | MODULE_AUTHOR(DRIVER_AUTHOR); | |
1194 | MODULE_LICENSE("GPL"); |