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b6e06983 IPG |
1 | /* |
2 | * Wireless Host Controller: Radio Control Interface (WHCI v0.95[2.3]) | |
3 | * Radio Control command/event transport to the UWB stack | |
4 | * | |
5 | * Copyright (C) 2005-2006 Intel Corporation | |
6 | * Inaky Perez-Gonzalez <inaky.perez-gonzalez@intel.com> | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or | |
9 | * modify it under the terms of the GNU General Public License version | |
10 | * 2 as published by the Free Software Foundation. | |
11 | * | |
12 | * This program is distributed in the hope that it will be useful, | |
13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | * GNU General Public License for more details. | |
16 | * | |
17 | * You should have received a copy of the GNU General Public License | |
18 | * along with this program; if not, write to the Free Software | |
19 | * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA | |
20 | * 02110-1301, USA. | |
21 | * | |
22 | * | |
23 | * Initialize and hook up the Radio Control interface. | |
24 | * | |
25 | * For each device probed, creates an 'struct whcrc' which contains | |
26 | * just the representation of the UWB Radio Controller, and the logic | |
27 | * for reading notifications and passing them to the UWB Core. | |
28 | * | |
29 | * So we initialize all of those, register the UWB Radio Controller | |
30 | * and setup the notification/event handle to pipe the notifications | |
31 | * to the UWB management Daemon. | |
32 | * | |
33 | * Once uwb_rc_add() is called, the UWB stack takes control, resets | |
34 | * the radio and readies the device to take commands the UWB | |
35 | * API/user-space. | |
36 | * | |
37 | * Note this driver is just a transport driver; the commands are | |
38 | * formed at the UWB stack and given to this driver who will deliver | |
39 | * them to the hw and transfer the replies/notifications back to the | |
40 | * UWB stack through the UWB daemon (UWBD). | |
41 | */ | |
b6e06983 IPG |
42 | #include <linux/init.h> |
43 | #include <linux/module.h> | |
44 | #include <linux/pci.h> | |
45 | #include <linux/dma-mapping.h> | |
46 | #include <linux/interrupt.h> | |
47 | #include <linux/workqueue.h> | |
48 | #include <linux/uwb.h> | |
49 | #include <linux/uwb/whci.h> | |
50 | #include <linux/uwb/umc.h> | |
51 | #include "uwb-internal.h" | |
52 | ||
53 | #define D_LOCAL 0 | |
54 | #include <linux/uwb/debug.h> | |
55 | ||
56 | /** | |
57 | * Descriptor for an instance of the UWB Radio Control Driver that | |
58 | * attaches to the URC interface of the WHCI PCI card. | |
59 | * | |
60 | * Unless there is a lock specific to the 'data members', all access | |
61 | * is protected by uwb_rc->mutex. | |
62 | */ | |
63 | struct whcrc { | |
64 | struct umc_dev *umc_dev; | |
65 | struct uwb_rc *uwb_rc; /* UWB host controller */ | |
66 | ||
67 | unsigned long area; | |
68 | void __iomem *rc_base; | |
69 | size_t rc_len; | |
70 | spinlock_t irq_lock; | |
71 | ||
72 | void *evt_buf, *cmd_buf; | |
73 | dma_addr_t evt_dma_buf, cmd_dma_buf; | |
74 | wait_queue_head_t cmd_wq; | |
75 | struct work_struct event_work; | |
76 | }; | |
77 | ||
78 | /** | |
79 | * Execute an UWB RC command on WHCI/RC | |
80 | * | |
81 | * @rc: Instance of a Radio Controller that is a whcrc | |
82 | * @cmd: Buffer containing the RCCB and payload to execute | |
83 | * @cmd_size: Size of the command buffer. | |
84 | * | |
85 | * We copy the command into whcrc->cmd_buf (as it is pretty and | |
86 | * aligned`and physically contiguous) and then press the right keys in | |
87 | * the controller's URCCMD register to get it to read it. We might | |
88 | * have to wait for the cmd_sem to be open to us. | |
89 | * | |
90 | * NOTE: rc's mutex has to be locked | |
91 | */ | |
92 | static int whcrc_cmd(struct uwb_rc *uwb_rc, | |
93 | const struct uwb_rccb *cmd, size_t cmd_size) | |
94 | { | |
95 | int result = 0; | |
96 | struct whcrc *whcrc = uwb_rc->priv; | |
97 | struct device *dev = &whcrc->umc_dev->dev; | |
98 | u32 urccmd; | |
99 | ||
100 | d_fnstart(3, dev, "(%p, %p, %zu)\n", uwb_rc, cmd, cmd_size); | |
101 | might_sleep(); | |
102 | ||
103 | if (cmd_size >= 4096) { | |
104 | result = -E2BIG; | |
105 | goto error; | |
106 | } | |
107 | ||
108 | /* | |
109 | * If the URC is halted, then the hardware has reset itself. | |
110 | * Attempt to recover by restarting the device and then return | |
111 | * an error as it's likely that the current command isn't | |
112 | * valid for a newly started RC. | |
113 | */ | |
114 | if (le_readl(whcrc->rc_base + URCSTS) & URCSTS_HALTED) { | |
115 | dev_err(dev, "requesting reset of halted radio controller\n"); | |
116 | uwb_rc_reset_all(uwb_rc); | |
117 | result = -EIO; | |
118 | goto error; | |
119 | } | |
120 | ||
121 | result = wait_event_timeout(whcrc->cmd_wq, | |
122 | !(le_readl(whcrc->rc_base + URCCMD) & URCCMD_ACTIVE), HZ/2); | |
123 | if (result == 0) { | |
124 | dev_err(dev, "device is not ready to execute commands\n"); | |
125 | result = -ETIMEDOUT; | |
126 | goto error; | |
127 | } | |
128 | ||
129 | memmove(whcrc->cmd_buf, cmd, cmd_size); | |
130 | le_writeq(whcrc->cmd_dma_buf, whcrc->rc_base + URCCMDADDR); | |
131 | ||
132 | spin_lock(&whcrc->irq_lock); | |
133 | urccmd = le_readl(whcrc->rc_base + URCCMD); | |
134 | urccmd &= ~(URCCMD_EARV | URCCMD_SIZE_MASK); | |
135 | le_writel(urccmd | URCCMD_ACTIVE | URCCMD_IWR | cmd_size, | |
136 | whcrc->rc_base + URCCMD); | |
137 | spin_unlock(&whcrc->irq_lock); | |
138 | ||
139 | error: | |
140 | d_fnend(3, dev, "(%p, %p, %zu) = %d\n", | |
141 | uwb_rc, cmd, cmd_size, result); | |
142 | return result; | |
143 | } | |
144 | ||
145 | static int whcrc_reset(struct uwb_rc *rc) | |
146 | { | |
147 | struct whcrc *whcrc = rc->priv; | |
148 | ||
149 | return umc_controller_reset(whcrc->umc_dev); | |
150 | } | |
151 | ||
152 | /** | |
153 | * Reset event reception mechanism and tell hw we are ready to get more | |
154 | * | |
155 | * We have read all the events in the event buffer, so we are ready to | |
156 | * reset it to the beginning. | |
157 | * | |
158 | * This is only called during initialization or after an event buffer | |
159 | * has been retired. This means we can be sure that event processing | |
160 | * is disabled and it's safe to update the URCEVTADDR register. | |
161 | * | |
162 | * There's no need to wait for the event processing to start as the | |
163 | * URC will not clear URCCMD_ACTIVE until (internal) event buffer | |
164 | * space is available. | |
165 | */ | |
166 | static | |
167 | void whcrc_enable_events(struct whcrc *whcrc) | |
168 | { | |
169 | struct device *dev = &whcrc->umc_dev->dev; | |
170 | u32 urccmd; | |
171 | ||
172 | d_fnstart(4, dev, "(whcrc %p)\n", whcrc); | |
173 | ||
174 | le_writeq(whcrc->evt_dma_buf, whcrc->rc_base + URCEVTADDR); | |
175 | ||
176 | spin_lock(&whcrc->irq_lock); | |
177 | urccmd = le_readl(whcrc->rc_base + URCCMD) & ~URCCMD_ACTIVE; | |
178 | le_writel(urccmd | URCCMD_EARV, whcrc->rc_base + URCCMD); | |
179 | spin_unlock(&whcrc->irq_lock); | |
180 | ||
181 | d_fnend(4, dev, "(whcrc %p) = void\n", whcrc); | |
182 | } | |
183 | ||
184 | static void whcrc_event_work(struct work_struct *work) | |
185 | { | |
186 | struct whcrc *whcrc = container_of(work, struct whcrc, event_work); | |
187 | struct device *dev = &whcrc->umc_dev->dev; | |
188 | size_t size; | |
189 | u64 urcevtaddr; | |
190 | ||
191 | urcevtaddr = le_readq(whcrc->rc_base + URCEVTADDR); | |
192 | size = urcevtaddr & URCEVTADDR_OFFSET_MASK; | |
193 | ||
194 | d_printf(3, dev, "received %zu octet event\n", size); | |
195 | d_dump(4, dev, whcrc->evt_buf, size > 32 ? 32 : size); | |
196 | ||
197 | uwb_rc_neh_grok(whcrc->uwb_rc, whcrc->evt_buf, size); | |
198 | whcrc_enable_events(whcrc); | |
199 | } | |
200 | ||
201 | /** | |
202 | * Catch interrupts? | |
203 | * | |
204 | * We ack inmediately (and expect the hw to do the right thing and | |
205 | * raise another IRQ if things have changed :) | |
206 | */ | |
207 | static | |
208 | irqreturn_t whcrc_irq_cb(int irq, void *_whcrc) | |
209 | { | |
210 | struct whcrc *whcrc = _whcrc; | |
211 | struct device *dev = &whcrc->umc_dev->dev; | |
212 | u32 urcsts; | |
213 | ||
b6e06983 IPG |
214 | urcsts = le_readl(whcrc->rc_base + URCSTS); |
215 | if (!(urcsts & URCSTS_INT_MASK)) | |
216 | return IRQ_NONE; | |
217 | le_writel(urcsts & URCSTS_INT_MASK, whcrc->rc_base + URCSTS); | |
218 | ||
219 | d_printf(4, dev, "acked 0x%08x, urcsts 0x%08x\n", | |
220 | le_readl(whcrc->rc_base + URCSTS), urcsts); | |
221 | ||
b6e06983 IPG |
222 | if (urcsts & URCSTS_HSE) { |
223 | dev_err(dev, "host system error -- hardware halted\n"); | |
224 | /* FIXME: do something sensible here */ | |
225 | goto out; | |
226 | } | |
227 | if (urcsts & URCSTS_ER) { | |
228 | d_printf(3, dev, "ER: event ready\n"); | |
229 | schedule_work(&whcrc->event_work); | |
230 | } | |
231 | if (urcsts & URCSTS_RCI) { | |
232 | d_printf(3, dev, "RCI: ready to execute another command\n"); | |
233 | wake_up_all(&whcrc->cmd_wq); | |
234 | } | |
235 | out: | |
236 | return IRQ_HANDLED; | |
237 | } | |
238 | ||
239 | ||
240 | /** | |
241 | * Initialize a UMC RC interface: map regions, get (shared) IRQ | |
242 | */ | |
243 | static | |
244 | int whcrc_setup_rc_umc(struct whcrc *whcrc) | |
245 | { | |
246 | int result = 0; | |
247 | struct device *dev = &whcrc->umc_dev->dev; | |
248 | struct umc_dev *umc_dev = whcrc->umc_dev; | |
249 | ||
250 | whcrc->area = umc_dev->resource.start; | |
251 | whcrc->rc_len = umc_dev->resource.end - umc_dev->resource.start + 1; | |
252 | result = -EBUSY; | |
253 | if (request_mem_region(whcrc->area, whcrc->rc_len, KBUILD_MODNAME) | |
254 | == NULL) { | |
255 | dev_err(dev, "can't request URC region (%zu bytes @ 0x%lx): %d\n", | |
256 | whcrc->rc_len, whcrc->area, result); | |
257 | goto error_request_region; | |
258 | } | |
259 | ||
260 | whcrc->rc_base = ioremap_nocache(whcrc->area, whcrc->rc_len); | |
261 | if (whcrc->rc_base == NULL) { | |
262 | dev_err(dev, "can't ioremap registers (%zu bytes @ 0x%lx): %d\n", | |
263 | whcrc->rc_len, whcrc->area, result); | |
264 | goto error_ioremap_nocache; | |
265 | } | |
266 | ||
267 | result = request_irq(umc_dev->irq, whcrc_irq_cb, IRQF_SHARED, | |
268 | KBUILD_MODNAME, whcrc); | |
269 | if (result < 0) { | |
270 | dev_err(dev, "can't allocate IRQ %d: %d\n", | |
271 | umc_dev->irq, result); | |
272 | goto error_request_irq; | |
273 | } | |
274 | ||
275 | result = -ENOMEM; | |
276 | whcrc->cmd_buf = dma_alloc_coherent(&umc_dev->dev, PAGE_SIZE, | |
277 | &whcrc->cmd_dma_buf, GFP_KERNEL); | |
278 | if (whcrc->cmd_buf == NULL) { | |
279 | dev_err(dev, "Can't allocate cmd transfer buffer\n"); | |
280 | goto error_cmd_buffer; | |
281 | } | |
282 | ||
283 | whcrc->evt_buf = dma_alloc_coherent(&umc_dev->dev, PAGE_SIZE, | |
284 | &whcrc->evt_dma_buf, GFP_KERNEL); | |
285 | if (whcrc->evt_buf == NULL) { | |
286 | dev_err(dev, "Can't allocate evt transfer buffer\n"); | |
287 | goto error_evt_buffer; | |
288 | } | |
289 | d_printf(3, dev, "UWB RC Interface: %zu bytes at 0x%p, irq %u\n", | |
290 | whcrc->rc_len, whcrc->rc_base, umc_dev->irq); | |
291 | return 0; | |
292 | ||
293 | error_evt_buffer: | |
294 | dma_free_coherent(&umc_dev->dev, PAGE_SIZE, whcrc->cmd_buf, | |
295 | whcrc->cmd_dma_buf); | |
296 | error_cmd_buffer: | |
297 | free_irq(umc_dev->irq, whcrc); | |
298 | error_request_irq: | |
299 | iounmap(whcrc->rc_base); | |
300 | error_ioremap_nocache: | |
301 | release_mem_region(whcrc->area, whcrc->rc_len); | |
302 | error_request_region: | |
303 | return result; | |
304 | } | |
305 | ||
306 | ||
307 | /** | |
308 | * Release RC's UMC resources | |
309 | */ | |
310 | static | |
311 | void whcrc_release_rc_umc(struct whcrc *whcrc) | |
312 | { | |
313 | struct umc_dev *umc_dev = whcrc->umc_dev; | |
314 | ||
315 | dma_free_coherent(&umc_dev->dev, PAGE_SIZE, whcrc->evt_buf, | |
316 | whcrc->evt_dma_buf); | |
317 | dma_free_coherent(&umc_dev->dev, PAGE_SIZE, whcrc->cmd_buf, | |
318 | whcrc->cmd_dma_buf); | |
319 | free_irq(umc_dev->irq, whcrc); | |
320 | iounmap(whcrc->rc_base); | |
321 | release_mem_region(whcrc->area, whcrc->rc_len); | |
322 | } | |
323 | ||
324 | ||
325 | /** | |
326 | * whcrc_start_rc - start a WHCI radio controller | |
327 | * @whcrc: the radio controller to start | |
328 | * | |
329 | * Reset the UMC device, start the radio controller, enable events and | |
330 | * finally enable interrupts. | |
331 | */ | |
332 | static int whcrc_start_rc(struct uwb_rc *rc) | |
333 | { | |
334 | struct whcrc *whcrc = rc->priv; | |
335 | int result = 0; | |
336 | struct device *dev = &whcrc->umc_dev->dev; | |
337 | unsigned long start, duration; | |
338 | ||
339 | /* Reset the thing */ | |
340 | le_writel(URCCMD_RESET, whcrc->rc_base + URCCMD); | |
341 | if (d_test(3)) | |
342 | start = jiffies; | |
343 | if (whci_wait_for(dev, whcrc->rc_base + URCCMD, URCCMD_RESET, 0, | |
344 | 5000, "device to reset at init") < 0) { | |
345 | result = -EBUSY; | |
346 | goto error; | |
347 | } else if (d_test(3)) { | |
348 | duration = jiffies - start; | |
349 | if (duration > msecs_to_jiffies(40)) | |
350 | dev_err(dev, "Device took %ums to " | |
351 | "reset. MAX expected: 40ms\n", | |
352 | jiffies_to_msecs(duration)); | |
353 | } | |
354 | ||
355 | /* Set the event buffer, start the controller (enable IRQs later) */ | |
356 | le_writel(0, whcrc->rc_base + URCINTR); | |
357 | le_writel(URCCMD_RS, whcrc->rc_base + URCCMD); | |
358 | result = -ETIMEDOUT; | |
359 | if (d_test(3)) | |
360 | start = jiffies; | |
361 | if (whci_wait_for(dev, whcrc->rc_base + URCSTS, URCSTS_HALTED, 0, | |
362 | 5000, "device to start") < 0) | |
363 | goto error; | |
364 | if (d_test(3)) { | |
365 | duration = jiffies - start; | |
366 | if (duration > msecs_to_jiffies(40)) | |
367 | dev_err(dev, "Device took %ums to start. " | |
368 | "MAX expected: 40ms\n", | |
369 | jiffies_to_msecs(duration)); | |
370 | } | |
371 | whcrc_enable_events(whcrc); | |
372 | result = 0; | |
373 | le_writel(URCINTR_EN_ALL, whcrc->rc_base + URCINTR); | |
374 | error: | |
375 | return result; | |
376 | } | |
377 | ||
378 | ||
379 | /** | |
380 | * whcrc_stop_rc - stop a WHCI radio controller | |
381 | * @whcrc: the radio controller to stop | |
382 | * | |
383 | * Disable interrupts and cancel any pending event processing work | |
384 | * before clearing the Run/Stop bit. | |
385 | */ | |
386 | static | |
387 | void whcrc_stop_rc(struct uwb_rc *rc) | |
388 | { | |
389 | struct whcrc *whcrc = rc->priv; | |
390 | struct umc_dev *umc_dev = whcrc->umc_dev; | |
391 | ||
392 | le_writel(0, whcrc->rc_base + URCINTR); | |
393 | cancel_work_sync(&whcrc->event_work); | |
394 | ||
395 | le_writel(0, whcrc->rc_base + URCCMD); | |
396 | whci_wait_for(&umc_dev->dev, whcrc->rc_base + URCSTS, | |
397 | URCSTS_HALTED, 0, 40, "URCSTS.HALTED"); | |
398 | } | |
399 | ||
400 | static void whcrc_init(struct whcrc *whcrc) | |
401 | { | |
402 | spin_lock_init(&whcrc->irq_lock); | |
403 | init_waitqueue_head(&whcrc->cmd_wq); | |
404 | INIT_WORK(&whcrc->event_work, whcrc_event_work); | |
405 | } | |
406 | ||
407 | /** | |
408 | * Initialize the radio controller. | |
409 | * | |
410 | * NOTE: we setup whcrc->uwb_rc before calling uwb_rc_add(); in the | |
411 | * IRQ handler we use that to determine if the hw is ready to | |
412 | * handle events. Looks like a race condition, but it really is | |
413 | * not. | |
414 | */ | |
415 | static | |
416 | int whcrc_probe(struct umc_dev *umc_dev) | |
417 | { | |
418 | int result; | |
419 | struct uwb_rc *uwb_rc; | |
420 | struct whcrc *whcrc; | |
421 | struct device *dev = &umc_dev->dev; | |
422 | ||
423 | d_fnstart(3, dev, "(umc_dev %p)\n", umc_dev); | |
424 | result = -ENOMEM; | |
425 | uwb_rc = uwb_rc_alloc(); | |
426 | if (uwb_rc == NULL) { | |
427 | dev_err(dev, "unable to allocate RC instance\n"); | |
428 | goto error_rc_alloc; | |
429 | } | |
430 | whcrc = kzalloc(sizeof(*whcrc), GFP_KERNEL); | |
431 | if (whcrc == NULL) { | |
432 | dev_err(dev, "unable to allocate WHC-RC instance\n"); | |
433 | goto error_alloc; | |
434 | } | |
435 | whcrc_init(whcrc); | |
436 | whcrc->umc_dev = umc_dev; | |
437 | ||
438 | result = whcrc_setup_rc_umc(whcrc); | |
439 | if (result < 0) { | |
440 | dev_err(dev, "Can't setup RC UMC interface: %d\n", result); | |
441 | goto error_setup_rc_umc; | |
442 | } | |
443 | whcrc->uwb_rc = uwb_rc; | |
444 | ||
445 | uwb_rc->owner = THIS_MODULE; | |
446 | uwb_rc->cmd = whcrc_cmd; | |
447 | uwb_rc->reset = whcrc_reset; | |
448 | uwb_rc->start = whcrc_start_rc; | |
449 | uwb_rc->stop = whcrc_stop_rc; | |
450 | ||
451 | result = uwb_rc_add(uwb_rc, dev, whcrc); | |
452 | if (result < 0) | |
453 | goto error_rc_add; | |
454 | umc_set_drvdata(umc_dev, whcrc); | |
455 | d_fnend(3, dev, "(umc_dev %p) = 0\n", umc_dev); | |
456 | return 0; | |
457 | ||
458 | error_rc_add: | |
459 | whcrc_release_rc_umc(whcrc); | |
460 | error_setup_rc_umc: | |
461 | kfree(whcrc); | |
462 | error_alloc: | |
463 | uwb_rc_put(uwb_rc); | |
464 | error_rc_alloc: | |
465 | d_fnend(3, dev, "(umc_dev %p) = %d\n", umc_dev, result); | |
466 | return result; | |
467 | } | |
468 | ||
469 | /** | |
470 | * Clean up the radio control resources | |
471 | * | |
472 | * When we up the command semaphore, everybody possibly held trying to | |
473 | * execute a command should be granted entry and then they'll see the | |
474 | * host is quiescing and up it (so it will chain to the next waiter). | |
475 | * This should not happen (in any case), as we can only remove when | |
476 | * there are no handles open... | |
477 | */ | |
478 | static void whcrc_remove(struct umc_dev *umc_dev) | |
479 | { | |
480 | struct whcrc *whcrc = umc_get_drvdata(umc_dev); | |
481 | struct uwb_rc *uwb_rc = whcrc->uwb_rc; | |
482 | ||
483 | umc_set_drvdata(umc_dev, NULL); | |
484 | uwb_rc_rm(uwb_rc); | |
485 | whcrc_release_rc_umc(whcrc); | |
486 | kfree(whcrc); | |
487 | uwb_rc_put(uwb_rc); | |
488 | d_printf(1, &umc_dev->dev, "freed whcrc %p\n", whcrc); | |
489 | } | |
490 | ||
491 | /* PCI device ID's that we handle [so it gets loaded] */ | |
492 | static struct pci_device_id whcrc_id_table[] = { | |
493 | { PCI_DEVICE_CLASS(PCI_CLASS_WIRELESS_WHCI, ~0) }, | |
494 | { /* empty last entry */ } | |
495 | }; | |
496 | MODULE_DEVICE_TABLE(pci, whcrc_id_table); | |
497 | ||
498 | static struct umc_driver whcrc_driver = { | |
499 | .name = "whc-rc", | |
500 | .cap_id = UMC_CAP_ID_WHCI_RC, | |
501 | .probe = whcrc_probe, | |
502 | .remove = whcrc_remove, | |
503 | }; | |
504 | ||
505 | static int __init whcrc_driver_init(void) | |
506 | { | |
507 | return umc_driver_register(&whcrc_driver); | |
508 | } | |
509 | module_init(whcrc_driver_init); | |
510 | ||
511 | static void __exit whcrc_driver_exit(void) | |
512 | { | |
513 | umc_driver_unregister(&whcrc_driver); | |
514 | } | |
515 | module_exit(whcrc_driver_exit); | |
516 | ||
517 | MODULE_AUTHOR("Inaky Perez-Gonzalez <inaky.perez-gonzalez@intel.com>"); | |
518 | MODULE_DESCRIPTION("Wireless Host Controller Radio Control Driver"); | |
519 | MODULE_LICENSE("GPL"); |