projects / deliverable / linux.git / blame
? search:
summary | shortlog | log | commit | commitdiff | tree
blob | blame (incremental) | history | HEAD
Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/penberg...
[deliverable/linux.git] / drivers / video / atmel_lcdfb.c
CommitLineData
14340586
NF		 1/*
2 * Driver for AT91/AT32 LCD Controller
3 *
4 * Copyright (C) 2007 Atmel Corporation
5 *
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file COPYING in the main directory of this archive for
8 * more details.
9 */
10
11#include <linux/kernel.h>
12#include <linux/platform_device.h>
13#include <linux/dma-mapping.h>
14#include <linux/interrupt.h>
15#include <linux/clk.h>
16#include <linux/fb.h>
17#include <linux/init.h>
18#include <linux/delay.h>
a9a84c37 19#include <linux/backlight.h>
14340586 20
a09e64fb
RK		 21#include <mach/board.h>
22#include <mach/cpu.h>
23#include <mach/gpio.h>
14340586
NF		 24
25#include <video/atmel_lcdc.h>
26
27#define lcdc_readl(sinfo, reg) __raw_readl((sinfo)->mmio+(reg))
28#define lcdc_writel(sinfo, reg, val) __raw_writel((val), (sinfo)->mmio+(reg))
29
30/* configurable parameters */
31#define ATMEL_LCDC_CVAL_DEFAULT 0xc8
32#define ATMEL_LCDC_DMA_BURST_LEN 8
33
5fb2d929
NF		 34#if defined(CONFIG_ARCH_AT91SAM9263) || defined(CONFIG_ARCH_AT91CAP9) || \
35 defined(CONFIG_ARCH_AT91SAM9RL)
14340586
NF		 36#define ATMEL_LCDC_FIFO_SIZE 2048
37#else
38#define ATMEL_LCDC_FIFO_SIZE 512
39#endif
40
41#if defined(CONFIG_ARCH_AT91)
42#define ATMEL_LCDFB_FBINFO_DEFAULT FBINFO_DEFAULT
43
44static inline void atmel_lcdfb_update_dma2d(struct atmel_lcdfb_info *sinfo,
45 struct fb_var_screeninfo *var)
46{
47
48}
49#elif defined(CONFIG_AVR32)
50#define ATMEL_LCDFB_FBINFO_DEFAULT (FBINFO_DEFAULT \
51 | FBINFO_PARTIAL_PAN_OK \
52 | FBINFO_HWACCEL_XPAN \
53 | FBINFO_HWACCEL_YPAN)
54
55static void atmel_lcdfb_update_dma2d(struct atmel_lcdfb_info *sinfo,
56 struct fb_var_screeninfo *var)
57{
58 u32 dma2dcfg;
59 u32 pixeloff;
60
61 pixeloff = (var->xoffset * var->bits_per_pixel) & 0x1f;
62
63 dma2dcfg = ((var->xres_virtual - var->xres) * var->bits_per_pixel) / 8;
64 dma2dcfg |= pixeloff << ATMEL_LCDC_PIXELOFF_OFFSET;
65 lcdc_writel(sinfo, ATMEL_LCDC_DMA2DCFG, dma2dcfg);
66
67 /* Update configuration */
68 lcdc_writel(sinfo, ATMEL_LCDC_DMACON,
69 lcdc_readl(sinfo, ATMEL_LCDC_DMACON)
70 | ATMEL_LCDC_DMAUPDT);
71}
72#endif
73
a9a84c37
DB		 74static const u32 contrast_ctr = ATMEL_LCDC_PS_DIV8
75 | ATMEL_LCDC_POL_POSITIVE
76 | ATMEL_LCDC_ENA_PWMENABLE;
77
78#ifdef CONFIG_BACKLIGHT_ATMEL_LCDC
79
80/* some bl->props field just changed */
81static int atmel_bl_update_status(struct backlight_device *bl)
82{
83 struct atmel_lcdfb_info *sinfo = bl_get_data(bl);
84 int power = sinfo->bl_power;
85 int brightness = bl->props.brightness;
86
87 /* REVISIT there may be a meaningful difference between
88 * fb_blank and power ... there seem to be some cases
89 * this doesn't handle correctly.
90 */
91 if (bl->props.fb_blank != sinfo->bl_power)
92 power = bl->props.fb_blank;
93 else if (bl->props.power != sinfo->bl_power)
94 power = bl->props.power;
95
96 if (brightness < 0 && power == FB_BLANK_UNBLANK)
97 brightness = lcdc_readl(sinfo, ATMEL_LCDC_CONTRAST_VAL);
98 else if (power != FB_BLANK_UNBLANK)
99 brightness = 0;
100
101 lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_VAL, brightness);
102 lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_CTR,
103 brightness ? contrast_ctr : 0);
104
105 bl->props.fb_blank = bl->props.power = sinfo->bl_power = power;
106
107 return 0;
108}
109
110static int atmel_bl_get_brightness(struct backlight_device *bl)
111{
112 struct atmel_lcdfb_info *sinfo = bl_get_data(bl);
113
114 return lcdc_readl(sinfo, ATMEL_LCDC_CONTRAST_VAL);
115}
116
117static struct backlight_ops atmel_lcdc_bl_ops = {
118 .update_status = atmel_bl_update_status,
119 .get_brightness = atmel_bl_get_brightness,
120};
121
122static void init_backlight(struct atmel_lcdfb_info *sinfo)
123{
124 struct backlight_device *bl;
125
126 sinfo->bl_power = FB_BLANK_UNBLANK;
127
128 if (sinfo->backlight)
129 return;
130
131 bl = backlight_device_register("backlight", &sinfo->pdev->dev,
132 sinfo, &atmel_lcdc_bl_ops);
133 if (IS_ERR(sinfo->backlight)) {
134 dev_err(&sinfo->pdev->dev, "error %ld on backlight register\n",
135 PTR_ERR(bl));
136 return;
137 }
138 sinfo->backlight = bl;
139
140 bl->props.power = FB_BLANK_UNBLANK;
141 bl->props.fb_blank = FB_BLANK_UNBLANK;
142 bl->props.max_brightness = 0xff;
143 bl->props.brightness = atmel_bl_get_brightness(bl);
144}
145
146static void exit_backlight(struct atmel_lcdfb_info *sinfo)
147{
148 if (sinfo->backlight)
149 backlight_device_unregister(sinfo->backlight);
150}
151
152#else
153
154static void init_backlight(struct atmel_lcdfb_info *sinfo)
155{
156 dev_warn(&sinfo->pdev->dev, "backlight control is not available\n");
157}
158
159static void exit_backlight(struct atmel_lcdfb_info *sinfo)
160{
161}
162
163#endif
164
165static void init_contrast(struct atmel_lcdfb_info *sinfo)
166{
167 /* have some default contrast/backlight settings */
168 lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_CTR, contrast_ctr);
169 lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_VAL, ATMEL_LCDC_CVAL_DEFAULT);
170
171 if (sinfo->lcdcon_is_backlight)
172 init_backlight(sinfo);
173}
174
14340586
NF		 175
176static struct fb_fix_screeninfo atmel_lcdfb_fix __initdata = {
177 .type = FB_TYPE_PACKED_PIXELS,
178 .visual = FB_VISUAL_TRUECOLOR,
179 .xpanstep = 0,
180 .ypanstep = 0,
181 .ywrapstep = 0,
182 .accel = FB_ACCEL_NONE,
183};
184
250a269d
NF		 185static unsigned long compute_hozval(unsigned long xres, unsigned long lcdcon2)
186{
187 unsigned long value;
188
189 if (!(cpu_is_at91sam9261() || cpu_is_at32ap7000()))
190 return xres;
191
192 value = xres;
193 if ((lcdcon2 & ATMEL_LCDC_DISTYPE) != ATMEL_LCDC_DISTYPE_TFT) {
194 /* STN display */
195 if ((lcdcon2 & ATMEL_LCDC_DISTYPE) == ATMEL_LCDC_DISTYPE_STNCOLOR) {
196 value *= 3;
197 }
198 if ( (lcdcon2 & ATMEL_LCDC_IFWIDTH) == ATMEL_LCDC_IFWIDTH_4
199 || ( (lcdcon2 & ATMEL_LCDC_IFWIDTH) == ATMEL_LCDC_IFWIDTH_8
200 && (lcdcon2 & ATMEL_LCDC_SCANMOD) == ATMEL_LCDC_SCANMOD_DUAL ))
201 value = DIV_ROUND_UP(value, 4);
202 else
203 value = DIV_ROUND_UP(value, 8);
204 }
205
206 return value;
207}
14340586
NF		 208
209static void atmel_lcdfb_update_dma(struct fb_info *info,
210 struct fb_var_screeninfo *var)
211{
212 struct atmel_lcdfb_info *sinfo = info->par;
213 struct fb_fix_screeninfo *fix = &info->fix;
214 unsigned long dma_addr;
215
216 dma_addr = (fix->smem_start + var->yoffset * fix->line_length
217 + var->xoffset * var->bits_per_pixel / 8);
218
219 dma_addr &= ~3UL;
220
221 /* Set framebuffer DMA base address and pixel offset */
222 lcdc_writel(sinfo, ATMEL_LCDC_DMABADDR1, dma_addr);
223
224 atmel_lcdfb_update_dma2d(sinfo, var);
225}
226
227static inline void atmel_lcdfb_free_video_memory(struct atmel_lcdfb_info *sinfo)
228{
229 struct fb_info *info = sinfo->info;
230
231 dma_free_writecombine(info->device, info->fix.smem_len,
232 info->screen_base, info->fix.smem_start);
233}
234
235/**
236 * atmel_lcdfb_alloc_video_memory - Allocate framebuffer memory
237 * @sinfo: the frame buffer to allocate memory for
238 */
239static int atmel_lcdfb_alloc_video_memory(struct atmel_lcdfb_info *sinfo)
240{
241 struct fb_info *info = sinfo->info;
242 struct fb_var_screeninfo *var = &info->var;
243
244 info->fix.smem_len = (var->xres_virtual * var->yres_virtual
245 * ((var->bits_per_pixel + 7) / 8));
246
247 info->screen_base = dma_alloc_writecombine(info->device, info->fix.smem_len,
248 (dma_addr_t *)&info->fix.smem_start, GFP_KERNEL);
249
250 if (!info->screen_base) {
251 return -ENOMEM;
252 }
253
01d3a5e7
HS		 254 memset(info->screen_base, 0, info->fix.smem_len);
255
14340586
NF		 256 return 0;
257}
258
968910bd
NF		 259static const struct fb_videomode *atmel_lcdfb_choose_mode(struct fb_var_screeninfo *var,
260 struct fb_info *info)
261{
262 struct fb_videomode varfbmode;
263 const struct fb_videomode *fbmode = NULL;
264
265 fb_var_to_videomode(&varfbmode, var);
266 fbmode = fb_find_nearest_mode(&varfbmode, &info->modelist);
267 if (fbmode)
268 fb_videomode_to_var(var, fbmode);
269 return fbmode;
270}
271
272
14340586
NF		 273/**
274 * atmel_lcdfb_check_var - Validates a var passed in.
275 * @var: frame buffer variable screen structure
276 * @info: frame buffer structure that represents a single frame buffer
277 *
278 * Checks to see if the hardware supports the state requested by
279 * var passed in. This function does not alter the hardware
280 * state!!! This means the data stored in struct fb_info and
281 * struct atmel_lcdfb_info do not change. This includes the var
282 * inside of struct fb_info. Do NOT change these. This function
283 * can be called on its own if we intent to only test a mode and
284 * not actually set it. The stuff in modedb.c is a example of
285 * this. If the var passed in is slightly off by what the
286 * hardware can support then we alter the var PASSED in to what
287 * we can do. If the hardware doesn't support mode change a
288 * -EINVAL will be returned by the upper layers. You don't need
289 * to implement this function then. If you hardware doesn't
290 * support changing the resolution then this function is not
291 * needed. In this case the driver would just provide a var that
292 * represents the static state the screen is in.
293 *
294 * Returns negative errno on error, or zero on success.
295 */
296static int atmel_lcdfb_check_var(struct fb_var_screeninfo *var,
297 struct fb_info *info)
298{
299 struct device *dev = info->device;
300 struct atmel_lcdfb_info *sinfo = info->par;
301 unsigned long clk_value_khz;
302
303 clk_value_khz = clk_get_rate(sinfo->lcdc_clk) / 1000;
304
305 dev_dbg(dev, "%s:\n", __func__);
968910bd
NF		 306
307 if (!(var->pixclock && var->bits_per_pixel)) {
308 /* choose a suitable mode if possible */
309 if (!atmel_lcdfb_choose_mode(var, info)) {
310 dev_err(dev, "needed value not specified\n");
311 return -EINVAL;
312 }
313 }
314
14340586
NF		 315 dev_dbg(dev, " resolution: %ux%u\n", var->xres, var->yres);
316 dev_dbg(dev, " pixclk: %lu KHz\n", PICOS2KHZ(var->pixclock));
317 dev_dbg(dev, " bpp: %u\n", var->bits_per_pixel);
318 dev_dbg(dev, " clk: %lu KHz\n", clk_value_khz);
319
320 if ((PICOS2KHZ(var->pixclock) * var->bits_per_pixel / 8) > clk_value_khz) {
321 dev_err(dev, "%lu KHz pixel clock is too fast\n", PICOS2KHZ(var->pixclock));
322 return -EINVAL;
323 }
324
968910bd
NF		 325 /* Do not allow to have real resoulution larger than virtual */
326 if (var->xres > var->xres_virtual)
327 var->xres_virtual = var->xres;
328
329 if (var->yres > var->yres_virtual)
330 var->yres_virtual = var->yres;
331
14340586
NF		 332 /* Force same alignment for each line */
333 var->xres = (var->xres + 3) & ~3UL;
334 var->xres_virtual = (var->xres_virtual + 3) & ~3UL;
335
336 var->red.msb_right = var->green.msb_right = var->blue.msb_right = 0;
337 var->transp.msb_right = 0;
338 var->transp.offset = var->transp.length = 0;
339 var->xoffset = var->yoffset = 0;
340
162b3a08
HS		 341 /* Saturate vertical and horizontal timings at maximum values */
342 var->vsync_len = min_t(u32, var->vsync_len,
343 (ATMEL_LCDC_VPW >> ATMEL_LCDC_VPW_OFFSET) + 1);
344 var->upper_margin = min_t(u32, var->upper_margin,
345 ATMEL_LCDC_VBP >> ATMEL_LCDC_VBP_OFFSET);
346 var->lower_margin = min_t(u32, var->lower_margin,
347 ATMEL_LCDC_VFP);
348 var->right_margin = min_t(u32, var->right_margin,
349 (ATMEL_LCDC_HFP >> ATMEL_LCDC_HFP_OFFSET) + 1);
350 var->hsync_len = min_t(u32, var->hsync_len,
351 (ATMEL_LCDC_HPW >> ATMEL_LCDC_HPW_OFFSET) + 1);
352 var->left_margin = min_t(u32, var->left_margin,
353 ATMEL_LCDC_HBP + 1);
354
355 /* Some parameters can't be zero */
356 var->vsync_len = max_t(u32, var->vsync_len, 1);
357 var->right_margin = max_t(u32, var->right_margin, 1);
358 var->hsync_len = max_t(u32, var->hsync_len, 1);
359 var->left_margin = max_t(u32, var->left_margin, 1);
360
14340586 361 switch (var->bits_per_pixel) {
250a269d 362 case 1:
14340586
NF		 363 case 2:
364 case 4:
365 case 8:
366 var->red.offset = var->green.offset = var->blue.offset = 0;
367 var->red.length = var->green.length = var->blue.length
368 = var->bits_per_pixel;
369 break;
370 case 15:
371 case 16:
fd085801
NF		 372 if (sinfo->lcd_wiring_mode == ATMEL_LCDC_WIRING_RGB) {
373 /* RGB:565 mode */
374 var->red.offset = 11;
375 var->blue.offset = 0;
376 var->green.length = 6;
377 } else {
378 /* BGR:555 mode */
379 var->red.offset = 0;
380 var->blue.offset = 10;
381 var->green.length = 5;
382 }
14340586 383 var->green.offset = 5;
fd085801 384 var->red.length = var->blue.length = 5;
14340586 385 break;
14340586 386 case 32:
4440e0e1
HS		 387 var->transp.offset = 24;
388 var->transp.length = 8;
389 /* fall through */
390 case 24:
fd085801
NF		 391 if (sinfo->lcd_wiring_mode == ATMEL_LCDC_WIRING_RGB) {
392 /* RGB:888 mode */
393 var->red.offset = 16;
394 var->blue.offset = 0;
395 } else {
396 /* BGR:888 mode */
397 var->red.offset = 0;
398 var->blue.offset = 16;
399 }
14340586 400 var->green.offset = 8;
14340586
NF		 401 var->red.length = var->green.length = var->blue.length = 8;
402 break;
403 default:
404 dev_err(dev, "color depth %d not supported\n",
405 var->bits_per_pixel);
406 return -EINVAL;
407 }
408
409 return 0;
410}
411
d22579b8
NF		 412/*
413 * LCD reset sequence
414 */
415static void atmel_lcdfb_reset(struct atmel_lcdfb_info *sinfo)
416{
417 might_sleep();
418
419 /* LCD power off */
420 lcdc_writel(sinfo, ATMEL_LCDC_PWRCON, sinfo->guard_time << ATMEL_LCDC_GUARDT_OFFSET);
421
422 /* wait for the LCDC core to become idle */
423 while (lcdc_readl(sinfo, ATMEL_LCDC_PWRCON) & ATMEL_LCDC_BUSY)
424 msleep(10);
425
426 /* DMA disable */
427 lcdc_writel(sinfo, ATMEL_LCDC_DMACON, 0);
428
429 /* wait for DMA engine to become idle */
430 while (lcdc_readl(sinfo, ATMEL_LCDC_DMACON) & ATMEL_LCDC_DMABUSY)
431 msleep(10);
432
433 /* LCD power on */
434 lcdc_writel(sinfo, ATMEL_LCDC_PWRCON,
435 (sinfo->guard_time << ATMEL_LCDC_GUARDT_OFFSET) | ATMEL_LCDC_PWR);
436
437 /* DMA enable */
438 lcdc_writel(sinfo, ATMEL_LCDC_DMACON, sinfo->default_dmacon);
439}
440
14340586
NF		 441/**
442 * atmel_lcdfb_set_par - Alters the hardware state.
443 * @info: frame buffer structure that represents a single frame buffer
444 *
445 * Using the fb_var_screeninfo in fb_info we set the resolution
446 * of the this particular framebuffer. This function alters the
447 * par AND the fb_fix_screeninfo stored in fb_info. It doesn't
448 * not alter var in fb_info since we are using that data. This
449 * means we depend on the data in var inside fb_info to be
450 * supported by the hardware. atmel_lcdfb_check_var is always called
451 * before atmel_lcdfb_set_par to ensure this. Again if you can't
452 * change the resolution you don't need this function.
453 *
454 */
455static int atmel_lcdfb_set_par(struct fb_info *info)
456{
457 struct atmel_lcdfb_info *sinfo = info->par;
250a269d 458 unsigned long hozval_linesz;
14340586
NF		 459 unsigned long value;
460 unsigned long clk_value_khz;
250a269d 461 unsigned long bits_per_line;
14340586 462
d22579b8
NF		 463 might_sleep();
464
14340586
NF		 465 dev_dbg(info->device, "%s:\n", __func__);
466 dev_dbg(info->device, " * resolution: %ux%u (%ux%u virtual)\n",
467 info->var.xres, info->var.yres,
468 info->var.xres_virtual, info->var.yres_virtual);
469
470 /* Turn off the LCD controller and the DMA controller */
471 lcdc_writel(sinfo, ATMEL_LCDC_PWRCON, sinfo->guard_time << ATMEL_LCDC_GUARDT_OFFSET);
472
e593f070
AS		 473 /* Wait for the LCDC core to become idle */
474 while (lcdc_readl(sinfo, ATMEL_LCDC_PWRCON) & ATMEL_LCDC_BUSY)
475 msleep(10);
476
14340586
NF		 477 lcdc_writel(sinfo, ATMEL_LCDC_DMACON, 0);
478
250a269d
NF		 479 if (info->var.bits_per_pixel == 1)
480 info->fix.visual = FB_VISUAL_MONO01;
481 else if (info->var.bits_per_pixel <= 8)
14340586
NF		 482 info->fix.visual = FB_VISUAL_PSEUDOCOLOR;
483 else
484 info->fix.visual = FB_VISUAL_TRUECOLOR;
485
250a269d
NF		 486 bits_per_line = info->var.xres_virtual * info->var.bits_per_pixel;
487 info->fix.line_length = DIV_ROUND_UP(bits_per_line, 8);
14340586
NF		 488
489 /* Re-initialize the DMA engine... */
490 dev_dbg(info->device, " * update DMA engine\n");
491 atmel_lcdfb_update_dma(info, &info->var);
492
493 /* ...set frame size and burst length = 8 words (?) */
494 value = (info->var.yres * info->var.xres * info->var.bits_per_pixel) / 32;
495 value |= ((ATMEL_LCDC_DMA_BURST_LEN - 1) << ATMEL_LCDC_BLENGTH_OFFSET);
496 lcdc_writel(sinfo, ATMEL_LCDC_DMAFRMCFG, value);
497
498 /* Now, the LCDC core... */
499
500 /* Set pixel clock */
501 clk_value_khz = clk_get_rate(sinfo->lcdc_clk) / 1000;
502
250a269d 503 value = DIV_ROUND_UP(clk_value_khz, PICOS2KHZ(info->var.pixclock));
14340586 504
baf6332a 505 if (value < 2) {
14340586
NF		 506 dev_notice(info->device, "Bypassing pixel clock divider\n");
507 lcdc_writel(sinfo, ATMEL_LCDC_LCDCON1, ATMEL_LCDC_BYPASS);
250a269d 508 } else {
baf6332a
NF		 509 value = (value / 2) - 1;
510 dev_dbg(info->device, " * programming CLKVAL = 0x%08lx\n",
511 value);
512 lcdc_writel(sinfo, ATMEL_LCDC_LCDCON1,
513 value << ATMEL_LCDC_CLKVAL_OFFSET);
250a269d
NF		 514 info->var.pixclock = KHZ2PICOS(clk_value_khz / (2 * (value + 1)));
515 dev_dbg(info->device, " updated pixclk: %lu KHz\n",
516 PICOS2KHZ(info->var.pixclock));
517 }
518
14340586
NF		 519
520 /* Initialize control register 2 */
521 value = sinfo->default_lcdcon2;
522
523 if (!(info->var.sync & FB_SYNC_HOR_HIGH_ACT))
524 value |= ATMEL_LCDC_INVLINE_INVERTED;
525 if (!(info->var.sync & FB_SYNC_VERT_HIGH_ACT))
526 value |= ATMEL_LCDC_INVFRAME_INVERTED;
527
528 switch (info->var.bits_per_pixel) {
529 case 1: value |= ATMEL_LCDC_PIXELSIZE_1; break;
530 case 2: value |= ATMEL_LCDC_PIXELSIZE_2; break;
531 case 4: value |= ATMEL_LCDC_PIXELSIZE_4; break;
532 case 8: value |= ATMEL_LCDC_PIXELSIZE_8; break;
533 case 15: /* fall through */
534 case 16: value |= ATMEL_LCDC_PIXELSIZE_16; break;
535 case 24: value |= ATMEL_LCDC_PIXELSIZE_24; break;
536 case 32: value |= ATMEL_LCDC_PIXELSIZE_32; break;
537 default: BUG(); break;
538 }
539 dev_dbg(info->device, " * LCDCON2 = %08lx\n", value);
540 lcdc_writel(sinfo, ATMEL_LCDC_LCDCON2, value);
541
542 /* Vertical timing */
543 value = (info->var.vsync_len - 1) << ATMEL_LCDC_VPW_OFFSET;
544 value |= info->var.upper_margin << ATMEL_LCDC_VBP_OFFSET;
545 value |= info->var.lower_margin;
546 dev_dbg(info->device, " * LCDTIM1 = %08lx\n", value);
547 lcdc_writel(sinfo, ATMEL_LCDC_TIM1, value);
548
549 /* Horizontal timing */
550 value = (info->var.right_margin - 1) << ATMEL_LCDC_HFP_OFFSET;
551 value |= (info->var.hsync_len - 1) << ATMEL_LCDC_HPW_OFFSET;
552 value |= (info->var.left_margin - 1);
553 dev_dbg(info->device, " * LCDTIM2 = %08lx\n", value);
554 lcdc_writel(sinfo, ATMEL_LCDC_TIM2, value);
555
250a269d
NF		 556 /* Horizontal value (aka line size) */
557 hozval_linesz = compute_hozval(info->var.xres,
558 lcdc_readl(sinfo, ATMEL_LCDC_LCDCON2));
559
14340586 560 /* Display size */
250a269d 561 value = (hozval_linesz - 1) << ATMEL_LCDC_HOZVAL_OFFSET;
14340586 562 value |= info->var.yres - 1;
250a269d 563 dev_dbg(info->device, " * LCDFRMCFG = %08lx\n", value);
14340586
NF		 564 lcdc_writel(sinfo, ATMEL_LCDC_LCDFRMCFG, value);
565
566 /* FIFO Threshold: Use formula from data sheet */
567 value = ATMEL_LCDC_FIFO_SIZE - (2 * ATMEL_LCDC_DMA_BURST_LEN + 3);
568 lcdc_writel(sinfo, ATMEL_LCDC_FIFO, value);
569
570 /* Toggle LCD_MODE every frame */
571 lcdc_writel(sinfo, ATMEL_LCDC_MVAL, 0);
572
573 /* Disable all interrupts */
574 lcdc_writel(sinfo, ATMEL_LCDC_IDR, ~0UL);
d22579b8
NF		 575 /* Enable FIFO & DMA errors */
576 lcdc_writel(sinfo, ATMEL_LCDC_IER, ATMEL_LCDC_UFLWI | ATMEL_LCDC_OWRI | ATMEL_LCDC_MERI);
14340586 577
14340586
NF		 578 /* ...wait for DMA engine to become idle... */
579 while (lcdc_readl(sinfo, ATMEL_LCDC_DMACON) & ATMEL_LCDC_DMABUSY)
580 msleep(10);
581
582 dev_dbg(info->device, " * re-enable DMA engine\n");
583 /* ...and enable it with updated configuration */
584 lcdc_writel(sinfo, ATMEL_LCDC_DMACON, sinfo->default_dmacon);
585
586 dev_dbg(info->device, " * re-enable LCDC core\n");
587 lcdc_writel(sinfo, ATMEL_LCDC_PWRCON,
588 (sinfo->guard_time << ATMEL_LCDC_GUARDT_OFFSET) | ATMEL_LCDC_PWR);
589
590 dev_dbg(info->device, " * DONE\n");
591
592 return 0;
593}
594
595static inline unsigned int chan_to_field(unsigned int chan, const struct fb_bitfield *bf)
596{
597 chan &= 0xffff;
598 chan >>= 16 - bf->length;
599 return chan << bf->offset;
600}
601
602/**
603 * atmel_lcdfb_setcolreg - Optional function. Sets a color register.
604 * @regno: Which register in the CLUT we are programming
605 * @red: The red value which can be up to 16 bits wide
606 * @green: The green value which can be up to 16 bits wide
607 * @blue: The blue value which can be up to 16 bits wide.
608 * @transp: If supported the alpha value which can be up to 16 bits wide.
609 * @info: frame buffer info structure
610 *
611 * Set a single color register. The values supplied have a 16 bit
612 * magnitude which needs to be scaled in this function for the hardware.
613 * Things to take into consideration are how many color registers, if
614 * any, are supported with the current color visual. With truecolor mode
615 * no color palettes are supported. Here a psuedo palette is created
616 * which we store the value in pseudo_palette in struct fb_info. For
617 * pseudocolor mode we have a limited color palette. To deal with this
618 * we can program what color is displayed for a particular pixel value.
619 * DirectColor is similar in that we can program each color field. If
620 * we have a static colormap we don't need to implement this function.
621 *
622 * Returns negative errno on error, or zero on success. In an
623 * ideal world, this would have been the case, but as it turns
624 * out, the other drivers return 1 on failure, so that's what
625 * we're going to do.
626 */
627static int atmel_lcdfb_setcolreg(unsigned int regno, unsigned int red,
628 unsigned int green, unsigned int blue,
629 unsigned int transp, struct fb_info *info)
630{
631 struct atmel_lcdfb_info *sinfo = info->par;
632 unsigned int val;
633 u32 *pal;
634 int ret = 1;
635
636 if (info->var.grayscale)
637 red = green = blue = (19595 * red + 38470 * green
638 + 7471 * blue) >> 16;
639
640 switch (info->fix.visual) {
641 case FB_VISUAL_TRUECOLOR:
642 if (regno < 16) {
643 pal = info->pseudo_palette;
644
645 val = chan_to_field(red, &info->var.red);
646 val |= chan_to_field(green, &info->var.green);
647 val |= chan_to_field(blue, &info->var.blue);
648
649 pal[regno] = val;
650 ret = 0;
651 }
652 break;
653
654 case FB_VISUAL_PSEUDOCOLOR:
655 if (regno < 256) {
656 val = ((red >> 11) & 0x001f);
657 val |= ((green >> 6) & 0x03e0);
658 val |= ((blue >> 1) & 0x7c00);
659
660 /*
661 * TODO: intensity bit. Maybe something like
662 * ~(red[10] ^ green[10] ^ blue[10]) & 1
663 */
664
665 lcdc_writel(sinfo, ATMEL_LCDC_LUT(regno), val);
666 ret = 0;
667 }
668 break;
250a269d
NF		 669
670 case FB_VISUAL_MONO01:
671 if (regno < 2) {
672 val = (regno == 0) ? 0x00 : 0x1F;
673 lcdc_writel(sinfo, ATMEL_LCDC_LUT(regno), val);
674 ret = 0;
675 }
676 break;
677
14340586
NF		 678 }
679
680 return ret;
681}
682
683static int atmel_lcdfb_pan_display(struct fb_var_screeninfo *var,
684 struct fb_info *info)
685{
686 dev_dbg(info->device, "%s\n", __func__);
687
688 atmel_lcdfb_update_dma(info, var);
689
690 return 0;
691}
692
693static struct fb_ops atmel_lcdfb_ops = {
694 .owner = THIS_MODULE,
695 .fb_check_var = atmel_lcdfb_check_var,
696 .fb_set_par = atmel_lcdfb_set_par,
697 .fb_setcolreg = atmel_lcdfb_setcolreg,
698 .fb_pan_display = atmel_lcdfb_pan_display,
699 .fb_fillrect = cfb_fillrect,
700 .fb_copyarea = cfb_copyarea,
701 .fb_imageblit = cfb_imageblit,
702};
703
704static irqreturn_t atmel_lcdfb_interrupt(int irq, void *dev_id)
705{
706 struct fb_info *info = dev_id;
707 struct atmel_lcdfb_info *sinfo = info->par;
708 u32 status;
709
710 status = lcdc_readl(sinfo, ATMEL_LCDC_ISR);
d22579b8
NF		 711 if (status & ATMEL_LCDC_UFLWI) {
712 dev_warn(info->device, "FIFO underflow %#x\n", status);
713 /* reset DMA and FIFO to avoid screen shifting */
714 schedule_work(&sinfo->task);
715 }
716 lcdc_writel(sinfo, ATMEL_LCDC_ICR, status);
14340586
NF		 717 return IRQ_HANDLED;
718}
719
d22579b8
NF		 720/*
721 * LCD controller task (to reset the LCD)
722 */
723static void atmel_lcdfb_task(struct work_struct *work)
724{
725 struct atmel_lcdfb_info *sinfo =
726 container_of(work, struct atmel_lcdfb_info, task);
727
728 atmel_lcdfb_reset(sinfo);
729}
730
14340586
NF		 731static int __init atmel_lcdfb_init_fbinfo(struct atmel_lcdfb_info *sinfo)
732{
733 struct fb_info *info = sinfo->info;
734 int ret = 0;
735
14340586
NF		 736 info->var.activate |= FB_ACTIVATE_FORCE | FB_ACTIVATE_NOW;
737
738 dev_info(info->device,
739 "%luKiB frame buffer at %08lx (mapped at %p)\n",
740 (unsigned long)info->fix.smem_len / 1024,
741 (unsigned long)info->fix.smem_start,
742 info->screen_base);
743
744 /* Allocate colormap */
745 ret = fb_alloc_cmap(&info->cmap, 256, 0);
746 if (ret < 0)
747 dev_err(info->device, "Alloc color map failed\n");
748
749 return ret;
750}
751
752static void atmel_lcdfb_start_clock(struct atmel_lcdfb_info *sinfo)
753{
754 if (sinfo->bus_clk)
755 clk_enable(sinfo->bus_clk);
756 clk_enable(sinfo->lcdc_clk);
757}
758
759static void atmel_lcdfb_stop_clock(struct atmel_lcdfb_info *sinfo)
760{
761 if (sinfo->bus_clk)
762 clk_disable(sinfo->bus_clk);
763 clk_disable(sinfo->lcdc_clk);
764}
765
766
767static int __init atmel_lcdfb_probe(struct platform_device *pdev)
768{
769 struct device *dev = &pdev->dev;
770 struct fb_info *info;
771 struct atmel_lcdfb_info *sinfo;
772 struct atmel_lcdfb_info *pdata_sinfo;
968910bd 773 struct fb_videomode fbmode;
14340586
NF		 774 struct resource *regs = NULL;
775 struct resource *map = NULL;
776 int ret;
777
778 dev_dbg(dev, "%s BEGIN\n", __func__);
779
780 ret = -ENOMEM;
781 info = framebuffer_alloc(sizeof(struct atmel_lcdfb_info), dev);
782 if (!info) {
783 dev_err(dev, "cannot allocate memory\n");
784 goto out;
785 }
786
787 sinfo = info->par;
788
789 if (dev->platform_data) {
790 pdata_sinfo = (struct atmel_lcdfb_info *)dev->platform_data;
791 sinfo->default_bpp = pdata_sinfo->default_bpp;
792 sinfo->default_dmacon = pdata_sinfo->default_dmacon;
793 sinfo->default_lcdcon2 = pdata_sinfo->default_lcdcon2;
794 sinfo->default_monspecs = pdata_sinfo->default_monspecs;
795 sinfo->atmel_lcdfb_power_control = pdata_sinfo->atmel_lcdfb_power_control;
796 sinfo->guard_time = pdata_sinfo->guard_time;
a9a84c37 797 sinfo->lcdcon_is_backlight = pdata_sinfo->lcdcon_is_backlight;
fd085801 798 sinfo->lcd_wiring_mode = pdata_sinfo->lcd_wiring_mode;
14340586
NF		 799 } else {
800 dev_err(dev, "cannot get default configuration\n");
801 goto free_info;
802 }
803 sinfo->info = info;
804 sinfo->pdev = pdev;
805
806 strcpy(info->fix.id, sinfo->pdev->name);
807 info->flags = ATMEL_LCDFB_FBINFO_DEFAULT;
808 info->pseudo_palette = sinfo->pseudo_palette;
809 info->fbops = &atmel_lcdfb_ops;
810
811 memcpy(&info->monspecs, sinfo->default_monspecs, sizeof(info->monspecs));
812 info->fix = atmel_lcdfb_fix;
813
814 /* Enable LCDC Clocks */
815 if (cpu_is_at91sam9261() || cpu_is_at32ap7000()) {
816 sinfo->bus_clk = clk_get(dev, "hck1");
817 if (IS_ERR(sinfo->bus_clk)) {
818 ret = PTR_ERR(sinfo->bus_clk);
819 goto free_info;
820 }
821 }
822 sinfo->lcdc_clk = clk_get(dev, "lcdc_clk");
823 if (IS_ERR(sinfo->lcdc_clk)) {
824 ret = PTR_ERR(sinfo->lcdc_clk);
825 goto put_bus_clk;
826 }
827 atmel_lcdfb_start_clock(sinfo);
828
829 ret = fb_find_mode(&info->var, info, NULL, info->monspecs.modedb,
830 info->monspecs.modedb_len, info->monspecs.modedb,
831 sinfo->default_bpp);
832 if (!ret) {
833 dev_err(dev, "no suitable video mode found\n");
834 goto stop_clk;
835 }
836
837
838 regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
839 if (!regs) {
840 dev_err(dev, "resources unusable\n");
841 ret = -ENXIO;
842 goto stop_clk;
843 }
844
845 sinfo->irq_base = platform_get_irq(pdev, 0);
846 if (sinfo->irq_base < 0) {
847 dev_err(dev, "unable to get irq\n");
848 ret = sinfo->irq_base;
849 goto stop_clk;
850 }
851
852 /* Initialize video memory */
853 map = platform_get_resource(pdev, IORESOURCE_MEM, 1);
854 if (map) {
855 /* use a pre-allocated memory buffer */
856 info->fix.smem_start = map->start;
857 info->fix.smem_len = map->end - map->start + 1;
858 if (!request_mem_region(info->fix.smem_start,
859 info->fix.smem_len, pdev->name)) {
860 ret = -EBUSY;
861 goto stop_clk;
862 }
863
864 info->screen_base = ioremap(info->fix.smem_start, info->fix.smem_len);
865 if (!info->screen_base)
866 goto release_intmem;
01d3a5e7
HS		 867
868 /*
869 * Don't clear the framebuffer -- someone may have set
870 * up a splash image.
871 */
14340586
NF		 872 } else {
873 /* alocate memory buffer */
874 ret = atmel_lcdfb_alloc_video_memory(sinfo);
875 if (ret < 0) {
876 dev_err(dev, "cannot allocate framebuffer: %d\n", ret);
877 goto stop_clk;
878 }
879 }
880
881 /* LCDC registers */
882 info->fix.mmio_start = regs->start;
883 info->fix.mmio_len = regs->end - regs->start + 1;
884
885 if (!request_mem_region(info->fix.mmio_start,
886 info->fix.mmio_len, pdev->name)) {
887 ret = -EBUSY;
888 goto free_fb;
889 }
890
891 sinfo->mmio = ioremap(info->fix.mmio_start, info->fix.mmio_len);
892 if (!sinfo->mmio) {
893 dev_err(dev, "cannot map LCDC registers\n");
894 goto release_mem;
895 }
896
a9a84c37
DB		 897 /* Initialize PWM for contrast or backlight ("off") */
898 init_contrast(sinfo);
899
14340586
NF		 900 /* interrupt */
901 ret = request_irq(sinfo->irq_base, atmel_lcdfb_interrupt, 0, pdev->name, info);
902 if (ret) {
903 dev_err(dev, "request_irq failed: %d\n", ret);
904 goto unmap_mmio;
905 }
906
d22579b8
NF		 907 /* Some operations on the LCDC might sleep and
908 * require a preemptible task context */
909 INIT_WORK(&sinfo->task, atmel_lcdfb_task);
910
14340586
NF		 911 ret = atmel_lcdfb_init_fbinfo(sinfo);
912 if (ret < 0) {
913 dev_err(dev, "init fbinfo failed: %d\n", ret);
914 goto unregister_irqs;
915 }
916
917 /*
918 * This makes sure that our colour bitfield
919 * descriptors are correctly initialised.
920 */
921 atmel_lcdfb_check_var(&info->var, info);
922
923 ret = fb_set_var(info, &info->var);
924 if (ret) {
925 dev_warn(dev, "unable to set display parameters\n");
926 goto free_cmap;
927 }
928
929 dev_set_drvdata(dev, info);
930
931 /*
932 * Tell the world that we're ready to go
933 */
934 ret = register_framebuffer(info);
935 if (ret < 0) {
936 dev_err(dev, "failed to register framebuffer device: %d\n", ret);
937 goto free_cmap;
938 }
939
968910bd
NF		 940 /* add selected videomode to modelist */
941 fb_var_to_videomode(&fbmode, &info->var);
942 fb_add_videomode(&fbmode, &info->modelist);
943
14340586
NF		 944 /* Power up the LCDC screen */
945 if (sinfo->atmel_lcdfb_power_control)
946 sinfo->atmel_lcdfb_power_control(1);
947
948 dev_info(dev, "fb%d: Atmel LCDC at 0x%08lx (mapped at %p), irq %lu\n",
949 info->node, info->fix.mmio_start, sinfo->mmio, sinfo->irq_base);
950
951 return 0;
952
953
954free_cmap:
955 fb_dealloc_cmap(&info->cmap);
956unregister_irqs:
d22579b8 957 cancel_work_sync(&sinfo->task);
14340586
NF		 958 free_irq(sinfo->irq_base, info);
959unmap_mmio:
a9a84c37 960 exit_backlight(sinfo);
14340586
NF		 961 iounmap(sinfo->mmio);
962release_mem:
963 release_mem_region(info->fix.mmio_start, info->fix.mmio_len);
964free_fb:
965 if (map)
966 iounmap(info->screen_base);
967 else
968 atmel_lcdfb_free_video_memory(sinfo);
969
970release_intmem:
971 if (map)
972 release_mem_region(info->fix.smem_start, info->fix.smem_len);
973stop_clk:
974 atmel_lcdfb_stop_clock(sinfo);
975 clk_put(sinfo->lcdc_clk);
976put_bus_clk:
977 if (sinfo->bus_clk)
978 clk_put(sinfo->bus_clk);
979free_info:
980 framebuffer_release(info);
981out:
982 dev_dbg(dev, "%s FAILED\n", __func__);
983 return ret;
984}
985
986static int __exit atmel_lcdfb_remove(struct platform_device *pdev)
987{
988 struct device *dev = &pdev->dev;
989 struct fb_info *info = dev_get_drvdata(dev);
990 struct atmel_lcdfb_info *sinfo = info->par;
991
992 if (!sinfo)
993 return 0;
994
d22579b8 995 cancel_work_sync(&sinfo->task);
a9a84c37 996 exit_backlight(sinfo);
14340586
NF		 997 if (sinfo->atmel_lcdfb_power_control)
998 sinfo->atmel_lcdfb_power_control(0);
999 unregister_framebuffer(info);
1000 atmel_lcdfb_stop_clock(sinfo);
1001 clk_put(sinfo->lcdc_clk);
1002 if (sinfo->bus_clk)
1003 clk_put(sinfo->bus_clk);
1004 fb_dealloc_cmap(&info->cmap);
1005 free_irq(sinfo->irq_base, info);
1006 iounmap(sinfo->mmio);
1007 release_mem_region(info->fix.mmio_start, info->fix.mmio_len);
1008 if (platform_get_resource(pdev, IORESOURCE_MEM, 1)) {
1009 iounmap(info->screen_base);
1010 release_mem_region(info->fix.smem_start, info->fix.smem_len);
1011 } else {
1012 atmel_lcdfb_free_video_memory(sinfo);
1013 }
1014
1015 dev_set_drvdata(dev, NULL);
1016 framebuffer_release(info);
1017
1018 return 0;
1019}
1020
cf19a37e
DB		 1021#ifdef CONFIG_PM
1022
1023static int atmel_lcdfb_suspend(struct platform_device *pdev, pm_message_t mesg)
1024{
1025 struct fb_info *info = platform_get_drvdata(pdev);
1026 struct atmel_lcdfb_info *sinfo = info->par;
1027
1028 sinfo->saved_lcdcon = lcdc_readl(sinfo, ATMEL_LCDC_CONTRAST_VAL);
1029 lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_CTR, 0);
1030 if (sinfo->atmel_lcdfb_power_control)
1031 sinfo->atmel_lcdfb_power_control(0);
1032 atmel_lcdfb_stop_clock(sinfo);
1033 return 0;
1034}
1035
1036static int atmel_lcdfb_resume(struct platform_device *pdev)
1037{
1038 struct fb_info *info = platform_get_drvdata(pdev);
1039 struct atmel_lcdfb_info *sinfo = info->par;
1040
1041 atmel_lcdfb_start_clock(sinfo);
1042 if (sinfo->atmel_lcdfb_power_control)
1043 sinfo->atmel_lcdfb_power_control(1);
1044 lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_CTR, sinfo->saved_lcdcon);
1045 return 0;
1046}
1047
1048#else
1049#define atmel_lcdfb_suspend NULL
1050#define atmel_lcdfb_resume NULL
1051#endif
1052
14340586
NF		 1053static struct platform_driver atmel_lcdfb_driver = {
1054 .remove = __exit_p(atmel_lcdfb_remove),
cf19a37e
DB		 1055 .suspend = atmel_lcdfb_suspend,
1056 .resume = atmel_lcdfb_resume,
a9a84c37 1057
14340586
NF		 1058 .driver = {
1059 .name = "atmel_lcdfb",
1060 .owner = THIS_MODULE,
1061 },
1062};
1063
1064static int __init atmel_lcdfb_init(void)
1065{
1066 return platform_driver_probe(&atmel_lcdfb_driver, atmel_lcdfb_probe);
1067}
1068
1069static void __exit atmel_lcdfb_exit(void)
1070{
1071 platform_driver_unregister(&atmel_lcdfb_driver);
1072}
1073
1074module_init(atmel_lcdfb_init);
1075module_exit(atmel_lcdfb_exit);
1076
1077MODULE_DESCRIPTION("AT91/AT32 LCD Controller framebuffer driver");
8f4c79ce 1078MODULE_AUTHOR("Nicolas Ferre <nicolas.ferre@atmel.com>");
14340586 1079MODULE_LICENSE("GPL");
Linux kernel - Deliverables
This page took 0.211363 seconds and 5 git commands to generate.