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1da177e4 LT |
1 | /* |
2 | * controlfb.c -- frame buffer device for the PowerMac 'control' display | |
3 | * | |
4 | * Created 12 July 1998 by Dan Jacobowitz <dan@debian.org> | |
5 | * Copyright (C) 1998 Dan Jacobowitz | |
6 | * Copyright (C) 2001 Takashi Oe | |
7 | * | |
8 | * Mmap code by Michel Lanners <mlan@cpu.lu> | |
9 | * | |
10 | * Frame buffer structure from: | |
11 | * drivers/video/chipsfb.c -- frame buffer device for | |
12 | * Chips & Technologies 65550 chip. | |
13 | * | |
14 | * Copyright (C) 1998 Paul Mackerras | |
15 | * | |
16 | * This file is derived from the Powermac "chips" driver: | |
17 | * Copyright (C) 1997 Fabio Riccardi. | |
18 | * And from the frame buffer device for Open Firmware-initialized devices: | |
19 | * Copyright (C) 1997 Geert Uytterhoeven. | |
20 | * | |
21 | * Hardware information from: | |
22 | * control.c: Console support for PowerMac "control" display adaptor. | |
23 | * Copyright (C) 1996 Paul Mackerras | |
24 | * | |
25 | * Updated to 2.5 framebuffer API by Ben Herrenschmidt | |
26 | * <benh@kernel.crashing.org>, Paul Mackerras <paulus@samba.org>, | |
27 | * and James Simmons <jsimmons@infradead.org>. | |
28 | * | |
29 | * This file is subject to the terms and conditions of the GNU General Public | |
30 | * License. See the file COPYING in the main directory of this archive for | |
31 | * more details. | |
32 | */ | |
33 | ||
1da177e4 LT |
34 | #include <linux/module.h> |
35 | #include <linux/kernel.h> | |
36 | #include <linux/errno.h> | |
37 | #include <linux/string.h> | |
38 | #include <linux/mm.h> | |
1da177e4 LT |
39 | #include <linux/slab.h> |
40 | #include <linux/vmalloc.h> | |
41 | #include <linux/delay.h> | |
42 | #include <linux/interrupt.h> | |
43 | #include <linux/fb.h> | |
44 | #include <linux/init.h> | |
45 | #include <linux/pci.h> | |
46 | #include <linux/nvram.h> | |
47 | #include <linux/adb.h> | |
48 | #include <linux/cuda.h> | |
49 | #include <asm/io.h> | |
50 | #include <asm/prom.h> | |
51 | #include <asm/pgtable.h> | |
52 | #include <asm/btext.h> | |
53 | ||
54 | #include "macmodes.h" | |
55 | #include "controlfb.h" | |
56 | ||
57 | struct fb_par_control { | |
58 | int vmode, cmode; | |
59 | int xres, yres; | |
60 | int vxres, vyres; | |
61 | int xoffset, yoffset; | |
62 | int pitch; | |
63 | struct control_regvals regvals; | |
64 | unsigned long sync; | |
65 | unsigned char ctrl; | |
66 | }; | |
67 | ||
68 | #define DIRTY(z) ((x)->z != (y)->z) | |
69 | #define DIRTY_CMAP(z) (memcmp(&((x)->z), &((y)->z), sizeof((y)->z))) | |
70 | static inline int PAR_EQUAL(struct fb_par_control *x, struct fb_par_control *y) | |
71 | { | |
72 | int i, results; | |
73 | ||
74 | results = 1; | |
75 | for (i = 0; i < 3; i++) | |
76 | results &= !DIRTY(regvals.clock_params[i]); | |
77 | if (!results) | |
78 | return 0; | |
79 | for (i = 0; i < 16; i++) | |
80 | results &= !DIRTY(regvals.regs[i]); | |
81 | if (!results) | |
82 | return 0; | |
83 | return (!DIRTY(cmode) && !DIRTY(xres) && !DIRTY(yres) | |
84 | && !DIRTY(vxres) && !DIRTY(vyres)); | |
85 | } | |
86 | static inline int VAR_MATCH(struct fb_var_screeninfo *x, struct fb_var_screeninfo *y) | |
87 | { | |
88 | return (!DIRTY(bits_per_pixel) && !DIRTY(xres) | |
89 | && !DIRTY(yres) && !DIRTY(xres_virtual) | |
90 | && !DIRTY(yres_virtual) | |
91 | && !DIRTY_CMAP(red) && !DIRTY_CMAP(green) && !DIRTY_CMAP(blue)); | |
92 | } | |
93 | ||
94 | struct fb_info_control { | |
95 | struct fb_info info; | |
96 | struct fb_par_control par; | |
97 | u32 pseudo_palette[17]; | |
98 | ||
99 | struct cmap_regs __iomem *cmap_regs; | |
100 | unsigned long cmap_regs_phys; | |
101 | ||
102 | struct control_regs __iomem *control_regs; | |
103 | unsigned long control_regs_phys; | |
104 | unsigned long control_regs_size; | |
105 | ||
106 | __u8 __iomem *frame_buffer; | |
107 | unsigned long frame_buffer_phys; | |
108 | unsigned long fb_orig_base; | |
109 | unsigned long fb_orig_size; | |
110 | ||
111 | int control_use_bank2; | |
112 | unsigned long total_vram; | |
113 | unsigned char vram_attr; | |
114 | }; | |
115 | ||
116 | /* control register access macro */ | |
117 | #define CNTRL_REG(INFO,REG) (&(((INFO)->control_regs->REG).r)) | |
118 | ||
119 | ||
120 | /******************** Prototypes for exported functions ********************/ | |
121 | /* | |
122 | * struct fb_ops | |
123 | */ | |
124 | static int controlfb_pan_display(struct fb_var_screeninfo *var, | |
125 | struct fb_info *info); | |
126 | static int controlfb_setcolreg(u_int regno, u_int red, u_int green, u_int blue, | |
127 | u_int transp, struct fb_info *info); | |
128 | static int controlfb_blank(int blank_mode, struct fb_info *info); | |
216d526c | 129 | static int controlfb_mmap(struct fb_info *info, |
1da177e4 LT |
130 | struct vm_area_struct *vma); |
131 | static int controlfb_set_par (struct fb_info *info); | |
132 | static int controlfb_check_var (struct fb_var_screeninfo *var, struct fb_info *info); | |
133 | ||
1da177e4 LT |
134 | /******************** Prototypes for internal functions **********************/ |
135 | ||
136 | static void set_control_clock(unsigned char *params); | |
137 | static int init_control(struct fb_info_control *p); | |
138 | static void control_set_hardware(struct fb_info_control *p, | |
139 | struct fb_par_control *par); | |
140 | static int control_of_init(struct device_node *dp); | |
141 | static void find_vram_size(struct fb_info_control *p); | |
142 | static int read_control_sense(struct fb_info_control *p); | |
143 | static int calc_clock_params(unsigned long clk, unsigned char *param); | |
144 | static int control_var_to_par(struct fb_var_screeninfo *var, | |
145 | struct fb_par_control *par, const struct fb_info *fb_info); | |
146 | static inline void control_par_to_var(struct fb_par_control *par, | |
147 | struct fb_var_screeninfo *var); | |
148 | static void control_init_info(struct fb_info *info, struct fb_info_control *p); | |
149 | static void control_cleanup(void); | |
150 | ||
151 | ||
152 | /************************** Internal variables *******************************/ | |
153 | ||
154 | static struct fb_info_control *control_fb; | |
155 | ||
156 | static int default_vmode __initdata = VMODE_NVRAM; | |
157 | static int default_cmode __initdata = CMODE_NVRAM; | |
158 | ||
159 | ||
160 | static struct fb_ops controlfb_ops = { | |
161 | .owner = THIS_MODULE, | |
162 | .fb_check_var = controlfb_check_var, | |
163 | .fb_set_par = controlfb_set_par, | |
164 | .fb_setcolreg = controlfb_setcolreg, | |
165 | .fb_pan_display = controlfb_pan_display, | |
166 | .fb_blank = controlfb_blank, | |
167 | .fb_mmap = controlfb_mmap, | |
168 | .fb_fillrect = cfb_fillrect, | |
169 | .fb_copyarea = cfb_copyarea, | |
170 | .fb_imageblit = cfb_imageblit, | |
1da177e4 LT |
171 | }; |
172 | ||
173 | ||
174 | /******************** The functions for controlfb_ops ********************/ | |
175 | ||
176 | #ifdef MODULE | |
177 | MODULE_LICENSE("GPL"); | |
178 | ||
179 | int init_module(void) | |
180 | { | |
181 | struct device_node *dp; | |
182 | ||
183 | dp = find_devices("control"); | |
184 | if (dp != 0 && !control_of_init(dp)) | |
185 | return 0; | |
186 | ||
187 | return -ENXIO; | |
188 | } | |
189 | ||
190 | void cleanup_module(void) | |
191 | { | |
192 | control_cleanup(); | |
193 | } | |
194 | #endif | |
195 | ||
196 | /* | |
197 | * Checks a var structure | |
198 | */ | |
199 | static int controlfb_check_var (struct fb_var_screeninfo *var, struct fb_info *info) | |
200 | { | |
201 | struct fb_par_control par; | |
202 | int err; | |
203 | ||
204 | err = control_var_to_par(var, &par, info); | |
205 | if (err) | |
206 | return err; | |
207 | control_par_to_var(&par, var); | |
208 | ||
209 | return 0; | |
210 | } | |
211 | ||
212 | /* | |
213 | * Applies current var to display | |
214 | */ | |
215 | static int controlfb_set_par (struct fb_info *info) | |
216 | { | |
217 | struct fb_info_control *p = (struct fb_info_control *) info; | |
218 | struct fb_par_control par; | |
219 | int err; | |
220 | ||
221 | if((err = control_var_to_par(&info->var, &par, info))) { | |
222 | printk (KERN_ERR "controlfb_set_par: error calling" | |
223 | " control_var_to_par: %d.\n", err); | |
224 | return err; | |
225 | } | |
226 | ||
227 | control_set_hardware(p, &par); | |
228 | ||
229 | info->fix.visual = (p->par.cmode == CMODE_8) ? | |
230 | FB_VISUAL_PSEUDOCOLOR : FB_VISUAL_DIRECTCOLOR; | |
231 | info->fix.line_length = p->par.pitch; | |
232 | info->fix.xpanstep = 32 >> p->par.cmode; | |
233 | info->fix.ypanstep = 1; | |
234 | ||
235 | return 0; | |
236 | } | |
237 | ||
238 | /* | |
239 | * Set screen start address according to var offset values | |
240 | */ | |
241 | static inline void set_screen_start(int xoffset, int yoffset, | |
242 | struct fb_info_control *p) | |
243 | { | |
244 | struct fb_par_control *par = &p->par; | |
245 | ||
246 | par->xoffset = xoffset; | |
247 | par->yoffset = yoffset; | |
248 | out_le32(CNTRL_REG(p,start_addr), | |
249 | par->yoffset * par->pitch + (par->xoffset << par->cmode)); | |
250 | } | |
251 | ||
252 | ||
253 | static int controlfb_pan_display(struct fb_var_screeninfo *var, | |
254 | struct fb_info *info) | |
255 | { | |
256 | unsigned int xoffset, hstep; | |
257 | struct fb_info_control *p = (struct fb_info_control *)info; | |
258 | struct fb_par_control *par = &p->par; | |
259 | ||
260 | /* | |
261 | * make sure start addr will be 32-byte aligned | |
262 | */ | |
263 | hstep = 0x1f >> par->cmode; | |
264 | xoffset = (var->xoffset + hstep) & ~hstep; | |
265 | ||
266 | if (xoffset+par->xres > par->vxres || | |
267 | var->yoffset+par->yres > par->vyres) | |
268 | return -EINVAL; | |
269 | ||
270 | set_screen_start(xoffset, var->yoffset, p); | |
271 | ||
272 | return 0; | |
273 | } | |
274 | ||
275 | ||
276 | /* | |
277 | * Private mmap since we want to have a different caching on the framebuffer | |
278 | * for controlfb. | |
279 | * Note there's no locking in here; it's done in fb_mmap() in fbmem.c. | |
280 | */ | |
216d526c | 281 | static int controlfb_mmap(struct fb_info *info, |
1da177e4 LT |
282 | struct vm_area_struct *vma) |
283 | { | |
284 | unsigned long off, start; | |
285 | u32 len; | |
286 | ||
287 | off = vma->vm_pgoff << PAGE_SHIFT; | |
288 | ||
289 | /* frame buffer memory */ | |
290 | start = info->fix.smem_start; | |
291 | len = PAGE_ALIGN((start & ~PAGE_MASK)+info->fix.smem_len); | |
292 | if (off >= len) { | |
293 | /* memory mapped io */ | |
294 | off -= len; | |
295 | if (info->var.accel_flags) | |
296 | return -EINVAL; | |
297 | start = info->fix.mmio_start; | |
298 | len = PAGE_ALIGN((start & ~PAGE_MASK)+info->fix.mmio_len); | |
299 | pgprot_val(vma->vm_page_prot) |= _PAGE_NO_CACHE|_PAGE_GUARDED; | |
300 | } else { | |
301 | /* framebuffer */ | |
302 | pgprot_val(vma->vm_page_prot) |= _PAGE_WRITETHRU; | |
303 | } | |
304 | start &= PAGE_MASK; | |
305 | if ((vma->vm_end - vma->vm_start + off) > len) | |
306 | return -EINVAL; | |
307 | off += start; | |
308 | vma->vm_pgoff = off >> PAGE_SHIFT; | |
309 | if (io_remap_pfn_range(vma, vma->vm_start, off >> PAGE_SHIFT, | |
310 | vma->vm_end - vma->vm_start, vma->vm_page_prot)) | |
311 | return -EAGAIN; | |
312 | ||
313 | return 0; | |
314 | } | |
315 | ||
316 | static int controlfb_blank(int blank_mode, struct fb_info *info) | |
317 | { | |
318 | struct fb_info_control *p = (struct fb_info_control *) info; | |
319 | unsigned ctrl; | |
320 | ||
321 | ctrl = ld_le32(CNTRL_REG(p,ctrl)); | |
322 | if (blank_mode > 0) | |
323 | switch (blank_mode) { | |
324 | case FB_BLANK_VSYNC_SUSPEND: | |
325 | ctrl &= ~3; | |
326 | break; | |
327 | case FB_BLANK_HSYNC_SUSPEND: | |
328 | ctrl &= ~0x30; | |
329 | break; | |
330 | case FB_BLANK_POWERDOWN: | |
331 | ctrl &= ~0x33; | |
332 | /* fall through */ | |
333 | case FB_BLANK_NORMAL: | |
334 | ctrl |= 0x400; | |
335 | break; | |
336 | default: | |
337 | break; | |
338 | } | |
339 | else { | |
340 | ctrl &= ~0x400; | |
341 | ctrl |= 0x33; | |
342 | } | |
343 | out_le32(CNTRL_REG(p,ctrl), ctrl); | |
344 | ||
345 | return 0; | |
346 | } | |
347 | ||
348 | static int controlfb_setcolreg(u_int regno, u_int red, u_int green, u_int blue, | |
349 | u_int transp, struct fb_info *info) | |
350 | { | |
351 | struct fb_info_control *p = (struct fb_info_control *) info; | |
352 | __u8 r, g, b; | |
353 | ||
354 | if (regno > 255) | |
355 | return 1; | |
356 | ||
357 | r = red >> 8; | |
358 | g = green >> 8; | |
359 | b = blue >> 8; | |
360 | ||
361 | out_8(&p->cmap_regs->addr, regno); /* tell clut what addr to fill */ | |
362 | out_8(&p->cmap_regs->lut, r); /* send one color channel at */ | |
363 | out_8(&p->cmap_regs->lut, g); /* a time... */ | |
364 | out_8(&p->cmap_regs->lut, b); | |
365 | ||
366 | if (regno < 16) { | |
367 | int i; | |
368 | switch (p->par.cmode) { | |
369 | case CMODE_16: | |
370 | p->pseudo_palette[regno] = | |
371 | (regno << 10) | (regno << 5) | regno; | |
372 | break; | |
373 | case CMODE_32: | |
374 | i = (regno << 8) | regno; | |
375 | p->pseudo_palette[regno] = (i << 16) | i; | |
376 | break; | |
377 | } | |
378 | } | |
379 | ||
380 | return 0; | |
381 | } | |
382 | ||
383 | ||
384 | /******************** End of controlfb_ops implementation ******************/ | |
385 | ||
386 | ||
387 | ||
388 | static void set_control_clock(unsigned char *params) | |
389 | { | |
390 | #ifdef CONFIG_ADB_CUDA | |
391 | struct adb_request req; | |
392 | int i; | |
393 | ||
394 | for (i = 0; i < 3; ++i) { | |
395 | cuda_request(&req, NULL, 5, CUDA_PACKET, CUDA_GET_SET_IIC, | |
396 | 0x50, i + 1, params[i]); | |
397 | while (!req.complete) | |
398 | cuda_poll(); | |
399 | } | |
400 | #endif | |
401 | } | |
402 | ||
403 | ||
404 | /* | |
405 | * finish off the driver initialization and register | |
406 | */ | |
407 | static int __init init_control(struct fb_info_control *p) | |
408 | { | |
409 | int full, sense, vmode, cmode, vyres; | |
410 | struct fb_var_screeninfo var; | |
411 | int rc; | |
412 | ||
413 | printk(KERN_INFO "controlfb: "); | |
414 | ||
415 | full = p->total_vram == 0x400000; | |
416 | ||
417 | /* Try to pick a video mode out of NVRAM if we have one. */ | |
4938d3f4 | 418 | #ifdef CONFIG_NVRAM |
1da177e4 LT |
419 | if (default_cmode == CMODE_NVRAM){ |
420 | cmode = nvram_read_byte(NV_CMODE); | |
421 | if(cmode < CMODE_8 || cmode > CMODE_32) | |
422 | cmode = CMODE_8; | |
423 | } else | |
4938d3f4 | 424 | #endif |
1da177e4 | 425 | cmode=default_cmode; |
4938d3f4 | 426 | #ifdef CONFIG_NVRAM |
1da177e4 LT |
427 | if (default_vmode == VMODE_NVRAM) { |
428 | vmode = nvram_read_byte(NV_VMODE); | |
429 | if (vmode < 1 || vmode > VMODE_MAX || | |
430 | control_mac_modes[vmode - 1].m[full] < cmode) { | |
431 | sense = read_control_sense(p); | |
432 | printk("Monitor sense value = 0x%x, ", sense); | |
433 | vmode = mac_map_monitor_sense(sense); | |
434 | if (control_mac_modes[vmode - 1].m[full] < cmode) | |
435 | vmode = VMODE_640_480_60; | |
436 | } | |
4938d3f4 BC |
437 | } else |
438 | #endif | |
439 | { | |
1da177e4 LT |
440 | vmode=default_vmode; |
441 | if (control_mac_modes[vmode - 1].m[full] < cmode) { | |
442 | if (cmode > CMODE_8) | |
443 | cmode--; | |
444 | else | |
445 | vmode = VMODE_640_480_60; | |
446 | } | |
447 | } | |
448 | ||
449 | /* Initialize info structure */ | |
450 | control_init_info(&p->info, p); | |
451 | ||
452 | /* Setup default var */ | |
453 | if (mac_vmode_to_var(vmode, cmode, &var) < 0) { | |
454 | /* This shouldn't happen! */ | |
455 | printk("mac_vmode_to_var(%d, %d,) failed\n", vmode, cmode); | |
456 | try_again: | |
457 | vmode = VMODE_640_480_60; | |
458 | cmode = CMODE_8; | |
459 | if (mac_vmode_to_var(vmode, cmode, &var) < 0) { | |
460 | printk(KERN_ERR "controlfb: mac_vmode_to_var() failed\n"); | |
461 | return -ENXIO; | |
462 | } | |
463 | printk(KERN_INFO "controlfb: "); | |
464 | } | |
465 | printk("using video mode %d and color mode %d.\n", vmode, cmode); | |
466 | ||
467 | vyres = (p->total_vram - CTRLFB_OFF) / (var.xres << cmode); | |
468 | if (vyres > var.yres) | |
469 | var.yres_virtual = vyres; | |
470 | ||
471 | /* Apply default var */ | |
472 | var.activate = FB_ACTIVATE_NOW; | |
473 | rc = fb_set_var(&p->info, &var); | |
474 | if (rc && (vmode != VMODE_640_480_60 || cmode != CMODE_8)) | |
475 | goto try_again; | |
476 | ||
477 | /* Register with fbdev layer */ | |
478 | if (register_framebuffer(&p->info) < 0) | |
479 | return -ENXIO; | |
480 | ||
481 | printk(KERN_INFO "fb%d: control display adapter\n", p->info.node); | |
482 | ||
483 | return 0; | |
484 | } | |
485 | ||
486 | #define RADACAL_WRITE(a,d) \ | |
487 | out_8(&p->cmap_regs->addr, (a)); \ | |
488 | out_8(&p->cmap_regs->dat, (d)) | |
489 | ||
490 | /* Now how about actually saying, Make it so! */ | |
491 | /* Some things in here probably don't need to be done each time. */ | |
492 | static void control_set_hardware(struct fb_info_control *p, struct fb_par_control *par) | |
493 | { | |
494 | struct control_regvals *r; | |
495 | volatile struct preg __iomem *rp; | |
496 | int i, cmode; | |
497 | ||
498 | if (PAR_EQUAL(&p->par, par)) { | |
499 | /* | |
500 | * check if only xoffset or yoffset differs. | |
501 | * this prevents flickers in typical VT switch case. | |
502 | */ | |
503 | if (p->par.xoffset != par->xoffset || | |
504 | p->par.yoffset != par->yoffset) | |
505 | set_screen_start(par->xoffset, par->yoffset, p); | |
506 | ||
507 | return; | |
508 | } | |
509 | ||
510 | p->par = *par; | |
511 | cmode = p->par.cmode; | |
512 | r = &par->regvals; | |
513 | ||
514 | /* Turn off display */ | |
515 | out_le32(CNTRL_REG(p,ctrl), 0x400 | par->ctrl); | |
516 | ||
517 | set_control_clock(r->clock_params); | |
518 | ||
519 | RADACAL_WRITE(0x20, r->radacal_ctrl); | |
520 | RADACAL_WRITE(0x21, p->control_use_bank2 ? 0 : 1); | |
521 | RADACAL_WRITE(0x10, 0); | |
522 | RADACAL_WRITE(0x11, 0); | |
523 | ||
524 | rp = &p->control_regs->vswin; | |
525 | for (i = 0; i < 16; ++i, ++rp) | |
526 | out_le32(&rp->r, r->regs[i]); | |
527 | ||
528 | out_le32(CNTRL_REG(p,pitch), par->pitch); | |
529 | out_le32(CNTRL_REG(p,mode), r->mode); | |
530 | out_le32(CNTRL_REG(p,vram_attr), p->vram_attr); | |
531 | out_le32(CNTRL_REG(p,start_addr), par->yoffset * par->pitch | |
532 | + (par->xoffset << cmode)); | |
533 | out_le32(CNTRL_REG(p,rfrcnt), 0x1e5); | |
534 | out_le32(CNTRL_REG(p,intr_ena), 0); | |
535 | ||
536 | /* Turn on display */ | |
537 | out_le32(CNTRL_REG(p,ctrl), par->ctrl); | |
538 | ||
539 | #ifdef CONFIG_BOOTX_TEXT | |
540 | btext_update_display(p->frame_buffer_phys + CTRLFB_OFF, | |
541 | p->par.xres, p->par.yres, | |
542 | (cmode == CMODE_32? 32: cmode == CMODE_16? 16: 8), | |
543 | p->par.pitch); | |
544 | #endif /* CONFIG_BOOTX_TEXT */ | |
545 | } | |
546 | ||
547 | ||
548 | /* | |
cc5d0189 | 549 | * Parse user speficied options (`video=controlfb:') |
1da177e4 | 550 | */ |
cc5d0189 BH |
551 | static void __init control_setup(char *options) |
552 | { | |
553 | char *this_opt; | |
554 | ||
555 | if (!options || !*options) | |
556 | return; | |
557 | ||
558 | while ((this_opt = strsep(&options, ",")) != NULL) { | |
559 | if (!strncmp(this_opt, "vmode:", 6)) { | |
560 | int vmode = simple_strtoul(this_opt+6, NULL, 0); | |
561 | if (vmode > 0 && vmode <= VMODE_MAX && | |
562 | control_mac_modes[vmode - 1].m[1] >= 0) | |
563 | default_vmode = vmode; | |
564 | } else if (!strncmp(this_opt, "cmode:", 6)) { | |
565 | int depth = simple_strtoul(this_opt+6, NULL, 0); | |
566 | switch (depth) { | |
567 | case CMODE_8: | |
568 | case CMODE_16: | |
569 | case CMODE_32: | |
570 | default_cmode = depth; | |
571 | break; | |
572 | case 8: | |
573 | default_cmode = CMODE_8; | |
574 | break; | |
575 | case 15: | |
576 | case 16: | |
577 | default_cmode = CMODE_16; | |
578 | break; | |
579 | case 24: | |
580 | case 32: | |
581 | default_cmode = CMODE_32; | |
582 | break; | |
583 | } | |
584 | } | |
585 | } | |
586 | } | |
587 | ||
588 | static int __init control_init(void) | |
1da177e4 LT |
589 | { |
590 | struct device_node *dp; | |
591 | char *option = NULL; | |
592 | ||
593 | if (fb_get_options("controlfb", &option)) | |
594 | return -ENODEV; | |
595 | control_setup(option); | |
596 | ||
597 | dp = find_devices("control"); | |
598 | if (dp != 0 && !control_of_init(dp)) | |
599 | return 0; | |
600 | ||
601 | return -ENXIO; | |
602 | } | |
603 | ||
604 | module_init(control_init); | |
605 | ||
606 | /* Work out which banks of VRAM we have installed. */ | |
607 | /* danj: I guess the card just ignores writes to nonexistant VRAM... */ | |
608 | ||
609 | static void __init find_vram_size(struct fb_info_control *p) | |
610 | { | |
611 | int bank1, bank2; | |
612 | ||
613 | /* | |
614 | * Set VRAM in 2MB (bank 1) mode | |
615 | * VRAM Bank 2 will be accessible through offset 0x600000 if present | |
616 | * and VRAM Bank 1 will not respond at that offset even if present | |
617 | */ | |
618 | out_le32(CNTRL_REG(p,vram_attr), 0x31); | |
619 | ||
620 | out_8(&p->frame_buffer[0x600000], 0xb3); | |
621 | out_8(&p->frame_buffer[0x600001], 0x71); | |
622 | asm volatile("eieio; dcbf 0,%0" : : "r" (&p->frame_buffer[0x600000]) | |
623 | : "memory" ); | |
624 | mb(); | |
625 | asm volatile("eieio; dcbi 0,%0" : : "r" (&p->frame_buffer[0x600000]) | |
626 | : "memory" ); | |
627 | mb(); | |
628 | ||
629 | bank2 = (in_8(&p->frame_buffer[0x600000]) == 0xb3) | |
630 | && (in_8(&p->frame_buffer[0x600001]) == 0x71); | |
631 | ||
632 | /* | |
633 | * Set VRAM in 2MB (bank 2) mode | |
634 | * VRAM Bank 1 will be accessible through offset 0x000000 if present | |
635 | * and VRAM Bank 2 will not respond at that offset even if present | |
636 | */ | |
637 | out_le32(CNTRL_REG(p,vram_attr), 0x39); | |
638 | ||
639 | out_8(&p->frame_buffer[0], 0x5a); | |
640 | out_8(&p->frame_buffer[1], 0xc7); | |
641 | asm volatile("eieio; dcbf 0,%0" : : "r" (&p->frame_buffer[0]) | |
642 | : "memory" ); | |
643 | mb(); | |
644 | asm volatile("eieio; dcbi 0,%0" : : "r" (&p->frame_buffer[0]) | |
645 | : "memory" ); | |
646 | mb(); | |
647 | ||
648 | bank1 = (in_8(&p->frame_buffer[0]) == 0x5a) | |
649 | && (in_8(&p->frame_buffer[1]) == 0xc7); | |
650 | ||
651 | if (bank2) { | |
652 | if (!bank1) { | |
653 | /* | |
654 | * vram bank 2 only | |
655 | */ | |
656 | p->control_use_bank2 = 1; | |
657 | p->vram_attr = 0x39; | |
658 | p->frame_buffer += 0x600000; | |
659 | p->frame_buffer_phys += 0x600000; | |
660 | } else { | |
661 | /* | |
662 | * 4 MB vram | |
663 | */ | |
664 | p->vram_attr = 0x51; | |
665 | } | |
666 | } else { | |
667 | /* | |
668 | * vram bank 1 only | |
669 | */ | |
670 | p->vram_attr = 0x31; | |
671 | } | |
672 | ||
673 | p->total_vram = (bank1 + bank2) * 0x200000; | |
674 | ||
675 | printk(KERN_INFO "controlfb: VRAM Total = %dMB " | |
676 | "(%dMB @ bank 1, %dMB @ bank 2)\n", | |
677 | (bank1 + bank2) << 1, bank1 << 1, bank2 << 1); | |
678 | } | |
679 | ||
680 | ||
681 | /* | |
682 | * find "control" and initialize | |
683 | */ | |
684 | static int __init control_of_init(struct device_node *dp) | |
685 | { | |
686 | struct fb_info_control *p; | |
cc5d0189 | 687 | struct resource fb_res, reg_res; |
1da177e4 LT |
688 | |
689 | if (control_fb) { | |
690 | printk(KERN_ERR "controlfb: only one control is supported\n"); | |
691 | return -ENXIO; | |
692 | } | |
cc5d0189 BH |
693 | |
694 | if (of_pci_address_to_resource(dp, 2, &fb_res) || | |
695 | of_pci_address_to_resource(dp, 1, ®_res)) { | |
696 | printk(KERN_ERR "can't get 2 addresses for control\n"); | |
1da177e4 LT |
697 | return -ENXIO; |
698 | } | |
699 | p = kmalloc(sizeof(*p), GFP_KERNEL); | |
700 | if (p == 0) | |
701 | return -ENXIO; | |
702 | control_fb = p; /* save it for cleanups */ | |
703 | memset(p, 0, sizeof(*p)); | |
704 | ||
705 | /* Map in frame buffer and registers */ | |
cc5d0189 BH |
706 | p->fb_orig_base = fb_res.start; |
707 | p->fb_orig_size = fb_res.end - fb_res.start + 1; | |
708 | /* use the big-endian aperture (??) */ | |
709 | p->frame_buffer_phys = fb_res.start + 0x800000; | |
710 | p->control_regs_phys = reg_res.start; | |
711 | p->control_regs_size = reg_res.end - reg_res.start + 1; | |
1da177e4 LT |
712 | |
713 | if (!p->fb_orig_base || | |
714 | !request_mem_region(p->fb_orig_base,p->fb_orig_size,"controlfb")) { | |
715 | p->fb_orig_base = 0; | |
716 | goto error_out; | |
717 | } | |
718 | /* map at most 8MB for the frame buffer */ | |
719 | p->frame_buffer = __ioremap(p->frame_buffer_phys, 0x800000, | |
720 | _PAGE_WRITETHRU); | |
721 | ||
722 | if (!p->control_regs_phys || | |
723 | !request_mem_region(p->control_regs_phys, p->control_regs_size, | |
724 | "controlfb regs")) { | |
725 | p->control_regs_phys = 0; | |
726 | goto error_out; | |
727 | } | |
728 | p->control_regs = ioremap(p->control_regs_phys, p->control_regs_size); | |
729 | ||
730 | p->cmap_regs_phys = 0xf301b000; /* XXX not in prom? */ | |
731 | if (!request_mem_region(p->cmap_regs_phys, 0x1000, "controlfb cmap")) { | |
732 | p->cmap_regs_phys = 0; | |
733 | goto error_out; | |
734 | } | |
735 | p->cmap_regs = ioremap(p->cmap_regs_phys, 0x1000); | |
736 | ||
737 | if (!p->cmap_regs || !p->control_regs || !p->frame_buffer) | |
738 | goto error_out; | |
739 | ||
740 | find_vram_size(p); | |
741 | if (!p->total_vram) | |
742 | goto error_out; | |
743 | ||
744 | if (init_control(p) < 0) | |
745 | goto error_out; | |
746 | ||
747 | return 0; | |
748 | ||
749 | error_out: | |
750 | control_cleanup(); | |
751 | return -ENXIO; | |
752 | } | |
753 | ||
754 | /* | |
755 | * Get the monitor sense value. | |
756 | * Note that this can be called before calibrate_delay, | |
757 | * so we can't use udelay. | |
758 | */ | |
759 | static int read_control_sense(struct fb_info_control *p) | |
760 | { | |
761 | int sense; | |
762 | ||
763 | out_le32(CNTRL_REG(p,mon_sense), 7); /* drive all lines high */ | |
764 | __delay(200); | |
765 | out_le32(CNTRL_REG(p,mon_sense), 077); /* turn off drivers */ | |
766 | __delay(2000); | |
767 | sense = (in_le32(CNTRL_REG(p,mon_sense)) & 0x1c0) << 2; | |
768 | ||
769 | /* drive each sense line low in turn and collect the other 2 */ | |
770 | out_le32(CNTRL_REG(p,mon_sense), 033); /* drive A low */ | |
771 | __delay(2000); | |
772 | sense |= (in_le32(CNTRL_REG(p,mon_sense)) & 0xc0) >> 2; | |
773 | out_le32(CNTRL_REG(p,mon_sense), 055); /* drive B low */ | |
774 | __delay(2000); | |
775 | sense |= ((in_le32(CNTRL_REG(p,mon_sense)) & 0x100) >> 5) | |
776 | | ((in_le32(CNTRL_REG(p,mon_sense)) & 0x40) >> 4); | |
777 | out_le32(CNTRL_REG(p,mon_sense), 066); /* drive C low */ | |
778 | __delay(2000); | |
779 | sense |= (in_le32(CNTRL_REG(p,mon_sense)) & 0x180) >> 7; | |
780 | ||
781 | out_le32(CNTRL_REG(p,mon_sense), 077); /* turn off drivers */ | |
782 | ||
783 | return sense; | |
784 | } | |
785 | ||
786 | /********************** Various translation functions **********************/ | |
787 | ||
788 | #define CONTROL_PIXCLOCK_BASE 256016 | |
789 | #define CONTROL_PIXCLOCK_MIN 5000 /* ~ 200 MHz dot clock */ | |
790 | ||
791 | /* | |
792 | * calculate the clock paramaters to be sent to CUDA according to given | |
793 | * pixclock in pico second. | |
794 | */ | |
795 | static int calc_clock_params(unsigned long clk, unsigned char *param) | |
796 | { | |
797 | unsigned long p0, p1, p2, k, l, m, n, min; | |
798 | ||
799 | if (clk > (CONTROL_PIXCLOCK_BASE << 3)) | |
800 | return 1; | |
801 | ||
802 | p2 = ((clk << 4) < CONTROL_PIXCLOCK_BASE)? 3: 2; | |
803 | l = clk << p2; | |
804 | p0 = 0; | |
805 | p1 = 0; | |
806 | for (k = 1, min = l; k < 32; k++) { | |
807 | unsigned long rem; | |
808 | ||
809 | m = CONTROL_PIXCLOCK_BASE * k; | |
810 | n = m / l; | |
811 | rem = m % l; | |
812 | if (n && (n < 128) && rem < min) { | |
813 | p0 = k; | |
814 | p1 = n; | |
815 | min = rem; | |
816 | } | |
817 | } | |
818 | if (!p0 || !p1) | |
819 | return 1; | |
820 | ||
821 | param[0] = p0; | |
822 | param[1] = p1; | |
823 | param[2] = p2; | |
824 | ||
825 | return 0; | |
826 | } | |
827 | ||
828 | ||
829 | /* | |
830 | * This routine takes a user-supplied var, and picks the best vmode/cmode | |
831 | * from it. | |
832 | */ | |
833 | ||
834 | static int control_var_to_par(struct fb_var_screeninfo *var, | |
835 | struct fb_par_control *par, const struct fb_info *fb_info) | |
836 | { | |
837 | int cmode, piped_diff, hstep; | |
838 | unsigned hperiod, hssync, hsblank, hesync, heblank, piped, heq, hlfln, | |
839 | hserr, vperiod, vssync, vesync, veblank, vsblank, vswin, vewin; | |
840 | unsigned long pixclock; | |
841 | struct fb_info_control *p = (struct fb_info_control *) fb_info; | |
842 | struct control_regvals *r = &par->regvals; | |
843 | ||
844 | switch (var->bits_per_pixel) { | |
845 | case 8: | |
846 | par->cmode = CMODE_8; | |
847 | if (p->total_vram > 0x200000) { | |
848 | r->mode = 3; | |
849 | r->radacal_ctrl = 0x20; | |
850 | piped_diff = 13; | |
851 | } else { | |
852 | r->mode = 2; | |
853 | r->radacal_ctrl = 0x10; | |
854 | piped_diff = 9; | |
855 | } | |
856 | break; | |
857 | case 15: | |
858 | case 16: | |
859 | par->cmode = CMODE_16; | |
860 | if (p->total_vram > 0x200000) { | |
861 | r->mode = 2; | |
862 | r->radacal_ctrl = 0x24; | |
863 | piped_diff = 5; | |
864 | } else { | |
865 | r->mode = 1; | |
866 | r->radacal_ctrl = 0x14; | |
867 | piped_diff = 3; | |
868 | } | |
869 | break; | |
870 | case 32: | |
871 | par->cmode = CMODE_32; | |
872 | if (p->total_vram > 0x200000) { | |
873 | r->mode = 1; | |
874 | r->radacal_ctrl = 0x28; | |
875 | } else { | |
876 | r->mode = 0; | |
877 | r->radacal_ctrl = 0x18; | |
878 | } | |
879 | piped_diff = 1; | |
880 | break; | |
881 | default: | |
882 | return -EINVAL; | |
883 | } | |
884 | ||
885 | /* | |
886 | * adjust xres and vxres so that the corresponding memory widths are | |
887 | * 32-byte aligned | |
888 | */ | |
889 | hstep = 31 >> par->cmode; | |
890 | par->xres = (var->xres + hstep) & ~hstep; | |
891 | par->vxres = (var->xres_virtual + hstep) & ~hstep; | |
892 | par->xoffset = (var->xoffset + hstep) & ~hstep; | |
893 | if (par->vxres < par->xres) | |
894 | par->vxres = par->xres; | |
895 | par->pitch = par->vxres << par->cmode; | |
896 | ||
897 | par->yres = var->yres; | |
898 | par->vyres = var->yres_virtual; | |
899 | par->yoffset = var->yoffset; | |
900 | if (par->vyres < par->yres) | |
901 | par->vyres = par->yres; | |
902 | ||
903 | par->sync = var->sync; | |
904 | ||
905 | if (par->pitch * par->vyres + CTRLFB_OFF > p->total_vram) | |
906 | return -EINVAL; | |
907 | ||
908 | if (par->xoffset + par->xres > par->vxres) | |
909 | par->xoffset = par->vxres - par->xres; | |
910 | if (par->yoffset + par->yres > par->vyres) | |
911 | par->yoffset = par->vyres - par->yres; | |
912 | ||
913 | pixclock = (var->pixclock < CONTROL_PIXCLOCK_MIN)? CONTROL_PIXCLOCK_MIN: | |
914 | var->pixclock; | |
915 | if (calc_clock_params(pixclock, r->clock_params)) | |
916 | return -EINVAL; | |
917 | ||
918 | hperiod = ((var->left_margin + par->xres + var->right_margin | |
919 | + var->hsync_len) >> 1) - 2; | |
920 | hssync = hperiod + 1; | |
921 | hsblank = hssync - (var->right_margin >> 1); | |
922 | hesync = (var->hsync_len >> 1) - 1; | |
923 | heblank = (var->left_margin >> 1) + hesync; | |
924 | piped = heblank - piped_diff; | |
925 | heq = var->hsync_len >> 2; | |
926 | hlfln = (hperiod+2) >> 1; | |
927 | hserr = hssync-hesync; | |
928 | vperiod = (var->vsync_len + var->lower_margin + par->yres | |
929 | + var->upper_margin) << 1; | |
930 | vssync = vperiod - 2; | |
931 | vesync = (var->vsync_len << 1) - vperiod + vssync; | |
932 | veblank = (var->upper_margin << 1) + vesync; | |
933 | vsblank = vssync - (var->lower_margin << 1); | |
934 | vswin = (vsblank+vssync) >> 1; | |
935 | vewin = (vesync+veblank) >> 1; | |
936 | ||
937 | r->regs[0] = vswin; | |
938 | r->regs[1] = vsblank; | |
939 | r->regs[2] = veblank; | |
940 | r->regs[3] = vewin; | |
941 | r->regs[4] = vesync; | |
942 | r->regs[5] = vssync; | |
943 | r->regs[6] = vperiod; | |
944 | r->regs[7] = piped; | |
945 | r->regs[8] = hperiod; | |
946 | r->regs[9] = hsblank; | |
947 | r->regs[10] = heblank; | |
948 | r->regs[11] = hesync; | |
949 | r->regs[12] = hssync; | |
950 | r->regs[13] = heq; | |
951 | r->regs[14] = hlfln; | |
952 | r->regs[15] = hserr; | |
953 | ||
954 | if (par->xres >= 1280 && par->cmode >= CMODE_16) | |
955 | par->ctrl = 0x7f; | |
956 | else | |
957 | par->ctrl = 0x3b; | |
958 | ||
959 | if (mac_var_to_vmode(var, &par->vmode, &cmode)) | |
960 | par->vmode = 0; | |
961 | ||
962 | return 0; | |
963 | } | |
964 | ||
965 | ||
966 | /* | |
967 | * Convert hardware data in par to an fb_var_screeninfo | |
968 | */ | |
969 | ||
970 | static void control_par_to_var(struct fb_par_control *par, struct fb_var_screeninfo *var) | |
971 | { | |
972 | struct control_regints *rv; | |
973 | ||
974 | rv = (struct control_regints *) par->regvals.regs; | |
975 | ||
976 | memset(var, 0, sizeof(*var)); | |
977 | var->xres = par->xres; | |
978 | var->yres = par->yres; | |
979 | var->xres_virtual = par->vxres; | |
980 | var->yres_virtual = par->vyres; | |
981 | var->xoffset = par->xoffset; | |
982 | var->yoffset = par->yoffset; | |
983 | ||
984 | switch(par->cmode) { | |
985 | default: | |
986 | case CMODE_8: | |
987 | var->bits_per_pixel = 8; | |
988 | var->red.length = 8; | |
989 | var->green.length = 8; | |
990 | var->blue.length = 8; | |
991 | break; | |
992 | case CMODE_16: /* RGB 555 */ | |
993 | var->bits_per_pixel = 16; | |
994 | var->red.offset = 10; | |
995 | var->red.length = 5; | |
996 | var->green.offset = 5; | |
997 | var->green.length = 5; | |
998 | var->blue.length = 5; | |
999 | break; | |
1000 | case CMODE_32: /* RGB 888 */ | |
1001 | var->bits_per_pixel = 32; | |
1002 | var->red.offset = 16; | |
1003 | var->red.length = 8; | |
1004 | var->green.offset = 8; | |
1005 | var->green.length = 8; | |
1006 | var->blue.length = 8; | |
1007 | var->transp.offset = 24; | |
1008 | var->transp.length = 8; | |
1009 | break; | |
1010 | } | |
1011 | var->height = -1; | |
1012 | var->width = -1; | |
1013 | var->vmode = FB_VMODE_NONINTERLACED; | |
1014 | ||
1015 | var->left_margin = (rv->heblank - rv->hesync) << 1; | |
1016 | var->right_margin = (rv->hssync - rv->hsblank) << 1; | |
1017 | var->hsync_len = (rv->hperiod + 2 - rv->hssync + rv->hesync) << 1; | |
1018 | ||
1019 | var->upper_margin = (rv->veblank - rv->vesync) >> 1; | |
1020 | var->lower_margin = (rv->vssync - rv->vsblank) >> 1; | |
1021 | var->vsync_len = (rv->vperiod - rv->vssync + rv->vesync) >> 1; | |
1022 | ||
1023 | var->sync = par->sync; | |
1024 | ||
1025 | /* | |
1026 | * 10^12 * clock_params[0] / (3906400 * clock_params[1] | |
1027 | * * 2^clock_params[2]) | |
1028 | * (10^12 * clock_params[0] / (3906400 * clock_params[1])) | |
1029 | * >> clock_params[2] | |
1030 | */ | |
1031 | /* (255990.17 * clock_params[0] / clock_params[1]) >> clock_params[2] */ | |
1032 | var->pixclock = CONTROL_PIXCLOCK_BASE * par->regvals.clock_params[0]; | |
1033 | var->pixclock /= par->regvals.clock_params[1]; | |
1034 | var->pixclock >>= par->regvals.clock_params[2]; | |
1035 | } | |
1036 | ||
1037 | /* | |
1038 | * Set misc info vars for this driver | |
1039 | */ | |
1040 | static void __init control_init_info(struct fb_info *info, struct fb_info_control *p) | |
1041 | { | |
1042 | /* Fill fb_info */ | |
1043 | info->par = &p->par; | |
1044 | info->fbops = &controlfb_ops; | |
1045 | info->pseudo_palette = p->pseudo_palette; | |
1046 | info->flags = FBINFO_DEFAULT | FBINFO_HWACCEL_YPAN; | |
1047 | info->screen_base = p->frame_buffer + CTRLFB_OFF; | |
1048 | ||
1049 | fb_alloc_cmap(&info->cmap, 256, 0); | |
1050 | ||
1051 | /* Fill fix common fields */ | |
1052 | strcpy(info->fix.id, "control"); | |
1053 | info->fix.mmio_start = p->control_regs_phys; | |
1054 | info->fix.mmio_len = sizeof(struct control_regs); | |
1055 | info->fix.type = FB_TYPE_PACKED_PIXELS; | |
1056 | info->fix.smem_start = p->frame_buffer_phys + CTRLFB_OFF; | |
1057 | info->fix.smem_len = p->total_vram - CTRLFB_OFF; | |
1058 | info->fix.ywrapstep = 0; | |
1059 | info->fix.type_aux = 0; | |
1060 | info->fix.accel = FB_ACCEL_NONE; | |
1061 | } | |
1062 | ||
1063 | ||
1064 | static void control_cleanup(void) | |
1065 | { | |
1066 | struct fb_info_control *p = control_fb; | |
1067 | ||
1068 | if (!p) | |
1069 | return; | |
1070 | ||
1071 | if (p->cmap_regs) | |
1072 | iounmap(p->cmap_regs); | |
1073 | if (p->control_regs) | |
1074 | iounmap(p->control_regs); | |
1075 | if (p->frame_buffer) { | |
1076 | if (p->control_use_bank2) | |
1077 | p->frame_buffer -= 0x600000; | |
1078 | iounmap(p->frame_buffer); | |
1079 | } | |
1080 | if (p->cmap_regs_phys) | |
1081 | release_mem_region(p->cmap_regs_phys, 0x1000); | |
1082 | if (p->control_regs_phys) | |
1083 | release_mem_region(p->control_regs_phys, p->control_regs_size); | |
1084 | if (p->fb_orig_base) | |
1085 | release_mem_region(p->fb_orig_base, p->fb_orig_size); | |
1086 | kfree(p); | |
1087 | } | |
1088 | ||
1089 |