[deliverable/linux.git] / drivers / video / ep93xx-fb.c

/*
 * linux/drivers/video/ep93xx-fb.c
 *
 * Framebuffer support for the EP93xx series.
 *
 * Copyright (C) 2007 Bluewater Systems Ltd
 * Author: Ryan Mallon
 *
 * Copyright (c) 2009 H Hartley Sweeten <hsweeten@visionengravers.com>
 *
 * Based on the Cirrus Logic ep93xxfb driver, and various other ep93xxfb
 * drivers.
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 *
 */

#include <linux/platform_device.h>
#include <linux/module.h>
#include <linux/dma-mapping.h>
#include <linux/slab.h>
#include <linux/clk.h>
#include <linux/fb.h>

#include <linux/platform_data/video-ep93xx.h>

/* Vertical Frame Timing Registers */
#define EP93XXFB_VLINES_TOTAL			0x0000	/* SW locked */
#define EP93XXFB_VSYNC				0x0004	/* SW locked */
#define EP93XXFB_VACTIVE			0x0008	/* SW locked */
#define EP93XXFB_VBLANK				0x0228	/* SW locked */
#define EP93XXFB_VCLK				0x000c	/* SW locked */

/* Horizontal Frame Timing Registers */
#define EP93XXFB_HCLKS_TOTAL			0x0010	/* SW locked */
#define EP93XXFB_HSYNC				0x0014	/* SW locked */
#define EP93XXFB_HACTIVE			0x0018	/* SW locked */
#define EP93XXFB_HBLANK				0x022c	/* SW locked */
#define EP93XXFB_HCLK				0x001c	/* SW locked */

/* Frame Buffer Memory Configuration Registers */
#define EP93XXFB_SCREEN_PAGE			0x0028
#define EP93XXFB_SCREEN_HPAGE			0x002c
#define EP93XXFB_SCREEN_LINES			0x0030
#define EP93XXFB_LINE_LENGTH			0x0034
#define EP93XXFB_VLINE_STEP			0x0038
#define EP93XXFB_LINE_CARRY			0x003c	/* SW locked */
#define EP93XXFB_EOL_OFFSET			0x0230

/* Other Video Registers */
#define EP93XXFB_BRIGHTNESS			0x0020
#define EP93XXFB_ATTRIBS			0x0024	/* SW locked */
#define EP93XXFB_SWLOCK				0x007c	/* SW locked */
#define EP93XXFB_AC_RATE			0x0214
#define EP93XXFB_FIFO_LEVEL			0x0234
#define EP93XXFB_PIXELMODE			0x0054
#define EP93XXFB_PIXELMODE_32BPP		(0x7 << 0)
#define EP93XXFB_PIXELMODE_24BPP		(0x6 << 0)
#define EP93XXFB_PIXELMODE_16BPP		(0x4 << 0)
#define EP93XXFB_PIXELMODE_8BPP			(0x2 << 0)
#define EP93XXFB_PIXELMODE_SHIFT_1P_24B		(0x0 << 3)
#define EP93XXFB_PIXELMODE_SHIFT_1P_18B		(0x1 << 3)
#define EP93XXFB_PIXELMODE_COLOR_LUT		(0x0 << 10)
#define EP93XXFB_PIXELMODE_COLOR_888		(0x4 << 10)
#define EP93XXFB_PIXELMODE_COLOR_555		(0x5 << 10)
#define EP93XXFB_PARL_IF_OUT			0x0058
#define EP93XXFB_PARL_IF_IN			0x005c

/* Blink Control Registers */
#define EP93XXFB_BLINK_RATE			0x0040
#define EP93XXFB_BLINK_MASK			0x0044
#define EP93XXFB_BLINK_PATTRN			0x0048
#define EP93XXFB_PATTRN_MASK			0x004c
#define EP93XXFB_BKGRND_OFFSET			0x0050

/* Hardware Cursor Registers */
#define EP93XXFB_CURSOR_ADR_START		0x0060
#define EP93XXFB_CURSOR_ADR_RESET		0x0064
#define EP93XXFB_CURSOR_SIZE			0x0068
#define EP93XXFB_CURSOR_COLOR1			0x006c
#define EP93XXFB_CURSOR_COLOR2			0x0070
#define EP93XXFB_CURSOR_BLINK_COLOR1		0x021c
#define EP93XXFB_CURSOR_BLINK_COLOR2		0x0220
#define EP93XXFB_CURSOR_XY_LOC			0x0074
#define EP93XXFB_CURSOR_DSCAN_HY_LOC		0x0078
#define EP93XXFB_CURSOR_BLINK_RATE_CTRL		0x0224

/* LUT Registers */
#define EP93XXFB_GRY_SCL_LUTR			0x0080
#define EP93XXFB_GRY_SCL_LUTG			0x0280
#define EP93XXFB_GRY_SCL_LUTB			0x0300
#define EP93XXFB_LUT_SW_CONTROL			0x0218
#define EP93XXFB_LUT_SW_CONTROL_SWTCH		(1 << 0)
#define EP93XXFB_LUT_SW_CONTROL_SSTAT		(1 << 1)
#define EP93XXFB_COLOR_LUT			0x0400

/* Video Signature Registers */
#define EP93XXFB_VID_SIG_RSLT_VAL		0x0200
#define EP93XXFB_VID_SIG_CTRL			0x0204
#define EP93XXFB_VSIG				0x0208
#define EP93XXFB_HSIG				0x020c
#define EP93XXFB_SIG_CLR_STR			0x0210

/* Minimum / Maximum resolutions supported */
#define EP93XXFB_MIN_XRES			64
#define EP93XXFB_MIN_YRES			64
#define EP93XXFB_MAX_XRES			1024
#define EP93XXFB_MAX_YRES			768

struct ep93xx_fbi {
	struct ep93xxfb_mach_info	*mach_info;
	struct clk			*clk;
	struct resource			*res;
	void __iomem			*mmio_base;
	unsigned int			pseudo_palette[256];
};

static int check_screenpage_bug = 1;
module_param(check_screenpage_bug, int, 0644);
MODULE_PARM_DESC(check_screenpage_bug,
		 "Check for bit 27 screen page bug. Default = 1");

static inline unsigned int ep93xxfb_readl(struct ep93xx_fbi *fbi,
					  unsigned int off)
{
	return __raw_readl(fbi->mmio_base + off);
}

static inline void ep93xxfb_writel(struct ep93xx_fbi *fbi,
				   unsigned int val, unsigned int off)
{
	__raw_writel(val, fbi->mmio_base + off);
}

/*
 * Write to one of the locked raster registers.
 */
static inline void ep93xxfb_out_locked(struct ep93xx_fbi *fbi,
				       unsigned int val, unsigned int reg)
{
	/*
	 * We don't need a lock or delay here since the raster register
	 * block will remain unlocked until the next access.
	 */
	ep93xxfb_writel(fbi, 0xaa, EP93XXFB_SWLOCK);
	ep93xxfb_writel(fbi, val, reg);
}

static void ep93xxfb_set_video_attribs(struct fb_info *info)
{
	struct ep93xx_fbi *fbi = info->par;
	unsigned int attribs;

	attribs = EP93XXFB_ENABLE;
	attribs |= fbi->mach_info->flags;
	ep93xxfb_out_locked(fbi, attribs, EP93XXFB_ATTRIBS);
}

static int ep93xxfb_set_pixelmode(struct fb_info *info)
{
	struct ep93xx_fbi *fbi = info->par;
	unsigned int val;

	info->var.transp.offset = 0;
	info->var.transp.length = 0;

	switch (info->var.bits_per_pixel) {
	case 8:
		val = EP93XXFB_PIXELMODE_8BPP | EP93XXFB_PIXELMODE_COLOR_LUT |
			EP93XXFB_PIXELMODE_SHIFT_1P_18B;

		info->var.red.offset	= 0;
		info->var.red.length	= 8;
		info->var.green.offset	= 0;
		info->var.green.length	= 8;
		info->var.blue.offset	= 0;
		info->var.blue.length	= 8;
		info->fix.visual 	= FB_VISUAL_PSEUDOCOLOR;
		break;

	case 16:
		val = EP93XXFB_PIXELMODE_16BPP | EP93XXFB_PIXELMODE_COLOR_555 |
			EP93XXFB_PIXELMODE_SHIFT_1P_18B;

		info->var.red.offset	= 11;
		info->var.red.length	= 5;
		info->var.green.offset	= 5;
		info->var.green.length	= 6;
		info->var.blue.offset	= 0;
		info->var.blue.length	= 5;
		info->fix.visual 	= FB_VISUAL_TRUECOLOR;
		break;

	case 24:
		val = EP93XXFB_PIXELMODE_24BPP | EP93XXFB_PIXELMODE_COLOR_888 |
			EP93XXFB_PIXELMODE_SHIFT_1P_24B;

		info->var.red.offset	= 16;
		info->var.red.length	= 8;
		info->var.green.offset	= 8;
		info->var.green.length	= 8;
		info->var.blue.offset	= 0;
		info->var.blue.length	= 8;
		info->fix.visual 	= FB_VISUAL_TRUECOLOR;
		break;

	case 32:
		val = EP93XXFB_PIXELMODE_32BPP | EP93XXFB_PIXELMODE_COLOR_888 |
			EP93XXFB_PIXELMODE_SHIFT_1P_24B;

		info->var.red.offset	= 16;
		info->var.red.length	= 8;
		info->var.green.offset	= 8;
		info->var.green.length	= 8;
		info->var.blue.offset	= 0;
		info->var.blue.length	= 8;
		info->fix.visual 	= FB_VISUAL_TRUECOLOR;
		break;

	default:
		return -EINVAL;
	}

	ep93xxfb_writel(fbi, val, EP93XXFB_PIXELMODE);
	return 0;
}

static void ep93xxfb_set_timing(struct fb_info *info)
{
	struct ep93xx_fbi *fbi = info->par;
	unsigned int vlines_total, hclks_total, start, stop;

	vlines_total = info->var.yres + info->var.upper_margin +
		info->var.lower_margin + info->var.vsync_len - 1;

	hclks_total = info->var.xres + info->var.left_margin +
		info->var.right_margin + info->var.hsync_len - 1;

	ep93xxfb_out_locked(fbi, vlines_total, EP93XXFB_VLINES_TOTAL);
	ep93xxfb_out_locked(fbi, hclks_total, EP93XXFB_HCLKS_TOTAL);

	start = vlines_total;
	stop = vlines_total - info->var.vsync_len;
	ep93xxfb_out_locked(fbi, start | (stop << 16), EP93XXFB_VSYNC);

	start = vlines_total - info->var.vsync_len - info->var.upper_margin;
	stop = info->var.lower_margin - 1;
	ep93xxfb_out_locked(fbi, start | (stop << 16), EP93XXFB_VBLANK);
	ep93xxfb_out_locked(fbi, start | (stop << 16), EP93XXFB_VACTIVE);

	start = vlines_total;
	stop = vlines_total + 1;
	ep93xxfb_out_locked(fbi, start | (stop << 16), EP93XXFB_VCLK);

	start = hclks_total;
	stop = hclks_total - info->var.hsync_len;
	ep93xxfb_out_locked(fbi, start | (stop << 16), EP93XXFB_HSYNC);

	start = hclks_total - info->var.hsync_len - info->var.left_margin;
	stop = info->var.right_margin - 1;
	ep93xxfb_out_locked(fbi, start | (stop << 16), EP93XXFB_HBLANK);
	ep93xxfb_out_locked(fbi, start | (stop << 16), EP93XXFB_HACTIVE);

	start = hclks_total;
	stop = hclks_total;
	ep93xxfb_out_locked(fbi, start | (stop << 16), EP93XXFB_HCLK);

	ep93xxfb_out_locked(fbi, 0x0, EP93XXFB_LINE_CARRY);
}

static int ep93xxfb_set_par(struct fb_info *info)
{
	struct ep93xx_fbi *fbi = info->par;

	clk_set_rate(fbi->clk, 1000 * PICOS2KHZ(info->var.pixclock));

	ep93xxfb_set_timing(info);

	info->fix.line_length = info->var.xres_virtual *
		info->var.bits_per_pixel / 8;

	ep93xxfb_writel(fbi, info->fix.smem_start, EP93XXFB_SCREEN_PAGE);
	ep93xxfb_writel(fbi, info->var.yres - 1, EP93XXFB_SCREEN_LINES);
	ep93xxfb_writel(fbi, ((info->var.xres * info->var.bits_per_pixel)
			      / 32) - 1, EP93XXFB_LINE_LENGTH);
	ep93xxfb_writel(fbi, info->fix.line_length / 4, EP93XXFB_VLINE_STEP);
	ep93xxfb_set_video_attribs(info);
	return 0;
}

static int ep93xxfb_check_var(struct fb_var_screeninfo *var,
			      struct fb_info *info)
{
	int err;

	err = ep93xxfb_set_pixelmode(info);
	if (err)
		return err;

	var->xres = max_t(unsigned int, var->xres, EP93XXFB_MIN_XRES);
	var->xres = min_t(unsigned int, var->xres, EP93XXFB_MAX_XRES);
	var->xres_virtual = max(var->xres_virtual, var->xres);

	var->yres = max_t(unsigned int, var->yres, EP93XXFB_MIN_YRES);
	var->yres = min_t(unsigned int, var->yres, EP93XXFB_MAX_YRES);
	var->yres_virtual = max(var->yres_virtual, var->yres);

	return 0;
}

static int ep93xxfb_mmap(struct fb_info *info, struct vm_area_struct *vma)
{
	unsigned int offset = vma->vm_pgoff << PAGE_SHIFT;

	if (offset < info->fix.smem_len) {
		return dma_mmap_writecombine(info->dev, vma, info->screen_base,
					     info->fix.smem_start,
					     info->fix.smem_len);
	}

	return -EINVAL;
}

static int ep93xxfb_blank(int blank_mode, struct fb_info *info)
{
	struct ep93xx_fbi *fbi = info->par;
	unsigned int attribs = ep93xxfb_readl(fbi, EP93XXFB_ATTRIBS);

	if (blank_mode) {
		if (fbi->mach_info->blank)
			fbi->mach_info->blank(blank_mode, info);
		ep93xxfb_out_locked(fbi, attribs & ~EP93XXFB_ENABLE,
				    EP93XXFB_ATTRIBS);
		clk_disable(fbi->clk);
	} else {
		clk_enable(fbi->clk);
		ep93xxfb_out_locked(fbi, attribs | EP93XXFB_ENABLE,
				    EP93XXFB_ATTRIBS);
		if (fbi->mach_info->blank)
			fbi->mach_info->blank(blank_mode, info);
	}

	return 0;
}

static inline int ep93xxfb_convert_color(int val, int width)
{
	return ((val << width) + 0x7fff - val) >> 16;
}

static int ep93xxfb_setcolreg(unsigned int regno, unsigned int red,
			      unsigned int green, unsigned int blue,
			      unsigned int transp, struct fb_info *info)
{
	struct ep93xx_fbi *fbi = info->par;
	unsigned int *pal = info->pseudo_palette;
	unsigned int ctrl, i, rgb, lut_current, lut_stat;

	switch (info->fix.visual) {
	case FB_VISUAL_PSEUDOCOLOR:
		if (regno > 255)
			return 1;
		rgb = ((red & 0xff00) << 8) | (green & 0xff00) |
			((blue & 0xff00) >> 8);

		pal[regno] = rgb;
		ep93xxfb_writel(fbi, rgb, (EP93XXFB_COLOR_LUT + (regno << 2)));
		ctrl = ep93xxfb_readl(fbi, EP93XXFB_LUT_SW_CONTROL);
		lut_stat = !!(ctrl & EP93XXFB_LUT_SW_CONTROL_SSTAT);
		lut_current = !!(ctrl & EP93XXFB_LUT_SW_CONTROL_SWTCH);

		if (lut_stat == lut_current) {
			for (i = 0; i < 256; i++) {
				ep93xxfb_writel(fbi, pal[i],
					EP93XXFB_COLOR_LUT + (i << 2));
			}

			ep93xxfb_writel(fbi,
					ctrl ^ EP93XXFB_LUT_SW_CONTROL_SWTCH,
					EP93XXFB_LUT_SW_CONTROL);
		}
		break;

	case FB_VISUAL_TRUECOLOR:
		if (regno > 16)
			return 1;

		red = ep93xxfb_convert_color(red, info->var.red.length);
		green = ep93xxfb_convert_color(green, info->var.green.length);
		blue = ep93xxfb_convert_color(blue, info->var.blue.length);
		transp = ep93xxfb_convert_color(transp,
						info->var.transp.length);

		pal[regno] = (red << info->var.red.offset) |
			(green << info->var.green.offset) |
			(blue << info->var.blue.offset) |
			(transp << info->var.transp.offset);
		break;

	default:
		return 1;
	}

	return 0;
}

static struct fb_ops ep93xxfb_ops = {
	.owner		= THIS_MODULE,
	.fb_check_var	= ep93xxfb_check_var,
	.fb_set_par	= ep93xxfb_set_par,
	.fb_blank	= ep93xxfb_blank,
	.fb_fillrect	= cfb_fillrect,
	.fb_copyarea	= cfb_copyarea,
	.fb_imageblit	= cfb_imageblit,
	.fb_setcolreg	= ep93xxfb_setcolreg,
	.fb_mmap	= ep93xxfb_mmap,
};

static int __init ep93xxfb_calc_fbsize(struct ep93xxfb_mach_info *mach_info)
{
	int i, fb_size = 0;

	if (mach_info->num_modes == EP93XXFB_USE_MODEDB) {
		fb_size = EP93XXFB_MAX_XRES * EP93XXFB_MAX_YRES *
			mach_info->bpp / 8;
	} else {
		for (i = 0; i < mach_info->num_modes; i++) {
			const struct fb_videomode *mode;
			int size;

			mode = &mach_info->modes[i];
			size = mode->xres * mode->yres * mach_info->bpp / 8;
			if (size > fb_size)
				fb_size = size;
		}
	}

	return fb_size;
}

static int __init ep93xxfb_alloc_videomem(struct fb_info *info)
{
	struct ep93xx_fbi *fbi = info->par;
	char __iomem *virt_addr;
	dma_addr_t phys_addr;
	unsigned int fb_size;

	fb_size = ep93xxfb_calc_fbsize(fbi->mach_info);
	virt_addr = dma_alloc_writecombine(info->dev, fb_size,
					   &phys_addr, GFP_KERNEL);
	if (!virt_addr)
		return -ENOMEM;

	/*
	 * There is a bug in the ep93xx framebuffer which causes problems
	 * if bit 27 of the physical address is set.
	 * See: http://marc.info/?l=linux-arm-kernel&m=110061245502000&w=2
	 * There does not seem to be any official errata for this, but I
	 * have confirmed the problem exists on my hardware (ep9315) at
	 * least.
	 */
	if (check_screenpage_bug && phys_addr & (1 << 27)) {
		dev_err(info->dev, "ep93xx framebuffer bug. phys addr (0x%x) "
			"has bit 27 set: cannot init framebuffer\n",
			phys_addr);

		dma_free_coherent(info->dev, fb_size, virt_addr, phys_addr);
		return -ENOMEM;
	}

	info->fix.smem_start = phys_addr;
	info->fix.smem_len = fb_size;
	info->screen_base = virt_addr;

	return 0;
}

static void ep93xxfb_dealloc_videomem(struct fb_info *info)
{
	if (info->screen_base)
		dma_free_coherent(info->dev, info->fix.smem_len,
				  info->screen_base, info->fix.smem_start);
}

static int ep93xxfb_probe(struct platform_device *pdev)
{
	struct ep93xxfb_mach_info *mach_info = pdev->dev.platform_data;
	struct fb_info *info;
	struct ep93xx_fbi *fbi;
	struct resource *res;
	char *video_mode;
	int err;

	if (!mach_info)
		return -EINVAL;

	info = framebuffer_alloc(sizeof(struct ep93xx_fbi), &pdev->dev);
	if (!info)
		return -ENOMEM;

	info->dev = &pdev->dev;
	platform_set_drvdata(pdev, info);
	fbi = info->par;
	fbi->mach_info = mach_info;

	err = fb_alloc_cmap(&info->cmap, 256, 0);
	if (err)
		goto failed_cmap;

	err = ep93xxfb_alloc_videomem(info);
	if (err)
		goto failed_videomem;

	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
	if (!res) {
		err = -ENXIO;
		goto failed_resource;
	}

	/*
	 * FIXME - We don't do a request_mem_region here because we are
	 * sharing the register space with the backlight driver (see
	 * drivers/video/backlight/ep93xx_bl.c) and doing so will cause
	 * the second loaded driver to return -EBUSY.
	 *
	 * NOTE: No locking is required; the backlight does not touch
	 * any of the framebuffer registers.
	 */
	fbi->res = res;
	fbi->mmio_base = devm_ioremap(&pdev->dev, res->start,
				      resource_size(res));
	if (!fbi->mmio_base) {
		err = -ENXIO;
		goto failed_resource;
	}

	strcpy(info->fix.id, pdev->name);
	info->fbops		= &ep93xxfb_ops;
	info->fix.type		= FB_TYPE_PACKED_PIXELS;
	info->fix.accel		= FB_ACCEL_NONE;
	info->var.activate	= FB_ACTIVATE_NOW;
	info->var.vmode		= FB_VMODE_NONINTERLACED;
	info->flags		= FBINFO_DEFAULT;
	info->node		= -1;
	info->state		= FBINFO_STATE_RUNNING;
	info->pseudo_palette	= &fbi->pseudo_palette;

	fb_get_options("ep93xx-fb", &video_mode);
	err = fb_find_mode(&info->var, info, video_mode,
			   fbi->mach_info->modes, fbi->mach_info->num_modes,
			   fbi->mach_info->default_mode, fbi->mach_info->bpp);
	if (err == 0) {
		dev_err(info->dev, "No suitable video mode found\n");
		err = -EINVAL;
		goto failed_resource;
	}

	if (mach_info->setup) {
		err = mach_info->setup(pdev);
		if (err)
			goto failed_resource;
	}

	err = ep93xxfb_check_var(&info->var, info);
	if (err)
		goto failed_check;

	fbi->clk = devm_clk_get(&pdev->dev, NULL);
	if (IS_ERR(fbi->clk)) {
		err = PTR_ERR(fbi->clk);
		fbi->clk = NULL;
		goto failed_check;
	}

	ep93xxfb_set_par(info);
	clk_enable(fbi->clk);

	err = register_framebuffer(info);
	if (err)
		goto failed_check;

	dev_info(info->dev, "registered. Mode = %dx%d-%d\n",
		 info->var.xres, info->var.yres, info->var.bits_per_pixel);
	return 0;

failed_check:
	if (fbi->mach_info->teardown)
		fbi->mach_info->teardown(pdev);
failed_resource:
	ep93xxfb_dealloc_videomem(info);
failed_videomem:
	fb_dealloc_cmap(&info->cmap);
failed_cmap:
	kfree(info);
	platform_set_drvdata(pdev, NULL);

	return err;
}

static int ep93xxfb_remove(struct platform_device *pdev)
{
	struct fb_info *info = platform_get_drvdata(pdev);
	struct ep93xx_fbi *fbi = info->par;

	unregister_framebuffer(info);
	clk_disable(fbi->clk);
	ep93xxfb_dealloc_videomem(info);
	fb_dealloc_cmap(&info->cmap);

	if (fbi->mach_info->teardown)
		fbi->mach_info->teardown(pdev);

	kfree(info);
	platform_set_drvdata(pdev, NULL);

	return 0;
}

static struct platform_driver ep93xxfb_driver = {
	.probe		= ep93xxfb_probe,
	.remove		= ep93xxfb_remove,
	.driver = {
		.name	= "ep93xx-fb",
		.owner	= THIS_MODULE,
	},
};

static int ep93xxfb_init(void)
{
	return platform_driver_register(&ep93xxfb_driver);
}

static void __exit ep93xxfb_exit(void)
{
	platform_driver_unregister(&ep93xxfb_driver);
}

module_init(ep93xxfb_init);
module_exit(ep93xxfb_exit);

MODULE_DESCRIPTION("EP93XX Framebuffer Driver");
MODULE_ALIAS("platform:ep93xx-fb");
MODULE_AUTHOR("Ryan Mallon, "
	      "H Hartley Sweeten <hsweeten@visionengravers.com");
MODULE_LICENSE("GPL");
Commit	Line	Data
88017bda RM	1	/*
	2	* linux/drivers/video/ep93xx-fb.c
	3	*
	4	* Framebuffer support for the EP93xx series.
	5	*
	6	* Copyright (C) 2007 Bluewater Systems Ltd
1c5454ee	7	* Author: Ryan Mallon
88017bda RM	8	*
	9	* Copyright (c) 2009 H Hartley Sweeten <hsweeten@visionengravers.com>
	10	*
	11	* Based on the Cirrus Logic ep93xxfb driver, and various other ep93xxfb
	12	* drivers.
	13	*
	14	* This program is free software; you can redistribute it and/or modify
	15	* it under the terms of the GNU General Public License version 2 as
	16	* published by the Free Software Foundation.
	17	*
	18	*/
	19
	20	#include <linux/platform_device.h>
355b200b	21	#include <linux/module.h>
88017bda	22	#include <linux/dma-mapping.h>
5a0e3ad6	23	#include <linux/slab.h>
88017bda RM	24	#include <linux/clk.h>
	25	#include <linux/fb.h>
	26
a3b29245	27	#include <linux/platform_data/video-ep93xx.h>
88017bda RM	28
	29	/* Vertical Frame Timing Registers */
	30	#define EP93XXFB_VLINES_TOTAL 0x0000 /* SW locked */
	31	#define EP93XXFB_VSYNC 0x0004 /* SW locked */
	32	#define EP93XXFB_VACTIVE 0x0008 /* SW locked */
	33	#define EP93XXFB_VBLANK 0x0228 /* SW locked */
	34	#define EP93XXFB_VCLK 0x000c /* SW locked */
	35
	36	/* Horizontal Frame Timing Registers */
	37	#define EP93XXFB_HCLKS_TOTAL 0x0010 /* SW locked */
	38	#define EP93XXFB_HSYNC 0x0014 /* SW locked */
	39	#define EP93XXFB_HACTIVE 0x0018 /* SW locked */
	40	#define EP93XXFB_HBLANK 0x022c /* SW locked */
	41	#define EP93XXFB_HCLK 0x001c /* SW locked */
	42
	43	/* Frame Buffer Memory Configuration Registers */
	44	#define EP93XXFB_SCREEN_PAGE 0x0028
	45	#define EP93XXFB_SCREEN_HPAGE 0x002c
	46	#define EP93XXFB_SCREEN_LINES 0x0030
	47	#define EP93XXFB_LINE_LENGTH 0x0034
	48	#define EP93XXFB_VLINE_STEP 0x0038
	49	#define EP93XXFB_LINE_CARRY 0x003c /* SW locked */
	50	#define EP93XXFB_EOL_OFFSET 0x0230
	51
	52	/* Other Video Registers */
	53	#define EP93XXFB_BRIGHTNESS 0x0020
	54	#define EP93XXFB_ATTRIBS 0x0024 /* SW locked */
	55	#define EP93XXFB_SWLOCK 0x007c /* SW locked */
	56	#define EP93XXFB_AC_RATE 0x0214
	57	#define EP93XXFB_FIFO_LEVEL 0x0234
	58	#define EP93XXFB_PIXELMODE 0x0054
	59	#define EP93XXFB_PIXELMODE_32BPP (0x7 << 0)
	60	#define EP93XXFB_PIXELMODE_24BPP (0x6 << 0)
	61	#define EP93XXFB_PIXELMODE_16BPP (0x4 << 0)
	62	#define EP93XXFB_PIXELMODE_8BPP (0x2 << 0)
	63	#define EP93XXFB_PIXELMODE_SHIFT_1P_24B (0x0 << 3)
	64	#define EP93XXFB_PIXELMODE_SHIFT_1P_18B (0x1 << 3)
	65	#define EP93XXFB_PIXELMODE_COLOR_LUT (0x0 << 10)
	66	#define EP93XXFB_PIXELMODE_COLOR_888 (0x4 << 10)
	67	#define EP93XXFB_PIXELMODE_COLOR_555 (0x5 << 10)
	68	#define EP93XXFB_PARL_IF_OUT 0x0058
	69	#define EP93XXFB_PARL_IF_IN 0x005c
	70
	71	/* Blink Control Registers */
	72	#define EP93XXFB_BLINK_RATE 0x0040
	73	#define EP93XXFB_BLINK_MASK 0x0044
	74	#define EP93XXFB_BLINK_PATTRN 0x0048
	75	#define EP93XXFB_PATTRN_MASK 0x004c
	76	#define EP93XXFB_BKGRND_OFFSET 0x0050
	77
	78	/* Hardware Cursor Registers */
	79	#define EP93XXFB_CURSOR_ADR_START 0x0060
	80	#define EP93XXFB_CURSOR_ADR_RESET 0x0064
	81	#define EP93XXFB_CURSOR_SIZE 0x0068
	82	#define EP93XXFB_CURSOR_COLOR1 0x006c
	83	#define EP93XXFB_CURSOR_COLOR2 0x0070
	84	#define EP93XXFB_CURSOR_BLINK_COLOR1 0x021c
	85	#define EP93XXFB_CURSOR_BLINK_COLOR2 0x0220
	86	#define EP93XXFB_CURSOR_XY_LOC 0x0074
	87	#define EP93XXFB_CURSOR_DSCAN_HY_LOC 0x0078
	88	#define EP93XXFB_CURSOR_BLINK_RATE_CTRL 0x0224
	89
	90	/* LUT Registers */
	91	#define EP93XXFB_GRY_SCL_LUTR 0x0080
92	#define EP93XXFB_GRY_SCL_LUTG 0x0280
93	#define EP93XXFB_GRY_SCL_LUTB 0x0300
94	#define EP93XXFB_LUT_SW_CONTROL 0x0218
95	#define EP93XXFB_LUT_SW_CONTROL_SWTCH (1 << 0)
96	#define EP93XXFB_LUT_SW_CONTROL_SSTAT (1 << 1)
97	#define EP93XXFB_COLOR_LUT 0x0400
98
99	/* Video Signature Registers */
100	#define EP93XXFB_VID_SIG_RSLT_VAL 0x0200
101	#define EP93XXFB_VID_SIG_CTRL 0x0204
102	#define EP93XXFB_VSIG 0x0208
103	#define EP93XXFB_HSIG 0x020c
104	#define EP93XXFB_SIG_CLR_STR 0x0210
105
106	/* Minimum / Maximum resolutions supported */
107	#define EP93XXFB_MIN_XRES 64
108	#define EP93XXFB_MIN_YRES 64
109	#define EP93XXFB_MAX_XRES 1024
110	#define EP93XXFB_MAX_YRES 768
111
112	struct ep93xx_fbi {
113	struct ep93xxfb_mach_info *mach_info;
114	struct clk *clk;
115	struct resource *res;
116	void __iomem *mmio_base;
117	unsigned int pseudo_palette[256];
118	};
119
120	static int check_screenpage_bug = 1;
121	module_param(check_screenpage_bug, int, 0644);
122	MODULE_PARM_DESC(check_screenpage_bug,
123	"Check for bit 27 screen page bug. Default = 1");
124
125	static inline unsigned int ep93xxfb_readl(struct ep93xx_fbi *fbi,
126	unsigned int off)
127	{
128	return __raw_readl(fbi->mmio_base + off);
129	}
130
131	static inline void ep93xxfb_writel(struct ep93xx_fbi *fbi,
132	unsigned int val, unsigned int off)
133	{
134	__raw_writel(val, fbi->mmio_base + off);
135	}
136
137	/*
138	* Write to one of the locked raster registers.
139	*/
140	static inline void ep93xxfb_out_locked(struct ep93xx_fbi *fbi,
141	unsigned int val, unsigned int reg)
142	{
143	/*
144	* We don't need a lock or delay here since the raster register
145	* block will remain unlocked until the next access.
146	*/
147	ep93xxfb_writel(fbi, 0xaa, EP93XXFB_SWLOCK);
148	ep93xxfb_writel(fbi, val, reg);
149	}
150
151	static void ep93xxfb_set_video_attribs(struct fb_info *info)
152	{
153	struct ep93xx_fbi *fbi = info->par;
154	unsigned int attribs;
155
156	attribs = EP93XXFB_ENABLE;
157	attribs \|= fbi->mach_info->flags;
158	ep93xxfb_out_locked(fbi, attribs, EP93XXFB_ATTRIBS);
159	}
160
161	static int ep93xxfb_set_pixelmode(struct fb_info *info)
162	{
163	struct ep93xx_fbi *fbi = info->par;
164	unsigned int val;
165
166	info->var.transp.offset = 0;
167	info->var.transp.length = 0;
168
169	switch (info->var.bits_per_pixel) {
170	case 8:
171	val = EP93XXFB_PIXELMODE_8BPP \| EP93XXFB_PIXELMODE_COLOR_LUT \|
172	EP93XXFB_PIXELMODE_SHIFT_1P_18B;
173
174	info->var.red.offset = 0;
175	info->var.red.length = 8;
176	info->var.green.offset = 0;
177	info->var.green.length = 8;
178	info->var.blue.offset = 0;
179	info->var.blue.length = 8;
180	info->fix.visual = FB_VISUAL_PSEUDOCOLOR;
181	break;
182
183	case 16:
184	val = EP93XXFB_PIXELMODE_16BPP \| EP93XXFB_PIXELMODE_COLOR_555 \|
185	EP93XXFB_PIXELMODE_SHIFT_1P_18B;
186
187	info->var.red.offset = 11;
188	info->var.red.length = 5;
189	info->var.green.offset = 5;
190	info->var.green.length = 6;
191	info->var.blue.offset = 0;
192	info->var.blue.length = 5;
193	info->fix.visual = FB_VISUAL_TRUECOLOR;
194	break;
195
196	case 24:
197	val = EP93XXFB_PIXELMODE_24BPP \| EP93XXFB_PIXELMODE_COLOR_888 \|
198	EP93XXFB_PIXELMODE_SHIFT_1P_24B;
199
200	info->var.red.offset = 16;
201	info->var.red.length = 8;
202	info->var.green.offset = 8;
203	info->var.green.length = 8;
204	info->var.blue.offset = 0;
205	info->var.blue.length = 8;
206	info->fix.visual = FB_VISUAL_TRUECOLOR;
207	break;
208
209	case 32:
210	val = EP93XXFB_PIXELMODE_32BPP \| EP93XXFB_PIXELMODE_COLOR_888 \|
211	EP93XXFB_PIXELMODE_SHIFT_1P_24B;
212
213	info->var.red.offset = 16;
214	info->var.red.length = 8;
215	info->var.green.offset = 8;
216	info->var.green.length = 8;
217	info->var.blue.offset = 0;
218	info->var.blue.length = 8;
219	info->fix.visual = FB_VISUAL_TRUECOLOR;
220	break;
221
222	default:
223	return -EINVAL;
224	}
225
226	ep93xxfb_writel(fbi, val, EP93XXFB_PIXELMODE);
227	return 0;
228	}
229
230	static void ep93xxfb_set_timing(struct fb_info *info)
231	{
232	struct ep93xx_fbi *fbi = info->par;
233	unsigned int vlines_total, hclks_total, start, stop;
234
235	vlines_total = info->var.yres + info->var.upper_margin +
236	info->var.lower_margin + info->var.vsync_len - 1;
237
238	hclks_total = info->var.xres + info->var.left_margin +
239	info->var.right_margin + info->var.hsync_len - 1;
240
241	ep93xxfb_out_locked(fbi, vlines_total, EP93XXFB_VLINES_TOTAL);
242	ep93xxfb_out_locked(fbi, hclks_total, EP93XXFB_HCLKS_TOTAL);
243
244	start = vlines_total;
245	stop = vlines_total - info->var.vsync_len;
246	ep93xxfb_out_locked(fbi, start \| (stop << 16), EP93XXFB_VSYNC);
247
248	start = vlines_total - info->var.vsync_len - info->var.upper_margin;
249	stop = info->var.lower_margin - 1;
250	ep93xxfb_out_locked(fbi, start \| (stop << 16), EP93XXFB_VBLANK);
251	ep93xxfb_out_locked(fbi, start \| (stop << 16), EP93XXFB_VACTIVE);
252
253	start = vlines_total;
254	stop = vlines_total + 1;
255	ep93xxfb_out_locked(fbi, start \| (stop << 16), EP93XXFB_VCLK);
256
257	start = hclks_total;
258	stop = hclks_total - info->var.hsync_len;
259	ep93xxfb_out_locked(fbi, start \| (stop << 16), EP93XXFB_HSYNC);
260
261	start = hclks_total - info->var.hsync_len - info->var.left_margin;
262	stop = info->var.right_margin - 1;
263	ep93xxfb_out_locked(fbi, start \| (stop << 16), EP93XXFB_HBLANK);
264	ep93xxfb_out_locked(fbi, start \| (stop << 16), EP93XXFB_HACTIVE);
265
266	start = hclks_total;
267	stop = hclks_total;
268	ep93xxfb_out_locked(fbi, start \| (stop << 16), EP93XXFB_HCLK);
269
270	ep93xxfb_out_locked(fbi, 0x0, EP93XXFB_LINE_CARRY);
271	}
272
273	static int ep93xxfb_set_par(struct fb_info *info)
274	{
275	struct ep93xx_fbi *fbi = info->par;
276
277	clk_set_rate(fbi->clk, 1000 * PICOS2KHZ(info->var.pixclock));
278
279	ep93xxfb_set_timing(info);
280
281	info->fix.line_length = info->var.xres_virtual *
282	info->var.bits_per_pixel / 8;
283
284	ep93xxfb_writel(fbi, info->fix.smem_start, EP93XXFB_SCREEN_PAGE);
285	ep93xxfb_writel(fbi, info->var.yres - 1, EP93XXFB_SCREEN_LINES);
286	ep93xxfb_writel(fbi, ((info->var.xres * info->var.bits_per_pixel)
287	/ 32) - 1, EP93XXFB_LINE_LENGTH);
288	ep93xxfb_writel(fbi, info->fix.line_length / 4, EP93XXFB_VLINE_STEP);
289	ep93xxfb_set_video_attribs(info);
290	return 0;
291	}
292
293	static int ep93xxfb_check_var(struct fb_var_screeninfo *var,
294	struct fb_info *info)
295	{
296	int err;
297
298	err = ep93xxfb_set_pixelmode(info);
299	if (err)
300	return err;
301
302	var->xres = max_t(unsigned int, var->xres, EP93XXFB_MIN_XRES);
303	var->xres = min_t(unsigned int, var->xres, EP93XXFB_MAX_XRES);
304	var->xres_virtual = max(var->xres_virtual, var->xres);
305
306	var->yres = max_t(unsigned int, var->yres, EP93XXFB_MIN_YRES);
307	var->yres = min_t(unsigned int, var->yres, EP93XXFB_MAX_YRES);
308	var->yres_virtual = max(var->yres_virtual, var->yres);
309
310	return 0;
311	}
312
313	static int ep93xxfb_mmap(struct fb_info info, struct vm_area_struct vma)
314	{
315	unsigned int offset = vma->vm_pgoff << PAGE_SHIFT;
316
317	if (offset < info->fix.smem_len) {
318	return dma_mmap_writecombine(info->dev, vma, info->screen_base,
319	info->fix.smem_start,
320	info->fix.smem_len);
321	}
322
323	return -EINVAL;
324	}
325
326	static int ep93xxfb_blank(int blank_mode, struct fb_info *info)
327	{
328	struct ep93xx_fbi *fbi = info->par;
329	unsigned int attribs = ep93xxfb_readl(fbi, EP93XXFB_ATTRIBS);
330
331	if (blank_mode) {
332	if (fbi->mach_info->blank)
333	fbi->mach_info->blank(blank_mode, info);
334	ep93xxfb_out_locked(fbi, attribs & ~EP93XXFB_ENABLE,
335	EP93XXFB_ATTRIBS);
336	clk_disable(fbi->clk);
337	} else {
338	clk_enable(fbi->clk);
339	ep93xxfb_out_locked(fbi, attribs \| EP93XXFB_ENABLE,
340	EP93XXFB_ATTRIBS);
341	if (fbi->mach_info->blank)
342	fbi->mach_info->blank(blank_mode, info);
343	}
344
345	return 0;
346	}
347
348	static inline int ep93xxfb_convert_color(int val, int width)
349	{
350	return ((val << width) + 0x7fff - val) >> 16;
351	}
352
353	static int ep93xxfb_setcolreg(unsigned int regno, unsigned int red,
354	unsigned int green, unsigned int blue,
355	unsigned int transp, struct fb_info *info)
356	{
357	struct ep93xx_fbi *fbi = info->par;
358	unsigned int *pal = info->pseudo_palette;
359	unsigned int ctrl, i, rgb, lut_current, lut_stat;
360
361	switch (info->fix.visual) {
362	case FB_VISUAL_PSEUDOCOLOR:
2f390380 KH	363	if (regno > 255)
2f390380 KH	364	return 1;
88017bda RM	365	rgb = ((red & 0xff00) << 8) \| (green & 0xff00) \|
	366	((blue & 0xff00) >> 8);
	367
	368	pal[regno] = rgb;
	369	ep93xxfb_writel(fbi, rgb, (EP93XXFB_COLOR_LUT + (regno << 2)));
	370	ctrl = ep93xxfb_readl(fbi, EP93XXFB_LUT_SW_CONTROL);
	371	lut_stat = !!(ctrl & EP93XXFB_LUT_SW_CONTROL_SSTAT);
	372	lut_current = !!(ctrl & EP93XXFB_LUT_SW_CONTROL_SWTCH);
	373
	374	if (lut_stat == lut_current) {
	375	for (i = 0; i < 256; i++) {
	376	ep93xxfb_writel(fbi, pal[i],
	377	EP93XXFB_COLOR_LUT + (i << 2));
	378	}
	379
	380	ep93xxfb_writel(fbi,
	381	ctrl ^ EP93XXFB_LUT_SW_CONTROL_SWTCH,
	382	EP93XXFB_LUT_SW_CONTROL);
	383	}
	384	break;
	385
	386	case FB_VISUAL_TRUECOLOR:
	387	if (regno > 16)
	388	return 1;
	389
	390	red = ep93xxfb_convert_color(red, info->var.red.length);
	391	green = ep93xxfb_convert_color(green, info->var.green.length);
	392	blue = ep93xxfb_convert_color(blue, info->var.blue.length);
	393	transp = ep93xxfb_convert_color(transp,
	394	info->var.transp.length);
	395
	396	pal[regno] = (red << info->var.red.offset) \|
	397	(green << info->var.green.offset) \|
	398	(blue << info->var.blue.offset) \|
	399	(transp << info->var.transp.offset);
	400	break;
	401
	402	default:
	403	return 1;
	404	}
	405
	406	return 0;
	407	}
	408
	409	static struct fb_ops ep93xxfb_ops = {
	410	.owner = THIS_MODULE,
	411	.fb_check_var = ep93xxfb_check_var,
	412	.fb_set_par = ep93xxfb_set_par,
	413	.fb_blank = ep93xxfb_blank,
	414	.fb_fillrect = cfb_fillrect,
	415	.fb_copyarea = cfb_copyarea,
	416	.fb_imageblit = cfb_imageblit,
	417	.fb_setcolreg = ep93xxfb_setcolreg,
	418	.fb_mmap = ep93xxfb_mmap,
	419	};
	420
	421	static int __init ep93xxfb_calc_fbsize(struct ep93xxfb_mach_info *mach_info)
	422	{
	423	int i, fb_size = 0;
	424
	425	if (mach_info->num_modes == EP93XXFB_USE_MODEDB) {
	426	fb_size = EP93XXFB_MAX_XRES * EP93XXFB_MAX_YRES *
	427	mach_info->bpp / 8;
	428	} else {
429	for (i = 0; i < mach_info->num_modes; i++) {
430	const struct fb_videomode *mode;
431	int size;
432
433	mode = &mach_info->modes[i];
434	size = mode->xres * mode->yres * mach_info->bpp / 8;
435	if (size > fb_size)
436	fb_size = size;
437	}
438	}
439
440	return fb_size;
441	}
442
443	static int __init ep93xxfb_alloc_videomem(struct fb_info *info)
444	{
445	struct ep93xx_fbi *fbi = info->par;
446	char __iomem *virt_addr;
447	dma_addr_t phys_addr;
448	unsigned int fb_size;
449
450	fb_size = ep93xxfb_calc_fbsize(fbi->mach_info);
451	virt_addr = dma_alloc_writecombine(info->dev, fb_size,
452	&phys_addr, GFP_KERNEL);
453	if (!virt_addr)
454	return -ENOMEM;
455
456	/*
457	* There is a bug in the ep93xx framebuffer which causes problems
458	* if bit 27 of the physical address is set.
459	* See: http://marc.info/?l=linux-arm-kernel&m=110061245502000&w=2
25985edc	460	* There does not seem to be any official errata for this, but I
88017bda RM	461	* have confirmed the problem exists on my hardware (ep9315) at
	462	* least.
	463	*/
	464	if (check_screenpage_bug && phys_addr & (1 << 27)) {
	465	dev_err(info->dev, "ep93xx framebuffer bug. phys addr (0x%x) "
	466	"has bit 27 set: cannot init framebuffer\n",
	467	phys_addr);
	468
	469	dma_free_coherent(info->dev, fb_size, virt_addr, phys_addr);
	470	return -ENOMEM;
	471	}
	472
	473	info->fix.smem_start = phys_addr;
	474	info->fix.smem_len = fb_size;
	475	info->screen_base = virt_addr;
	476
	477	return 0;
	478	}
	479
	480	static void ep93xxfb_dealloc_videomem(struct fb_info *info)
	481	{
	482	if (info->screen_base)
	483	dma_free_coherent(info->dev, info->fix.smem_len,
	484	info->screen_base, info->fix.smem_start);
	485	}
	486
48c68c4f	487	static int ep93xxfb_probe(struct platform_device *pdev)
88017bda RM	488	{
	489	struct ep93xxfb_mach_info *mach_info = pdev->dev.platform_data;
	490	struct fb_info *info;
	491	struct ep93xx_fbi *fbi;
	492	struct resource *res;
	493	char *video_mode;
	494	int err;
	495
	496	if (!mach_info)
	497	return -EINVAL;
	498
	499	info = framebuffer_alloc(sizeof(struct ep93xx_fbi), &pdev->dev);
	500	if (!info)
	501	return -ENOMEM;
	502
	503	info->dev = &pdev->dev;
	504	platform_set_drvdata(pdev, info);
	505	fbi = info->par;
	506	fbi->mach_info = mach_info;
	507
	508	err = fb_alloc_cmap(&info->cmap, 256, 0);
	509	if (err)
045dfdb5	510	goto failed_cmap;
88017bda RM	511
	512	err = ep93xxfb_alloc_videomem(info);
	513	if (err)
045dfdb5	514	goto failed_videomem;
88017bda RM	515
	516	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
	517	if (!res) {
	518	err = -ENXIO;
045dfdb5	519	goto failed_resource;
88017bda RM	520	}
88017bda RM	521
0fd19580 RM	522	/*
	523	* FIXME - We don't do a request_mem_region here because we are
	524	* sharing the register space with the backlight driver (see
	525	* drivers/video/backlight/ep93xx_bl.c) and doing so will cause
	526	* the second loaded driver to return -EBUSY.
	527	*
	528	* NOTE: No locking is required; the backlight does not touch
	529	* any of the framebuffer registers.
	530	*/
88017bda	531	fbi->res = res;
be867814 DC	532	fbi->mmio_base = devm_ioremap(&pdev->dev, res->start,
be867814 DC	533	resource_size(res));
88017bda RM	534	if (!fbi->mmio_base) {
88017bda RM	535	err = -ENXIO;
045dfdb5	536	goto failed_resource;
88017bda RM	537	}
	538
	539	strcpy(info->fix.id, pdev->name);
	540	info->fbops = &ep93xxfb_ops;
	541	info->fix.type = FB_TYPE_PACKED_PIXELS;
	542	info->fix.accel = FB_ACCEL_NONE;
	543	info->var.activate = FB_ACTIVATE_NOW;
	544	info->var.vmode = FB_VMODE_NONINTERLACED;
	545	info->flags = FBINFO_DEFAULT;
	546	info->node = -1;
	547	info->state = FBINFO_STATE_RUNNING;
	548	info->pseudo_palette = &fbi->pseudo_palette;
	549
	550	fb_get_options("ep93xx-fb", &video_mode);
	551	err = fb_find_mode(&info->var, info, video_mode,
	552	fbi->mach_info->modes, fbi->mach_info->num_modes,
	553	fbi->mach_info->default_mode, fbi->mach_info->bpp);
	554	if (err == 0) {
	555	dev_err(info->dev, "No suitable video mode found\n");
	556	err = -EINVAL;
be867814	557	goto failed_resource;
88017bda RM	558	}
	559
	560	if (mach_info->setup) {
	561	err = mach_info->setup(pdev);
	562	if (err)
be867814	563	goto failed_resource;
88017bda RM	564	}
	565
	566	err = ep93xxfb_check_var(&info->var, info);
	567	if (err)
045dfdb5	568	goto failed_check;
88017bda	569
be867814	570	fbi->clk = devm_clk_get(&pdev->dev, NULL);
88017bda RM	571	if (IS_ERR(fbi->clk)) {
	572	err = PTR_ERR(fbi->clk);
	573	fbi->clk = NULL;
045dfdb5	574	goto failed_check;
88017bda RM	575	}
	576
	577	ep93xxfb_set_par(info);
	578	clk_enable(fbi->clk);
	579
	580	err = register_framebuffer(info);
	581	if (err)
be867814	582	goto failed_check;
88017bda RM	583
	584	dev_info(info->dev, "registered. Mode = %dx%d-%d\n",
	585	info->var.xres, info->var.yres, info->var.bits_per_pixel);
	586	return 0;
	587
045dfdb5	588	failed_check:
88017bda RM	589	if (fbi->mach_info->teardown)
88017bda RM	590	fbi->mach_info->teardown(pdev);
045dfdb5 JL	591	failed_resource:
	592	ep93xxfb_dealloc_videomem(info);
	593	failed_videomem:
	594	fb_dealloc_cmap(&info->cmap);
	595	failed_cmap:
88017bda RM	596	kfree(info);
	597	platform_set_drvdata(pdev, NULL);
	598
	599	return err;
	600	}
	601
48c68c4f	602	static int ep93xxfb_remove(struct platform_device *pdev)
88017bda RM	603	{
	604	struct fb_info *info = platform_get_drvdata(pdev);
	605	struct ep93xx_fbi *fbi = info->par;
	606
	607	unregister_framebuffer(info);
	608	clk_disable(fbi->clk);
88017bda RM	609	ep93xxfb_dealloc_videomem(info);
	610	fb_dealloc_cmap(&info->cmap);
	611
	612	if (fbi->mach_info->teardown)
	613	fbi->mach_info->teardown(pdev);
	614
	615	kfree(info);
	616	platform_set_drvdata(pdev, NULL);
	617
	618	return 0;
	619	}
	620
	621	static struct platform_driver ep93xxfb_driver = {
	622	.probe = ep93xxfb_probe,
48c68c4f	623	.remove = ep93xxfb_remove,
88017bda RM	624	.driver = {
	625	.name = "ep93xx-fb",
	626	.owner = THIS_MODULE,
	627	},
	628	};
	629
48c68c4f	630	static int ep93xxfb_init(void)
88017bda RM	631	{
	632	return platform_driver_register(&ep93xxfb_driver);
	633	}
	634
	635	static void __exit ep93xxfb_exit(void)
	636	{
	637	platform_driver_unregister(&ep93xxfb_driver);
	638	}
	639
	640	module_init(ep93xxfb_init);
	641	module_exit(ep93xxfb_exit);
	642
	643	MODULE_DESCRIPTION("EP93XX Framebuffer Driver");
	644	MODULE_ALIAS("platform:ep93xx-fb");
1c5454ee	645	MODULE_AUTHOR("Ryan Mallon, "
88017bda RM	646	"H Hartley Sweeten <hsweeten@visionengravers.com");
88017bda RM	647	MODULE_LICENSE("GPL");