Commit | Line | Data |
---|---|---|
cffd9348 MH |
1 | /* |
2 | * Frame buffer driver for ADV7393/2 video encoder | |
3 | * | |
4 | * Copyright 2006-2009 Analog Devices Inc. | |
5 | * Licensed under the GPL-2 or late. | |
6 | */ | |
7 | ||
8 | /* | |
9 | * TODO: Remove Globals | |
10 | * TODO: Code Cleanup | |
11 | */ | |
12 | ||
b5644a15 BP |
13 | #define DRIVER_NAME "bfin-adv7393" |
14 | ||
cffd9348 MH |
15 | #define pr_fmt(fmt) DRIVER_NAME ": " fmt |
16 | ||
17 | #include <linux/module.h> | |
18 | #include <linux/kernel.h> | |
19 | #include <linux/errno.h> | |
20 | #include <linux/string.h> | |
21 | #include <linux/mm.h> | |
22 | #include <linux/tty.h> | |
23 | #include <linux/slab.h> | |
24 | #include <linux/delay.h> | |
25 | #include <linux/fb.h> | |
26 | #include <linux/ioport.h> | |
27 | #include <linux/init.h> | |
28 | #include <linux/types.h> | |
29 | #include <linux/interrupt.h> | |
30 | #include <linux/sched.h> | |
31 | #include <asm/blackfin.h> | |
32 | #include <asm/irq.h> | |
33 | #include <asm/dma.h> | |
34 | #include <linux/uaccess.h> | |
35 | #include <linux/gpio.h> | |
36 | #include <asm/portmux.h> | |
37 | ||
38 | #include <linux/dma-mapping.h> | |
39 | #include <linux/proc_fs.h> | |
40 | #include <linux/platform_device.h> | |
cffd9348 | 41 | #include <linux/i2c.h> |
cffd9348 MH |
42 | |
43 | #include "bfin_adv7393fb.h" | |
44 | ||
45 | static int mode = VMODE; | |
46 | static int mem = VMEM; | |
47 | static int nocursor = 1; | |
48 | ||
49 | static const unsigned short ppi_pins[] = { | |
50 | P_PPI0_CLK, P_PPI0_FS1, P_PPI0_FS2, | |
51 | P_PPI0_D0, P_PPI0_D1, P_PPI0_D2, P_PPI0_D3, | |
52 | P_PPI0_D4, P_PPI0_D5, P_PPI0_D6, P_PPI0_D7, | |
53 | P_PPI0_D8, P_PPI0_D9, P_PPI0_D10, P_PPI0_D11, | |
54 | P_PPI0_D12, P_PPI0_D13, P_PPI0_D14, P_PPI0_D15, | |
55 | 0 | |
56 | }; | |
57 | ||
58 | /* | |
59 | * card parameters | |
60 | */ | |
61 | ||
62 | static struct bfin_adv7393_fb_par { | |
ff0c2642 | 63 | /* structure holding blackfin / adv7393 parameters when |
cffd9348 MH |
64 | screen is blanked */ |
65 | struct { | |
66 | u8 Mode; /* ntsc/pal/? */ | |
67 | } vga_state; | |
68 | atomic_t ref_count; | |
69 | } bfin_par; | |
70 | ||
71 | /* --------------------------------------------------------------------- */ | |
72 | ||
73 | static struct fb_var_screeninfo bfin_adv7393_fb_defined = { | |
74 | .xres = 720, | |
75 | .yres = 480, | |
76 | .xres_virtual = 720, | |
77 | .yres_virtual = 480, | |
78 | .bits_per_pixel = 16, | |
79 | .activate = FB_ACTIVATE_TEST, | |
80 | .height = -1, | |
81 | .width = -1, | |
82 | .left_margin = 0, | |
83 | .right_margin = 0, | |
84 | .upper_margin = 0, | |
85 | .lower_margin = 0, | |
86 | .vmode = FB_VMODE_INTERLACED, | |
87 | .red = {11, 5, 0}, | |
88 | .green = {5, 6, 0}, | |
89 | .blue = {0, 5, 0}, | |
90 | .transp = {0, 0, 0}, | |
91 | }; | |
92 | ||
48c68c4f | 93 | static struct fb_fix_screeninfo bfin_adv7393_fb_fix = { |
cffd9348 MH |
94 | .id = "BFIN ADV7393", |
95 | .smem_len = 720 * 480 * 2, | |
96 | .type = FB_TYPE_PACKED_PIXELS, | |
97 | .visual = FB_VISUAL_TRUECOLOR, | |
98 | .xpanstep = 0, | |
99 | .ypanstep = 0, | |
100 | .line_length = 720 * 2, | |
101 | .accel = FB_ACCEL_NONE | |
102 | }; | |
103 | ||
104 | static struct fb_ops bfin_adv7393_fb_ops = { | |
105 | .owner = THIS_MODULE, | |
106 | .fb_open = bfin_adv7393_fb_open, | |
107 | .fb_release = bfin_adv7393_fb_release, | |
108 | .fb_check_var = bfin_adv7393_fb_check_var, | |
109 | .fb_pan_display = bfin_adv7393_fb_pan_display, | |
110 | .fb_blank = bfin_adv7393_fb_blank, | |
111 | .fb_fillrect = cfb_fillrect, | |
112 | .fb_copyarea = cfb_copyarea, | |
113 | .fb_imageblit = cfb_imageblit, | |
114 | .fb_cursor = bfin_adv7393_fb_cursor, | |
115 | .fb_setcolreg = bfin_adv7393_fb_setcolreg, | |
116 | }; | |
117 | ||
118 | static int dma_desc_list(struct adv7393fb_device *fbdev, u16 arg) | |
119 | { | |
120 | if (arg == BUILD) { /* Build */ | |
121 | fbdev->vb1 = l1_data_sram_zalloc(sizeof(struct dmasg)); | |
122 | if (fbdev->vb1 == NULL) | |
123 | goto error; | |
124 | ||
125 | fbdev->av1 = l1_data_sram_zalloc(sizeof(struct dmasg)); | |
126 | if (fbdev->av1 == NULL) | |
127 | goto error; | |
128 | ||
129 | fbdev->vb2 = l1_data_sram_zalloc(sizeof(struct dmasg)); | |
130 | if (fbdev->vb2 == NULL) | |
131 | goto error; | |
132 | ||
133 | fbdev->av2 = l1_data_sram_zalloc(sizeof(struct dmasg)); | |
134 | if (fbdev->av2 == NULL) | |
135 | goto error; | |
136 | ||
137 | /* Build linked DMA descriptor list */ | |
138 | fbdev->vb1->next_desc_addr = fbdev->av1; | |
139 | fbdev->av1->next_desc_addr = fbdev->vb2; | |
140 | fbdev->vb2->next_desc_addr = fbdev->av2; | |
141 | fbdev->av2->next_desc_addr = fbdev->vb1; | |
142 | ||
143 | /* Save list head */ | |
144 | fbdev->descriptor_list_head = fbdev->av2; | |
145 | ||
146 | /* Vertical Blanking Field 1 */ | |
147 | fbdev->vb1->start_addr = VB_DUMMY_MEMORY_SOURCE; | |
148 | fbdev->vb1->cfg = DMA_CFG_VAL; | |
149 | ||
150 | fbdev->vb1->x_count = | |
151 | fbdev->modes[mode].xres + fbdev->modes[mode].boeft_blank; | |
152 | ||
153 | fbdev->vb1->x_modify = 0; | |
154 | fbdev->vb1->y_count = fbdev->modes[mode].vb1_lines; | |
155 | fbdev->vb1->y_modify = 0; | |
156 | ||
157 | /* Active Video Field 1 */ | |
158 | ||
159 | fbdev->av1->start_addr = (unsigned long)fbdev->fb_mem; | |
160 | fbdev->av1->cfg = DMA_CFG_VAL; | |
161 | fbdev->av1->x_count = | |
162 | fbdev->modes[mode].xres + fbdev->modes[mode].boeft_blank; | |
163 | fbdev->av1->x_modify = fbdev->modes[mode].bpp / 8; | |
164 | fbdev->av1->y_count = fbdev->modes[mode].a_lines; | |
165 | fbdev->av1->y_modify = | |
166 | (fbdev->modes[mode].xres - fbdev->modes[mode].boeft_blank + | |
167 | 1) * (fbdev->modes[mode].bpp / 8); | |
168 | ||
169 | /* Vertical Blanking Field 2 */ | |
170 | ||
171 | fbdev->vb2->start_addr = VB_DUMMY_MEMORY_SOURCE; | |
172 | fbdev->vb2->cfg = DMA_CFG_VAL; | |
173 | fbdev->vb2->x_count = | |
174 | fbdev->modes[mode].xres + fbdev->modes[mode].boeft_blank; | |
175 | ||
176 | fbdev->vb2->x_modify = 0; | |
177 | fbdev->vb2->y_count = fbdev->modes[mode].vb2_lines; | |
178 | fbdev->vb2->y_modify = 0; | |
179 | ||
180 | /* Active Video Field 2 */ | |
181 | ||
182 | fbdev->av2->start_addr = | |
183 | (unsigned long)fbdev->fb_mem + fbdev->line_len; | |
184 | ||
185 | fbdev->av2->cfg = DMA_CFG_VAL; | |
186 | ||
187 | fbdev->av2->x_count = | |
188 | fbdev->modes[mode].xres + fbdev->modes[mode].boeft_blank; | |
189 | ||
190 | fbdev->av2->x_modify = (fbdev->modes[mode].bpp / 8); | |
191 | fbdev->av2->y_count = fbdev->modes[mode].a_lines; | |
192 | ||
193 | fbdev->av2->y_modify = | |
194 | (fbdev->modes[mode].xres - fbdev->modes[mode].boeft_blank + | |
195 | 1) * (fbdev->modes[mode].bpp / 8); | |
196 | ||
197 | return 1; | |
198 | } | |
199 | ||
200 | error: | |
201 | l1_data_sram_free(fbdev->vb1); | |
202 | l1_data_sram_free(fbdev->av1); | |
203 | l1_data_sram_free(fbdev->vb2); | |
204 | l1_data_sram_free(fbdev->av2); | |
205 | ||
206 | return 0; | |
207 | } | |
208 | ||
209 | static int bfin_config_dma(struct adv7393fb_device *fbdev) | |
210 | { | |
211 | BUG_ON(!(fbdev->fb_mem)); | |
212 | ||
213 | set_dma_x_count(CH_PPI, fbdev->descriptor_list_head->x_count); | |
214 | set_dma_x_modify(CH_PPI, fbdev->descriptor_list_head->x_modify); | |
215 | set_dma_y_count(CH_PPI, fbdev->descriptor_list_head->y_count); | |
216 | set_dma_y_modify(CH_PPI, fbdev->descriptor_list_head->y_modify); | |
217 | set_dma_start_addr(CH_PPI, fbdev->descriptor_list_head->start_addr); | |
218 | set_dma_next_desc_addr(CH_PPI, | |
219 | fbdev->descriptor_list_head->next_desc_addr); | |
220 | set_dma_config(CH_PPI, fbdev->descriptor_list_head->cfg); | |
221 | ||
222 | return 1; | |
223 | } | |
224 | ||
225 | static void bfin_disable_dma(void) | |
226 | { | |
227 | bfin_write_DMA0_CONFIG(bfin_read_DMA0_CONFIG() & ~DMAEN); | |
228 | } | |
229 | ||
230 | static void bfin_config_ppi(struct adv7393fb_device *fbdev) | |
231 | { | |
232 | if (ANOMALY_05000183) { | |
233 | bfin_write_TIMER2_CONFIG(WDTH_CAP); | |
234 | bfin_write_TIMER_ENABLE(TIMEN2); | |
235 | } | |
236 | ||
237 | bfin_write_PPI_CONTROL(0x381E); | |
238 | bfin_write_PPI_FRAME(fbdev->modes[mode].tot_lines); | |
239 | bfin_write_PPI_COUNT(fbdev->modes[mode].xres + | |
240 | fbdev->modes[mode].boeft_blank - 1); | |
241 | bfin_write_PPI_DELAY(fbdev->modes[mode].aoeft_blank - 1); | |
242 | } | |
243 | ||
244 | static void bfin_enable_ppi(void) | |
245 | { | |
246 | bfin_write_PPI_CONTROL(bfin_read_PPI_CONTROL() | PORT_EN); | |
247 | } | |
248 | ||
249 | static void bfin_disable_ppi(void) | |
250 | { | |
251 | bfin_write_PPI_CONTROL(bfin_read_PPI_CONTROL() & ~PORT_EN); | |
252 | } | |
253 | ||
254 | static inline int adv7393_write(struct i2c_client *client, u8 reg, u8 value) | |
255 | { | |
256 | return i2c_smbus_write_byte_data(client, reg, value); | |
257 | } | |
258 | ||
259 | static inline int adv7393_read(struct i2c_client *client, u8 reg) | |
260 | { | |
261 | return i2c_smbus_read_byte_data(client, reg); | |
262 | } | |
263 | ||
264 | static int | |
265 | adv7393_write_block(struct i2c_client *client, | |
266 | const u8 *data, unsigned int len) | |
267 | { | |
268 | int ret = -1; | |
269 | u8 reg; | |
270 | ||
271 | while (len >= 2) { | |
272 | reg = *data++; | |
273 | ret = adv7393_write(client, reg, *data++); | |
274 | if (ret < 0) | |
275 | break; | |
276 | len -= 2; | |
277 | } | |
278 | ||
279 | return ret; | |
280 | } | |
281 | ||
282 | static int adv7393_mode(struct i2c_client *client, u16 mode) | |
283 | { | |
284 | switch (mode) { | |
285 | case POWER_ON: /* ADV7393 Sleep mode OFF */ | |
286 | adv7393_write(client, 0x00, 0x1E); | |
287 | break; | |
288 | case POWER_DOWN: /* ADV7393 Sleep mode ON */ | |
289 | adv7393_write(client, 0x00, 0x1F); | |
290 | break; | |
291 | case BLANK_OFF: /* Pixel Data Valid */ | |
292 | adv7393_write(client, 0x82, 0xCB); | |
293 | break; | |
294 | case BLANK_ON: /* Pixel Data Invalid */ | |
295 | adv7393_write(client, 0x82, 0x8B); | |
296 | break; | |
297 | default: | |
298 | return -EINVAL; | |
299 | break; | |
300 | } | |
301 | return 0; | |
302 | } | |
303 | ||
304 | static irqreturn_t ppi_irq_error(int irq, void *dev_id) | |
305 | { | |
306 | ||
307 | struct adv7393fb_device *fbdev = (struct adv7393fb_device *)dev_id; | |
308 | ||
309 | u16 status = bfin_read_PPI_STATUS(); | |
310 | ||
311 | pr_debug("%s: PPI Status = 0x%X\n", __func__, status); | |
312 | ||
313 | if (status) { | |
314 | bfin_disable_dma(); /* TODO: Check Sequence */ | |
315 | bfin_disable_ppi(); | |
316 | bfin_clear_PPI_STATUS(); | |
317 | bfin_config_dma(fbdev); | |
318 | bfin_enable_ppi(); | |
319 | } | |
320 | ||
321 | return IRQ_HANDLED; | |
322 | ||
323 | } | |
324 | ||
325 | static int proc_output(char *buf) | |
326 | { | |
327 | char *p = buf; | |
328 | ||
329 | p += sprintf(p, | |
330 | "Usage:\n" | |
331 | "echo 0x[REG][Value] > adv7393\n" | |
332 | "example: echo 0x1234 >adv7393\n" | |
333 | "writes 0x34 into Register 0x12\n"); | |
334 | ||
335 | return p - buf; | |
336 | } | |
337 | ||
ff9046ac AV |
338 | static ssize_t |
339 | adv7393_read_proc(struct file *file, char __user *buf, | |
340 | size_t size, loff_t *ppos) | |
cffd9348 | 341 | { |
ff9046ac AV |
342 | static const char message[] = "Usage:\n" |
343 | "echo 0x[REG][Value] > adv7393\n" | |
344 | "example: echo 0x1234 >adv7393\n" | |
345 | "writes 0x34 into Register 0x12\n"; | |
346 | return simple_read_from_buffer(buf, size, ppos, message, | |
347 | sizeof(message)); | |
cffd9348 MH |
348 | } |
349 | ||
ff9046ac | 350 | static ssize_t |
cffd9348 | 351 | adv7393_write_proc(struct file *file, const char __user * buffer, |
ff9046ac | 352 | size_t count, loff_t *ppos) |
cffd9348 | 353 | { |
d9dda78b | 354 | struct adv7393fb_device *fbdev = PDE_DATA(file_inode(file)); |
cffd9348 MH |
355 | unsigned int val; |
356 | int ret; | |
357 | ||
5c888aa4 | 358 | ret = kstrtouint_from_user(buffer, count, 0, &val); |
cffd9348 MH |
359 | if (ret) |
360 | return -EFAULT; | |
361 | ||
cffd9348 MH |
362 | adv7393_write(fbdev->client, val >> 8, val & 0xff); |
363 | ||
364 | return count; | |
365 | } | |
366 | ||
ff9046ac AV |
367 | static const struct file_operations fops = { |
368 | .read = adv7393_read_proc, | |
369 | .write = adv7393_write_proc, | |
370 | .llseek = default_llseek, | |
371 | }; | |
372 | ||
48c68c4f GKH |
373 | static int bfin_adv7393_fb_probe(struct i2c_client *client, |
374 | const struct i2c_device_id *id) | |
cffd9348 MH |
375 | { |
376 | int ret = 0; | |
377 | struct proc_dir_entry *entry; | |
378 | int num_modes = ARRAY_SIZE(known_modes); | |
379 | ||
380 | struct adv7393fb_device *fbdev = NULL; | |
381 | ||
382 | if (mem > 2) { | |
383 | dev_err(&client->dev, "mem out of allowed range [1;2]\n"); | |
384 | return -EINVAL; | |
385 | } | |
386 | ||
387 | if (mode > num_modes) { | |
388 | dev_err(&client->dev, "mode %d: not supported", mode); | |
389 | return -EFAULT; | |
390 | } | |
391 | ||
392 | fbdev = kzalloc(sizeof(*fbdev), GFP_KERNEL); | |
393 | if (!fbdev) { | |
394 | dev_err(&client->dev, "failed to allocate device private record"); | |
395 | return -ENOMEM; | |
396 | } | |
397 | ||
398 | i2c_set_clientdata(client, fbdev); | |
399 | ||
400 | fbdev->modes = known_modes; | |
401 | fbdev->client = client; | |
402 | ||
403 | fbdev->fb_len = | |
404 | mem * fbdev->modes[mode].xres * fbdev->modes[mode].xres * | |
405 | (fbdev->modes[mode].bpp / 8); | |
406 | ||
407 | fbdev->line_len = | |
408 | fbdev->modes[mode].xres * (fbdev->modes[mode].bpp / 8); | |
409 | ||
410 | /* Workaround "PPI Does Not Start Properly In Specific Mode" */ | |
411 | if (ANOMALY_05000400) { | |
f8bd4934 | 412 | ret = gpio_request_one(P_IDENT(P_PPI0_FS3), GPIOF_OUT_INIT_LOW, |
0b479c3d | 413 | "PPI0_FS3"); |
f8bd4934 | 414 | if (ret) { |
cffd9348 MH |
415 | dev_err(&client->dev, "PPI0_FS3 GPIO request failed\n"); |
416 | ret = -EBUSY; | |
c895305e | 417 | goto free_fbdev; |
cffd9348 | 418 | } |
cffd9348 MH |
419 | } |
420 | ||
421 | if (peripheral_request_list(ppi_pins, DRIVER_NAME)) { | |
422 | dev_err(&client->dev, "requesting PPI peripheral failed\n"); | |
423 | ret = -EFAULT; | |
c895305e | 424 | goto free_gpio; |
cffd9348 MH |
425 | } |
426 | ||
427 | fbdev->fb_mem = | |
428 | dma_alloc_coherent(NULL, fbdev->fb_len, &fbdev->dma_handle, | |
429 | GFP_KERNEL); | |
430 | ||
431 | if (NULL == fbdev->fb_mem) { | |
432 | dev_err(&client->dev, "couldn't allocate dma buffer (%d bytes)\n", | |
433 | (u32) fbdev->fb_len); | |
434 | ret = -ENOMEM; | |
c895305e | 435 | goto free_ppi_pins; |
cffd9348 MH |
436 | } |
437 | ||
438 | fbdev->info.screen_base = (void *)fbdev->fb_mem; | |
439 | bfin_adv7393_fb_fix.smem_start = (int)fbdev->fb_mem; | |
440 | ||
441 | bfin_adv7393_fb_fix.smem_len = fbdev->fb_len; | |
442 | bfin_adv7393_fb_fix.line_length = fbdev->line_len; | |
443 | ||
444 | if (mem > 1) | |
445 | bfin_adv7393_fb_fix.ypanstep = 1; | |
446 | ||
447 | bfin_adv7393_fb_defined.red.length = 5; | |
448 | bfin_adv7393_fb_defined.green.length = 6; | |
449 | bfin_adv7393_fb_defined.blue.length = 5; | |
450 | ||
451 | bfin_adv7393_fb_defined.xres = fbdev->modes[mode].xres; | |
452 | bfin_adv7393_fb_defined.yres = fbdev->modes[mode].yres; | |
453 | bfin_adv7393_fb_defined.xres_virtual = fbdev->modes[mode].xres; | |
454 | bfin_adv7393_fb_defined.yres_virtual = mem * fbdev->modes[mode].yres; | |
455 | bfin_adv7393_fb_defined.bits_per_pixel = fbdev->modes[mode].bpp; | |
456 | ||
457 | fbdev->info.fbops = &bfin_adv7393_fb_ops; | |
458 | fbdev->info.var = bfin_adv7393_fb_defined; | |
459 | fbdev->info.fix = bfin_adv7393_fb_fix; | |
460 | fbdev->info.par = &bfin_par; | |
461 | fbdev->info.flags = FBINFO_DEFAULT; | |
462 | ||
463 | fbdev->info.pseudo_palette = kzalloc(sizeof(u32) * 16, GFP_KERNEL); | |
464 | if (!fbdev->info.pseudo_palette) { | |
465 | dev_err(&client->dev, "failed to allocate pseudo_palette\n"); | |
466 | ret = -ENOMEM; | |
c895305e | 467 | goto free_fb_mem; |
cffd9348 MH |
468 | } |
469 | ||
470 | if (fb_alloc_cmap(&fbdev->info.cmap, BFIN_LCD_NBR_PALETTE_ENTRIES, 0) < 0) { | |
471 | dev_err(&client->dev, "failed to allocate colormap (%d entries)\n", | |
472 | BFIN_LCD_NBR_PALETTE_ENTRIES); | |
473 | ret = -EFAULT; | |
c895305e | 474 | goto free_palette; |
cffd9348 MH |
475 | } |
476 | ||
477 | if (request_dma(CH_PPI, "BF5xx_PPI_DMA") < 0) { | |
478 | dev_err(&client->dev, "unable to request PPI DMA\n"); | |
479 | ret = -EFAULT; | |
c895305e | 480 | goto free_cmap; |
cffd9348 MH |
481 | } |
482 | ||
f8798ccb | 483 | if (request_irq(IRQ_PPI_ERROR, ppi_irq_error, 0, |
cffd9348 MH |
484 | "PPI ERROR", fbdev) < 0) { |
485 | dev_err(&client->dev, "unable to request PPI ERROR IRQ\n"); | |
486 | ret = -EFAULT; | |
c895305e | 487 | goto free_ch_ppi; |
cffd9348 MH |
488 | } |
489 | ||
490 | fbdev->open = 0; | |
491 | ||
492 | ret = adv7393_write_block(client, fbdev->modes[mode].adv7393_i2c_initd, | |
493 | fbdev->modes[mode].adv7393_i2c_initd_len); | |
494 | ||
495 | if (ret) { | |
496 | dev_err(&client->dev, "i2c attach: init error\n"); | |
c895305e | 497 | goto free_irq_ppi; |
cffd9348 MH |
498 | } |
499 | ||
500 | ||
501 | if (register_framebuffer(&fbdev->info) < 0) { | |
502 | dev_err(&client->dev, "unable to register framebuffer\n"); | |
503 | ret = -EFAULT; | |
c895305e | 504 | goto free_irq_ppi; |
cffd9348 MH |
505 | } |
506 | ||
507 | dev_info(&client->dev, "fb%d: %s frame buffer device\n", | |
508 | fbdev->info.node, fbdev->info.fix.id); | |
509 | dev_info(&client->dev, "fb memory address : 0x%p\n", fbdev->fb_mem); | |
510 | ||
ff9046ac | 511 | entry = proc_create_data("driver/adv7393", 0, NULL, &fops, fbdev); |
cffd9348 MH |
512 | if (!entry) { |
513 | dev_err(&client->dev, "unable to create /proc entry\n"); | |
514 | ret = -EFAULT; | |
c895305e | 515 | goto free_fb; |
cffd9348 | 516 | } |
cffd9348 MH |
517 | return 0; |
518 | ||
c895305e | 519 | free_fb: |
cffd9348 | 520 | unregister_framebuffer(&fbdev->info); |
c895305e | 521 | free_irq_ppi: |
cffd9348 | 522 | free_irq(IRQ_PPI_ERROR, fbdev); |
c895305e | 523 | free_ch_ppi: |
cffd9348 | 524 | free_dma(CH_PPI); |
c895305e | 525 | free_cmap: |
cffd9348 | 526 | fb_dealloc_cmap(&fbdev->info.cmap); |
c895305e | 527 | free_palette: |
cffd9348 | 528 | kfree(fbdev->info.pseudo_palette); |
c895305e EG |
529 | free_fb_mem: |
530 | dma_free_coherent(NULL, fbdev->fb_len, fbdev->fb_mem, | |
531 | fbdev->dma_handle); | |
532 | free_ppi_pins: | |
cffd9348 | 533 | peripheral_free_list(ppi_pins); |
c895305e EG |
534 | free_gpio: |
535 | if (ANOMALY_05000400) | |
536 | gpio_free(P_IDENT(P_PPI0_FS3)); | |
537 | free_fbdev: | |
cffd9348 MH |
538 | kfree(fbdev); |
539 | ||
540 | return ret; | |
541 | } | |
542 | ||
543 | static int bfin_adv7393_fb_open(struct fb_info *info, int user) | |
544 | { | |
545 | struct adv7393fb_device *fbdev = to_adv7393fb_device(info); | |
546 | ||
547 | fbdev->info.screen_base = (void *)fbdev->fb_mem; | |
548 | if (!fbdev->info.screen_base) { | |
549 | dev_err(&fbdev->client->dev, "unable to map device\n"); | |
550 | return -ENOMEM; | |
551 | } | |
552 | ||
553 | fbdev->open = 1; | |
554 | dma_desc_list(fbdev, BUILD); | |
555 | adv7393_mode(fbdev->client, BLANK_OFF); | |
556 | bfin_config_ppi(fbdev); | |
557 | bfin_config_dma(fbdev); | |
558 | bfin_enable_ppi(); | |
559 | ||
560 | return 0; | |
561 | } | |
562 | ||
563 | static int bfin_adv7393_fb_release(struct fb_info *info, int user) | |
564 | { | |
565 | struct adv7393fb_device *fbdev = to_adv7393fb_device(info); | |
566 | ||
567 | adv7393_mode(fbdev->client, BLANK_ON); | |
568 | bfin_disable_dma(); | |
569 | bfin_disable_ppi(); | |
570 | dma_desc_list(fbdev, DESTRUCT); | |
571 | fbdev->open = 0; | |
572 | return 0; | |
573 | } | |
574 | ||
575 | static int | |
576 | bfin_adv7393_fb_check_var(struct fb_var_screeninfo *var, struct fb_info *info) | |
577 | { | |
578 | ||
579 | switch (var->bits_per_pixel) { | |
580 | case 16:/* DIRECTCOLOUR, 64k */ | |
581 | var->red.offset = info->var.red.offset; | |
582 | var->green.offset = info->var.green.offset; | |
583 | var->blue.offset = info->var.blue.offset; | |
584 | var->red.length = info->var.red.length; | |
585 | var->green.length = info->var.green.length; | |
586 | var->blue.length = info->var.blue.length; | |
587 | var->transp.offset = 0; | |
588 | var->transp.length = 0; | |
589 | var->transp.msb_right = 0; | |
590 | var->red.msb_right = 0; | |
591 | var->green.msb_right = 0; | |
592 | var->blue.msb_right = 0; | |
593 | break; | |
594 | default: | |
595 | pr_debug("%s: depth not supported: %u BPP\n", __func__, | |
596 | var->bits_per_pixel); | |
597 | return -EINVAL; | |
598 | } | |
599 | ||
600 | if (info->var.xres != var->xres || | |
601 | info->var.yres != var->yres || | |
602 | info->var.xres_virtual != var->xres_virtual || | |
603 | info->var.yres_virtual != var->yres_virtual) { | |
604 | pr_debug("%s: Resolution not supported: X%u x Y%u\n", | |
605 | __func__, var->xres, var->yres); | |
606 | return -EINVAL; | |
607 | } | |
608 | ||
609 | /* | |
610 | * Memory limit | |
611 | */ | |
612 | ||
613 | if ((info->fix.line_length * var->yres_virtual) > info->fix.smem_len) { | |
614 | pr_debug("%s: Memory Limit requested yres_virtual = %u\n", | |
615 | __func__, var->yres_virtual); | |
616 | return -ENOMEM; | |
617 | } | |
618 | ||
619 | return 0; | |
620 | } | |
621 | ||
622 | static int | |
623 | bfin_adv7393_fb_pan_display(struct fb_var_screeninfo *var, struct fb_info *info) | |
624 | { | |
625 | int dy; | |
626 | u32 dmaaddr; | |
627 | struct adv7393fb_device *fbdev = to_adv7393fb_device(info); | |
628 | ||
629 | if (!var || !info) | |
630 | return -EINVAL; | |
631 | ||
632 | if (var->xoffset - info->var.xoffset) { | |
633 | /* No support for X panning for now! */ | |
634 | return -EINVAL; | |
635 | } | |
636 | dy = var->yoffset - info->var.yoffset; | |
637 | ||
638 | if (dy) { | |
639 | pr_debug("%s: Panning screen of %d lines\n", __func__, dy); | |
640 | ||
641 | dmaaddr = fbdev->av1->start_addr; | |
642 | dmaaddr += (info->fix.line_length * dy); | |
643 | /* TODO: Wait for current frame to finished */ | |
644 | ||
645 | fbdev->av1->start_addr = (unsigned long)dmaaddr; | |
646 | fbdev->av2->start_addr = (unsigned long)dmaaddr + fbdev->line_len; | |
647 | } | |
648 | ||
649 | return 0; | |
650 | ||
651 | } | |
652 | ||
653 | /* 0 unblank, 1 blank, 2 no vsync, 3 no hsync, 4 off */ | |
654 | static int bfin_adv7393_fb_blank(int blank, struct fb_info *info) | |
655 | { | |
656 | struct adv7393fb_device *fbdev = to_adv7393fb_device(info); | |
657 | ||
658 | switch (blank) { | |
659 | ||
660 | case VESA_NO_BLANKING: | |
661 | /* Turn on panel */ | |
662 | adv7393_mode(fbdev->client, BLANK_OFF); | |
663 | break; | |
664 | ||
665 | case VESA_VSYNC_SUSPEND: | |
666 | case VESA_HSYNC_SUSPEND: | |
667 | case VESA_POWERDOWN: | |
668 | /* Turn off panel */ | |
669 | adv7393_mode(fbdev->client, BLANK_ON); | |
670 | break; | |
671 | ||
672 | default: | |
673 | return -EINVAL; | |
674 | break; | |
675 | } | |
676 | return 0; | |
677 | } | |
678 | ||
679 | int bfin_adv7393_fb_cursor(struct fb_info *info, struct fb_cursor *cursor) | |
680 | { | |
681 | if (nocursor) | |
682 | return 0; | |
683 | else | |
684 | return -EINVAL; /* just to force soft_cursor() call */ | |
685 | } | |
686 | ||
687 | static int bfin_adv7393_fb_setcolreg(u_int regno, u_int red, u_int green, | |
688 | u_int blue, u_int transp, | |
689 | struct fb_info *info) | |
690 | { | |
691 | if (regno >= BFIN_LCD_NBR_PALETTE_ENTRIES) | |
692 | return -EINVAL; | |
693 | ||
694 | if (info->var.grayscale) | |
695 | /* grayscale = 0.30*R + 0.59*G + 0.11*B */ | |
696 | red = green = blue = (red * 77 + green * 151 + blue * 28) >> 8; | |
697 | ||
698 | if (info->fix.visual == FB_VISUAL_TRUECOLOR) { | |
699 | u32 value; | |
700 | /* Place color in the pseudopalette */ | |
701 | if (regno > 16) | |
702 | return -EINVAL; | |
703 | ||
704 | red >>= (16 - info->var.red.length); | |
705 | green >>= (16 - info->var.green.length); | |
706 | blue >>= (16 - info->var.blue.length); | |
707 | ||
708 | value = (red << info->var.red.offset) | | |
709 | (green << info->var.green.offset)| | |
710 | (blue << info->var.blue.offset); | |
711 | value &= 0xFFFF; | |
712 | ||
713 | ((u32 *) (info->pseudo_palette))[regno] = value; | |
714 | } | |
715 | ||
716 | return 0; | |
717 | } | |
718 | ||
48c68c4f | 719 | static int bfin_adv7393_fb_remove(struct i2c_client *client) |
cffd9348 MH |
720 | { |
721 | struct adv7393fb_device *fbdev = i2c_get_clientdata(client); | |
722 | ||
723 | adv7393_mode(client, POWER_DOWN); | |
724 | ||
725 | if (fbdev->fb_mem) | |
726 | dma_free_coherent(NULL, fbdev->fb_len, fbdev->fb_mem, fbdev->dma_handle); | |
727 | free_dma(CH_PPI); | |
728 | free_irq(IRQ_PPI_ERROR, fbdev); | |
729 | unregister_framebuffer(&fbdev->info); | |
730 | remove_proc_entry("driver/adv7393", NULL); | |
731 | fb_dealloc_cmap(&fbdev->info.cmap); | |
732 | kfree(fbdev->info.pseudo_palette); | |
733 | ||
734 | if (ANOMALY_05000400) | |
735 | gpio_free(P_IDENT(P_PPI0_FS3)); /* FS3 */ | |
736 | peripheral_free_list(ppi_pins); | |
737 | kfree(fbdev); | |
738 | ||
739 | return 0; | |
740 | } | |
741 | ||
742 | #ifdef CONFIG_PM | |
743 | static int bfin_adv7393_fb_suspend(struct device *dev) | |
744 | { | |
745 | struct adv7393fb_device *fbdev = dev_get_drvdata(dev); | |
746 | ||
747 | if (fbdev->open) { | |
748 | bfin_disable_dma(); | |
749 | bfin_disable_ppi(); | |
750 | dma_desc_list(fbdev, DESTRUCT); | |
751 | } | |
752 | adv7393_mode(fbdev->client, POWER_DOWN); | |
753 | ||
754 | return 0; | |
755 | } | |
756 | ||
757 | static int bfin_adv7393_fb_resume(struct device *dev) | |
758 | { | |
759 | struct adv7393fb_device *fbdev = dev_get_drvdata(dev); | |
760 | ||
761 | adv7393_mode(fbdev->client, POWER_ON); | |
762 | ||
763 | if (fbdev->open) { | |
764 | dma_desc_list(fbdev, BUILD); | |
765 | bfin_config_ppi(fbdev); | |
766 | bfin_config_dma(fbdev); | |
767 | bfin_enable_ppi(); | |
768 | } | |
769 | ||
770 | return 0; | |
771 | } | |
772 | ||
773 | static const struct dev_pm_ops bfin_adv7393_dev_pm_ops = { | |
774 | .suspend = bfin_adv7393_fb_suspend, | |
775 | .resume = bfin_adv7393_fb_resume, | |
776 | }; | |
777 | #endif | |
778 | ||
779 | static const struct i2c_device_id bfin_adv7393_id[] = { | |
780 | {DRIVER_NAME, 0}, | |
781 | {} | |
782 | }; | |
783 | ||
784 | MODULE_DEVICE_TABLE(i2c, bfin_adv7393_id); | |
785 | ||
786 | static struct i2c_driver bfin_adv7393_fb_driver = { | |
787 | .driver = { | |
788 | .name = DRIVER_NAME, | |
789 | #ifdef CONFIG_PM | |
790 | .pm = &bfin_adv7393_dev_pm_ops, | |
791 | #endif | |
792 | }, | |
793 | .probe = bfin_adv7393_fb_probe, | |
48c68c4f | 794 | .remove = bfin_adv7393_fb_remove, |
cffd9348 MH |
795 | .id_table = bfin_adv7393_id, |
796 | }; | |
797 | ||
798 | static int __init bfin_adv7393_fb_driver_init(void) | |
799 | { | |
800 | #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE) | |
801 | request_module("i2c-bfin-twi"); | |
802 | #else | |
803 | request_module("i2c-gpio"); | |
804 | #endif | |
805 | ||
806 | return i2c_add_driver(&bfin_adv7393_fb_driver); | |
807 | } | |
808 | module_init(bfin_adv7393_fb_driver_init); | |
809 | ||
810 | static void __exit bfin_adv7393_fb_driver_cleanup(void) | |
811 | { | |
812 | i2c_del_driver(&bfin_adv7393_fb_driver); | |
813 | } | |
814 | module_exit(bfin_adv7393_fb_driver_cleanup); | |
815 | ||
816 | MODULE_LICENSE("GPL"); | |
817 | MODULE_AUTHOR("Michael Hennerich <hennerich@blackfin.uclinux.org>"); | |
818 | MODULE_DESCRIPTION("Frame buffer driver for ADV7393/2 Video Encoder"); | |
819 | ||
820 | module_param(mode, int, 0); | |
821 | MODULE_PARM_DESC(mode, | |
822 | "Video Mode (0=NTSC,1=PAL,2=NTSC 640x480,3=PAL 640x480,4=NTSC YCbCr input,5=PAL YCbCr input)"); | |
823 | ||
824 | module_param(mem, int, 0); | |
825 | MODULE_PARM_DESC(mem, | |
826 | "Size of frame buffer memory 1=Single 2=Double Size (allows y-panning / frame stacking)"); | |
827 | ||
828 | module_param(nocursor, int, 0644); | |
829 | MODULE_PARM_DESC(nocursor, "cursor enable/disable"); |