[deliverable/linux.git] / drivers / video / fbdev / igafb.c

/*
 *  linux/drivers/video/igafb.c -- Frame buffer device for IGA 1682
 *
 *      Copyright (C) 1998  Vladimir Roganov and Gleb Raiko
 *
 *  This driver is partly based on the Frame buffer device for ATI Mach64
 *  and partially on VESA-related code.
 *
 *      Copyright (C) 1997-1998  Geert Uytterhoeven
 *      Copyright (C) 1998  Bernd Harries
 *      Copyright (C) 1998  Eddie C. Dost  (ecd@skynet.be)
 *
 *  This file is subject to the terms and conditions of the GNU General Public
 *  License. See the file COPYING in the main directory of this archive for
 *  more details.
 */

/******************************************************************************

  TODO:
       Despite of IGA Card has advanced graphic acceleration, 
       initial version is almost dummy and does not support it.
       Support for video modes and acceleration must be added
       together with accelerated X-Windows driver implementation.

       Most important thing at this moment is that we have working
       JavaEngine1  console & X  with new console interface.

******************************************************************************/

#include <linux/module.h>
#include <linux/kernel.h>
#include <linux/errno.h>
#include <linux/string.h>
#include <linux/mm.h>
#include <linux/slab.h>
#include <linux/vmalloc.h>
#include <linux/delay.h>
#include <linux/interrupt.h>
#include <linux/fb.h>
#include <linux/init.h>
#include <linux/pci.h>
#include <linux/nvram.h>

#include <asm/io.h>

#ifdef CONFIG_SPARC
#include <asm/prom.h>
#include <asm/pcic.h>
#endif

#include <video/iga.h>

struct pci_mmap_map {
    unsigned long voff;
    unsigned long poff;
    unsigned long size;
    unsigned long prot_flag;
    unsigned long prot_mask;
};

struct iga_par {
	struct pci_mmap_map *mmap_map;
	unsigned long frame_buffer_phys;
	unsigned long io_base;
};

struct fb_info fb_info;

struct fb_fix_screeninfo igafb_fix __initdata = {
        .id		= "IGA 1682",
	.type		= FB_TYPE_PACKED_PIXELS,
	.mmio_len 	= 1000
};

struct fb_var_screeninfo default_var = {
	/* 640x480, 60 Hz, Non-Interlaced (25.175 MHz dotclock) */
	.xres		= 640,
	.yres		= 480,
	.xres_virtual	= 640,
	.yres_virtual	= 480,
	.bits_per_pixel	= 8,
	.red		= {0, 8, 0 },
	.green		= {0, 8, 0 },
	.blue		= {0, 8, 0 },
	.height		= -1,
	.width		= -1,
	.accel_flags	= FB_ACCEL_NONE,
	.pixclock	= 39722,
	.left_margin	= 48,
	.right_margin	= 16,
	.upper_margin	= 33,
	.lower_margin	= 10,
	.hsync_len	= 96,
	.vsync_len	= 2,
	.vmode		= FB_VMODE_NONINTERLACED
};

#ifdef CONFIG_SPARC
struct fb_var_screeninfo default_var_1024x768 __initdata = {
	/* 1024x768, 75 Hz, Non-Interlaced (78.75 MHz dotclock) */
	.xres		= 1024,
	.yres		= 768,
	.xres_virtual	= 1024,
	.yres_virtual	= 768,
	.bits_per_pixel	= 8,
	.red		= {0, 8, 0 },
	.green		= {0, 8, 0 },
	.blue		= {0, 8, 0 },
	.height		= -1,
	.width		= -1,
	.accel_flags	= FB_ACCEL_NONE,
	.pixclock	= 12699,
	.left_margin	= 176,
	.right_margin	= 16,
	.upper_margin	= 28,
	.lower_margin	= 1,
	.hsync_len	= 96,
	.vsync_len	= 3,
	.vmode		= FB_SYNC_HOR_HIGH_ACT|FB_SYNC_VERT_HIGH_ACT, FB_VMODE_NONINTERLACED
};

struct fb_var_screeninfo default_var_1152x900 __initdata = {
	/* 1152x900, 76 Hz, Non-Interlaced (110.0 MHz dotclock) */
	.xres		= 1152,
	.yres		= 900,
	.xres_virtual	= 1152,
	.yres_virtual	= 900,
	.bits_per_pixel	= 8,
	.red		= { 0, 8, 0 },
	.green		= { 0, 8, 0 },
	.blue		= { 0, 8, 0 },
	.height		= -1,
	.width		= -1,
	.accel_flags	= FB_ACCEL_NONE,
	.pixclock	= 9091,
	.left_margin	= 234,
	.right_margin	= 24,
	.upper_margin	= 34,
	.lower_margin	= 3,
	.hsync_len	= 100,
	.vsync_len	= 3,
	.vmode		= FB_SYNC_HOR_HIGH_ACT|FB_SYNC_VERT_HIGH_ACT, FB_VMODE_NONINTERLACED
};

struct fb_var_screeninfo default_var_1280x1024 __initdata = {
	/* 1280x1024, 75 Hz, Non-Interlaced (135.00 MHz dotclock) */
	.xres		= 1280,
	.yres		= 1024,
	.xres_virtual	= 1280,
	.yres_virtual	= 1024,
	.bits_per_pixel	= 8,
	.red		= {0, 8, 0 }, 
	.green		= {0, 8, 0 },
	.blue		= {0, 8, 0 },
	.height		= -1,
	.width		= -1,
	.accel_flags	= 0,
	.pixclock	= 7408,
	.left_margin	= 248,
	.right_margin	= 16,
	.upper_margin	= 38,
	.lower_margin	= 1,
	.hsync_len	= 144,
	.vsync_len	= 3,
	.vmode		= FB_SYNC_HOR_HIGH_ACT|FB_SYNC_VERT_HIGH_ACT, FB_VMODE_NONINTERLACED
};

/*
 *   Memory-mapped I/O functions for Sparc PCI
 *
 * On sparc we happen to access I/O with memory mapped functions too.
 */ 
#define pci_inb(par, reg)        readb(par->io_base+(reg))
#define pci_outb(par, val, reg)  writeb(val, par->io_base+(reg))

static inline unsigned int iga_inb(struct iga_par *par, unsigned int reg,
				   unsigned int idx)
{
        pci_outb(par, idx, reg);
        return pci_inb(par, reg + 1);
}

static inline void iga_outb(struct iga_par *par, unsigned char val,
			    unsigned int reg, unsigned int idx )
{
        pci_outb(par, idx, reg);
        pci_outb(par, val, reg+1);
}

#endif /* CONFIG_SPARC */

/*
 *  Very important functionality for the JavaEngine1 computer:
 *  make screen border black (usign special IGA registers) 
 */
static void iga_blank_border(struct iga_par *par)
{
        int i;
#if 0
	/*
	 * PROM does this for us, so keep this code as a reminder
	 * about required read from 0x3DA and writing of 0x20 in the end.
	 */
	(void) pci_inb(par, 0x3DA);		/* required for every access */
	pci_outb(par, IGA_IDX_VGA_OVERSCAN, IGA_ATTR_CTL);
	(void) pci_inb(par, IGA_ATTR_CTL+1);
	pci_outb(par, 0x38, IGA_ATTR_CTL);
	pci_outb(par, 0x20, IGA_ATTR_CTL);	/* re-enable visual */
#endif
	/*
	 * This does not work as it was designed because the overscan
	 * color is looked up in the palette. Therefore, under X11
	 * overscan changes color.
	 */
	for (i=0; i < 3; i++)
		iga_outb(par, 0, IGA_EXT_CNTRL, IGA_IDX_OVERSCAN_COLOR + i);
}

#ifdef CONFIG_SPARC
static int igafb_mmap(struct fb_info *info,
		      struct vm_area_struct *vma)
{
	struct iga_par *par = (struct iga_par *)info->par;
	unsigned int size, page, map_size = 0;
	unsigned long map_offset = 0;
	int i;

	if (!par->mmap_map)
		return -ENXIO;

	size = vma->vm_end - vma->vm_start;

	/* Each page, see which map applies */
	for (page = 0; page < size; ) {
		map_size = 0;
		for (i = 0; par->mmap_map[i].size; i++) {
			unsigned long start = par->mmap_map[i].voff;
			unsigned long end = start + par->mmap_map[i].size;
			unsigned long offset = (vma->vm_pgoff << PAGE_SHIFT) + page;

			if (start > offset)
				continue;
			if (offset >= end)
				continue;

			map_size = par->mmap_map[i].size - (offset - start);
			map_offset = par->mmap_map[i].poff + (offset - start);
			break;
		}
		if (!map_size) {
			page += PAGE_SIZE;
			continue;
		}
		if (page + map_size > size)
			map_size = size - page;

		pgprot_val(vma->vm_page_prot) &= ~(par->mmap_map[i].prot_mask);
		pgprot_val(vma->vm_page_prot) |= par->mmap_map[i].prot_flag;

		if (remap_pfn_range(vma, vma->vm_start + page,
			map_offset >> PAGE_SHIFT, map_size, vma->vm_page_prot))
			return -EAGAIN;

		page += map_size;
	}

	if (!map_size)
		return -EINVAL;

	vma->vm_flags |= VM_IO;
	return 0;
}
#endif /* CONFIG_SPARC */

static int igafb_setcolreg(unsigned regno, unsigned red, unsigned green,
                           unsigned blue, unsigned transp,
                           struct fb_info *info)
{
        /*
         *  Set a single color register. The values supplied are
         *  already rounded down to the hardware's capabilities
         *  (according to the entries in the `var' structure). Return
         *  != 0 for invalid regno.
         */
	struct iga_par *par = (struct iga_par *)info->par;

        if (regno >= info->cmap.len)
                return 1;

	pci_outb(par, regno, DAC_W_INDEX);
	pci_outb(par, red,   DAC_DATA);
	pci_outb(par, green, DAC_DATA);
	pci_outb(par, blue,  DAC_DATA);

	if (regno < 16) {
		switch (info->var.bits_per_pixel) {
		case 16:
			((u16*)(info->pseudo_palette))[regno] = 
				(regno << 10) | (regno << 5) | regno;
			break;
		case 24:
			((u32*)(info->pseudo_palette))[regno] = 
				(regno << 16) | (regno << 8) | regno;
		break;
		case 32:
			{ int i;
			i = (regno << 8) | regno;
			((u32*)(info->pseudo_palette))[regno] = (i << 16) | i;
			}
			break;
		}
	}
	return 0;
}

/*
 * Framebuffer option structure
 */
static struct fb_ops igafb_ops = {
	.owner 		= THIS_MODULE,
	.fb_setcolreg 	= igafb_setcolreg,
	.fb_fillrect	= cfb_fillrect,
	.fb_copyarea	= cfb_copyarea,
	.fb_imageblit	= cfb_imageblit,
#ifdef CONFIG_SPARC
	.fb_mmap 	= igafb_mmap,
#endif
};

static int __init iga_init(struct fb_info *info, struct iga_par *par)
{
        char vramsz = iga_inb(par, IGA_EXT_CNTRL, IGA_IDX_EXT_BUS_CNTL) 
		                                         & MEM_SIZE_ALIAS;
	int video_cmap_len;

        switch (vramsz) {
        case MEM_SIZE_1M:
                info->fix.smem_len = 0x100000;
                break;
        case MEM_SIZE_2M:
                info->fix.smem_len = 0x200000;
                break;
        case MEM_SIZE_4M:
        case MEM_SIZE_RESERVED:
                info->fix.smem_len = 0x400000;
                break;
        }

        if (info->var.bits_per_pixel > 8) 
                video_cmap_len = 16;
        else 
                video_cmap_len = 256;

	info->fbops = &igafb_ops;
	info->flags = FBINFO_DEFAULT;

	fb_alloc_cmap(&info->cmap, video_cmap_len, 0);

	if (register_framebuffer(info) < 0)
		return 0;

	fb_info(info, "%s frame buffer device at 0x%08lx [%dMB VRAM]\n",
		info->fix.id, par->frame_buffer_phys, info->fix.smem_len >> 20);

	iga_blank_border(par); 
	return 1;
}

static int __init igafb_init(void)
{
        struct fb_info *info;
        struct pci_dev *pdev;
        struct iga_par *par;
	unsigned long addr;
	int size, iga2000 = 0;

	if (fb_get_options("igafb", NULL))
		return -ENODEV;

        pdev = pci_get_device(PCI_VENDOR_ID_INTERG,
                               PCI_DEVICE_ID_INTERG_1682, 0);
	if (pdev == NULL) {
		/*
		 * XXX We tried to use cyber2000fb.c for IGS 2000.
		 * But it does not initialize the chip in JavaStation-E, alas.
		 */
        	pdev = pci_get_device(PCI_VENDOR_ID_INTERG, 0x2000, 0);
        	if(pdev == NULL) {
        	        return -ENXIO;
		}
		iga2000 = 1;
	}
	/* We leak a reference here but as it cannot be unloaded this is
	   fine. If you write unload code remember to free it in unload */
	
	size = sizeof(struct iga_par) + sizeof(u32)*16;

	info = framebuffer_alloc(size, &pdev->dev);
        if (!info) {
                printk("igafb_init: can't alloc fb_info\n");
		 pci_dev_put(pdev);
                return -ENOMEM;
        }

	par = info->par;

	if ((addr = pdev->resource[0].start) == 0) {
                printk("igafb_init: no memory start\n");
		kfree(info);
		pci_dev_put(pdev);
		return -ENXIO;
	}

	if ((info->screen_base = ioremap(addr, 1024*1024*2)) == 0) {
                printk("igafb_init: can't remap %lx[2M]\n", addr);
		kfree(info);
		pci_dev_put(pdev);
		return -ENXIO;
	}

	par->frame_buffer_phys = addr & PCI_BASE_ADDRESS_MEM_MASK;

#ifdef CONFIG_SPARC
	/*
	 * The following is sparc specific and this is why:
	 *
	 * IGS2000 has its I/O memory mapped and we want
	 * to generate memory cycles on PCI, e.g. do ioremap(),
	 * then readb/writeb() as in Documentation/io-mapping.txt.
	 *
	 * IGS1682 is more traditional, it responds to PCI I/O
	 * cycles, so we want to access it with inb()/outb().
	 *
	 * On sparc, PCIC converts CPU memory access within
	 * phys window 0x3000xxxx into PCI I/O cycles. Therefore
	 * we may use readb/writeb to access them with IGS1682.
	 *
	 * We do not take io_base_phys from resource[n].start
	 * on IGS1682 because that chip is BROKEN. It does not
	 * have a base register for I/O. We just "know" what its
	 * I/O addresses are.
	 */
	if (iga2000) {
		igafb_fix.mmio_start = par->frame_buffer_phys | 0x00800000;
	} else {
		igafb_fix.mmio_start = 0x30000000;	/* XXX */
	}
	if ((par->io_base = (int) ioremap(igafb_fix.mmio_start, igafb_fix.smem_len)) == 0) {
                printk("igafb_init: can't remap %lx[4K]\n", igafb_fix.mmio_start);
		iounmap((void *)info->screen_base);
		kfree(info);
		pci_dev_put(pdev);
		return -ENXIO;
	}

	/*
	 * Figure mmap addresses from PCI config space.
	 * We need two regions: for video memory and for I/O ports.
	 * Later one can add region for video coprocessor registers.
	 * However, mmap routine loops until size != 0, so we put
	 * one additional region with size == 0. 
	 */

	par->mmap_map = kzalloc(4 * sizeof(*par->mmap_map), GFP_ATOMIC);
	if (!par->mmap_map) {
		printk("igafb_init: can't alloc mmap_map\n");
		iounmap((void *)par->io_base);
		iounmap(info->screen_base);
		kfree(info);
		pci_dev_put(pdev);
		return -ENOMEM;
	}

	/*
	 * Set default vmode and cmode from PROM properties.
	 */
	{
		struct device_node *dp = pci_device_to_OF_node(pdev);
                int node = dp->node;
                int width = prom_getintdefault(node, "width", 1024);
                int height = prom_getintdefault(node, "height", 768);
                int depth = prom_getintdefault(node, "depth", 8);
                switch (width) {
                    case 1024:
                        if (height == 768)
                            default_var = default_var_1024x768;
                        break;
                    case 1152:
                        if (height == 900)
                            default_var = default_var_1152x900;
                        break;
                    case 1280:
                        if (height == 1024)
                            default_var = default_var_1280x1024;
                        break;
                    default:
                        break;
                }

                switch (depth) {
                    case 8:
                        default_var.bits_per_pixel = 8;
                        break;
                    case 16:
                        default_var.bits_per_pixel = 16;
                        break;
                    case 24:
                        default_var.bits_per_pixel = 24;
                        break;
                    case 32:
                        default_var.bits_per_pixel = 32;
                        break;
                    default:
                        break;
                }
            }

#endif
	igafb_fix.smem_start = (unsigned long) info->screen_base;
	igafb_fix.line_length = default_var.xres*(default_var.bits_per_pixel/8);
	igafb_fix.visual = default_var.bits_per_pixel <= 8 ? FB_VISUAL_PSEUDOCOLOR : FB_VISUAL_DIRECTCOLOR;

	info->var = default_var;
	info->fix = igafb_fix;
	info->pseudo_palette = (void *)(par + 1);

	if (!iga_init(info, par)) {
		iounmap((void *)par->io_base);
		iounmap(info->screen_base);
		kfree(par->mmap_map);
		kfree(info);
		return -ENODEV;
        }

#ifdef CONFIG_SPARC
	    /*
	     * Add /dev/fb mmap values.
	     */
	    
	    /* First region is for video memory */
	    par->mmap_map[0].voff = 0x0;  
	    par->mmap_map[0].poff = par->frame_buffer_phys & PAGE_MASK;
	    par->mmap_map[0].size = info->fix.smem_len & PAGE_MASK;
	    par->mmap_map[0].prot_mask = SRMMU_CACHE;
	    par->mmap_map[0].prot_flag = SRMMU_WRITE;

	    /* Second region is for I/O ports */
	    par->mmap_map[1].voff = par->frame_buffer_phys & PAGE_MASK;
	    par->mmap_map[1].poff = info->fix.smem_start & PAGE_MASK;
	    par->mmap_map[1].size = PAGE_SIZE * 2; /* X wants 2 pages */
	    par->mmap_map[1].prot_mask = SRMMU_CACHE;
	    par->mmap_map[1].prot_flag = SRMMU_WRITE;
#endif /* CONFIG_SPARC */

	return 0;
}

static int __init igafb_setup(char *options)
{
    char *this_opt;

    if (!options || !*options)
        return 0;

    while ((this_opt = strsep(&options, ",")) != NULL) {
    }
    return 0;
}

module_init(igafb_init);
MODULE_LICENSE("GPL");
static struct pci_device_id igafb_pci_tbl[] = {
	{ PCI_VENDOR_ID_INTERG, PCI_DEVICE_ID_INTERG_1682,
	  PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
	{ }
};

MODULE_DEVICE_TABLE(pci, igafb_pci_tbl);
Commit	Line	Data
1da177e4 LT	1	/*
	2	* linux/drivers/video/igafb.c -- Frame buffer device for IGA 1682
	3	*
	4	* Copyright (C) 1998 Vladimir Roganov and Gleb Raiko
	5	*
	6	* This driver is partly based on the Frame buffer device for ATI Mach64
	7	* and partially on VESA-related code.
	8	*
	9	* Copyright (C) 1997-1998 Geert Uytterhoeven
	10	* Copyright (C) 1998 Bernd Harries
	11	* Copyright (C) 1998 Eddie C. Dost (ecd@skynet.be)
	12	*
	13	* This file is subject to the terms and conditions of the GNU General Public
	14	* License. See the file COPYING in the main directory of this archive for
	15	* more details.
	16	*/
	17
	18	/******************************************************************************
	19
	20	TODO:
	21	Despite of IGA Card has advanced graphic acceleration,
	22	initial version is almost dummy and does not support it.
	23	Support for video modes and acceleration must be added
	24	together with accelerated X-Windows driver implementation.
	25
	26	Most important thing at this moment is that we have working
	27	JavaEngine1 console & X with new console interface.
	28
	29	******************************************************************************/
	30
	31	#include <linux/module.h>
	32	#include <linux/kernel.h>
	33	#include <linux/errno.h>
	34	#include <linux/string.h>
	35	#include <linux/mm.h>
1da177e4 LT	36	#include <linux/slab.h>
	37	#include <linux/vmalloc.h>
	38	#include <linux/delay.h>
	39	#include <linux/interrupt.h>
	40	#include <linux/fb.h>
	41	#include <linux/init.h>
	42	#include <linux/pci.h>
	43	#include <linux/nvram.h>
	44
	45	#include <asm/io.h>
	46
9b1caafe DM	47	#ifdef CONFIG_SPARC
9b1caafe DM	48	#include <asm/prom.h>
1da177e4 LT	49	#include <asm/pcic.h>
	50	#endif
	51
	52	#include <video/iga.h>
	53
	54	struct pci_mmap_map {
	55	unsigned long voff;
	56	unsigned long poff;
	57	unsigned long size;
	58	unsigned long prot_flag;
	59	unsigned long prot_mask;
	60	};
	61
	62	struct iga_par {
	63	struct pci_mmap_map *mmap_map;
	64	unsigned long frame_buffer_phys;
	65	unsigned long io_base;
	66	};
	67
	68	struct fb_info fb_info;
	69
	70	struct fb_fix_screeninfo igafb_fix __initdata = {
	71	.id = "IGA 1682",
	72	.type = FB_TYPE_PACKED_PIXELS,
	73	.mmio_len = 1000
	74	};
	75
	76	struct fb_var_screeninfo default_var = {
	77	/* 640x480, 60 Hz, Non-Interlaced (25.175 MHz dotclock) */
	78	.xres = 640,
	79	.yres = 480,
	80	.xres_virtual = 640,
	81	.yres_virtual = 480,
	82	.bits_per_pixel = 8,
	83	.red = {0, 8, 0 },
	84	.green = {0, 8, 0 },
	85	.blue = {0, 8, 0 },
	86	.height = -1,
	87	.width = -1,
	88	.accel_flags = FB_ACCEL_NONE,
	89	.pixclock = 39722,
	90	.left_margin = 48,
	91	.right_margin = 16,
	92	.upper_margin = 33,
	93	.lower_margin = 10,
	94	.hsync_len = 96,
	95	.vsync_len = 2,
	96	.vmode = FB_VMODE_NONINTERLACED
	97	};
	98
9b1caafe	99	#ifdef CONFIG_SPARC
1da177e4 LT	100	struct fb_var_screeninfo default_var_1024x768 __initdata = {
	101	/* 1024x768, 75 Hz, Non-Interlaced (78.75 MHz dotclock) */
	102	.xres = 1024,
	103	.yres = 768,
	104	.xres_virtual = 1024,
	105	.yres_virtual = 768,
	106	.bits_per_pixel = 8,
	107	.red = {0, 8, 0 },
	108	.green = {0, 8, 0 },
	109	.blue = {0, 8, 0 },
	110	.height = -1,
	111	.width = -1,
	112	.accel_flags = FB_ACCEL_NONE,
	113	.pixclock = 12699,
	114	.left_margin = 176,
	115	.right_margin = 16,
	116	.upper_margin = 28,
	117	.lower_margin = 1,
	118	.hsync_len = 96,
	119	.vsync_len = 3,
	120	.vmode = FB_SYNC_HOR_HIGH_ACT\|FB_SYNC_VERT_HIGH_ACT, FB_VMODE_NONINTERLACED
	121	};
	122
	123	struct fb_var_screeninfo default_var_1152x900 __initdata = {
	124	/* 1152x900, 76 Hz, Non-Interlaced (110.0 MHz dotclock) */
	125	.xres = 1152,
	126	.yres = 900,
	127	.xres_virtual = 1152,
	128	.yres_virtual = 900,
	129	.bits_per_pixel = 8,
	130	.red = { 0, 8, 0 },
	131	.green = { 0, 8, 0 },
	132	.blue = { 0, 8, 0 },
	133	.height = -1,
	134	.width = -1,
	135	.accel_flags = FB_ACCEL_NONE,
	136	.pixclock = 9091,
	137	.left_margin = 234,
	138	.right_margin = 24,
	139	.upper_margin = 34,
	140	.lower_margin = 3,
	141	.hsync_len = 100,
	142	.vsync_len = 3,
	143	.vmode = FB_SYNC_HOR_HIGH_ACT\|FB_SYNC_VERT_HIGH_ACT, FB_VMODE_NONINTERLACED
	144	};
	145
	146	struct fb_var_screeninfo default_var_1280x1024 __initdata = {
	147	/* 1280x1024, 75 Hz, Non-Interlaced (135.00 MHz dotclock) */
	148	.xres = 1280,
	149	.yres = 1024,
	150	.xres_virtual = 1280,
	151	.yres_virtual = 1024,
	152	.bits_per_pixel = 8,
	153	.red = {0, 8, 0 },
	154	.green = {0, 8, 0 },
	155	.blue = {0, 8, 0 },
	156	.height = -1,
	157	.width = -1,
	158	.accel_flags = 0,
	159	.pixclock = 7408,
	160	.left_margin = 248,
	161	.right_margin = 16,
	162	.upper_margin = 38,
	163	.lower_margin = 1,
164	.hsync_len = 144,
165	.vsync_len = 3,
166	.vmode = FB_SYNC_HOR_HIGH_ACT\|FB_SYNC_VERT_HIGH_ACT, FB_VMODE_NONINTERLACED
167	};
168
169	/*
170	* Memory-mapped I/O functions for Sparc PCI
171	*
172	* On sparc we happen to access I/O with memory mapped functions too.
173	*/
174	#define pci_inb(par, reg) readb(par->io_base+(reg))
175	#define pci_outb(par, val, reg) writeb(val, par->io_base+(reg))
176
177	static inline unsigned int iga_inb(struct iga_par *par, unsigned int reg,
178	unsigned int idx)
179	{
180	pci_outb(par, idx, reg);
181	return pci_inb(par, reg + 1);
182	}
183
184	static inline void iga_outb(struct iga_par *par, unsigned char val,
185	unsigned int reg, unsigned int idx )
186	{
187	pci_outb(par, idx, reg);
188	pci_outb(par, val, reg+1);
189	}
190
9b1caafe	191	#endif /* CONFIG_SPARC */
1da177e4 LT	192
	193	/*
	194	* Very important functionality for the JavaEngine1 computer:
	195	* make screen border black (usign special IGA registers)
	196	*/
	197	static void iga_blank_border(struct iga_par *par)
	198	{
	199	int i;
	200	#if 0
	201	/*
	202	* PROM does this for us, so keep this code as a reminder
	203	* about required read from 0x3DA and writing of 0x20 in the end.
	204	*/
	205	(void) pci_inb(par, 0x3DA); /* required for every access */
	206	pci_outb(par, IGA_IDX_VGA_OVERSCAN, IGA_ATTR_CTL);
	207	(void) pci_inb(par, IGA_ATTR_CTL+1);
	208	pci_outb(par, 0x38, IGA_ATTR_CTL);
	209	pci_outb(par, 0x20, IGA_ATTR_CTL); /* re-enable visual */
	210	#endif
	211	/*
	212	* This does not work as it was designed because the overscan
	213	* color is looked up in the palette. Therefore, under X11
	214	* overscan changes color.
	215	*/
	216	for (i=0; i < 3; i++)
	217	iga_outb(par, 0, IGA_EXT_CNTRL, IGA_IDX_OVERSCAN_COLOR + i);
	218	}
	219
9b1caafe	220	#ifdef CONFIG_SPARC
216d526c	221	static int igafb_mmap(struct fb_info *info,
1da177e4 LT	222	struct vm_area_struct *vma)
	223	{
	224	struct iga_par par = (struct iga_par )info->par;
	225	unsigned int size, page, map_size = 0;
	226	unsigned long map_offset = 0;
	227	int i;
	228
	229	if (!par->mmap_map)
	230	return -ENXIO;
	231
	232	size = vma->vm_end - vma->vm_start;
	233
1da177e4 LT	234	/* Each page, see which map applies */
	235	for (page = 0; page < size; ) {
	236	map_size = 0;
	237	for (i = 0; par->mmap_map[i].size; i++) {
	238	unsigned long start = par->mmap_map[i].voff;
	239	unsigned long end = start + par->mmap_map[i].size;
	240	unsigned long offset = (vma->vm_pgoff << PAGE_SHIFT) + page;
	241
	242	if (start > offset)
	243	continue;
	244	if (offset >= end)
	245	continue;
	246
	247	map_size = par->mmap_map[i].size - (offset - start);
	248	map_offset = par->mmap_map[i].poff + (offset - start);
	249	break;
	250	}
	251	if (!map_size) {
	252	page += PAGE_SIZE;
	253	continue;
	254	}
	255	if (page + map_size > size)
	256	map_size = size - page;
	257
	258	pgprot_val(vma->vm_page_prot) &= ~(par->mmap_map[i].prot_mask);
	259	pgprot_val(vma->vm_page_prot) \|= par->mmap_map[i].prot_flag;
	260
	261	if (remap_pfn_range(vma, vma->vm_start + page,
	262	map_offset >> PAGE_SHIFT, map_size, vma->vm_page_prot))
	263	return -EAGAIN;
	264
	265	page += map_size;
	266	}
	267
	268	if (!map_size)
	269	return -EINVAL;
	270
	271	vma->vm_flags \|= VM_IO;
	272	return 0;
	273	}
9b1caafe	274	#endif /* CONFIG_SPARC */
1da177e4 LT	275
	276	static int igafb_setcolreg(unsigned regno, unsigned red, unsigned green,
	277	unsigned blue, unsigned transp,
	278	struct fb_info *info)
	279	{
	280	/*
	281	* Set a single color register. The values supplied are
	282	* already rounded down to the hardware's capabilities
	283	* (according to the entries in the `var' structure). Return
	284	* != 0 for invalid regno.
	285	*/
	286	struct iga_par par = (struct iga_par )info->par;
	287
	288	if (regno >= info->cmap.len)
	289	return 1;
	290
	291	pci_outb(par, regno, DAC_W_INDEX);
	292	pci_outb(par, red, DAC_DATA);
	293	pci_outb(par, green, DAC_DATA);
	294	pci_outb(par, blue, DAC_DATA);
	295
	296	if (regno < 16) {
	297	switch (info->var.bits_per_pixel) {
	298	case 16:
	299	((u16*)(info->pseudo_palette))[regno] =
	300	(regno << 10) \| (regno << 5) \| regno;
	301	break;
	302	case 24:
	303	((u32*)(info->pseudo_palette))[regno] =
	304	(regno << 16) \| (regno << 8) \| regno;
	305	break;
	306	case 32:
	307	{ int i;
	308	i = (regno << 8) \| regno;
	309	((u32*)(info->pseudo_palette))[regno] = (i << 16) \| i;
	310	}
	311	break;
	312	}
	313	}
	314	return 0;
	315	}
	316
	317	/*
	318	* Framebuffer option structure
	319	*/
	320	static struct fb_ops igafb_ops = {
	321	.owner = THIS_MODULE,
	322	.fb_setcolreg = igafb_setcolreg,
	323	.fb_fillrect = cfb_fillrect,
	324	.fb_copyarea = cfb_copyarea,
	325	.fb_imageblit = cfb_imageblit,
9b1caafe	326	#ifdef CONFIG_SPARC
1da177e4 LT	327	.fb_mmap = igafb_mmap,
	328	#endif
	329	};
	330
	331	static int __init iga_init(struct fb_info info, struct iga_par par)
	332	{
	333	char vramsz = iga_inb(par, IGA_EXT_CNTRL, IGA_IDX_EXT_BUS_CNTL)
	334	& MEM_SIZE_ALIAS;
	335	int video_cmap_len;
	336
	337	switch (vramsz) {
	338	case MEM_SIZE_1M:
	339	info->fix.smem_len = 0x100000;
	340	break;
	341	case MEM_SIZE_2M:
	342	info->fix.smem_len = 0x200000;
	343	break;
	344	case MEM_SIZE_4M:
	345	case MEM_SIZE_RESERVED:
	346	info->fix.smem_len = 0x400000;
	347	break;
	348	}
	349
	350	if (info->var.bits_per_pixel > 8)
	351	video_cmap_len = 16;
	352	else
	353	video_cmap_len = 256;
	354
	355	info->fbops = &igafb_ops;
	356	info->flags = FBINFO_DEFAULT;
	357
	358	fb_alloc_cmap(&info->cmap, video_cmap_len, 0);
	359
	360	if (register_framebuffer(info) < 0)
	361	return 0;
	362
31b6780c JP	363	fb_info(info, "%s frame buffer device at 0x%08lx [%dMB VRAM]\n",
31b6780c JP	364	info->fix.id, par->frame_buffer_phys, info->fix.smem_len >> 20);
1da177e4 LT	365
	366	iga_blank_border(par);
	367	return 1;
	368	}
	369
628a464e	370	static int __init igafb_init(void)
1da177e4	371	{
1da177e4 LT	372	struct fb_info *info;
	373	struct pci_dev *pdev;
	374	struct iga_par *par;
	375	unsigned long addr;
	376	int size, iga2000 = 0;
	377
	378	if (fb_get_options("igafb", NULL))
	379	return -ENODEV;
	380
af342e93	381	pdev = pci_get_device(PCI_VENDOR_ID_INTERG,
1da177e4 LT	382	PCI_DEVICE_ID_INTERG_1682, 0);
	383	if (pdev == NULL) {
	384	/*
	385	* XXX We tried to use cyber2000fb.c for IGS 2000.
	386	* But it does not initialize the chip in JavaStation-E, alas.
	387	*/
af342e93	388	pdev = pci_get_device(PCI_VENDOR_ID_INTERG, 0x2000, 0);
1da177e4 LT	389	if(pdev == NULL) {
	390	return -ENXIO;
	391	}
	392	iga2000 = 1;
	393	}
af342e93 AC	394	/* We leak a reference here but as it cannot be unloaded this is
af342e93 AC	395	fine. If you write unload code remember to free it in unload */
1da177e4	396
100b4a6e	397	size = sizeof(struct iga_par) + sizeof(u32)*16;
1da177e4	398
100b4a6e	399	info = framebuffer_alloc(size, &pdev->dev);
1da177e4 LT	400	if (!info) {
1da177e4 LT	401	printk("igafb_init: can't alloc fb_info\n");
625fcaf9	402	pci_dev_put(pdev);
1da177e4 LT	403	return -ENOMEM;
1da177e4 LT	404	}
1da177e4	405
100b4a6e	406	par = info->par;
1da177e4 LT	407
	408	if ((addr = pdev->resource[0].start) == 0) {
	409	printk("igafb_init: no memory start\n");
	410	kfree(info);
625fcaf9	411	pci_dev_put(pdev);
1da177e4 LT	412	return -ENXIO;
	413	}
	414
	415	if ((info->screen_base = ioremap(addr, 102410242)) == 0) {
	416	printk("igafb_init: can't remap %lx[2M]\n", addr);
	417	kfree(info);
625fcaf9	418	pci_dev_put(pdev);
1da177e4 LT	419	return -ENXIO;
	420	}
	421
	422	par->frame_buffer_phys = addr & PCI_BASE_ADDRESS_MEM_MASK;
	423
9b1caafe	424	#ifdef CONFIG_SPARC
1da177e4 LT	425	/*
	426	* The following is sparc specific and this is why:
	427	*
	428	* IGS2000 has its I/O memory mapped and we want
	429	* to generate memory cycles on PCI, e.g. do ioremap(),
395cf969	430	* then readb/writeb() as in Documentation/io-mapping.txt.
1da177e4 LT	431	*
	432	* IGS1682 is more traditional, it responds to PCI I/O
	433	* cycles, so we want to access it with inb()/outb().
	434	*
	435	* On sparc, PCIC converts CPU memory access within
	436	* phys window 0x3000xxxx into PCI I/O cycles. Therefore
	437	* we may use readb/writeb to access them with IGS1682.
	438	*
	439	* We do not take io_base_phys from resource[n].start
	440	* on IGS1682 because that chip is BROKEN. It does not
	441	* have a base register for I/O. We just "know" what its
	442	* I/O addresses are.
	443	*/
	444	if (iga2000) {
	445	igafb_fix.mmio_start = par->frame_buffer_phys \| 0x00800000;
	446	} else {
	447	igafb_fix.mmio_start = 0x30000000; /* XXX */
	448	}
	449	if ((par->io_base = (int) ioremap(igafb_fix.mmio_start, igafb_fix.smem_len)) == 0) {
	450	printk("igafb_init: can't remap %lx[4K]\n", igafb_fix.mmio_start);
	451	iounmap((void *)info->screen_base);
	452	kfree(info);
625fcaf9	453	pci_dev_put(pdev);
1da177e4 LT	454	return -ENXIO;
	455	}
	456
	457	/*
	458	* Figure mmap addresses from PCI config space.
	459	* We need two regions: for video memory and for I/O ports.
	460	* Later one can add region for video coprocessor registers.
	461	* However, mmap routine loops until size != 0, so we put
	462	* one additional region with size == 0.
	463	*/
	464
f5610b9c	465	par->mmap_map = kzalloc(4 * sizeof(*par->mmap_map), GFP_ATOMIC);
1da177e4 LT	466	if (!par->mmap_map) {
	467	printk("igafb_init: can't alloc mmap_map\n");
	468	iounmap((void *)par->io_base);
	469	iounmap(info->screen_base);
	470	kfree(info);
625fcaf9	471	pci_dev_put(pdev);
1da177e4 LT	472	return -ENOMEM;
	473	}
	474
1da177e4 LT	475	/*
	476	* Set default vmode and cmode from PROM properties.
	477	*/
	478	{
9b1caafe DM	479	struct device_node *dp = pci_device_to_OF_node(pdev);
9b1caafe DM	480	int node = dp->node;
1da177e4 LT	481	int width = prom_getintdefault(node, "width", 1024);
	482	int height = prom_getintdefault(node, "height", 768);
	483	int depth = prom_getintdefault(node, "depth", 8);
	484	switch (width) {
	485	case 1024:
	486	if (height == 768)
	487	default_var = default_var_1024x768;
	488	break;
	489	case 1152:
	490	if (height == 900)
	491	default_var = default_var_1152x900;
	492	break;
	493	case 1280:
	494	if (height == 1024)
	495	default_var = default_var_1280x1024;
	496	break;
	497	default:
	498	break;
	499	}
	500
	501	switch (depth) {
	502	case 8:
	503	default_var.bits_per_pixel = 8;
	504	break;
	505	case 16:
	506	default_var.bits_per_pixel = 16;
	507	break;
	508	case 24:
	509	default_var.bits_per_pixel = 24;
	510	break;
	511	case 32:
	512	default_var.bits_per_pixel = 32;
	513	break;
	514	default:
	515	break;
	516	}
	517	}
	518
	519	#endif
	520	igafb_fix.smem_start = (unsigned long) info->screen_base;
	521	igafb_fix.line_length = default_var.xres*(default_var.bits_per_pixel/8);
	522	igafb_fix.visual = default_var.bits_per_pixel <= 8 ? FB_VISUAL_PSEUDOCOLOR : FB_VISUAL_DIRECTCOLOR;
	523
	524	info->var = default_var;
	525	info->fix = igafb_fix;
	526	info->pseudo_palette = (void *)(par + 1);
1da177e4 LT	527
	528	if (!iga_init(info, par)) {
	529	iounmap((void *)par->io_base);
	530	iounmap(info->screen_base);
	531	kfree(par->mmap_map);
	532	kfree(info);
527dcf4c	533	return -ENODEV;
1da177e4 LT	534	}
1da177e4 LT	535
9b1caafe	536	#ifdef CONFIG_SPARC
1da177e4 LT	537	/*
	538	* Add /dev/fb mmap values.
	539	*/
	540
	541	/* First region is for video memory */
	542	par->mmap_map[0].voff = 0x0;
	543	par->mmap_map[0].poff = par->frame_buffer_phys & PAGE_MASK;
	544	par->mmap_map[0].size = info->fix.smem_len & PAGE_MASK;
	545	par->mmap_map[0].prot_mask = SRMMU_CACHE;
	546	par->mmap_map[0].prot_flag = SRMMU_WRITE;
	547
	548	/* Second region is for I/O ports */
	549	par->mmap_map[1].voff = par->frame_buffer_phys & PAGE_MASK;
	550	par->mmap_map[1].poff = info->fix.smem_start & PAGE_MASK;
	551	par->mmap_map[1].size = PAGE_SIZE * 2; /* X wants 2 pages */
	552	par->mmap_map[1].prot_mask = SRMMU_CACHE;
	553	par->mmap_map[1].prot_flag = SRMMU_WRITE;
9b1caafe	554	#endif /* CONFIG_SPARC */
1da177e4 LT	555
	556	return 0;
	557	}
	558
628a464e	559	static int __init igafb_setup(char *options)
1da177e4 LT	560	{
	561	char *this_opt;
	562
	563	if (!options \|\| !*options)
	564	return 0;
	565
	566	while ((this_opt = strsep(&options, ",")) != NULL) {
	567	}
	568	return 0;
	569	}
	570
	571	module_init(igafb_init);
	572	MODULE_LICENSE("GPL");
48c68c4f	573	static struct pci_device_id igafb_pci_tbl[] = {
b023429c BC	574	{ PCI_VENDOR_ID_INTERG, PCI_DEVICE_ID_INTERG_1682,
	575	PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
	576	{ }
	577	};
	578
	579	MODULE_DEVICE_TABLE(pci, igafb_pci_tbl);