[deliverable/linux.git] / drivers / video / intelfb / intelfb.h

#ifndef _INTELFB_H
#define _INTELFB_H

/* $DHD: intelfb/intelfb.h,v 1.40 2003/06/27 15:06:25 dawes Exp $ */

#include <linux/agp_backend.h>
#include <linux/fb.h>


/*** Version/name ***/
#define INTELFB_VERSION			"0.9.2"
#define INTELFB_MODULE_NAME		"intelfb"
#define SUPPORTED_CHIPSETS		"830M/845G/852GM/855GM/865G/915G"


/*** Debug/feature defines ***/

#ifndef DEBUG
#define DEBUG				0
#endif

#ifndef VERBOSE
#define VERBOSE				0
#endif

#ifndef REGDUMP
#define REGDUMP				0
#endif

#ifndef DETECT_VGA_CLASS_ONLY
#define DETECT_VGA_CLASS_ONLY		1
#endif

#ifndef ALLOCATE_FOR_PANNING
#define ALLOCATE_FOR_PANNING		1
#endif

#ifndef PREFERRED_MODE
#define PREFERRED_MODE			"1024x768-32@70"
#endif

/*** hw-related values ***/

/* PCI ids for supported devices */
#define PCI_DEVICE_ID_INTEL_830M	0x3577
#define PCI_DEVICE_ID_INTEL_845G	0x2562
#define PCI_DEVICE_ID_INTEL_85XGM	0x3582
#define PCI_DEVICE_ID_INTEL_865G	0x2572
#define PCI_DEVICE_ID_INTEL_915G	0x2582

/* Size of MMIO region */
#define INTEL_REG_SIZE			0x80000

#define STRIDE_ALIGNMENT		16

#define PALETTE_8_ENTRIES		256


/*** Macros ***/

/* basic arithmetic */
#define KB(x)			((x) * 1024)
#define MB(x)			((x) * 1024 * 1024)
#define BtoKB(x)		((x) / 1024)
#define BtoMB(x)		((x) / 1024 / 1024)

#define GTT_PAGE_SIZE           KB(4)

#define ROUND_UP_TO(x, y)	(((x) + (y) - 1) / (y) * (y))
#define ROUND_DOWN_TO(x, y)	((x) / (y) * (y))
#define ROUND_UP_TO_PAGE(x)	ROUND_UP_TO((x), GTT_PAGE_SIZE)
#define ROUND_DOWN_TO_PAGE(x)	ROUND_DOWN_TO((x), GTT_PAGE_SIZE)

/* messages */
#define PFX			INTELFB_MODULE_NAME ": "

#define ERR_MSG(fmt, args...)	printk(KERN_ERR PFX fmt, ## args)
#define WRN_MSG(fmt, args...)	printk(KERN_WARNING PFX fmt, ## args)
#define NOT_MSG(fmt, args...)	printk(KERN_NOTICE PFX fmt, ## args)
#define INF_MSG(fmt, args...)	printk(KERN_INFO PFX fmt, ## args)
#if DEBUG
#define DBG_MSG(fmt, args...)	printk(KERN_DEBUG PFX fmt, ## args)
#else
#define DBG_MSG(fmt, args...)	while (0) printk(fmt, ## args)
#endif

/* get commonly used pointers */
#define GET_DINFO(info)		(info)->par

/* misc macros */
#define ACCEL(d, i)                                                     \
	((d)->accel && !(d)->ring_lockup &&                             \
	 ((i)->var.accel_flags & FB_ACCELF_TEXT))

/*#define NOACCEL_CHIPSET(d)						\
	((d)->chipset != INTEL_865G)*/
#define NOACCEL_CHIPSET(d)						\
	(0)

#define FIXED_MODE(d) ((d)->fixed_mode)

/*** Driver paramters ***/

#define RINGBUFFER_SIZE		KB(64)
#define HW_CURSOR_SIZE		KB(4)

/* Intel agpgart driver */
#define AGP_PHYSICAL_MEMORY     2

/*** Data Types ***/

/* supported chipsets */
enum intel_chips {
	INTEL_830M,
	INTEL_845G,
	INTEL_85XGM,
	INTEL_852GM,
	INTEL_852GME,
	INTEL_855GM,
	INTEL_855GME,
	INTEL_865G,
	INTEL_915G
};

struct intelfb_hwstate {
	u32 vga0_divisor;
	u32 vga1_divisor;
	u32 vga_pd;
	u32 dpll_a;
	u32 dpll_b;
	u32 fpa0;
	u32 fpa1;
	u32 fpb0;
	u32 fpb1;
	u32 palette_a[PALETTE_8_ENTRIES];
	u32 palette_b[PALETTE_8_ENTRIES];
	u32 htotal_a;
	u32 hblank_a;
	u32 hsync_a;
	u32 vtotal_a;
	u32 vblank_a;
	u32 vsync_a;
	u32 src_size_a;
	u32 bclrpat_a;
	u32 htotal_b;
	u32 hblank_b;
	u32 hsync_b;
	u32 vtotal_b;
	u32 vblank_b;
	u32 vsync_b;
	u32 src_size_b;
	u32 bclrpat_b;
	u32 adpa;
	u32 dvoa;
	u32 dvob;
	u32 dvoc;
	u32 dvoa_srcdim;
	u32 dvob_srcdim;
	u32 dvoc_srcdim;
	u32 lvds;
	u32 pipe_a_conf;
	u32 pipe_b_conf;
	u32 disp_arb;
	u32 cursor_a_control;
	u32 cursor_b_control;
	u32 cursor_a_base;
	u32 cursor_b_base;
	u32 cursor_size;
	u32 disp_a_ctrl;
	u32 disp_b_ctrl;
	u32 disp_a_base;
	u32 disp_b_base;
	u32 cursor_a_palette[4];
	u32 cursor_b_palette[4];
	u32 disp_a_stride;
	u32 disp_b_stride;
	u32 vgacntrl;
	u32 add_id;
	u32 swf0x[7];
	u32 swf1x[7];
	u32 swf3x[3];
	u32 fence[8];
	u32 instpm;
	u32 mem_mode;
	u32 fw_blc_0;
	u32 fw_blc_1;
};

struct intelfb_heap_data {
	u32 physical;
	u8 __iomem *virtual;
	u32 offset;  // in GATT pages
	u32 size;    // in bytes
};

struct intelfb_info {
	struct fb_info *info;
	struct fb_ops  *fbops;
	struct pci_dev *pdev;

	struct intelfb_hwstate save_state;

	/* agpgart structs */
	struct agp_memory *gtt_fb_mem;     // use all stolen memory or vram
	struct agp_memory *gtt_ring_mem;   // ring buffer
	struct agp_memory *gtt_cursor_mem; // hw cursor

	/* use a gart reserved fb mem */
	u8 fbmem_gart;

	/* mtrr support */
	u32 mtrr_reg;
	u32 has_mtrr;

	/* heap data */
	struct intelfb_heap_data aperture;
	struct intelfb_heap_data fb;
	struct intelfb_heap_data ring;
	struct intelfb_heap_data cursor;

	/* mmio regs */
	u32 mmio_base_phys;
	u8 __iomem *mmio_base;

	/* fb start offset (in bytes) */
	u32 fb_start;

	/* ring buffer */
	u8 __iomem *ring_head;
	u32 ring_tail;
	u32 ring_tail_mask;
	u32 ring_space;
	u32 ring_lockup;

	/* palette */
	u32 pseudo_palette[17];
	struct { u8 red, green, blue, pad; } palette[256];

	/* chip info */
	int pci_chipset;
	int chipset;
	const char *name;
	int mobile;

	/* current mode */
	int bpp, depth;
	u32 visual;
	int xres, yres, pitch;
	int pixclock;

	/* current pipe */
	int pipe;

	/* some flags */
	int accel;
	int hwcursor;
	int fixed_mode;
	int ring_active;

	/* hw cursor */
	int cursor_on;
	int cursor_blanked;
	u8  cursor_src[64];

	/* initial parameters */
	int initial_vga;
	struct fb_var_screeninfo initial_var;
	u32 initial_fb_base;
	u32 initial_video_ram;
	u32 initial_pitch;

	/* driver registered */
	int registered;
};

/*** function prototypes ***/

extern int intelfb_var_to_depth(const struct fb_var_screeninfo *var);

#endif /* _INTELFB_H */
Commit	Line	Data
1da177e4 LT	1	#ifndef _INTELFB_H
	2	#define _INTELFB_H
	3
	4	/* $DHD: intelfb/intelfb.h,v 1.40 2003/06/27 15:06:25 dawes Exp $ */
	5
	6	#include <linux/agp_backend.h>
	7	#include <linux/fb.h>
	8
	9
	10	/* Version/name */
	11	#define INTELFB_VERSION "0.9.2"
	12	#define INTELFB_MODULE_NAME "intelfb"
	13	#define SUPPORTED_CHIPSETS "830M/845G/852GM/855GM/865G/915G"
	14
	15
	16	/* Debug/feature defines */
	17
	18	#ifndef DEBUG
	19	#define DEBUG 0
	20	#endif
	21
	22	#ifndef VERBOSE
	23	#define VERBOSE 0
	24	#endif
	25
	26	#ifndef REGDUMP
	27	#define REGDUMP 0
	28	#endif
	29
	30	#ifndef DETECT_VGA_CLASS_ONLY
	31	#define DETECT_VGA_CLASS_ONLY 1
	32	#endif
	33
	34	#ifndef ALLOCATE_FOR_PANNING
	35	#define ALLOCATE_FOR_PANNING 1
	36	#endif
	37
	38	#ifndef PREFERRED_MODE
	39	#define PREFERRED_MODE "1024x768-32@70"
	40	#endif
	41
	42	/* hw-related values */
	43
	44	/* PCI ids for supported devices */
	45	#define PCI_DEVICE_ID_INTEL_830M 0x3577
	46	#define PCI_DEVICE_ID_INTEL_845G 0x2562
	47	#define PCI_DEVICE_ID_INTEL_85XGM 0x3582
	48	#define PCI_DEVICE_ID_INTEL_865G 0x2572
	49	#define PCI_DEVICE_ID_INTEL_915G 0x2582
	50
	51	/* Size of MMIO region */
	52	#define INTEL_REG_SIZE 0x80000
	53
	54	#define STRIDE_ALIGNMENT 16
	55
	56	#define PALETTE_8_ENTRIES 256
	57
	58
	59	/* Macros */
	60
	61	/* basic arithmetic */
	62	#define KB(x) ((x) * 1024)
	63	#define MB(x) ((x) * 1024 * 1024)
	64	#define BtoKB(x) ((x) / 1024)
65	#define BtoMB(x) ((x) / 1024 / 1024)
66
67	#define GTT_PAGE_SIZE KB(4)
68
69	#define ROUND_UP_TO(x, y) (((x) + (y) - 1) / (y) * (y))
70	#define ROUND_DOWN_TO(x, y) ((x) / (y) * (y))
71	#define ROUND_UP_TO_PAGE(x) ROUND_UP_TO((x), GTT_PAGE_SIZE)
72	#define ROUND_DOWN_TO_PAGE(x) ROUND_DOWN_TO((x), GTT_PAGE_SIZE)
73
74	/* messages */
75	#define PFX INTELFB_MODULE_NAME ": "
76
77	#define ERR_MSG(fmt, args...) printk(KERN_ERR PFX fmt, ## args)
78	#define WRN_MSG(fmt, args...) printk(KERN_WARNING PFX fmt, ## args)
79	#define NOT_MSG(fmt, args...) printk(KERN_NOTICE PFX fmt, ## args)
80	#define INF_MSG(fmt, args...) printk(KERN_INFO PFX fmt, ## args)
81	#if DEBUG
82	#define DBG_MSG(fmt, args...) printk(KERN_DEBUG PFX fmt, ## args)
83	#else
84	#define DBG_MSG(fmt, args...) while (0) printk(fmt, ## args)
85	#endif
86
87	/* get commonly used pointers */
88	#define GET_DINFO(info) (info)->par
89
90	/* misc macros */
91	#define ACCEL(d, i) \
92	((d)->accel && !(d)->ring_lockup && \
93	((i)->var.accel_flags & FB_ACCELF_TEXT))
94
95	/*#define NOACCEL_CHIPSET(d) \
96	((d)->chipset != INTEL_865G)*/
97	#define NOACCEL_CHIPSET(d) \
98	(0)
99
100	#define FIXED_MODE(d) ((d)->fixed_mode)
101
102	/* Driver paramters */
103
104	#define RINGBUFFER_SIZE KB(64)
105	#define HW_CURSOR_SIZE KB(4)
106
107	/* Intel agpgart driver */
108	#define AGP_PHYSICAL_MEMORY 2
109
110	/* Data Types */
111
112	/* supported chipsets */
113	enum intel_chips {
114	INTEL_830M,
115	INTEL_845G,
116	INTEL_85XGM,
117	INTEL_852GM,
118	INTEL_852GME,
119	INTEL_855GM,
120	INTEL_855GME,
121	INTEL_865G,
122	INTEL_915G
123	};
124
125	struct intelfb_hwstate {
126	u32 vga0_divisor;
127	u32 vga1_divisor;
128	u32 vga_pd;
129	u32 dpll_a;
130	u32 dpll_b;
131	u32 fpa0;
132	u32 fpa1;
133	u32 fpb0;
134	u32 fpb1;
135	u32 palette_a[PALETTE_8_ENTRIES];
136	u32 palette_b[PALETTE_8_ENTRIES];
137	u32 htotal_a;
138	u32 hblank_a;
139	u32 hsync_a;
140	u32 vtotal_a;
141	u32 vblank_a;
142	u32 vsync_a;
143	u32 src_size_a;
144	u32 bclrpat_a;
145	u32 htotal_b;
146	u32 hblank_b;
147	u32 hsync_b;
148	u32 vtotal_b;
149	u32 vblank_b;
150	u32 vsync_b;
151	u32 src_size_b;
152	u32 bclrpat_b;
153	u32 adpa;
154	u32 dvoa;
155	u32 dvob;
156	u32 dvoc;
157	u32 dvoa_srcdim;
158	u32 dvob_srcdim;
159	u32 dvoc_srcdim;
160	u32 lvds;
161	u32 pipe_a_conf;
162	u32 pipe_b_conf;
163	u32 disp_arb;
164	u32 cursor_a_control;
165	u32 cursor_b_control;
166	u32 cursor_a_base;
167	u32 cursor_b_base;
168	u32 cursor_size;
169	u32 disp_a_ctrl;
170	u32 disp_b_ctrl;
171	u32 disp_a_base;
172	u32 disp_b_base;
173	u32 cursor_a_palette[4];
174	u32 cursor_b_palette[4];
175	u32 disp_a_stride;
176	u32 disp_b_stride;
177	u32 vgacntrl;
178	u32 add_id;
179	u32 swf0x[7];
180	u32 swf1x[7];
181	u32 swf3x[3];
182	u32 fence[8];
183	u32 instpm;
184	u32 mem_mode;
185	u32 fw_blc_0;
186	u32 fw_blc_1;
187	};
188
189	struct intelfb_heap_data {
190	u32 physical;
191	u8 __iomem *virtual;
192	u32 offset; // in GATT pages
193	u32 size; // in bytes
194	};
195
196	struct intelfb_info {
197	struct fb_info *info;
198	struct fb_ops *fbops;
199	struct pci_dev *pdev;
200
201	struct intelfb_hwstate save_state;
202
203	/* agpgart structs */
204	struct agp_memory *gtt_fb_mem; // use all stolen memory or vram
205	struct agp_memory *gtt_ring_mem; // ring buffer
206	struct agp_memory *gtt_cursor_mem; // hw cursor
207
208	/* use a gart reserved fb mem */
209	u8 fbmem_gart;
210
211	/* mtrr support */
212	u32 mtrr_reg;
213	u32 has_mtrr;
214
215	/* heap data */
216	struct intelfb_heap_data aperture;
217	struct intelfb_heap_data fb;
218	struct intelfb_heap_data ring;
219	struct intelfb_heap_data cursor;
220
221	/* mmio regs */
222	u32 mmio_base_phys;
223	u8 __iomem *mmio_base;
224
225	/* fb start offset (in bytes) */
226	u32 fb_start;
227
228	/* ring buffer */
229	u8 __iomem *ring_head;
230	u32 ring_tail;
231	u32 ring_tail_mask;
232	u32 ring_space;
233	u32 ring_lockup;
234
235	/* palette */
236	u32 pseudo_palette[17];
237	struct { u8 red, green, blue, pad; } palette[256];
238
239	/* chip info */
240	int pci_chipset;
241	int chipset;
242	const char *name;
243	int mobile;
244
245	/* current mode */
246	int bpp, depth;
247	u32 visual;
248	int xres, yres, pitch;
249	int pixclock;
250
251	/* current pipe */
252	int pipe;
253
254	/* some flags */
255	int accel;
256	int hwcursor;
257	int fixed_mode;
258	int ring_active;
259
260	/* hw cursor */
261	int cursor_on;
262	int cursor_blanked;
263	u8 cursor_src[64];
264
265	/* initial parameters */
266	int initial_vga;
267	struct fb_var_screeninfo initial_var;
268	u32 initial_fb_base;
269	u32 initial_video_ram;
270	u32 initial_pitch;
271
272	/* driver registered */
273	int registered;
274	};
275
276	/* function prototypes */
277
278	extern int intelfb_var_to_depth(const struct fb_var_screeninfo *var);
279
280	#endif /* _INTELFB_H */