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Fix misspellings collected by members of KJ list.
[deliverable/linux.git] / drivers / video / matrox / matroxfb_base.c
CommitLineData
1da177e4
LT		 1/*
2 *
3 * Hardware accelerated Matrox Millennium I, II, Mystique, G100, G200 and G400
4 *
5 * (c) 1998-2002 Petr Vandrovec <vandrove@vc.cvut.cz>
6 *
7 * Portions Copyright (c) 2001 Matrox Graphics Inc.
8 *
9 * Version: 1.65 2002/08/14
10 *
11 * MTRR stuff: 1998 Tom Rini <trini@kernel.crashing.org>
12 *
13 * Contributors: "menion?" <menion@mindless.com>
14 * Betatesting, fixes, ideas
15 *
16 * "Kurt Garloff" <garloff@suse.de>
17 * Betatesting, fixes, ideas, videomodes, videomodes timmings
18 *
19 * "Tom Rini" <trini@kernel.crashing.org>
20 * MTRR stuff, PPC cleanups, betatesting, fixes, ideas
21 *
22 * "Bibek Sahu" <scorpio@dodds.net>
23 * Access device through readb|w|l and write b|w|l
24 * Extensive debugging stuff
25 *
26 * "Daniel Haun" <haund@usa.net>
27 * Testing, hardware cursor fixes
28 *
29 * "Scott Wood" <sawst46+@pitt.edu>
30 * Fixes
31 *
32 * "Gerd Knorr" <kraxel@goldbach.isdn.cs.tu-berlin.de>
33 * Betatesting
34 *
35 * "Kelly French" <targon@hazmat.com>
36 * "Fernando Herrera" <fherrera@eurielec.etsit.upm.es>
37 * Betatesting, bug reporting
38 *
39 * "Pablo Bianucci" <pbian@pccp.com.ar>
40 * Fixes, ideas, betatesting
41 *
42 * "Inaky Perez Gonzalez" <inaky@peloncho.fis.ucm.es>
43 * Fixes, enhandcements, ideas, betatesting
44 *
45 * "Ryuichi Oikawa" <roikawa@rr.iiij4u.or.jp>
46 * PPC betatesting, PPC support, backward compatibility
47 *
48 * "Paul Womar" <Paul@pwomar.demon.co.uk>
49 * "Owen Waller" <O.Waller@ee.qub.ac.uk>
50 * PPC betatesting
51 *
52 * "Thomas Pornin" <pornin@bolet.ens.fr>
53 * Alpha betatesting
54 *
55 * "Pieter van Leuven" <pvl@iae.nl>
56 * "Ulf Jaenicke-Roessler" <ujr@physik.phy.tu-dresden.de>
57 * G100 testing
58 *
59 * "H. Peter Arvin" <hpa@transmeta.com>
60 * Ideas
61 *
62 * "Cort Dougan" <cort@cs.nmt.edu>
63 * CHRP fixes and PReP cleanup
64 *
65 * "Mark Vojkovich" <mvojkovi@ucsd.edu>
66 * G400 support
67 *
68 * "Samuel Hocevar" <sam@via.ecp.fr>
69 * Fixes
70 *
71 * "Anton Altaparmakov" <AntonA@bigfoot.com>
72 * G400 MAX/non-MAX distinction
73 *
74 * "Ken Aaker" <kdaaker@rchland.vnet.ibm.com>
75 * memtype extension (needed for GXT130P RS/6000 adapter)
76 *
77 * "Uns Lider" <unslider@miranda.org>
78 * G100 PLNWT fixes
79 *
80 * "Denis Zaitsev" <zzz@cd-club.ru>
81 * Fixes
82 *
83 * "Mike Pieper" <mike@pieper-family.de>
84 * TVOut enhandcements, V4L2 control interface.
85 *
86 * "Diego Biurrun" <diego@biurrun.de>
87 * DFP testing
88 *
89 * (following author is not in any relation with this code, but his code
90 * is included in this driver)
91 *
92 * Based on framebuffer driver for VBE 2.0 compliant graphic boards
93 * (c) 1998 Gerd Knorr <kraxel@cs.tu-berlin.de>
94 *
95 * (following author is not in any relation with this code, but his ideas
beb7dd86 96 * were used when writing this driver)
1da177e4
LT		 97 *
98 * FreeVBE/AF (Matrox), "Shawn Hargreaves" <shawn@talula.demon.co.uk>
99 *
100 */
101
1da177e4
LT		 102#include <linux/version.h>
103
a50d913f
AM		 104#define __OLD_VIDIOC_
105
1da177e4
LT		 106#include "matroxfb_base.h"
107#include "matroxfb_misc.h"
108#include "matroxfb_accel.h"
109#include "matroxfb_DAC1064.h"
110#include "matroxfb_Ti3026.h"
111#include "matroxfb_maven.h"
112#include "matroxfb_crtc2.h"
113#include "matroxfb_g450.h"
114#include <linux/matroxfb.h>
115#include <linux/interrupt.h>
116#include <asm/uaccess.h>
117
118#ifdef CONFIG_PPC_PMAC
e8222502 119#include <asm/machdep.h>
1da177e4
LT		 120unsigned char nvram_read_byte(int);
121static int default_vmode = VMODE_NVRAM;
122static int default_cmode = CMODE_NVRAM;
123#endif
124
125static void matroxfb_unregister_device(struct matrox_fb_info* minfo);
126
127/* --------------------------------------------------------------------- */
128
129/*
130 * card parameters
131 */
132
133/* --------------------------------------------------------------------- */
134
135static struct fb_var_screeninfo vesafb_defined = {
136 640,480,640,480,/* W,H, W, H (virtual) load xres,xres_virtual*/
137 0,0, /* virtual -> visible no offset */
138 8, /* depth -> load bits_per_pixel */
139 0, /* greyscale ? */
140 {0,0,0}, /* R */
141 {0,0,0}, /* G */
142 {0,0,0}, /* B */
143 {0,0,0}, /* transparency */
144 0, /* standard pixel format */
145 FB_ACTIVATE_NOW,
146 -1,-1,
147 FB_ACCELF_TEXT, /* accel flags */
148 39721L,48L,16L,33L,10L,
149 96L,2L,~0, /* No sync info */
150 FB_VMODE_NONINTERLACED,
151 0, {0,0,0,0,0}
152};
153
154
155
156/* --------------------------------------------------------------------- */
157static void update_crtc2(WPMINFO unsigned int pos) {
158 struct matroxfb_dh_fb_info* info = ACCESS_FBINFO(crtc2.info);
159
160 /* Make sure that displays are compatible */
161 if (info && (info->fbcon.var.bits_per_pixel == ACCESS_FBINFO(fbcon).var.bits_per_pixel)
a50d913f
AM		 162 && (info->fbcon.var.xres_virtual == ACCESS_FBINFO(fbcon).var.xres_virtual)
163 && (info->fbcon.var.green.length == ACCESS_FBINFO(fbcon).var.green.length)
164 ) {
1da177e4
LT		 165 switch (ACCESS_FBINFO(fbcon).var.bits_per_pixel) {
166 case 16:
167 case 32:
168 pos = pos * 8;
169 if (info->interlaced) {
170 mga_outl(0x3C2C, pos);
171 mga_outl(0x3C28, pos + ACCESS_FBINFO(fbcon).var.xres_virtual * ACCESS_FBINFO(fbcon).var.bits_per_pixel / 8);
172 } else {
173 mga_outl(0x3C28, pos);
174 }
175 break;
176 }
177 }
178}
179
180static void matroxfb_crtc1_panpos(WPMINFO2) {
181 if (ACCESS_FBINFO(crtc1.panpos) >= 0) {
182 unsigned long flags;
183 int panpos;
184
185 matroxfb_DAC_lock_irqsave(flags);
186 panpos = ACCESS_FBINFO(crtc1.panpos);
187 if (panpos >= 0) {
188 unsigned int extvga_reg;
189
190 ACCESS_FBINFO(crtc1.panpos) = -1; /* No update pending anymore */
191 extvga_reg = mga_inb(M_EXTVGA_INDEX);
192 mga_setr(M_EXTVGA_INDEX, 0x00, panpos);
193 if (extvga_reg != 0x00) {
194 mga_outb(M_EXTVGA_INDEX, extvga_reg);
195 }
196 }
197 matroxfb_DAC_unlock_irqrestore(flags);
198 }
199}
200
7d12e780 201static irqreturn_t matrox_irq(int irq, void *dev_id)
1da177e4
LT		 202{
203 u_int32_t status;
204 int handled = 0;
205
206 MINFO_FROM(dev_id);
207
208 status = mga_inl(M_STATUS);
209
210 if (status & 0x20) {
211 mga_outl(M_ICLEAR, 0x20);
212 ACCESS_FBINFO(crtc1.vsync.cnt)++;
213 matroxfb_crtc1_panpos(PMINFO2);
214 wake_up_interruptible(&ACCESS_FBINFO(crtc1.vsync.wait));
215 handled = 1;
216 }
217 if (status & 0x200) {
218 mga_outl(M_ICLEAR, 0x200);
219 ACCESS_FBINFO(crtc2.vsync.cnt)++;
220 wake_up_interruptible(&ACCESS_FBINFO(crtc2.vsync.wait));
221 handled = 1;
222 }
223 return IRQ_RETVAL(handled);
224}
225
226int matroxfb_enable_irq(WPMINFO int reenable) {
227 u_int32_t bm;
a50d913f 228
1da177e4
LT		 229 if (ACCESS_FBINFO(devflags.accelerator) == FB_ACCEL_MATROX_MGAG400)
230 bm = 0x220;
231 else
232 bm = 0x020;
233
234 if (!test_and_set_bit(0, &ACCESS_FBINFO(irq_flags))) {
235 if (request_irq(ACCESS_FBINFO(pcidev)->irq, matrox_irq,
63a43399 236 IRQF_SHARED, "matroxfb", MINFO)) {
1da177e4
LT		 237 clear_bit(0, &ACCESS_FBINFO(irq_flags));
238 return -EINVAL;
239 }
240 /* Clear any pending field interrupts */
241 mga_outl(M_ICLEAR, bm);
242 mga_outl(M_IEN, mga_inl(M_IEN) | bm);
243 } else if (reenable) {
244 u_int32_t ien;
a50d913f 245
1da177e4
LT		 246 ien = mga_inl(M_IEN);
247 if ((ien & bm) != bm) {
248 printk(KERN_DEBUG "matroxfb: someone disabled IRQ [%08X]\n", ien);
249 mga_outl(M_IEN, ien | bm);
250 }
251 }
252 return 0;
253}
254
255static void matroxfb_disable_irq(WPMINFO2) {
256 if (test_and_clear_bit(0, &ACCESS_FBINFO(irq_flags))) {
257 /* Flush pending pan-at-vbl request... */
258 matroxfb_crtc1_panpos(PMINFO2);
259 if (ACCESS_FBINFO(devflags.accelerator) == FB_ACCEL_MATROX_MGAG400)
260 mga_outl(M_IEN, mga_inl(M_IEN) & ~0x220);
261 else
262 mga_outl(M_IEN, mga_inl(M_IEN) & ~0x20);
263 free_irq(ACCESS_FBINFO(pcidev)->irq, MINFO);
264 }
265}
266
267int matroxfb_wait_for_sync(WPMINFO u_int32_t crtc) {
1da177e4
LT		 268 struct matrox_vsync *vs;
269 unsigned int cnt;
270 int ret;
271
272 switch (crtc) {
273 case 0:
274 vs = &ACCESS_FBINFO(crtc1.vsync);
275 break;
276 case 1:
277 if (ACCESS_FBINFO(devflags.accelerator) != FB_ACCEL_MATROX_MGAG400) {
278 return -ENODEV;
279 }
280 vs = &ACCESS_FBINFO(crtc2.vsync);
281 break;
282 default:
283 return -ENODEV;
284 }
285 ret = matroxfb_enable_irq(PMINFO 0);
286 if (ret) {
287 return ret;
288 }
1da177e4
LT		 289
290 cnt = vs->cnt;
291 ret = wait_event_interruptible_timeout(vs->wait, cnt != vs->cnt, HZ/10);
292 if (ret < 0) {
293 return ret;
294 }
295 if (ret == 0) {
296 matroxfb_enable_irq(PMINFO 1);
297 return -ETIMEDOUT;
298 }
299 return 0;
300}
301
302/* --------------------------------------------------------------------- */
303
304static void matrox_pan_var(WPMINFO struct fb_var_screeninfo *var) {
305 unsigned int pos;
306 unsigned short p0, p1, p2;
307#ifdef CONFIG_FB_MATROX_32MB
308 unsigned int p3;
309#endif
310 int vbl;
311 unsigned long flags;
312
313 CRITFLAGS
314
315 DBG(__FUNCTION__)
316
317 if (ACCESS_FBINFO(dead))
318 return;
319
320 ACCESS_FBINFO(fbcon).var.xoffset = var->xoffset;
321 ACCESS_FBINFO(fbcon).var.yoffset = var->yoffset;
322 pos = (ACCESS_FBINFO(fbcon).var.yoffset * ACCESS_FBINFO(fbcon).var.xres_virtual + ACCESS_FBINFO(fbcon).var.xoffset) * ACCESS_FBINFO(curr.final_bppShift) / 32;
323 pos += ACCESS_FBINFO(curr.ydstorg.chunks);
324 p0 = ACCESS_FBINFO(hw).CRTC[0x0D] = pos & 0xFF;
325 p1 = ACCESS_FBINFO(hw).CRTC[0x0C] = (pos & 0xFF00) >> 8;
326 p2 = ACCESS_FBINFO(hw).CRTCEXT[0] = (ACCESS_FBINFO(hw).CRTCEXT[0] & 0xB0) | ((pos >> 16) & 0x0F) | ((pos >> 14) & 0x40);
327#ifdef CONFIG_FB_MATROX_32MB
328 p3 = ACCESS_FBINFO(hw).CRTCEXT[8] = pos >> 21;
329#endif
330
331 /* FB_ACTIVATE_VBL and we can acquire interrupts? Honor FB_ACTIVATE_VBL then... */
332 vbl = (var->activate & FB_ACTIVATE_VBL) && (matroxfb_enable_irq(PMINFO 0) == 0);
333
334 CRITBEGIN
335
336 matroxfb_DAC_lock_irqsave(flags);
337 mga_setr(M_CRTC_INDEX, 0x0D, p0);
338 mga_setr(M_CRTC_INDEX, 0x0C, p1);
339#ifdef CONFIG_FB_MATROX_32MB
340 if (ACCESS_FBINFO(devflags.support32MB))
341 mga_setr(M_EXTVGA_INDEX, 0x08, p3);
342#endif
343 if (vbl) {
344 ACCESS_FBINFO(crtc1.panpos) = p2;
345 } else {
346 /* Abort any pending change */
347 ACCESS_FBINFO(crtc1.panpos) = -1;
348 mga_setr(M_EXTVGA_INDEX, 0x00, p2);
349 }
350 matroxfb_DAC_unlock_irqrestore(flags);
a50d913f 351
1da177e4
LT		 352 update_crtc2(PMINFO pos);
353
354 CRITEND
355}
356
357static void matroxfb_remove(WPMINFO int dummy) {
358 /* Currently we are holding big kernel lock on all dead & usecount updates.
359 * Destroy everything after all users release it. Especially do not unregister
360 * framebuffer and iounmap memory, neither fbmem nor fbcon-cfb* does not check
361 * for device unplugged when in use.
362 * In future we should point mmio.vbase & video.vbase somewhere where we can
363 * write data without causing too much damage...
364 */
365
366 ACCESS_FBINFO(dead) = 1;
367 if (ACCESS_FBINFO(usecount)) {
368 /* destroy it later */
369 return;
370 }
371 matroxfb_unregister_device(MINFO);
372 unregister_framebuffer(&ACCESS_FBINFO(fbcon));
373 matroxfb_g450_shutdown(PMINFO2);
374#ifdef CONFIG_MTRR
375 if (ACCESS_FBINFO(mtrr.vram_valid))
376 mtrr_del(ACCESS_FBINFO(mtrr.vram), ACCESS_FBINFO(video.base), ACCESS_FBINFO(video.len));
377#endif
378 mga_iounmap(ACCESS_FBINFO(mmio.vbase));
379 mga_iounmap(ACCESS_FBINFO(video.vbase));
380 release_mem_region(ACCESS_FBINFO(video.base), ACCESS_FBINFO(video.len_maximum));
381 release_mem_region(ACCESS_FBINFO(mmio.base), 16384);
382#ifdef CONFIG_FB_MATROX_MULTIHEAD
383 kfree(minfo);
384#endif
385}
386
387 /*
388 * Open/Release the frame buffer device
389 */
390
391static int matroxfb_open(struct fb_info *info, int user)
392{
393 MINFO_FROM_INFO(info);
a50d913f 394
1da177e4
LT		 395 DBG_LOOP(__FUNCTION__)
396
397 if (ACCESS_FBINFO(dead)) {
398 return -ENXIO;
399 }
400 ACCESS_FBINFO(usecount)++;
401 if (user) {
402 ACCESS_FBINFO(userusecount)++;
403 }
404 return(0);
405}
406
407static int matroxfb_release(struct fb_info *info, int user)
408{
409 MINFO_FROM_INFO(info);
a50d913f 410
1da177e4
LT		 411 DBG_LOOP(__FUNCTION__)
412
413 if (user) {
414 if (0 == --ACCESS_FBINFO(userusecount)) {
415 matroxfb_disable_irq(PMINFO2);
416 }
417 }
418 if (!(--ACCESS_FBINFO(usecount)) && ACCESS_FBINFO(dead)) {
419 matroxfb_remove(PMINFO 0);
420 }
421 return(0);
422}
423
424static int matroxfb_pan_display(struct fb_var_screeninfo *var,
425 struct fb_info* info) {
426 MINFO_FROM_INFO(info);
427
428 DBG(__FUNCTION__)
429
430 matrox_pan_var(PMINFO var);
431 return 0;
432}
433
434static int matroxfb_get_final_bppShift(CPMINFO int bpp) {
435 int bppshft2;
436
437 DBG(__FUNCTION__)
438
439 bppshft2 = bpp;
440 if (!bppshft2) {
441 return 8;
442 }
443 if (isInterleave(MINFO))
444 bppshft2 >>= 1;
445 if (ACCESS_FBINFO(devflags.video64bits))
446 bppshft2 >>= 1;
447 return bppshft2;
448}
449
450static int matroxfb_test_and_set_rounding(CPMINFO int xres, int bpp) {
451 int over;
452 int rounding;
453
454 DBG(__FUNCTION__)
455
456 switch (bpp) {
457 case 0: return xres;
458 case 4: rounding = 128;
459 break;
460 case 8: rounding = 64; /* doc says 64; 32 is OK for G400 */
461 break;
462 case 16: rounding = 32;
463 break;
464 case 24: rounding = 64; /* doc says 64; 32 is OK for G400 */
465 break;
466 default: rounding = 16;
467 /* on G400, 16 really does not work */
468 if (ACCESS_FBINFO(devflags.accelerator) == FB_ACCEL_MATROX_MGAG400)
469 rounding = 32;
470 break;
471 }
472 if (isInterleave(MINFO)) {
473 rounding *= 2;
474 }
475 over = xres % rounding;
476 if (over)
477 xres += rounding-over;
478 return xres;
479}
480
481static int matroxfb_pitch_adjust(CPMINFO int xres, int bpp) {
482 const int* width;
483 int xres_new;
484
485 DBG(__FUNCTION__)
486
487 if (!bpp) return xres;
488
489 width = ACCESS_FBINFO(capable.vxres);
490
491 if (ACCESS_FBINFO(devflags.precise_width)) {
492 while (*width) {
493 if ((*width >= xres) && (matroxfb_test_and_set_rounding(PMINFO *width, bpp) == *width)) {
494 break;
495 }
496 width++;
497 }
498 xres_new = *width;
499 } else {
500 xres_new = matroxfb_test_and_set_rounding(PMINFO xres, bpp);
501 }
1da177e4
LT		 502 return xres_new;
503}
504
505static int matroxfb_get_cmap_len(struct fb_var_screeninfo *var) {
506
507 DBG(__FUNCTION__)
508
509 switch (var->bits_per_pixel) {
510 case 4:
511 return 16; /* pseudocolor... 16 entries HW palette */
512 case 8:
513 return 256; /* pseudocolor... 256 entries HW palette */
514 case 16:
515 return 16; /* directcolor... 16 entries SW palette */
516 /* Mystique: truecolor, 16 entries SW palette, HW palette hardwired into 1:1 mapping */
517 case 24:
518 return 16; /* directcolor... 16 entries SW palette */
519 /* Mystique: truecolor, 16 entries SW palette, HW palette hardwired into 1:1 mapping */
520 case 32:
521 return 16; /* directcolor... 16 entries SW palette */
522 /* Mystique: truecolor, 16 entries SW palette, HW palette hardwired into 1:1 mapping */
523 }
524 return 16; /* return something reasonable... or panic()? */
525}
526
527static int matroxfb_decode_var(CPMINFO struct fb_var_screeninfo *var, int *visual, int *video_cmap_len, unsigned int* ydstorg) {
528 struct RGBT {
529 unsigned char bpp;
530 struct {
531 unsigned char offset,
532 length;
533 } red,
534 green,
535 blue,
536 transp;
537 signed char visual;
538 };
539 static const struct RGBT table[]= {
540 { 8,{ 0,8},{0,8},{0,8},{ 0,0},MX_VISUAL_PSEUDOCOLOR},
541 {15,{10,5},{5,5},{0,5},{15,1},MX_VISUAL_DIRECTCOLOR},
542 {16,{11,5},{5,6},{0,5},{ 0,0},MX_VISUAL_DIRECTCOLOR},
543 {24,{16,8},{8,8},{0,8},{ 0,0},MX_VISUAL_DIRECTCOLOR},
544 {32,{16,8},{8,8},{0,8},{24,8},MX_VISUAL_DIRECTCOLOR}
545 };
546 struct RGBT const *rgbt;
547 unsigned int bpp = var->bits_per_pixel;
548 unsigned int vramlen;
549 unsigned int memlen;
550
551 DBG(__FUNCTION__)
552
553 switch (bpp) {
554 case 4: if (!ACCESS_FBINFO(capable.cfb4)) return -EINVAL;
555 break;
556 case 8: break;
557 case 16: break;
558 case 24: break;
559 case 32: break;
560 default: return -EINVAL;
561 }
562 *ydstorg = 0;
563 vramlen = ACCESS_FBINFO(video.len_usable);
564 if (var->yres_virtual < var->yres)
565 var->yres_virtual = var->yres;
566 if (var->xres_virtual < var->xres)
567 var->xres_virtual = var->xres;
568
569 var->xres_virtual = matroxfb_pitch_adjust(PMINFO var->xres_virtual, bpp);
570 memlen = var->xres_virtual * bpp * var->yres_virtual / 8;
571 if (memlen > vramlen) {
572 var->yres_virtual = vramlen * 8 / (var->xres_virtual * bpp);
573 memlen = var->xres_virtual * bpp * var->yres_virtual / 8;
574 }
575 /* There is hardware bug that no line can cross 4MB boundary */
576 /* give up for CFB24, it is impossible to easy workaround it */
577 /* for other try to do something */
578 if (!ACCESS_FBINFO(capable.cross4MB) && (memlen > 0x400000)) {
579 if (bpp == 24) {
580 /* sorry */
581 } else {
582 unsigned int linelen;
583 unsigned int m1 = linelen = var->xres_virtual * bpp / 8;
584 unsigned int m2 = PAGE_SIZE; /* or 128 if you do not need PAGE ALIGNED address */
585 unsigned int max_yres;
586
587 while (m1) {
588 int t;
589
590 while (m2 >= m1) m2 -= m1;
591 t = m1;
592 m1 = m2;
593 m2 = t;
594 }
595 m2 = linelen * PAGE_SIZE / m2;
596 *ydstorg = m2 = 0x400000 % m2;
597 max_yres = (vramlen - m2) / linelen;
598 if (var->yres_virtual > max_yres)
599 var->yres_virtual = max_yres;
600 }
601 }
602 /* YDSTLEN contains only signed 16bit value */
603 if (var->yres_virtual > 32767)
604 var->yres_virtual = 32767;
605 /* we must round yres/xres down, we already rounded y/xres_virtual up
606 if it was possible. We should return -EINVAL, but I disagree */
607 if (var->yres_virtual < var->yres)
608 var->yres = var->yres_virtual;
609 if (var->xres_virtual < var->xres)
610 var->xres = var->xres_virtual;
611 if (var->xoffset + var->xres > var->xres_virtual)
612 var->xoffset = var->xres_virtual - var->xres;
613 if (var->yoffset + var->yres > var->yres_virtual)
614 var->yoffset = var->yres_virtual - var->yres;
615
616 if (bpp == 16 && var->green.length == 5) {
617 bpp--; /* an artifical value - 15 */
618 }
619
620 for (rgbt = table; rgbt->bpp < bpp; rgbt++);
621#define SETCLR(clr)\
622 var->clr.offset = rgbt->clr.offset;\
623 var->clr.length = rgbt->clr.length
624 SETCLR(red);
625 SETCLR(green);
626 SETCLR(blue);
627 SETCLR(transp);
628#undef SETCLR
629 *visual = rgbt->visual;
630
631 if (bpp > 8)
632 dprintk("matroxfb: truecolor: "
633 "size=%d:%d:%d:%d, shift=%d:%d:%d:%d\n",
634 var->transp.length, var->red.length, var->green.length, var->blue.length,
635 var->transp.offset, var->red.offset, var->green.offset, var->blue.offset);
636
637 *video_cmap_len = matroxfb_get_cmap_len(var);
638 dprintk(KERN_INFO "requested %d*%d/%dbpp (%d*%d)\n", var->xres, var->yres, var->bits_per_pixel,
639 var->xres_virtual, var->yres_virtual);
640 return 0;
641}
642
643static int matroxfb_setcolreg(unsigned regno, unsigned red, unsigned green,
644 unsigned blue, unsigned transp,
645 struct fb_info *fb_info)
646{
647#ifdef CONFIG_FB_MATROX_MULTIHEAD
648 struct matrox_fb_info* minfo = container_of(fb_info, struct matrox_fb_info, fbcon);
649#endif
650
651 DBG(__FUNCTION__)
652
653 /*
654 * Set a single color register. The values supplied are
655 * already rounded down to the hardware's capabilities
656 * (according to the entries in the `var' structure). Return
657 * != 0 for invalid regno.
658 */
659
660 if (regno >= ACCESS_FBINFO(curr.cmap_len))
661 return 1;
662
663 if (ACCESS_FBINFO(fbcon).var.grayscale) {
664 /* gray = 0.30*R + 0.59*G + 0.11*B */
665 red = green = blue = (red * 77 + green * 151 + blue * 28) >> 8;
666 }
667
668 red = CNVT_TOHW(red, ACCESS_FBINFO(fbcon).var.red.length);
669 green = CNVT_TOHW(green, ACCESS_FBINFO(fbcon).var.green.length);
670 blue = CNVT_TOHW(blue, ACCESS_FBINFO(fbcon).var.blue.length);
671 transp = CNVT_TOHW(transp, ACCESS_FBINFO(fbcon).var.transp.length);
672
673 switch (ACCESS_FBINFO(fbcon).var.bits_per_pixel) {
674 case 4:
675 case 8:
676 mga_outb(M_DAC_REG, regno);
677 mga_outb(M_DAC_VAL, red);
678 mga_outb(M_DAC_VAL, green);
679 mga_outb(M_DAC_VAL, blue);
680 break;
681 case 16:
682 {
683 u_int16_t col =
684 (red << ACCESS_FBINFO(fbcon).var.red.offset) |
685 (green << ACCESS_FBINFO(fbcon).var.green.offset) |
686 (blue << ACCESS_FBINFO(fbcon).var.blue.offset) |
687 (transp << ACCESS_FBINFO(fbcon).var.transp.offset); /* for 1:5:5:5 */
688 ACCESS_FBINFO(cmap[regno]) = col | (col << 16);
689 }
690 break;
691 case 24:
692 case 32:
693 ACCESS_FBINFO(cmap[regno]) =
694 (red << ACCESS_FBINFO(fbcon).var.red.offset) |
695 (green << ACCESS_FBINFO(fbcon).var.green.offset) |
696 (blue << ACCESS_FBINFO(fbcon).var.blue.offset) |
697 (transp << ACCESS_FBINFO(fbcon).var.transp.offset); /* 8:8:8:8 */
698 break;
699 }
700 return 0;
701}
702
703static void matroxfb_init_fix(WPMINFO2)
704{
705 struct fb_fix_screeninfo *fix = &ACCESS_FBINFO(fbcon).fix;
706 DBG(__FUNCTION__)
707
708 strcpy(fix->id,"MATROX");
709
710 fix->xpanstep = 8; /* 8 for 8bpp, 4 for 16bpp, 2 for 32bpp */
711 fix->ypanstep = 1;
712 fix->ywrapstep = 0;
713 fix->mmio_start = ACCESS_FBINFO(mmio.base);
714 fix->mmio_len = ACCESS_FBINFO(mmio.len);
715 fix->accel = ACCESS_FBINFO(devflags.accelerator);
716}
717
718static void matroxfb_update_fix(WPMINFO2)
719{
720 struct fb_fix_screeninfo *fix = &ACCESS_FBINFO(fbcon).fix;
721 DBG(__FUNCTION__)
722
723 fix->smem_start = ACCESS_FBINFO(video.base) + ACCESS_FBINFO(curr.ydstorg.bytes);
724 fix->smem_len = ACCESS_FBINFO(video.len_usable) - ACCESS_FBINFO(curr.ydstorg.bytes);
725}
726
727static int matroxfb_check_var(struct fb_var_screeninfo *var, struct fb_info *info)
728{
729 int err;
730 int visual;
731 int cmap_len;
732 unsigned int ydstorg;
733 MINFO_FROM_INFO(info);
734
735 if (ACCESS_FBINFO(dead)) {
736 return -ENXIO;
737 }
738 if ((err = matroxfb_decode_var(PMINFO var, &visual, &cmap_len, &ydstorg)) != 0)
739 return err;
740 return 0;
741}
742
743static int matroxfb_set_par(struct fb_info *info)
744{
745 int err;
746 int visual;
747 int cmap_len;
748 unsigned int ydstorg;
749 struct fb_var_screeninfo *var;
750 MINFO_FROM_INFO(info);
751
752 DBG(__FUNCTION__)
753
754 if (ACCESS_FBINFO(dead)) {
755 return -ENXIO;
756 }
757
758 var = &info->var;
759 if ((err = matroxfb_decode_var(PMINFO var, &visual, &cmap_len, &ydstorg)) != 0)
760 return err;
761 ACCESS_FBINFO(fbcon.screen_base) = vaddr_va(ACCESS_FBINFO(video.vbase)) + ydstorg;
762 matroxfb_update_fix(PMINFO2);
763 ACCESS_FBINFO(fbcon).fix.visual = visual;
764 ACCESS_FBINFO(fbcon).fix.type = FB_TYPE_PACKED_PIXELS;
765 ACCESS_FBINFO(fbcon).fix.type_aux = 0;
766 ACCESS_FBINFO(fbcon).fix.line_length = (var->xres_virtual * var->bits_per_pixel) >> 3;
767 {
768 unsigned int pos;
769
770 ACCESS_FBINFO(curr.cmap_len) = cmap_len;
771 ydstorg += ACCESS_FBINFO(devflags.ydstorg);
772 ACCESS_FBINFO(curr.ydstorg.bytes) = ydstorg;
773 ACCESS_FBINFO(curr.ydstorg.chunks) = ydstorg >> (isInterleave(MINFO)?3:2);
774 if (var->bits_per_pixel == 4)
775 ACCESS_FBINFO(curr.ydstorg.pixels) = ydstorg;
776 else
777 ACCESS_FBINFO(curr.ydstorg.pixels) = (ydstorg * 8) / var->bits_per_pixel;
778 ACCESS_FBINFO(curr.final_bppShift) = matroxfb_get_final_bppShift(PMINFO var->bits_per_pixel);
779 { struct my_timming mt;
780 struct matrox_hw_state* hw;
781 int out;
782
783 matroxfb_var2my(var, &mt);
784 mt.crtc = MATROXFB_SRC_CRTC1;
785 /* CRTC1 delays */
786 switch (var->bits_per_pixel) {
787 case 0: mt.delay = 31 + 0; break;
788 case 16: mt.delay = 21 + 8; break;
789 case 24: mt.delay = 17 + 8; break;
790 case 32: mt.delay = 16 + 8; break;
791 default: mt.delay = 31 + 8; break;
792 }
793
794 hw = &ACCESS_FBINFO(hw);
795
796 down_read(&ACCESS_FBINFO(altout).lock);
797 for (out = 0; out < MATROXFB_MAX_OUTPUTS; out++) {
798 if (ACCESS_FBINFO(outputs[out]).src == MATROXFB_SRC_CRTC1 &&
799 ACCESS_FBINFO(outputs[out]).output->compute) {
800 ACCESS_FBINFO(outputs[out]).output->compute(ACCESS_FBINFO(outputs[out]).data, &mt);
801 }
802 }
803 up_read(&ACCESS_FBINFO(altout).lock);
804 ACCESS_FBINFO(crtc1).pixclock = mt.pixclock;
805 ACCESS_FBINFO(crtc1).mnp = mt.mnp;
806 ACCESS_FBINFO(hw_switch->init(PMINFO &mt));
807 pos = (var->yoffset * var->xres_virtual + var->xoffset) * ACCESS_FBINFO(curr.final_bppShift) / 32;
808 pos += ACCESS_FBINFO(curr.ydstorg.chunks);
809
810 hw->CRTC[0x0D] = pos & 0xFF;
811 hw->CRTC[0x0C] = (pos & 0xFF00) >> 8;
812 hw->CRTCEXT[0] = (hw->CRTCEXT[0] & 0xF0) | ((pos >> 16) & 0x0F) | ((pos >> 14) & 0x40);
813 hw->CRTCEXT[8] = pos >> 21;
814 ACCESS_FBINFO(hw_switch->restore(PMINFO2));
815 update_crtc2(PMINFO pos);
816 down_read(&ACCESS_FBINFO(altout).lock);
817 for (out = 0; out < MATROXFB_MAX_OUTPUTS; out++) {
818 if (ACCESS_FBINFO(outputs[out]).src == MATROXFB_SRC_CRTC1 &&
819 ACCESS_FBINFO(outputs[out]).output->program) {
820 ACCESS_FBINFO(outputs[out]).output->program(ACCESS_FBINFO(outputs[out]).data);
821 }
822 }
823 for (out = 0; out < MATROXFB_MAX_OUTPUTS; out++) {
824 if (ACCESS_FBINFO(outputs[out]).src == MATROXFB_SRC_CRTC1 &&
825 ACCESS_FBINFO(outputs[out]).output->start) {
826 ACCESS_FBINFO(outputs[out]).output->start(ACCESS_FBINFO(outputs[out]).data);
827 }
828 }
829 up_read(&ACCESS_FBINFO(altout).lock);
830 matrox_cfbX_init(PMINFO2);
831 }
832 }
833 ACCESS_FBINFO(initialized) = 1;
834 return 0;
835}
836
837static int matroxfb_get_vblank(WPMINFO struct fb_vblank *vblank)
838{
839 unsigned int sts1;
840
841 matroxfb_enable_irq(PMINFO 0);
842 memset(vblank, 0, sizeof(*vblank));
843 vblank->flags = FB_VBLANK_HAVE_VCOUNT | FB_VBLANK_HAVE_VSYNC |
844 FB_VBLANK_HAVE_VBLANK | FB_VBLANK_HAVE_HBLANK;
845 sts1 = mga_inb(M_INSTS1);
846 vblank->vcount = mga_inl(M_VCOUNT);
847 /* BTW, on my PIII/450 with G400, reading M_INSTS1
848 byte makes this call about 12% slower (1.70 vs. 2.05 us
849 per ioctl()) */
850 if (sts1 & 1)
851 vblank->flags |= FB_VBLANK_HBLANKING;
852 if (sts1 & 8)
853 vblank->flags |= FB_VBLANK_VSYNCING;
854 if (vblank->vcount >= ACCESS_FBINFO(fbcon).var.yres)
855 vblank->flags |= FB_VBLANK_VBLANKING;
856 if (test_bit(0, &ACCESS_FBINFO(irq_flags))) {
857 vblank->flags |= FB_VBLANK_HAVE_COUNT;
a50d913f 858 /* Only one writer, aligned int value...
1da177e4
LT		 859 it should work without lock and without atomic_t */
860 vblank->count = ACCESS_FBINFO(crtc1).vsync.cnt;
861 }
862 return 0;
863}
864
865static struct matrox_altout panellink_output = {
866 .name = "Panellink output",
867};
868
67a6680d
CH		 869static int matroxfb_ioctl(struct fb_info *info,
870 unsigned int cmd, unsigned long arg)
1da177e4
LT		 871{
872 void __user *argp = (void __user *)arg;
873 MINFO_FROM_INFO(info);
a50d913f 874
1da177e4
LT		 875 DBG(__FUNCTION__)
876
877 if (ACCESS_FBINFO(dead)) {
878 return -ENXIO;
879 }
880
881 switch (cmd) {
882 case FBIOGET_VBLANK:
883 {
884 struct fb_vblank vblank;
885 int err;
886
887 err = matroxfb_get_vblank(PMINFO &vblank);
888 if (err)
889 return err;
890 if (copy_to_user(argp, &vblank, sizeof(vblank)))
891 return -EFAULT;
892 return 0;
893 }
894 case FBIO_WAITFORVSYNC:
895 {
896 u_int32_t crt;
897
898 if (get_user(crt, (u_int32_t __user *)arg))
899 return -EFAULT;
900
901 return matroxfb_wait_for_sync(PMINFO crt);
902 }
903 case MATROXFB_SET_OUTPUT_MODE:
904 {
905 struct matroxioc_output_mode mom;
906 struct matrox_altout *oproc;
907 int val;
908
909 if (copy_from_user(&mom, argp, sizeof(mom)))
910 return -EFAULT;
911 if (mom.output >= MATROXFB_MAX_OUTPUTS)
912 return -ENXIO;
913 down_read(&ACCESS_FBINFO(altout.lock));
914 oproc = ACCESS_FBINFO(outputs[mom.output]).output;
915 if (!oproc) {
916 val = -ENXIO;
917 } else if (!oproc->verifymode) {
918 if (mom.mode == MATROXFB_OUTPUT_MODE_MONITOR) {
919 val = 0;
920 } else {
921 val = -EINVAL;
922 }
923 } else {
924 val = oproc->verifymode(ACCESS_FBINFO(outputs[mom.output]).data, mom.mode);
925 }
926 if (!val) {
927 if (ACCESS_FBINFO(outputs[mom.output]).mode != mom.mode) {
928 ACCESS_FBINFO(outputs[mom.output]).mode = mom.mode;
929 val = 1;
930 }
931 }
932 up_read(&ACCESS_FBINFO(altout.lock));
933 if (val != 1)
934 return val;
935 switch (ACCESS_FBINFO(outputs[mom.output]).src) {
936 case MATROXFB_SRC_CRTC1:
937 matroxfb_set_par(info);
938 break;
939 case MATROXFB_SRC_CRTC2:
940 {
941 struct matroxfb_dh_fb_info* crtc2;
942
943 down_read(&ACCESS_FBINFO(crtc2.lock));
944 crtc2 = ACCESS_FBINFO(crtc2.info);
945 if (crtc2)
946 crtc2->fbcon.fbops->fb_set_par(&crtc2->fbcon);
947 up_read(&ACCESS_FBINFO(crtc2.lock));
948 }
949 break;
950 }
951 return 0;
952 }
953 case MATROXFB_GET_OUTPUT_MODE:
954 {
955 struct matroxioc_output_mode mom;
956 struct matrox_altout *oproc;
957 int val;
958
959 if (copy_from_user(&mom, argp, sizeof(mom)))
960 return -EFAULT;
961 if (mom.output >= MATROXFB_MAX_OUTPUTS)
962 return -ENXIO;
963 down_read(&ACCESS_FBINFO(altout.lock));
964 oproc = ACCESS_FBINFO(outputs[mom.output]).output;
965 if (!oproc) {
966 val = -ENXIO;
967 } else {
968 mom.mode = ACCESS_FBINFO(outputs[mom.output]).mode;
969 val = 0;
970 }
971 up_read(&ACCESS_FBINFO(altout.lock));
972 if (val)
973 return val;
974 if (copy_to_user(argp, &mom, sizeof(mom)))
975 return -EFAULT;
976 return 0;
977 }
978 case MATROXFB_SET_OUTPUT_CONNECTION:
979 {
980 u_int32_t tmp;
981 int i;
982 int changes;
983
984 if (copy_from_user(&tmp, argp, sizeof(tmp)))
985 return -EFAULT;
986 for (i = 0; i < 32; i++) {
987 if (tmp & (1 << i)) {
988 if (i >= MATROXFB_MAX_OUTPUTS)
989 return -ENXIO;
990 if (!ACCESS_FBINFO(outputs[i]).output)
991 return -ENXIO;
992 switch (ACCESS_FBINFO(outputs[i]).src) {
993 case MATROXFB_SRC_NONE:
994 case MATROXFB_SRC_CRTC1:
995 break;
996 default:
997 return -EBUSY;
998 }
999 }
1000 }
1001 if (ACCESS_FBINFO(devflags.panellink)) {
1002 if (tmp & MATROXFB_OUTPUT_CONN_DFP) {
1003 if (tmp & MATROXFB_OUTPUT_CONN_SECONDARY)
1004 return -EINVAL;
1005 for (i = 0; i < MATROXFB_MAX_OUTPUTS; i++) {
1006 if (ACCESS_FBINFO(outputs[i]).src == MATROXFB_SRC_CRTC2) {
1007 return -EBUSY;
1008 }
1009 }
1010 }
1011 }
1012 changes = 0;
1013 for (i = 0; i < MATROXFB_MAX_OUTPUTS; i++) {
1014 if (tmp & (1 << i)) {
1015 if (ACCESS_FBINFO(outputs[i]).src != MATROXFB_SRC_CRTC1) {
1016 changes = 1;
1017 ACCESS_FBINFO(outputs[i]).src = MATROXFB_SRC_CRTC1;
1018 }
1019 } else if (ACCESS_FBINFO(outputs[i]).src == MATROXFB_SRC_CRTC1) {
1020 changes = 1;
1021 ACCESS_FBINFO(outputs[i]).src = MATROXFB_SRC_NONE;
1022 }
1023 }
1024 if (!changes)
1025 return 0;
1026 matroxfb_set_par(info);
1027 return 0;
1028 }
1029 case MATROXFB_GET_OUTPUT_CONNECTION:
1030 {
1031 u_int32_t conn = 0;
1032 int i;
1033
1034 for (i = 0; i < MATROXFB_MAX_OUTPUTS; i++) {
1035 if (ACCESS_FBINFO(outputs[i]).src == MATROXFB_SRC_CRTC1) {
1036 conn |= 1 << i;
1037 }
1038 }
1039 if (put_user(conn, (u_int32_t __user *)arg))
1040 return -EFAULT;
1041 return 0;
1042 }
1043 case MATROXFB_GET_AVAILABLE_OUTPUTS:
1044 {
1045 u_int32_t conn = 0;
1046 int i;
1047
1048 for (i = 0; i < MATROXFB_MAX_OUTPUTS; i++) {
1049 if (ACCESS_FBINFO(outputs[i]).output) {
1050 switch (ACCESS_FBINFO(outputs[i]).src) {
1051 case MATROXFB_SRC_NONE:
1052 case MATROXFB_SRC_CRTC1:
1053 conn |= 1 << i;
1054 break;
1055 }
1056 }
1057 }
1058 if (ACCESS_FBINFO(devflags.panellink)) {
1059 if (conn & MATROXFB_OUTPUT_CONN_DFP)
1060 conn &= ~MATROXFB_OUTPUT_CONN_SECONDARY;
1061 if (conn & MATROXFB_OUTPUT_CONN_SECONDARY)
1062 conn &= ~MATROXFB_OUTPUT_CONN_DFP;
1063 }
1064 if (put_user(conn, (u_int32_t __user *)arg))
1065 return -EFAULT;
1066 return 0;
1067 }
1068 case MATROXFB_GET_ALL_OUTPUTS:
1069 {
1070 u_int32_t conn = 0;
1071 int i;
1072
1073 for (i = 0; i < MATROXFB_MAX_OUTPUTS; i++) {
1074 if (ACCESS_FBINFO(outputs[i]).output) {
1075 conn |= 1 << i;
1076 }
1077 }
1078 if (put_user(conn, (u_int32_t __user *)arg))
1079 return -EFAULT;
1080 return 0;
1081 }
1082 case VIDIOC_QUERYCAP:
1083 {
1084 struct v4l2_capability r;
a50d913f 1085
1da177e4
LT		 1086 memset(&r, 0, sizeof(r));
1087 strcpy(r.driver, "matroxfb");
1088 strcpy(r.card, "Matrox");
1089 sprintf(r.bus_info, "PCI:%s", pci_name(ACCESS_FBINFO(pcidev)));
1090 r.version = KERNEL_VERSION(1,0,0);
1091 r.capabilities = V4L2_CAP_VIDEO_OUTPUT;
1092 if (copy_to_user(argp, &r, sizeof(r)))
1093 return -EFAULT;
1094 return 0;
a50d913f 1095
1da177e4
LT		 1096 }
1097 case VIDIOC_QUERYCTRL:
1098 {
1099 struct v4l2_queryctrl qctrl;
1100 int err;
1101
1102 if (copy_from_user(&qctrl, argp, sizeof(qctrl)))
1103 return -EFAULT;
1104
1105 down_read(&ACCESS_FBINFO(altout).lock);
1106 if (!ACCESS_FBINFO(outputs[1]).output) {
1107 err = -ENXIO;
1108 } else if (ACCESS_FBINFO(outputs[1]).output->getqueryctrl) {
1109 err = ACCESS_FBINFO(outputs[1]).output->getqueryctrl(ACCESS_FBINFO(outputs[1]).data, &qctrl);
1110 } else {
1111 err = -EINVAL;
1112 }
1113 up_read(&ACCESS_FBINFO(altout).lock);
1114 if (err >= 0 &&
1115 copy_to_user(argp, &qctrl, sizeof(qctrl)))
1116 return -EFAULT;
1117 return err;
1118 }
1119 case VIDIOC_G_CTRL:
1120 {
1121 struct v4l2_control ctrl;
1122 int err;
1123
1124 if (copy_from_user(&ctrl, argp, sizeof(ctrl)))
1125 return -EFAULT;
1126
1127 down_read(&ACCESS_FBINFO(altout).lock);
1128 if (!ACCESS_FBINFO(outputs[1]).output) {
1129 err = -ENXIO;
1130 } else if (ACCESS_FBINFO(outputs[1]).output->getctrl) {
1131 err = ACCESS_FBINFO(outputs[1]).output->getctrl(ACCESS_FBINFO(outputs[1]).data, &ctrl);
1132 } else {
1133 err = -EINVAL;
1134 }
1135 up_read(&ACCESS_FBINFO(altout).lock);
1136 if (err >= 0 &&
1137 copy_to_user(argp, &ctrl, sizeof(ctrl)))
1138 return -EFAULT;
1139 return err;
1140 }
1141 case VIDIOC_S_CTRL_OLD:
1142 case VIDIOC_S_CTRL:
1143 {
1144 struct v4l2_control ctrl;
1145 int err;
1146
1147 if (copy_from_user(&ctrl, argp, sizeof(ctrl)))
1148 return -EFAULT;
1149
1150 down_read(&ACCESS_FBINFO(altout).lock);
1151 if (!ACCESS_FBINFO(outputs[1]).output) {
1152 err = -ENXIO;
1153 } else if (ACCESS_FBINFO(outputs[1]).output->setctrl) {
1154 err = ACCESS_FBINFO(outputs[1]).output->setctrl(ACCESS_FBINFO(outputs[1]).data, &ctrl);
1155 } else {
1156 err = -EINVAL;
1157 }
1158 up_read(&ACCESS_FBINFO(altout).lock);
1159 return err;
1160 }
1161 }
1162 return -ENOTTY;
1163}
1164
1165/* 0 unblank, 1 blank, 2 no vsync, 3 no hsync, 4 off */
1166
1167static int matroxfb_blank(int blank, struct fb_info *info)
1168{
1169 int seq;
1170 int crtc;
1171 CRITFLAGS
1172 MINFO_FROM_INFO(info);
1173
1174 DBG(__FUNCTION__)
1175
1176 if (ACCESS_FBINFO(dead))
1177 return 1;
1178
1179 switch (blank) {
1180 case FB_BLANK_NORMAL: seq = 0x20; crtc = 0x00; break; /* works ??? */
1181 case FB_BLANK_VSYNC_SUSPEND: seq = 0x20; crtc = 0x10; break;
1182 case FB_BLANK_HSYNC_SUSPEND: seq = 0x20; crtc = 0x20; break;
1183 case FB_BLANK_POWERDOWN: seq = 0x20; crtc = 0x30; break;
1184 default: seq = 0x00; crtc = 0x00; break;
1185 }
1186
1187 CRITBEGIN
1188
1189 mga_outb(M_SEQ_INDEX, 1);
1190 mga_outb(M_SEQ_DATA, (mga_inb(M_SEQ_DATA) & ~0x20) | seq);
1191 mga_outb(M_EXTVGA_INDEX, 1);
1192 mga_outb(M_EXTVGA_DATA, (mga_inb(M_EXTVGA_DATA) & ~0x30) | crtc);
1193
1194 CRITEND
1195 return 0;
1196}
1197
1198static struct fb_ops matroxfb_ops = {
1199 .owner = THIS_MODULE,
1200 .fb_open = matroxfb_open,
1201 .fb_release = matroxfb_release,
1202 .fb_check_var = matroxfb_check_var,
1203 .fb_set_par = matroxfb_set_par,
1204 .fb_setcolreg = matroxfb_setcolreg,
1205 .fb_pan_display =matroxfb_pan_display,
1206 .fb_blank = matroxfb_blank,
1207 .fb_ioctl = matroxfb_ioctl,
1208/* .fb_fillrect = <set by matrox_cfbX_init>, */
1209/* .fb_copyarea = <set by matrox_cfbX_init>, */
1210/* .fb_imageblit = <set by matrox_cfbX_init>, */
1211/* .fb_cursor = <set by matrox_cfbX_init>, */
1212};
1213
1214#define RSDepth(X) (((X) >> 8) & 0x0F)
1215#define RS8bpp 0x1
1216#define RS15bpp 0x2
1217#define RS16bpp 0x3
1218#define RS32bpp 0x4
1219#define RS4bpp 0x5
1220#define RS24bpp 0x6
1221#define RSText 0x7
1222#define RSText8 0x8
1223/* 9-F */
1224static struct { struct fb_bitfield red, green, blue, transp; int bits_per_pixel; } colors[] = {
1225 { { 0, 8, 0}, { 0, 8, 0}, { 0, 8, 0}, { 0, 0, 0}, 8 },
1226 { { 10, 5, 0}, { 5, 5, 0}, { 0, 5, 0}, { 15, 1, 0}, 16 },
1227 { { 11, 5, 0}, { 5, 6, 0}, { 0, 5, 0}, { 0, 0, 0}, 16 },
1228 { { 16, 8, 0}, { 8, 8, 0}, { 0, 8, 0}, { 24, 8, 0}, 32 },
1229 { { 0, 8, 0}, { 0, 8, 0}, { 0, 8, 0}, { 0, 0, 0}, 4 },
1230 { { 16, 8, 0}, { 8, 8, 0}, { 0, 8, 0}, { 0, 0, 0}, 24 },
1231 { { 0, 6, 0}, { 0, 6, 0}, { 0, 6, 0}, { 0, 0, 0}, 0 }, /* textmode with (default) VGA8x16 */
1232 { { 0, 6, 0}, { 0, 6, 0}, { 0, 6, 0}, { 0, 0, 0}, 0 }, /* textmode hardwired to VGA8x8 */
1233};
1234
1235/* initialized by setup, see explanation at end of file (search for MODULE_PARM_DESC) */
1236static unsigned int mem; /* "matrox:mem:xxxxxM" */
1237static int option_precise_width = 1; /* cannot be changed, option_precise_width==0 must imply noaccel */
1238static int inv24; /* "matrox:inv24" */
1239static int cross4MB = -1; /* "matrox:cross4MB" */
1240static int disabled; /* "matrox:disabled" */
1241static int noaccel; /* "matrox:noaccel" */
1242static int nopan; /* "matrox:nopan" */
1243static int no_pci_retry; /* "matrox:nopciretry" */
1244static int novga; /* "matrox:novga" */
1245static int nobios; /* "matrox:nobios" */
1246static int noinit = 1; /* "matrox:init" */
1247static int inverse; /* "matrox:inverse" */
1248static int sgram; /* "matrox:sgram" */
1249#ifdef CONFIG_MTRR
1250static int mtrr = 1; /* "matrox:nomtrr" */
1251#endif
1252static int grayscale; /* "matrox:grayscale" */
1253static int dev = -1; /* "matrox:dev:xxxxx" */
1254static unsigned int vesa = ~0; /* "matrox:vesa:xxxxx" */
1255static int depth = -1; /* "matrox:depth:xxxxx" */
1256static unsigned int xres; /* "matrox:xres:xxxxx" */
1257static unsigned int yres; /* "matrox:yres:xxxxx" */
1258static unsigned int upper = ~0; /* "matrox:upper:xxxxx" */
1259static unsigned int lower = ~0; /* "matrox:lower:xxxxx" */
1260static unsigned int vslen; /* "matrox:vslen:xxxxx" */
1261static unsigned int left = ~0; /* "matrox:left:xxxxx" */
1262static unsigned int right = ~0; /* "matrox:right:xxxxx" */
1263static unsigned int hslen; /* "matrox:hslen:xxxxx" */
1264static unsigned int pixclock; /* "matrox:pixclock:xxxxx" */
1265static int sync = -1; /* "matrox:sync:xxxxx" */
1266static unsigned int fv; /* "matrox:fv:xxxxx" */
1267static unsigned int fh; /* "matrox:fh:xxxxxk" */
1268static unsigned int maxclk; /* "matrox:maxclk:xxxxM" */
1269static int dfp; /* "matrox:dfp */
1270static int dfp_type = -1; /* "matrox:dfp:xxx */
1271static int memtype = -1; /* "matrox:memtype:xxx" */
1272static char outputs[8]; /* "matrox:outputs:xxx" */
1273
1274#ifndef MODULE
1275static char videomode[64]; /* "matrox:mode:xxxxx" or "matrox:xxxxx" */
1276#endif
1277
1278static int matroxfb_getmemory(WPMINFO unsigned int maxSize, unsigned int *realSize){
1279 vaddr_t vm;
1280 unsigned int offs;
1281 unsigned int offs2;