projects / deliverable / linux.git / blame
| Commit | Line | Data |
|---|---|---|
| 17a1217e AG |
1 | #ifndef __MB862XX_H__ |
| 2 | #define __MB862XX_H__ | |
| 3 | ||
| 4 | #define PCI_VENDOR_ID_FUJITSU_LIMITED 0x10cf | |
| 5 | #define PCI_DEVICE_ID_FUJITSU_CORALP 0x2019 | |
| 6 | #define PCI_DEVICE_ID_FUJITSU_CORALPA 0x201e | |
| 7 | #define PCI_DEVICE_ID_FUJITSU_CARMINE 0x202b | |
| 8 | ||
| 9 | #define GC_MMR_CORALP_EVB_VAL 0x11d7fa13 | |
| 10 | ||
| 11 | enum gdctype { | |
| 12 | BT_NONE, | |
| 13 | BT_LIME, | |
| 14 | BT_MINT, | |
| 15 | BT_CORAL, | |
| 16 | BT_CORALP, | |
| 17 | BT_CARMINE, | |
| 18 | }; | |
| 19 | ||
| 20 | struct mb862xx_gc_mode { | |
| 21 | struct fb_videomode def_mode; /* mode of connected display */ | |
| 22 | unsigned int def_bpp; /* default depth */ | |
| 23 | unsigned long max_vram; /* connected SDRAM size */ | |
| 24 | unsigned long ccf; /* gdc clk */ | |
| 25 | unsigned long mmr; /* memory mode for SDRAM */ | |
| 26 | }; | |
| 27 | ||
| 28 | /* private data */ | |
| 29 | struct mb862xxfb_par { | |
| 30 | struct fb_info *info; /* fb info head */ | |
| 31 | struct device *dev; | |
| 32 | struct pci_dev *pdev; | |
| 33 | struct resource *res; /* framebuffer/mmio resource */ | |
| 34 | ||
| 35 | resource_size_t fb_base_phys; /* fb base, 36-bit PPC440EPx */ | |
| 36 | resource_size_t mmio_base_phys; /* io base addr */ | |
| 37 | void __iomem *fb_base; /* remapped framebuffer */ | |
| 38 | void __iomem *mmio_base; /* remapped registers */ | |
| 39 | size_t mapped_vram; /* length of remapped vram */ | |
| 40 | size_t mmio_len; /* length of register region */ | |
| 41 | ||
| 42 | void __iomem *host; /* relocatable reg. bases */ | |
| 43 | void __iomem *i2c; | |
| 44 | void __iomem *disp; | |
| 45 | void __iomem *disp1; | |
| 46 | void __iomem *cap; | |
| 47 | void __iomem *cap1; | |
| 48 | void __iomem *draw; | |
| 49 | void __iomem *geo; | |
| 50 | void __iomem *pio; | |
| 51 | void __iomem *ctrl; | |
| 52 | void __iomem *dram_ctrl; | |
| 53 | void __iomem *wrback; | |
| 54 | ||
| 55 | unsigned int irq; | |
| 56 | unsigned int type; /* GDC type */ | |
| 57 | unsigned int refclk; /* disp. reference clock */ | |
| 58 | struct mb862xx_gc_mode *gc_mode; /* GDC mode init data */ | |
| 59 | int pre_init; /* don't init display if 1 */ | |
| 60 | ||
| 61 | u32 pseudo_palette[16]; | |
| 62 | }; | |
| 63 | ||
| 2ec509b9 VS |
64 | extern void mb862xxfb_init_accel(struct fb_info *info, int xres); |
| 65 | ||
| 17a1217e AG |
66 | #if defined(CONFIG_FB_MB862XX_LIME) && defined(CONFIG_FB_MB862XX_PCI_GDC) |
| 67 | #error "Select Lime GDC or CoralP/Carmine support, but not both together" | |
| 68 | #endif | |
| 69 | #if defined(CONFIG_FB_MB862XX_LIME) | |
| 70 | #define gdc_read __raw_readl | |
| 71 | #define gdc_write __raw_writel | |
| 72 | #else | |
| 73 | #define gdc_read readl | |
| 74 | #define gdc_write writel | |
| 75 | #endif | |
| 76 | ||
| 77 | #define inreg(type, off) \ | |
| 78 | gdc_read((par->type + (off))) | |
| 79 | ||
| 80 | #define outreg(type, off, val) \ | |
| 81 | gdc_write((val), (par->type + (off))) | |
| 82 | ||
| 83 | #define pack(a, b) (((a) << 16) | (b)) | |
| 84 | ||
| 85 | #endif |