Commit | Line | Data |
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e1ef4d23 AT |
1 | /* |
2 | * linux/drivers/video/omap2/dss/dss_features.c | |
3 | * | |
4 | * Copyright (C) 2010 Texas Instruments | |
5 | * Author: Archit Taneja <archit@ti.com> | |
6 | * | |
7 | * This program is free software; you can redistribute it and/or modify it | |
8 | * under the terms of the GNU General Public License version 2 as published by | |
9 | * the Free Software Foundation. | |
10 | * | |
11 | * This program is distributed in the hope that it will be useful, but WITHOUT | |
12 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
13 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | |
14 | * more details. | |
15 | * | |
16 | * You should have received a copy of the GNU General Public License along with | |
17 | * this program. If not, see <http://www.gnu.org/licenses/>. | |
18 | */ | |
19 | ||
20 | #include <linux/kernel.h> | |
eda34273 | 21 | #include <linux/module.h> |
e1ef4d23 AT |
22 | #include <linux/types.h> |
23 | #include <linux/err.h> | |
24 | #include <linux/slab.h> | |
25 | ||
a0b38cc4 | 26 | #include <video/omapdss.h> |
e1ef4d23 | 27 | |
067a57e4 | 28 | #include "dss.h" |
e1ef4d23 AT |
29 | #include "dss_features.h" |
30 | ||
31 | /* Defines a generic omap register field */ | |
32 | struct dss_reg_field { | |
e1ef4d23 AT |
33 | u8 start, end; |
34 | }; | |
35 | ||
31ef8237 TA |
36 | struct dss_param_range { |
37 | int min, max; | |
38 | }; | |
39 | ||
e1ef4d23 AT |
40 | struct omap_dss_features { |
41 | const struct dss_reg_field *reg_fields; | |
42 | const int num_reg_fields; | |
43 | ||
c124f23d AT |
44 | const enum dss_feat_id *features; |
45 | const int num_features; | |
e1ef4d23 AT |
46 | |
47 | const int num_mgrs; | |
48 | const int num_ovls; | |
7a155be3 | 49 | const int num_wbs; |
e1ef4d23 | 50 | const enum omap_display_type *supported_displays; |
97f01b3a | 51 | const enum omap_dss_output_id *supported_outputs; |
e1ef4d23 | 52 | const enum omap_color_mode *supported_color_modes; |
67019db8 | 53 | const enum omap_overlay_caps *overlay_caps; |
235e7dba | 54 | const char * const *clksrc_names; |
31ef8237 | 55 | const struct dss_param_range *dss_params; |
5ed8cf5b | 56 | |
65e006ff CM |
57 | const enum omap_dss_rotation_type supported_rotation_types; |
58 | ||
5ed8cf5b TV |
59 | const u32 buffer_size_unit; |
60 | const u32 burst_size_unit; | |
e1ef4d23 AT |
61 | }; |
62 | ||
63 | /* This struct is assigned to one of the below during initialization */ | |
ea290333 | 64 | static const struct omap_dss_features *omap_current_dss_features; |
e1ef4d23 AT |
65 | |
66 | static const struct dss_reg_field omap2_dss_reg_fields[] = { | |
49641116 TA |
67 | [FEAT_REG_FIRHINC] = { 11, 0 }, |
68 | [FEAT_REG_FIRVINC] = { 27, 16 }, | |
69 | [FEAT_REG_FIFOLOWTHRESHOLD] = { 8, 0 }, | |
70 | [FEAT_REG_FIFOHIGHTHRESHOLD] = { 24, 16 }, | |
71 | [FEAT_REG_FIFOSIZE] = { 8, 0 }, | |
72 | [FEAT_REG_HORIZONTALACCU] = { 9, 0 }, | |
73 | [FEAT_REG_VERTICALACCU] = { 25, 16 }, | |
74 | [FEAT_REG_DISPC_CLK_SWITCH] = { 0, 0 }, | |
75 | [FEAT_REG_DSIPLL_REGN] = { 0, 0 }, | |
76 | [FEAT_REG_DSIPLL_REGM] = { 0, 0 }, | |
77 | [FEAT_REG_DSIPLL_REGM_DISPC] = { 0, 0 }, | |
78 | [FEAT_REG_DSIPLL_REGM_DSI] = { 0, 0 }, | |
e1ef4d23 AT |
79 | }; |
80 | ||
81 | static const struct dss_reg_field omap3_dss_reg_fields[] = { | |
49641116 TA |
82 | [FEAT_REG_FIRHINC] = { 12, 0 }, |
83 | [FEAT_REG_FIRVINC] = { 28, 16 }, | |
84 | [FEAT_REG_FIFOLOWTHRESHOLD] = { 11, 0 }, | |
85 | [FEAT_REG_FIFOHIGHTHRESHOLD] = { 27, 16 }, | |
86 | [FEAT_REG_FIFOSIZE] = { 10, 0 }, | |
87 | [FEAT_REG_HORIZONTALACCU] = { 9, 0 }, | |
88 | [FEAT_REG_VERTICALACCU] = { 25, 16 }, | |
89 | [FEAT_REG_DISPC_CLK_SWITCH] = { 0, 0 }, | |
90 | [FEAT_REG_DSIPLL_REGN] = { 7, 1 }, | |
91 | [FEAT_REG_DSIPLL_REGM] = { 18, 8 }, | |
92 | [FEAT_REG_DSIPLL_REGM_DISPC] = { 22, 19 }, | |
93 | [FEAT_REG_DSIPLL_REGM_DSI] = { 26, 23 }, | |
87a7484b AT |
94 | }; |
95 | ||
96 | static const struct dss_reg_field omap4_dss_reg_fields[] = { | |
49641116 TA |
97 | [FEAT_REG_FIRHINC] = { 12, 0 }, |
98 | [FEAT_REG_FIRVINC] = { 28, 16 }, | |
99 | [FEAT_REG_FIFOLOWTHRESHOLD] = { 15, 0 }, | |
100 | [FEAT_REG_FIFOHIGHTHRESHOLD] = { 31, 16 }, | |
101 | [FEAT_REG_FIFOSIZE] = { 15, 0 }, | |
102 | [FEAT_REG_HORIZONTALACCU] = { 10, 0 }, | |
103 | [FEAT_REG_VERTICALACCU] = { 26, 16 }, | |
104 | [FEAT_REG_DISPC_CLK_SWITCH] = { 9, 8 }, | |
105 | [FEAT_REG_DSIPLL_REGN] = { 8, 1 }, | |
106 | [FEAT_REG_DSIPLL_REGM] = { 20, 9 }, | |
107 | [FEAT_REG_DSIPLL_REGM_DISPC] = { 25, 21 }, | |
108 | [FEAT_REG_DSIPLL_REGM_DSI] = { 30, 26 }, | |
e1ef4d23 AT |
109 | }; |
110 | ||
23362832 AT |
111 | static const struct dss_reg_field omap5_dss_reg_fields[] = { |
112 | [FEAT_REG_FIRHINC] = { 12, 0 }, | |
113 | [FEAT_REG_FIRVINC] = { 28, 16 }, | |
114 | [FEAT_REG_FIFOLOWTHRESHOLD] = { 15, 0 }, | |
115 | [FEAT_REG_FIFOHIGHTHRESHOLD] = { 31, 16 }, | |
116 | [FEAT_REG_FIFOSIZE] = { 15, 0 }, | |
117 | [FEAT_REG_HORIZONTALACCU] = { 10, 0 }, | |
118 | [FEAT_REG_VERTICALACCU] = { 26, 16 }, | |
119 | [FEAT_REG_DISPC_CLK_SWITCH] = { 9, 7 }, | |
120 | [FEAT_REG_DSIPLL_REGN] = { 8, 1 }, | |
121 | [FEAT_REG_DSIPLL_REGM] = { 20, 9 }, | |
122 | [FEAT_REG_DSIPLL_REGM_DISPC] = { 25, 21 }, | |
123 | [FEAT_REG_DSIPLL_REGM_DSI] = { 30, 26 }, | |
124 | }; | |
125 | ||
e1ef4d23 AT |
126 | static const enum omap_display_type omap2_dss_supported_displays[] = { |
127 | /* OMAP_DSS_CHANNEL_LCD */ | |
f8df01f1 | 128 | OMAP_DISPLAY_TYPE_DPI | OMAP_DISPLAY_TYPE_DBI, |
e1ef4d23 AT |
129 | |
130 | /* OMAP_DSS_CHANNEL_DIGIT */ | |
131 | OMAP_DISPLAY_TYPE_VENC, | |
132 | }; | |
133 | ||
4e777dd7 | 134 | static const enum omap_display_type omap3430_dss_supported_displays[] = { |
e1ef4d23 AT |
135 | /* OMAP_DSS_CHANNEL_LCD */ |
136 | OMAP_DISPLAY_TYPE_DPI | OMAP_DISPLAY_TYPE_DBI | | |
137 | OMAP_DISPLAY_TYPE_SDI | OMAP_DISPLAY_TYPE_DSI, | |
138 | ||
139 | /* OMAP_DSS_CHANNEL_DIGIT */ | |
140 | OMAP_DISPLAY_TYPE_VENC, | |
141 | }; | |
142 | ||
4e777dd7 TV |
143 | static const enum omap_display_type omap3630_dss_supported_displays[] = { |
144 | /* OMAP_DSS_CHANNEL_LCD */ | |
145 | OMAP_DISPLAY_TYPE_DPI | OMAP_DISPLAY_TYPE_DBI | | |
146 | OMAP_DISPLAY_TYPE_DSI, | |
147 | ||
148 | /* OMAP_DSS_CHANNEL_DIGIT */ | |
149 | OMAP_DISPLAY_TYPE_VENC, | |
150 | }; | |
151 | ||
d50cd037 AT |
152 | static const enum omap_display_type omap4_dss_supported_displays[] = { |
153 | /* OMAP_DSS_CHANNEL_LCD */ | |
154 | OMAP_DISPLAY_TYPE_DBI | OMAP_DISPLAY_TYPE_DSI, | |
155 | ||
156 | /* OMAP_DSS_CHANNEL_DIGIT */ | |
b119601d | 157 | OMAP_DISPLAY_TYPE_VENC | OMAP_DISPLAY_TYPE_HDMI, |
d50cd037 AT |
158 | |
159 | /* OMAP_DSS_CHANNEL_LCD2 */ | |
160 | OMAP_DISPLAY_TYPE_DPI | OMAP_DISPLAY_TYPE_DBI | | |
161 | OMAP_DISPLAY_TYPE_DSI, | |
162 | }; | |
163 | ||
23362832 AT |
164 | static const enum omap_display_type omap5_dss_supported_displays[] = { |
165 | /* OMAP_DSS_CHANNEL_LCD */ | |
166 | OMAP_DISPLAY_TYPE_DPI | OMAP_DISPLAY_TYPE_DBI | | |
167 | OMAP_DISPLAY_TYPE_DSI, | |
168 | ||
169 | /* OMAP_DSS_CHANNEL_DIGIT */ | |
170 | OMAP_DISPLAY_TYPE_HDMI | OMAP_DISPLAY_TYPE_DPI, | |
171 | ||
172 | /* OMAP_DSS_CHANNEL_LCD2 */ | |
173 | OMAP_DISPLAY_TYPE_DPI | OMAP_DISPLAY_TYPE_DBI | | |
174 | OMAP_DISPLAY_TYPE_DSI, | |
175 | }; | |
176 | ||
97f01b3a AT |
177 | static const enum omap_dss_output_id omap2_dss_supported_outputs[] = { |
178 | /* OMAP_DSS_CHANNEL_LCD */ | |
179 | OMAP_DSS_OUTPUT_DPI | OMAP_DSS_OUTPUT_DBI, | |
180 | ||
181 | /* OMAP_DSS_CHANNEL_DIGIT */ | |
182 | OMAP_DSS_OUTPUT_VENC, | |
183 | }; | |
184 | ||
185 | static const enum omap_dss_output_id omap3430_dss_supported_outputs[] = { | |
186 | /* OMAP_DSS_CHANNEL_LCD */ | |
187 | OMAP_DSS_OUTPUT_DPI | OMAP_DSS_OUTPUT_DBI | | |
188 | OMAP_DSS_OUTPUT_SDI | OMAP_DSS_OUTPUT_DSI1, | |
189 | ||
190 | /* OMAP_DSS_CHANNEL_DIGIT */ | |
191 | OMAP_DSS_OUTPUT_VENC, | |
192 | }; | |
193 | ||
194 | static const enum omap_dss_output_id omap3630_dss_supported_outputs[] = { | |
195 | /* OMAP_DSS_CHANNEL_LCD */ | |
196 | OMAP_DSS_OUTPUT_DPI | OMAP_DSS_OUTPUT_DBI | | |
197 | OMAP_DSS_OUTPUT_DSI1, | |
198 | ||
199 | /* OMAP_DSS_CHANNEL_DIGIT */ | |
200 | OMAP_DSS_OUTPUT_VENC, | |
201 | }; | |
202 | ||
203 | static const enum omap_dss_output_id omap4_dss_supported_outputs[] = { | |
204 | /* OMAP_DSS_CHANNEL_LCD */ | |
ff588d83 | 205 | OMAP_DSS_OUTPUT_DBI | OMAP_DSS_OUTPUT_DSI1, |
97f01b3a AT |
206 | |
207 | /* OMAP_DSS_CHANNEL_DIGIT */ | |
ff588d83 | 208 | OMAP_DSS_OUTPUT_VENC | OMAP_DSS_OUTPUT_HDMI, |
97f01b3a AT |
209 | |
210 | /* OMAP_DSS_CHANNEL_LCD2 */ | |
211 | OMAP_DSS_OUTPUT_DPI | OMAP_DSS_OUTPUT_DBI | | |
212 | OMAP_DSS_OUTPUT_DSI2, | |
213 | }; | |
214 | ||
215 | static const enum omap_dss_output_id omap5_dss_supported_outputs[] = { | |
216 | /* OMAP_DSS_CHANNEL_LCD */ | |
217 | OMAP_DSS_OUTPUT_DPI | OMAP_DSS_OUTPUT_DBI | | |
218 | OMAP_DSS_OUTPUT_DSI1 | OMAP_DSS_OUTPUT_DSI2, | |
219 | ||
220 | /* OMAP_DSS_CHANNEL_DIGIT */ | |
221 | OMAP_DSS_OUTPUT_HDMI | OMAP_DSS_OUTPUT_DPI, | |
222 | ||
223 | /* OMAP_DSS_CHANNEL_LCD2 */ | |
224 | OMAP_DSS_OUTPUT_DPI | OMAP_DSS_OUTPUT_DBI | | |
225 | OMAP_DSS_OUTPUT_DSI1, | |
226 | ||
227 | /* OMAP_DSS_CHANNEL_LCD3 */ | |
228 | OMAP_DSS_OUTPUT_DPI | OMAP_DSS_OUTPUT_DBI | | |
229 | OMAP_DSS_OUTPUT_DSI2, | |
230 | }; | |
231 | ||
e1ef4d23 AT |
232 | static const enum omap_color_mode omap2_dss_supported_color_modes[] = { |
233 | /* OMAP_DSS_GFX */ | |
234 | OMAP_DSS_COLOR_CLUT1 | OMAP_DSS_COLOR_CLUT2 | | |
235 | OMAP_DSS_COLOR_CLUT4 | OMAP_DSS_COLOR_CLUT8 | | |
236 | OMAP_DSS_COLOR_RGB12U | OMAP_DSS_COLOR_RGB16 | | |
237 | OMAP_DSS_COLOR_RGB24U | OMAP_DSS_COLOR_RGB24P, | |
238 | ||
239 | /* OMAP_DSS_VIDEO1 */ | |
240 | OMAP_DSS_COLOR_RGB16 | OMAP_DSS_COLOR_RGB24U | | |
241 | OMAP_DSS_COLOR_RGB24P | OMAP_DSS_COLOR_YUV2 | | |
242 | OMAP_DSS_COLOR_UYVY, | |
243 | ||
244 | /* OMAP_DSS_VIDEO2 */ | |
245 | OMAP_DSS_COLOR_RGB16 | OMAP_DSS_COLOR_RGB24U | | |
246 | OMAP_DSS_COLOR_RGB24P | OMAP_DSS_COLOR_YUV2 | | |
247 | OMAP_DSS_COLOR_UYVY, | |
248 | }; | |
249 | ||
250 | static const enum omap_color_mode omap3_dss_supported_color_modes[] = { | |
251 | /* OMAP_DSS_GFX */ | |
252 | OMAP_DSS_COLOR_CLUT1 | OMAP_DSS_COLOR_CLUT2 | | |
253 | OMAP_DSS_COLOR_CLUT4 | OMAP_DSS_COLOR_CLUT8 | | |
254 | OMAP_DSS_COLOR_RGB12U | OMAP_DSS_COLOR_ARGB16 | | |
255 | OMAP_DSS_COLOR_RGB16 | OMAP_DSS_COLOR_RGB24U | | |
256 | OMAP_DSS_COLOR_RGB24P | OMAP_DSS_COLOR_ARGB32 | | |
257 | OMAP_DSS_COLOR_RGBA32 | OMAP_DSS_COLOR_RGBX32, | |
258 | ||
259 | /* OMAP_DSS_VIDEO1 */ | |
260 | OMAP_DSS_COLOR_RGB24U | OMAP_DSS_COLOR_RGB24P | | |
261 | OMAP_DSS_COLOR_RGB12U | OMAP_DSS_COLOR_RGB16 | | |
262 | OMAP_DSS_COLOR_YUV2 | OMAP_DSS_COLOR_UYVY, | |
263 | ||
264 | /* OMAP_DSS_VIDEO2 */ | |
265 | OMAP_DSS_COLOR_RGB12U | OMAP_DSS_COLOR_ARGB16 | | |
266 | OMAP_DSS_COLOR_RGB16 | OMAP_DSS_COLOR_RGB24U | | |
267 | OMAP_DSS_COLOR_RGB24P | OMAP_DSS_COLOR_YUV2 | | |
268 | OMAP_DSS_COLOR_UYVY | OMAP_DSS_COLOR_ARGB32 | | |
269 | OMAP_DSS_COLOR_RGBA32 | OMAP_DSS_COLOR_RGBX32, | |
270 | }; | |
271 | ||
f20e4220 AJ |
272 | static const enum omap_color_mode omap4_dss_supported_color_modes[] = { |
273 | /* OMAP_DSS_GFX */ | |
274 | OMAP_DSS_COLOR_CLUT1 | OMAP_DSS_COLOR_CLUT2 | | |
275 | OMAP_DSS_COLOR_CLUT4 | OMAP_DSS_COLOR_CLUT8 | | |
276 | OMAP_DSS_COLOR_RGB12U | OMAP_DSS_COLOR_ARGB16 | | |
277 | OMAP_DSS_COLOR_RGB16 | OMAP_DSS_COLOR_RGB24U | | |
278 | OMAP_DSS_COLOR_RGB24P | OMAP_DSS_COLOR_ARGB32 | | |
279 | OMAP_DSS_COLOR_RGBA32 | OMAP_DSS_COLOR_RGBX32 | | |
08f3267e LM |
280 | OMAP_DSS_COLOR_ARGB16_1555 | OMAP_DSS_COLOR_RGBX16 | |
281 | OMAP_DSS_COLOR_RGBA16 | OMAP_DSS_COLOR_XRGB16_1555, | |
f20e4220 AJ |
282 | |
283 | /* OMAP_DSS_VIDEO1 */ | |
284 | OMAP_DSS_COLOR_RGB16 | OMAP_DSS_COLOR_RGB12U | | |
285 | OMAP_DSS_COLOR_YUV2 | OMAP_DSS_COLOR_ARGB16_1555 | | |
286 | OMAP_DSS_COLOR_RGBA32 | OMAP_DSS_COLOR_NV12 | | |
287 | OMAP_DSS_COLOR_RGBA16 | OMAP_DSS_COLOR_RGB24U | | |
288 | OMAP_DSS_COLOR_RGB24P | OMAP_DSS_COLOR_UYVY | | |
289 | OMAP_DSS_COLOR_ARGB16 | OMAP_DSS_COLOR_XRGB16_1555 | | |
290 | OMAP_DSS_COLOR_ARGB32 | OMAP_DSS_COLOR_RGBX16 | | |
291 | OMAP_DSS_COLOR_RGBX32, | |
292 | ||
293 | /* OMAP_DSS_VIDEO2 */ | |
294 | OMAP_DSS_COLOR_RGB16 | OMAP_DSS_COLOR_RGB12U | | |
295 | OMAP_DSS_COLOR_YUV2 | OMAP_DSS_COLOR_ARGB16_1555 | | |
296 | OMAP_DSS_COLOR_RGBA32 | OMAP_DSS_COLOR_NV12 | | |
297 | OMAP_DSS_COLOR_RGBA16 | OMAP_DSS_COLOR_RGB24U | | |
298 | OMAP_DSS_COLOR_RGB24P | OMAP_DSS_COLOR_UYVY | | |
299 | OMAP_DSS_COLOR_ARGB16 | OMAP_DSS_COLOR_XRGB16_1555 | | |
300 | OMAP_DSS_COLOR_ARGB32 | OMAP_DSS_COLOR_RGBX16 | | |
301 | OMAP_DSS_COLOR_RGBX32, | |
b8c095b4 AT |
302 | |
303 | /* OMAP_DSS_VIDEO3 */ | |
304 | OMAP_DSS_COLOR_RGB16 | OMAP_DSS_COLOR_RGB12U | | |
305 | OMAP_DSS_COLOR_YUV2 | OMAP_DSS_COLOR_ARGB16_1555 | | |
306 | OMAP_DSS_COLOR_RGBA32 | OMAP_DSS_COLOR_NV12 | | |
307 | OMAP_DSS_COLOR_RGBA16 | OMAP_DSS_COLOR_RGB24U | | |
308 | OMAP_DSS_COLOR_RGB24P | OMAP_DSS_COLOR_UYVY | | |
309 | OMAP_DSS_COLOR_ARGB16 | OMAP_DSS_COLOR_XRGB16_1555 | | |
310 | OMAP_DSS_COLOR_ARGB32 | OMAP_DSS_COLOR_RGBX16 | | |
311 | OMAP_DSS_COLOR_RGBX32, | |
7a155be3 AT |
312 | |
313 | /* OMAP_DSS_WB */ | |
314 | OMAP_DSS_COLOR_RGB16 | OMAP_DSS_COLOR_RGB12U | | |
315 | OMAP_DSS_COLOR_YUV2 | OMAP_DSS_COLOR_ARGB16_1555 | | |
316 | OMAP_DSS_COLOR_RGBA32 | OMAP_DSS_COLOR_NV12 | | |
317 | OMAP_DSS_COLOR_RGBA16 | OMAP_DSS_COLOR_RGB24U | | |
318 | OMAP_DSS_COLOR_RGB24P | OMAP_DSS_COLOR_UYVY | | |
319 | OMAP_DSS_COLOR_ARGB16 | OMAP_DSS_COLOR_XRGB16_1555 | | |
320 | OMAP_DSS_COLOR_ARGB32 | OMAP_DSS_COLOR_RGBX16 | | |
321 | OMAP_DSS_COLOR_RGBX32, | |
f20e4220 AJ |
322 | }; |
323 | ||
67019db8 TV |
324 | static const enum omap_overlay_caps omap2_dss_overlay_caps[] = { |
325 | /* OMAP_DSS_GFX */ | |
d79db853 | 326 | OMAP_DSS_OVL_CAP_POS | OMAP_DSS_OVL_CAP_REPLICATION, |
67019db8 TV |
327 | |
328 | /* OMAP_DSS_VIDEO1 */ | |
d79db853 AT |
329 | OMAP_DSS_OVL_CAP_SCALE | OMAP_DSS_OVL_CAP_POS | |
330 | OMAP_DSS_OVL_CAP_REPLICATION, | |
67019db8 TV |
331 | |
332 | /* OMAP_DSS_VIDEO2 */ | |
d79db853 AT |
333 | OMAP_DSS_OVL_CAP_SCALE | OMAP_DSS_OVL_CAP_POS | |
334 | OMAP_DSS_OVL_CAP_REPLICATION, | |
67019db8 TV |
335 | }; |
336 | ||
337 | static const enum omap_overlay_caps omap3430_dss_overlay_caps[] = { | |
338 | /* OMAP_DSS_GFX */ | |
d79db853 AT |
339 | OMAP_DSS_OVL_CAP_GLOBAL_ALPHA | OMAP_DSS_OVL_CAP_POS | |
340 | OMAP_DSS_OVL_CAP_REPLICATION, | |
67019db8 TV |
341 | |
342 | /* OMAP_DSS_VIDEO1 */ | |
d79db853 AT |
343 | OMAP_DSS_OVL_CAP_SCALE | OMAP_DSS_OVL_CAP_POS | |
344 | OMAP_DSS_OVL_CAP_REPLICATION, | |
67019db8 TV |
345 | |
346 | /* OMAP_DSS_VIDEO2 */ | |
d79db853 AT |
347 | OMAP_DSS_OVL_CAP_SCALE | OMAP_DSS_OVL_CAP_GLOBAL_ALPHA | |
348 | OMAP_DSS_OVL_CAP_POS | OMAP_DSS_OVL_CAP_REPLICATION, | |
67019db8 TV |
349 | }; |
350 | ||
351 | static const enum omap_overlay_caps omap3630_dss_overlay_caps[] = { | |
352 | /* OMAP_DSS_GFX */ | |
d79db853 AT |
353 | OMAP_DSS_OVL_CAP_GLOBAL_ALPHA | OMAP_DSS_OVL_CAP_PRE_MULT_ALPHA | |
354 | OMAP_DSS_OVL_CAP_POS | OMAP_DSS_OVL_CAP_REPLICATION, | |
67019db8 TV |
355 | |
356 | /* OMAP_DSS_VIDEO1 */ | |
d79db853 AT |
357 | OMAP_DSS_OVL_CAP_SCALE | OMAP_DSS_OVL_CAP_POS | |
358 | OMAP_DSS_OVL_CAP_REPLICATION, | |
67019db8 TV |
359 | |
360 | /* OMAP_DSS_VIDEO2 */ | |
f6dc8150 | 361 | OMAP_DSS_OVL_CAP_SCALE | OMAP_DSS_OVL_CAP_GLOBAL_ALPHA | |
d79db853 AT |
362 | OMAP_DSS_OVL_CAP_PRE_MULT_ALPHA | OMAP_DSS_OVL_CAP_POS | |
363 | OMAP_DSS_OVL_CAP_REPLICATION, | |
67019db8 TV |
364 | }; |
365 | ||
366 | static const enum omap_overlay_caps omap4_dss_overlay_caps[] = { | |
367 | /* OMAP_DSS_GFX */ | |
11354dd5 | 368 | OMAP_DSS_OVL_CAP_GLOBAL_ALPHA | OMAP_DSS_OVL_CAP_PRE_MULT_ALPHA | |
d79db853 AT |
369 | OMAP_DSS_OVL_CAP_ZORDER | OMAP_DSS_OVL_CAP_POS | |
370 | OMAP_DSS_OVL_CAP_REPLICATION, | |
67019db8 TV |
371 | |
372 | /* OMAP_DSS_VIDEO1 */ | |
f6dc8150 | 373 | OMAP_DSS_OVL_CAP_SCALE | OMAP_DSS_OVL_CAP_GLOBAL_ALPHA | |
d79db853 AT |
374 | OMAP_DSS_OVL_CAP_PRE_MULT_ALPHA | OMAP_DSS_OVL_CAP_ZORDER | |
375 | OMAP_DSS_OVL_CAP_POS | OMAP_DSS_OVL_CAP_REPLICATION, | |
67019db8 TV |
376 | |
377 | /* OMAP_DSS_VIDEO2 */ | |
f6dc8150 | 378 | OMAP_DSS_OVL_CAP_SCALE | OMAP_DSS_OVL_CAP_GLOBAL_ALPHA | |
d79db853 AT |
379 | OMAP_DSS_OVL_CAP_PRE_MULT_ALPHA | OMAP_DSS_OVL_CAP_ZORDER | |
380 | OMAP_DSS_OVL_CAP_POS | OMAP_DSS_OVL_CAP_REPLICATION, | |
b8c095b4 AT |
381 | |
382 | /* OMAP_DSS_VIDEO3 */ | |
383 | OMAP_DSS_OVL_CAP_SCALE | OMAP_DSS_OVL_CAP_GLOBAL_ALPHA | | |
d79db853 AT |
384 | OMAP_DSS_OVL_CAP_PRE_MULT_ALPHA | OMAP_DSS_OVL_CAP_ZORDER | |
385 | OMAP_DSS_OVL_CAP_POS | OMAP_DSS_OVL_CAP_REPLICATION, | |
67019db8 TV |
386 | }; |
387 | ||
235e7dba | 388 | static const char * const omap2_dss_clk_source_names[] = { |
89a35e51 AT |
389 | [OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DISPC] = "N/A", |
390 | [OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DSI] = "N/A", | |
391 | [OMAP_DSS_CLK_SRC_FCK] = "DSS_FCLK1", | |
067a57e4 AT |
392 | }; |
393 | ||
235e7dba | 394 | static const char * const omap3_dss_clk_source_names[] = { |
89a35e51 AT |
395 | [OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DISPC] = "DSI1_PLL_FCLK", |
396 | [OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DSI] = "DSI2_PLL_FCLK", | |
397 | [OMAP_DSS_CLK_SRC_FCK] = "DSS1_ALWON_FCLK", | |
067a57e4 AT |
398 | }; |
399 | ||
235e7dba | 400 | static const char * const omap4_dss_clk_source_names[] = { |
89a35e51 AT |
401 | [OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DISPC] = "PLL1_CLK1", |
402 | [OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DSI] = "PLL1_CLK2", | |
403 | [OMAP_DSS_CLK_SRC_FCK] = "DSS_FCLK", | |
5a8b572d AT |
404 | [OMAP_DSS_CLK_SRC_DSI2_PLL_HSDIV_DISPC] = "PLL2_CLK1", |
405 | [OMAP_DSS_CLK_SRC_DSI2_PLL_HSDIV_DSI] = "PLL2_CLK2", | |
ea75159e TA |
406 | }; |
407 | ||
23362832 AT |
408 | static const char * const omap5_dss_clk_source_names[] = { |
409 | [OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DISPC] = "DPLL_DSI1_A_CLK1", | |
410 | [OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DSI] = "DPLL_DSI1_A_CLK2", | |
411 | [OMAP_DSS_CLK_SRC_FCK] = "DSS_CLK", | |
412 | [OMAP_DSS_CLK_SRC_DSI2_PLL_HSDIV_DISPC] = "DPLL_DSI1_C_CLK1", | |
413 | [OMAP_DSS_CLK_SRC_DSI2_PLL_HSDIV_DSI] = "DPLL_DSI1_C_CLK2", | |
414 | }; | |
415 | ||
31ef8237 | 416 | static const struct dss_param_range omap2_dss_param_range[] = { |
3729a70b | 417 | [FEAT_PARAM_DSS_FCK] = { 0, 133000000 }, |
9eaaf207 | 418 | [FEAT_PARAM_DSS_PCD] = { 2, 255 }, |
49641116 TA |
419 | [FEAT_PARAM_DSIPLL_REGN] = { 0, 0 }, |
420 | [FEAT_PARAM_DSIPLL_REGM] = { 0, 0 }, | |
421 | [FEAT_PARAM_DSIPLL_REGM_DISPC] = { 0, 0 }, | |
422 | [FEAT_PARAM_DSIPLL_REGM_DSI] = { 0, 0 }, | |
423 | [FEAT_PARAM_DSIPLL_FINT] = { 0, 0 }, | |
424 | [FEAT_PARAM_DSIPLL_LPDIV] = { 0, 0 }, | |
0373cac6 | 425 | [FEAT_PARAM_DOWNSCALE] = { 1, 2 }, |
7282f1b7 CM |
426 | /* |
427 | * Assuming the line width buffer to be 768 pixels as OMAP2 DISPC | |
428 | * scaler cannot scale a image with width more than 768. | |
429 | */ | |
430 | [FEAT_PARAM_LINEWIDTH] = { 1, 768 }, | |
31ef8237 TA |
431 | }; |
432 | ||
433 | static const struct dss_param_range omap3_dss_param_range[] = { | |
49641116 | 434 | [FEAT_PARAM_DSS_FCK] = { 0, 173000000 }, |
9eaaf207 | 435 | [FEAT_PARAM_DSS_PCD] = { 1, 255 }, |
49641116 TA |
436 | [FEAT_PARAM_DSIPLL_REGN] = { 0, (1 << 7) - 1 }, |
437 | [FEAT_PARAM_DSIPLL_REGM] = { 0, (1 << 11) - 1 }, | |
438 | [FEAT_PARAM_DSIPLL_REGM_DISPC] = { 0, (1 << 4) - 1 }, | |
439 | [FEAT_PARAM_DSIPLL_REGM_DSI] = { 0, (1 << 4) - 1 }, | |
440 | [FEAT_PARAM_DSIPLL_FINT] = { 750000, 2100000 }, | |
441 | [FEAT_PARAM_DSIPLL_LPDIV] = { 1, (1 << 13) - 1}, | |
bc63f304 | 442 | [FEAT_PARAM_DSI_FCK] = { 0, 173000000 }, |
0373cac6 | 443 | [FEAT_PARAM_DOWNSCALE] = { 1, 4 }, |
7282f1b7 | 444 | [FEAT_PARAM_LINEWIDTH] = { 1, 1024 }, |
31ef8237 TA |
445 | }; |
446 | ||
447 | static const struct dss_param_range omap4_dss_param_range[] = { | |
49641116 | 448 | [FEAT_PARAM_DSS_FCK] = { 0, 186000000 }, |
9eaaf207 | 449 | [FEAT_PARAM_DSS_PCD] = { 1, 255 }, |
49641116 TA |
450 | [FEAT_PARAM_DSIPLL_REGN] = { 0, (1 << 8) - 1 }, |
451 | [FEAT_PARAM_DSIPLL_REGM] = { 0, (1 << 12) - 1 }, | |
452 | [FEAT_PARAM_DSIPLL_REGM_DISPC] = { 0, (1 << 5) - 1 }, | |
453 | [FEAT_PARAM_DSIPLL_REGM_DSI] = { 0, (1 << 5) - 1 }, | |
454 | [FEAT_PARAM_DSIPLL_FINT] = { 500000, 2500000 }, | |
455 | [FEAT_PARAM_DSIPLL_LPDIV] = { 0, (1 << 13) - 1 }, | |
bc63f304 | 456 | [FEAT_PARAM_DSI_FCK] = { 0, 170000000 }, |
0373cac6 | 457 | [FEAT_PARAM_DOWNSCALE] = { 1, 4 }, |
7282f1b7 | 458 | [FEAT_PARAM_LINEWIDTH] = { 1, 2048 }, |
31ef8237 TA |
459 | }; |
460 | ||
23362832 | 461 | static const struct dss_param_range omap5_dss_param_range[] = { |
3729a70b | 462 | [FEAT_PARAM_DSS_FCK] = { 0, 209250000 }, |
23362832 AT |
463 | [FEAT_PARAM_DSS_PCD] = { 1, 255 }, |
464 | [FEAT_PARAM_DSIPLL_REGN] = { 0, (1 << 8) - 1 }, | |
465 | [FEAT_PARAM_DSIPLL_REGM] = { 0, (1 << 12) - 1 }, | |
466 | [FEAT_PARAM_DSIPLL_REGM_DISPC] = { 0, (1 << 5) - 1 }, | |
467 | [FEAT_PARAM_DSIPLL_REGM_DSI] = { 0, (1 << 5) - 1 }, | |
3729a70b | 468 | [FEAT_PARAM_DSIPLL_FINT] = { 150000, 52000000 }, |
23362832 | 469 | [FEAT_PARAM_DSIPLL_LPDIV] = { 0, (1 << 13) - 1 }, |
3729a70b | 470 | [FEAT_PARAM_DSI_FCK] = { 0, 209250000 }, |
23362832 AT |
471 | [FEAT_PARAM_DOWNSCALE] = { 1, 4 }, |
472 | [FEAT_PARAM_LINEWIDTH] = { 1, 2048 }, | |
23362832 AT |
473 | }; |
474 | ||
c124f23d AT |
475 | static const enum dss_feat_id omap2_dss_feat_list[] = { |
476 | FEAT_LCDENABLEPOL, | |
477 | FEAT_LCDENABLESIGNAL, | |
478 | FEAT_PCKFREEENABLE, | |
479 | FEAT_FUNCGATED, | |
480 | FEAT_ROWREPEATENABLE, | |
481 | FEAT_RESIZECONF, | |
482 | }; | |
483 | ||
484 | static const enum dss_feat_id omap3430_dss_feat_list[] = { | |
485 | FEAT_LCDENABLEPOL, | |
486 | FEAT_LCDENABLESIGNAL, | |
487 | FEAT_PCKFREEENABLE, | |
488 | FEAT_FUNCGATED, | |
489 | FEAT_LINEBUFFERSPLIT, | |
490 | FEAT_ROWREPEATENABLE, | |
491 | FEAT_RESIZECONF, | |
492 | FEAT_DSI_PLL_FREQSEL, | |
493 | FEAT_DSI_REVERSE_TXCLKESC, | |
494 | FEAT_VENC_REQUIRES_TV_DAC_CLK, | |
495 | FEAT_CPR, | |
496 | FEAT_PRELOAD, | |
497 | FEAT_FIR_COEF_V, | |
498 | FEAT_ALPHA_FIXED_ZORDER, | |
499 | FEAT_FIFO_MERGE, | |
500 | FEAT_OMAP3_DSI_FIFO_BUG, | |
195e672a | 501 | FEAT_DPI_USES_VDDS_DSI, |
c124f23d AT |
502 | }; |
503 | ||
524d9f48 RA |
504 | static const enum dss_feat_id am35xx_dss_feat_list[] = { |
505 | FEAT_LCDENABLEPOL, | |
506 | FEAT_LCDENABLESIGNAL, | |
507 | FEAT_PCKFREEENABLE, | |
508 | FEAT_FUNCGATED, | |
509 | FEAT_LINEBUFFERSPLIT, | |
510 | FEAT_ROWREPEATENABLE, | |
511 | FEAT_RESIZECONF, | |
512 | FEAT_DSI_PLL_FREQSEL, | |
513 | FEAT_DSI_REVERSE_TXCLKESC, | |
514 | FEAT_VENC_REQUIRES_TV_DAC_CLK, | |
515 | FEAT_CPR, | |
516 | FEAT_PRELOAD, | |
517 | FEAT_FIR_COEF_V, | |
518 | FEAT_ALPHA_FIXED_ZORDER, | |
519 | FEAT_FIFO_MERGE, | |
520 | FEAT_OMAP3_DSI_FIFO_BUG, | |
521 | }; | |
522 | ||
c124f23d AT |
523 | static const enum dss_feat_id omap3630_dss_feat_list[] = { |
524 | FEAT_LCDENABLEPOL, | |
525 | FEAT_LCDENABLESIGNAL, | |
526 | FEAT_PCKFREEENABLE, | |
527 | FEAT_FUNCGATED, | |
528 | FEAT_LINEBUFFERSPLIT, | |
529 | FEAT_ROWREPEATENABLE, | |
530 | FEAT_RESIZECONF, | |
531 | FEAT_DSI_PLL_PWR_BUG, | |
532 | FEAT_DSI_PLL_FREQSEL, | |
533 | FEAT_CPR, | |
534 | FEAT_PRELOAD, | |
535 | FEAT_FIR_COEF_V, | |
536 | FEAT_ALPHA_FIXED_ZORDER, | |
537 | FEAT_FIFO_MERGE, | |
538 | FEAT_OMAP3_DSI_FIFO_BUG, | |
eb91e79b | 539 | FEAT_DPI_USES_VDDS_DSI, |
c124f23d AT |
540 | }; |
541 | ||
542 | static const enum dss_feat_id omap4430_es1_0_dss_feat_list[] = { | |
543 | FEAT_MGR_LCD2, | |
544 | FEAT_CORE_CLK_DIV, | |
545 | FEAT_LCD_CLK_SRC, | |
546 | FEAT_DSI_DCS_CMD_CONFIG_VC, | |
547 | FEAT_DSI_VC_OCP_WIDTH, | |
548 | FEAT_DSI_GNQ, | |
549 | FEAT_HANDLE_UV_SEPARATE, | |
550 | FEAT_ATTR2, | |
551 | FEAT_CPR, | |
552 | FEAT_PRELOAD, | |
553 | FEAT_FIR_COEF_V, | |
554 | FEAT_ALPHA_FREE_ZORDER, | |
555 | FEAT_FIFO_MERGE, | |
65e006ff | 556 | FEAT_BURST_2D, |
c124f23d AT |
557 | }; |
558 | ||
70988194 RN |
559 | static const enum dss_feat_id omap4430_es2_0_1_2_dss_feat_list[] = { |
560 | FEAT_MGR_LCD2, | |
561 | FEAT_CORE_CLK_DIV, | |
562 | FEAT_LCD_CLK_SRC, | |
563 | FEAT_DSI_DCS_CMD_CONFIG_VC, | |
564 | FEAT_DSI_VC_OCP_WIDTH, | |
565 | FEAT_DSI_GNQ, | |
566 | FEAT_HDMI_CTS_SWMODE, | |
567 | FEAT_HANDLE_UV_SEPARATE, | |
568 | FEAT_ATTR2, | |
569 | FEAT_CPR, | |
570 | FEAT_PRELOAD, | |
571 | FEAT_FIR_COEF_V, | |
572 | FEAT_ALPHA_FREE_ZORDER, | |
573 | FEAT_FIFO_MERGE, | |
65e006ff | 574 | FEAT_BURST_2D, |
70988194 RN |
575 | }; |
576 | ||
c124f23d AT |
577 | static const enum dss_feat_id omap4_dss_feat_list[] = { |
578 | FEAT_MGR_LCD2, | |
579 | FEAT_CORE_CLK_DIV, | |
580 | FEAT_LCD_CLK_SRC, | |
581 | FEAT_DSI_DCS_CMD_CONFIG_VC, | |
582 | FEAT_DSI_VC_OCP_WIDTH, | |
583 | FEAT_DSI_GNQ, | |
584 | FEAT_HDMI_CTS_SWMODE, | |
70988194 | 585 | FEAT_HDMI_AUDIO_USE_MCLK, |
c124f23d AT |
586 | FEAT_HANDLE_UV_SEPARATE, |
587 | FEAT_ATTR2, | |
588 | FEAT_CPR, | |
589 | FEAT_PRELOAD, | |
590 | FEAT_FIR_COEF_V, | |
591 | FEAT_ALPHA_FREE_ZORDER, | |
592 | FEAT_FIFO_MERGE, | |
65e006ff | 593 | FEAT_BURST_2D, |
c124f23d AT |
594 | }; |
595 | ||
23362832 AT |
596 | static const enum dss_feat_id omap5_dss_feat_list[] = { |
597 | FEAT_MGR_LCD2, | |
598 | FEAT_CORE_CLK_DIV, | |
599 | FEAT_LCD_CLK_SRC, | |
600 | FEAT_DSI_DCS_CMD_CONFIG_VC, | |
601 | FEAT_DSI_VC_OCP_WIDTH, | |
602 | FEAT_DSI_GNQ, | |
603 | FEAT_HDMI_CTS_SWMODE, | |
604 | FEAT_HDMI_AUDIO_USE_MCLK, | |
605 | FEAT_HANDLE_UV_SEPARATE, | |
606 | FEAT_ATTR2, | |
607 | FEAT_CPR, | |
608 | FEAT_PRELOAD, | |
609 | FEAT_FIR_COEF_V, | |
610 | FEAT_ALPHA_FREE_ZORDER, | |
611 | FEAT_FIFO_MERGE, | |
612 | FEAT_BURST_2D, | |
f8ef3d69 | 613 | FEAT_DSI_PLL_SELFREQDCO, |
6d44610f | 614 | FEAT_DSI_PLL_REFSEL, |
77ccbfbb | 615 | FEAT_DSI_PHY_DCC, |
23362832 AT |
616 | }; |
617 | ||
e1ef4d23 | 618 | /* OMAP2 DSS Features */ |
ea290333 | 619 | static const struct omap_dss_features omap2_dss_features = { |
e1ef4d23 AT |
620 | .reg_fields = omap2_dss_reg_fields, |
621 | .num_reg_fields = ARRAY_SIZE(omap2_dss_reg_fields), | |
622 | ||
c124f23d AT |
623 | .features = omap2_dss_feat_list, |
624 | .num_features = ARRAY_SIZE(omap2_dss_feat_list), | |
d50cd037 | 625 | |
e1ef4d23 AT |
626 | .num_mgrs = 2, |
627 | .num_ovls = 3, | |
628 | .supported_displays = omap2_dss_supported_displays, | |
97f01b3a | 629 | .supported_outputs = omap2_dss_supported_outputs, |
e1ef4d23 | 630 | .supported_color_modes = omap2_dss_supported_color_modes, |
67019db8 | 631 | .overlay_caps = omap2_dss_overlay_caps, |
067a57e4 | 632 | .clksrc_names = omap2_dss_clk_source_names, |
31ef8237 | 633 | .dss_params = omap2_dss_param_range, |
65e006ff | 634 | .supported_rotation_types = OMAP_DSS_ROT_DMA | OMAP_DSS_ROT_VRFB, |
5ed8cf5b TV |
635 | .buffer_size_unit = 1, |
636 | .burst_size_unit = 8, | |
e1ef4d23 AT |
637 | }; |
638 | ||
639 | /* OMAP3 DSS Features */ | |
ea290333 | 640 | static const struct omap_dss_features omap3430_dss_features = { |
e1ef4d23 AT |
641 | .reg_fields = omap3_dss_reg_fields, |
642 | .num_reg_fields = ARRAY_SIZE(omap3_dss_reg_fields), | |
643 | ||
c124f23d AT |
644 | .features = omap3430_dss_feat_list, |
645 | .num_features = ARRAY_SIZE(omap3430_dss_feat_list), | |
e1ef4d23 AT |
646 | |
647 | .num_mgrs = 2, | |
648 | .num_ovls = 3, | |
4e777dd7 | 649 | .supported_displays = omap3430_dss_supported_displays, |
97f01b3a | 650 | .supported_outputs = omap3430_dss_supported_outputs, |
e1ef4d23 | 651 | .supported_color_modes = omap3_dss_supported_color_modes, |
67019db8 | 652 | .overlay_caps = omap3430_dss_overlay_caps, |
067a57e4 | 653 | .clksrc_names = omap3_dss_clk_source_names, |
31ef8237 | 654 | .dss_params = omap3_dss_param_range, |
65e006ff | 655 | .supported_rotation_types = OMAP_DSS_ROT_DMA | OMAP_DSS_ROT_VRFB, |
5ed8cf5b TV |
656 | .buffer_size_unit = 1, |
657 | .burst_size_unit = 8, | |
e1ef4d23 AT |
658 | }; |
659 | ||
524d9f48 RA |
660 | /* |
661 | * AM35xx DSS Features. This is basically OMAP3 DSS Features without the | |
662 | * vdds_dsi regulator. | |
663 | */ | |
664 | static const struct omap_dss_features am35xx_dss_features = { | |
665 | .reg_fields = omap3_dss_reg_fields, | |
666 | .num_reg_fields = ARRAY_SIZE(omap3_dss_reg_fields), | |
667 | ||
668 | .features = am35xx_dss_feat_list, | |
669 | .num_features = ARRAY_SIZE(am35xx_dss_feat_list), | |
670 | ||
671 | .num_mgrs = 2, | |
672 | .num_ovls = 3, | |
673 | .supported_displays = omap3430_dss_supported_displays, | |
97f01b3a | 674 | .supported_outputs = omap3430_dss_supported_outputs, |
524d9f48 RA |
675 | .supported_color_modes = omap3_dss_supported_color_modes, |
676 | .overlay_caps = omap3430_dss_overlay_caps, | |
677 | .clksrc_names = omap3_dss_clk_source_names, | |
678 | .dss_params = omap3_dss_param_range, | |
679 | .supported_rotation_types = OMAP_DSS_ROT_DMA | OMAP_DSS_ROT_VRFB, | |
680 | .buffer_size_unit = 1, | |
681 | .burst_size_unit = 8, | |
682 | }; | |
683 | ||
ea290333 | 684 | static const struct omap_dss_features omap3630_dss_features = { |
8fbde10a S |
685 | .reg_fields = omap3_dss_reg_fields, |
686 | .num_reg_fields = ARRAY_SIZE(omap3_dss_reg_fields), | |
687 | ||
c124f23d AT |
688 | .features = omap3630_dss_feat_list, |
689 | .num_features = ARRAY_SIZE(omap3630_dss_feat_list), | |
8fbde10a S |
690 | |
691 | .num_mgrs = 2, | |
692 | .num_ovls = 3, | |
4e777dd7 | 693 | .supported_displays = omap3630_dss_supported_displays, |
97f01b3a | 694 | .supported_outputs = omap3630_dss_supported_outputs, |
8fbde10a | 695 | .supported_color_modes = omap3_dss_supported_color_modes, |
67019db8 | 696 | .overlay_caps = omap3630_dss_overlay_caps, |
067a57e4 | 697 | .clksrc_names = omap3_dss_clk_source_names, |
31ef8237 | 698 | .dss_params = omap3_dss_param_range, |
65e006ff | 699 | .supported_rotation_types = OMAP_DSS_ROT_DMA | OMAP_DSS_ROT_VRFB, |
5ed8cf5b TV |
700 | .buffer_size_unit = 1, |
701 | .burst_size_unit = 8, | |
8fbde10a S |
702 | }; |
703 | ||
d50cd037 | 704 | /* OMAP4 DSS Features */ |
6ff7084e RN |
705 | /* For OMAP4430 ES 1.0 revision */ |
706 | static const struct omap_dss_features omap4430_es1_0_dss_features = { | |
707 | .reg_fields = omap4_dss_reg_fields, | |
708 | .num_reg_fields = ARRAY_SIZE(omap4_dss_reg_fields), | |
709 | ||
c124f23d AT |
710 | .features = omap4430_es1_0_dss_feat_list, |
711 | .num_features = ARRAY_SIZE(omap4430_es1_0_dss_feat_list), | |
6ff7084e RN |
712 | |
713 | .num_mgrs = 3, | |
b8c095b4 | 714 | .num_ovls = 4, |
7a155be3 | 715 | .num_wbs = 1, |
6ff7084e | 716 | .supported_displays = omap4_dss_supported_displays, |
97f01b3a | 717 | .supported_outputs = omap4_dss_supported_outputs, |
f20e4220 | 718 | .supported_color_modes = omap4_dss_supported_color_modes, |
67019db8 | 719 | .overlay_caps = omap4_dss_overlay_caps, |
6ff7084e RN |
720 | .clksrc_names = omap4_dss_clk_source_names, |
721 | .dss_params = omap4_dss_param_range, | |
65e006ff | 722 | .supported_rotation_types = OMAP_DSS_ROT_DMA | OMAP_DSS_ROT_TILER, |
5ed8cf5b TV |
723 | .buffer_size_unit = 16, |
724 | .burst_size_unit = 16, | |
6ff7084e RN |
725 | }; |
726 | ||
70988194 RN |
727 | /* For OMAP4430 ES 2.0, 2.1 and 2.2 revisions */ |
728 | static const struct omap_dss_features omap4430_es2_0_1_2_dss_features = { | |
729 | .reg_fields = omap4_dss_reg_fields, | |
730 | .num_reg_fields = ARRAY_SIZE(omap4_dss_reg_fields), | |
731 | ||
732 | .features = omap4430_es2_0_1_2_dss_feat_list, | |
733 | .num_features = ARRAY_SIZE(omap4430_es2_0_1_2_dss_feat_list), | |
734 | ||
735 | .num_mgrs = 3, | |
736 | .num_ovls = 4, | |
7a155be3 | 737 | .num_wbs = 1, |
70988194 | 738 | .supported_displays = omap4_dss_supported_displays, |
97f01b3a | 739 | .supported_outputs = omap4_dss_supported_outputs, |
70988194 RN |
740 | .supported_color_modes = omap4_dss_supported_color_modes, |
741 | .overlay_caps = omap4_dss_overlay_caps, | |
742 | .clksrc_names = omap4_dss_clk_source_names, | |
743 | .dss_params = omap4_dss_param_range, | |
65e006ff | 744 | .supported_rotation_types = OMAP_DSS_ROT_DMA | OMAP_DSS_ROT_TILER, |
70988194 RN |
745 | .buffer_size_unit = 16, |
746 | .burst_size_unit = 16, | |
747 | }; | |
748 | ||
6ff7084e | 749 | /* For all the other OMAP4 versions */ |
ea290333 | 750 | static const struct omap_dss_features omap4_dss_features = { |
87a7484b AT |
751 | .reg_fields = omap4_dss_reg_fields, |
752 | .num_reg_fields = ARRAY_SIZE(omap4_dss_reg_fields), | |
d50cd037 | 753 | |
c124f23d AT |
754 | .features = omap4_dss_feat_list, |
755 | .num_features = ARRAY_SIZE(omap4_dss_feat_list), | |
d50cd037 AT |
756 | |
757 | .num_mgrs = 3, | |
b8c095b4 | 758 | .num_ovls = 4, |
7a155be3 | 759 | .num_wbs = 1, |
d50cd037 | 760 | .supported_displays = omap4_dss_supported_displays, |
97f01b3a | 761 | .supported_outputs = omap4_dss_supported_outputs, |
f20e4220 | 762 | .supported_color_modes = omap4_dss_supported_color_modes, |
67019db8 | 763 | .overlay_caps = omap4_dss_overlay_caps, |
ea75159e | 764 | .clksrc_names = omap4_dss_clk_source_names, |
31ef8237 | 765 | .dss_params = omap4_dss_param_range, |
65e006ff | 766 | .supported_rotation_types = OMAP_DSS_ROT_DMA | OMAP_DSS_ROT_TILER, |
5ed8cf5b TV |
767 | .buffer_size_unit = 16, |
768 | .burst_size_unit = 16, | |
d50cd037 AT |
769 | }; |
770 | ||
23362832 AT |
771 | /* OMAP5 DSS Features */ |
772 | static const struct omap_dss_features omap5_dss_features = { | |
773 | .reg_fields = omap5_dss_reg_fields, | |
774 | .num_reg_fields = ARRAY_SIZE(omap5_dss_reg_fields), | |
775 | ||
776 | .features = omap5_dss_feat_list, | |
777 | .num_features = ARRAY_SIZE(omap5_dss_feat_list), | |
778 | ||
779 | .num_mgrs = 3, | |
780 | .num_ovls = 4, | |
781 | .supported_displays = omap5_dss_supported_displays, | |
97f01b3a | 782 | .supported_outputs = omap5_dss_supported_outputs, |
23362832 AT |
783 | .supported_color_modes = omap4_dss_supported_color_modes, |
784 | .overlay_caps = omap4_dss_overlay_caps, | |
785 | .clksrc_names = omap5_dss_clk_source_names, | |
786 | .dss_params = omap5_dss_param_range, | |
787 | .supported_rotation_types = OMAP_DSS_ROT_DMA | OMAP_DSS_ROT_TILER, | |
788 | .buffer_size_unit = 16, | |
789 | .burst_size_unit = 16, | |
790 | }; | |
791 | ||
e1ef4d23 AT |
792 | /* Functions returning values related to a DSS feature */ |
793 | int dss_feat_get_num_mgrs(void) | |
794 | { | |
795 | return omap_current_dss_features->num_mgrs; | |
796 | } | |
eda34273 | 797 | EXPORT_SYMBOL(dss_feat_get_num_mgrs); |
e1ef4d23 AT |
798 | |
799 | int dss_feat_get_num_ovls(void) | |
800 | { | |
801 | return omap_current_dss_features->num_ovls; | |
802 | } | |
eda34273 | 803 | EXPORT_SYMBOL(dss_feat_get_num_ovls); |
e1ef4d23 | 804 | |
7a155be3 AT |
805 | int dss_feat_get_num_wbs(void) |
806 | { | |
807 | return omap_current_dss_features->num_wbs; | |
808 | } | |
809 | ||
31ef8237 TA |
810 | unsigned long dss_feat_get_param_min(enum dss_range_param param) |
811 | { | |
812 | return omap_current_dss_features->dss_params[param].min; | |
813 | } | |
814 | ||
815 | unsigned long dss_feat_get_param_max(enum dss_range_param param) | |
819d807c | 816 | { |
31ef8237 | 817 | return omap_current_dss_features->dss_params[param].max; |
819d807c AT |
818 | } |
819 | ||
e1ef4d23 AT |
820 | enum omap_display_type dss_feat_get_supported_displays(enum omap_channel channel) |
821 | { | |
822 | return omap_current_dss_features->supported_displays[channel]; | |
823 | } | |
eda34273 | 824 | EXPORT_SYMBOL(dss_feat_get_supported_displays); |
e1ef4d23 | 825 | |
97f01b3a AT |
826 | enum omap_dss_output_id dss_feat_get_supported_outputs(enum omap_channel channel) |
827 | { | |
828 | return omap_current_dss_features->supported_outputs[channel]; | |
829 | } | |
eda34273 | 830 | EXPORT_SYMBOL(dss_feat_get_supported_outputs); |
97f01b3a | 831 | |
e1ef4d23 AT |
832 | enum omap_color_mode dss_feat_get_supported_color_modes(enum omap_plane plane) |
833 | { | |
834 | return omap_current_dss_features->supported_color_modes[plane]; | |
835 | } | |
eda34273 | 836 | EXPORT_SYMBOL(dss_feat_get_supported_color_modes); |
e1ef4d23 | 837 | |
67019db8 TV |
838 | enum omap_overlay_caps dss_feat_get_overlay_caps(enum omap_plane plane) |
839 | { | |
840 | return omap_current_dss_features->overlay_caps[plane]; | |
841 | } | |
842 | ||
8dad2ab6 AT |
843 | bool dss_feat_color_mode_supported(enum omap_plane plane, |
844 | enum omap_color_mode color_mode) | |
845 | { | |
846 | return omap_current_dss_features->supported_color_modes[plane] & | |
847 | color_mode; | |
848 | } | |
849 | ||
89a35e51 | 850 | const char *dss_feat_get_clk_source_name(enum omap_dss_clk_source id) |
067a57e4 | 851 | { |
235e7dba | 852 | return omap_current_dss_features->clksrc_names[id]; |
067a57e4 AT |
853 | } |
854 | ||
5ed8cf5b TV |
855 | u32 dss_feat_get_buffer_size_unit(void) |
856 | { | |
857 | return omap_current_dss_features->buffer_size_unit; | |
858 | } | |
859 | ||
860 | u32 dss_feat_get_burst_size_unit(void) | |
861 | { | |
862 | return omap_current_dss_features->burst_size_unit; | |
863 | } | |
864 | ||
e1ef4d23 AT |
865 | /* DSS has_feature check */ |
866 | bool dss_has_feature(enum dss_feat_id id) | |
867 | { | |
c124f23d AT |
868 | int i; |
869 | const enum dss_feat_id *features = omap_current_dss_features->features; | |
870 | const int num_features = omap_current_dss_features->num_features; | |
871 | ||
872 | for (i = 0; i < num_features; i++) { | |
873 | if (features[i] == id) | |
874 | return true; | |
875 | } | |
876 | ||
877 | return false; | |
e1ef4d23 AT |
878 | } |
879 | ||
880 | void dss_feat_get_reg_field(enum dss_feat_reg_field id, u8 *start, u8 *end) | |
881 | { | |
882 | if (id >= omap_current_dss_features->num_reg_fields) | |
883 | BUG(); | |
884 | ||
885 | *start = omap_current_dss_features->reg_fields[id].start; | |
886 | *end = omap_current_dss_features->reg_fields[id].end; | |
887 | } | |
888 | ||
65e006ff CM |
889 | bool dss_feat_rotation_type_supported(enum omap_dss_rotation_type rot_type) |
890 | { | |
891 | return omap_current_dss_features->supported_rotation_types & rot_type; | |
892 | } | |
893 | ||
649514c6 | 894 | void dss_features_init(enum omapdss_version version) |
e1ef4d23 | 895 | { |
649514c6 TV |
896 | switch (version) { |
897 | case OMAPDSS_VER_OMAP24xx: | |
e1ef4d23 | 898 | omap_current_dss_features = &omap2_dss_features; |
649514c6 TV |
899 | break; |
900 | ||
901 | case OMAPDSS_VER_OMAP34xx_ES1: | |
902 | case OMAPDSS_VER_OMAP34xx_ES3: | |
903 | omap_current_dss_features = &omap3430_dss_features; | |
904 | break; | |
905 | ||
906 | case OMAPDSS_VER_OMAP3630: | |
8fbde10a | 907 | omap_current_dss_features = &omap3630_dss_features; |
649514c6 TV |
908 | break; |
909 | ||
910 | case OMAPDSS_VER_OMAP4430_ES1: | |
6ff7084e | 911 | omap_current_dss_features = &omap4430_es1_0_dss_features; |
649514c6 TV |
912 | break; |
913 | ||
914 | case OMAPDSS_VER_OMAP4430_ES2: | |
70988194 | 915 | omap_current_dss_features = &omap4430_es2_0_1_2_dss_features; |
649514c6 TV |
916 | break; |
917 | ||
918 | case OMAPDSS_VER_OMAP4: | |
d50cd037 | 919 | omap_current_dss_features = &omap4_dss_features; |
649514c6 TV |
920 | break; |
921 | ||
922 | case OMAPDSS_VER_OMAP5: | |
23362832 | 923 | omap_current_dss_features = &omap5_dss_features; |
649514c6 TV |
924 | break; |
925 | ||
926 | case OMAPDSS_VER_AM35xx: | |
927 | omap_current_dss_features = &am35xx_dss_features; | |
928 | break; | |
929 | ||
930 | default: | |
6ff7084e | 931 | DSSWARN("Unsupported OMAP version"); |
649514c6 TV |
932 | break; |
933 | } | |
e1ef4d23 | 934 | } |