Commit | Line | Data |
---|---|---|
e1ef4d23 AT |
1 | /* |
2 | * linux/drivers/video/omap2/dss/dss_features.h | |
3 | * | |
4 | * Copyright (C) 2010 Texas Instruments | |
5 | * Author: Archit Taneja <archit@ti.com> | |
6 | * | |
7 | * This program is free software; you can redistribute it and/or modify it | |
8 | * under the terms of the GNU General Public License version 2 as published by | |
9 | * the Free Software Foundation. | |
10 | * | |
11 | * This program is distributed in the hope that it will be useful, but WITHOUT | |
12 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
13 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | |
14 | * more details. | |
15 | * | |
16 | * You should have received a copy of the GNU General Public License along with | |
17 | * this program. If not, see <http://www.gnu.org/licenses/>. | |
18 | */ | |
19 | ||
20 | #ifndef __OMAP2_DSS_FEATURES_H | |
21 | #define __OMAP2_DSS_FEATURES_H | |
22 | ||
e86d456a | 23 | #define MAX_DSS_MANAGERS 4 |
b8c095b4 | 24 | #define MAX_DSS_OVERLAYS 4 |
e86d456a | 25 | #define MAX_DSS_LCD_MANAGERS 3 |
a72b64b9 | 26 | #define MAX_NUM_DSI 2 |
e1ef4d23 AT |
27 | |
28 | /* DSS has feature id */ | |
29 | enum dss_feat_id { | |
c124f23d AT |
30 | FEAT_LCDENABLEPOL, |
31 | FEAT_LCDENABLESIGNAL, | |
32 | FEAT_PCKFREEENABLE, | |
33 | FEAT_FUNCGATED, | |
34 | FEAT_MGR_LCD2, | |
e86d456a | 35 | FEAT_MGR_LCD3, |
c124f23d AT |
36 | FEAT_LINEBUFFERSPLIT, |
37 | FEAT_ROWREPEATENABLE, | |
38 | FEAT_RESIZECONF, | |
5c6366e1 | 39 | /* Independent core clk divider */ |
c124f23d AT |
40 | FEAT_CORE_CLK_DIV, |
41 | FEAT_LCD_CLK_SRC, | |
c94dfe05 | 42 | /* DSI-PLL power command 0x3 is not working */ |
c124f23d AT |
43 | FEAT_DSI_PLL_PWR_BUG, |
44 | FEAT_DSI_PLL_FREQSEL, | |
45 | FEAT_DSI_DCS_CMD_CONFIG_VC, | |
46 | FEAT_DSI_VC_OCP_WIDTH, | |
47 | FEAT_DSI_REVERSE_TXCLKESC, | |
48 | FEAT_DSI_GNQ, | |
195e672a | 49 | FEAT_DPI_USES_VDDS_DSI, |
c124f23d | 50 | FEAT_HDMI_CTS_SWMODE, |
70988194 | 51 | FEAT_HDMI_AUDIO_USE_MCLK, |
c124f23d AT |
52 | FEAT_HANDLE_UV_SEPARATE, |
53 | FEAT_ATTR2, | |
54 | FEAT_VENC_REQUIRES_TV_DAC_CLK, | |
55 | FEAT_CPR, | |
56 | FEAT_PRELOAD, | |
57 | FEAT_FIR_COEF_V, | |
58 | FEAT_ALPHA_FIXED_ZORDER, | |
59 | FEAT_ALPHA_FREE_ZORDER, | |
60 | FEAT_FIFO_MERGE, | |
e0e405b9 | 61 | /* An unknown HW bug causing the normal FIFO thresholds not to work */ |
c124f23d | 62 | FEAT_OMAP3_DSI_FIFO_BUG, |
65e006ff | 63 | FEAT_BURST_2D, |
f8ef3d69 | 64 | FEAT_DSI_PLL_SELFREQDCO, |
6d44610f | 65 | FEAT_DSI_PLL_REFSEL, |
77ccbfbb | 66 | FEAT_DSI_PHY_DCC, |
e1ef4d23 AT |
67 | }; |
68 | ||
69 | /* DSS register field id */ | |
70 | enum dss_feat_reg_field { | |
71 | FEAT_REG_FIRHINC, | |
72 | FEAT_REG_FIRVINC, | |
73 | FEAT_REG_FIFOHIGHTHRESHOLD, | |
74 | FEAT_REG_FIFOLOWTHRESHOLD, | |
75 | FEAT_REG_FIFOSIZE, | |
87a7484b AT |
76 | FEAT_REG_HORIZONTALACCU, |
77 | FEAT_REG_VERTICALACCU, | |
ea75159e | 78 | FEAT_REG_DISPC_CLK_SWITCH, |
49641116 TA |
79 | FEAT_REG_DSIPLL_REGN, |
80 | FEAT_REG_DSIPLL_REGM, | |
81 | FEAT_REG_DSIPLL_REGM_DISPC, | |
82 | FEAT_REG_DSIPLL_REGM_DSI, | |
e1ef4d23 AT |
83 | }; |
84 | ||
31ef8237 TA |
85 | enum dss_range_param { |
86 | FEAT_PARAM_DSS_FCK, | |
9eaaf207 | 87 | FEAT_PARAM_DSS_PCD, |
49641116 TA |
88 | FEAT_PARAM_DSIPLL_REGN, |
89 | FEAT_PARAM_DSIPLL_REGM, | |
90 | FEAT_PARAM_DSIPLL_REGM_DISPC, | |
91 | FEAT_PARAM_DSIPLL_REGM_DSI, | |
92 | FEAT_PARAM_DSIPLL_FINT, | |
93 | FEAT_PARAM_DSIPLL_LPDIV, | |
bc63f304 | 94 | FEAT_PARAM_DSI_FCK, |
0373cac6 | 95 | FEAT_PARAM_DOWNSCALE, |
7282f1b7 | 96 | FEAT_PARAM_LINEWIDTH, |
31ef8237 TA |
97 | }; |
98 | ||
e1ef4d23 | 99 | /* DSS Feature Functions */ |
7a155be3 | 100 | int dss_feat_get_num_wbs(void); |
31ef8237 TA |
101 | unsigned long dss_feat_get_param_min(enum dss_range_param param); |
102 | unsigned long dss_feat_get_param_max(enum dss_range_param param); | |
67019db8 | 103 | enum omap_overlay_caps dss_feat_get_overlay_caps(enum omap_plane plane); |
8dad2ab6 AT |
104 | bool dss_feat_color_mode_supported(enum omap_plane plane, |
105 | enum omap_color_mode color_mode); | |
89a35e51 | 106 | const char *dss_feat_get_clk_source_name(enum omap_dss_clk_source id); |
e1ef4d23 | 107 | |
5ed8cf5b TV |
108 | u32 dss_feat_get_buffer_size_unit(void); /* in bytes */ |
109 | u32 dss_feat_get_burst_size_unit(void); /* in bytes */ | |
110 | ||
65e006ff CM |
111 | bool dss_feat_rotation_type_supported(enum omap_dss_rotation_type rot_type); |
112 | ||
e1ef4d23 AT |
113 | bool dss_has_feature(enum dss_feat_id id); |
114 | void dss_feat_get_reg_field(enum dss_feat_reg_field id, u8 *start, u8 *end); | |
649514c6 | 115 | void dss_features_init(enum omapdss_version version); |
e1ef4d23 | 116 | #endif |