Commit | Line | Data |
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1da177e4 LT |
1 | /* |
2 | * linux/drivers/video/platinumfb-hw.c -- Frame buffer device for the | |
3 | * Platinum on-board video in PowerMac 7200s (and some clones based | |
4 | * on the same motherboard.) | |
5 | * | |
6 | * Created 09 Feb 1998 by Jon Howell <jonh@cs.dartmouth.edu> | |
7 | * | |
8 | * Copyright (C) 1998 Jon Howell | |
9 | * | |
10 | * based on drivers/macintosh/platinum.c: Console support | |
11 | * for PowerMac "platinum" display adaptor. | |
12 | * Copyright (C) 1996 Paul Mackerras and Mark Abene. | |
13 | * | |
14 | * based on skeletonfb.c: | |
15 | * Created 28 Dec 1997 by Geert Uytterhoeven | |
16 | * | |
17 | * This file is subject to the terms and conditions of the GNU General Public | |
18 | * License. See the file COPYING in the main directory of this archive | |
19 | * for more details. | |
20 | */ | |
21 | ||
22 | /* | |
23 | * Structure of the registers for the DACula colormap device. | |
24 | */ | |
25 | struct cmap_regs { | |
26 | unsigned char addr; | |
27 | char pad1[15]; | |
28 | unsigned char d1; | |
29 | char pad2[15]; | |
30 | unsigned char d2; | |
31 | char pad3[15]; | |
32 | unsigned char lut; | |
33 | char pad4[15]; | |
34 | }; | |
35 | ||
36 | /* | |
37 | * Structure of the registers for the "platinum" display adaptor". | |
38 | */ | |
39 | struct preg { /* padded register */ | |
40 | unsigned r; /* notice this is 32 bits. */ | |
41 | char pad[12]; | |
42 | }; | |
43 | ||
44 | struct platinum_regs { | |
45 | struct preg reg[128]; | |
46 | }; | |
47 | ||
48 | /* | |
49 | * Register initialization tables for the platinum display. | |
50 | * | |
51 | * It seems that there are two different types of platinum display | |
52 | * out there. Older ones use the values in clocksel[1], for which | |
53 | * the formula for the clock frequency seems to be | |
54 | * F = 14.3MHz * c0 / (c1 & 0x1f) / (1 << (c1 >> 5)) | |
55 | * Newer ones use the values in clocksel[0], for which the formula | |
56 | * seems to be | |
57 | * F = 15MHz * c0 / ((c1 & 0x1f) + 2) / (1 << (c1 >> 5)) | |
58 | */ | |
59 | struct platinum_regvals { | |
60 | int fb_offset; | |
61 | int pitch[3]; | |
62 | unsigned regs[26]; | |
63 | unsigned char offset[3]; | |
64 | unsigned char mode[3]; | |
65 | unsigned char dacula_ctrl[3]; | |
66 | unsigned char clock_params[2][2]; | |
67 | }; | |
68 | ||
69 | #define DIV2 0x20 | |
70 | #define DIV4 0x40 | |
71 | #define DIV8 0x60 | |
72 | #define DIV16 0x80 | |
73 | ||
74 | /* 1280x1024, 75Hz (20) */ | |
75 | static struct platinum_regvals platinum_reg_init_20 = { | |
76 | 0x5c00, | |
77 | { 1312, 2592, 2592 }, | |
78 | { 0xffc, 4, 0, 0, 0, 0, 0x428, 0, | |
79 | 0, 0xb3, 0xd3, 0x12, 0x1a5, 0x23, 0x28, 0x2d, | |
80 | 0x5e, 0x19e, 0x1a4, 0x854, 0x852, 4, 9, 0x50, | |
81 | 0x850, 0x851 }, { 0x58, 0x5d, 0x5d }, | |
82 | { 0, 0xff, 0xff }, { 0x51, 0x55, 0x55 }, | |
83 | {{ 45, 3 }, { 66, 7 }} | |
84 | }; | |
85 | ||
86 | /* 1280x960, 75Hz (19) */ | |
87 | static struct platinum_regvals platinum_reg_init_19 = { | |
88 | 0x5c00, | |
89 | { 1312, 2592, 2592 }, | |
90 | { 0xffc, 4, 0, 0, 0, 0, 0x428, 0, | |
91 | 0, 0xb2, 0xd2, 0x12, 0x1a3, 0x23, 0x28, 0x2d, | |
92 | 0x5c, 0x19c, 0x1a2, 0x7d0, 0x7ce, 4, 9, 0x4c, | |
93 | 0x7cc, 0x7cd }, { 0x56, 0x5b, 0x5b }, | |
94 | { 0, 0xff, 0xff }, { 0x51, 0x55, 0x55 }, | |
95 | {{ 42, 3 }, { 44, 5 }} | |
96 | }; | |
97 | ||
98 | /* 1152x870, 75Hz (18) */ | |
99 | static struct platinum_regvals platinum_reg_init_18 = { | |
100 | 0x11b0, | |
101 | { 1184, 2336, 4640 }, | |
102 | { 0xff0, 4, 0, 0, 0, 0, 0x38f, 0, | |
103 | 0, 0x294, 0x16c, 0x20, 0x2d7, 0x3f, 0x49, 0x53, | |
104 | 0x82, 0x2c2, 0x2d6, 0x726, 0x724, 4, 9, 0x52, | |
105 | 0x71e, 0x722 }, { 0x74, 0x7c, 0x81 }, | |
106 | { 2, 0, 0xff }, { 0x11, 0x15, 0x19 }, | |
107 | {{ 26, 0 + DIV2 }, { 42, 6 }} | |
108 | }; | |
109 | ||
110 | /* 1024x768, 75Hz (17) */ | |
111 | static struct platinum_regvals platinum_reg_init_17 = { | |
112 | 0x10b0, | |
113 | { 1056, 2080, 4128 }, | |
114 | { 0xff0, 4, 0, 0, 0, 0, 0x320, 0, | |
115 | 0, 0x254, 0x14b, 0x18, 0x295, 0x2f, 0x32, 0x3b, | |
116 | 0x80, 0x280, 0x296, 0x648, 0x646, 4, 9, 0x40, | |
117 | 0x640, 0x644 }, { 0x72, 0x7a, 0x7f }, | |
118 | { 2, 0, 0xff }, { 0x11, 0x15, 0x19 }, | |
119 | {{ 54, 3 + DIV2 }, { 67, 12 }} | |
120 | }; | |
121 | ||
122 | /* 1024x768, 75Hz (16) */ | |
123 | static struct platinum_regvals platinum_reg_init_16 = { | |
124 | 0x10b0, | |
125 | { 1056, 2080, 4128 }, | |
126 | { 0xff0, 4, 0, 0, 0, 0, 0x320, 0, | |
127 | 0, 0x250, 0x147, 0x17, 0x28f, 0x2f, 0x35, 0x47, | |
128 | 0x82, 0x282, 0x28e, 0x640, 0x63e, 4, 9, 0x3c, | |
129 | 0x63c, 0x63d }, { 0x74, 0x7c, 0x81 }, | |
130 | { 2, 0, 0xff }, { 0x11, 0x15, 0x19 }, | |
131 | {{ 20, 0 + DIV2 }, { 11, 2 }} | |
132 | }; | |
133 | ||
134 | /* 1024x768, 70Hz (15) */ | |
135 | static struct platinum_regvals platinum_reg_init_15 = { | |
136 | 0x10b0, | |
137 | { 1056, 2080, 4128 }, | |
138 | { 0xff0, 4, 0, 0, 0, 0, 0x320, 0, | |
139 | 0, 0x254, 0x14b, 0x22, 0x297, 0x43, 0x49, 0x5b, | |
140 | 0x86, 0x286, 0x296, 0x64c, 0x64a, 0xa, 0xf, 0x44, | |
141 | 0x644, 0x646 }, { 0x78, 0x80, 0x85 }, | |
142 | { 2, 0, 0xff }, { 0x11, 0x15, 0x19 }, | |
143 | {{ 19, 0 + DIV2 }, { 110, 21 }} | |
144 | }; | |
145 | ||
146 | /* 1024x768, 60Hz (14) */ | |
147 | static struct platinum_regvals platinum_reg_init_14 = { | |
148 | 0x10b0, | |
149 | { 1056, 2080, 4128 }, | |
150 | { 0xff0, 4, 0, 0, 0, 0, 0x320, 0, | |
151 | 0, 0x25a, 0x14f, 0x22, 0x29f, 0x43, 0x49, 0x5b, | |
152 | 0x8e, 0x28e, 0x29e, 0x64c, 0x64a, 0xa, 0xf, 0x44, | |
153 | 0x644, 0x646 }, { 0x80, 0x88, 0x8d }, | |
154 | { 2, 0, 0xff }, { 0x11, 0x15, 0x19 }, | |
155 | {{ 71, 6 + DIV2 }, { 118, 13 + DIV2 }} | |
156 | }; | |
157 | ||
158 | /* 832x624, 75Hz (13) */ | |
159 | static struct platinum_regvals platinum_reg_init_13 = { | |
160 | 0x70, | |
161 | { 864, 1680, 3360 }, /* MacOS does 1680 instead of 1696 to fit 16bpp in 1MB */ | |
162 | { 0xff0, 4, 0, 0, 0, 0, 0x299, 0, | |
163 | 0, 0x21e, 0x120, 0x10, 0x23f, 0x1f, 0x25, 0x37, | |
164 | 0x8a, 0x22a, 0x23e, 0x536, 0x534, 4, 9, 0x52, | |
165 | 0x532, 0x533 }, { 0x7c, 0x84, 0x89 }, | |
166 | { 2, 0, 0xff }, { 0x11, 0x15, 0x19 }, | |
167 | {{ 30, 0 + DIV4 }, { 56, 7 + DIV2 }} | |
168 | }; | |
169 | ||
170 | /* 800x600, 75Hz (12) */ | |
171 | static struct platinum_regvals platinum_reg_init_12 = { | |
172 | 0x1010, | |
173 | { 832, 1632, 3232 }, | |
174 | { 0xff0, 4, 0, 0, 0, 0, 0x320, 0, | |
175 | 0, 0x1ce, 0x108, 0x14, 0x20f, 0x27, 0x30, 0x39, | |
176 | 0x72, 0x202, 0x20e, 0x4e2, 0x4e0, 4, 9, 0x2e, | |
177 | 0x4de, 0x4df }, { 0x64, 0x6c, 0x71 }, | |
178 | { 2, 0, 0xff }, { 0x11, 0x15, 0x19 }, | |
179 | {{ 122, 7 + DIV4 }, { 62, 9 + DIV2 }} | |
180 | }; | |
181 | ||
182 | /* 800x600, 72Hz (11) */ | |
183 | static struct platinum_regvals platinum_reg_init_11 = { | |
184 | 0x1010, | |
185 | { 832, 1632, 3232 }, | |
186 | { 0xff0, 4, 0, 0, 0, 0, 0x320, 0, | |
187 | 0, 0x1ca, 0x104, 0x1e, 0x207, 0x3b, 0x44, 0x4d, | |
188 | 0x56, 0x1e6, 0x206, 0x534, 0x532, 0xa, 0xe, 0x38, | |
189 | 0x4e8, 0x4ec }, { 0x48, 0x50, 0x55 }, | |
190 | { 2, 0, 0xff }, { 0x11, 0x15, 0x19 }, | |
191 | {{ 26, 0 + DIV4 }, { 42, 6 + DIV2 }} | |
192 | }; | |
193 | ||
194 | /* 800x600, 60Hz (10) */ | |
195 | static struct platinum_regvals platinum_reg_init_10 = { | |
196 | 0x1010, | |
197 | { 832, 1632, 3232 }, | |
198 | { 0xff0, 4, 0, 0, 0, 0, 0x320, 0, | |
199 | 0, 0x1ce, 0x108, 0x20, 0x20f, 0x3f, 0x45, 0x5d, | |
200 | 0x66, 0x1f6, 0x20e, 0x4e8, 0x4e6, 6, 0xa, 0x34, | |
201 | 0x4e4, 0x4e5 }, { 0x58, 0x60, 0x65 }, | |
202 | { 2, 0, 0xff }, { 0x11, 0x15, 0x19 }, | |
203 | {{ 54, 3 + DIV4 }, { 95, 1 + DIV8 }} | |
204 | }; | |
205 | ||
206 | /* 800x600, 56Hz (9) --unsupported? copy of mode 10 for now... */ | |
207 | static struct platinum_regvals platinum_reg_init_9 = { | |
208 | 0x1010, | |
209 | { 832, 1632, 3232 }, | |
210 | { 0xff0, 4, 0, 0, 0, 0, 0x320, 0, | |
211 | 0, 0x1ce, 0x108, 0x20, 0x20f, 0x3f, 0x45, 0x5d, | |
212 | 0x66, 0x1f6, 0x20e, 0x4e8, 0x4e6, 6, 0xa, 0x34, | |
213 | 0x4e4, 0x4e5 }, { 0x58, 0x60, 0x65 }, | |
214 | { 2, 0, 0xff }, { 0x11, 0x15, 0x19 }, | |
215 | {{ 54, 3 + DIV4 }, { 88, 1 + DIV8 }} | |
216 | }; | |
217 | ||
218 | /* 768x576, 50Hz Interlaced-PAL (8) */ | |
219 | static struct platinum_regvals platinum_reg_init_8 = { | |
220 | 0x1010, | |
221 | { 800, 1568, 3104 }, | |
222 | { 0xff0, 4, 0, 0, 0, 0, 0x320, 0, | |
223 | 0, 0xc8, 0xec, 0x11, 0x1d7, 0x22, 0x25, 0x36, | |
224 | 0x47, 0x1c7, 0x1d6, 0x271, 0x270, 4, 9, 0x27, | |
225 | 0x267, 0x26b }, { 0x39, 0x41, 0x46 }, | |
226 | { 2, 0, 0xff }, { 0x11, 0x15, 0x19 }, | |
227 | {{ 31, 0 + DIV16 }, { 74, 9 + DIV8 }} | |
228 | }; | |
229 | ||
230 | /* 640x870, 75Hz Portrait (7) */ | |
231 | static struct platinum_regvals platinum_reg_init_7 = { | |
232 | 0xb10, | |
233 | { 672, 1312, 2592 }, | |
234 | { 0xff0, 4, 0, 0, 0, 0, 0x320, 0, | |
235 | 0, 0x176, 0xd0, 0x14, 0x19f, 0x27, 0x2d, 0x3f, | |
236 | 0x4a, 0x18a, 0x19e, 0x72c, 0x72a, 4, 9, 0x58, | |
237 | 0x724, 0x72a }, { 0x3c, 0x44, 0x49 }, | |
238 | { 2, 0, 0xff }, { 0x11, 0x15, 0x19 }, | |
239 | {{ 30, 0 + DIV4 }, { 56, 7 + DIV2 }} | |
240 | }; | |
241 | ||
242 | /* 640x480, 67Hz (6) */ | |
243 | static struct platinum_regvals platinum_reg_init_6 = { | |
244 | 0x1010, | |
245 | { 672, 1312, 2592 }, | |
246 | { 0xff0, 4, 0, 0, 0, 0, 0x209, 0, | |
247 | 0, 0x18e, 0xd8, 0x10, 0x1af, 0x1f, 0x25, 0x37, | |
248 | 0x4a, 0x18a, 0x1ae, 0x41a, 0x418, 4, 9, 0x52, | |
249 | 0x412, 0x416 }, { 0x3c, 0x44, 0x49 }, | |
250 | { 2, 0, 0xff }, { 0x11, 0x15, 0x19 }, | |
251 | {{ 99, 4 + DIV8 }, { 42, 5 + DIV4 }} | |
252 | }; | |
253 | ||
254 | /* 640x480, 60Hz (5) */ | |
255 | static struct platinum_regvals platinum_reg_init_5 = { | |
256 | 0x1010, | |
257 | { 672, 1312, 2592 }, | |
258 | { 0xff0, 4, 0, 0, 0, 0, 0x320, 0, | |
259 | 0, 0x15e, 0xc8, 0x18, 0x18f, 0x2f, 0x35, 0x3e, | |
260 | 0x42, 0x182, 0x18e, 0x41a, 0x418, 2, 7, 0x44, | |
261 | 0x404, 0x408 }, { 0x34, 0x3c, 0x41 }, | |
262 | { 2, 0, 0xff }, { 0x11, 0x15, 0x19 }, | |
263 | {{ 26, 0 + DIV8 }, { 14, 2 + DIV4 }} | |
264 | }; | |
265 | ||
266 | /* 640x480, 60Hz Interlaced-NTSC (4) */ | |
267 | static struct platinum_regvals platinum_reg_init_4 = { | |
268 | 0x1010, | |
269 | { 672, 1312, 2592 }, | |
270 | { 0xff0, 4, 0, 0, 0, 0, 0x320, 0, | |
271 | 0, 0xa5, 0xc3, 0xe, 0x185, 0x1c, 0x1f, 0x30, | |
272 | 0x37, 0x177, 0x184, 0x20d, 0x20c, 5, 0xb, 0x23, | |
273 | 0x203, 0x206 }, { 0x29, 0x31, 0x36 }, | |
274 | { 2, 0, 0xff }, { 0x11, 0x15, 0x19 }, | |
275 | {{ 94, 5 + DIV16 }, { 48, 7 + DIV8 }} | |
276 | }; | |
277 | ||
278 | /* 640x480, 50Hz Interlaced-PAL (3) */ | |
279 | static struct platinum_regvals platinum_reg_init_3 = { | |
280 | 0x1010, | |
281 | { 672, 1312, 2592 }, | |
282 | { 0xff0, 4, 0, 0, 0, 0, 0x320, 0, | |
283 | 0, 0xc8, 0xec, 0x11, 0x1d7, 0x22, 0x25, 0x36, | |
284 | 0x67, 0x1a7, 0x1d6, 0x271, 0x270, 4, 9, 0x57, | |
285 | 0x237, 0x26b }, { 0x59, 0x61, 0x66 }, | |
286 | { 2, 0, 0xff }, { 0x11, 0x15, 0x19 }, | |
287 | {{ 31, 0 + DIV16 }, { 74, 9 + DIV8 }} | |
288 | }; | |
289 | ||
290 | /* 512x384, 60Hz (2) */ | |
291 | static struct platinum_regvals platinum_reg_init_2 = { | |
292 | 0x1010, | |
293 | { 544, 1056, 2080 }, | |
294 | { 0xff0, 4, 0, 0, 0, 0, 0x320, 0, | |
295 | 0, 0x25c, 0x140, 0x10, 0x27f, 0x1f, 0x2b, 0x4f, | |
296 | 0x68, 0x268, 0x27e, 0x32e, 0x32c, 4, 9, 0x2a, | |
297 | 0x32a, 0x32b }, { 0x5a, 0x62, 0x67 }, | |
298 | { 2, 0, 0xff }, { 0x11, 0x15, 0x19 }, | |
299 | {{ 33, 2 + DIV8 }, { 79, 9 + DIV8 }} | |
300 | }; | |
301 | ||
302 | /* 512x384, 60Hz Interlaced-NTSC (1) */ | |
303 | static struct platinum_regvals platinum_reg_init_1 = { | |
304 | 0x1010, | |
305 | { 544, 1056, 2080 }, | |
306 | { 0xff0, 4, 0, 0, 0, 0, 0x320, 0, | |
307 | 0, 0xa5, 0xc3, 0xe, 0x185, 0x1c, 0x1f, 0x30, | |
308 | 0x57, 0x157, 0x184, 0x20d, 0x20c, 5, 0xb, 0x53, | |
309 | 0x1d3, 0x206 }, { 0x49, 0x51, 0x56 }, | |
310 | { 2, 0, 0xff }, { 0x11, 0x15, 0x19 }, | |
311 | {{ 94, 5 + DIV16 }, { 48, 7 + DIV8 }} | |
312 | }; | |
313 | ||
314 | static struct platinum_regvals *platinum_reg_init[VMODE_MAX] = { | |
315 | &platinum_reg_init_1, | |
316 | &platinum_reg_init_2, | |
317 | &platinum_reg_init_3, | |
318 | &platinum_reg_init_4, | |
319 | &platinum_reg_init_5, | |
320 | &platinum_reg_init_6, | |
321 | &platinum_reg_init_7, | |
322 | &platinum_reg_init_8, | |
323 | &platinum_reg_init_9, | |
324 | &platinum_reg_init_10, | |
325 | &platinum_reg_init_11, | |
326 | &platinum_reg_init_12, | |
327 | &platinum_reg_init_13, | |
328 | &platinum_reg_init_14, | |
329 | &platinum_reg_init_15, | |
330 | &platinum_reg_init_16, | |
331 | &platinum_reg_init_17, | |
332 | &platinum_reg_init_18, | |
333 | &platinum_reg_init_19, | |
334 | &platinum_reg_init_20 | |
335 | }; | |
336 | ||
337 | struct vmode_attr { | |
338 | int hres; | |
339 | int vres; | |
340 | int vfreq; | |
341 | int interlaced; | |
342 | }; | |
343 | ||
344 | struct vmode_attr vmode_attrs[VMODE_MAX] = { | |
345 | {512, 384, 60, 1}, | |
346 | {512, 384, 60}, | |
347 | {640, 480, 50, 1}, | |
348 | {640, 480, 60, 1}, | |
349 | {640, 480, 60}, | |
350 | {640, 480, 67}, | |
351 | {640, 870, 75}, | |
352 | {768, 576, 50, 1}, | |
353 | {800, 600, 56}, | |
354 | {800, 600, 60}, | |
355 | {800, 600, 72}, | |
356 | {800, 600, 75}, | |
357 | {832, 624, 75}, | |
358 | {1024, 768, 60}, | |
359 | {1024, 768, 72}, | |
360 | {1024, 768, 75}, | |
361 | {1024, 768, 75}, | |
362 | {1152, 870, 75}, | |
363 | {1280, 960, 75}, | |
364 | {1280, 1024, 75} | |
365 | }; | |
366 |