Commit | Line | Data |
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1da177e4 LT |
1 | /* |
2 | * linux/drivers/video/riva/fbdev-i2c.c - nVidia i2c | |
3 | * | |
4 | * Maintained by Ani Joshi <ajoshi@shell.unixbox.com> | |
5 | * | |
6 | * Copyright 2004 Antonino A. Daplas <adaplas @pol.net> | |
7 | * | |
8 | * Based on radeonfb-i2c.c | |
9 | * | |
10 | * This file is subject to the terms and conditions of the GNU General Public | |
11 | * License. See the file COPYING in the main directory of this archive | |
12 | * for more details. | |
13 | */ | |
14 | ||
1da177e4 LT |
15 | #include <linux/module.h> |
16 | #include <linux/kernel.h> | |
1da177e4 LT |
17 | #include <linux/delay.h> |
18 | #include <linux/pci.h> | |
19 | #include <linux/fb.h> | |
20 | #include <linux/jiffies.h> | |
21 | ||
22 | #include <asm/io.h> | |
23 | ||
24 | #include "rivafb.h" | |
25 | #include "../edid.h" | |
26 | ||
1da177e4 LT |
27 | static void riva_gpio_setscl(void* data, int state) |
28 | { | |
f4a41836 | 29 | struct riva_i2c_chan *chan = data; |
1da177e4 LT |
30 | struct riva_par *par = chan->par; |
31 | u32 val; | |
32 | ||
33 | VGA_WR08(par->riva.PCIO, 0x3d4, chan->ddc_base + 1); | |
34 | val = VGA_RD08(par->riva.PCIO, 0x3d5) & 0xf0; | |
35 | ||
36 | if (state) | |
37 | val |= 0x20; | |
38 | else | |
39 | val &= ~0x20; | |
40 | ||
41 | VGA_WR08(par->riva.PCIO, 0x3d4, chan->ddc_base + 1); | |
42 | VGA_WR08(par->riva.PCIO, 0x3d5, val | 0x1); | |
43 | } | |
44 | ||
45 | static void riva_gpio_setsda(void* data, int state) | |
46 | { | |
f4a41836 | 47 | struct riva_i2c_chan *chan = data; |
1da177e4 LT |
48 | struct riva_par *par = chan->par; |
49 | u32 val; | |
50 | ||
51 | VGA_WR08(par->riva.PCIO, 0x3d4, chan->ddc_base + 1); | |
52 | val = VGA_RD08(par->riva.PCIO, 0x3d5) & 0xf0; | |
53 | ||
54 | if (state) | |
55 | val |= 0x10; | |
56 | else | |
57 | val &= ~0x10; | |
58 | ||
59 | VGA_WR08(par->riva.PCIO, 0x3d4, chan->ddc_base + 1); | |
60 | VGA_WR08(par->riva.PCIO, 0x3d5, val | 0x1); | |
61 | } | |
62 | ||
63 | static int riva_gpio_getscl(void* data) | |
64 | { | |
f4a41836 | 65 | struct riva_i2c_chan *chan = data; |
1da177e4 LT |
66 | struct riva_par *par = chan->par; |
67 | u32 val = 0; | |
68 | ||
69 | VGA_WR08(par->riva.PCIO, 0x3d4, chan->ddc_base); | |
70 | if (VGA_RD08(par->riva.PCIO, 0x3d5) & 0x04) | |
71 | val = 1; | |
72 | ||
73 | val = VGA_RD08(par->riva.PCIO, 0x3d5); | |
74 | ||
75 | return val; | |
76 | } | |
77 | ||
78 | static int riva_gpio_getsda(void* data) | |
79 | { | |
f4a41836 | 80 | struct riva_i2c_chan *chan = data; |
1da177e4 LT |
81 | struct riva_par *par = chan->par; |
82 | u32 val = 0; | |
83 | ||
84 | VGA_WR08(par->riva.PCIO, 0x3d4, chan->ddc_base); | |
85 | if (VGA_RD08(par->riva.PCIO, 0x3d5) & 0x08) | |
86 | val = 1; | |
87 | ||
88 | return val; | |
89 | } | |
90 | ||
1da177e4 LT |
91 | static int riva_setup_i2c_bus(struct riva_i2c_chan *chan, const char *name) |
92 | { | |
93 | int rc; | |
94 | ||
95 | strcpy(chan->adapter.name, name); | |
96 | chan->adapter.owner = THIS_MODULE; | |
1684a984 | 97 | chan->adapter.id = I2C_HW_B_RIVA; |
1da177e4 LT |
98 | chan->adapter.algo_data = &chan->algo; |
99 | chan->adapter.dev.parent = &chan->par->pdev->dev; | |
100 | chan->algo.setsda = riva_gpio_setsda; | |
101 | chan->algo.setscl = riva_gpio_setscl; | |
102 | chan->algo.getsda = riva_gpio_getsda; | |
103 | chan->algo.getscl = riva_gpio_getscl; | |
104 | chan->algo.udelay = 40; | |
105 | chan->algo.timeout = msecs_to_jiffies(2); | |
106 | chan->algo.data = chan; | |
107 | ||
108 | i2c_set_adapdata(&chan->adapter, chan); | |
109 | ||
110 | /* Raise SCL and SDA */ | |
111 | riva_gpio_setsda(chan, 1); | |
112 | riva_gpio_setscl(chan, 1); | |
113 | udelay(20); | |
114 | ||
115 | rc = i2c_bit_add_bus(&chan->adapter); | |
116 | if (rc == 0) | |
117 | dev_dbg(&chan->par->pdev->dev, "I2C bus %s registered.\n", name); | |
118 | else { | |
119 | dev_warn(&chan->par->pdev->dev, | |
120 | "Failed to register I2C bus %s.\n", name); | |
121 | chan->par = NULL; | |
122 | } | |
123 | ||
124 | return rc; | |
125 | } | |
126 | ||
127 | void riva_create_i2c_busses(struct riva_par *par) | |
128 | { | |
129 | par->bus = 3; | |
130 | ||
131 | par->chan[0].par = par; | |
132 | par->chan[1].par = par; | |
133 | par->chan[2].par = par; | |
134 | ||
135 | par->chan[0].ddc_base = 0x3e; | |
136 | par->chan[1].ddc_base = 0x36; | |
137 | par->chan[2].ddc_base = 0x50; | |
138 | riva_setup_i2c_bus(&par->chan[0], "BUS1"); | |
139 | riva_setup_i2c_bus(&par->chan[1], "BUS2"); | |
140 | riva_setup_i2c_bus(&par->chan[2], "BUS3"); | |
141 | } | |
142 | ||
143 | void riva_delete_i2c_busses(struct riva_par *par) | |
144 | { | |
145 | if (par->chan[0].par) | |
3269711b | 146 | i2c_del_adapter(&par->chan[0].adapter); |
1da177e4 LT |
147 | par->chan[0].par = NULL; |
148 | ||
149 | if (par->chan[1].par) | |
3269711b | 150 | i2c_del_adapter(&par->chan[1].adapter); |
1da177e4 LT |
151 | par->chan[1].par = NULL; |
152 | ||
153 | if (par->chan[2].par) | |
3269711b | 154 | i2c_del_adapter(&par->chan[2].adapter); |
1da177e4 LT |
155 | par->chan[2].par = NULL; |
156 | } | |
157 | ||
1da177e4 LT |
158 | int riva_probe_i2c_connector(struct riva_par *par, int conn, u8 **out_edid) |
159 | { | |
160 | u8 *edid = NULL; | |
1da177e4 | 161 | |
bf5df0a2 AD |
162 | edid = fb_ddc_read(&par->chan[conn-1].adapter); |
163 | ||
1da177e4 LT |
164 | if (out_edid) |
165 | *out_edid = edid; | |
166 | if (!edid) | |
167 | return 1; | |
168 | ||
169 | return 0; | |
170 | } | |
171 |