Commit | Line | Data |
---|---|---|
cfb4f5d1 MD |
1 | /* |
2 | * SuperH Mobile LCDC Framebuffer | |
3 | * | |
4 | * Copyright (c) 2008 Magnus Damm | |
5 | * | |
6 | * This file is subject to the terms and conditions of the GNU General Public | |
7 | * License. See the file "COPYING" in the main directory of this archive | |
8 | * for more details. | |
9 | */ | |
10 | ||
11 | #include <linux/kernel.h> | |
12 | #include <linux/init.h> | |
13 | #include <linux/delay.h> | |
14 | #include <linux/mm.h> | |
cfb4f5d1 | 15 | #include <linux/clk.h> |
0246c471 | 16 | #include <linux/pm_runtime.h> |
cfb4f5d1 MD |
17 | #include <linux/platform_device.h> |
18 | #include <linux/dma-mapping.h> | |
8564557a | 19 | #include <linux/interrupt.h> |
1c6a307a | 20 | #include <linux/vmalloc.h> |
40331b21 | 21 | #include <linux/ioctl.h> |
5a0e3ad6 | 22 | #include <linux/slab.h> |
dd210503 | 23 | #include <linux/console.h> |
3b0fd9d7 AC |
24 | #include <linux/backlight.h> |
25 | #include <linux/gpio.h> | |
225c9a8d | 26 | #include <video/sh_mobile_lcdc.h> |
8564557a | 27 | #include <asm/atomic.h> |
cfb4f5d1 | 28 | |
6de9edd5 GL |
29 | #include "sh_mobile_lcdcfb.h" |
30 | ||
a6f15ade PE |
31 | #define SIDE_B_OFFSET 0x1000 |
32 | #define MIRROR_OFFSET 0x2000 | |
cfb4f5d1 | 33 | |
cfb4f5d1 MD |
34 | /* shared registers */ |
35 | #define _LDDCKR 0x410 | |
36 | #define _LDDCKSTPR 0x414 | |
37 | #define _LDINTR 0x468 | |
38 | #define _LDSR 0x46c | |
39 | #define _LDCNT1R 0x470 | |
40 | #define _LDCNT2R 0x474 | |
9dd38819 | 41 | #define _LDRCNTR 0x478 |
cfb4f5d1 MD |
42 | #define _LDDDSR 0x47c |
43 | #define _LDDWD0R 0x800 | |
44 | #define _LDDRDR 0x840 | |
45 | #define _LDDWAR 0x900 | |
46 | #define _LDDRAR 0x904 | |
47 | ||
0246c471 MD |
48 | /* shared registers and their order for context save/restore */ |
49 | static int lcdc_shared_regs[] = { | |
50 | _LDDCKR, | |
51 | _LDDCKSTPR, | |
52 | _LDINTR, | |
53 | _LDDDSR, | |
54 | _LDCNT1R, | |
55 | _LDCNT2R, | |
56 | }; | |
57 | #define NR_SHARED_REGS ARRAY_SIZE(lcdc_shared_regs) | |
58 | ||
d2ecbab5 GL |
59 | #define MAX_XRES 1920 |
60 | #define MAX_YRES 1080 | |
cfb4f5d1 | 61 | |
0246c471 | 62 | static unsigned long lcdc_offs_mainlcd[NR_CH_REGS] = { |
cfb4f5d1 MD |
63 | [LDDCKPAT1R] = 0x400, |
64 | [LDDCKPAT2R] = 0x404, | |
65 | [LDMT1R] = 0x418, | |
66 | [LDMT2R] = 0x41c, | |
67 | [LDMT3R] = 0x420, | |
68 | [LDDFR] = 0x424, | |
69 | [LDSM1R] = 0x428, | |
8564557a | 70 | [LDSM2R] = 0x42c, |
cfb4f5d1 | 71 | [LDSA1R] = 0x430, |
53b50314 | 72 | [LDSA2R] = 0x434, |
cfb4f5d1 MD |
73 | [LDMLSR] = 0x438, |
74 | [LDHCNR] = 0x448, | |
75 | [LDHSYNR] = 0x44c, | |
76 | [LDVLNR] = 0x450, | |
77 | [LDVSYNR] = 0x454, | |
78 | [LDPMR] = 0x460, | |
6011bdea | 79 | [LDHAJR] = 0x4a0, |
cfb4f5d1 MD |
80 | }; |
81 | ||
0246c471 | 82 | static unsigned long lcdc_offs_sublcd[NR_CH_REGS] = { |
cfb4f5d1 MD |
83 | [LDDCKPAT1R] = 0x408, |
84 | [LDDCKPAT2R] = 0x40c, | |
85 | [LDMT1R] = 0x600, | |
86 | [LDMT2R] = 0x604, | |
87 | [LDMT3R] = 0x608, | |
88 | [LDDFR] = 0x60c, | |
89 | [LDSM1R] = 0x610, | |
8564557a | 90 | [LDSM2R] = 0x614, |
cfb4f5d1 MD |
91 | [LDSA1R] = 0x618, |
92 | [LDMLSR] = 0x620, | |
93 | [LDHCNR] = 0x624, | |
94 | [LDHSYNR] = 0x628, | |
95 | [LDVLNR] = 0x62c, | |
96 | [LDVSYNR] = 0x630, | |
97 | [LDPMR] = 0x63c, | |
98 | }; | |
99 | ||
100 | #define START_LCDC 0x00000001 | |
101 | #define LCDC_RESET 0x00000100 | |
102 | #define DISPLAY_BEU 0x00000008 | |
103 | #define LCDC_ENABLE 0x00000001 | |
8564557a | 104 | #define LDINTR_FE 0x00000400 |
9dd38819 PE |
105 | #define LDINTR_VSE 0x00000200 |
106 | #define LDINTR_VEE 0x00000100 | |
8564557a | 107 | #define LDINTR_FS 0x00000004 |
9dd38819 PE |
108 | #define LDINTR_VSS 0x00000002 |
109 | #define LDINTR_VES 0x00000001 | |
a6f15ade PE |
110 | #define LDRCNTR_SRS 0x00020000 |
111 | #define LDRCNTR_SRC 0x00010000 | |
112 | #define LDRCNTR_MRS 0x00000002 | |
113 | #define LDRCNTR_MRC 0x00000001 | |
40331b21 | 114 | #define LDSR_MRS 0x00000100 |
cfb4f5d1 | 115 | |
c44f9f76 GL |
116 | static const struct fb_videomode default_720p = { |
117 | .name = "HDMI 720p", | |
118 | .xres = 1280, | |
119 | .yres = 720, | |
120 | ||
5ae0cf82 GL |
121 | .left_margin = 220, |
122 | .right_margin = 110, | |
123 | .hsync_len = 40, | |
c44f9f76 GL |
124 | |
125 | .upper_margin = 20, | |
126 | .lower_margin = 5, | |
127 | .vsync_len = 5, | |
128 | ||
129 | .pixclock = 13468, | |
5ae0cf82 | 130 | .refresh = 60, |
c44f9f76 | 131 | .sync = FB_SYNC_VERT_HIGH_ACT | FB_SYNC_HOR_HIGH_ACT, |
0246c471 MD |
132 | }; |
133 | ||
134 | struct sh_mobile_lcdc_priv { | |
135 | void __iomem *base; | |
136 | int irq; | |
137 | atomic_t hw_usecnt; | |
138 | struct device *dev; | |
139 | struct clk *dot_clk; | |
140 | unsigned long lddckr; | |
141 | struct sh_mobile_lcdc_chan ch[2]; | |
6011bdea | 142 | struct notifier_block notifier; |
0246c471 MD |
143 | unsigned long saved_shared_regs[NR_SHARED_REGS]; |
144 | int started; | |
417d4827 | 145 | int forced_bpp; /* 2 channel LCDC must share bpp setting */ |
0246c471 MD |
146 | }; |
147 | ||
a6f15ade PE |
148 | static bool banked(int reg_nr) |
149 | { | |
150 | switch (reg_nr) { | |
151 | case LDMT1R: | |
152 | case LDMT2R: | |
153 | case LDMT3R: | |
154 | case LDDFR: | |
155 | case LDSM1R: | |
156 | case LDSA1R: | |
53b50314 | 157 | case LDSA2R: |
a6f15ade PE |
158 | case LDMLSR: |
159 | case LDHCNR: | |
160 | case LDHSYNR: | |
161 | case LDVLNR: | |
162 | case LDVSYNR: | |
163 | return true; | |
164 | } | |
165 | return false; | |
166 | } | |
167 | ||
cfb4f5d1 MD |
168 | static void lcdc_write_chan(struct sh_mobile_lcdc_chan *chan, |
169 | int reg_nr, unsigned long data) | |
170 | { | |
171 | iowrite32(data, chan->lcdc->base + chan->reg_offs[reg_nr]); | |
a6f15ade PE |
172 | if (banked(reg_nr)) |
173 | iowrite32(data, chan->lcdc->base + chan->reg_offs[reg_nr] + | |
174 | SIDE_B_OFFSET); | |
175 | } | |
176 | ||
177 | static void lcdc_write_chan_mirror(struct sh_mobile_lcdc_chan *chan, | |
178 | int reg_nr, unsigned long data) | |
179 | { | |
180 | iowrite32(data, chan->lcdc->base + chan->reg_offs[reg_nr] + | |
181 | MIRROR_OFFSET); | |
cfb4f5d1 MD |
182 | } |
183 | ||
184 | static unsigned long lcdc_read_chan(struct sh_mobile_lcdc_chan *chan, | |
185 | int reg_nr) | |
186 | { | |
187 | return ioread32(chan->lcdc->base + chan->reg_offs[reg_nr]); | |
188 | } | |
189 | ||
190 | static void lcdc_write(struct sh_mobile_lcdc_priv *priv, | |
191 | unsigned long reg_offs, unsigned long data) | |
192 | { | |
193 | iowrite32(data, priv->base + reg_offs); | |
194 | } | |
195 | ||
196 | static unsigned long lcdc_read(struct sh_mobile_lcdc_priv *priv, | |
197 | unsigned long reg_offs) | |
198 | { | |
199 | return ioread32(priv->base + reg_offs); | |
200 | } | |
201 | ||
202 | static void lcdc_wait_bit(struct sh_mobile_lcdc_priv *priv, | |
203 | unsigned long reg_offs, | |
204 | unsigned long mask, unsigned long until) | |
205 | { | |
206 | while ((lcdc_read(priv, reg_offs) & mask) != until) | |
207 | cpu_relax(); | |
208 | } | |
209 | ||
210 | static int lcdc_chan_is_sublcd(struct sh_mobile_lcdc_chan *chan) | |
211 | { | |
212 | return chan->cfg.chan == LCDC_CHAN_SUBLCD; | |
213 | } | |
214 | ||
215 | static void lcdc_sys_write_index(void *handle, unsigned long data) | |
216 | { | |
217 | struct sh_mobile_lcdc_chan *ch = handle; | |
218 | ||
219 | lcdc_write(ch->lcdc, _LDDWD0R, data | 0x10000000); | |
220 | lcdc_wait_bit(ch->lcdc, _LDSR, 2, 0); | |
221 | lcdc_write(ch->lcdc, _LDDWAR, 1 | (lcdc_chan_is_sublcd(ch) ? 2 : 0)); | |
909f10de | 222 | lcdc_wait_bit(ch->lcdc, _LDSR, 2, 0); |
cfb4f5d1 MD |
223 | } |
224 | ||
225 | static void lcdc_sys_write_data(void *handle, unsigned long data) | |
226 | { | |
227 | struct sh_mobile_lcdc_chan *ch = handle; | |
228 | ||
229 | lcdc_write(ch->lcdc, _LDDWD0R, data | 0x11000000); | |
230 | lcdc_wait_bit(ch->lcdc, _LDSR, 2, 0); | |
231 | lcdc_write(ch->lcdc, _LDDWAR, 1 | (lcdc_chan_is_sublcd(ch) ? 2 : 0)); | |
909f10de | 232 | lcdc_wait_bit(ch->lcdc, _LDSR, 2, 0); |
cfb4f5d1 MD |
233 | } |
234 | ||
235 | static unsigned long lcdc_sys_read_data(void *handle) | |
236 | { | |
237 | struct sh_mobile_lcdc_chan *ch = handle; | |
238 | ||
239 | lcdc_write(ch->lcdc, _LDDRDR, 0x01000000); | |
240 | lcdc_wait_bit(ch->lcdc, _LDSR, 2, 0); | |
241 | lcdc_write(ch->lcdc, _LDDRAR, 1 | (lcdc_chan_is_sublcd(ch) ? 2 : 0)); | |
242 | udelay(1); | |
909f10de | 243 | lcdc_wait_bit(ch->lcdc, _LDSR, 2, 0); |
cfb4f5d1 | 244 | |
ec56b66f | 245 | return lcdc_read(ch->lcdc, _LDDRDR) & 0x3ffff; |
cfb4f5d1 MD |
246 | } |
247 | ||
248 | struct sh_mobile_lcdc_sys_bus_ops sh_mobile_lcdc_sys_bus_ops = { | |
249 | lcdc_sys_write_index, | |
250 | lcdc_sys_write_data, | |
251 | lcdc_sys_read_data, | |
252 | }; | |
253 | ||
8564557a MD |
254 | static void sh_mobile_lcdc_clk_on(struct sh_mobile_lcdc_priv *priv) |
255 | { | |
0246c471 MD |
256 | if (atomic_inc_and_test(&priv->hw_usecnt)) { |
257 | pm_runtime_get_sync(priv->dev); | |
8564557a MD |
258 | if (priv->dot_clk) |
259 | clk_enable(priv->dot_clk); | |
260 | } | |
261 | } | |
262 | ||
263 | static void sh_mobile_lcdc_clk_off(struct sh_mobile_lcdc_priv *priv) | |
264 | { | |
0246c471 | 265 | if (atomic_sub_return(1, &priv->hw_usecnt) == -1) { |
8564557a MD |
266 | if (priv->dot_clk) |
267 | clk_disable(priv->dot_clk); | |
0246c471 | 268 | pm_runtime_put(priv->dev); |
8564557a MD |
269 | } |
270 | } | |
8564557a | 271 | |
1c6a307a PM |
272 | static int sh_mobile_lcdc_sginit(struct fb_info *info, |
273 | struct list_head *pagelist) | |
274 | { | |
275 | struct sh_mobile_lcdc_chan *ch = info->par; | |
276 | unsigned int nr_pages_max = info->fix.smem_len >> PAGE_SHIFT; | |
277 | struct page *page; | |
278 | int nr_pages = 0; | |
279 | ||
280 | sg_init_table(ch->sglist, nr_pages_max); | |
281 | ||
282 | list_for_each_entry(page, pagelist, lru) | |
283 | sg_set_page(&ch->sglist[nr_pages++], page, PAGE_SIZE, 0); | |
284 | ||
285 | return nr_pages; | |
286 | } | |
287 | ||
8564557a MD |
288 | static void sh_mobile_lcdc_deferred_io(struct fb_info *info, |
289 | struct list_head *pagelist) | |
290 | { | |
291 | struct sh_mobile_lcdc_chan *ch = info->par; | |
ef61aae4 | 292 | struct sh_mobile_lcdc_board_cfg *bcfg = &ch->cfg.board_cfg; |
8564557a MD |
293 | |
294 | /* enable clocks before accessing hardware */ | |
295 | sh_mobile_lcdc_clk_on(ch->lcdc); | |
296 | ||
5c1a56b5 PM |
297 | /* |
298 | * It's possible to get here without anything on the pagelist via | |
299 | * sh_mobile_lcdc_deferred_io_touch() or via a userspace fsync() | |
300 | * invocation. In the former case, the acceleration routines are | |
301 | * stepped in to when using the framebuffer console causing the | |
302 | * workqueue to be scheduled without any dirty pages on the list. | |
303 | * | |
304 | * Despite this, a panel update is still needed given that the | |
305 | * acceleration routines have their own methods for writing in | |
306 | * that still need to be updated. | |
307 | * | |
308 | * The fsync() and empty pagelist case could be optimized for, | |
309 | * but we don't bother, as any application exhibiting such | |
310 | * behaviour is fundamentally broken anyways. | |
311 | */ | |
312 | if (!list_empty(pagelist)) { | |
313 | unsigned int nr_pages = sh_mobile_lcdc_sginit(info, pagelist); | |
314 | ||
315 | /* trigger panel update */ | |
316 | dma_map_sg(info->dev, ch->sglist, nr_pages, DMA_TO_DEVICE); | |
ef61aae4 MD |
317 | if (bcfg->start_transfer) |
318 | bcfg->start_transfer(bcfg->board_data, ch, | |
319 | &sh_mobile_lcdc_sys_bus_ops); | |
5c1a56b5 PM |
320 | lcdc_write_chan(ch, LDSM2R, 1); |
321 | dma_unmap_sg(info->dev, ch->sglist, nr_pages, DMA_TO_DEVICE); | |
ef61aae4 MD |
322 | } else { |
323 | if (bcfg->start_transfer) | |
324 | bcfg->start_transfer(bcfg->board_data, ch, | |
325 | &sh_mobile_lcdc_sys_bus_ops); | |
5c1a56b5 | 326 | lcdc_write_chan(ch, LDSM2R, 1); |
ef61aae4 | 327 | } |
8564557a MD |
328 | } |
329 | ||
330 | static void sh_mobile_lcdc_deferred_io_touch(struct fb_info *info) | |
331 | { | |
332 | struct fb_deferred_io *fbdefio = info->fbdefio; | |
333 | ||
334 | if (fbdefio) | |
335 | schedule_delayed_work(&info->deferred_work, fbdefio->delay); | |
336 | } | |
337 | ||
338 | static irqreturn_t sh_mobile_lcdc_irq(int irq, void *data) | |
339 | { | |
340 | struct sh_mobile_lcdc_priv *priv = data; | |
2feb075a | 341 | struct sh_mobile_lcdc_chan *ch; |
8564557a | 342 | unsigned long tmp; |
9dd38819 | 343 | unsigned long ldintr; |
2feb075a MD |
344 | int is_sub; |
345 | int k; | |
8564557a MD |
346 | |
347 | /* acknowledge interrupt */ | |
9dd38819 PE |
348 | ldintr = tmp = lcdc_read(priv, _LDINTR); |
349 | /* | |
350 | * disable further VSYNC End IRQs, preserve all other enabled IRQs, | |
351 | * write 0 to bits 0-6 to ack all triggered IRQs. | |
352 | */ | |
353 | tmp &= 0xffffff00 & ~LDINTR_VEE; | |
8564557a MD |
354 | lcdc_write(priv, _LDINTR, tmp); |
355 | ||
2feb075a MD |
356 | /* figure out if this interrupt is for main or sub lcd */ |
357 | is_sub = (lcdc_read(priv, _LDSR) & (1 << 10)) ? 1 : 0; | |
358 | ||
9dd38819 | 359 | /* wake up channel and disable clocks */ |
2feb075a MD |
360 | for (k = 0; k < ARRAY_SIZE(priv->ch); k++) { |
361 | ch = &priv->ch[k]; | |
362 | ||
363 | if (!ch->enabled) | |
364 | continue; | |
365 | ||
9dd38819 PE |
366 | /* Frame Start */ |
367 | if (ldintr & LDINTR_FS) { | |
368 | if (is_sub == lcdc_chan_is_sublcd(ch)) { | |
369 | ch->frame_end = 1; | |
370 | wake_up(&ch->frame_end_wait); | |
2feb075a | 371 | |
9dd38819 PE |
372 | sh_mobile_lcdc_clk_off(priv); |
373 | } | |
374 | } | |
375 | ||
376 | /* VSYNC End */ | |
40331b21 PE |
377 | if (ldintr & LDINTR_VES) |
378 | complete(&ch->vsync_completion); | |
2feb075a MD |
379 | } |
380 | ||
8564557a MD |
381 | return IRQ_HANDLED; |
382 | } | |
383 | ||
cfb4f5d1 MD |
384 | static void sh_mobile_lcdc_start_stop(struct sh_mobile_lcdc_priv *priv, |
385 | int start) | |
386 | { | |
387 | unsigned long tmp = lcdc_read(priv, _LDCNT2R); | |
388 | int k; | |
389 | ||
390 | /* start or stop the lcdc */ | |
391 | if (start) | |
392 | lcdc_write(priv, _LDCNT2R, tmp | START_LCDC); | |
393 | else | |
394 | lcdc_write(priv, _LDCNT2R, tmp & ~START_LCDC); | |
395 | ||
396 | /* wait until power is applied/stopped on all channels */ | |
397 | for (k = 0; k < ARRAY_SIZE(priv->ch); k++) | |
398 | if (lcdc_read(priv, _LDCNT2R) & priv->ch[k].enabled) | |
399 | while (1) { | |
400 | tmp = lcdc_read_chan(&priv->ch[k], LDPMR) & 3; | |
401 | if (start && tmp == 3) | |
402 | break; | |
403 | if (!start && tmp == 0) | |
404 | break; | |
405 | cpu_relax(); | |
406 | } | |
407 | ||
408 | if (!start) | |
409 | lcdc_write(priv, _LDDCKSTPR, 1); /* stop dotclock */ | |
410 | } | |
411 | ||
6011bdea GL |
412 | static void sh_mobile_lcdc_geometry(struct sh_mobile_lcdc_chan *ch) |
413 | { | |
1c120deb GL |
414 | struct fb_var_screeninfo *var = &ch->info->var, *display_var = &ch->display_var; |
415 | unsigned long h_total, hsync_pos, display_h_total; | |
6011bdea GL |
416 | u32 tmp; |
417 | ||
418 | tmp = ch->ldmt1r_value; | |
419 | tmp |= (var->sync & FB_SYNC_VERT_HIGH_ACT) ? 0 : 1 << 28; | |
420 | tmp |= (var->sync & FB_SYNC_HOR_HIGH_ACT) ? 0 : 1 << 27; | |
421 | tmp |= (ch->cfg.flags & LCDC_FLAGS_DWPOL) ? 1 << 26 : 0; | |
422 | tmp |= (ch->cfg.flags & LCDC_FLAGS_DIPOL) ? 1 << 25 : 0; | |
423 | tmp |= (ch->cfg.flags & LCDC_FLAGS_DAPOL) ? 1 << 24 : 0; | |
424 | tmp |= (ch->cfg.flags & LCDC_FLAGS_HSCNT) ? 1 << 17 : 0; | |
425 | tmp |= (ch->cfg.flags & LCDC_FLAGS_DWCNT) ? 1 << 16 : 0; | |
426 | lcdc_write_chan(ch, LDMT1R, tmp); | |
427 | ||
428 | /* setup SYS bus */ | |
429 | lcdc_write_chan(ch, LDMT2R, ch->cfg.sys_bus_cfg.ldmt2r); | |
430 | lcdc_write_chan(ch, LDMT3R, ch->cfg.sys_bus_cfg.ldmt3r); | |
431 | ||
432 | /* horizontal configuration */ | |
1c120deb GL |
433 | h_total = display_var->xres + display_var->hsync_len + |
434 | display_var->left_margin + display_var->right_margin; | |
6011bdea | 435 | tmp = h_total / 8; /* HTCN */ |
1c120deb | 436 | tmp |= (min(display_var->xres, var->xres) / 8) << 16; /* HDCN */ |
6011bdea GL |
437 | lcdc_write_chan(ch, LDHCNR, tmp); |
438 | ||
1c120deb | 439 | hsync_pos = display_var->xres + display_var->right_margin; |
6011bdea | 440 | tmp = hsync_pos / 8; /* HSYNP */ |
1c120deb | 441 | tmp |= (display_var->hsync_len / 8) << 16; /* HSYNW */ |
6011bdea GL |
442 | lcdc_write_chan(ch, LDHSYNR, tmp); |
443 | ||
444 | /* vertical configuration */ | |
1c120deb GL |
445 | tmp = display_var->yres + display_var->vsync_len + |
446 | display_var->upper_margin + display_var->lower_margin; /* VTLN */ | |
447 | tmp |= min(display_var->yres, var->yres) << 16; /* VDLN */ | |
6011bdea GL |
448 | lcdc_write_chan(ch, LDVLNR, tmp); |
449 | ||
1c120deb GL |
450 | tmp = display_var->yres + display_var->lower_margin; /* VSYNP */ |
451 | tmp |= display_var->vsync_len << 16; /* VSYNW */ | |
6011bdea GL |
452 | lcdc_write_chan(ch, LDVSYNR, tmp); |
453 | ||
454 | /* Adjust horizontal synchronisation for HDMI */ | |
1c120deb GL |
455 | display_h_total = display_var->xres + display_var->hsync_len + |
456 | display_var->left_margin + display_var->right_margin; | |
457 | tmp = ((display_var->xres & 7) << 24) | | |
458 | ((display_h_total & 7) << 16) | | |
459 | ((display_var->hsync_len & 7) << 8) | | |
6011bdea GL |
460 | hsync_pos; |
461 | lcdc_write_chan(ch, LDHAJR, tmp); | |
462 | } | |
463 | ||
cfb4f5d1 MD |
464 | static int sh_mobile_lcdc_start(struct sh_mobile_lcdc_priv *priv) |
465 | { | |
466 | struct sh_mobile_lcdc_chan *ch; | |
cfb4f5d1 MD |
467 | struct sh_mobile_lcdc_board_cfg *board_cfg; |
468 | unsigned long tmp; | |
417d4827 | 469 | int bpp = 0; |
53b50314 | 470 | unsigned long ldddsr; |
cfb4f5d1 | 471 | int k, m; |
cfb4f5d1 | 472 | |
8564557a | 473 | /* enable clocks before accessing the hardware */ |
417d4827 MD |
474 | for (k = 0; k < ARRAY_SIZE(priv->ch); k++) { |
475 | if (priv->ch[k].enabled) { | |
8564557a | 476 | sh_mobile_lcdc_clk_on(priv); |
417d4827 MD |
477 | if (!bpp) |
478 | bpp = priv->ch[k].info->var.bits_per_pixel; | |
479 | } | |
480 | } | |
8564557a | 481 | |
cfb4f5d1 MD |
482 | /* reset */ |
483 | lcdc_write(priv, _LDCNT2R, lcdc_read(priv, _LDCNT2R) | LCDC_RESET); | |
484 | lcdc_wait_bit(priv, _LDCNT2R, LCDC_RESET, 0); | |
485 | ||
486 | /* enable LCDC channels */ | |
487 | tmp = lcdc_read(priv, _LDCNT2R); | |
488 | tmp |= priv->ch[0].enabled; | |
489 | tmp |= priv->ch[1].enabled; | |
490 | lcdc_write(priv, _LDCNT2R, tmp); | |
491 | ||
492 | /* read data from external memory, avoid using the BEU for now */ | |
493 | lcdc_write(priv, _LDCNT2R, lcdc_read(priv, _LDCNT2R) & ~DISPLAY_BEU); | |
494 | ||
495 | /* stop the lcdc first */ | |
496 | sh_mobile_lcdc_start_stop(priv, 0); | |
497 | ||
498 | /* configure clocks */ | |
499 | tmp = priv->lddckr; | |
500 | for (k = 0; k < ARRAY_SIZE(priv->ch); k++) { | |
501 | ch = &priv->ch[k]; | |
502 | ||
503 | if (!priv->ch[k].enabled) | |
504 | continue; | |
505 | ||
506 | m = ch->cfg.clock_divider; | |
507 | if (!m) | |
508 | continue; | |
509 | ||
510 | if (m == 1) | |
511 | m = 1 << 6; | |
512 | tmp |= m << (lcdc_chan_is_sublcd(ch) ? 8 : 0); | |
513 | ||
dd210503 | 514 | /* FIXME: sh7724 can only use 42, 48, 54 and 60 for the divider denominator */ |
1c120deb | 515 | lcdc_write_chan(ch, LDDCKPAT1R, 0); |
cfb4f5d1 MD |
516 | lcdc_write_chan(ch, LDDCKPAT2R, (1 << (m/2)) - 1); |
517 | } | |
518 | ||
519 | lcdc_write(priv, _LDDCKR, tmp); | |
520 | ||
521 | /* start dotclock again */ | |
522 | lcdc_write(priv, _LDDCKSTPR, 0); | |
523 | lcdc_wait_bit(priv, _LDDCKSTPR, ~0, 0); | |
524 | ||
8564557a | 525 | /* interrupts are disabled to begin with */ |
cfb4f5d1 MD |
526 | lcdc_write(priv, _LDINTR, 0); |
527 | ||
528 | for (k = 0; k < ARRAY_SIZE(priv->ch); k++) { | |
529 | ch = &priv->ch[k]; | |
cfb4f5d1 MD |
530 | |
531 | if (!ch->enabled) | |
532 | continue; | |
533 | ||
6011bdea | 534 | sh_mobile_lcdc_geometry(ch); |
cfb4f5d1 MD |
535 | |
536 | /* power supply */ | |
537 | lcdc_write_chan(ch, LDPMR, 0); | |
538 | ||
cfb4f5d1 | 539 | board_cfg = &ch->cfg.board_cfg; |
69843ba7 GL |
540 | if (board_cfg->setup_sys) { |
541 | int ret = board_cfg->setup_sys(board_cfg->board_data, | |
542 | ch, &sh_mobile_lcdc_sys_bus_ops); | |
543 | if (ret) | |
544 | return ret; | |
545 | } | |
cfb4f5d1 MD |
546 | } |
547 | ||
cfb4f5d1 | 548 | /* word and long word swap */ |
53b50314 DHG |
549 | ldddsr = lcdc_read(priv, _LDDDSR); |
550 | if (priv->ch[0].info->var.nonstd) | |
551 | lcdc_write(priv, _LDDDSR, ldddsr | 7); | |
552 | else { | |
553 | switch (bpp) { | |
554 | case 16: | |
555 | lcdc_write(priv, _LDDDSR, ldddsr | 6); | |
556 | break; | |
557 | case 24: | |
558 | lcdc_write(priv, _LDDDSR, ldddsr | 7); | |
559 | break; | |
560 | case 32: | |
561 | lcdc_write(priv, _LDDDSR, ldddsr | 4); | |
562 | break; | |
563 | } | |
417d4827 | 564 | } |
cfb4f5d1 MD |
565 | |
566 | for (k = 0; k < ARRAY_SIZE(priv->ch); k++) { | |
567 | ch = &priv->ch[k]; | |
568 | ||
569 | if (!priv->ch[k].enabled) | |
570 | continue; | |
571 | ||
572 | /* set bpp format in PKF[4:0] */ | |
573 | tmp = lcdc_read_chan(ch, LDDFR); | |
53b50314 DHG |
574 | tmp &= ~0x0003031f; |
575 | if (ch->info->var.nonstd) { | |
576 | tmp |= (ch->info->var.nonstd << 16); | |
577 | switch (ch->info->var.bits_per_pixel) { | |
578 | case 12: | |
579 | break; | |
580 | case 16: | |
581 | tmp |= (0x1 << 8); | |
582 | break; | |
583 | case 24: | |
584 | tmp |= (0x2 << 8); | |
585 | break; | |
586 | } | |
587 | } else { | |
588 | switch (ch->info->var.bits_per_pixel) { | |
589 | case 16: | |
590 | tmp |= 0x03; | |
591 | break; | |
592 | case 24: | |
593 | tmp |= 0x0b; | |
594 | break; | |
595 | case 32: | |
596 | break; | |
597 | } | |
417d4827 | 598 | } |
cfb4f5d1 MD |
599 | lcdc_write_chan(ch, LDDFR, tmp); |
600 | ||
601 | /* point out our frame buffer */ | |
e33afddc | 602 | lcdc_write_chan(ch, LDSA1R, ch->info->fix.smem_start); |
53b50314 DHG |
603 | if (ch->info->var.nonstd) |
604 | lcdc_write_chan(ch, LDSA2R, | |
605 | ch->info->fix.smem_start + | |
606 | ch->info->var.xres * | |
607 | ch->info->var.yres_virtual); | |
cfb4f5d1 MD |
608 | |
609 | /* set line size */ | |
e33afddc | 610 | lcdc_write_chan(ch, LDMLSR, ch->info->fix.line_length); |
cfb4f5d1 | 611 | |
8564557a MD |
612 | /* setup deferred io if SYS bus */ |
613 | tmp = ch->cfg.sys_bus_cfg.deferred_io_msec; | |
614 | if (ch->ldmt1r_value & (1 << 12) && tmp) { | |
615 | ch->defio.deferred_io = sh_mobile_lcdc_deferred_io; | |
616 | ch->defio.delay = msecs_to_jiffies(tmp); | |
e33afddc PM |
617 | ch->info->fbdefio = &ch->defio; |
618 | fb_deferred_io_init(ch->info); | |
8564557a MD |
619 | |
620 | /* one-shot mode */ | |
621 | lcdc_write_chan(ch, LDSM1R, 1); | |
622 | ||
623 | /* enable "Frame End Interrupt Enable" bit */ | |
624 | lcdc_write(priv, _LDINTR, LDINTR_FE); | |
625 | ||
626 | } else { | |
627 | /* continuous read mode */ | |
628 | lcdc_write_chan(ch, LDSM1R, 0); | |
629 | } | |
cfb4f5d1 MD |
630 | } |
631 | ||
632 | /* display output */ | |
633 | lcdc_write(priv, _LDCNT1R, LCDC_ENABLE); | |
634 | ||
635 | /* start the lcdc */ | |
636 | sh_mobile_lcdc_start_stop(priv, 1); | |
8e9bb19e | 637 | priv->started = 1; |
cfb4f5d1 MD |
638 | |
639 | /* tell the board code to enable the panel */ | |
640 | for (k = 0; k < ARRAY_SIZE(priv->ch); k++) { | |
641 | ch = &priv->ch[k]; | |
21bc1f02 MD |
642 | if (!ch->enabled) |
643 | continue; | |
644 | ||
cfb4f5d1 | 645 | board_cfg = &ch->cfg.board_cfg; |
247f9938 | 646 | if (board_cfg->display_on && try_module_get(board_cfg->owner)) { |
c2439398 | 647 | board_cfg->display_on(board_cfg->board_data, ch->info); |
6de9edd5 GL |
648 | module_put(board_cfg->owner); |
649 | } | |
3b0fd9d7 AC |
650 | |
651 | if (ch->bl) { | |
652 | ch->bl->props.power = FB_BLANK_UNBLANK; | |
653 | backlight_update_status(ch->bl); | |
654 | } | |
cfb4f5d1 MD |
655 | } |
656 | ||
657 | return 0; | |
658 | } | |
659 | ||
660 | static void sh_mobile_lcdc_stop(struct sh_mobile_lcdc_priv *priv) | |
661 | { | |
662 | struct sh_mobile_lcdc_chan *ch; | |
663 | struct sh_mobile_lcdc_board_cfg *board_cfg; | |
664 | int k; | |
665 | ||
2feb075a | 666 | /* clean up deferred io and ask board code to disable panel */ |
cfb4f5d1 MD |
667 | for (k = 0; k < ARRAY_SIZE(priv->ch); k++) { |
668 | ch = &priv->ch[k]; | |
21bc1f02 MD |
669 | if (!ch->enabled) |
670 | continue; | |
8564557a | 671 | |
2feb075a MD |
672 | /* deferred io mode: |
673 | * flush frame, and wait for frame end interrupt | |
674 | * clean up deferred io and enable clock | |
675 | */ | |
5ef6b505 | 676 | if (ch->info && ch->info->fbdefio) { |
2feb075a | 677 | ch->frame_end = 0; |
e33afddc | 678 | schedule_delayed_work(&ch->info->deferred_work, 0); |
2feb075a | 679 | wait_event(ch->frame_end_wait, ch->frame_end); |
e33afddc PM |
680 | fb_deferred_io_cleanup(ch->info); |
681 | ch->info->fbdefio = NULL; | |
2feb075a | 682 | sh_mobile_lcdc_clk_on(priv); |
8564557a | 683 | } |
2feb075a | 684 | |
3b0fd9d7 AC |
685 | if (ch->bl) { |
686 | ch->bl->props.power = FB_BLANK_POWERDOWN; | |
687 | backlight_update_status(ch->bl); | |
688 | } | |
689 | ||
2feb075a | 690 | board_cfg = &ch->cfg.board_cfg; |
247f9938 | 691 | if (board_cfg->display_off && try_module_get(board_cfg->owner)) { |
2feb075a | 692 | board_cfg->display_off(board_cfg->board_data); |
6de9edd5 GL |
693 | module_put(board_cfg->owner); |
694 | } | |
cfb4f5d1 MD |
695 | } |
696 | ||
697 | /* stop the lcdc */ | |
8e9bb19e MD |
698 | if (priv->started) { |
699 | sh_mobile_lcdc_start_stop(priv, 0); | |
700 | priv->started = 0; | |
701 | } | |
b51339ff | 702 | |
8564557a MD |
703 | /* stop clocks */ |
704 | for (k = 0; k < ARRAY_SIZE(priv->ch); k++) | |
705 | if (priv->ch[k].enabled) | |
706 | sh_mobile_lcdc_clk_off(priv); | |
cfb4f5d1 MD |
707 | } |
708 | ||
709 | static int sh_mobile_lcdc_check_interface(struct sh_mobile_lcdc_chan *ch) | |
710 | { | |
711 | int ifm, miftyp; | |
712 | ||
713 | switch (ch->cfg.interface_type) { | |
714 | case RGB8: ifm = 0; miftyp = 0; break; | |
715 | case RGB9: ifm = 0; miftyp = 4; break; | |
716 | case RGB12A: ifm = 0; miftyp = 5; break; | |
717 | case RGB12B: ifm = 0; miftyp = 6; break; | |
718 | case RGB16: ifm = 0; miftyp = 7; break; | |
719 | case RGB18: ifm = 0; miftyp = 10; break; | |
720 | case RGB24: ifm = 0; miftyp = 11; break; | |
721 | case SYS8A: ifm = 1; miftyp = 0; break; | |
722 | case SYS8B: ifm = 1; miftyp = 1; break; | |
723 | case SYS8C: ifm = 1; miftyp = 2; break; | |
724 | case SYS8D: ifm = 1; miftyp = 3; break; | |
725 | case SYS9: ifm = 1; miftyp = 4; break; | |
726 | case SYS12: ifm = 1; miftyp = 5; break; | |
727 | case SYS16A: ifm = 1; miftyp = 7; break; | |
728 | case SYS16B: ifm = 1; miftyp = 8; break; | |
729 | case SYS16C: ifm = 1; miftyp = 9; break; | |
730 | case SYS18: ifm = 1; miftyp = 10; break; | |
731 | case SYS24: ifm = 1; miftyp = 11; break; | |
732 | default: goto bad; | |
733 | } | |
734 | ||
735 | /* SUBLCD only supports SYS interface */ | |
736 | if (lcdc_chan_is_sublcd(ch)) { | |
737 | if (ifm == 0) | |
738 | goto bad; | |
739 | else | |
740 | ifm = 0; | |
741 | } | |
742 | ||
743 | ch->ldmt1r_value = (ifm << 12) | miftyp; | |
744 | return 0; | |
745 | bad: | |
746 | return -EINVAL; | |
747 | } | |
748 | ||
b51339ff MD |
749 | static int sh_mobile_lcdc_setup_clocks(struct platform_device *pdev, |
750 | int clock_source, | |
cfb4f5d1 MD |
751 | struct sh_mobile_lcdc_priv *priv) |
752 | { | |
753 | char *str; | |
754 | int icksel; | |
755 | ||
756 | switch (clock_source) { | |
757 | case LCDC_CLK_BUS: str = "bus_clk"; icksel = 0; break; | |
758 | case LCDC_CLK_PERIPHERAL: str = "peripheral_clk"; icksel = 1; break; | |
759 | case LCDC_CLK_EXTERNAL: str = NULL; icksel = 2; break; | |
760 | default: | |
761 | return -EINVAL; | |
762 | } | |
763 | ||
764 | priv->lddckr = icksel << 16; | |
765 | ||
766 | if (str) { | |
b51339ff MD |
767 | priv->dot_clk = clk_get(&pdev->dev, str); |
768 | if (IS_ERR(priv->dot_clk)) { | |
769 | dev_err(&pdev->dev, "cannot get dot clock %s\n", str); | |
b51339ff | 770 | return PTR_ERR(priv->dot_clk); |
cfb4f5d1 | 771 | } |
cfb4f5d1 | 772 | } |
0246c471 MD |
773 | |
774 | /* Runtime PM support involves two step for this driver: | |
775 | * 1) Enable Runtime PM | |
776 | * 2) Force Runtime PM Resume since hardware is accessed from probe() | |
777 | */ | |
8bed9055 | 778 | priv->dev = &pdev->dev; |
0246c471 MD |
779 | pm_runtime_enable(priv->dev); |
780 | pm_runtime_resume(priv->dev); | |
cfb4f5d1 MD |
781 | return 0; |
782 | } | |
783 | ||
784 | static int sh_mobile_lcdc_setcolreg(u_int regno, | |
785 | u_int red, u_int green, u_int blue, | |
786 | u_int transp, struct fb_info *info) | |
787 | { | |
788 | u32 *palette = info->pseudo_palette; | |
789 | ||
790 | if (regno >= PALETTE_NR) | |
791 | return -EINVAL; | |
792 | ||
793 | /* only FB_VISUAL_TRUECOLOR supported */ | |
794 | ||
795 | red >>= 16 - info->var.red.length; | |
796 | green >>= 16 - info->var.green.length; | |
797 | blue >>= 16 - info->var.blue.length; | |
798 | transp >>= 16 - info->var.transp.length; | |
799 | ||
800 | palette[regno] = (red << info->var.red.offset) | | |
801 | (green << info->var.green.offset) | | |
802 | (blue << info->var.blue.offset) | | |
803 | (transp << info->var.transp.offset); | |
804 | ||
805 | return 0; | |
806 | } | |
807 | ||
808 | static struct fb_fix_screeninfo sh_mobile_lcdc_fix = { | |
809 | .id = "SH Mobile LCDC", | |
810 | .type = FB_TYPE_PACKED_PIXELS, | |
811 | .visual = FB_VISUAL_TRUECOLOR, | |
812 | .accel = FB_ACCEL_NONE, | |
9dd38819 PE |
813 | .xpanstep = 0, |
814 | .ypanstep = 1, | |
815 | .ywrapstep = 0, | |
cfb4f5d1 MD |
816 | }; |
817 | ||
8564557a MD |
818 | static void sh_mobile_lcdc_fillrect(struct fb_info *info, |
819 | const struct fb_fillrect *rect) | |
820 | { | |
821 | sys_fillrect(info, rect); | |
822 | sh_mobile_lcdc_deferred_io_touch(info); | |
823 | } | |
824 | ||
825 | static void sh_mobile_lcdc_copyarea(struct fb_info *info, | |
826 | const struct fb_copyarea *area) | |
827 | { | |
828 | sys_copyarea(info, area); | |
829 | sh_mobile_lcdc_deferred_io_touch(info); | |
830 | } | |
831 | ||
832 | static void sh_mobile_lcdc_imageblit(struct fb_info *info, | |
833 | const struct fb_image *image) | |
834 | { | |
835 | sys_imageblit(info, image); | |
836 | sh_mobile_lcdc_deferred_io_touch(info); | |
837 | } | |
838 | ||
9dd38819 PE |
839 | static int sh_mobile_fb_pan_display(struct fb_var_screeninfo *var, |
840 | struct fb_info *info) | |
841 | { | |
842 | struct sh_mobile_lcdc_chan *ch = info->par; | |
92e1f9a7 PE |
843 | struct sh_mobile_lcdc_priv *priv = ch->lcdc; |
844 | unsigned long ldrcntr; | |
845 | unsigned long new_pan_offset; | |
53b50314 DHG |
846 | unsigned long base_addr_y, base_addr_c; |
847 | unsigned long c_offset; | |
92e1f9a7 | 848 | |
53b50314 DHG |
849 | if (!var->nonstd) |
850 | new_pan_offset = (var->yoffset * info->fix.line_length) + | |
851 | (var->xoffset * (info->var.bits_per_pixel / 8)); | |
852 | else | |
853 | new_pan_offset = (var->yoffset * info->fix.line_length) + | |
854 | (var->xoffset); | |
9dd38819 | 855 | |
92e1f9a7 | 856 | if (new_pan_offset == ch->pan_offset) |
9dd38819 PE |
857 | return 0; /* No change, do nothing */ |
858 | ||
92e1f9a7 | 859 | ldrcntr = lcdc_read(priv, _LDRCNTR); |
9dd38819 | 860 | |
92e1f9a7 | 861 | /* Set the source address for the next refresh */ |
53b50314 DHG |
862 | base_addr_y = ch->dma_handle + new_pan_offset; |
863 | if (var->nonstd) { | |
864 | /* Set y offset */ | |
865 | c_offset = (var->yoffset * | |
866 | info->fix.line_length * | |
867 | (info->var.bits_per_pixel - 8)) / 8; | |
868 | base_addr_c = ch->dma_handle + var->xres * var->yres_virtual + | |
869 | c_offset; | |
870 | /* Set x offset */ | |
871 | if (info->var.bits_per_pixel == 24) | |
872 | base_addr_c += 2 * var->xoffset; | |
873 | else | |
874 | base_addr_c += var->xoffset; | |
875 | } else | |
876 | base_addr_c = 0; | |
877 | ||
878 | lcdc_write_chan_mirror(ch, LDSA1R, base_addr_y); | |
879 | if (base_addr_c) | |
880 | lcdc_write_chan_mirror(ch, LDSA2R, base_addr_c); | |
881 | ||
92e1f9a7 PE |
882 | if (lcdc_chan_is_sublcd(ch)) |
883 | lcdc_write(ch->lcdc, _LDRCNTR, ldrcntr ^ LDRCNTR_SRS); | |
884 | else | |
885 | lcdc_write(ch->lcdc, _LDRCNTR, ldrcntr ^ LDRCNTR_MRS); | |
886 | ||
887 | ch->pan_offset = new_pan_offset; | |
888 | ||
889 | sh_mobile_lcdc_deferred_io_touch(info); | |
9dd38819 PE |
890 | |
891 | return 0; | |
892 | } | |
893 | ||
40331b21 PE |
894 | static int sh_mobile_wait_for_vsync(struct fb_info *info) |
895 | { | |
896 | struct sh_mobile_lcdc_chan *ch = info->par; | |
897 | unsigned long ldintr; | |
898 | int ret; | |
899 | ||
900 | /* Enable VSync End interrupt */ | |
901 | ldintr = lcdc_read(ch->lcdc, _LDINTR); | |
902 | ldintr |= LDINTR_VEE; | |
903 | lcdc_write(ch->lcdc, _LDINTR, ldintr); | |
904 | ||
905 | ret = wait_for_completion_interruptible_timeout(&ch->vsync_completion, | |
906 | msecs_to_jiffies(100)); | |
907 | if (!ret) | |
908 | return -ETIMEDOUT; | |
909 | ||
910 | return 0; | |
911 | } | |
912 | ||
913 | static int sh_mobile_ioctl(struct fb_info *info, unsigned int cmd, | |
914 | unsigned long arg) | |
915 | { | |
916 | int retval; | |
917 | ||
918 | switch (cmd) { | |
919 | case FBIO_WAITFORVSYNC: | |
920 | retval = sh_mobile_wait_for_vsync(info); | |
921 | break; | |
922 | ||
923 | default: | |
924 | retval = -ENOIOCTLCMD; | |
925 | break; | |
926 | } | |
927 | return retval; | |
928 | } | |
929 | ||
dd210503 GL |
930 | static void sh_mobile_fb_reconfig(struct fb_info *info) |
931 | { | |
932 | struct sh_mobile_lcdc_chan *ch = info->par; | |
933 | struct fb_videomode mode1, mode2; | |
934 | struct fb_event event; | |
935 | int evnt = FB_EVENT_MODE_CHANGE_ALL; | |
936 | ||
937 | if (ch->use_count > 1 || (ch->use_count == 1 && !info->fbcon_par)) | |
938 | /* More framebuffer users are active */ | |
939 | return; | |
940 | ||
941 | fb_var_to_videomode(&mode1, &ch->display_var); | |
942 | fb_var_to_videomode(&mode2, &info->var); | |
943 | ||
944 | if (fb_mode_is_equal(&mode1, &mode2)) | |
945 | return; | |
946 | ||
947 | /* Display has been re-plugged, framebuffer is free now, reconfigure */ | |
948 | if (fb_set_var(info, &ch->display_var) < 0) | |
949 | /* Couldn't reconfigure, hopefully, can continue as before */ | |
950 | return; | |
951 | ||
53b50314 DHG |
952 | if (info->var.nonstd) |
953 | info->fix.line_length = mode1.xres; | |
954 | else | |
955 | info->fix.line_length = mode1.xres * (ch->cfg.bpp / 8); | |
dd210503 GL |
956 | |
957 | /* | |
958 | * fb_set_var() calls the notifier change internally, only if | |
959 | * FBINFO_MISC_USEREVENT flag is set. Since we do not want to fake a | |
960 | * user event, we have to call the chain ourselves. | |
961 | */ | |
962 | event.info = info; | |
cc267ec5 | 963 | event.data = &mode1; |
dd210503 GL |
964 | fb_notifier_call_chain(evnt, &event); |
965 | } | |
966 | ||
967 | /* | |
968 | * Locking: both .fb_release() and .fb_open() are called with info->lock held if | |
969 | * user == 1, or with console sem held, if user == 0. | |
970 | */ | |
971 | static int sh_mobile_release(struct fb_info *info, int user) | |
972 | { | |
973 | struct sh_mobile_lcdc_chan *ch = info->par; | |
974 | ||
975 | mutex_lock(&ch->open_lock); | |
976 | dev_dbg(info->dev, "%s(): %d users\n", __func__, ch->use_count); | |
977 | ||
978 | ch->use_count--; | |
979 | ||
980 | /* Nothing to reconfigure, when called from fbcon */ | |
981 | if (user) { | |
ac751efa | 982 | console_lock(); |
dd210503 | 983 | sh_mobile_fb_reconfig(info); |
ac751efa | 984 | console_unlock(); |
dd210503 GL |
985 | } |
986 | ||
987 | mutex_unlock(&ch->open_lock); | |
988 | ||
989 | return 0; | |
990 | } | |
991 | ||
992 | static int sh_mobile_open(struct fb_info *info, int user) | |
993 | { | |
994 | struct sh_mobile_lcdc_chan *ch = info->par; | |
995 | ||
996 | mutex_lock(&ch->open_lock); | |
997 | ch->use_count++; | |
998 | ||
999 | dev_dbg(info->dev, "%s(): %d users\n", __func__, ch->use_count); | |
1000 | mutex_unlock(&ch->open_lock); | |
1001 | ||
1002 | return 0; | |
1003 | } | |
1004 | ||
1005 | static int sh_mobile_check_var(struct fb_var_screeninfo *var, struct fb_info *info) | |
1006 | { | |
1007 | struct sh_mobile_lcdc_chan *ch = info->par; | |
417d4827 | 1008 | struct sh_mobile_lcdc_priv *p = ch->lcdc; |
dd210503 | 1009 | |
d2ecbab5 | 1010 | if (var->xres > MAX_XRES || var->yres > MAX_YRES || |
dd210503 | 1011 | var->xres * var->yres * (ch->cfg.bpp / 8) * 2 > info->fix.smem_len) { |
830539d1 | 1012 | dev_warn(info->dev, "Invalid info: %u-%u-%u-%u x %u-%u-%u-%u @ %lukHz!\n", |
d2ecbab5 GL |
1013 | var->left_margin, var->xres, var->right_margin, var->hsync_len, |
1014 | var->upper_margin, var->yres, var->lower_margin, var->vsync_len, | |
1015 | PICOS2KHZ(var->pixclock)); | |
dd210503 GL |
1016 | return -EINVAL; |
1017 | } | |
417d4827 MD |
1018 | |
1019 | /* only accept the forced_bpp for dual channel configurations */ | |
1020 | if (p->forced_bpp && p->forced_bpp != var->bits_per_pixel) | |
1021 | return -EINVAL; | |
1022 | ||
1023 | switch (var->bits_per_pixel) { | |
1024 | case 16: /* PKF[4:0] = 00011 - RGB 565 */ | |
1025 | case 24: /* PKF[4:0] = 01011 - RGB 888 */ | |
1026 | case 32: /* PKF[4:0] = 00000 - RGBA 888 */ | |
1027 | break; | |
1028 | default: | |
1029 | return -EINVAL; | |
1030 | } | |
1031 | ||
dd210503 GL |
1032 | return 0; |
1033 | } | |
40331b21 | 1034 | |
8857b9aa AC |
1035 | /* |
1036 | * Screen blanking. Behavior is as follows: | |
1037 | * FB_BLANK_UNBLANK: screen unblanked, clocks enabled | |
1038 | * FB_BLANK_NORMAL: screen blanked, clocks enabled | |
1039 | * FB_BLANK_VSYNC, | |
1040 | * FB_BLANK_HSYNC, | |
1041 | * FB_BLANK_POWEROFF: screen blanked, clocks disabled | |
1042 | */ | |
1043 | static int sh_mobile_lcdc_blank(int blank, struct fb_info *info) | |
1044 | { | |
1045 | struct sh_mobile_lcdc_chan *ch = info->par; | |
1046 | struct sh_mobile_lcdc_priv *p = ch->lcdc; | |
1047 | ||
1048 | /* blank the screen? */ | |
1049 | if (blank > FB_BLANK_UNBLANK && ch->blank_status == FB_BLANK_UNBLANK) { | |
1050 | struct fb_fillrect rect = { | |
1051 | .width = info->var.xres, | |
1052 | .height = info->var.yres, | |
1053 | }; | |
1054 | sh_mobile_lcdc_fillrect(info, &rect); | |
1055 | } | |
1056 | /* turn clocks on? */ | |
1057 | if (blank <= FB_BLANK_NORMAL && ch->blank_status > FB_BLANK_NORMAL) { | |
1058 | sh_mobile_lcdc_clk_on(p); | |
1059 | } | |
1060 | /* turn clocks off? */ | |
1061 | if (blank > FB_BLANK_NORMAL && ch->blank_status <= FB_BLANK_NORMAL) { | |
1062 | /* make sure the screen is updated with the black fill before | |
1063 | * switching the clocks off. one vsync is not enough since | |
1064 | * blanking may occur in the middle of a refresh. deferred io | |
1065 | * mode will reenable the clocks and update the screen in time, | |
1066 | * so it does not need this. */ | |
1067 | if (!info->fbdefio) { | |
1068 | sh_mobile_wait_for_vsync(info); | |
1069 | sh_mobile_wait_for_vsync(info); | |
1070 | } | |
1071 | sh_mobile_lcdc_clk_off(p); | |
1072 | } | |
1073 | ||
1074 | ch->blank_status = blank; | |
1075 | return 0; | |
1076 | } | |
1077 | ||
cfb4f5d1 | 1078 | static struct fb_ops sh_mobile_lcdc_ops = { |
9dd38819 | 1079 | .owner = THIS_MODULE, |
cfb4f5d1 | 1080 | .fb_setcolreg = sh_mobile_lcdc_setcolreg, |
2540c111 MD |
1081 | .fb_read = fb_sys_read, |
1082 | .fb_write = fb_sys_write, | |
8564557a MD |
1083 | .fb_fillrect = sh_mobile_lcdc_fillrect, |
1084 | .fb_copyarea = sh_mobile_lcdc_copyarea, | |
1085 | .fb_imageblit = sh_mobile_lcdc_imageblit, | |
8857b9aa | 1086 | .fb_blank = sh_mobile_lcdc_blank, |
9dd38819 | 1087 | .fb_pan_display = sh_mobile_fb_pan_display, |
40331b21 | 1088 | .fb_ioctl = sh_mobile_ioctl, |
dd210503 GL |
1089 | .fb_open = sh_mobile_open, |
1090 | .fb_release = sh_mobile_release, | |
1091 | .fb_check_var = sh_mobile_check_var, | |
cfb4f5d1 MD |
1092 | }; |
1093 | ||
3b0fd9d7 AC |
1094 | static int sh_mobile_lcdc_update_bl(struct backlight_device *bdev) |
1095 | { | |
1096 | struct sh_mobile_lcdc_chan *ch = bl_get_data(bdev); | |
1097 | struct sh_mobile_lcdc_board_cfg *cfg = &ch->cfg.board_cfg; | |
1098 | int brightness = bdev->props.brightness; | |
1099 | ||
1100 | if (bdev->props.power != FB_BLANK_UNBLANK || | |
1101 | bdev->props.state & (BL_CORE_SUSPENDED | BL_CORE_FBBLANK)) | |
1102 | brightness = 0; | |
1103 | ||
1104 | return cfg->set_brightness(cfg->board_data, brightness); | |
1105 | } | |
1106 | ||
1107 | static int sh_mobile_lcdc_get_brightness(struct backlight_device *bdev) | |
1108 | { | |
1109 | struct sh_mobile_lcdc_chan *ch = bl_get_data(bdev); | |
1110 | struct sh_mobile_lcdc_board_cfg *cfg = &ch->cfg.board_cfg; | |
1111 | ||
1112 | return cfg->get_brightness(cfg->board_data); | |
1113 | } | |
1114 | ||
1115 | static int sh_mobile_lcdc_check_fb(struct backlight_device *bdev, | |
1116 | struct fb_info *info) | |
1117 | { | |
1118 | return (info->bl_dev == bdev); | |
1119 | } | |
1120 | ||
1121 | static struct backlight_ops sh_mobile_lcdc_bl_ops = { | |
1122 | .options = BL_CORE_SUSPENDRESUME, | |
1123 | .update_status = sh_mobile_lcdc_update_bl, | |
1124 | .get_brightness = sh_mobile_lcdc_get_brightness, | |
1125 | .check_fb = sh_mobile_lcdc_check_fb, | |
1126 | }; | |
1127 | ||
1128 | static struct backlight_device *sh_mobile_lcdc_bl_probe(struct device *parent, | |
1129 | struct sh_mobile_lcdc_chan *ch) | |
1130 | { | |
1131 | struct backlight_device *bl; | |
1132 | ||
1133 | bl = backlight_device_register(ch->cfg.bl_info.name, parent, ch, | |
1134 | &sh_mobile_lcdc_bl_ops, NULL); | |
beee1f20 DC |
1135 | if (IS_ERR(bl)) { |
1136 | dev_err(parent, "unable to register backlight device: %ld\n", | |
1137 | PTR_ERR(bl)); | |
3b0fd9d7 AC |
1138 | return NULL; |
1139 | } | |
1140 | ||
1141 | bl->props.max_brightness = ch->cfg.bl_info.max_brightness; | |
1142 | bl->props.brightness = bl->props.max_brightness; | |
1143 | backlight_update_status(bl); | |
1144 | ||
1145 | return bl; | |
1146 | } | |
1147 | ||
1148 | static void sh_mobile_lcdc_bl_remove(struct backlight_device *bdev) | |
1149 | { | |
1150 | backlight_device_unregister(bdev); | |
1151 | } | |
1152 | ||
53b50314 DHG |
1153 | static int sh_mobile_lcdc_set_bpp(struct fb_var_screeninfo *var, int bpp, |
1154 | int nonstd) | |
cfb4f5d1 | 1155 | { |
53b50314 DHG |
1156 | if (nonstd) { |
1157 | switch (bpp) { | |
1158 | case 12: | |
1159 | case 16: | |
1160 | case 24: | |
1161 | var->bits_per_pixel = bpp; | |
1162 | var->nonstd = nonstd; | |
1163 | return 0; | |
1164 | default: | |
1165 | return -EINVAL; | |
1166 | } | |
1167 | } | |
1168 | ||
cfb4f5d1 MD |
1169 | switch (bpp) { |
1170 | case 16: /* PKF[4:0] = 00011 - RGB 565 */ | |
1171 | var->red.offset = 11; | |
1172 | var->red.length = 5; | |
1173 | var->green.offset = 5; | |
1174 | var->green.length = 6; | |
1175 | var->blue.offset = 0; | |
1176 | var->blue.length = 5; | |
1177 | var->transp.offset = 0; | |
1178 | var->transp.length = 0; | |
1179 | break; | |
1180 | ||
417d4827 MD |
1181 | case 24: /* PKF[4:0] = 01011 - RGB 888 */ |
1182 | var->red.offset = 16; | |
cfb4f5d1 | 1183 | var->red.length = 8; |
417d4827 | 1184 | var->green.offset = 8; |
cfb4f5d1 | 1185 | var->green.length = 8; |
417d4827 | 1186 | var->blue.offset = 0; |
cfb4f5d1 MD |
1187 | var->blue.length = 8; |
1188 | var->transp.offset = 0; | |
1189 | var->transp.length = 0; | |
1190 | break; | |
417d4827 MD |
1191 | |
1192 | case 32: /* PKF[4:0] = 00000 - RGBA 888 */ | |
1193 | var->red.offset = 16; | |
1194 | var->red.length = 8; | |
1195 | var->green.offset = 8; | |
1196 | var->green.length = 8; | |
1197 | var->blue.offset = 0; | |
1198 | var->blue.length = 8; | |
1199 | var->transp.offset = 24; | |
1200 | var->transp.length = 8; | |
1201 | break; | |
cfb4f5d1 MD |
1202 | default: |
1203 | return -EINVAL; | |
1204 | } | |
1205 | var->bits_per_pixel = bpp; | |
1206 | var->red.msb_right = 0; | |
1207 | var->green.msb_right = 0; | |
1208 | var->blue.msb_right = 0; | |
1209 | var->transp.msb_right = 0; | |
1210 | return 0; | |
1211 | } | |
1212 | ||
2feb075a MD |
1213 | static int sh_mobile_lcdc_suspend(struct device *dev) |
1214 | { | |
1215 | struct platform_device *pdev = to_platform_device(dev); | |
1216 | ||
1217 | sh_mobile_lcdc_stop(platform_get_drvdata(pdev)); | |
1218 | return 0; | |
1219 | } | |
1220 | ||
1221 | static int sh_mobile_lcdc_resume(struct device *dev) | |
1222 | { | |
1223 | struct platform_device *pdev = to_platform_device(dev); | |
1224 | ||
1225 | return sh_mobile_lcdc_start(platform_get_drvdata(pdev)); | |
1226 | } | |
1227 | ||
0246c471 MD |
1228 | static int sh_mobile_lcdc_runtime_suspend(struct device *dev) |
1229 | { | |
1230 | struct platform_device *pdev = to_platform_device(dev); | |
1231 | struct sh_mobile_lcdc_priv *p = platform_get_drvdata(pdev); | |
1232 | struct sh_mobile_lcdc_chan *ch; | |
1233 | int k, n; | |
1234 | ||
1235 | /* save per-channel registers */ | |
1236 | for (k = 0; k < ARRAY_SIZE(p->ch); k++) { | |
1237 | ch = &p->ch[k]; | |
1238 | if (!ch->enabled) | |
1239 | continue; | |
1240 | for (n = 0; n < NR_CH_REGS; n++) | |
1241 | ch->saved_ch_regs[n] = lcdc_read_chan(ch, n); | |
1242 | } | |
1243 | ||
1244 | /* save shared registers */ | |
1245 | for (n = 0; n < NR_SHARED_REGS; n++) | |
1246 | p->saved_shared_regs[n] = lcdc_read(p, lcdc_shared_regs[n]); | |
1247 | ||
1248 | /* turn off LCDC hardware */ | |
1249 | lcdc_write(p, _LDCNT1R, 0); | |
1250 | return 0; | |
1251 | } | |
1252 | ||
1253 | static int sh_mobile_lcdc_runtime_resume(struct device *dev) | |
1254 | { | |
1255 | struct platform_device *pdev = to_platform_device(dev); | |
1256 | struct sh_mobile_lcdc_priv *p = platform_get_drvdata(pdev); | |
1257 | struct sh_mobile_lcdc_chan *ch; | |
1258 | int k, n; | |
1259 | ||
1260 | /* restore per-channel registers */ | |
1261 | for (k = 0; k < ARRAY_SIZE(p->ch); k++) { | |
1262 | ch = &p->ch[k]; | |
1263 | if (!ch->enabled) | |
1264 | continue; | |
1265 | for (n = 0; n < NR_CH_REGS; n++) | |
1266 | lcdc_write_chan(ch, n, ch->saved_ch_regs[n]); | |
1267 | } | |
1268 | ||
1269 | /* restore shared registers */ | |
1270 | for (n = 0; n < NR_SHARED_REGS; n++) | |
1271 | lcdc_write(p, lcdc_shared_regs[n], p->saved_shared_regs[n]); | |
1272 | ||
1273 | return 0; | |
1274 | } | |
1275 | ||
47145210 | 1276 | static const struct dev_pm_ops sh_mobile_lcdc_dev_pm_ops = { |
2feb075a MD |
1277 | .suspend = sh_mobile_lcdc_suspend, |
1278 | .resume = sh_mobile_lcdc_resume, | |
0246c471 MD |
1279 | .runtime_suspend = sh_mobile_lcdc_runtime_suspend, |
1280 | .runtime_resume = sh_mobile_lcdc_runtime_resume, | |
2feb075a MD |
1281 | }; |
1282 | ||
6de9edd5 | 1283 | /* locking: called with info->lock held */ |
6011bdea GL |
1284 | static int sh_mobile_lcdc_notify(struct notifier_block *nb, |
1285 | unsigned long action, void *data) | |
1286 | { | |
1287 | struct fb_event *event = data; | |
1288 | struct fb_info *info = event->info; | |
1289 | struct sh_mobile_lcdc_chan *ch = info->par; | |
1290 | struct sh_mobile_lcdc_board_cfg *board_cfg = &ch->cfg.board_cfg; | |
afe417c0 | 1291 | int ret; |
6011bdea GL |
1292 | |
1293 | if (&ch->lcdc->notifier != nb) | |
baf16374 | 1294 | return NOTIFY_DONE; |
6011bdea GL |
1295 | |
1296 | dev_dbg(info->dev, "%s(): action = %lu, data = %p\n", | |
1297 | __func__, action, event->data); | |
1298 | ||
1299 | switch(action) { | |
1300 | case FB_EVENT_SUSPEND: | |
247f9938 | 1301 | if (board_cfg->display_off && try_module_get(board_cfg->owner)) { |
6011bdea | 1302 | board_cfg->display_off(board_cfg->board_data); |
6de9edd5 GL |
1303 | module_put(board_cfg->owner); |
1304 | } | |
6011bdea | 1305 | pm_runtime_put(info->device); |
afe417c0 | 1306 | sh_mobile_lcdc_stop(ch->lcdc); |
6011bdea GL |
1307 | break; |
1308 | case FB_EVENT_RESUME: | |
dd210503 GL |
1309 | mutex_lock(&ch->open_lock); |
1310 | sh_mobile_fb_reconfig(info); | |
1311 | mutex_unlock(&ch->open_lock); | |
6011bdea GL |
1312 | |
1313 | /* HDMI must be enabled before LCDC configuration */ | |
247f9938 | 1314 | if (board_cfg->display_on && try_module_get(board_cfg->owner)) { |
dd210503 | 1315 | board_cfg->display_on(board_cfg->board_data, info); |
6de9edd5 | 1316 | module_put(board_cfg->owner); |
6011bdea GL |
1317 | } |
1318 | ||
afe417c0 GL |
1319 | ret = sh_mobile_lcdc_start(ch->lcdc); |
1320 | if (!ret) | |
1321 | pm_runtime_get_sync(info->device); | |
6011bdea GL |
1322 | } |
1323 | ||
baf16374 | 1324 | return NOTIFY_OK; |
6011bdea GL |
1325 | } |
1326 | ||
cfb4f5d1 MD |
1327 | static int sh_mobile_lcdc_remove(struct platform_device *pdev); |
1328 | ||
c2e13037 | 1329 | static int __devinit sh_mobile_lcdc_probe(struct platform_device *pdev) |
cfb4f5d1 MD |
1330 | { |
1331 | struct fb_info *info; | |
1332 | struct sh_mobile_lcdc_priv *priv; | |
01ac25b5 | 1333 | struct sh_mobile_lcdc_info *pdata = pdev->dev.platform_data; |
cfb4f5d1 MD |
1334 | struct resource *res; |
1335 | int error; | |
1336 | void *buf; | |
1337 | int i, j; | |
1338 | ||
01ac25b5 | 1339 | if (!pdata) { |
cfb4f5d1 | 1340 | dev_err(&pdev->dev, "no platform data defined\n"); |
8bed9055 | 1341 | return -EINVAL; |
cfb4f5d1 MD |
1342 | } |
1343 | ||
1344 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); | |
8564557a MD |
1345 | i = platform_get_irq(pdev, 0); |
1346 | if (!res || i < 0) { | |
1347 | dev_err(&pdev->dev, "cannot get platform resources\n"); | |
8bed9055 | 1348 | return -ENOENT; |
cfb4f5d1 MD |
1349 | } |
1350 | ||
1351 | priv = kzalloc(sizeof(*priv), GFP_KERNEL); | |
1352 | if (!priv) { | |
1353 | dev_err(&pdev->dev, "cannot allocate device data\n"); | |
8bed9055 | 1354 | return -ENOMEM; |
cfb4f5d1 MD |
1355 | } |
1356 | ||
8bed9055 GL |
1357 | platform_set_drvdata(pdev, priv); |
1358 | ||
8564557a | 1359 | error = request_irq(i, sh_mobile_lcdc_irq, IRQF_DISABLED, |
7ad33e74 | 1360 | dev_name(&pdev->dev), priv); |
8564557a MD |
1361 | if (error) { |
1362 | dev_err(&pdev->dev, "unable to request irq\n"); | |
1363 | goto err1; | |
1364 | } | |
1365 | ||
1366 | priv->irq = i; | |
5ef6b505 | 1367 | atomic_set(&priv->hw_usecnt, -1); |
cfb4f5d1 MD |
1368 | |
1369 | j = 0; | |
1370 | for (i = 0; i < ARRAY_SIZE(pdata->ch); i++) { | |
01ac25b5 | 1371 | struct sh_mobile_lcdc_chan *ch = priv->ch + j; |
cfb4f5d1 | 1372 | |
01ac25b5 GL |
1373 | ch->lcdc = priv; |
1374 | memcpy(&ch->cfg, &pdata->ch[i], sizeof(pdata->ch[i])); | |
cfb4f5d1 | 1375 | |
01ac25b5 | 1376 | error = sh_mobile_lcdc_check_interface(ch); |
cfb4f5d1 MD |
1377 | if (error) { |
1378 | dev_err(&pdev->dev, "unsupported interface type\n"); | |
1379 | goto err1; | |
1380 | } | |
01ac25b5 GL |
1381 | init_waitqueue_head(&ch->frame_end_wait); |
1382 | init_completion(&ch->vsync_completion); | |
1383 | ch->pan_offset = 0; | |
cfb4f5d1 | 1384 | |
3b0fd9d7 AC |
1385 | /* probe the backlight is there is one defined */ |
1386 | if (ch->cfg.bl_info.max_brightness) | |
1387 | ch->bl = sh_mobile_lcdc_bl_probe(&pdev->dev, ch); | |
1388 | ||
cfb4f5d1 MD |
1389 | switch (pdata->ch[i].chan) { |
1390 | case LCDC_CHAN_MAINLCD: | |
01ac25b5 GL |
1391 | ch->enabled = 1 << 1; |
1392 | ch->reg_offs = lcdc_offs_mainlcd; | |
cfb4f5d1 MD |
1393 | j++; |
1394 | break; | |
1395 | case LCDC_CHAN_SUBLCD: | |
01ac25b5 GL |
1396 | ch->enabled = 1 << 2; |
1397 | ch->reg_offs = lcdc_offs_sublcd; | |
cfb4f5d1 MD |
1398 | j++; |
1399 | break; | |
1400 | } | |
1401 | } | |
1402 | ||
1403 | if (!j) { | |
1404 | dev_err(&pdev->dev, "no channels defined\n"); | |
1405 | error = -EINVAL; | |
1406 | goto err1; | |
1407 | } | |
1408 | ||
417d4827 MD |
1409 | /* for dual channel LCDC (MAIN + SUB) force shared bpp setting */ |
1410 | if (j == 2) | |
1411 | priv->forced_bpp = pdata->ch[0].bpp; | |
1412 | ||
dba6f385 GL |
1413 | priv->base = ioremap_nocache(res->start, resource_size(res)); |
1414 | if (!priv->base) | |
1415 | goto err1; | |
1416 | ||
b51339ff | 1417 | error = sh_mobile_lcdc_setup_clocks(pdev, pdata->clock_source, priv); |
cfb4f5d1 MD |
1418 | if (error) { |
1419 | dev_err(&pdev->dev, "unable to setup clocks\n"); | |
1420 | goto err1; | |
1421 | } | |
1422 | ||
cfb4f5d1 | 1423 | for (i = 0; i < j; i++) { |
6011bdea | 1424 | struct fb_var_screeninfo *var; |
71d3b0fc | 1425 | const struct fb_videomode *lcd_cfg, *max_cfg = NULL; |
01ac25b5 | 1426 | struct sh_mobile_lcdc_chan *ch = priv->ch + i; |
c44f9f76 GL |
1427 | struct sh_mobile_lcdc_chan_cfg *cfg = &ch->cfg; |
1428 | const struct fb_videomode *mode = cfg->lcd_cfg; | |
71d3b0fc GL |
1429 | unsigned long max_size = 0; |
1430 | int k; | |
5fd284e6 | 1431 | int num_cfg; |
cfb4f5d1 | 1432 | |
01ac25b5 GL |
1433 | ch->info = framebuffer_alloc(0, &pdev->dev); |
1434 | if (!ch->info) { | |
e33afddc PM |
1435 | dev_err(&pdev->dev, "unable to allocate fb_info\n"); |
1436 | error = -ENOMEM; | |
1437 | break; | |
1438 | } | |
1439 | ||
01ac25b5 | 1440 | info = ch->info; |
6011bdea | 1441 | var = &info->var; |
cfb4f5d1 | 1442 | info->fbops = &sh_mobile_lcdc_ops; |
c44f9f76 | 1443 | info->par = ch; |
dd210503 GL |
1444 | |
1445 | mutex_init(&ch->open_lock); | |
1446 | ||
c44f9f76 GL |
1447 | for (k = 0, lcd_cfg = mode; |
1448 | k < cfg->num_cfg && lcd_cfg; | |
71d3b0fc GL |
1449 | k++, lcd_cfg++) { |
1450 | unsigned long size = lcd_cfg->yres * lcd_cfg->xres; | |
53b50314 DHG |
1451 | /* NV12 buffers must have even number of lines */ |
1452 | if ((cfg->nonstd) && cfg->bpp == 12 && | |
1453 | (lcd_cfg->yres & 0x1)) { | |
1454 | dev_err(&pdev->dev, "yres must be multiple of 2" | |
1455 | " for YCbCr420 mode.\n"); | |
1456 | error = -EINVAL; | |
1457 | goto err1; | |
1458 | } | |
71d3b0fc GL |
1459 | |
1460 | if (size > max_size) { | |
1461 | max_cfg = lcd_cfg; | |
1462 | max_size = size; | |
1463 | } | |
1464 | } | |
1465 | ||
c44f9f76 | 1466 | if (!mode) |
d2ecbab5 | 1467 | max_size = MAX_XRES * MAX_YRES; |
c44f9f76 GL |
1468 | else if (max_cfg) |
1469 | dev_dbg(&pdev->dev, "Found largest videomode %ux%u\n", | |
1470 | max_cfg->xres, max_cfg->yres); | |
71d3b0fc | 1471 | |
cfb4f5d1 | 1472 | info->fix = sh_mobile_lcdc_fix; |
53b50314 DHG |
1473 | info->fix.smem_len = max_size * 2 * cfg->bpp / 8; |
1474 | ||
1475 | /* Only pan in 2 line steps for NV12 */ | |
1476 | if (cfg->nonstd && cfg->bpp == 12) | |
1477 | info->fix.ypanstep = 2; | |
cfb4f5d1 | 1478 | |
5fd284e6 | 1479 | if (!mode) { |
c44f9f76 | 1480 | mode = &default_720p; |
5fd284e6 GL |
1481 | num_cfg = 1; |
1482 | } else { | |
e0b9fb26 | 1483 | num_cfg = cfg->num_cfg; |
5fd284e6 GL |
1484 | } |
1485 | ||
1486 | fb_videomode_to_modelist(mode, num_cfg, &info->modelist); | |
c44f9f76 GL |
1487 | |
1488 | fb_videomode_to_var(var, mode); | |
e0b9fb26 GL |
1489 | var->width = cfg->lcd_size_cfg.width; |
1490 | var->height = cfg->lcd_size_cfg.height; | |
9dd38819 | 1491 | /* Default Y virtual resolution is 2x panel size */ |
6011bdea | 1492 | var->yres_virtual = var->yres * 2; |
6011bdea | 1493 | var->activate = FB_ACTIVATE_NOW; |
6011bdea | 1494 | |
53b50314 | 1495 | error = sh_mobile_lcdc_set_bpp(var, cfg->bpp, cfg->nonstd); |
cfb4f5d1 MD |
1496 | if (error) |
1497 | break; | |
1498 | ||
cfb4f5d1 | 1499 | buf = dma_alloc_coherent(&pdev->dev, info->fix.smem_len, |
01ac25b5 | 1500 | &ch->dma_handle, GFP_KERNEL); |
cfb4f5d1 MD |
1501 | if (!buf) { |
1502 | dev_err(&pdev->dev, "unable to allocate buffer\n"); | |
1503 | error = -ENOMEM; | |
1504 | break; | |
1505 | } | |
1506 | ||
01ac25b5 | 1507 | info->pseudo_palette = &ch->pseudo_palette; |
cfb4f5d1 MD |
1508 | info->flags = FBINFO_FLAG_DEFAULT; |
1509 | ||
1510 | error = fb_alloc_cmap(&info->cmap, PALETTE_NR, 0); | |
1511 | if (error < 0) { | |
1512 | dev_err(&pdev->dev, "unable to allocate cmap\n"); | |
1513 | dma_free_coherent(&pdev->dev, info->fix.smem_len, | |
01ac25b5 | 1514 | buf, ch->dma_handle); |
cfb4f5d1 MD |
1515 | break; |
1516 | } | |
1517 | ||
01ac25b5 | 1518 | info->fix.smem_start = ch->dma_handle; |
53b50314 DHG |
1519 | if (var->nonstd) |
1520 | info->fix.line_length = var->xres; | |
1521 | else | |
1522 | info->fix.line_length = var->xres * (cfg->bpp / 8); | |
1523 | ||
cfb4f5d1 MD |
1524 | info->screen_base = buf; |
1525 | info->device = &pdev->dev; | |
1c120deb | 1526 | ch->display_var = *var; |
cfb4f5d1 MD |
1527 | } |
1528 | ||
1529 | if (error) | |
1530 | goto err1; | |
1531 | ||
1532 | error = sh_mobile_lcdc_start(priv); | |
1533 | if (error) { | |
1534 | dev_err(&pdev->dev, "unable to start hardware\n"); | |
1535 | goto err1; | |
1536 | } | |
1537 | ||
1538 | for (i = 0; i < j; i++) { | |
1c6a307a PM |
1539 | struct sh_mobile_lcdc_chan *ch = priv->ch + i; |
1540 | ||
e33afddc | 1541 | info = ch->info; |
1c6a307a PM |
1542 | |
1543 | if (info->fbdefio) { | |
8bed9055 | 1544 | ch->sglist = vmalloc(sizeof(struct scatterlist) * |
1c6a307a | 1545 | info->fix.smem_len >> PAGE_SHIFT); |
8bed9055 | 1546 | if (!ch->sglist) { |
1c6a307a PM |
1547 | dev_err(&pdev->dev, "cannot allocate sglist\n"); |
1548 | goto err1; | |
1549 | } | |
1550 | } | |
1551 | ||
3b0fd9d7 AC |
1552 | info->bl_dev = ch->bl; |
1553 | ||
1c6a307a | 1554 | error = register_framebuffer(info); |
cfb4f5d1 MD |
1555 | if (error < 0) |
1556 | goto err1; | |
cfb4f5d1 | 1557 | |
cfb4f5d1 MD |
1558 | dev_info(info->dev, |
1559 | "registered %s/%s as %dx%d %dbpp.\n", | |
1560 | pdev->name, | |
1c6a307a | 1561 | (ch->cfg.chan == LCDC_CHAN_MAINLCD) ? |
cfb4f5d1 | 1562 | "mainlcd" : "sublcd", |
c44f9f76 | 1563 | info->var.xres, info->var.yres, |
1c6a307a | 1564 | ch->cfg.bpp); |
8564557a MD |
1565 | |
1566 | /* deferred io mode: disable clock to save power */ | |
6011bdea | 1567 | if (info->fbdefio || info->state == FBINFO_STATE_SUSPENDED) |
8564557a | 1568 | sh_mobile_lcdc_clk_off(priv); |
cfb4f5d1 MD |
1569 | } |
1570 | ||
6011bdea GL |
1571 | /* Failure ignored */ |
1572 | priv->notifier.notifier_call = sh_mobile_lcdc_notify; | |
1573 | fb_register_client(&priv->notifier); | |
1574 | ||
cfb4f5d1 | 1575 | return 0; |
8bed9055 | 1576 | err1: |
cfb4f5d1 | 1577 | sh_mobile_lcdc_remove(pdev); |
8bed9055 | 1578 | |
cfb4f5d1 MD |
1579 | return error; |
1580 | } | |
1581 | ||
1582 | static int sh_mobile_lcdc_remove(struct platform_device *pdev) | |
1583 | { | |
1584 | struct sh_mobile_lcdc_priv *priv = platform_get_drvdata(pdev); | |
1585 | struct fb_info *info; | |
1586 | int i; | |
1587 | ||
6011bdea GL |
1588 | fb_unregister_client(&priv->notifier); |
1589 | ||
cfb4f5d1 | 1590 | for (i = 0; i < ARRAY_SIZE(priv->ch); i++) |
8bed9055 | 1591 | if (priv->ch[i].info && priv->ch[i].info->dev) |
e33afddc | 1592 | unregister_framebuffer(priv->ch[i].info); |
cfb4f5d1 MD |
1593 | |
1594 | sh_mobile_lcdc_stop(priv); | |
1595 | ||
1596 | for (i = 0; i < ARRAY_SIZE(priv->ch); i++) { | |
e33afddc | 1597 | info = priv->ch[i].info; |
cfb4f5d1 | 1598 | |
e33afddc | 1599 | if (!info || !info->device) |
cfb4f5d1 MD |
1600 | continue; |
1601 | ||
1c6a307a PM |
1602 | if (priv->ch[i].sglist) |
1603 | vfree(priv->ch[i].sglist); | |
1604 | ||
1ffbb037 MD |
1605 | if (info->screen_base) |
1606 | dma_free_coherent(&pdev->dev, info->fix.smem_len, | |
1607 | info->screen_base, | |
1608 | priv->ch[i].dma_handle); | |
cfb4f5d1 | 1609 | fb_dealloc_cmap(&info->cmap); |
e33afddc | 1610 | framebuffer_release(info); |
cfb4f5d1 MD |
1611 | } |
1612 | ||
3b0fd9d7 AC |
1613 | for (i = 0; i < ARRAY_SIZE(priv->ch); i++) { |
1614 | if (priv->ch[i].bl) | |
1615 | sh_mobile_lcdc_bl_remove(priv->ch[i].bl); | |
1616 | } | |
1617 | ||
b51339ff MD |
1618 | if (priv->dot_clk) |
1619 | clk_put(priv->dot_clk); | |
0246c471 | 1620 | |
8bed9055 GL |
1621 | if (priv->dev) |
1622 | pm_runtime_disable(priv->dev); | |
cfb4f5d1 MD |
1623 | |
1624 | if (priv->base) | |
1625 | iounmap(priv->base); | |
1626 | ||
8564557a MD |
1627 | if (priv->irq) |
1628 | free_irq(priv->irq, priv); | |
cfb4f5d1 MD |
1629 | kfree(priv); |
1630 | return 0; | |
1631 | } | |
1632 | ||
1633 | static struct platform_driver sh_mobile_lcdc_driver = { | |
1634 | .driver = { | |
1635 | .name = "sh_mobile_lcdc_fb", | |
1636 | .owner = THIS_MODULE, | |
2feb075a | 1637 | .pm = &sh_mobile_lcdc_dev_pm_ops, |
cfb4f5d1 MD |
1638 | }, |
1639 | .probe = sh_mobile_lcdc_probe, | |
1640 | .remove = sh_mobile_lcdc_remove, | |
1641 | }; | |
1642 | ||
1643 | static int __init sh_mobile_lcdc_init(void) | |
1644 | { | |
1645 | return platform_driver_register(&sh_mobile_lcdc_driver); | |
1646 | } | |
1647 | ||
1648 | static void __exit sh_mobile_lcdc_exit(void) | |
1649 | { | |
1650 | platform_driver_unregister(&sh_mobile_lcdc_driver); | |
1651 | } | |
1652 | ||
1653 | module_init(sh_mobile_lcdc_init); | |
1654 | module_exit(sh_mobile_lcdc_exit); | |
1655 | ||
1656 | MODULE_DESCRIPTION("SuperH Mobile LCDC Framebuffer driver"); | |
1657 | MODULE_AUTHOR("Magnus Damm <damm@opensource.se>"); | |
1658 | MODULE_LICENSE("GPL v2"); |