Commit | Line | Data |
---|---|---|
1da177e4 LT |
1 | /* |
2 | * Frame buffer driver for Trident Blade and Image series | |
3 | * | |
245a2c2c | 4 | * Copyright 2001, 2002 - Jani Monoses <jani@iv.ro> |
1da177e4 LT |
5 | * |
6 | * | |
7 | * CREDITS:(in order of appearance) | |
245a2c2c KH |
8 | * skeletonfb.c by Geert Uytterhoeven and other fb code in drivers/video |
9 | * Special thanks ;) to Mattia Crivellini <tia@mclink.it> | |
10 | * much inspired by the XFree86 4.x Trident driver sources | |
11 | * by Alan Hourihane the FreeVGA project | |
12 | * Francesco Salvestrini <salvestrini@users.sf.net> XP support, | |
13 | * code, suggestions | |
1da177e4 | 14 | * TODO: |
245a2c2c KH |
15 | * timing value tweaking so it looks good on every monitor in every mode |
16 | * TGUI acceleration | |
1da177e4 LT |
17 | */ |
18 | ||
1da177e4 LT |
19 | #include <linux/module.h> |
20 | #include <linux/fb.h> | |
21 | #include <linux/init.h> | |
22 | #include <linux/pci.h> | |
23 | ||
24 | #include <linux/delay.h> | |
25 | #include <video/trident.h> | |
26 | ||
27 | #define VERSION "0.7.8-NEWAPI" | |
28 | ||
29 | struct tridentfb_par { | |
245a2c2c KH |
30 | int vclk; /* in MHz */ |
31 | void __iomem *io_virt; /* iospace virtual memory address */ | |
1da177e4 LT |
32 | }; |
33 | ||
245a2c2c | 34 | static unsigned char eng_oper; /* engine operation... */ |
1da177e4 LT |
35 | static struct fb_ops tridentfb_ops; |
36 | ||
37 | static struct tridentfb_par default_par; | |
38 | ||
39 | /* FIXME:kmalloc these 3 instead */ | |
40 | static struct fb_info fb_info; | |
41 | static u32 pseudo_pal[16]; | |
42 | ||
1da177e4 LT |
43 | static struct fb_var_screeninfo default_var; |
44 | ||
45 | static struct fb_fix_screeninfo tridentfb_fix = { | |
245a2c2c | 46 | .id = "Trident", |
1da177e4 LT |
47 | .type = FB_TYPE_PACKED_PIXELS, |
48 | .ypanstep = 1, | |
49 | .visual = FB_VISUAL_PSEUDOCOLOR, | |
50 | .accel = FB_ACCEL_NONE, | |
51 | }; | |
52 | ||
53 | static int chip_id; | |
54 | ||
55 | static int defaultaccel; | |
56 | static int displaytype; | |
57 | ||
1da177e4 LT |
58 | /* defaults which are normally overriden by user values */ |
59 | ||
60 | /* video mode */ | |
245a2c2c | 61 | static char *mode = "640x480"; |
1da177e4 LT |
62 | static int bpp = 8; |
63 | ||
64 | static int noaccel; | |
65 | ||
66 | static int center; | |
67 | static int stretch; | |
68 | ||
69 | static int fp; | |
70 | static int crt; | |
71 | ||
72 | static int memsize; | |
73 | static int memdiff; | |
74 | static int nativex; | |
75 | ||
1da177e4 LT |
76 | module_param(mode, charp, 0); |
77 | module_param(bpp, int, 0); | |
78 | module_param(center, int, 0); | |
79 | module_param(stretch, int, 0); | |
80 | module_param(noaccel, int, 0); | |
81 | module_param(memsize, int, 0); | |
82 | module_param(memdiff, int, 0); | |
83 | module_param(nativex, int, 0); | |
84 | module_param(fp, int, 0); | |
85 | module_param(crt, int, 0); | |
86 | ||
1da177e4 LT |
87 | static int chip3D; |
88 | static int chipcyber; | |
89 | ||
90 | static int is3Dchip(int id) | |
91 | { | |
245a2c2c KH |
92 | return ((id == BLADE3D) || (id == CYBERBLADEE4) || |
93 | (id == CYBERBLADEi7) || (id == CYBERBLADEi7D) || | |
94 | (id == CYBER9397) || (id == CYBER9397DVD) || | |
95 | (id == CYBER9520) || (id == CYBER9525DVD) || | |
96 | (id == IMAGE975) || (id == IMAGE985) || | |
97 | (id == CYBERBLADEi1) || (id == CYBERBLADEi1D) || | |
98 | (id == CYBERBLADEAi1) || (id == CYBERBLADEAi1D) || | |
99 | (id == CYBERBLADEXPm8) || (id == CYBERBLADEXPm16) || | |
100 | (id == CYBERBLADEXPAi1)); | |
1da177e4 LT |
101 | } |
102 | ||
103 | static int iscyber(int id) | |
104 | { | |
105 | switch (id) { | |
245a2c2c KH |
106 | case CYBER9388: |
107 | case CYBER9382: | |
108 | case CYBER9385: | |
109 | case CYBER9397: | |
110 | case CYBER9397DVD: | |
111 | case CYBER9520: | |
112 | case CYBER9525DVD: | |
113 | case CYBERBLADEE4: | |
114 | case CYBERBLADEi7D: | |
115 | case CYBERBLADEi1: | |
116 | case CYBERBLADEi1D: | |
117 | case CYBERBLADEAi1: | |
118 | case CYBERBLADEAi1D: | |
119 | case CYBERBLADEXPAi1: | |
120 | return 1; | |
1da177e4 | 121 | |
245a2c2c KH |
122 | case CYBER9320: |
123 | case TGUI9660: | |
124 | case IMAGE975: | |
125 | case IMAGE985: | |
126 | case BLADE3D: | |
127 | case CYBERBLADEi7: /* VIA MPV4 integrated version */ | |
128 | ||
129 | default: | |
130 | /* case CYBERBLDAEXPm8: Strange */ | |
131 | /* case CYBERBLDAEXPm16: Strange */ | |
132 | return 0; | |
1da177e4 LT |
133 | } |
134 | } | |
135 | ||
245a2c2c | 136 | #define CRT 0x3D0 /* CRTC registers offset for color display */ |
1da177e4 LT |
137 | |
138 | #ifndef TRIDENT_MMIO | |
139 | #define TRIDENT_MMIO 1 | |
140 | #endif | |
141 | ||
142 | #if TRIDENT_MMIO | |
245a2c2c | 143 | #define t_outb(val, reg) writeb(val,((struct tridentfb_par *)(fb_info.par))->io_virt + reg) |
1da177e4 LT |
144 | #define t_inb(reg) readb(((struct tridentfb_par*)(fb_info.par))->io_virt + reg) |
145 | #else | |
245a2c2c | 146 | #define t_outb(val, reg) outb(val, reg) |
1da177e4 LT |
147 | #define t_inb(reg) inb(reg) |
148 | #endif | |
149 | ||
150 | ||
151 | static struct accel_switch { | |
245a2c2c KH |
152 | void (*init_accel) (int, int); |
153 | void (*wait_engine) (void); | |
154 | void (*fill_rect) (u32, u32, u32, u32, u32, u32); | |
155 | void (*copy_rect) (u32, u32, u32, u32, u32, u32); | |
1da177e4 LT |
156 | } *acc; |
157 | ||
245a2c2c | 158 | #define writemmr(r, v) writel(v, ((struct tridentfb_par *)fb_info.par)->io_virt + r) |
1da177e4 LT |
159 | #define readmmr(r) readl(((struct tridentfb_par *)fb_info.par)->io_virt + r) |
160 | ||
1da177e4 LT |
161 | /* |
162 | * Blade specific acceleration. | |
163 | */ | |
164 | ||
245a2c2c | 165 | #define point(x, y) ((y) << 16 | (x)) |
1da177e4 LT |
166 | #define STA 0x2120 |
167 | #define CMD 0x2144 | |
168 | #define ROP 0x2148 | |
169 | #define CLR 0x2160 | |
170 | #define SR1 0x2100 | |
171 | #define SR2 0x2104 | |
172 | #define DR1 0x2108 | |
173 | #define DR2 0x210C | |
174 | ||
175 | #define ROP_S 0xCC | |
176 | ||
245a2c2c | 177 | static void blade_init_accel(int pitch, int bpp) |
1da177e4 | 178 | { |
245a2c2c KH |
179 | int v1 = (pitch >> 3) << 20; |
180 | int tmp = 0, v2; | |
1da177e4 | 181 | switch (bpp) { |
245a2c2c KH |
182 | case 8: |
183 | tmp = 0; | |
184 | break; | |
185 | case 15: | |
186 | tmp = 5; | |
187 | break; | |
188 | case 16: | |
189 | tmp = 1; | |
190 | break; | |
191 | case 24: | |
192 | case 32: | |
193 | tmp = 2; | |
194 | break; | |
1da177e4 | 195 | } |
245a2c2c KH |
196 | v2 = v1 | (tmp << 29); |
197 | writemmr(0x21C0, v2); | |
198 | writemmr(0x21C4, v2); | |
199 | writemmr(0x21B8, v2); | |
200 | writemmr(0x21BC, v2); | |
201 | writemmr(0x21D0, v1); | |
202 | writemmr(0x21D4, v1); | |
203 | writemmr(0x21C8, v1); | |
204 | writemmr(0x21CC, v1); | |
205 | writemmr(0x216C, 0); | |
1da177e4 LT |
206 | } |
207 | ||
208 | static void blade_wait_engine(void) | |
209 | { | |
245a2c2c | 210 | while (readmmr(STA) & 0xFA800000) ; |
1da177e4 LT |
211 | } |
212 | ||
245a2c2c | 213 | static void blade_fill_rect(u32 x, u32 y, u32 w, u32 h, u32 c, u32 rop) |
1da177e4 | 214 | { |
245a2c2c KH |
215 | writemmr(CLR, c); |
216 | writemmr(ROP, rop ? 0x66 : ROP_S); | |
217 | writemmr(CMD, 0x20000000 | 1 << 19 | 1 << 4 | 2 << 2); | |
1da177e4 | 218 | |
245a2c2c KH |
219 | writemmr(DR1, point(x, y)); |
220 | writemmr(DR2, point(x + w - 1, y + h - 1)); | |
1da177e4 LT |
221 | } |
222 | ||
245a2c2c | 223 | static void blade_copy_rect(u32 x1, u32 y1, u32 x2, u32 y2, u32 w, u32 h) |
1da177e4 | 224 | { |
245a2c2c | 225 | u32 s1, s2, d1, d2; |
1da177e4 | 226 | int direction = 2; |
245a2c2c KH |
227 | s1 = point(x1, y1); |
228 | s2 = point(x1 + w - 1, y1 + h - 1); | |
229 | d1 = point(x2, y2); | |
230 | d2 = point(x2 + w - 1, y2 + h - 1); | |
1da177e4 LT |
231 | |
232 | if ((y1 > y2) || ((y1 == y2) && (x1 > x2))) | |
245a2c2c | 233 | direction = 0; |
1da177e4 | 234 | |
245a2c2c KH |
235 | writemmr(ROP, ROP_S); |
236 | writemmr(CMD, 0xE0000000 | 1 << 19 | 1 << 4 | 1 << 2 | direction); | |
1da177e4 | 237 | |
245a2c2c KH |
238 | writemmr(SR1, direction ? s2 : s1); |
239 | writemmr(SR2, direction ? s1 : s2); | |
240 | writemmr(DR1, direction ? d2 : d1); | |
241 | writemmr(DR2, direction ? d1 : d2); | |
1da177e4 LT |
242 | } |
243 | ||
244 | static struct accel_switch accel_blade = { | |
245 | blade_init_accel, | |
246 | blade_wait_engine, | |
247 | blade_fill_rect, | |
248 | blade_copy_rect, | |
249 | }; | |
250 | ||
1da177e4 LT |
251 | /* |
252 | * BladeXP specific acceleration functions | |
253 | */ | |
254 | ||
255 | #define ROP_P 0xF0 | |
245a2c2c | 256 | #define masked_point(x, y) ((y & 0xffff)<<16|(x & 0xffff)) |
1da177e4 | 257 | |
245a2c2c | 258 | static void xp_init_accel(int pitch, int bpp) |
1da177e4 | 259 | { |
245a2c2c | 260 | int tmp = 0, v1; |
1da177e4 LT |
261 | unsigned char x = 0; |
262 | ||
263 | switch (bpp) { | |
245a2c2c KH |
264 | case 8: |
265 | x = 0; | |
266 | break; | |
267 | case 16: | |
268 | x = 1; | |
269 | break; | |
270 | case 24: | |
271 | x = 3; | |
272 | break; | |
273 | case 32: | |
274 | x = 2; | |
275 | break; | |
1da177e4 LT |
276 | } |
277 | ||
278 | switch (pitch << (bpp >> 3)) { | |
245a2c2c KH |
279 | case 8192: |
280 | case 512: | |
281 | x |= 0x00; | |
282 | break; | |
283 | case 1024: | |
284 | x |= 0x04; | |
285 | break; | |
286 | case 2048: | |
287 | x |= 0x08; | |
288 | break; | |
289 | case 4096: | |
290 | x |= 0x0C; | |
291 | break; | |
1da177e4 LT |
292 | } |
293 | ||
245a2c2c | 294 | t_outb(x, 0x2125); |
1da177e4 LT |
295 | |
296 | eng_oper = x | 0x40; | |
297 | ||
298 | switch (bpp) { | |
245a2c2c KH |
299 | case 8: |
300 | tmp = 18; | |
301 | break; | |
302 | case 15: | |
303 | case 16: | |
304 | tmp = 19; | |
305 | break; | |
306 | case 24: | |
307 | case 32: | |
308 | tmp = 20; | |
309 | break; | |
1da177e4 LT |
310 | } |
311 | ||
312 | v1 = pitch << tmp; | |
313 | ||
245a2c2c KH |
314 | writemmr(0x2154, v1); |
315 | writemmr(0x2150, v1); | |
316 | t_outb(3, 0x2126); | |
1da177e4 LT |
317 | } |
318 | ||
319 | static void xp_wait_engine(void) | |
320 | { | |
321 | int busy; | |
322 | int count, timeout; | |
323 | ||
324 | count = 0; | |
325 | timeout = 0; | |
326 | for (;;) { | |
327 | busy = t_inb(STA) & 0x80; | |
328 | if (busy != 0x80) | |
329 | return; | |
330 | count++; | |
331 | if (count == 10000000) { | |
332 | /* Timeout */ | |
333 | count = 9990000; | |
334 | timeout++; | |
335 | if (timeout == 8) { | |
336 | /* Reset engine */ | |
337 | t_outb(0x00, 0x2120); | |
338 | return; | |
339 | } | |
340 | } | |
341 | } | |
342 | } | |
343 | ||
245a2c2c | 344 | static void xp_fill_rect(u32 x, u32 y, u32 w, u32 h, u32 c, u32 rop) |
1da177e4 | 345 | { |
245a2c2c KH |
346 | writemmr(0x2127, ROP_P); |
347 | writemmr(0x2158, c); | |
348 | writemmr(0x2128, 0x4000); | |
349 | writemmr(0x2140, masked_point(h, w)); | |
350 | writemmr(0x2138, masked_point(y, x)); | |
351 | t_outb(0x01, 0x2124); | |
352 | t_outb(eng_oper, 0x2125); | |
1da177e4 LT |
353 | } |
354 | ||
245a2c2c | 355 | static void xp_copy_rect(u32 x1, u32 y1, u32 x2, u32 y2, u32 w, u32 h) |
1da177e4 LT |
356 | { |
357 | int direction; | |
245a2c2c | 358 | u32 x1_tmp, x2_tmp, y1_tmp, y2_tmp; |
1da177e4 LT |
359 | |
360 | direction = 0x0004; | |
245a2c2c | 361 | |
1da177e4 LT |
362 | if ((x1 < x2) && (y1 == y2)) { |
363 | direction |= 0x0200; | |
364 | x1_tmp = x1 + w - 1; | |
365 | x2_tmp = x2 + w - 1; | |
366 | } else { | |
367 | x1_tmp = x1; | |
368 | x2_tmp = x2; | |
369 | } | |
245a2c2c | 370 | |
1da177e4 LT |
371 | if (y1 < y2) { |
372 | direction |= 0x0100; | |
373 | y1_tmp = y1 + h - 1; | |
374 | y2_tmp = y2 + h - 1; | |
245a2c2c | 375 | } else { |
1da177e4 LT |
376 | y1_tmp = y1; |
377 | y2_tmp = y2; | |
378 | } | |
379 | ||
245a2c2c KH |
380 | writemmr(0x2128, direction); |
381 | t_outb(ROP_S, 0x2127); | |
382 | writemmr(0x213C, masked_point(y1_tmp, x1_tmp)); | |
383 | writemmr(0x2138, masked_point(y2_tmp, x2_tmp)); | |
384 | writemmr(0x2140, masked_point(h, w)); | |
385 | t_outb(0x01, 0x2124); | |
1da177e4 LT |
386 | } |
387 | ||
388 | static struct accel_switch accel_xp = { | |
245a2c2c | 389 | xp_init_accel, |
1da177e4 LT |
390 | xp_wait_engine, |
391 | xp_fill_rect, | |
392 | xp_copy_rect, | |
393 | }; | |
394 | ||
1da177e4 LT |
395 | /* |
396 | * Image specific acceleration functions | |
397 | */ | |
245a2c2c | 398 | static void image_init_accel(int pitch, int bpp) |
1da177e4 LT |
399 | { |
400 | int tmp = 0; | |
245a2c2c KH |
401 | switch (bpp) { |
402 | case 8: | |
403 | tmp = 0; | |
404 | break; | |
405 | case 15: | |
406 | tmp = 5; | |
407 | break; | |
408 | case 16: | |
409 | tmp = 1; | |
410 | break; | |
411 | case 24: | |
412 | case 32: | |
413 | tmp = 2; | |
414 | break; | |
1da177e4 LT |
415 | } |
416 | writemmr(0x2120, 0xF0000000); | |
245a2c2c | 417 | writemmr(0x2120, 0x40000000 | tmp); |
1da177e4 LT |
418 | writemmr(0x2120, 0x80000000); |
419 | writemmr(0x2144, 0x00000000); | |
420 | writemmr(0x2148, 0x00000000); | |
421 | writemmr(0x2150, 0x00000000); | |
422 | writemmr(0x2154, 0x00000000); | |
245a2c2c | 423 | writemmr(0x2120, 0x60000000 | (pitch << 16) | pitch); |
1da177e4 LT |
424 | writemmr(0x216C, 0x00000000); |
425 | writemmr(0x2170, 0x00000000); | |
426 | writemmr(0x217C, 0x00000000); | |
427 | writemmr(0x2120, 0x10000000); | |
428 | writemmr(0x2130, (2047 << 16) | 2047); | |
429 | } | |
430 | ||
431 | static void image_wait_engine(void) | |
432 | { | |
245a2c2c | 433 | while (readmmr(0x2164) & 0xF0000000) ; |
1da177e4 LT |
434 | } |
435 | ||
245a2c2c | 436 | static void image_fill_rect(u32 x, u32 y, u32 w, u32 h, u32 c, u32 rop) |
1da177e4 | 437 | { |
245a2c2c KH |
438 | writemmr(0x2120, 0x80000000); |
439 | writemmr(0x2120, 0x90000000 | ROP_S); | |
1da177e4 | 440 | |
245a2c2c | 441 | writemmr(0x2144, c); |
1da177e4 | 442 | |
245a2c2c KH |
443 | writemmr(DR1, point(x, y)); |
444 | writemmr(DR2, point(x + w - 1, y + h - 1)); | |
1da177e4 | 445 | |
245a2c2c | 446 | writemmr(0x2124, 0x80000000 | 3 << 22 | 1 << 10 | 1 << 9); |
1da177e4 LT |
447 | } |
448 | ||
245a2c2c | 449 | static void image_copy_rect(u32 x1, u32 y1, u32 x2, u32 y2, u32 w, u32 h) |
1da177e4 | 450 | { |
245a2c2c | 451 | u32 s1, s2, d1, d2; |
1da177e4 | 452 | int direction = 2; |
245a2c2c KH |
453 | s1 = point(x1, y1); |
454 | s2 = point(x1 + w - 1, y1 + h - 1); | |
455 | d1 = point(x2, y2); | |
456 | d2 = point(x2 + w - 1, y2 + h - 1); | |
1da177e4 | 457 | |
245a2c2c KH |
458 | if ((y1 > y2) || ((y1 == y2) && (x1 > x2))) |
459 | direction = 0; | |
460 | ||
461 | writemmr(0x2120, 0x80000000); | |
462 | writemmr(0x2120, 0x90000000 | ROP_S); | |
463 | ||
464 | writemmr(SR1, direction ? s2 : s1); | |
465 | writemmr(SR2, direction ? s1 : s2); | |
466 | writemmr(DR1, direction ? d2 : d1); | |
467 | writemmr(DR2, direction ? d1 : d2); | |
468 | writemmr(0x2124, 0x80000000 | 1 << 22 | 1 << 10 | 1 << 7 | direction); | |
469 | } | |
1da177e4 LT |
470 | |
471 | static struct accel_switch accel_image = { | |
472 | image_init_accel, | |
473 | image_wait_engine, | |
474 | image_fill_rect, | |
475 | image_copy_rect, | |
476 | }; | |
477 | ||
478 | /* | |
479 | * Accel functions called by the upper layers | |
480 | */ | |
481 | #ifdef CONFIG_FB_TRIDENT_ACCEL | |
245a2c2c KH |
482 | static void tridentfb_fillrect(struct fb_info *info, |
483 | const struct fb_fillrect *fr) | |
1da177e4 LT |
484 | { |
485 | int bpp = info->var.bits_per_pixel; | |
8dad46cf | 486 | int col = 0; |
245a2c2c | 487 | |
1da177e4 | 488 | switch (bpp) { |
245a2c2c KH |
489 | default: |
490 | case 8: | |
491 | col |= fr->color; | |
492 | col |= col << 8; | |
493 | col |= col << 16; | |
494 | break; | |
495 | case 16: | |
496 | col = ((u32 *)(info->pseudo_palette))[fr->color]; | |
497 | break; | |
498 | case 32: | |
499 | col = ((u32 *)(info->pseudo_palette))[fr->color]; | |
500 | break; | |
501 | } | |
502 | ||
1da177e4 LT |
503 | acc->fill_rect(fr->dx, fr->dy, fr->width, fr->height, col, fr->rop); |
504 | acc->wait_engine(); | |
505 | } | |
245a2c2c KH |
506 | static void tridentfb_copyarea(struct fb_info *info, |
507 | const struct fb_copyarea *ca) | |
1da177e4 | 508 | { |
245a2c2c | 509 | acc->copy_rect(ca->sx, ca->sy, ca->dx, ca->dy, ca->width, ca->height); |
1da177e4 LT |
510 | acc->wait_engine(); |
511 | } | |
512 | #else /* !CONFIG_FB_TRIDENT_ACCEL */ | |
513 | #define tridentfb_fillrect cfb_fillrect | |
514 | #define tridentfb_copyarea cfb_copyarea | |
515 | #endif /* CONFIG_FB_TRIDENT_ACCEL */ | |
516 | ||
517 | ||
518 | /* | |
519 | * Hardware access functions | |
520 | */ | |
521 | ||
522 | static inline unsigned char read3X4(int reg) | |
523 | { | |
245a2c2c | 524 | struct tridentfb_par *par = (struct tridentfb_par *)fb_info.par; |
1da177e4 | 525 | writeb(reg, par->io_virt + CRT + 4); |
245a2c2c | 526 | return readb(par->io_virt + CRT + 5); |
1da177e4 LT |
527 | } |
528 | ||
529 | static inline void write3X4(int reg, unsigned char val) | |
530 | { | |
245a2c2c | 531 | struct tridentfb_par *par = (struct tridentfb_par *)fb_info.par; |
1da177e4 LT |
532 | writeb(reg, par->io_virt + CRT + 4); |
533 | writeb(val, par->io_virt + CRT + 5); | |
534 | } | |
535 | ||
536 | static inline unsigned char read3C4(int reg) | |
537 | { | |
538 | t_outb(reg, 0x3C4); | |
539 | return t_inb(0x3C5); | |
540 | } | |
541 | ||
542 | static inline void write3C4(int reg, unsigned char val) | |
543 | { | |
544 | t_outb(reg, 0x3C4); | |
545 | t_outb(val, 0x3C5); | |
546 | } | |
547 | ||
548 | static inline unsigned char read3CE(int reg) | |
549 | { | |
550 | t_outb(reg, 0x3CE); | |
551 | return t_inb(0x3CF); | |
552 | } | |
553 | ||
554 | static inline void writeAttr(int reg, unsigned char val) | |
555 | { | |
245a2c2c | 556 | readb(((struct tridentfb_par *)fb_info.par)->io_virt + CRT + 0x0A); /* flip-flop to index */ |
1da177e4 LT |
557 | t_outb(reg, 0x3C0); |
558 | t_outb(val, 0x3C0); | |
559 | } | |
560 | ||
561 | static inline void write3CE(int reg, unsigned char val) | |
562 | { | |
563 | t_outb(reg, 0x3CE); | |
564 | t_outb(val, 0x3CF); | |
565 | } | |
566 | ||
567 | static inline void enable_mmio(void) | |
568 | { | |
569 | /* Goto New Mode */ | |
570 | outb(0x0B, 0x3C4); | |
571 | inb(0x3C5); | |
572 | ||
573 | /* Unprotect registers */ | |
574 | outb(NewMode1, 0x3C4); | |
575 | outb(0x80, 0x3C5); | |
245a2c2c | 576 | |
1da177e4 | 577 | /* Enable MMIO */ |
245a2c2c | 578 | outb(PCIReg, 0x3D4); |
1da177e4 LT |
579 | outb(inb(0x3D5) | 0x01, 0x3D5); |
580 | } | |
581 | ||
1da177e4 LT |
582 | #define crtc_unlock() write3X4(CRTVSyncEnd, read3X4(CRTVSyncEnd) & 0x7F) |
583 | ||
584 | /* Return flat panel's maximum x resolution */ | |
474ab45a | 585 | static int __devinit get_nativex(void) |
1da177e4 | 586 | { |
245a2c2c | 587 | int x, y, tmp; |
1da177e4 LT |
588 | |
589 | if (nativex) | |
590 | return nativex; | |
591 | ||
245a2c2c | 592 | tmp = (read3CE(VertStretch) >> 4) & 3; |
1da177e4 LT |
593 | |
594 | switch (tmp) { | |
245a2c2c KH |
595 | case 0: |
596 | x = 1280; y = 1024; | |
597 | break; | |
598 | case 2: | |
599 | x = 1024; y = 768; | |
600 | break; | |
601 | case 3: | |
602 | x = 800; y = 600; | |
603 | break; | |
604 | case 4: | |
605 | x = 1400; y = 1050; | |
606 | break; | |
607 | case 1: | |
608 | default: | |
609 | x = 640; y = 480; | |
610 | break; | |
1da177e4 LT |
611 | } |
612 | ||
613 | output("%dx%d flat panel found\n", x, y); | |
614 | return x; | |
615 | } | |
616 | ||
617 | /* Set pitch */ | |
618 | static void set_lwidth(int width) | |
619 | { | |
620 | write3X4(Offset, width & 0xFF); | |
245a2c2c KH |
621 | write3X4(AddColReg, |
622 | (read3X4(AddColReg) & 0xCF) | ((width & 0x300) >> 4)); | |
1da177e4 LT |
623 | } |
624 | ||
625 | /* For resolutions smaller than FP resolution stretch */ | |
626 | static void screen_stretch(void) | |
627 | { | |
245a2c2c KH |
628 | if (chip_id != CYBERBLADEXPAi1) |
629 | write3CE(BiosReg, 0); | |
630 | else | |
631 | write3CE(BiosReg, 8); | |
632 | write3CE(VertStretch, (read3CE(VertStretch) & 0x7C) | 1); | |
633 | write3CE(HorStretch, (read3CE(HorStretch) & 0x7C) | 1); | |
1da177e4 LT |
634 | } |
635 | ||
636 | /* For resolutions smaller than FP resolution center */ | |
637 | static void screen_center(void) | |
638 | { | |
245a2c2c KH |
639 | write3CE(VertStretch, (read3CE(VertStretch) & 0x7C) | 0x80); |
640 | write3CE(HorStretch, (read3CE(HorStretch) & 0x7C) | 0x80); | |
1da177e4 LT |
641 | } |
642 | ||
643 | /* Address of first shown pixel in display memory */ | |
644 | static void set_screen_start(int base) | |
645 | { | |
646 | write3X4(StartAddrLow, base & 0xFF); | |
647 | write3X4(StartAddrHigh, (base & 0xFF00) >> 8); | |
245a2c2c KH |
648 | write3X4(CRTCModuleTest, |
649 | (read3X4(CRTCModuleTest) & 0xDF) | ((base & 0x10000) >> 11)); | |
650 | write3X4(CRTHiOrd, | |
651 | (read3X4(CRTHiOrd) & 0xF8) | ((base & 0xE0000) >> 17)); | |
1da177e4 LT |
652 | } |
653 | ||
654 | /* Use 20.12 fixed-point for NTSC value and frequency calculation */ | |
245a2c2c | 655 | #define calc_freq(n, m, k) ( ((unsigned long)0xE517 * (n + 8) / ((m + 2) * (1 << k))) >> 12 ) |
1da177e4 LT |
656 | |
657 | /* Set dotclock frequency */ | |
658 | static void set_vclk(int freq) | |
659 | { | |
245a2c2c KH |
660 | int m, n, k; |
661 | int f, fi, d, di; | |
662 | unsigned char lo = 0, hi = 0; | |
1da177e4 LT |
663 | |
664 | d = 20; | |
245a2c2c KH |
665 | for (k = 2; k >= 0; k--) |
666 | for (m = 0; m < 63; m++) | |
667 | for (n = 0; n < 128; n++) { | |
668 | fi = calc_freq(n, m, k); | |
669 | if ((di = abs(fi - freq)) < d) { | |
670 | d = di; | |
671 | f = fi; | |
672 | lo = n; | |
673 | hi = (k << 6) | m; | |
674 | } | |
675 | } | |
1da177e4 | 676 | if (chip3D) { |
245a2c2c KH |
677 | write3C4(ClockHigh, hi); |
678 | write3C4(ClockLow, lo); | |
1da177e4 | 679 | } else { |
245a2c2c KH |
680 | outb(lo, 0x43C8); |
681 | outb(hi, 0x43C9); | |
1da177e4 | 682 | } |
245a2c2c | 683 | debug("VCLK = %X %X\n", hi, lo); |
1da177e4 LT |
684 | } |
685 | ||
686 | /* Set number of lines for flat panels*/ | |
687 | static void set_number_of_lines(int lines) | |
688 | { | |
689 | int tmp = read3CE(CyberEnhance) & 0x8F; | |
690 | if (lines > 1024) | |
691 | tmp |= 0x50; | |
692 | else if (lines > 768) | |
693 | tmp |= 0x30; | |
694 | else if (lines > 600) | |
695 | tmp |= 0x20; | |
696 | else if (lines > 480) | |
697 | tmp |= 0x10; | |
698 | write3CE(CyberEnhance, tmp); | |
699 | } | |
700 | ||
701 | /* | |
702 | * If we see that FP is active we assume we have one. | |
703 | * Otherwise we have a CRT display.User can override. | |
704 | */ | |
474ab45a | 705 | static unsigned int __devinit get_displaytype(void) |
1da177e4 LT |
706 | { |
707 | if (fp) | |
708 | return DISPLAY_FP; | |
709 | if (crt || !chipcyber) | |
710 | return DISPLAY_CRT; | |
245a2c2c | 711 | return (read3CE(FPConfig) & 0x10) ? DISPLAY_FP : DISPLAY_CRT; |
1da177e4 LT |
712 | } |
713 | ||
714 | /* Try detecting the video memory size */ | |
474ab45a | 715 | static unsigned int __devinit get_memsize(void) |
1da177e4 LT |
716 | { |
717 | unsigned char tmp, tmp2; | |
718 | unsigned int k; | |
719 | ||
720 | /* If memory size provided by user */ | |
721 | if (memsize) | |
722 | k = memsize * Kb; | |
723 | else | |
245a2c2c KH |
724 | switch (chip_id) { |
725 | case CYBER9525DVD: | |
726 | k = 2560 * Kb; | |
727 | break; | |
1da177e4 LT |
728 | default: |
729 | tmp = read3X4(SPR) & 0x0F; | |
730 | switch (tmp) { | |
731 | ||
245a2c2c KH |
732 | case 0x01: |
733 | k = 512; | |
734 | break; | |
735 | case 0x02: | |
736 | k = 6 * Mb; /* XP */ | |
737 | break; | |
738 | case 0x03: | |
739 | k = 1 * Mb; | |
740 | break; | |
741 | case 0x04: | |
742 | k = 8 * Mb; | |
743 | break; | |
744 | case 0x06: | |
745 | k = 10 * Mb; /* XP */ | |
746 | break; | |
747 | case 0x07: | |
748 | k = 2 * Mb; | |
749 | break; | |
750 | case 0x08: | |
751 | k = 12 * Mb; /* XP */ | |
752 | break; | |
753 | case 0x0A: | |
754 | k = 14 * Mb; /* XP */ | |
755 | break; | |
756 | case 0x0C: | |
757 | k = 16 * Mb; /* XP */ | |
758 | break; | |
759 | case 0x0E: /* XP */ | |
760 | ||
761 | tmp2 = read3C4(0xC1); | |
762 | switch (tmp2) { | |
763 | case 0x00: | |
764 | k = 20 * Mb; | |
765 | break; | |
766 | case 0x01: | |
767 | k = 24 * Mb; | |
768 | break; | |
769 | case 0x10: | |
770 | k = 28 * Mb; | |
771 | break; | |
772 | case 0x11: | |
773 | k = 32 * Mb; | |
774 | break; | |
775 | default: | |
776 | k = 1 * Mb; | |
777 | break; | |
778 | } | |
779 | break; | |
780 | ||
781 | case 0x0F: | |
782 | k = 4 * Mb; | |
783 | break; | |
784 | default: | |
785 | k = 1 * Mb; | |
1da177e4 | 786 | break; |
1da177e4 | 787 | } |
245a2c2c | 788 | } |
1da177e4 LT |
789 | |
790 | k -= memdiff * Kb; | |
245a2c2c | 791 | output("framebuffer size = %d Kb\n", k / Kb); |
1da177e4 LT |
792 | return k; |
793 | } | |
794 | ||
795 | /* See if we can handle the video mode described in var */ | |
245a2c2c KH |
796 | static int tridentfb_check_var(struct fb_var_screeninfo *var, |
797 | struct fb_info *info) | |
1da177e4 LT |
798 | { |
799 | int bpp = var->bits_per_pixel; | |
800 | debug("enter\n"); | |
801 | ||
802 | /* check color depth */ | |
245a2c2c | 803 | if (bpp == 24) |
1da177e4 | 804 | bpp = var->bits_per_pixel = 32; |
245a2c2c | 805 | /* check whether resolution fits on panel and in memory */ |
1da177e4 LT |
806 | if (flatpanel && nativex && var->xres > nativex) |
807 | return -EINVAL; | |
245a2c2c | 808 | if (var->xres * var->yres_virtual * bpp / 8 > info->fix.smem_len) |
1da177e4 LT |
809 | return -EINVAL; |
810 | ||
811 | switch (bpp) { | |
245a2c2c KH |
812 | case 8: |
813 | var->red.offset = 0; | |
814 | var->green.offset = 0; | |
815 | var->blue.offset = 0; | |
816 | var->red.length = 6; | |
817 | var->green.length = 6; | |
818 | var->blue.length = 6; | |
819 | break; | |
820 | case 16: | |
821 | var->red.offset = 11; | |
822 | var->green.offset = 5; | |
823 | var->blue.offset = 0; | |
824 | var->red.length = 5; | |
825 | var->green.length = 6; | |
826 | var->blue.length = 5; | |
827 | break; | |
828 | case 32: | |
829 | var->red.offset = 16; | |
830 | var->green.offset = 8; | |
831 | var->blue.offset = 0; | |
832 | var->red.length = 8; | |
833 | var->green.length = 8; | |
834 | var->blue.length = 8; | |
835 | break; | |
836 | default: | |
837 | return -EINVAL; | |
1da177e4 LT |
838 | } |
839 | debug("exit\n"); | |
840 | ||
841 | return 0; | |
842 | ||
843 | } | |
245a2c2c | 844 | |
1da177e4 LT |
845 | /* Pan the display */ |
846 | static int tridentfb_pan_display(struct fb_var_screeninfo *var, | |
245a2c2c | 847 | struct fb_info *info) |
1da177e4 LT |
848 | { |
849 | unsigned int offset; | |
850 | ||
851 | debug("enter\n"); | |
852 | offset = (var->xoffset + (var->yoffset * var->xres)) | |
245a2c2c | 853 | * var->bits_per_pixel / 32; |
1da177e4 LT |
854 | info->var.xoffset = var->xoffset; |
855 | info->var.yoffset = var->yoffset; | |
856 | set_screen_start(offset); | |
857 | debug("exit\n"); | |
858 | return 0; | |
859 | } | |
860 | ||
245a2c2c KH |
861 | #define shadowmode_on() write3CE(CyberControl, read3CE(CyberControl) | 0x81) |
862 | #define shadowmode_off() write3CE(CyberControl, read3CE(CyberControl) & 0x7E) | |
1da177e4 LT |
863 | |
864 | /* Set the hardware to the requested video mode */ | |
865 | static int tridentfb_set_par(struct fb_info *info) | |
866 | { | |
245a2c2c KH |
867 | struct tridentfb_par *par = (struct tridentfb_par *)(info->par); |
868 | u32 htotal, hdispend, hsyncstart, hsyncend, hblankstart, hblankend; | |
869 | u32 vtotal, vdispend, vsyncstart, vsyncend, vblankstart, vblankend; | |
870 | struct fb_var_screeninfo *var = &info->var; | |
1da177e4 LT |
871 | int bpp = var->bits_per_pixel; |
872 | unsigned char tmp; | |
873 | debug("enter\n"); | |
245a2c2c KH |
874 | hdispend = var->xres / 8 - 1; |
875 | hsyncstart = (var->xres + var->right_margin) / 8; | |
876 | hsyncend = var->hsync_len / 8; | |
877 | htotal = | |
878 | (var->xres + var->left_margin + var->right_margin + | |
879 | var->hsync_len) / 8 - 10; | |
1da177e4 LT |
880 | hblankstart = hdispend + 1; |
881 | hblankend = htotal + 5; | |
882 | ||
1da177e4 LT |
883 | vdispend = var->yres - 1; |
884 | vsyncstart = var->yres + var->lower_margin; | |
885 | vsyncend = var->vsync_len; | |
245a2c2c | 886 | vtotal = var->upper_margin + vsyncstart + vsyncend - 2; |
1da177e4 LT |
887 | vblankstart = var->yres; |
888 | vblankend = vtotal + 2; | |
889 | ||
890 | enable_mmio(); | |
891 | crtc_unlock(); | |
245a2c2c | 892 | write3CE(CyberControl, 8); |
1da177e4 LT |
893 | |
894 | if (flatpanel && var->xres < nativex) { | |
895 | /* | |
896 | * on flat panels with native size larger | |
897 | * than requested resolution decide whether | |
898 | * we stretch or center | |
899 | */ | |
245a2c2c | 900 | t_outb(0xEB, 0x3C2); |
1da177e4 LT |
901 | |
902 | shadowmode_on(); | |
903 | ||
245a2c2c | 904 | if (center) |
1da177e4 LT |
905 | screen_center(); |
906 | else if (stretch) | |
907 | screen_stretch(); | |
908 | ||
909 | } else { | |
245a2c2c KH |
910 | t_outb(0x2B, 0x3C2); |
911 | write3CE(CyberControl, 8); | |
1da177e4 LT |
912 | } |
913 | ||
914 | /* vertical timing values */ | |
915 | write3X4(CRTVTotal, vtotal & 0xFF); | |
916 | write3X4(CRTVDispEnd, vdispend & 0xFF); | |
917 | write3X4(CRTVSyncStart, vsyncstart & 0xFF); | |
918 | write3X4(CRTVSyncEnd, (vsyncend & 0x0F)); | |
919 | write3X4(CRTVBlankStart, vblankstart & 0xFF); | |
245a2c2c | 920 | write3X4(CRTVBlankEnd, 0 /* p->vblankend & 0xFF */ ); |
1da177e4 LT |
921 | |
922 | /* horizontal timing values */ | |
923 | write3X4(CRTHTotal, htotal & 0xFF); | |
924 | write3X4(CRTHDispEnd, hdispend & 0xFF); | |
925 | write3X4(CRTHSyncStart, hsyncstart & 0xFF); | |
245a2c2c | 926 | write3X4(CRTHSyncEnd, (hsyncend & 0x1F) | ((hblankend & 0x20) << 2)); |
1da177e4 | 927 | write3X4(CRTHBlankStart, hblankstart & 0xFF); |
245a2c2c | 928 | write3X4(CRTHBlankEnd, 0 /* (p->hblankend & 0x1F) */ ); |
1da177e4 LT |
929 | |
930 | /* higher bits of vertical timing values */ | |
931 | tmp = 0x10; | |
932 | if (vtotal & 0x100) tmp |= 0x01; | |
933 | if (vdispend & 0x100) tmp |= 0x02; | |
934 | if (vsyncstart & 0x100) tmp |= 0x04; | |
935 | if (vblankstart & 0x100) tmp |= 0x08; | |
936 | ||
937 | if (vtotal & 0x200) tmp |= 0x20; | |
938 | if (vdispend & 0x200) tmp |= 0x40; | |
939 | if (vsyncstart & 0x200) tmp |= 0x80; | |
940 | write3X4(CRTOverflow, tmp); | |
941 | ||
245a2c2c | 942 | tmp = read3X4(CRTHiOrd) | 0x08; /* line compare bit 10 */ |
1da177e4 LT |
943 | if (vtotal & 0x400) tmp |= 0x80; |
944 | if (vblankstart & 0x400) tmp |= 0x40; | |
945 | if (vsyncstart & 0x400) tmp |= 0x20; | |
946 | if (vdispend & 0x400) tmp |= 0x10; | |
947 | write3X4(CRTHiOrd, tmp); | |
948 | ||
949 | tmp = 0; | |
950 | if (htotal & 0x800) tmp |= 0x800 >> 11; | |
951 | if (hblankstart & 0x800) tmp |= 0x800 >> 7; | |
952 | write3X4(HorizOverflow, tmp); | |
245a2c2c | 953 | |
1da177e4 LT |
954 | tmp = 0x40; |
955 | if (vblankstart & 0x200) tmp |= 0x20; | |
245a2c2c | 956 | //FIXME if (info->var.vmode & FB_VMODE_DOUBLE) tmp |= 0x80; /* double scan for 200 line modes */ |
1da177e4 LT |
957 | write3X4(CRTMaxScanLine, tmp); |
958 | ||
245a2c2c KH |
959 | write3X4(CRTLineCompare, 0xFF); |
960 | write3X4(CRTPRowScan, 0); | |
961 | write3X4(CRTModeControl, 0xC3); | |
1da177e4 | 962 | |
245a2c2c | 963 | write3X4(LinearAddReg, 0x20); /* enable linear addressing */ |
1da177e4 | 964 | |
245a2c2c KH |
965 | tmp = (info->var.vmode & FB_VMODE_INTERLACED) ? 0x84 : 0x80; |
966 | write3X4(CRTCModuleTest, tmp); /* enable access extended memory */ | |
1da177e4 | 967 | |
245a2c2c | 968 | write3X4(GraphEngReg, 0x80); /* enable GE for text acceleration */ |
1da177e4 | 969 | |
245a2c2c KH |
970 | #ifdef CONFIG_FB_TRIDENT_ACCEL |
971 | acc->init_accel(info->var.xres, bpp); | |
8dad46cf | 972 | #endif |
245a2c2c | 973 | |
1da177e4 | 974 | switch (bpp) { |
245a2c2c KH |
975 | case 8: |
976 | tmp = 0x00; | |
977 | break; | |
978 | case 16: | |
979 | tmp = 0x05; | |
980 | break; | |
981 | case 24: | |
982 | tmp = 0x29; | |
983 | break; | |
984 | case 32: | |
985 | tmp = 0x09; | |
986 | break; | |
1da177e4 LT |
987 | } |
988 | ||
989 | write3X4(PixelBusReg, tmp); | |
990 | ||
991 | tmp = 0x10; | |
992 | if (chipcyber) | |
245a2c2c KH |
993 | tmp |= 0x20; |
994 | write3X4(DRAMControl, tmp); /* both IO, linear enable */ | |
1da177e4 LT |
995 | |
996 | write3X4(InterfaceSel, read3X4(InterfaceSel) | 0x40); | |
245a2c2c KH |
997 | write3X4(Performance, 0x92); |
998 | write3X4(PCIReg, 0x07); /* MMIO & PCI read and write burst enable */ | |
1da177e4 LT |
999 | |
1000 | /* convert from picoseconds to MHz */ | |
245a2c2c | 1001 | par->vclk = 1000000 / info->var.pixclock; |
1da177e4 | 1002 | if (bpp == 32) |
245a2c2c | 1003 | par->vclk *= 2; |
1da177e4 LT |
1004 | set_vclk(par->vclk); |
1005 | ||
245a2c2c KH |
1006 | write3C4(0, 3); |
1007 | write3C4(1, 1); /* set char clock 8 dots wide */ | |
1008 | write3C4(2, 0x0F); /* enable 4 maps because needed in chain4 mode */ | |
1009 | write3C4(3, 0); | |
1010 | write3C4(4, 0x0E); /* memory mode enable bitmaps ?? */ | |
1da177e4 | 1011 | |
245a2c2c KH |
1012 | write3CE(MiscExtFunc, (bpp == 32) ? 0x1A : 0x12); /* divide clock by 2 if 32bpp */ |
1013 | /* chain4 mode display and CPU path */ | |
1014 | write3CE(0x5, 0x40); /* no CGA compat, allow 256 col */ | |
1015 | write3CE(0x6, 0x05); /* graphics mode */ | |
1016 | write3CE(0x7, 0x0F); /* planes? */ | |
1da177e4 LT |
1017 | |
1018 | if (chip_id == CYBERBLADEXPAi1) { | |
1019 | /* This fixes snow-effect in 32 bpp */ | |
245a2c2c | 1020 | write3X4(CRTHSyncStart, 0x84); |
1da177e4 LT |
1021 | } |
1022 | ||
245a2c2c KH |
1023 | writeAttr(0x10, 0x41); /* graphics mode and support 256 color modes */ |
1024 | writeAttr(0x12, 0x0F); /* planes */ | |
1025 | writeAttr(0x13, 0); /* horizontal pel panning */ | |
1da177e4 | 1026 | |
245a2c2c KH |
1027 | /* colors */ |
1028 | for (tmp = 0; tmp < 0x10; tmp++) | |
1029 | writeAttr(tmp, tmp); | |
1030 | readb(par->io_virt + CRT + 0x0A); /* flip-flop to index */ | |
1031 | t_outb(0x20, 0x3C0); /* enable attr */ | |
1da177e4 LT |
1032 | |
1033 | switch (bpp) { | |
245a2c2c KH |
1034 | case 8: |
1035 | tmp = 0; | |
1036 | break; | |
1037 | case 15: | |
1038 | tmp = 0x10; | |
1039 | break; | |
1040 | case 16: | |
1041 | tmp = 0x30; | |
1042 | break; | |
1043 | case 24: | |
1044 | case 32: | |
1045 | tmp = 0xD0; | |
1046 | break; | |
1da177e4 LT |
1047 | } |
1048 | ||
1049 | t_inb(0x3C8); | |
1050 | t_inb(0x3C6); | |
1051 | t_inb(0x3C6); | |
1052 | t_inb(0x3C6); | |
1053 | t_inb(0x3C6); | |
245a2c2c | 1054 | t_outb(tmp, 0x3C6); |
1da177e4 LT |
1055 | t_inb(0x3C8); |
1056 | ||
1057 | if (flatpanel) | |
1058 | set_number_of_lines(info->var.yres); | |
245a2c2c | 1059 | set_lwidth(info->var.xres * bpp / (4 * 16)); |
1da177e4 | 1060 | info->fix.visual = (bpp == 8) ? FB_VISUAL_PSEUDOCOLOR : FB_VISUAL_TRUECOLOR; |
245a2c2c KH |
1061 | info->fix.line_length = info->var.xres * (bpp >> 3); |
1062 | info->cmap.len = (bpp == 8) ? 256 : 16; | |
1da177e4 LT |
1063 | debug("exit\n"); |
1064 | return 0; | |
1065 | } | |
1066 | ||
1067 | /* Set one color register */ | |
1068 | static int tridentfb_setcolreg(unsigned regno, unsigned red, unsigned green, | |
245a2c2c KH |
1069 | unsigned blue, unsigned transp, |
1070 | struct fb_info *info) | |
1da177e4 LT |
1071 | { |
1072 | int bpp = info->var.bits_per_pixel; | |
1073 | ||
1074 | if (regno >= info->cmap.len) | |
1075 | return 1; | |
1076 | ||
973d9ab2 | 1077 | if (bpp == 8) { |
245a2c2c KH |
1078 | t_outb(0xFF, 0x3C6); |
1079 | t_outb(regno, 0x3C8); | |
1da177e4 | 1080 | |
245a2c2c KH |
1081 | t_outb(red >> 10, 0x3C9); |
1082 | t_outb(green >> 10, 0x3C9); | |
1083 | t_outb(blue >> 10, 0x3C9); | |
1da177e4 | 1084 | |
973d9ab2 AD |
1085 | } else if (regno < 16) { |
1086 | if (bpp == 16) { /* RGB 565 */ | |
1087 | u32 col; | |
1088 | ||
1089 | col = (red & 0xF800) | ((green & 0xFC00) >> 5) | | |
1090 | ((blue & 0xF800) >> 11); | |
1091 | col |= col << 16; | |
1092 | ((u32 *)(info->pseudo_palette))[regno] = col; | |
1093 | } else if (bpp == 32) /* ARGB 8888 */ | |
1094 | ((u32*)info->pseudo_palette)[regno] = | |
245a2c2c KH |
1095 | ((transp & 0xFF00) << 16) | |
1096 | ((red & 0xFF00) << 8) | | |
973d9ab2 | 1097 | ((green & 0xFF00)) | |
245a2c2c | 1098 | ((blue & 0xFF00) >> 8); |
973d9ab2 | 1099 | } |
1da177e4 | 1100 | |
245a2c2c | 1101 | /* debug("exit\n"); */ |
1da177e4 LT |
1102 | return 0; |
1103 | } | |
1104 | ||
1105 | /* Try blanking the screen.For flat panels it does nothing */ | |
1106 | static int tridentfb_blank(int blank_mode, struct fb_info *info) | |
1107 | { | |
245a2c2c | 1108 | unsigned char PMCont, DPMSCont; |
1da177e4 LT |
1109 | |
1110 | debug("enter\n"); | |
1111 | if (flatpanel) | |
1112 | return 0; | |
245a2c2c | 1113 | t_outb(0x04, 0x83C8); /* Read DPMS Control */ |
1da177e4 LT |
1114 | PMCont = t_inb(0x83C6) & 0xFC; |
1115 | DPMSCont = read3CE(PowerStatus) & 0xFC; | |
245a2c2c | 1116 | switch (blank_mode) { |
1da177e4 LT |
1117 | case FB_BLANK_UNBLANK: |
1118 | /* Screen: On, HSync: On, VSync: On */ | |
1119 | case FB_BLANK_NORMAL: | |
1120 | /* Screen: Off, HSync: On, VSync: On */ | |
1121 | PMCont |= 0x03; | |
1122 | DPMSCont |= 0x00; | |
1123 | break; | |
1124 | case FB_BLANK_HSYNC_SUSPEND: | |
1125 | /* Screen: Off, HSync: Off, VSync: On */ | |
1126 | PMCont |= 0x02; | |
1127 | DPMSCont |= 0x01; | |
1128 | break; | |
1129 | case FB_BLANK_VSYNC_SUSPEND: | |
1130 | /* Screen: Off, HSync: On, VSync: Off */ | |
1131 | PMCont |= 0x02; | |
1132 | DPMSCont |= 0x02; | |
1133 | break; | |
1134 | case FB_BLANK_POWERDOWN: | |
1135 | /* Screen: Off, HSync: Off, VSync: Off */ | |
1136 | PMCont |= 0x00; | |
1137 | DPMSCont |= 0x03; | |
1138 | break; | |
245a2c2c | 1139 | } |
1da177e4 | 1140 | |
245a2c2c KH |
1141 | write3CE(PowerStatus, DPMSCont); |
1142 | t_outb(4, 0x83C8); | |
1143 | t_outb(PMCont, 0x83C6); | |
1da177e4 LT |
1144 | |
1145 | debug("exit\n"); | |
1146 | ||
1147 | /* let fbcon do a softblank for us */ | |
1148 | return (blank_mode == FB_BLANK_NORMAL) ? 1 : 0; | |
1149 | } | |
1150 | ||
245a2c2c KH |
1151 | static struct fb_ops tridentfb_ops = { |
1152 | .owner = THIS_MODULE, | |
1153 | .fb_setcolreg = tridentfb_setcolreg, | |
1154 | .fb_pan_display = tridentfb_pan_display, | |
1155 | .fb_blank = tridentfb_blank, | |
1156 | .fb_check_var = tridentfb_check_var, | |
1157 | .fb_set_par = tridentfb_set_par, | |
1158 | .fb_fillrect = tridentfb_fillrect, | |
1159 | .fb_copyarea = tridentfb_copyarea, | |
1160 | .fb_imageblit = cfb_imageblit, | |
1161 | }; | |
1162 | ||
1163 | static int __devinit trident_pci_probe(struct pci_dev * dev, | |
1164 | const struct pci_device_id * id) | |
1da177e4 LT |
1165 | { |
1166 | int err; | |
1167 | unsigned char revision; | |
1168 | ||
1169 | err = pci_enable_device(dev); | |
1170 | if (err) | |
1171 | return err; | |
1172 | ||
1173 | chip_id = id->device; | |
1174 | ||
245a2c2c | 1175 | if (chip_id == CYBERBLADEi1) |
9fa68eae KP |
1176 | output("*** Please do use cyblafb, Cyberblade/i1 support " |
1177 | "will soon be removed from tridentfb!\n"); | |
1178 | ||
1179 | ||
1da177e4 | 1180 | /* If PCI id is 0x9660 then further detect chip type */ |
245a2c2c | 1181 | |
1da177e4 | 1182 | if (chip_id == TGUI9660) { |
245a2c2c KH |
1183 | outb(RevisionID, 0x3C4); |
1184 | revision = inb(0x3C5); | |
1185 | ||
1da177e4 | 1186 | switch (revision) { |
245a2c2c KH |
1187 | case 0x22: |
1188 | case 0x23: | |
1189 | chip_id = CYBER9397; | |
1190 | break; | |
1191 | case 0x2A: | |
1192 | chip_id = CYBER9397DVD; | |
1193 | break; | |
1194 | case 0x30: | |
1195 | case 0x33: | |
1196 | case 0x34: | |
1197 | case 0x35: | |
1198 | case 0x38: | |
1199 | case 0x3A: | |
1200 | case 0xB3: | |
1201 | chip_id = CYBER9385; | |
1202 | break; | |
1203 | case 0x40 ... 0x43: | |
1204 | chip_id = CYBER9382; | |
1205 | break; | |
1206 | case 0x4A: | |
1207 | chip_id = CYBER9388; | |
1208 | break; | |
1209 | default: | |
1210 | break; | |
1da177e4 LT |
1211 | } |
1212 | } | |
1213 | ||
1214 | chip3D = is3Dchip(chip_id); | |
1215 | chipcyber = iscyber(chip_id); | |
1216 | ||
1217 | if (is_xp(chip_id)) { | |
1218 | acc = &accel_xp; | |
245a2c2c | 1219 | } else if (is_blade(chip_id)) { |
1da177e4 LT |
1220 | acc = &accel_blade; |
1221 | } else { | |
1222 | acc = &accel_image; | |
1223 | } | |
1224 | ||
1225 | /* acceleration is on by default for 3D chips */ | |
1226 | defaultaccel = chip3D && !noaccel; | |
1227 | ||
1228 | fb_info.par = &default_par; | |
1229 | ||
1230 | /* setup MMIO region */ | |
245a2c2c KH |
1231 | tridentfb_fix.mmio_start = pci_resource_start(dev, 1); |
1232 | tridentfb_fix.mmio_len = chip3D ? 0x20000 : 0x10000; | |
1da177e4 LT |
1233 | |
1234 | if (!request_mem_region(tridentfb_fix.mmio_start, tridentfb_fix.mmio_len, "tridentfb")) { | |
1235 | debug("request_region failed!\n"); | |
1236 | return -1; | |
1237 | } | |
1238 | ||
1239 | default_par.io_virt = ioremap_nocache(tridentfb_fix.mmio_start, tridentfb_fix.mmio_len); | |
1240 | ||
1241 | if (!default_par.io_virt) { | |
1242 | release_region(tridentfb_fix.mmio_start, tridentfb_fix.mmio_len); | |
1243 | debug("ioremap failed\n"); | |
1244 | return -1; | |
1245 | } | |
1246 | ||
1247 | enable_mmio(); | |
245a2c2c | 1248 | |
1da177e4 | 1249 | /* setup framebuffer memory */ |
245a2c2c | 1250 | tridentfb_fix.smem_start = pci_resource_start(dev, 0); |
1da177e4 | 1251 | tridentfb_fix.smem_len = get_memsize(); |
245a2c2c | 1252 | |
1da177e4 LT |
1253 | if (!request_mem_region(tridentfb_fix.smem_start, tridentfb_fix.smem_len, "tridentfb")) { |
1254 | debug("request_mem_region failed!\n"); | |
a02f6402 AL |
1255 | err = -1; |
1256 | goto out_unmap; | |
1da177e4 LT |
1257 | } |
1258 | ||
1259 | fb_info.screen_base = ioremap_nocache(tridentfb_fix.smem_start, | |
245a2c2c | 1260 | tridentfb_fix.smem_len); |
1da177e4 LT |
1261 | |
1262 | if (!fb_info.screen_base) { | |
1263 | release_mem_region(tridentfb_fix.smem_start, tridentfb_fix.smem_len); | |
1264 | debug("ioremap failed\n"); | |
a02f6402 AL |
1265 | err = -1; |
1266 | goto out_unmap; | |
1da177e4 LT |
1267 | } |
1268 | ||
1269 | output("%s board found\n", pci_name(dev)); | |
245a2c2c KH |
1270 | #if 0 |
1271 | output("Trident board found : mem = %X, io = %X, mem_v = %X, io_v = %X\n", | |
1da177e4 LT |
1272 | tridentfb_fix.smem_start, tridentfb_fix.mmio_start, fb_info.screen_base, default_par.io_virt); |
1273 | #endif | |
1274 | displaytype = get_displaytype(); | |
1275 | ||
245a2c2c | 1276 | if (flatpanel) |
1da177e4 LT |
1277 | nativex = get_nativex(); |
1278 | ||
1279 | fb_info.fix = tridentfb_fix; | |
1280 | fb_info.fbops = &tridentfb_ops; | |
1281 | ||
1282 | ||
1283 | fb_info.flags = FBINFO_DEFAULT | FBINFO_HWACCEL_YPAN; | |
1284 | #ifdef CONFIG_FB_TRIDENT_ACCEL | |
1285 | fb_info.flags |= FBINFO_HWACCEL_COPYAREA | FBINFO_HWACCEL_FILLRECT; | |
1286 | #endif | |
1287 | fb_info.pseudo_palette = pseudo_pal; | |
1288 | ||
245a2c2c | 1289 | if (!fb_find_mode(&default_var, &fb_info, mode, NULL, 0, NULL, bpp)) { |
a02f6402 AL |
1290 | err = -EINVAL; |
1291 | goto out_unmap; | |
1292 | } | |
245a2c2c | 1293 | fb_alloc_cmap(&fb_info.cmap, 256, 0); |
1da177e4 LT |
1294 | if (defaultaccel && acc) |
1295 | default_var.accel_flags |= FB_ACCELF_TEXT; | |
1296 | else | |
1297 | default_var.accel_flags &= ~FB_ACCELF_TEXT; | |
1298 | default_var.activate |= FB_ACTIVATE_NOW; | |
1299 | fb_info.var = default_var; | |
1300 | fb_info.device = &dev->dev; | |
1301 | if (register_framebuffer(&fb_info) < 0) { | |
1302 | printk(KERN_ERR "tridentfb: could not register Trident framebuffer\n"); | |
a02f6402 AL |
1303 | err = -EINVAL; |
1304 | goto out_unmap; | |
1da177e4 LT |
1305 | } |
1306 | output("fb%d: %s frame buffer device %dx%d-%dbpp\n", | |
245a2c2c KH |
1307 | fb_info.node, fb_info.fix.id, default_var.xres, |
1308 | default_var.yres, default_var.bits_per_pixel); | |
1da177e4 | 1309 | return 0; |
a02f6402 AL |
1310 | |
1311 | out_unmap: | |
1312 | if (default_par.io_virt) | |
1313 | iounmap(default_par.io_virt); | |
1314 | if (fb_info.screen_base) | |
1315 | iounmap(fb_info.screen_base); | |
1316 | return err; | |
1da177e4 LT |
1317 | } |
1318 | ||
245a2c2c | 1319 | static void __devexit trident_pci_remove(struct pci_dev *dev) |
1da177e4 LT |
1320 | { |
1321 | struct tridentfb_par *par = (struct tridentfb_par*)fb_info.par; | |
1322 | unregister_framebuffer(&fb_info); | |
1323 | iounmap(par->io_virt); | |
1324 | iounmap(fb_info.screen_base); | |
1325 | release_mem_region(tridentfb_fix.smem_start, tridentfb_fix.smem_len); | |
1326 | release_region(tridentfb_fix.mmio_start, tridentfb_fix.mmio_len); | |
1327 | } | |
1328 | ||
1329 | /* List of boards that we are trying to support */ | |
1330 | static struct pci_device_id trident_devices[] = { | |
245a2c2c KH |
1331 | {PCI_VENDOR_ID_TRIDENT, BLADE3D, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, |
1332 | {PCI_VENDOR_ID_TRIDENT, CYBERBLADEi7, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, | |
1333 | {PCI_VENDOR_ID_TRIDENT, CYBERBLADEi7D, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, | |
1334 | {PCI_VENDOR_ID_TRIDENT, CYBERBLADEi1, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, | |
1335 | {PCI_VENDOR_ID_TRIDENT, CYBERBLADEi1D, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, | |
1336 | {PCI_VENDOR_ID_TRIDENT, CYBERBLADEAi1, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, | |
1337 | {PCI_VENDOR_ID_TRIDENT, CYBERBLADEAi1D, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, | |
1338 | {PCI_VENDOR_ID_TRIDENT, CYBERBLADEE4, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, | |
1339 | {PCI_VENDOR_ID_TRIDENT, TGUI9660, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, | |
1340 | {PCI_VENDOR_ID_TRIDENT, IMAGE975, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, | |
1341 | {PCI_VENDOR_ID_TRIDENT, IMAGE985, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, | |
1342 | {PCI_VENDOR_ID_TRIDENT, CYBER9320, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, | |
1343 | {PCI_VENDOR_ID_TRIDENT, CYBER9388, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, | |
1344 | {PCI_VENDOR_ID_TRIDENT, CYBER9520, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, | |
1345 | {PCI_VENDOR_ID_TRIDENT, CYBER9525DVD, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, | |
1346 | {PCI_VENDOR_ID_TRIDENT, CYBER9397, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, | |
1347 | {PCI_VENDOR_ID_TRIDENT, CYBER9397DVD, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, | |
1348 | {PCI_VENDOR_ID_TRIDENT, CYBERBLADEXPAi1, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, | |
1349 | {PCI_VENDOR_ID_TRIDENT, CYBERBLADEXPm8, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, | |
1350 | {PCI_VENDOR_ID_TRIDENT, CYBERBLADEXPm16, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, | |
1da177e4 | 1351 | {0,} |
245a2c2c KH |
1352 | }; |
1353 | ||
1354 | MODULE_DEVICE_TABLE(pci, trident_devices); | |
1da177e4 LT |
1355 | |
1356 | static struct pci_driver tridentfb_pci_driver = { | |
245a2c2c KH |
1357 | .name = "tridentfb", |
1358 | .id_table = trident_devices, | |
1359 | .probe = trident_pci_probe, | |
1360 | .remove = __devexit_p(trident_pci_remove) | |
1da177e4 LT |
1361 | }; |
1362 | ||
1363 | /* | |
1364 | * Parse user specified options (`video=trident:') | |
1365 | * example: | |
245a2c2c | 1366 | * video=trident:800x600,bpp=16,noaccel |
1da177e4 LT |
1367 | */ |
1368 | #ifndef MODULE | |
1369 | static int tridentfb_setup(char *options) | |
1370 | { | |
245a2c2c | 1371 | char *opt; |
1da177e4 LT |
1372 | if (!options || !*options) |
1373 | return 0; | |
245a2c2c KH |
1374 | while ((opt = strsep(&options, ",")) != NULL) { |
1375 | if (!*opt) | |
1376 | continue; | |
1377 | if (!strncmp(opt, "noaccel", 7)) | |
1da177e4 | 1378 | noaccel = 1; |
245a2c2c | 1379 | else if (!strncmp(opt, "fp", 2)) |
1da177e4 | 1380 | displaytype = DISPLAY_FP; |
245a2c2c | 1381 | else if (!strncmp(opt, "crt", 3)) |
1da177e4 | 1382 | displaytype = DISPLAY_CRT; |
245a2c2c KH |
1383 | else if (!strncmp(opt, "bpp=", 4)) |
1384 | bpp = simple_strtoul(opt + 4, NULL, 0); | |
1385 | else if (!strncmp(opt, "center", 6)) | |
1da177e4 | 1386 | center = 1; |
245a2c2c | 1387 | else if (!strncmp(opt, "stretch", 7)) |
1da177e4 | 1388 | stretch = 1; |
245a2c2c KH |
1389 | else if (!strncmp(opt, "memsize=", 8)) |
1390 | memsize = simple_strtoul(opt + 8, NULL, 0); | |
1391 | else if (!strncmp(opt, "memdiff=", 8)) | |
1392 | memdiff = simple_strtoul(opt + 8, NULL, 0); | |
1393 | else if (!strncmp(opt, "nativex=", 8)) | |
1394 | nativex = simple_strtoul(opt + 8, NULL, 0); | |
1da177e4 LT |
1395 | else |
1396 | mode = opt; | |
1397 | } | |
1398 | return 0; | |
1399 | } | |
1400 | #endif | |
1401 | ||
1402 | static int __init tridentfb_init(void) | |
1403 | { | |
1404 | #ifndef MODULE | |
1405 | char *option = NULL; | |
1406 | ||
1407 | if (fb_get_options("tridentfb", &option)) | |
1408 | return -ENODEV; | |
1409 | tridentfb_setup(option); | |
1410 | #endif | |
1411 | output("Trident framebuffer %s initializing\n", VERSION); | |
1412 | return pci_register_driver(&tridentfb_pci_driver); | |
1413 | } | |
1414 | ||
1415 | static void __exit tridentfb_exit(void) | |
1416 | { | |
1417 | pci_unregister_driver(&tridentfb_pci_driver); | |
1418 | } | |
1419 | ||
1da177e4 LT |
1420 | module_init(tridentfb_init); |
1421 | module_exit(tridentfb_exit); | |
1422 | ||
1423 | MODULE_AUTHOR("Jani Monoses <jani@iv.ro>"); | |
1424 | MODULE_DESCRIPTION("Framebuffer driver for Trident cards"); | |
1425 | MODULE_LICENSE("GPL"); | |
1426 |