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558b7bd8 OZ |
1 | /* |
2 | * linux/drivers/video/vt8623fb.c - fbdev driver for | |
3 | * integrated graphic core in VIA VT8623 [CLE266] chipset | |
4 | * | |
5 | * Copyright (c) 2006-2007 Ondrej Zajicek <santiago@crfreenet.org> | |
6 | * | |
7 | * This file is subject to the terms and conditions of the GNU General Public | |
8 | * License. See the file COPYING in the main directory of this archive for | |
9 | * more details. | |
10 | * | |
11 | * Code is based on s3fb, some parts are from David Boucher's viafb | |
12 | * (http://davesdomain.org.uk/viafb/) | |
13 | */ | |
14 | ||
15 | #include <linux/version.h> | |
16 | #include <linux/module.h> | |
17 | #include <linux/kernel.h> | |
18 | #include <linux/errno.h> | |
19 | #include <linux/string.h> | |
20 | #include <linux/mm.h> | |
21 | #include <linux/tty.h> | |
22 | #include <linux/slab.h> | |
23 | #include <linux/delay.h> | |
24 | #include <linux/fb.h> | |
25 | #include <linux/svga.h> | |
26 | #include <linux/init.h> | |
27 | #include <linux/pci.h> | |
28 | #include <linux/console.h> /* Why should fb driver call console functions? because acquire_console_sem() */ | |
29 | #include <video/vga.h> | |
30 | ||
31 | #ifdef CONFIG_MTRR | |
32 | #include <asm/mtrr.h> | |
33 | #endif | |
34 | ||
35 | struct vt8623fb_info { | |
36 | char __iomem *mmio_base; | |
37 | int mtrr_reg; | |
38 | struct vgastate state; | |
39 | struct mutex open_lock; | |
40 | unsigned int ref_count; | |
41 | u32 pseudo_palette[16]; | |
42 | }; | |
43 | ||
44 | ||
45 | ||
46 | /* ------------------------------------------------------------------------- */ | |
47 | ||
48 | static const struct svga_fb_format vt8623fb_formats[] = { | |
49 | { 0, {0, 6, 0}, {0, 6, 0}, {0, 6, 0}, {0, 0, 0}, 0, | |
50 | FB_TYPE_TEXT, FB_AUX_TEXT_SVGA_STEP8, FB_VISUAL_PSEUDOCOLOR, 16, 16}, | |
51 | { 4, {0, 6, 0}, {0, 6, 0}, {0, 6, 0}, {0, 0, 0}, 0, | |
52 | FB_TYPE_PACKED_PIXELS, 0, FB_VISUAL_PSEUDOCOLOR, 16, 16}, | |
53 | { 4, {0, 6, 0}, {0, 6, 0}, {0, 6, 0}, {0, 0, 0}, 1, | |
54 | FB_TYPE_INTERLEAVED_PLANES, 1, FB_VISUAL_PSEUDOCOLOR, 16, 16}, | |
55 | { 8, {0, 6, 0}, {0, 6, 0}, {0, 6, 0}, {0, 0, 0}, 0, | |
56 | FB_TYPE_PACKED_PIXELS, 0, FB_VISUAL_PSEUDOCOLOR, 8, 8}, | |
57 | /* {16, {10, 5, 0}, {5, 5, 0}, {0, 5, 0}, {0, 0, 0}, 0, | |
58 | FB_TYPE_PACKED_PIXELS, 0, FB_VISUAL_TRUECOLOR, 4, 4}, */ | |
59 | {16, {11, 5, 0}, {5, 6, 0}, {0, 5, 0}, {0, 0, 0}, 0, | |
60 | FB_TYPE_PACKED_PIXELS, 0, FB_VISUAL_TRUECOLOR, 4, 4}, | |
61 | {32, {16, 8, 0}, {8, 8, 0}, {0, 8, 0}, {0, 0, 0}, 0, | |
62 | FB_TYPE_PACKED_PIXELS, 0, FB_VISUAL_TRUECOLOR, 2, 2}, | |
63 | SVGA_FORMAT_END | |
64 | }; | |
65 | ||
66 | static const struct svga_pll vt8623_pll = {2, 127, 2, 7, 0, 3, | |
67 | 60000, 300000, 14318}; | |
68 | ||
69 | /* CRT timing register sets */ | |
70 | ||
3552f09a AB |
71 | static struct vga_regset vt8623_h_total_regs[] = {{0x00, 0, 7}, {0x36, 3, 3}, VGA_REGSET_END}; |
72 | static struct vga_regset vt8623_h_display_regs[] = {{0x01, 0, 7}, VGA_REGSET_END}; | |
73 | static struct vga_regset vt8623_h_blank_start_regs[] = {{0x02, 0, 7}, VGA_REGSET_END}; | |
74 | static struct vga_regset vt8623_h_blank_end_regs[] = {{0x03, 0, 4}, {0x05, 7, 7}, {0x33, 5, 5}, VGA_REGSET_END}; | |
75 | static struct vga_regset vt8623_h_sync_start_regs[] = {{0x04, 0, 7}, {0x33, 4, 4}, VGA_REGSET_END}; | |
76 | static struct vga_regset vt8623_h_sync_end_regs[] = {{0x05, 0, 4}, VGA_REGSET_END}; | |
77 | ||
78 | static struct vga_regset vt8623_v_total_regs[] = {{0x06, 0, 7}, {0x07, 0, 0}, {0x07, 5, 5}, {0x35, 0, 0}, VGA_REGSET_END}; | |
79 | static struct vga_regset vt8623_v_display_regs[] = {{0x12, 0, 7}, {0x07, 1, 1}, {0x07, 6, 6}, {0x35, 2, 2}, VGA_REGSET_END}; | |
80 | static struct vga_regset vt8623_v_blank_start_regs[] = {{0x15, 0, 7}, {0x07, 3, 3}, {0x09, 5, 5}, {0x35, 3, 3}, VGA_REGSET_END}; | |
81 | static struct vga_regset vt8623_v_blank_end_regs[] = {{0x16, 0, 7}, VGA_REGSET_END}; | |
82 | static struct vga_regset vt8623_v_sync_start_regs[] = {{0x10, 0, 7}, {0x07, 2, 2}, {0x07, 7, 7}, {0x35, 1, 1}, VGA_REGSET_END}; | |
83 | static struct vga_regset vt8623_v_sync_end_regs[] = {{0x11, 0, 3}, VGA_REGSET_END}; | |
84 | ||
85 | static struct vga_regset vt8623_offset_regs[] = {{0x13, 0, 7}, {0x35, 5, 7}, VGA_REGSET_END}; | |
86 | static struct vga_regset vt8623_line_compare_regs[] = {{0x18, 0, 7}, {0x07, 4, 4}, {0x09, 6, 6}, {0x33, 0, 2}, {0x35, 4, 4}, VGA_REGSET_END}; | |
87 | static struct vga_regset vt8623_fetch_count_regs[] = {{0x1C, 0, 7}, {0x1D, 0, 1}, VGA_REGSET_END}; | |
88 | static struct vga_regset vt8623_start_address_regs[] = {{0x0d, 0, 7}, {0x0c, 0, 7}, {0x34, 0, 7}, {0x48, 0, 1}, VGA_REGSET_END}; | |
89 | ||
90 | static struct svga_timing_regs vt8623_timing_regs = { | |
558b7bd8 OZ |
91 | vt8623_h_total_regs, vt8623_h_display_regs, vt8623_h_blank_start_regs, |
92 | vt8623_h_blank_end_regs, vt8623_h_sync_start_regs, vt8623_h_sync_end_regs, | |
93 | vt8623_v_total_regs, vt8623_v_display_regs, vt8623_v_blank_start_regs, | |
94 | vt8623_v_blank_end_regs, vt8623_v_sync_start_regs, vt8623_v_sync_end_regs, | |
95 | }; | |
96 | ||
97 | ||
98 | /* ------------------------------------------------------------------------- */ | |
99 | ||
100 | ||
101 | /* Module parameters */ | |
102 | ||
cc6c549c | 103 | static char *mode_option = "640x480-8@60"; |
558b7bd8 OZ |
104 | |
105 | #ifdef CONFIG_MTRR | |
106 | static int mtrr = 1; | |
107 | #endif | |
108 | ||
109 | MODULE_AUTHOR("(c) 2006 Ondrej Zajicek <santiago@crfreenet.org>"); | |
110 | MODULE_LICENSE("GPL"); | |
111 | MODULE_DESCRIPTION("fbdev driver for integrated graphics core in VIA VT8623 [CLE266]"); | |
112 | ||
cc6c549c KH |
113 | module_param(mode_option, charp, 0644); |
114 | MODULE_PARM_DESC(mode_option, "Default video mode ('640x480-8@60', etc)"); | |
9e3f0ca8 KH |
115 | module_param_named(mode, mode_option, charp, 0); |
116 | MODULE_PARM_DESC(mode, "Default video mode e.g. '648x480-8@60' (deprecated)"); | |
558b7bd8 OZ |
117 | |
118 | #ifdef CONFIG_MTRR | |
119 | module_param(mtrr, int, 0444); | |
120 | MODULE_PARM_DESC(mtrr, "Enable write-combining with MTRR (1=enable, 0=disable, default=1)"); | |
121 | #endif | |
122 | ||
123 | ||
124 | /* ------------------------------------------------------------------------- */ | |
125 | ||
126 | ||
127 | static struct fb_tile_ops vt8623fb_tile_ops = { | |
128 | .fb_settile = svga_settile, | |
129 | .fb_tilecopy = svga_tilecopy, | |
130 | .fb_tilefill = svga_tilefill, | |
131 | .fb_tileblit = svga_tileblit, | |
132 | .fb_tilecursor = svga_tilecursor, | |
133 | .fb_get_tilemax = svga_get_tilemax, | |
134 | }; | |
135 | ||
136 | ||
137 | /* ------------------------------------------------------------------------- */ | |
138 | ||
139 | ||
140 | /* image data is MSB-first, fb structure is MSB-first too */ | |
141 | static inline u32 expand_color(u32 c) | |
142 | { | |
143 | return ((c & 1) | ((c & 2) << 7) | ((c & 4) << 14) | ((c & 8) << 21)) * 0xFF; | |
144 | } | |
145 | ||
146 | /* vt8623fb_iplan_imageblit silently assumes that almost everything is 8-pixel aligned */ | |
147 | static void vt8623fb_iplan_imageblit(struct fb_info *info, const struct fb_image *image) | |
148 | { | |
149 | u32 fg = expand_color(image->fg_color); | |
150 | u32 bg = expand_color(image->bg_color); | |
151 | const u8 *src1, *src; | |
152 | u8 __iomem *dst1; | |
153 | u32 __iomem *dst; | |
154 | u32 val; | |
155 | int x, y; | |
156 | ||
157 | src1 = image->data; | |
158 | dst1 = info->screen_base + (image->dy * info->fix.line_length) | |
159 | + ((image->dx / 8) * 4); | |
160 | ||
161 | for (y = 0; y < image->height; y++) { | |
162 | src = src1; | |
163 | dst = (u32 __iomem *) dst1; | |
164 | for (x = 0; x < image->width; x += 8) { | |
165 | val = *(src++) * 0x01010101; | |
166 | val = (val & fg) | (~val & bg); | |
167 | fb_writel(val, dst++); | |
168 | } | |
169 | src1 += image->width / 8; | |
170 | dst1 += info->fix.line_length; | |
171 | } | |
172 | } | |
173 | ||
174 | /* vt8623fb_iplan_fillrect silently assumes that almost everything is 8-pixel aligned */ | |
175 | static void vt8623fb_iplan_fillrect(struct fb_info *info, const struct fb_fillrect *rect) | |
176 | { | |
177 | u32 fg = expand_color(rect->color); | |
178 | u8 __iomem *dst1; | |
179 | u32 __iomem *dst; | |
180 | int x, y; | |
181 | ||
182 | dst1 = info->screen_base + (rect->dy * info->fix.line_length) | |
183 | + ((rect->dx / 8) * 4); | |
184 | ||
185 | for (y = 0; y < rect->height; y++) { | |
186 | dst = (u32 __iomem *) dst1; | |
187 | for (x = 0; x < rect->width; x += 8) { | |
188 | fb_writel(fg, dst++); | |
189 | } | |
190 | dst1 += info->fix.line_length; | |
191 | } | |
192 | } | |
193 | ||
194 | ||
195 | /* image data is MSB-first, fb structure is high-nibble-in-low-byte-first */ | |
196 | static inline u32 expand_pixel(u32 c) | |
197 | { | |
198 | return (((c & 1) << 24) | ((c & 2) << 27) | ((c & 4) << 14) | ((c & 8) << 17) | | |
199 | ((c & 16) << 4) | ((c & 32) << 7) | ((c & 64) >> 6) | ((c & 128) >> 3)) * 0xF; | |
200 | } | |
201 | ||
202 | /* vt8623fb_cfb4_imageblit silently assumes that almost everything is 8-pixel aligned */ | |
203 | static void vt8623fb_cfb4_imageblit(struct fb_info *info, const struct fb_image *image) | |
204 | { | |
205 | u32 fg = image->fg_color * 0x11111111; | |
206 | u32 bg = image->bg_color * 0x11111111; | |
207 | const u8 *src1, *src; | |
208 | u8 __iomem *dst1; | |
209 | u32 __iomem *dst; | |
210 | u32 val; | |
211 | int x, y; | |
212 | ||
213 | src1 = image->data; | |
214 | dst1 = info->screen_base + (image->dy * info->fix.line_length) | |
215 | + ((image->dx / 8) * 4); | |
216 | ||
217 | for (y = 0; y < image->height; y++) { | |
218 | src = src1; | |
219 | dst = (u32 __iomem *) dst1; | |
220 | for (x = 0; x < image->width; x += 8) { | |
221 | val = expand_pixel(*(src++)); | |
222 | val = (val & fg) | (~val & bg); | |
223 | fb_writel(val, dst++); | |
224 | } | |
225 | src1 += image->width / 8; | |
226 | dst1 += info->fix.line_length; | |
227 | } | |
228 | } | |
229 | ||
230 | static void vt8623fb_imageblit(struct fb_info *info, const struct fb_image *image) | |
231 | { | |
232 | if ((info->var.bits_per_pixel == 4) && (image->depth == 1) | |
233 | && ((image->width % 8) == 0) && ((image->dx % 8) == 0)) { | |
234 | if (info->fix.type == FB_TYPE_INTERLEAVED_PLANES) | |
235 | vt8623fb_iplan_imageblit(info, image); | |
236 | else | |
237 | vt8623fb_cfb4_imageblit(info, image); | |
238 | } else | |
239 | cfb_imageblit(info, image); | |
240 | } | |
241 | ||
242 | static void vt8623fb_fillrect(struct fb_info *info, const struct fb_fillrect *rect) | |
243 | { | |
244 | if ((info->var.bits_per_pixel == 4) | |
245 | && ((rect->width % 8) == 0) && ((rect->dx % 8) == 0) | |
246 | && (info->fix.type == FB_TYPE_INTERLEAVED_PLANES)) | |
247 | vt8623fb_iplan_fillrect(info, rect); | |
248 | else | |
249 | cfb_fillrect(info, rect); | |
250 | } | |
251 | ||
252 | ||
253 | /* ------------------------------------------------------------------------- */ | |
254 | ||
255 | ||
256 | static void vt8623_set_pixclock(struct fb_info *info, u32 pixclock) | |
257 | { | |
258 | u16 m, n, r; | |
259 | u8 regval; | |
260 | int rv; | |
261 | ||
262 | rv = svga_compute_pll(&vt8623_pll, 1000000000 / pixclock, &m, &n, &r, info->node); | |
263 | if (rv < 0) { | |
264 | printk(KERN_ERR "fb%d: cannot set requested pixclock, keeping old value\n", info->node); | |
265 | return; | |
266 | } | |
267 | ||
268 | /* Set VGA misc register */ | |
269 | regval = vga_r(NULL, VGA_MIS_R); | |
270 | vga_w(NULL, VGA_MIS_W, regval | VGA_MIS_ENB_PLL_LOAD); | |
271 | ||
272 | /* Set clock registers */ | |
273 | vga_wseq(NULL, 0x46, (n | (r << 6))); | |
274 | vga_wseq(NULL, 0x47, m); | |
275 | ||
276 | udelay(1000); | |
277 | ||
278 | /* PLL reset */ | |
279 | svga_wseq_mask(0x40, 0x02, 0x02); | |
280 | svga_wseq_mask(0x40, 0x00, 0x02); | |
281 | } | |
282 | ||
283 | ||
284 | static int vt8623fb_open(struct fb_info *info, int user) | |
285 | { | |
286 | struct vt8623fb_info *par = info->par; | |
287 | ||
288 | mutex_lock(&(par->open_lock)); | |
289 | if (par->ref_count == 0) { | |
290 | memset(&(par->state), 0, sizeof(struct vgastate)); | |
291 | par->state.flags = VGA_SAVE_MODE | VGA_SAVE_FONTS | VGA_SAVE_CMAP; | |
292 | par->state.num_crtc = 0xA2; | |
293 | par->state.num_seq = 0x50; | |
294 | save_vga(&(par->state)); | |
295 | } | |
296 | ||
297 | par->ref_count++; | |
298 | mutex_unlock(&(par->open_lock)); | |
299 | ||
300 | return 0; | |
301 | } | |
302 | ||
303 | static int vt8623fb_release(struct fb_info *info, int user) | |
304 | { | |
305 | struct vt8623fb_info *par = info->par; | |
306 | ||
307 | mutex_lock(&(par->open_lock)); | |
308 | if (par->ref_count == 0) { | |
309 | mutex_unlock(&(par->open_lock)); | |
310 | return -EINVAL; | |
311 | } | |
312 | ||
313 | if (par->ref_count == 1) | |
314 | restore_vga(&(par->state)); | |
315 | ||
316 | par->ref_count--; | |
317 | mutex_unlock(&(par->open_lock)); | |
318 | ||
319 | return 0; | |
320 | } | |
321 | ||
322 | static int vt8623fb_check_var(struct fb_var_screeninfo *var, struct fb_info *info) | |
323 | { | |
324 | int rv, mem, step; | |
325 | ||
326 | /* Find appropriate format */ | |
327 | rv = svga_match_format (vt8623fb_formats, var, NULL); | |
328 | if (rv < 0) | |
329 | { | |
330 | printk(KERN_ERR "fb%d: unsupported mode requested\n", info->node); | |
331 | return rv; | |
332 | } | |
333 | ||
334 | /* Do not allow to have real resoulution larger than virtual */ | |
335 | if (var->xres > var->xres_virtual) | |
336 | var->xres_virtual = var->xres; | |
337 | ||
338 | if (var->yres > var->yres_virtual) | |
339 | var->yres_virtual = var->yres; | |
340 | ||
341 | /* Round up xres_virtual to have proper alignment of lines */ | |
342 | step = vt8623fb_formats[rv].xresstep - 1; | |
343 | var->xres_virtual = (var->xres_virtual+step) & ~step; | |
344 | ||
345 | /* Check whether have enough memory */ | |
346 | mem = ((var->bits_per_pixel * var->xres_virtual) >> 3) * var->yres_virtual; | |
347 | if (mem > info->screen_size) | |
348 | { | |
349 | printk(KERN_ERR "fb%d: not enough framebuffer memory (%d kB requested , %d kB available)\n", info->node, mem >> 10, (unsigned int) (info->screen_size >> 10)); | |
350 | return -EINVAL; | |
351 | } | |
352 | ||
353 | /* Text mode is limited to 256 kB of memory */ | |
354 | if ((var->bits_per_pixel == 0) && (mem > (256*1024))) | |
355 | { | |
356 | printk(KERN_ERR "fb%d: text framebuffer size too large (%d kB requested, 256 kB possible)\n", info->node, mem >> 10); | |
357 | return -EINVAL; | |
358 | } | |
359 | ||
360 | rv = svga_check_timings (&vt8623_timing_regs, var, info->node); | |
361 | if (rv < 0) | |
362 | { | |
363 | printk(KERN_ERR "fb%d: invalid timings requested\n", info->node); | |
364 | return rv; | |
365 | } | |
366 | ||
367 | /* Interlaced mode not supported */ | |
368 | if (var->vmode & FB_VMODE_INTERLACED) | |
369 | return -EINVAL; | |
370 | ||
371 | return 0; | |
372 | } | |
373 | ||
374 | ||
375 | static int vt8623fb_set_par(struct fb_info *info) | |
376 | { | |
377 | u32 mode, offset_value, fetch_value, screen_size; | |
378 | u32 bpp = info->var.bits_per_pixel; | |
379 | ||
380 | if (bpp != 0) { | |
381 | info->fix.ypanstep = 1; | |
382 | info->fix.line_length = (info->var.xres_virtual * bpp) / 8; | |
383 | ||
384 | info->flags &= ~FBINFO_MISC_TILEBLITTING; | |
385 | info->tileops = NULL; | |
386 | ||
387 | /* in 4bpp supports 8p wide tiles only, any tiles otherwise */ | |
388 | info->pixmap.blit_x = (bpp == 4) ? (1 << (8 - 1)) : (~(u32)0); | |
389 | info->pixmap.blit_y = ~(u32)0; | |
390 | ||
391 | offset_value = (info->var.xres_virtual * bpp) / 64; | |
392 | fetch_value = ((info->var.xres * bpp) / 128) + 4; | |
393 | ||
394 | if (bpp == 4) | |
395 | fetch_value = (info->var.xres / 8) + 8; /* + 0 is OK */ | |
396 | ||
397 | screen_size = info->var.yres_virtual * info->fix.line_length; | |
398 | } else { | |
399 | info->fix.ypanstep = 16; | |
400 | info->fix.line_length = 0; | |
401 | ||
402 | info->flags |= FBINFO_MISC_TILEBLITTING; | |
403 | info->tileops = &vt8623fb_tile_ops; | |
404 | ||
405 | /* supports 8x16 tiles only */ | |
406 | info->pixmap.blit_x = 1 << (8 - 1); | |
407 | info->pixmap.blit_y = 1 << (16 - 1); | |
408 | ||
409 | offset_value = info->var.xres_virtual / 16; | |
410 | fetch_value = (info->var.xres / 8) + 8; | |
411 | screen_size = (info->var.xres_virtual * info->var.yres_virtual) / 64; | |
412 | } | |
413 | ||
414 | info->var.xoffset = 0; | |
415 | info->var.yoffset = 0; | |
416 | info->var.activate = FB_ACTIVATE_NOW; | |
417 | ||
418 | /* Unlock registers */ | |
419 | svga_wseq_mask(0x10, 0x01, 0x01); | |
420 | svga_wcrt_mask(0x11, 0x00, 0x80); | |
421 | svga_wcrt_mask(0x47, 0x00, 0x01); | |
422 | ||
423 | /* Device, screen and sync off */ | |
424 | svga_wseq_mask(0x01, 0x20, 0x20); | |
425 | svga_wcrt_mask(0x36, 0x30, 0x30); | |
426 | svga_wcrt_mask(0x17, 0x00, 0x80); | |
427 | ||
428 | /* Set default values */ | |
429 | svga_set_default_gfx_regs(); | |
430 | svga_set_default_atc_regs(); | |
431 | svga_set_default_seq_regs(); | |
432 | svga_set_default_crt_regs(); | |
433 | svga_wcrt_multi(vt8623_line_compare_regs, 0xFFFFFFFF); | |
434 | svga_wcrt_multi(vt8623_start_address_regs, 0); | |
435 | ||
436 | svga_wcrt_multi(vt8623_offset_regs, offset_value); | |
437 | svga_wseq_multi(vt8623_fetch_count_regs, fetch_value); | |
438 | ||
8f5af9de OZ |
439 | /* Clear H/V Skew */ |
440 | svga_wcrt_mask(0x03, 0x00, 0x60); | |
441 | svga_wcrt_mask(0x05, 0x00, 0x60); | |
442 | ||
558b7bd8 OZ |
443 | if (info->var.vmode & FB_VMODE_DOUBLE) |
444 | svga_wcrt_mask(0x09, 0x80, 0x80); | |
445 | else | |
446 | svga_wcrt_mask(0x09, 0x00, 0x80); | |
447 | ||
448 | svga_wseq_mask(0x1E, 0xF0, 0xF0); // DI/DVP bus | |
449 | svga_wseq_mask(0x2A, 0x0F, 0x0F); // DI/DVP bus | |
450 | svga_wseq_mask(0x16, 0x08, 0xBF); // FIFO read treshold | |
451 | vga_wseq(NULL, 0x17, 0x1F); // FIFO depth | |
452 | vga_wseq(NULL, 0x18, 0x4E); | |
453 | svga_wseq_mask(0x1A, 0x08, 0x08); // enable MMIO ? | |
454 | ||
455 | vga_wcrt(NULL, 0x32, 0x00); | |
456 | vga_wcrt(NULL, 0x34, 0x00); | |
457 | vga_wcrt(NULL, 0x6A, 0x80); | |
458 | vga_wcrt(NULL, 0x6A, 0xC0); | |
459 | ||
460 | vga_wgfx(NULL, 0x20, 0x00); | |
461 | vga_wgfx(NULL, 0x21, 0x00); | |
462 | vga_wgfx(NULL, 0x22, 0x00); | |
463 | ||
464 | /* Set SR15 according to number of bits per pixel */ | |
465 | mode = svga_match_format(vt8623fb_formats, &(info->var), &(info->fix)); | |
466 | switch (mode) { | |
467 | case 0: | |
468 | pr_debug("fb%d: text mode\n", info->node); | |
469 | svga_set_textmode_vga_regs(); | |
470 | svga_wseq_mask(0x15, 0x00, 0xFE); | |
471 | svga_wcrt_mask(0x11, 0x60, 0x70); | |
472 | break; | |
473 | case 1: | |
474 | pr_debug("fb%d: 4 bit pseudocolor\n", info->node); | |
475 | vga_wgfx(NULL, VGA_GFX_MODE, 0x40); | |
476 | svga_wseq_mask(0x15, 0x20, 0xFE); | |
477 | svga_wcrt_mask(0x11, 0x00, 0x70); | |
478 | break; | |
479 | case 2: | |
480 | pr_debug("fb%d: 4 bit pseudocolor, planar\n", info->node); | |
481 | svga_wseq_mask(0x15, 0x00, 0xFE); | |
482 | svga_wcrt_mask(0x11, 0x00, 0x70); | |
483 | break; | |
484 | case 3: | |
485 | pr_debug("fb%d: 8 bit pseudocolor\n", info->node); | |
486 | svga_wseq_mask(0x15, 0x22, 0xFE); | |
487 | break; | |
488 | case 4: | |
489 | pr_debug("fb%d: 5/6/5 truecolor\n", info->node); | |
490 | svga_wseq_mask(0x15, 0xB6, 0xFE); | |
491 | break; | |
492 | case 5: | |
493 | pr_debug("fb%d: 8/8/8 truecolor\n", info->node); | |
494 | svga_wseq_mask(0x15, 0xAE, 0xFE); | |
495 | break; | |
496 | default: | |
497 | printk(KERN_ERR "vt8623fb: unsupported mode - bug\n"); | |
498 | return (-EINVAL); | |
499 | } | |
500 | ||
501 | vt8623_set_pixclock(info, info->var.pixclock); | |
502 | svga_set_timings(&vt8623_timing_regs, &(info->var), 1, 1, | |
503 | (info->var.vmode & FB_VMODE_DOUBLE) ? 2 : 1, 1, | |
504 | 1, info->node); | |
505 | ||
506 | memset_io(info->screen_base, 0x00, screen_size); | |
507 | ||
508 | /* Device and screen back on */ | |
509 | svga_wcrt_mask(0x17, 0x80, 0x80); | |
510 | svga_wcrt_mask(0x36, 0x00, 0x30); | |
511 | svga_wseq_mask(0x01, 0x00, 0x20); | |
512 | ||
513 | return 0; | |
514 | } | |
515 | ||
516 | ||
517 | static int vt8623fb_setcolreg(u_int regno, u_int red, u_int green, u_int blue, | |
518 | u_int transp, struct fb_info *fb) | |
519 | { | |
520 | switch (fb->var.bits_per_pixel) { | |
521 | case 0: | |
522 | case 4: | |
523 | if (regno >= 16) | |
524 | return -EINVAL; | |
525 | ||
526 | outb(0x0F, VGA_PEL_MSK); | |
527 | outb(regno, VGA_PEL_IW); | |
528 | outb(red >> 10, VGA_PEL_D); | |
529 | outb(green >> 10, VGA_PEL_D); | |
530 | outb(blue >> 10, VGA_PEL_D); | |
531 | break; | |
532 | case 8: | |
533 | if (regno >= 256) | |
534 | return -EINVAL; | |
535 | ||
536 | outb(0xFF, VGA_PEL_MSK); | |
537 | outb(regno, VGA_PEL_IW); | |
538 | outb(red >> 10, VGA_PEL_D); | |
539 | outb(green >> 10, VGA_PEL_D); | |
540 | outb(blue >> 10, VGA_PEL_D); | |
541 | break; | |
542 | case 16: | |
543 | if (regno >= 16) | |
544 | return 0; | |
545 | ||
546 | if (fb->var.green.length == 5) | |
547 | ((u32*)fb->pseudo_palette)[regno] = ((red & 0xF800) >> 1) | | |
548 | ((green & 0xF800) >> 6) | ((blue & 0xF800) >> 11); | |
549 | else if (fb->var.green.length == 6) | |
550 | ((u32*)fb->pseudo_palette)[regno] = (red & 0xF800) | | |
551 | ((green & 0xFC00) >> 5) | ((blue & 0xF800) >> 11); | |
552 | else | |
553 | return -EINVAL; | |
554 | break; | |
555 | case 24: | |
556 | case 32: | |
557 | if (regno >= 16) | |
558 | return 0; | |
559 | ||
560 | /* ((transp & 0xFF00) << 16) */ | |
561 | ((u32*)fb->pseudo_palette)[regno] = ((red & 0xFF00) << 8) | | |
562 | (green & 0xFF00) | ((blue & 0xFF00) >> 8); | |
563 | break; | |
564 | default: | |
565 | return -EINVAL; | |
566 | } | |
567 | ||
568 | return 0; | |
569 | } | |
570 | ||
571 | ||
572 | static int vt8623fb_blank(int blank_mode, struct fb_info *info) | |
573 | { | |
574 | switch (blank_mode) { | |
575 | case FB_BLANK_UNBLANK: | |
576 | pr_debug("fb%d: unblank\n", info->node); | |
577 | svga_wcrt_mask(0x36, 0x00, 0x30); | |
578 | svga_wseq_mask(0x01, 0x00, 0x20); | |
579 | break; | |
580 | case FB_BLANK_NORMAL: | |
581 | pr_debug("fb%d: blank\n", info->node); | |
582 | svga_wcrt_mask(0x36, 0x00, 0x30); | |
583 | svga_wseq_mask(0x01, 0x20, 0x20); | |
584 | break; | |
585 | case FB_BLANK_HSYNC_SUSPEND: | |
586 | pr_debug("fb%d: DPMS standby (hsync off)\n", info->node); | |
587 | svga_wcrt_mask(0x36, 0x10, 0x30); | |
588 | svga_wseq_mask(0x01, 0x20, 0x20); | |
589 | break; | |
590 | case FB_BLANK_VSYNC_SUSPEND: | |
591 | pr_debug("fb%d: DPMS suspend (vsync off)\n", info->node); | |
592 | svga_wcrt_mask(0x36, 0x20, 0x30); | |
593 | svga_wseq_mask(0x01, 0x20, 0x20); | |
594 | break; | |
595 | case FB_BLANK_POWERDOWN: | |
596 | pr_debug("fb%d: DPMS off (no sync)\n", info->node); | |
597 | svga_wcrt_mask(0x36, 0x30, 0x30); | |
598 | svga_wseq_mask(0x01, 0x20, 0x20); | |
599 | break; | |
600 | } | |
601 | ||
602 | return 0; | |
603 | } | |
604 | ||
605 | ||
606 | static int vt8623fb_pan_display(struct fb_var_screeninfo *var, struct fb_info *info) | |
607 | { | |
608 | unsigned int offset; | |
609 | ||
610 | /* Calculate the offset */ | |
611 | if (var->bits_per_pixel == 0) { | |
612 | offset = (var->yoffset / 16) * var->xres_virtual + var->xoffset; | |
613 | offset = offset >> 3; | |
614 | } else { | |
615 | offset = (var->yoffset * info->fix.line_length) + | |
616 | (var->xoffset * var->bits_per_pixel / 8); | |
617 | offset = offset >> ((var->bits_per_pixel == 4) ? 2 : 1); | |
618 | } | |
619 | ||
620 | /* Set the offset */ | |
621 | svga_wcrt_multi(vt8623_start_address_regs, offset); | |
622 | ||
623 | return 0; | |
624 | } | |
625 | ||
626 | ||
627 | /* ------------------------------------------------------------------------- */ | |
628 | ||
629 | ||
630 | /* Frame buffer operations */ | |
631 | ||
632 | static struct fb_ops vt8623fb_ops = { | |
633 | .owner = THIS_MODULE, | |
634 | .fb_open = vt8623fb_open, | |
635 | .fb_release = vt8623fb_release, | |
636 | .fb_check_var = vt8623fb_check_var, | |
637 | .fb_set_par = vt8623fb_set_par, | |
638 | .fb_setcolreg = vt8623fb_setcolreg, | |
639 | .fb_blank = vt8623fb_blank, | |
640 | .fb_pan_display = vt8623fb_pan_display, | |
641 | .fb_fillrect = vt8623fb_fillrect, | |
642 | .fb_copyarea = cfb_copyarea, | |
643 | .fb_imageblit = vt8623fb_imageblit, | |
5a87ede9 | 644 | .fb_get_caps = svga_get_caps, |
558b7bd8 OZ |
645 | }; |
646 | ||
647 | ||
648 | /* PCI probe */ | |
649 | ||
650 | static int __devinit vt8623_pci_probe(struct pci_dev *dev, const struct pci_device_id *id) | |
651 | { | |
652 | struct fb_info *info; | |
653 | struct vt8623fb_info *par; | |
654 | unsigned int memsize1, memsize2; | |
655 | int rc; | |
656 | ||
657 | /* Ignore secondary VGA device because there is no VGA arbitration */ | |
658 | if (! svga_primary_device(dev)) { | |
659 | dev_info(&(dev->dev), "ignoring secondary device\n"); | |
660 | return -ENODEV; | |
661 | } | |
662 | ||
663 | /* Allocate and fill driver data structure */ | |
20e061fb | 664 | info = framebuffer_alloc(sizeof(struct vt8623fb_info), &(dev->dev)); |
558b7bd8 OZ |
665 | if (! info) { |
666 | dev_err(&(dev->dev), "cannot allocate memory\n"); | |
667 | return -ENOMEM; | |
668 | } | |
669 | ||
670 | par = info->par; | |
671 | mutex_init(&par->open_lock); | |
672 | ||
673 | info->flags = FBINFO_PARTIAL_PAN_OK | FBINFO_HWACCEL_YPAN; | |
674 | info->fbops = &vt8623fb_ops; | |
675 | ||
676 | /* Prepare PCI device */ | |
677 | ||
678 | rc = pci_enable_device(dev); | |
679 | if (rc < 0) { | |
20e061fb | 680 | dev_err(info->dev, "cannot enable PCI device\n"); |
558b7bd8 OZ |
681 | goto err_enable_device; |
682 | } | |
683 | ||
684 | rc = pci_request_regions(dev, "vt8623fb"); | |
685 | if (rc < 0) { | |
20e061fb | 686 | dev_err(info->dev, "cannot reserve framebuffer region\n"); |
558b7bd8 OZ |
687 | goto err_request_regions; |
688 | } | |
689 | ||
690 | info->fix.smem_start = pci_resource_start(dev, 0); | |
691 | info->fix.smem_len = pci_resource_len(dev, 0); | |
692 | info->fix.mmio_start = pci_resource_start(dev, 1); | |
693 | info->fix.mmio_len = pci_resource_len(dev, 1); | |
694 | ||
695 | /* Map physical IO memory address into kernel space */ | |
696 | info->screen_base = pci_iomap(dev, 0, 0); | |
697 | if (! info->screen_base) { | |
698 | rc = -ENOMEM; | |
20e061fb | 699 | dev_err(info->dev, "iomap for framebuffer failed\n"); |
558b7bd8 OZ |
700 | goto err_iomap_1; |
701 | } | |
702 | ||
703 | par->mmio_base = pci_iomap(dev, 1, 0); | |
704 | if (! par->mmio_base) { | |
705 | rc = -ENOMEM; | |
20e061fb | 706 | dev_err(info->dev, "iomap for MMIO failed\n"); |
558b7bd8 OZ |
707 | goto err_iomap_2; |
708 | } | |
709 | ||
710 | /* Find how many physical memory there is on card */ | |
711 | memsize1 = (vga_rseq(NULL, 0x34) + 1) >> 1; | |
712 | memsize2 = vga_rseq(NULL, 0x39) << 2; | |
713 | ||
714 | if ((16 <= memsize1) && (memsize1 <= 64) && (memsize1 == memsize2)) | |
715 | info->screen_size = memsize1 << 20; | |
716 | else { | |
20e061fb | 717 | dev_err(info->dev, "memory size detection failed (%x %x), suppose 16 MB\n", memsize1, memsize2); |
558b7bd8 OZ |
718 | info->screen_size = 16 << 20; |
719 | } | |
720 | ||
721 | info->fix.smem_len = info->screen_size; | |
722 | strcpy(info->fix.id, "VIA VT8623"); | |
723 | info->fix.type = FB_TYPE_PACKED_PIXELS; | |
724 | info->fix.visual = FB_VISUAL_PSEUDOCOLOR; | |
725 | info->fix.ypanstep = 0; | |
726 | info->fix.accel = FB_ACCEL_NONE; | |
727 | info->pseudo_palette = (void*)par->pseudo_palette; | |
728 | ||
729 | /* Prepare startup mode */ | |
730 | ||
cc6c549c | 731 | rc = fb_find_mode(&(info->var), info, mode_option, NULL, 0, NULL, 8); |
558b7bd8 OZ |
732 | if (! ((rc == 1) || (rc == 2))) { |
733 | rc = -EINVAL; | |
20e061fb | 734 | dev_err(info->dev, "mode %s not found\n", mode_option); |
558b7bd8 OZ |
735 | goto err_find_mode; |
736 | } | |
737 | ||
738 | rc = fb_alloc_cmap(&info->cmap, 256, 0); | |
739 | if (rc < 0) { | |
20e061fb | 740 | dev_err(info->dev, "cannot allocate colormap\n"); |
558b7bd8 OZ |
741 | goto err_alloc_cmap; |
742 | } | |
743 | ||
744 | rc = register_framebuffer(info); | |
745 | if (rc < 0) { | |
20e061fb | 746 | dev_err(info->dev, "cannot register framebugger\n"); |
558b7bd8 OZ |
747 | goto err_reg_fb; |
748 | } | |
749 | ||
750 | printk(KERN_INFO "fb%d: %s on %s, %d MB RAM\n", info->node, info->fix.id, | |
751 | pci_name(dev), info->fix.smem_len >> 20); | |
752 | ||
753 | /* Record a reference to the driver data */ | |
754 | pci_set_drvdata(dev, info); | |
755 | ||
756 | #ifdef CONFIG_MTRR | |
757 | if (mtrr) { | |
758 | par->mtrr_reg = -1; | |
759 | par->mtrr_reg = mtrr_add(info->fix.smem_start, info->fix.smem_len, MTRR_TYPE_WRCOMB, 1); | |
760 | } | |
761 | #endif | |
762 | ||
763 | return 0; | |
764 | ||
765 | /* Error handling */ | |
766 | err_reg_fb: | |
767 | fb_dealloc_cmap(&info->cmap); | |
768 | err_alloc_cmap: | |
769 | err_find_mode: | |
770 | pci_iounmap(dev, par->mmio_base); | |
771 | err_iomap_2: | |
772 | pci_iounmap(dev, info->screen_base); | |
773 | err_iomap_1: | |
774 | pci_release_regions(dev); | |
775 | err_request_regions: | |
776 | /* pci_disable_device(dev); */ | |
777 | err_enable_device: | |
778 | framebuffer_release(info); | |
779 | return rc; | |
780 | } | |
781 | ||
782 | /* PCI remove */ | |
783 | ||
784 | static void __devexit vt8623_pci_remove(struct pci_dev *dev) | |
785 | { | |
786 | struct fb_info *info = pci_get_drvdata(dev); | |
558b7bd8 OZ |
787 | |
788 | if (info) { | |
38d473f9 OZ |
789 | struct vt8623fb_info *par = info->par; |
790 | ||
558b7bd8 OZ |
791 | #ifdef CONFIG_MTRR |
792 | if (par->mtrr_reg >= 0) { | |
793 | mtrr_del(par->mtrr_reg, 0, 0); | |
794 | par->mtrr_reg = -1; | |
795 | } | |
796 | #endif | |
797 | ||
798 | unregister_framebuffer(info); | |
799 | fb_dealloc_cmap(&info->cmap); | |
800 | ||
801 | pci_iounmap(dev, info->screen_base); | |
802 | pci_iounmap(dev, par->mmio_base); | |
803 | pci_release_regions(dev); | |
804 | /* pci_disable_device(dev); */ | |
805 | ||
806 | pci_set_drvdata(dev, NULL); | |
807 | framebuffer_release(info); | |
808 | } | |
809 | } | |
810 | ||
811 | ||
812 | #ifdef CONFIG_PM | |
813 | /* PCI suspend */ | |
814 | ||
815 | static int vt8623_pci_suspend(struct pci_dev* dev, pm_message_t state) | |
816 | { | |
817 | struct fb_info *info = pci_get_drvdata(dev); | |
818 | struct vt8623fb_info *par = info->par; | |
819 | ||
20e061fb | 820 | dev_info(info->dev, "suspend\n"); |
558b7bd8 OZ |
821 | |
822 | acquire_console_sem(); | |
823 | mutex_lock(&(par->open_lock)); | |
824 | ||
825 | if ((state.event == PM_EVENT_FREEZE) || (par->ref_count == 0)) { | |
826 | mutex_unlock(&(par->open_lock)); | |
827 | release_console_sem(); | |
828 | return 0; | |
829 | } | |
830 | ||
831 | fb_set_suspend(info, 1); | |
832 | ||
833 | pci_save_state(dev); | |
834 | pci_disable_device(dev); | |
835 | pci_set_power_state(dev, pci_choose_state(dev, state)); | |
836 | ||
837 | mutex_unlock(&(par->open_lock)); | |
838 | release_console_sem(); | |
839 | ||
840 | return 0; | |
841 | } | |
842 | ||
843 | ||
844 | /* PCI resume */ | |
845 | ||
846 | static int vt8623_pci_resume(struct pci_dev* dev) | |
847 | { | |
848 | struct fb_info *info = pci_get_drvdata(dev); | |
849 | struct vt8623fb_info *par = info->par; | |
850 | ||
20e061fb | 851 | dev_info(info->dev, "resume\n"); |
558b7bd8 OZ |
852 | |
853 | acquire_console_sem(); | |
854 | mutex_lock(&(par->open_lock)); | |
855 | ||
856 | if (par->ref_count == 0) { | |
857 | mutex_unlock(&(par->open_lock)); | |
858 | release_console_sem(); | |
859 | return 0; | |
860 | } | |
861 | ||
862 | pci_set_power_state(dev, PCI_D0); | |
863 | pci_restore_state(dev); | |
864 | ||
865 | if (pci_enable_device(dev)) | |
866 | goto fail; | |
867 | ||
868 | pci_set_master(dev); | |
869 | ||
870 | vt8623fb_set_par(info); | |
871 | fb_set_suspend(info, 0); | |
872 | ||
873 | mutex_unlock(&(par->open_lock)); | |
874 | fail: | |
875 | release_console_sem(); | |
876 | ||
877 | return 0; | |
878 | } | |
879 | #else | |
880 | #define vt8623_pci_suspend NULL | |
881 | #define vt8623_pci_resume NULL | |
882 | #endif /* CONFIG_PM */ | |
883 | ||
884 | /* List of boards that we are trying to support */ | |
885 | ||
886 | static struct pci_device_id vt8623_devices[] __devinitdata = { | |
887 | {PCI_DEVICE(PCI_VENDOR_ID_VIA, 0x3122)}, | |
888 | {0, 0, 0, 0, 0, 0, 0} | |
889 | }; | |
890 | ||
891 | MODULE_DEVICE_TABLE(pci, vt8623_devices); | |
892 | ||
893 | static struct pci_driver vt8623fb_pci_driver = { | |
894 | .name = "vt8623fb", | |
895 | .id_table = vt8623_devices, | |
896 | .probe = vt8623_pci_probe, | |
897 | .remove = __devexit_p(vt8623_pci_remove), | |
898 | .suspend = vt8623_pci_suspend, | |
899 | .resume = vt8623_pci_resume, | |
900 | }; | |
901 | ||
902 | /* Cleanup */ | |
903 | ||
904 | static void __exit vt8623fb_cleanup(void) | |
905 | { | |
906 | pr_debug("vt8623fb: cleaning up\n"); | |
907 | pci_unregister_driver(&vt8623fb_pci_driver); | |
908 | } | |
909 | ||
910 | /* Driver Initialisation */ | |
911 | ||
3552f09a | 912 | static int __init vt8623fb_init(void) |
558b7bd8 OZ |
913 | { |
914 | ||
915 | #ifndef MODULE | |
916 | char *option = NULL; | |
917 | ||
918 | if (fb_get_options("vt8623fb", &option)) | |
919 | return -ENODEV; | |
920 | ||
921 | if (option && *option) | |
cc6c549c | 922 | mode_option = option; |
558b7bd8 OZ |
923 | #endif |
924 | ||
925 | pr_debug("vt8623fb: initializing\n"); | |
926 | return pci_register_driver(&vt8623fb_pci_driver); | |
927 | } | |
928 | ||
929 | /* ------------------------------------------------------------------------- */ | |
930 | ||
931 | /* Modularization */ | |
932 | ||
933 | module_init(vt8623fb_init); | |
934 | module_exit(vt8623fb_cleanup); |