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baf12ae2 EP |
1 | /** |
2 | * ds2482.c - provides i2c to w1-master bridge(s) | |
3 | * Copyright (C) 2005 Ben Gardner <bgardner@wabtec.com> | |
4 | * | |
5 | * The DS2482 is a sensor chip made by Dallas Semiconductor (Maxim). | |
6 | * It is a I2C to 1-wire bridge. | |
7 | * There are two variations: -100 and -800, which have 1 or 8 1-wire ports. | |
8 | * The complete datasheet can be obtained from MAXIM's website at: | |
9 | * http://www.maxim-ic.com/quick_view2.cfm/qv_pk/4382 | |
10 | * | |
11 | * This program is free software; you can redistribute it and/or modify | |
12 | * it under the terms of the GNU General Public License as published by | |
13 | * the Free Software Foundation; version 2 of the License. | |
14 | */ | |
15 | ||
16 | #include <linux/module.h> | |
17 | #include <linux/init.h> | |
18 | #include <linux/slab.h> | |
19 | #include <linux/i2c.h> | |
20 | #include <linux/delay.h> | |
21 | #include <asm/delay.h> | |
22 | ||
23 | #include "../w1.h" | |
24 | #include "../w1_int.h" | |
25 | ||
baf12ae2 EP |
26 | /** |
27 | * The DS2482 registers - there are 3 registers that are addressed by a read | |
28 | * pointer. The read pointer is set by the last command executed. | |
29 | * | |
30 | * To read the data, issue a register read for any address | |
31 | */ | |
32 | #define DS2482_CMD_RESET 0xF0 /* No param */ | |
33 | #define DS2482_CMD_SET_READ_PTR 0xE1 /* Param: DS2482_PTR_CODE_xxx */ | |
34 | #define DS2482_CMD_CHANNEL_SELECT 0xC3 /* Param: Channel byte - DS2482-800 only */ | |
35 | #define DS2482_CMD_WRITE_CONFIG 0xD2 /* Param: Config byte */ | |
36 | #define DS2482_CMD_1WIRE_RESET 0xB4 /* Param: None */ | |
37 | #define DS2482_CMD_1WIRE_SINGLE_BIT 0x87 /* Param: Bit byte (bit7) */ | |
38 | #define DS2482_CMD_1WIRE_WRITE_BYTE 0xA5 /* Param: Data byte */ | |
39 | #define DS2482_CMD_1WIRE_READ_BYTE 0x96 /* Param: None */ | |
40 | /* Note to read the byte, Set the ReadPtr to Data then read (any addr) */ | |
41 | #define DS2482_CMD_1WIRE_TRIPLET 0x78 /* Param: Dir byte (bit7) */ | |
42 | ||
43 | /* Values for DS2482_CMD_SET_READ_PTR */ | |
44 | #define DS2482_PTR_CODE_STATUS 0xF0 | |
45 | #define DS2482_PTR_CODE_DATA 0xE1 | |
46 | #define DS2482_PTR_CODE_CHANNEL 0xD2 /* DS2482-800 only */ | |
47 | #define DS2482_PTR_CODE_CONFIG 0xC3 | |
48 | ||
49 | /** | |
50 | * Configure Register bit definitions | |
51 | * The top 4 bits always read 0. | |
52 | * To write, the top nibble must be the 1's compl. of the low nibble. | |
53 | */ | |
9c95bb6f MA |
54 | #define DS2482_REG_CFG_1WS 0x08 /* 1-wire speed */ |
55 | #define DS2482_REG_CFG_SPU 0x04 /* strong pull-up */ | |
56 | #define DS2482_REG_CFG_PPM 0x02 /* presence pulse masking */ | |
57 | #define DS2482_REG_CFG_APU 0x01 /* active pull-up */ | |
baf12ae2 EP |
58 | |
59 | ||
60 | /** | |
61 | * Write and verify codes for the CHANNEL_SELECT command (DS2482-800 only). | |
62 | * To set the channel, write the value at the index of the channel. | |
63 | * Read and compare against the corresponding value to verify the change. | |
64 | */ | |
65 | static const u8 ds2482_chan_wr[8] = | |
66 | { 0xF0, 0xE1, 0xD2, 0xC3, 0xB4, 0xA5, 0x96, 0x87 }; | |
67 | static const u8 ds2482_chan_rd[8] = | |
68 | { 0xB8, 0xB1, 0xAA, 0xA3, 0x9C, 0x95, 0x8E, 0x87 }; | |
69 | ||
70 | ||
71 | /** | |
72 | * Status Register bit definitions (read only) | |
73 | */ | |
74 | #define DS2482_REG_STS_DIR 0x80 | |
75 | #define DS2482_REG_STS_TSB 0x40 | |
76 | #define DS2482_REG_STS_SBR 0x20 | |
77 | #define DS2482_REG_STS_RST 0x10 | |
78 | #define DS2482_REG_STS_LL 0x08 | |
79 | #define DS2482_REG_STS_SD 0x04 | |
80 | #define DS2482_REG_STS_PPD 0x02 | |
81 | #define DS2482_REG_STS_1WB 0x01 | |
82 | ||
83 | ||
61c91f7d JD |
84 | static int ds2482_probe(struct i2c_client *client, |
85 | const struct i2c_device_id *id); | |
61c91f7d | 86 | static int ds2482_remove(struct i2c_client *client); |
baf12ae2 EP |
87 | |
88 | ||
89 | /** | |
90 | * Driver data (common to all clients) | |
91 | */ | |
61c91f7d JD |
92 | static const struct i2c_device_id ds2482_id[] = { |
93 | { "ds2482", 0 }, | |
94 | { } | |
95 | }; | |
0dcacd76 | 96 | MODULE_DEVICE_TABLE(i2c, ds2482_id); |
61c91f7d | 97 | |
baf12ae2 EP |
98 | static struct i2c_driver ds2482_driver = { |
99 | .driver = { | |
100 | .owner = THIS_MODULE, | |
101 | .name = "ds2482", | |
102 | }, | |
61c91f7d JD |
103 | .probe = ds2482_probe, |
104 | .remove = ds2482_remove, | |
105 | .id_table = ds2482_id, | |
baf12ae2 EP |
106 | }; |
107 | ||
108 | /* | |
109 | * Client data (each client gets its own) | |
110 | */ | |
111 | ||
112 | struct ds2482_data; | |
113 | ||
114 | struct ds2482_w1_chan { | |
115 | struct ds2482_data *pdev; | |
116 | u8 channel; | |
117 | struct w1_bus_master w1_bm; | |
118 | }; | |
119 | ||
120 | struct ds2482_data { | |
61c91f7d | 121 | struct i2c_client *client; |
abd52a13 | 122 | struct mutex access_lock; |
baf12ae2 EP |
123 | |
124 | /* 1-wire interface(s) */ | |
125 | int w1_count; /* 1 or 8 */ | |
126 | struct ds2482_w1_chan w1_ch[8]; | |
127 | ||
128 | /* per-device values */ | |
129 | u8 channel; | |
130 | u8 read_prt; /* see DS2482_PTR_CODE_xxx */ | |
131 | u8 reg_config; | |
132 | }; | |
133 | ||
134 | ||
9c95bb6f MA |
135 | /** |
136 | * Helper to calculate values for configuration register | |
137 | * @param conf the raw config value | |
138 | * @return the value w/ complements that can be written to register | |
139 | */ | |
140 | static inline u8 ds2482_calculate_config(u8 conf) | |
141 | { | |
142 | return conf | ((~conf & 0x0f) << 4); | |
143 | } | |
144 | ||
145 | ||
baf12ae2 EP |
146 | /** |
147 | * Sets the read pointer. | |
148 | * @param pdev The ds2482 client pointer | |
149 | * @param read_ptr see DS2482_PTR_CODE_xxx above | |
150 | * @return -1 on failure, 0 on success | |
151 | */ | |
152 | static inline int ds2482_select_register(struct ds2482_data *pdev, u8 read_ptr) | |
153 | { | |
154 | if (pdev->read_prt != read_ptr) { | |
61c91f7d | 155 | if (i2c_smbus_write_byte_data(pdev->client, |
baf12ae2 EP |
156 | DS2482_CMD_SET_READ_PTR, |
157 | read_ptr) < 0) | |
158 | return -1; | |
159 | ||
160 | pdev->read_prt = read_ptr; | |
161 | } | |
162 | return 0; | |
163 | } | |
164 | ||
165 | /** | |
166 | * Sends a command without a parameter | |
167 | * @param pdev The ds2482 client pointer | |
168 | * @param cmd DS2482_CMD_RESET, | |
169 | * DS2482_CMD_1WIRE_RESET, | |
170 | * DS2482_CMD_1WIRE_READ_BYTE | |
171 | * @return -1 on failure, 0 on success | |
172 | */ | |
173 | static inline int ds2482_send_cmd(struct ds2482_data *pdev, u8 cmd) | |
174 | { | |
61c91f7d | 175 | if (i2c_smbus_write_byte(pdev->client, cmd) < 0) |
baf12ae2 EP |
176 | return -1; |
177 | ||
178 | pdev->read_prt = DS2482_PTR_CODE_STATUS; | |
179 | return 0; | |
180 | } | |
181 | ||
182 | /** | |
183 | * Sends a command with a parameter | |
184 | * @param pdev The ds2482 client pointer | |
185 | * @param cmd DS2482_CMD_WRITE_CONFIG, | |
186 | * DS2482_CMD_1WIRE_SINGLE_BIT, | |
187 | * DS2482_CMD_1WIRE_WRITE_BYTE, | |
188 | * DS2482_CMD_1WIRE_TRIPLET | |
189 | * @param byte The data to send | |
190 | * @return -1 on failure, 0 on success | |
191 | */ | |
192 | static inline int ds2482_send_cmd_data(struct ds2482_data *pdev, | |
193 | u8 cmd, u8 byte) | |
194 | { | |
61c91f7d | 195 | if (i2c_smbus_write_byte_data(pdev->client, cmd, byte) < 0) |
baf12ae2 EP |
196 | return -1; |
197 | ||
198 | /* all cmds leave in STATUS, except CONFIG */ | |
199 | pdev->read_prt = (cmd != DS2482_CMD_WRITE_CONFIG) ? | |
200 | DS2482_PTR_CODE_STATUS : DS2482_PTR_CODE_CONFIG; | |
201 | return 0; | |
202 | } | |
203 | ||
204 | ||
205 | /* | |
206 | * 1-Wire interface code | |
207 | */ | |
208 | ||
209 | #define DS2482_WAIT_IDLE_TIMEOUT 100 | |
210 | ||
211 | /** | |
212 | * Waits until the 1-wire interface is idle (not busy) | |
213 | * | |
214 | * @param pdev Pointer to the device structure | |
215 | * @return the last value read from status or -1 (failure) | |
216 | */ | |
217 | static int ds2482_wait_1wire_idle(struct ds2482_data *pdev) | |
218 | { | |
219 | int temp = -1; | |
220 | int retries = 0; | |
221 | ||
222 | if (!ds2482_select_register(pdev, DS2482_PTR_CODE_STATUS)) { | |
223 | do { | |
61c91f7d | 224 | temp = i2c_smbus_read_byte(pdev->client); |
baf12ae2 | 225 | } while ((temp >= 0) && (temp & DS2482_REG_STS_1WB) && |
b4786f18 | 226 | (++retries < DS2482_WAIT_IDLE_TIMEOUT)); |
baf12ae2 EP |
227 | } |
228 | ||
67860739 | 229 | if (retries >= DS2482_WAIT_IDLE_TIMEOUT) |
1fda5690 | 230 | pr_err("%s: timeout on channel %d\n", |
baf12ae2 EP |
231 | __func__, pdev->channel); |
232 | ||
233 | return temp; | |
234 | } | |
235 | ||
236 | /** | |
237 | * Selects a w1 channel. | |
238 | * The 1-wire interface must be idle before calling this function. | |
239 | * | |
240 | * @param pdev The ds2482 client pointer | |
241 | * @param channel 0-7 | |
242 | * @return -1 (failure) or 0 (success) | |
243 | */ | |
244 | static int ds2482_set_channel(struct ds2482_data *pdev, u8 channel) | |
245 | { | |
61c91f7d | 246 | if (i2c_smbus_write_byte_data(pdev->client, DS2482_CMD_CHANNEL_SELECT, |
baf12ae2 EP |
247 | ds2482_chan_wr[channel]) < 0) |
248 | return -1; | |
249 | ||
250 | pdev->read_prt = DS2482_PTR_CODE_CHANNEL; | |
251 | pdev->channel = -1; | |
61c91f7d | 252 | if (i2c_smbus_read_byte(pdev->client) == ds2482_chan_rd[channel]) { |
baf12ae2 EP |
253 | pdev->channel = channel; |
254 | return 0; | |
255 | } | |
256 | return -1; | |
257 | } | |
258 | ||
259 | ||
260 | /** | |
261 | * Performs the touch-bit function, which writes a 0 or 1 and reads the level. | |
262 | * | |
263 | * @param data The ds2482 channel pointer | |
264 | * @param bit The level to write: 0 or non-zero | |
265 | * @return The level read: 0 or 1 | |
266 | */ | |
267 | static u8 ds2482_w1_touch_bit(void *data, u8 bit) | |
268 | { | |
269 | struct ds2482_w1_chan *pchan = data; | |
270 | struct ds2482_data *pdev = pchan->pdev; | |
271 | int status = -1; | |
272 | ||
abd52a13 | 273 | mutex_lock(&pdev->access_lock); |
baf12ae2 EP |
274 | |
275 | /* Select the channel */ | |
276 | ds2482_wait_1wire_idle(pdev); | |
277 | if (pdev->w1_count > 1) | |
278 | ds2482_set_channel(pdev, pchan->channel); | |
279 | ||
280 | /* Send the touch command, wait until 1WB == 0, return the status */ | |
281 | if (!ds2482_send_cmd_data(pdev, DS2482_CMD_1WIRE_SINGLE_BIT, | |
282 | bit ? 0xFF : 0)) | |
283 | status = ds2482_wait_1wire_idle(pdev); | |
284 | ||
abd52a13 | 285 | mutex_unlock(&pdev->access_lock); |
baf12ae2 EP |
286 | |
287 | return (status & DS2482_REG_STS_SBR) ? 1 : 0; | |
288 | } | |
289 | ||
290 | /** | |
291 | * Performs the triplet function, which reads two bits and writes a bit. | |
292 | * The bit written is determined by the two reads: | |
293 | * 00 => dbit, 01 => 0, 10 => 1 | |
294 | * | |
295 | * @param data The ds2482 channel pointer | |
296 | * @param dbit The direction to choose if both branches are valid | |
297 | * @return b0=read1 b1=read2 b3=bit written | |
298 | */ | |
299 | static u8 ds2482_w1_triplet(void *data, u8 dbit) | |
300 | { | |
301 | struct ds2482_w1_chan *pchan = data; | |
302 | struct ds2482_data *pdev = pchan->pdev; | |
303 | int status = (3 << 5); | |
304 | ||
abd52a13 | 305 | mutex_lock(&pdev->access_lock); |
baf12ae2 EP |
306 | |
307 | /* Select the channel */ | |
308 | ds2482_wait_1wire_idle(pdev); | |
309 | if (pdev->w1_count > 1) | |
310 | ds2482_set_channel(pdev, pchan->channel); | |
311 | ||
312 | /* Send the triplet command, wait until 1WB == 0, return the status */ | |
313 | if (!ds2482_send_cmd_data(pdev, DS2482_CMD_1WIRE_TRIPLET, | |
314 | dbit ? 0xFF : 0)) | |
315 | status = ds2482_wait_1wire_idle(pdev); | |
316 | ||
abd52a13 | 317 | mutex_unlock(&pdev->access_lock); |
baf12ae2 EP |
318 | |
319 | /* Decode the status */ | |
320 | return (status >> 5); | |
321 | } | |
322 | ||
323 | /** | |
324 | * Performs the write byte function. | |
325 | * | |
326 | * @param data The ds2482 channel pointer | |
327 | * @param byte The value to write | |
328 | */ | |
329 | static void ds2482_w1_write_byte(void *data, u8 byte) | |
330 | { | |
331 | struct ds2482_w1_chan *pchan = data; | |
332 | struct ds2482_data *pdev = pchan->pdev; | |
333 | ||
abd52a13 | 334 | mutex_lock(&pdev->access_lock); |
baf12ae2 EP |
335 | |
336 | /* Select the channel */ | |
337 | ds2482_wait_1wire_idle(pdev); | |
338 | if (pdev->w1_count > 1) | |
339 | ds2482_set_channel(pdev, pchan->channel); | |
340 | ||
341 | /* Send the write byte command */ | |
342 | ds2482_send_cmd_data(pdev, DS2482_CMD_1WIRE_WRITE_BYTE, byte); | |
343 | ||
abd52a13 | 344 | mutex_unlock(&pdev->access_lock); |
baf12ae2 EP |
345 | } |
346 | ||
347 | /** | |
348 | * Performs the read byte function. | |
349 | * | |
350 | * @param data The ds2482 channel pointer | |
351 | * @return The value read | |
352 | */ | |
353 | static u8 ds2482_w1_read_byte(void *data) | |
354 | { | |
355 | struct ds2482_w1_chan *pchan = data; | |
356 | struct ds2482_data *pdev = pchan->pdev; | |
357 | int result; | |
358 | ||
abd52a13 | 359 | mutex_lock(&pdev->access_lock); |
baf12ae2 EP |
360 | |
361 | /* Select the channel */ | |
362 | ds2482_wait_1wire_idle(pdev); | |
363 | if (pdev->w1_count > 1) | |
364 | ds2482_set_channel(pdev, pchan->channel); | |
365 | ||
366 | /* Send the read byte command */ | |
367 | ds2482_send_cmd(pdev, DS2482_CMD_1WIRE_READ_BYTE); | |
368 | ||
369 | /* Wait until 1WB == 0 */ | |
370 | ds2482_wait_1wire_idle(pdev); | |
371 | ||
372 | /* Select the data register */ | |
373 | ds2482_select_register(pdev, DS2482_PTR_CODE_DATA); | |
374 | ||
375 | /* Read the data byte */ | |
61c91f7d | 376 | result = i2c_smbus_read_byte(pdev->client); |
baf12ae2 | 377 | |
abd52a13 | 378 | mutex_unlock(&pdev->access_lock); |
baf12ae2 EP |
379 | |
380 | return result; | |
381 | } | |
382 | ||
383 | ||
384 | /** | |
385 | * Sends a reset on the 1-wire interface | |
386 | * | |
387 | * @param data The ds2482 channel pointer | |
388 | * @return 0=Device present, 1=No device present or error | |
389 | */ | |
390 | static u8 ds2482_w1_reset_bus(void *data) | |
391 | { | |
392 | struct ds2482_w1_chan *pchan = data; | |
393 | struct ds2482_data *pdev = pchan->pdev; | |
394 | int err; | |
395 | u8 retval = 1; | |
396 | ||
abd52a13 | 397 | mutex_lock(&pdev->access_lock); |
baf12ae2 EP |
398 | |
399 | /* Select the channel */ | |
400 | ds2482_wait_1wire_idle(pdev); | |
401 | if (pdev->w1_count > 1) | |
402 | ds2482_set_channel(pdev, pchan->channel); | |
403 | ||
404 | /* Send the reset command */ | |
405 | err = ds2482_send_cmd(pdev, DS2482_CMD_1WIRE_RESET); | |
406 | if (err >= 0) { | |
407 | /* Wait until the reset is complete */ | |
408 | err = ds2482_wait_1wire_idle(pdev); | |
409 | retval = !(err & DS2482_REG_STS_PPD); | |
410 | ||
411 | /* If the chip did reset since detect, re-config it */ | |
412 | if (err & DS2482_REG_STS_RST) | |
413 | ds2482_send_cmd_data(pdev, DS2482_CMD_WRITE_CONFIG, | |
9c95bb6f | 414 | ds2482_calculate_config(0x00)); |
baf12ae2 EP |
415 | } |
416 | ||
abd52a13 | 417 | mutex_unlock(&pdev->access_lock); |
baf12ae2 EP |
418 | |
419 | return retval; | |
420 | } | |
421 | ||
9c95bb6f MA |
422 | static u8 ds2482_w1_set_pullup(void *data, int delay) |
423 | { | |
424 | struct ds2482_w1_chan *pchan = data; | |
425 | struct ds2482_data *pdev = pchan->pdev; | |
426 | u8 retval = 1; | |
427 | ||
428 | /* if delay is non-zero activate the pullup, | |
429 | * the strong pullup will be automatically deactivated | |
430 | * by the master, so do not explicitly deactive it | |
431 | */ | |
432 | if (delay) { | |
433 | /* both waits are crucial, otherwise devices might not be | |
434 | * powered long enough, causing e.g. a w1_therm sensor to | |
435 | * provide wrong conversion results | |
436 | */ | |
437 | ds2482_wait_1wire_idle(pdev); | |
438 | /* note: it seems like both SPU and APU have to be set! */ | |
439 | retval = ds2482_send_cmd_data(pdev, DS2482_CMD_WRITE_CONFIG, | |
440 | ds2482_calculate_config(DS2482_REG_CFG_SPU | | |
441 | DS2482_REG_CFG_APU)); | |
442 | ds2482_wait_1wire_idle(pdev); | |
443 | } | |
444 | ||
445 | return retval; | |
446 | } | |
447 | ||
baf12ae2 | 448 | |
61c91f7d JD |
449 | static int ds2482_probe(struct i2c_client *client, |
450 | const struct i2c_device_id *id) | |
baf12ae2 EP |
451 | { |
452 | struct ds2482_data *data; | |
61c91f7d | 453 | int err = -ENODEV; |
baf12ae2 EP |
454 | int temp1; |
455 | int idx; | |
456 | ||
0314b020 JD |
457 | if (!i2c_check_functionality(client->adapter, |
458 | I2C_FUNC_SMBUS_WRITE_BYTE_DATA | | |
459 | I2C_FUNC_SMBUS_BYTE)) | |
460 | return -ENODEV; | |
461 | ||
baf12ae2 EP |
462 | if (!(data = kzalloc(sizeof(struct ds2482_data), GFP_KERNEL))) { |
463 | err = -ENOMEM; | |
464 | goto exit; | |
465 | } | |
466 | ||
61c91f7d JD |
467 | data->client = client; |
468 | i2c_set_clientdata(client, data); | |
baf12ae2 EP |
469 | |
470 | /* Reset the device (sets the read_ptr to status) */ | |
471 | if (ds2482_send_cmd(data, DS2482_CMD_RESET) < 0) { | |
61c91f7d | 472 | dev_warn(&client->dev, "DS2482 reset failed.\n"); |
baf12ae2 EP |
473 | goto exit_free; |
474 | } | |
475 | ||
476 | /* Sleep at least 525ns to allow the reset to complete */ | |
477 | ndelay(525); | |
478 | ||
479 | /* Read the status byte - only reset bit and line should be set */ | |
61c91f7d | 480 | temp1 = i2c_smbus_read_byte(client); |
baf12ae2 | 481 | if (temp1 != (DS2482_REG_STS_LL | DS2482_REG_STS_RST)) { |
61c91f7d JD |
482 | dev_warn(&client->dev, "DS2482 reset status " |
483 | "0x%02X - not a DS2482\n", temp1); | |
baf12ae2 EP |
484 | goto exit_free; |
485 | } | |
486 | ||
487 | /* Detect the 8-port version */ | |
488 | data->w1_count = 1; | |
489 | if (ds2482_set_channel(data, 7) == 0) | |
490 | data->w1_count = 8; | |
491 | ||
492 | /* Set all config items to 0 (off) */ | |
9c95bb6f MA |
493 | ds2482_send_cmd_data(data, DS2482_CMD_WRITE_CONFIG, |
494 | ds2482_calculate_config(0x00)); | |
baf12ae2 | 495 | |
abd52a13 | 496 | mutex_init(&data->access_lock); |
baf12ae2 | 497 | |
baf12ae2 EP |
498 | /* Register 1-wire interface(s) */ |
499 | for (idx = 0; idx < data->w1_count; idx++) { | |
500 | data->w1_ch[idx].pdev = data; | |
501 | data->w1_ch[idx].channel = idx; | |
502 | ||
503 | /* Populate all the w1 bus master stuff */ | |
504 | data->w1_ch[idx].w1_bm.data = &data->w1_ch[idx]; | |
505 | data->w1_ch[idx].w1_bm.read_byte = ds2482_w1_read_byte; | |
506 | data->w1_ch[idx].w1_bm.write_byte = ds2482_w1_write_byte; | |
507 | data->w1_ch[idx].w1_bm.touch_bit = ds2482_w1_touch_bit; | |
508 | data->w1_ch[idx].w1_bm.triplet = ds2482_w1_triplet; | |
509 | data->w1_ch[idx].w1_bm.reset_bus = ds2482_w1_reset_bus; | |
9c95bb6f | 510 | data->w1_ch[idx].w1_bm.set_pullup = ds2482_w1_set_pullup; |
baf12ae2 EP |
511 | |
512 | err = w1_add_master_device(&data->w1_ch[idx].w1_bm); | |
513 | if (err) { | |
514 | data->w1_ch[idx].pdev = NULL; | |
515 | goto exit_w1_remove; | |
516 | } | |
517 | } | |
518 | ||
519 | return 0; | |
520 | ||
521 | exit_w1_remove: | |
baf12ae2 EP |
522 | for (idx = 0; idx < data->w1_count; idx++) { |
523 | if (data->w1_ch[idx].pdev != NULL) | |
524 | w1_remove_master_device(&data->w1_ch[idx].w1_bm); | |
525 | } | |
526 | exit_free: | |
527 | kfree(data); | |
528 | exit: | |
529 | return err; | |
530 | } | |
531 | ||
61c91f7d | 532 | static int ds2482_remove(struct i2c_client *client) |
baf12ae2 EP |
533 | { |
534 | struct ds2482_data *data = i2c_get_clientdata(client); | |
61c91f7d | 535 | int idx; |
baf12ae2 EP |
536 | |
537 | /* Unregister the 1-wire bridge(s) */ | |
538 | for (idx = 0; idx < data->w1_count; idx++) { | |
539 | if (data->w1_ch[idx].pdev != NULL) | |
540 | w1_remove_master_device(&data->w1_ch[idx].w1_bm); | |
541 | } | |
542 | ||
baf12ae2 EP |
543 | /* Free the memory */ |
544 | kfree(data); | |
545 | return 0; | |
546 | } | |
547 | ||
dbfd5ccc | 548 | module_i2c_driver(ds2482_driver); |
baf12ae2 EP |
549 | |
550 | MODULE_AUTHOR("Ben Gardner <bgardner@wabtec.com>"); | |
551 | MODULE_DESCRIPTION("DS2482 driver"); | |
552 | MODULE_LICENSE("GPL"); |