[deliverable/linux.git] / drivers / watchdog / at91sam9_wdt.c

/*
 * Watchdog driver for Atmel AT91SAM9x processors.
 *
 * Copyright (C) 2008 Renaud CERRATO r.cerrato@til-technologies.fr
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License
 * as published by the Free Software Foundation; either version
 * 2 of the License, or (at your option) any later version.
 */

/*
 * The Watchdog Timer Mode Register can be only written to once. If the
 * timeout need to be set from Linux, be sure that the bootstrap or the
 * bootloader doesn't write to this register.
 */

#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt

#include <linux/errno.h>
#include <linux/init.h>
#include <linux/interrupt.h>
#include <linux/io.h>
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/moduleparam.h>
#include <linux/platform_device.h>
#include <linux/reboot.h>
#include <linux/types.h>
#include <linux/watchdog.h>
#include <linux/jiffies.h>
#include <linux/timer.h>
#include <linux/bitops.h>
#include <linux/uaccess.h>
#include <linux/of.h>
#include <linux/of_irq.h>

#include "at91sam9_wdt.h"

#define DRV_NAME "AT91SAM9 Watchdog"

#define wdt_read(wdt, field) \
	readl_relaxed((wdt)->base + (field))
#define wdt_write(wtd, field, val) \
	writel_relaxed((val), (wdt)->base + (field))

/* AT91SAM9 watchdog runs a 12bit counter @ 256Hz,
 * use this to convert a watchdog
 * value from/to milliseconds.
 */
#define ticks_to_hz_rounddown(t)	((((t) + 1) * HZ) >> 8)
#define ticks_to_hz_roundup(t)		(((((t) + 1) * HZ) + 255) >> 8)
#define ticks_to_secs(t)		(((t) + 1) >> 8)
#define secs_to_ticks(s)		((s) ? (((s) << 8) - 1) : 0)

#define WDT_MR_RESET	0x3FFF2FFF

/* Watchdog max counter value in ticks */
#define WDT_COUNTER_MAX_TICKS	0xFFF

/* Watchdog max delta/value in secs */
#define WDT_COUNTER_MAX_SECS	ticks_to_secs(WDT_COUNTER_MAX_TICKS)

/* Hardware timeout in seconds */
#define WDT_HW_TIMEOUT 2

/* Timer heartbeat (500ms) */
#define WDT_TIMEOUT	(HZ/2)

/* User land timeout */
#define WDT_HEARTBEAT 15
static int heartbeat;
module_param(heartbeat, int, 0);
MODULE_PARM_DESC(heartbeat, "Watchdog heartbeats in seconds. "
	"(default = " __MODULE_STRING(WDT_HEARTBEAT) ")");

static bool nowayout = WATCHDOG_NOWAYOUT;
module_param(nowayout, bool, 0);
MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started "
	"(default=" __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");

#define to_wdt(wdd) container_of(wdd, struct at91wdt, wdd)
struct at91wdt {
	struct watchdog_device wdd;
	void __iomem *base;
	unsigned long next_heartbeat;	/* the next_heartbeat for the timer */
	struct timer_list timer;	/* The timer that pings the watchdog */
	u32 mr;
	u32 mr_mask;
	unsigned long heartbeat;	/* WDT heartbeat in jiffies */
	bool nowayout;
	unsigned int irq;
};

/* ......................................................................... */

static irqreturn_t wdt_interrupt(int irq, void *dev_id)
{
	struct at91wdt *wdt = (struct at91wdt *)dev_id;

	if (wdt_read(wdt, AT91_WDT_SR)) {
		pr_crit("at91sam9 WDT software reset\n");
		emergency_restart();
		pr_crit("Reboot didn't ?????\n");
	}

	return IRQ_HANDLED;
}

/*
 * Reload the watchdog timer.  (ie, pat the watchdog)
 */
static inline void at91_wdt_reset(struct at91wdt *wdt)
{
	wdt_write(wdt, AT91_WDT_CR, AT91_WDT_KEY | AT91_WDT_WDRSTT);
}

/*
 * Timer tick
 */
static void at91_ping(unsigned long data)
{
	struct at91wdt *wdt = (struct at91wdt *)data;
	if (time_before(jiffies, wdt->next_heartbeat) ||
	    !watchdog_active(&wdt->wdd)) {
		at91_wdt_reset(wdt);
		mod_timer(&wdt->timer, jiffies + wdt->heartbeat);
	} else {
		pr_crit("I will reset your machine !\n");
	}
}

static int at91_wdt_start(struct watchdog_device *wdd)
{
	struct at91wdt *wdt = to_wdt(wdd);
	/* calculate when the next userspace timeout will be */
	wdt->next_heartbeat = jiffies + wdd->timeout * HZ;
	return 0;
}

static int at91_wdt_stop(struct watchdog_device *wdd)
{
	/* The watchdog timer hardware can not be stopped... */
	return 0;
}

static int at91_wdt_set_timeout(struct watchdog_device *wdd, unsigned int new_timeout)
{
	wdd->timeout = new_timeout;
	return at91_wdt_start(wdd);
}

static int at91_wdt_init(struct platform_device *pdev, struct at91wdt *wdt)
{
	u32 tmp;
	u32 delta;
	u32 value;
	int err;
	u32 mask = wdt->mr_mask;
	unsigned long min_heartbeat = 1;
	unsigned long max_heartbeat;
	struct device *dev = &pdev->dev;

	tmp = wdt_read(wdt, AT91_WDT_MR);
	if ((tmp & mask) != (wdt->mr & mask)) {
		if (tmp == WDT_MR_RESET) {
			wdt_write(wdt, AT91_WDT_MR, wdt->mr);
			tmp = wdt_read(wdt, AT91_WDT_MR);
		}
	}

	if (tmp & AT91_WDT_WDDIS) {
		if (wdt->mr & AT91_WDT_WDDIS)
			return 0;
		dev_err(dev, "watchdog is disabled\n");
		return -EINVAL;
	}

	value = tmp & AT91_WDT_WDV;
	delta = (tmp & AT91_WDT_WDD) >> 16;

	if (delta < value)
		min_heartbeat = ticks_to_hz_roundup(value - delta);

	max_heartbeat = ticks_to_hz_rounddown(value);
	if (!max_heartbeat) {
		dev_err(dev,
			"heartbeat is too small for the system to handle it correctly\n");
		return -EINVAL;
	}

	/*
	 * Try to reset the watchdog counter 4 or 2 times more often than
	 * actually requested, to avoid spurious watchdog reset.
	 * If this is not possible because of the min_heartbeat value, reset
	 * it at the min_heartbeat period.
	 */
	if ((max_heartbeat / 4) >= min_heartbeat)
		wdt->heartbeat = max_heartbeat / 4;
	else if ((max_heartbeat / 2) >= min_heartbeat)
		wdt->heartbeat = max_heartbeat / 2;
	else
		wdt->heartbeat = min_heartbeat;

	if (max_heartbeat < min_heartbeat + 4)
		dev_warn(dev,
			 "min heartbeat and max heartbeat might be too close for the system to handle it correctly\n");

	if ((tmp & AT91_WDT_WDFIEN) && wdt->irq) {
		err = request_irq(wdt->irq, wdt_interrupt,
				  IRQF_SHARED | IRQF_IRQPOLL |
				  IRQF_NO_SUSPEND,
				  pdev->name, wdt);
		if (err)
			return err;
	}

	if ((tmp & wdt->mr_mask) != (wdt->mr & wdt->mr_mask))
		dev_warn(dev,
			 "watchdog already configured differently (mr = %x expecting %x)\n",
			 tmp & wdt->mr_mask, wdt->mr & wdt->mr_mask);

	setup_timer(&wdt->timer, at91_ping, (unsigned long)wdt);

	/*
	 * Use min_heartbeat the first time to avoid spurious watchdog reset:
	 * we don't know for how long the watchdog counter is running, and
	 *  - resetting it right now might trigger a watchdog fault reset
	 *  - waiting for heartbeat time might lead to a watchdog timeout
	 *    reset
	 */
	mod_timer(&wdt->timer, jiffies + min_heartbeat);

	/* Try to set timeout from device tree first */
	if (watchdog_init_timeout(&wdt->wdd, 0, dev))
		watchdog_init_timeout(&wdt->wdd, heartbeat, dev);
	watchdog_set_nowayout(&wdt->wdd, wdt->nowayout);
	err = watchdog_register_device(&wdt->wdd);
	if (err)
		goto out_stop_timer;

	wdt->next_heartbeat = jiffies + wdt->wdd.timeout * HZ;

	return 0;

out_stop_timer:
	del_timer(&wdt->timer);
	return err;
}

/* ......................................................................... */

static const struct watchdog_info at91_wdt_info = {
	.identity	= DRV_NAME,
	.options	= WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING |
						WDIOF_MAGICCLOSE,
};

static const struct watchdog_ops at91_wdt_ops = {
	.owner =	THIS_MODULE,
	.start =	at91_wdt_start,
	.stop =		at91_wdt_stop,
	.set_timeout =	at91_wdt_set_timeout,
};

#if defined(CONFIG_OF)
static int of_at91wdt_init(struct device_node *np, struct at91wdt *wdt)
{
	u32 min = 0;
	u32 max = WDT_COUNTER_MAX_SECS;
	const char *tmp;

	/* Get the interrupts property */
	wdt->irq = irq_of_parse_and_map(np, 0);
	if (!wdt->irq)
		dev_warn(wdt->wdd.parent, "failed to get IRQ from DT\n");

	if (!of_property_read_u32_index(np, "atmel,max-heartbeat-sec", 0,
					&max)) {
		if (!max || max > WDT_COUNTER_MAX_SECS)
			max = WDT_COUNTER_MAX_SECS;

		if (!of_property_read_u32_index(np, "atmel,min-heartbeat-sec",
						0, &min)) {
			if (min >= max)
				min = max - 1;
		}
	}

	min = secs_to_ticks(min);
	max = secs_to_ticks(max);

	wdt->mr_mask = 0x3FFFFFFF;
	wdt->mr = 0;
	if (!of_property_read_string(np, "atmel,watchdog-type", &tmp) &&
	    !strcmp(tmp, "software")) {
		wdt->mr |= AT91_WDT_WDFIEN;
		wdt->mr_mask &= ~AT91_WDT_WDRPROC;
	} else {
		wdt->mr |= AT91_WDT_WDRSTEN;
	}

	if (!of_property_read_string(np, "atmel,reset-type", &tmp) &&
	    !strcmp(tmp, "proc"))
		wdt->mr |= AT91_WDT_WDRPROC;

	if (of_property_read_bool(np, "atmel,disable")) {
		wdt->mr |= AT91_WDT_WDDIS;
		wdt->mr_mask &= AT91_WDT_WDDIS;
	}

	if (of_property_read_bool(np, "atmel,idle-halt"))
		wdt->mr |= AT91_WDT_WDIDLEHLT;

	if (of_property_read_bool(np, "atmel,dbg-halt"))
		wdt->mr |= AT91_WDT_WDDBGHLT;

	wdt->mr |= max | ((max - min) << 16);

	return 0;
}
#else
static inline int of_at91wdt_init(struct device_node *np, struct at91wdt *wdt)
{
	return 0;
}
#endif

static int __init at91wdt_probe(struct platform_device *pdev)
{
	struct resource	*r;
	int err;
	struct at91wdt *wdt;

	wdt = devm_kzalloc(&pdev->dev, sizeof(*wdt), GFP_KERNEL);
	if (!wdt)
		return -ENOMEM;

	wdt->mr = (WDT_HW_TIMEOUT * 256) | AT91_WDT_WDRSTEN | AT91_WDT_WDD |
		  AT91_WDT_WDDBGHLT | AT91_WDT_WDIDLEHLT;
	wdt->mr_mask = 0x3FFFFFFF;
	wdt->nowayout = nowayout;
	wdt->wdd.parent = &pdev->dev;
	wdt->wdd.info = &at91_wdt_info;
	wdt->wdd.ops = &at91_wdt_ops;
	wdt->wdd.timeout = WDT_HEARTBEAT;
	wdt->wdd.min_timeout = 1;
	wdt->wdd.max_timeout = 0xFFFF;

	r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
	wdt->base = devm_ioremap_resource(&pdev->dev, r);
	if (IS_ERR(wdt->base))
		return PTR_ERR(wdt->base);

	if (pdev->dev.of_node) {
		err = of_at91wdt_init(pdev->dev.of_node, wdt);
		if (err)
			return err;
	}

	err = at91_wdt_init(pdev, wdt);
	if (err)
		return err;

	platform_set_drvdata(pdev, wdt);

	pr_info("enabled (heartbeat=%d sec, nowayout=%d)\n",
		wdt->wdd.timeout, wdt->nowayout);

	return 0;
}

static int __exit at91wdt_remove(struct platform_device *pdev)
{
	struct at91wdt *wdt = platform_get_drvdata(pdev);
	watchdog_unregister_device(&wdt->wdd);

	pr_warn("I quit now, hardware will probably reboot!\n");
	del_timer(&wdt->timer);

	return 0;
}

#if defined(CONFIG_OF)
static const struct of_device_id at91_wdt_dt_ids[] = {
	{ .compatible = "atmel,at91sam9260-wdt" },
	{ /* sentinel */ }
};

MODULE_DEVICE_TABLE(of, at91_wdt_dt_ids);
#endif

static struct platform_driver at91wdt_driver = {
	.remove		= __exit_p(at91wdt_remove),
	.driver		= {
		.name	= "at91_wdt",
		.of_match_table = of_match_ptr(at91_wdt_dt_ids),
	},
};

module_platform_driver_probe(at91wdt_driver, at91wdt_probe);

MODULE_AUTHOR("Renaud CERRATO <r.cerrato@til-technologies.fr>");
MODULE_DESCRIPTION("Watchdog driver for Atmel AT91SAM9x processors");
MODULE_LICENSE("GPL");
Commit	Line	Data
e6bb42e3 RC	1	/*
	2	* Watchdog driver for Atmel AT91SAM9x processors.
	3	*
	4	* Copyright (C) 2008 Renaud CERRATO r.cerrato@til-technologies.fr
	5	*
	6	* This program is free software; you can redistribute it and/or
	7	* modify it under the terms of the GNU General Public License
	8	* as published by the Free Software Foundation; either version
	9	* 2 of the License, or (at your option) any later version.
	10	*/
	11
	12	/*
	13	* The Watchdog Timer Mode Register can be only written to once. If the
	14	* timeout need to be set from Linux, be sure that the bootstrap or the
	15	* bootloader doesn't write to this register.
	16	*/
	17
27c766aa JP	18	#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
27c766aa JP	19
e6bb42e3	20	#include <linux/errno.h>
e6bb42e3	21	#include <linux/init.h>
5161b31d	22	#include <linux/interrupt.h>
2af29b78	23	#include <linux/io.h>
e6bb42e3	24	#include <linux/kernel.h>
e6bb42e3 RC	25	#include <linux/module.h>
	26	#include <linux/moduleparam.h>
	27	#include <linux/platform_device.h>
5161b31d	28	#include <linux/reboot.h>
e6bb42e3 RC	29	#include <linux/types.h>
	30	#include <linux/watchdog.h>
	31	#include <linux/jiffies.h>
	32	#include <linux/timer.h>
	33	#include <linux/bitops.h>
	34	#include <linux/uaccess.h>
be49bbae	35	#include <linux/of.h>
5161b31d	36	#include <linux/of_irq.h>
e6bb42e3	37
e7b39145	38	#include "at91sam9_wdt.h"
e6bb42e3 RC	39
	40	#define DRV_NAME "AT91SAM9 Watchdog"
	41
5161b31d	42	#define wdt_read(wdt, field) \
feccebe9	43	readl_relaxed((wdt)->base + (field))
5161b31d	44	#define wdt_write(wtd, field, val) \
feccebe9	45	writel_relaxed((val), (wdt)->base + (field))
c1c30a29	46
e6bb42e3 RC	47	/* AT91SAM9 watchdog runs a 12bit counter @ 256Hz,
	48	* use this to convert a watchdog
	49	* value from/to milliseconds.
	50	*/
5161b31d BB	51	#define ticks_to_hz_rounddown(t) ((((t) + 1) * HZ) >> 8)
	52	#define ticks_to_hz_roundup(t) (((((t) + 1) * HZ) + 255) >> 8)
	53	#define ticks_to_secs(t) (((t) + 1) >> 8)
1444797f	54	#define secs_to_ticks(s) ((s) ? (((s) << 8) - 1) : 0)
5161b31d BB	55
	56	#define WDT_MR_RESET 0x3FFF2FFF
	57
	58	/* Watchdog max counter value in ticks */
	59	#define WDT_COUNTER_MAX_TICKS 0xFFF
	60
	61	/* Watchdog max delta/value in secs */
	62	#define WDT_COUNTER_MAX_SECS ticks_to_secs(WDT_COUNTER_MAX_TICKS)
e6bb42e3 RC	63
	64	/* Hardware timeout in seconds */
	65	#define WDT_HW_TIMEOUT 2
	66
	67	/* Timer heartbeat (500ms) */
	68	#define WDT_TIMEOUT (HZ/2)
	69
	70	/* User land timeout */
	71	#define WDT_HEARTBEAT 15
c1fd5f64	72	static int heartbeat;
e6bb42e3 RC	73	module_param(heartbeat, int, 0);
	74	MODULE_PARM_DESC(heartbeat, "Watchdog heartbeats in seconds. "
	75	"(default = " __MODULE_STRING(WDT_HEARTBEAT) ")");
	76
86a1e189 WVS	77	static bool nowayout = WATCHDOG_NOWAYOUT;
86a1e189 WVS	78	module_param(nowayout, bool, 0);
e6bb42e3 RC	79	MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started "
	80	"(default=" __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
	81
5161b31d BB	82	#define to_wdt(wdd) container_of(wdd, struct at91wdt, wdd)
	83	struct at91wdt {
	84	struct watchdog_device wdd;
c1c30a29	85	void __iomem *base;
e6bb42e3	86	unsigned long next_heartbeat; /* the next_heartbeat for the timer */
e6bb42e3	87	struct timer_list timer; /* The timer that pings the watchdog */
5161b31d BB	88	u32 mr;
	89	u32 mr_mask;
	90	unsigned long heartbeat; /* WDT heartbeat in jiffies */
	91	bool nowayout;
	92	unsigned int irq;
	93	};
e6bb42e3 RC	94
	95	/* ......................................................................... */
	96
5161b31d BB	97	static irqreturn_t wdt_interrupt(int irq, void *dev_id)
	98	{
	99	struct at91wdt wdt = (struct at91wdt )dev_id;
	100
	101	if (wdt_read(wdt, AT91_WDT_SR)) {
	102	pr_crit("at91sam9 WDT software reset\n");
	103	emergency_restart();
	104	pr_crit("Reboot didn't ?????\n");
	105	}
	106
	107	return IRQ_HANDLED;
	108	}
	109
e6bb42e3 RC	110	/*
	111	* Reload the watchdog timer. (ie, pat the watchdog)
	112	*/
5161b31d	113	static inline void at91_wdt_reset(struct at91wdt *wdt)
e6bb42e3	114	{
5161b31d	115	wdt_write(wdt, AT91_WDT_CR, AT91_WDT_KEY \| AT91_WDT_WDRSTT);
e6bb42e3 RC	116	}
	117
	118	/*
	119	* Timer tick
	120	*/
	121	static void at91_ping(unsigned long data)
	122	{
5161b31d BB	123	struct at91wdt wdt = (struct at91wdt )data;
	124	if (time_before(jiffies, wdt->next_heartbeat) \|\|
	125	!watchdog_active(&wdt->wdd)) {
	126	at91_wdt_reset(wdt);
	127	mod_timer(&wdt->timer, jiffies + wdt->heartbeat);
	128	} else {
27c766aa	129	pr_crit("I will reset your machine !\n");
5161b31d	130	}
490ac7af	131	}
e6bb42e3	132
490ac7af WY	133	static int at91_wdt_start(struct watchdog_device *wdd)
490ac7af WY	134	{
5161b31d BB	135	struct at91wdt *wdt = to_wdt(wdd);
	136	/* calculate when the next userspace timeout will be */
	137	wdt->next_heartbeat = jiffies + wdd->timeout * HZ;
490ac7af	138	return 0;
e6bb42e3 RC	139	}
e6bb42e3 RC	140
490ac7af	141	static int at91_wdt_stop(struct watchdog_device *wdd)
e6bb42e3	142	{
490ac7af WY	143	/* The watchdog timer hardware can not be stopped... */
	144	return 0;
	145	}
e6bb42e3	146
490ac7af WY	147	static int at91_wdt_set_timeout(struct watchdog_device *wdd, unsigned int new_timeout)
	148	{
	149	wdd->timeout = new_timeout;
5161b31d	150	return at91_wdt_start(wdd);
e6bb42e3 RC	151	}
e6bb42e3 RC	152
5161b31d	153	static int at91_wdt_init(struct platform_device pdev, struct at91wdt wdt)
e6bb42e3	154	{
5161b31d BB	155	u32 tmp;
	156	u32 delta;
	157	u32 value;
	158	int err;
	159	u32 mask = wdt->mr_mask;
	160	unsigned long min_heartbeat = 1;
f72fa00f	161	unsigned long max_heartbeat;
5161b31d BB	162	struct device *dev = &pdev->dev;
	163
	164	tmp = wdt_read(wdt, AT91_WDT_MR);
	165	if ((tmp & mask) != (wdt->mr & mask)) {
	166	if (tmp == WDT_MR_RESET) {
	167	wdt_write(wdt, AT91_WDT_MR, wdt->mr);
	168	tmp = wdt_read(wdt, AT91_WDT_MR);
	169	}
	170	}
	171
	172	if (tmp & AT91_WDT_WDDIS) {
	173	if (wdt->mr & AT91_WDT_WDDIS)
	174	return 0;
	175	dev_err(dev, "watchdog is disabled\n");
	176	return -EINVAL;
	177	}
	178
	179	value = tmp & AT91_WDT_WDV;
	180	delta = (tmp & AT91_WDT_WDD) >> 16;
	181
	182	if (delta < value)
	183	min_heartbeat = ticks_to_hz_roundup(value - delta);
	184
f72fa00f BB	185	max_heartbeat = ticks_to_hz_rounddown(value);
f72fa00f BB	186	if (!max_heartbeat) {
5161b31d BB	187	dev_err(dev,
	188	"heartbeat is too small for the system to handle it correctly\n");
	189	return -EINVAL;
	190	}
	191
f72fa00f BB	192	/*
	193	* Try to reset the watchdog counter 4 or 2 times more often than
	194	* actually requested, to avoid spurious watchdog reset.
	195	* If this is not possible because of the min_heartbeat value, reset
	196	* it at the min_heartbeat period.
	197	*/
	198	if ((max_heartbeat / 4) >= min_heartbeat)
	199	wdt->heartbeat = max_heartbeat / 4;
	200	else if ((max_heartbeat / 2) >= min_heartbeat)
	201	wdt->heartbeat = max_heartbeat / 2;
	202	else
5161b31d	203	wdt->heartbeat = min_heartbeat;
f72fa00f BB	204
f72fa00f BB	205	if (max_heartbeat < min_heartbeat + 4)
5161b31d BB	206	dev_warn(dev,
5161b31d BB	207	"min heartbeat and max heartbeat might be too close for the system to handle it correctly\n");
e6bb42e3	208
5161b31d BB	209	if ((tmp & AT91_WDT_WDFIEN) && wdt->irq) {
5161b31d BB	210	err = request_irq(wdt->irq, wdt_interrupt,
d677772e BB	211	IRQF_SHARED \| IRQF_IRQPOLL \|
d677772e BB	212	IRQF_NO_SUSPEND,
5161b31d BB	213	pdev->name, wdt);
	214	if (err)
	215	return err;
	216	}
	217
	218	if ((tmp & wdt->mr_mask) != (wdt->mr & wdt->mr_mask))
	219	dev_warn(dev,
	220	"watchdog already configured differently (mr = %x expecting %x)\n",
	221	tmp & wdt->mr_mask, wdt->mr & wdt->mr_mask);
	222
	223	setup_timer(&wdt->timer, at91_ping, (unsigned long)wdt);
a04c3f01 BB	224
	225	/*
	226	* Use min_heartbeat the first time to avoid spurious watchdog reset:
	227	* we don't know for how long the watchdog counter is running, and
	228	* - resetting it right now might trigger a watchdog fault reset
	229	* - waiting for heartbeat time might lead to a watchdog timeout
	230	* reset
	231	*/
	232	mod_timer(&wdt->timer, jiffies + min_heartbeat);
5161b31d BB	233
	234	/* Try to set timeout from device tree first */
	235	if (watchdog_init_timeout(&wdt->wdd, 0, dev))
	236	watchdog_init_timeout(&wdt->wdd, heartbeat, dev);
	237	watchdog_set_nowayout(&wdt->wdd, wdt->nowayout);
	238	err = watchdog_register_device(&wdt->wdd);
	239	if (err)
	240	goto out_stop_timer;
	241
	242	wdt->next_heartbeat = jiffies + wdt->wdd.timeout * HZ;
e6bb42e3 RC	243
e6bb42e3 RC	244	return 0;
5161b31d BB	245
	246	out_stop_timer:
	247	del_timer(&wdt->timer);
	248	return err;
e6bb42e3 RC	249	}
e6bb42e3 RC	250
490ac7af WY	251	/* ......................................................................... */
490ac7af WY	252
e6bb42e3 RC	253	static const struct watchdog_info at91_wdt_info = {
e6bb42e3 RC	254	.identity = DRV_NAME,
e73a7802 WVS	255	.options = WDIOF_SETTIMEOUT \| WDIOF_KEEPALIVEPING \|
e73a7802 WVS	256	WDIOF_MAGICCLOSE,
e6bb42e3 RC	257	};
e6bb42e3 RC	258
490ac7af WY	259	static const struct watchdog_ops at91_wdt_ops = {
	260	.owner = THIS_MODULE,
	261	.start = at91_wdt_start,
	262	.stop = at91_wdt_stop,
490ac7af	263	.set_timeout = at91_wdt_set_timeout,
e6bb42e3 RC	264	};
e6bb42e3 RC	265
5161b31d BB	266	#if defined(CONFIG_OF)
	267	static int of_at91wdt_init(struct device_node np, struct at91wdt wdt)
	268	{
	269	u32 min = 0;
	270	u32 max = WDT_COUNTER_MAX_SECS;
	271	const char *tmp;
	272
	273	/* Get the interrupts property */
	274	wdt->irq = irq_of_parse_and_map(np, 0);
	275	if (!wdt->irq)
	276	dev_warn(wdt->wdd.parent, "failed to get IRQ from DT\n");
	277
	278	if (!of_property_read_u32_index(np, "atmel,max-heartbeat-sec", 0,
	279	&max)) {
	280	if (!max \|\| max > WDT_COUNTER_MAX_SECS)
	281	max = WDT_COUNTER_MAX_SECS;
	282
	283	if (!of_property_read_u32_index(np, "atmel,min-heartbeat-sec",
	284	0, &min)) {
	285	if (min >= max)
	286	min = max - 1;
	287	}
	288	}
	289
	290	min = secs_to_ticks(min);
	291	max = secs_to_ticks(max);
	292
	293	wdt->mr_mask = 0x3FFFFFFF;
	294	wdt->mr = 0;
	295	if (!of_property_read_string(np, "atmel,watchdog-type", &tmp) &&
	296	!strcmp(tmp, "software")) {
	297	wdt->mr \|= AT91_WDT_WDFIEN;
	298	wdt->mr_mask &= ~AT91_WDT_WDRPROC;
	299	} else {
	300	wdt->mr \|= AT91_WDT_WDRSTEN;
	301	}
	302
	303	if (!of_property_read_string(np, "atmel,reset-type", &tmp) &&
	304	!strcmp(tmp, "proc"))
	305	wdt->mr \|= AT91_WDT_WDRPROC;
	306
	307	if (of_property_read_bool(np, "atmel,disable")) {
	308	wdt->mr \|= AT91_WDT_WDDIS;
	309	wdt->mr_mask &= AT91_WDT_WDDIS;
	310	}
	311
	312	if (of_property_read_bool(np, "atmel,idle-halt"))
	313	wdt->mr \|= AT91_WDT_WDIDLEHLT;
	314
	315	if (of_property_read_bool(np, "atmel,dbg-halt"))
	316	wdt->mr \|= AT91_WDT_WDDBGHLT;
	317
	318	wdt->mr \|= max \| ((max - min) << 16);
	319
	320	return 0;
	321	}
	322	#else
	323	static inline int of_at91wdt_init(struct device_node np, struct at91wdt wdt)
	324	{
	325	return 0;
	326	}
	327	#endif
e6bb42e3 RC	328
	329	static int __init at91wdt_probe(struct platform_device *pdev)
	330	{
c1c30a29	331	struct resource *r;
5161b31d BB	332	int err;
5161b31d BB	333	struct at91wdt *wdt;
e6bb42e3	334
5161b31d BB	335	wdt = devm_kzalloc(&pdev->dev, sizeof(*wdt), GFP_KERNEL);
5161b31d BB	336	if (!wdt)
c1c30a29	337	return -ENOMEM;
c1c30a29	338
5161b31d BB	339	wdt->mr = (WDT_HW_TIMEOUT * 256) \| AT91_WDT_WDRSTEN \| AT91_WDT_WDD \|
	340	AT91_WDT_WDDBGHLT \| AT91_WDT_WDIDLEHLT;
	341	wdt->mr_mask = 0x3FFFFFFF;
	342	wdt->nowayout = nowayout;
	343	wdt->wdd.parent = &pdev->dev;
	344	wdt->wdd.info = &at91_wdt_info;
	345	wdt->wdd.ops = &at91_wdt_ops;
	346	wdt->wdd.timeout = WDT_HEARTBEAT;
	347	wdt->wdd.min_timeout = 1;
	348	wdt->wdd.max_timeout = 0xFFFF;
490ac7af	349
5161b31d BB	350	r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
	351	wdt->base = devm_ioremap_resource(&pdev->dev, r);
	352	if (IS_ERR(wdt->base))
	353	return PTR_ERR(wdt->base);
	354
	355	if (pdev->dev.of_node) {
	356	err = of_at91wdt_init(pdev->dev.of_node, wdt);
	357	if (err)
	358	return err;
	359	}
e6bb42e3	360
5161b31d BB	361	err = at91_wdt_init(pdev, wdt);
	362	if (err)
	363	return err;
e6bb42e3	364
5161b31d	365	platform_set_drvdata(pdev, wdt);
e6bb42e3	366
27c766aa	367	pr_info("enabled (heartbeat=%d sec, nowayout=%d)\n",
5161b31d	368	wdt->wdd.timeout, wdt->nowayout);
e6bb42e3 RC	369
	370	return 0;
	371	}
	372
	373	static int __exit at91wdt_remove(struct platform_device *pdev)
	374	{
5161b31d BB	375	struct at91wdt *wdt = platform_get_drvdata(pdev);
5161b31d BB	376	watchdog_unregister_device(&wdt->wdd);
e6bb42e3	377
490ac7af	378	pr_warn("I quit now, hardware will probably reboot!\n");
5161b31d	379	del_timer(&wdt->timer);
e6bb42e3	380
490ac7af	381	return 0;
e6bb42e3 RC	382	}
e6bb42e3 RC	383
be49bbae	384	#if defined(CONFIG_OF)
6c41e474	385	static const struct of_device_id at91_wdt_dt_ids[] = {
be49bbae FP	386	{ .compatible = "atmel,at91sam9260-wdt" },
	387	{ /* sentinel */ }
	388	};
	389
	390	MODULE_DEVICE_TABLE(of, at91_wdt_dt_ids);
	391	#endif
	392
e6bb42e3 RC	393	static struct platform_driver at91wdt_driver = {
e6bb42e3 RC	394	.remove = __exit_p(at91wdt_remove),
e6bb42e3 RC	395	.driver = {
e6bb42e3 RC	396	.name = "at91_wdt",
be49bbae	397	.of_match_table = of_match_ptr(at91_wdt_dt_ids),
e6bb42e3 RC	398	},
	399	};
	400
1cb9204c	401	module_platform_driver_probe(at91wdt_driver, at91wdt_probe);
e6bb42e3 RC	402
	403	MODULE_AUTHOR("Renaud CERRATO <r.cerrato@til-technologies.fr>");
	404	MODULE_DESCRIPTION("Watchdog driver for Atmel AT91SAM9x processors");
	405	MODULE_LICENSE("GPL");