Commit | Line | Data |
---|---|---|
f8394f61 GJ |
1 | /* |
2 | * Atheros AR71XX/AR724X/AR913X built-in hardware watchdog timer. | |
3 | * | |
4 | * Copyright (C) 2008-2011 Gabor Juhos <juhosg@openwrt.org> | |
5 | * Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org> | |
6 | * | |
7 | * This driver was based on: drivers/watchdog/ixp4xx_wdt.c | |
8 | * Author: Deepak Saxena <dsaxena@plexity.net> | |
9 | * Copyright 2004 (c) MontaVista, Software, Inc. | |
10 | * | |
11 | * which again was based on sa1100 driver, | |
12 | * Copyright (C) 2000 Oleg Drokin <green@crimea.edu> | |
13 | * | |
14 | * This program is free software; you can redistribute it and/or modify it | |
15 | * under the terms of the GNU General Public License version 2 as published | |
16 | * by the Free Software Foundation. | |
17 | * | |
18 | */ | |
19 | ||
27c766aa JP |
20 | #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt |
21 | ||
f8394f61 GJ |
22 | #include <linux/bitops.h> |
23 | #include <linux/errno.h> | |
24 | #include <linux/fs.h> | |
09f5100a | 25 | #include <linux/io.h> |
f8394f61 GJ |
26 | #include <linux/kernel.h> |
27 | #include <linux/miscdevice.h> | |
28 | #include <linux/module.h> | |
29 | #include <linux/moduleparam.h> | |
30 | #include <linux/platform_device.h> | |
31 | #include <linux/types.h> | |
32 | #include <linux/watchdog.h> | |
33 | #include <linux/clk.h> | |
34 | #include <linux/err.h> | |
15920d12 GJ |
35 | #include <linux/of.h> |
36 | #include <linux/of_platform.h> | |
f8394f61 | 37 | |
f8394f61 GJ |
38 | #define DRIVER_NAME "ath79-wdt" |
39 | ||
40 | #define WDT_TIMEOUT 15 /* seconds */ | |
41 | ||
09f5100a GJ |
42 | #define WDOG_REG_CTRL 0x00 |
43 | #define WDOG_REG_TIMER 0x04 | |
44 | ||
f8394f61 GJ |
45 | #define WDOG_CTRL_LAST_RESET BIT(31) |
46 | #define WDOG_CTRL_ACTION_MASK 3 | |
47 | #define WDOG_CTRL_ACTION_NONE 0 /* no action */ | |
48 | #define WDOG_CTRL_ACTION_GPI 1 /* general purpose interrupt */ | |
49 | #define WDOG_CTRL_ACTION_NMI 2 /* NMI */ | |
50 | #define WDOG_CTRL_ACTION_FCR 3 /* full chip reset */ | |
51 | ||
86a1e189 WVS |
52 | static bool nowayout = WATCHDOG_NOWAYOUT; |
53 | module_param(nowayout, bool, 0); | |
f8394f61 GJ |
54 | MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started " |
55 | "(default=" __MODULE_STRING(WATCHDOG_NOWAYOUT) ")"); | |
56 | ||
57 | static int timeout = WDT_TIMEOUT; | |
58 | module_param(timeout, int, 0); | |
59 | MODULE_PARM_DESC(timeout, "Watchdog timeout in seconds " | |
60 | "(default=" __MODULE_STRING(WDT_TIMEOUT) "s)"); | |
61 | ||
62 | static unsigned long wdt_flags; | |
63 | ||
64 | #define WDT_FLAGS_BUSY 0 | |
65 | #define WDT_FLAGS_EXPECT_CLOSE 1 | |
66 | ||
67 | static struct clk *wdt_clk; | |
68 | static unsigned long wdt_freq; | |
69 | static int boot_status; | |
70 | static int max_timeout; | |
09f5100a GJ |
71 | static void __iomem *wdt_base; |
72 | ||
73 | static inline void ath79_wdt_wr(unsigned reg, u32 val) | |
74 | { | |
75 | iowrite32(val, wdt_base + reg); | |
76 | } | |
77 | ||
78 | static inline u32 ath79_wdt_rr(unsigned reg) | |
79 | { | |
80 | return ioread32(wdt_base + reg); | |
81 | } | |
f8394f61 GJ |
82 | |
83 | static inline void ath79_wdt_keepalive(void) | |
84 | { | |
09f5100a | 85 | ath79_wdt_wr(WDOG_REG_TIMER, wdt_freq * timeout); |
86955e2b | 86 | /* flush write */ |
09f5100a | 87 | ath79_wdt_rr(WDOG_REG_TIMER); |
f8394f61 GJ |
88 | } |
89 | ||
90 | static inline void ath79_wdt_enable(void) | |
91 | { | |
92 | ath79_wdt_keepalive(); | |
09f5100a | 93 | ath79_wdt_wr(WDOG_REG_CTRL, WDOG_CTRL_ACTION_FCR); |
86955e2b | 94 | /* flush write */ |
09f5100a | 95 | ath79_wdt_rr(WDOG_REG_CTRL); |
f8394f61 GJ |
96 | } |
97 | ||
98 | static inline void ath79_wdt_disable(void) | |
99 | { | |
09f5100a | 100 | ath79_wdt_wr(WDOG_REG_CTRL, WDOG_CTRL_ACTION_NONE); |
86955e2b | 101 | /* flush write */ |
09f5100a | 102 | ath79_wdt_rr(WDOG_REG_CTRL); |
f8394f61 GJ |
103 | } |
104 | ||
105 | static int ath79_wdt_set_timeout(int val) | |
106 | { | |
107 | if (val < 1 || val > max_timeout) | |
108 | return -EINVAL; | |
109 | ||
110 | timeout = val; | |
111 | ath79_wdt_keepalive(); | |
112 | ||
113 | return 0; | |
114 | } | |
115 | ||
116 | static int ath79_wdt_open(struct inode *inode, struct file *file) | |
117 | { | |
118 | if (test_and_set_bit(WDT_FLAGS_BUSY, &wdt_flags)) | |
119 | return -EBUSY; | |
120 | ||
121 | clear_bit(WDT_FLAGS_EXPECT_CLOSE, &wdt_flags); | |
122 | ath79_wdt_enable(); | |
123 | ||
124 | return nonseekable_open(inode, file); | |
125 | } | |
126 | ||
127 | static int ath79_wdt_release(struct inode *inode, struct file *file) | |
128 | { | |
129 | if (test_bit(WDT_FLAGS_EXPECT_CLOSE, &wdt_flags)) | |
130 | ath79_wdt_disable(); | |
131 | else { | |
27c766aa | 132 | pr_crit("device closed unexpectedly, watchdog timer will not stop!\n"); |
f8394f61 GJ |
133 | ath79_wdt_keepalive(); |
134 | } | |
135 | ||
136 | clear_bit(WDT_FLAGS_BUSY, &wdt_flags); | |
137 | clear_bit(WDT_FLAGS_EXPECT_CLOSE, &wdt_flags); | |
138 | ||
139 | return 0; | |
140 | } | |
141 | ||
142 | static ssize_t ath79_wdt_write(struct file *file, const char *data, | |
143 | size_t len, loff_t *ppos) | |
144 | { | |
145 | if (len) { | |
146 | if (!nowayout) { | |
147 | size_t i; | |
148 | ||
149 | clear_bit(WDT_FLAGS_EXPECT_CLOSE, &wdt_flags); | |
150 | ||
151 | for (i = 0; i != len; i++) { | |
152 | char c; | |
153 | ||
154 | if (get_user(c, data + i)) | |
155 | return -EFAULT; | |
156 | ||
157 | if (c == 'V') | |
158 | set_bit(WDT_FLAGS_EXPECT_CLOSE, | |
159 | &wdt_flags); | |
160 | } | |
161 | } | |
162 | ||
163 | ath79_wdt_keepalive(); | |
164 | } | |
165 | ||
166 | return len; | |
167 | } | |
168 | ||
169 | static const struct watchdog_info ath79_wdt_info = { | |
170 | .options = WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING | | |
171 | WDIOF_MAGICCLOSE | WDIOF_CARDRESET, | |
172 | .firmware_version = 0, | |
173 | .identity = "ATH79 watchdog", | |
174 | }; | |
175 | ||
176 | static long ath79_wdt_ioctl(struct file *file, unsigned int cmd, | |
177 | unsigned long arg) | |
178 | { | |
179 | void __user *argp = (void __user *)arg; | |
180 | int __user *p = argp; | |
181 | int err; | |
182 | int t; | |
183 | ||
184 | switch (cmd) { | |
185 | case WDIOC_GETSUPPORT: | |
186 | err = copy_to_user(argp, &ath79_wdt_info, | |
187 | sizeof(ath79_wdt_info)) ? -EFAULT : 0; | |
188 | break; | |
189 | ||
190 | case WDIOC_GETSTATUS: | |
191 | err = put_user(0, p); | |
192 | break; | |
193 | ||
194 | case WDIOC_GETBOOTSTATUS: | |
195 | err = put_user(boot_status, p); | |
196 | break; | |
197 | ||
198 | case WDIOC_KEEPALIVE: | |
199 | ath79_wdt_keepalive(); | |
200 | err = 0; | |
201 | break; | |
202 | ||
203 | case WDIOC_SETTIMEOUT: | |
204 | err = get_user(t, p); | |
205 | if (err) | |
206 | break; | |
207 | ||
208 | err = ath79_wdt_set_timeout(t); | |
209 | if (err) | |
210 | break; | |
211 | ||
212 | /* fallthrough */ | |
213 | case WDIOC_GETTIMEOUT: | |
214 | err = put_user(timeout, p); | |
215 | break; | |
216 | ||
217 | default: | |
218 | err = -ENOTTY; | |
219 | break; | |
220 | } | |
221 | ||
222 | return err; | |
223 | } | |
224 | ||
225 | static const struct file_operations ath79_wdt_fops = { | |
226 | .owner = THIS_MODULE, | |
227 | .llseek = no_llseek, | |
228 | .write = ath79_wdt_write, | |
229 | .unlocked_ioctl = ath79_wdt_ioctl, | |
230 | .open = ath79_wdt_open, | |
231 | .release = ath79_wdt_release, | |
232 | }; | |
233 | ||
234 | static struct miscdevice ath79_wdt_miscdev = { | |
235 | .minor = WATCHDOG_MINOR, | |
236 | .name = "watchdog", | |
237 | .fops = &ath79_wdt_fops, | |
238 | }; | |
239 | ||
2d991a16 | 240 | static int ath79_wdt_probe(struct platform_device *pdev) |
f8394f61 | 241 | { |
09f5100a | 242 | struct resource *res; |
f8394f61 GJ |
243 | u32 ctrl; |
244 | int err; | |
245 | ||
09f5100a GJ |
246 | if (wdt_base) |
247 | return -EBUSY; | |
248 | ||
249 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); | |
6330c707 SK |
250 | wdt_base = devm_ioremap_resource(&pdev->dev, res); |
251 | if (IS_ERR(wdt_base)) | |
252 | return PTR_ERR(wdt_base); | |
09f5100a | 253 | |
5071a884 | 254 | wdt_clk = devm_clk_get(&pdev->dev, "wdt"); |
f8394f61 GJ |
255 | if (IS_ERR(wdt_clk)) |
256 | return PTR_ERR(wdt_clk); | |
257 | ||
258 | err = clk_enable(wdt_clk); | |
259 | if (err) | |
5071a884 | 260 | return err; |
f8394f61 GJ |
261 | |
262 | wdt_freq = clk_get_rate(wdt_clk); | |
263 | if (!wdt_freq) { | |
264 | err = -EINVAL; | |
265 | goto err_clk_disable; | |
266 | } | |
267 | ||
268 | max_timeout = (0xfffffffful / wdt_freq); | |
269 | if (timeout < 1 || timeout > max_timeout) { | |
270 | timeout = max_timeout; | |
271 | dev_info(&pdev->dev, | |
272 | "timeout value must be 0 < timeout < %d, using %d\n", | |
273 | max_timeout, timeout); | |
274 | } | |
275 | ||
09f5100a | 276 | ctrl = ath79_wdt_rr(WDOG_REG_CTRL); |
f8394f61 GJ |
277 | boot_status = (ctrl & WDOG_CTRL_LAST_RESET) ? WDIOF_CARDRESET : 0; |
278 | ||
279 | err = misc_register(&ath79_wdt_miscdev); | |
280 | if (err) { | |
281 | dev_err(&pdev->dev, | |
282 | "unable to register misc device, err=%d\n", err); | |
283 | goto err_clk_disable; | |
284 | } | |
285 | ||
286 | return 0; | |
287 | ||
288 | err_clk_disable: | |
289 | clk_disable(wdt_clk); | |
f8394f61 GJ |
290 | return err; |
291 | } | |
292 | ||
4b12b896 | 293 | static int ath79_wdt_remove(struct platform_device *pdev) |
f8394f61 GJ |
294 | { |
295 | misc_deregister(&ath79_wdt_miscdev); | |
296 | clk_disable(wdt_clk); | |
f8394f61 GJ |
297 | return 0; |
298 | } | |
299 | ||
300 | static void ath97_wdt_shutdown(struct platform_device *pdev) | |
301 | { | |
302 | ath79_wdt_disable(); | |
303 | } | |
304 | ||
15920d12 GJ |
305 | #ifdef CONFIG_OF |
306 | static const struct of_device_id ath79_wdt_match[] = { | |
307 | { .compatible = "qca,ar7130-wdt" }, | |
308 | {}, | |
309 | }; | |
310 | MODULE_DEVICE_TABLE(of, ath79_wdt_match); | |
311 | #endif | |
312 | ||
f8394f61 | 313 | static struct platform_driver ath79_wdt_driver = { |
8157becf | 314 | .probe = ath79_wdt_probe, |
82268714 | 315 | .remove = ath79_wdt_remove, |
f8394f61 GJ |
316 | .shutdown = ath97_wdt_shutdown, |
317 | .driver = { | |
318 | .name = DRIVER_NAME, | |
319 | .owner = THIS_MODULE, | |
15920d12 | 320 | .of_match_table = of_match_ptr(ath79_wdt_match), |
f8394f61 GJ |
321 | }, |
322 | }; | |
323 | ||
8157becf | 324 | module_platform_driver(ath79_wdt_driver); |
f8394f61 GJ |
325 | |
326 | MODULE_DESCRIPTION("Atheros AR71XX/AR724X/AR913X hardware watchdog driver"); | |
327 | MODULE_AUTHOR("Gabor Juhos <juhosg@openwrt.org"); | |
328 | MODULE_AUTHOR("Imre Kaloz <kaloz@openwrt.org"); | |
329 | MODULE_LICENSE("GPL v2"); | |
330 | MODULE_ALIAS("platform:" DRIVER_NAME); |