Commit | Line | Data |
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a2f40ccd | 1 | /* |
a2f40ccd KG |
2 | * Watchdog timer for PowerPC Book-E systems |
3 | * | |
4 | * Author: Matthew McClintock | |
4c8d3d99 | 5 | * Maintainer: Kumar Gala <galak@kernel.crashing.org> |
a2f40ccd | 6 | * |
f172ddc6 | 7 | * Copyright 2005, 2008 Freescale Semiconductor Inc. |
a2f40ccd KG |
8 | * |
9 | * This program is free software; you can redistribute it and/or modify it | |
10 | * under the terms of the GNU General Public License as published by the | |
11 | * Free Software Foundation; either version 2 of the License, or (at your | |
12 | * option) any later version. | |
13 | */ | |
14 | ||
a2f40ccd KG |
15 | #include <linux/module.h> |
16 | #include <linux/fs.h> | |
f172ddc6 | 17 | #include <linux/smp.h> |
a2f40ccd KG |
18 | #include <linux/miscdevice.h> |
19 | #include <linux/notifier.h> | |
20 | #include <linux/watchdog.h> | |
00e9c205 | 21 | #include <linux/uaccess.h> |
a2f40ccd KG |
22 | |
23 | #include <asm/reg_booke.h> | |
39cdc4bf | 24 | #include <asm/system.h> |
dcfb7484 CF |
25 | #include <asm/time.h> |
26 | #include <asm/div64.h> | |
a2f40ccd | 27 | |
40ebbcbf | 28 | /* If the kernel parameter wdt=1, the watchdog will be enabled at boot. |
a2f40ccd KG |
29 | * Also, the wdt_period sets the watchdog timer period timeout. |
30 | * For E500 cpus the wdt_period sets which bit changing from 0->1 will | |
31 | * trigger a watchog timeout. This watchdog timeout will occur 3 times, the | |
32 | * first time nothing will happen, the second time a watchdog exception will | |
33 | * occur, and the final time the board will reset. | |
34 | */ | |
35 | ||
36 | #ifdef CONFIG_FSL_BOOKE | |
dcfb7484 | 37 | #define WDT_PERIOD_DEFAULT 38 /* Ex. wdt_period=28 bus=333Mhz,reset=~40sec */ |
a2f40ccd | 38 | #else |
f31909c0 | 39 | #define WDT_PERIOD_DEFAULT 3 /* Refer to the PPC40x and PPC4xx manuals */ |
a2f40ccd KG |
40 | #endif /* for timing information */ |
41 | ||
f172ddc6 | 42 | u32 booke_wdt_enabled; |
39cdc4bf | 43 | u32 booke_wdt_period = WDT_PERIOD_DEFAULT; |
a2f40ccd KG |
44 | |
45 | #ifdef CONFIG_FSL_BOOKE | |
dcfb7484 | 46 | #define WDTP(x) ((((x)&0x3)<<30)|(((x)&0x3c)<<15)) |
0fb06571 | 47 | #define WDTP_MASK (WDTP(0x3f)) |
a2f40ccd KG |
48 | #else |
49 | #define WDTP(x) (TCR_WP(x)) | |
0a0e9e0c | 50 | #define WDTP_MASK (TCR_WP_MASK) |
a2f40ccd KG |
51 | #endif |
52 | ||
f172ddc6 CG |
53 | static DEFINE_SPINLOCK(booke_wdt_lock); |
54 | ||
dcfb7484 CF |
55 | /* For the specified period, determine the number of seconds |
56 | * corresponding to the reset time. There will be a watchdog | |
57 | * exception at approximately 3/5 of this time. | |
58 | * | |
59 | * The formula to calculate this is given by: | |
60 | * 2.5 * (2^(63-period+1)) / timebase_freq | |
61 | * | |
62 | * In order to simplify things, we assume that period is | |
63 | * at least 1. This will still result in a very long timeout. | |
64 | */ | |
65 | static unsigned long long period_to_sec(unsigned int period) | |
66 | { | |
67 | unsigned long long tmp = 1ULL << (64 - period); | |
68 | unsigned long tmp2 = ppc_tb_freq; | |
69 | ||
70 | /* tmp may be a very large number and we don't want to overflow, | |
71 | * so divide the timebase freq instead of multiplying tmp | |
72 | */ | |
73 | tmp2 = tmp2 / 5 * 2; | |
74 | ||
75 | do_div(tmp, tmp2); | |
76 | return tmp; | |
77 | } | |
78 | ||
79 | /* | |
80 | * This procedure will find the highest period which will give a timeout | |
81 | * greater than the one required. e.g. for a bus speed of 66666666 and | |
82 | * and a parameter of 2 secs, then this procedure will return a value of 38. | |
83 | */ | |
84 | static unsigned int sec_to_period(unsigned int secs) | |
85 | { | |
86 | unsigned int period; | |
87 | for (period = 63; period > 0; period--) { | |
88 | if (period_to_sec(period) >= secs) | |
89 | return period; | |
90 | } | |
91 | return 0; | |
92 | } | |
93 | ||
f172ddc6 | 94 | static void __booke_wdt_ping(void *data) |
f31909c0 SR |
95 | { |
96 | mtspr(SPRN_TSR, TSR_ENW|TSR_WIS); | |
97 | } | |
98 | ||
f172ddc6 CG |
99 | static void booke_wdt_ping(void) |
100 | { | |
f6f88e9b | 101 | on_each_cpu(__booke_wdt_ping, NULL, 0); |
f172ddc6 CG |
102 | } |
103 | ||
104 | static void __booke_wdt_enable(void *data) | |
a2f40ccd KG |
105 | { |
106 | u32 val; | |
107 | ||
f31909c0 | 108 | /* clear status before enabling watchdog */ |
f172ddc6 | 109 | __booke_wdt_ping(NULL); |
a2f40ccd | 110 | val = mfspr(SPRN_TCR); |
0a0e9e0c | 111 | val &= ~WDTP_MASK; |
39cdc4bf | 112 | val |= (TCR_WIE|TCR_WRC(WRC_CHIP)|WDTP(booke_wdt_period)); |
a2f40ccd KG |
113 | |
114 | mtspr(SPRN_TCR, val); | |
115 | } | |
116 | ||
f172ddc6 | 117 | static ssize_t booke_wdt_write(struct file *file, const char __user *buf, |
a2f40ccd KG |
118 | size_t count, loff_t *ppos) |
119 | { | |
120 | booke_wdt_ping(); | |
121 | return count; | |
122 | } | |
123 | ||
42747d71 | 124 | static const struct watchdog_info ident = { |
f172ddc6 CG |
125 | .options = WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING, |
126 | .identity = "PowerPC Book-E Watchdog", | |
a2f40ccd KG |
127 | }; |
128 | ||
00e9c205 AC |
129 | static long booke_wdt_ioctl(struct file *file, |
130 | unsigned int cmd, unsigned long arg) | |
a2f40ccd KG |
131 | { |
132 | u32 tmp = 0; | |
538bacf8 | 133 | u32 __user *p = (u32 __user *)arg; |
a2f40ccd KG |
134 | |
135 | switch (cmd) { | |
136 | case WDIOC_GETSUPPORT: | |
dcfb7484 | 137 | if (copy_to_user((void *)arg, &ident, sizeof(ident))) |
a2f40ccd KG |
138 | return -EFAULT; |
139 | case WDIOC_GETSTATUS: | |
538bacf8 | 140 | return put_user(ident.options, p); |
a2f40ccd KG |
141 | case WDIOC_GETBOOTSTATUS: |
142 | /* XXX: something is clearing TSR */ | |
143 | tmp = mfspr(SPRN_TSR) & TSR_WRS(3); | |
144 | /* returns 1 if last reset was caused by the WDT */ | |
145 | return (tmp ? 1 : 0); | |
0c06090c WVS |
146 | case WDIOC_SETOPTIONS: |
147 | if (get_user(tmp, p)) | |
148 | return -EINVAL; | |
149 | if (tmp == WDIOS_ENABLECARD) { | |
150 | booke_wdt_ping(); | |
151 | break; | |
152 | } else | |
153 | return -EINVAL; | |
154 | return 0; | |
a2f40ccd KG |
155 | case WDIOC_KEEPALIVE: |
156 | booke_wdt_ping(); | |
157 | return 0; | |
158 | case WDIOC_SETTIMEOUT: | |
dcfb7484 | 159 | if (get_user(tmp, p)) |
a2f40ccd | 160 | return -EFAULT; |
dcfb7484 CF |
161 | #ifdef CONFIG_FSL_BOOKE |
162 | /* period of 1 gives the largest possible timeout */ | |
163 | if (tmp > period_to_sec(1)) | |
164 | return -EINVAL; | |
165 | booke_wdt_period = sec_to_period(tmp); | |
166 | #else | |
167 | booke_wdt_period = tmp; | |
168 | #endif | |
0a0e9e0c | 169 | mtspr(SPRN_TCR, (mfspr(SPRN_TCR) & ~WDTP_MASK) | |
00e9c205 | 170 | WDTP(booke_wdt_period)); |
a2f40ccd KG |
171 | return 0; |
172 | case WDIOC_GETTIMEOUT: | |
538bacf8 | 173 | return put_user(booke_wdt_period, p); |
a2f40ccd | 174 | default: |
795b89d2 | 175 | return -ENOTTY; |
a2f40ccd KG |
176 | } |
177 | ||
178 | return 0; | |
179 | } | |
f172ddc6 CG |
180 | |
181 | static int booke_wdt_open(struct inode *inode, struct file *file) | |
a2f40ccd | 182 | { |
f172ddc6 | 183 | spin_lock(&booke_wdt_lock); |
39cdc4bf KG |
184 | if (booke_wdt_enabled == 0) { |
185 | booke_wdt_enabled = 1; | |
f6f88e9b | 186 | on_each_cpu(__booke_wdt_enable, NULL, 0); |
00e9c205 AC |
187 | printk(KERN_INFO |
188 | "PowerPC Book-E Watchdog Timer Enabled (wdt_period=%d)\n", | |
189 | booke_wdt_period); | |
a2f40ccd | 190 | } |
f172ddc6 | 191 | spin_unlock(&booke_wdt_lock); |
a2f40ccd | 192 | |
ec9505a7 | 193 | return nonseekable_open(inode, file); |
a2f40ccd KG |
194 | } |
195 | ||
62322d25 | 196 | static const struct file_operations booke_wdt_fops = { |
f172ddc6 CG |
197 | .owner = THIS_MODULE, |
198 | .llseek = no_llseek, | |
199 | .write = booke_wdt_write, | |
00e9c205 | 200 | .unlocked_ioctl = booke_wdt_ioctl, |
f172ddc6 | 201 | .open = booke_wdt_open, |
a2f40ccd KG |
202 | }; |
203 | ||
204 | static struct miscdevice booke_wdt_miscdev = { | |
f172ddc6 CG |
205 | .minor = WATCHDOG_MINOR, |
206 | .name = "watchdog", | |
207 | .fops = &booke_wdt_fops, | |
a2f40ccd KG |
208 | }; |
209 | ||
210 | static void __exit booke_wdt_exit(void) | |
211 | { | |
212 | misc_deregister(&booke_wdt_miscdev); | |
213 | } | |
214 | ||
a2f40ccd KG |
215 | static int __init booke_wdt_init(void) |
216 | { | |
217 | int ret = 0; | |
218 | ||
f172ddc6 | 219 | printk(KERN_INFO "PowerPC Book-E Watchdog Timer Loaded\n"); |
a78719c3 | 220 | ident.firmware_version = cur_cpu_spec->pvr_value; |
a2f40ccd KG |
221 | |
222 | ret = misc_register(&booke_wdt_miscdev); | |
223 | if (ret) { | |
f172ddc6 | 224 | printk(KERN_CRIT "Cannot register miscdev on minor=%d: %d\n", |
a2f40ccd KG |
225 | WATCHDOG_MINOR, ret); |
226 | return ret; | |
227 | } | |
228 | ||
f172ddc6 | 229 | spin_lock(&booke_wdt_lock); |
39cdc4bf | 230 | if (booke_wdt_enabled == 1) { |
00e9c205 AC |
231 | printk(KERN_INFO |
232 | "PowerPC Book-E Watchdog Timer Enabled (wdt_period=%d)\n", | |
233 | booke_wdt_period); | |
f6f88e9b | 234 | on_each_cpu(__booke_wdt_enable, NULL, 0); |
a2f40ccd | 235 | } |
f172ddc6 | 236 | spin_unlock(&booke_wdt_lock); |
a2f40ccd KG |
237 | |
238 | return ret; | |
239 | } | |
240 | device_initcall(booke_wdt_init); |