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c9353ae1 JI |
1 | /* |
2 | * Copyright 2010-2011 Picochip Ltd., Jamie Iles | |
3 | * http://www.picochip.com | |
4 | * | |
5 | * This program is free software; you can redistribute it and/or | |
6 | * modify it under the terms of the GNU General Public License | |
7 | * as published by the Free Software Foundation; either version | |
8 | * 2 of the License, or (at your option) any later version. | |
9 | * | |
10 | * This file implements a driver for the Synopsys DesignWare watchdog device | |
58a251f2 | 11 | * in the many subsystems. The watchdog has 16 different timeout periods |
c9353ae1 JI |
12 | * and these are a function of the input clock frequency. |
13 | * | |
14 | * The DesignWare watchdog cannot be stopped once it has been started so we | |
15 | * use a software timer to implement a ping that will keep the watchdog alive. | |
16 | * If we receive an expected close for the watchdog then we keep the timer | |
17 | * running, otherwise the timer is stopped and the watchdog will expire. | |
18 | */ | |
27c766aa JP |
19 | |
20 | #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt | |
c9353ae1 JI |
21 | |
22 | #include <linux/bitops.h> | |
23 | #include <linux/clk.h> | |
31228f43 | 24 | #include <linux/delay.h> |
c9353ae1 JI |
25 | #include <linux/device.h> |
26 | #include <linux/err.h> | |
27 | #include <linux/fs.h> | |
28 | #include <linux/io.h> | |
29 | #include <linux/kernel.h> | |
30 | #include <linux/miscdevice.h> | |
31 | #include <linux/module.h> | |
32 | #include <linux/moduleparam.h> | |
31228f43 | 33 | #include <linux/notifier.h> |
58e56373 | 34 | #include <linux/of.h> |
c9353ae1 JI |
35 | #include <linux/pm.h> |
36 | #include <linux/platform_device.h> | |
31228f43 | 37 | #include <linux/reboot.h> |
c9353ae1 JI |
38 | #include <linux/spinlock.h> |
39 | #include <linux/timer.h> | |
40 | #include <linux/uaccess.h> | |
41 | #include <linux/watchdog.h> | |
42 | ||
43 | #define WDOG_CONTROL_REG_OFFSET 0x00 | |
44 | #define WDOG_CONTROL_REG_WDT_EN_MASK 0x01 | |
45 | #define WDOG_TIMEOUT_RANGE_REG_OFFSET 0x04 | |
dfa07141 | 46 | #define WDOG_TIMEOUT_RANGE_TOPINIT_SHIFT 4 |
c9353ae1 JI |
47 | #define WDOG_CURRENT_COUNT_REG_OFFSET 0x08 |
48 | #define WDOG_COUNTER_RESTART_REG_OFFSET 0x0c | |
49 | #define WDOG_COUNTER_RESTART_KICK_VALUE 0x76 | |
50 | ||
51 | /* The maximum TOP (timeout period) value that can be set in the watchdog. */ | |
52 | #define DW_WDT_MAX_TOP 15 | |
53 | ||
86a1e189 WVS |
54 | static bool nowayout = WATCHDOG_NOWAYOUT; |
55 | module_param(nowayout, bool, 0); | |
c9353ae1 JI |
56 | MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started " |
57 | "(default=" __MODULE_STRING(WATCHDOG_NOWAYOUT) ")"); | |
58 | ||
59 | #define WDT_TIMEOUT (HZ / 2) | |
60 | ||
61 | static struct { | |
62 | spinlock_t lock; | |
63 | void __iomem *regs; | |
64 | struct clk *clk; | |
65 | unsigned long in_use; | |
66 | unsigned long next_heartbeat; | |
67 | struct timer_list timer; | |
68 | int expect_close; | |
31228f43 | 69 | struct notifier_block restart_handler; |
c9353ae1 JI |
70 | } dw_wdt; |
71 | ||
72 | static inline int dw_wdt_is_enabled(void) | |
73 | { | |
74 | return readl(dw_wdt.regs + WDOG_CONTROL_REG_OFFSET) & | |
75 | WDOG_CONTROL_REG_WDT_EN_MASK; | |
76 | } | |
77 | ||
78 | static inline int dw_wdt_top_in_seconds(unsigned top) | |
79 | { | |
80 | /* | |
81 | * There are 16 possible timeout values in 0..15 where the number of | |
82 | * cycles is 2 ^ (16 + i) and the watchdog counts down. | |
83 | */ | |
84 | return (1 << (16 + top)) / clk_get_rate(dw_wdt.clk); | |
85 | } | |
86 | ||
87 | static int dw_wdt_get_top(void) | |
88 | { | |
89 | int top = readl(dw_wdt.regs + WDOG_TIMEOUT_RANGE_REG_OFFSET) & 0xF; | |
90 | ||
91 | return dw_wdt_top_in_seconds(top); | |
92 | } | |
93 | ||
94 | static inline void dw_wdt_set_next_heartbeat(void) | |
95 | { | |
96 | dw_wdt.next_heartbeat = jiffies + dw_wdt_get_top() * HZ; | |
97 | } | |
98 | ||
99 | static int dw_wdt_set_top(unsigned top_s) | |
100 | { | |
101 | int i, top_val = DW_WDT_MAX_TOP; | |
102 | ||
103 | /* | |
104 | * Iterate over the timeout values until we find the closest match. We | |
105 | * always look for >=. | |
106 | */ | |
107 | for (i = 0; i <= DW_WDT_MAX_TOP; ++i) | |
108 | if (dw_wdt_top_in_seconds(i) >= top_s) { | |
109 | top_val = i; | |
110 | break; | |
111 | } | |
112 | ||
113 | /* Set the new value in the watchdog. */ | |
dfa07141 JZ |
114 | writel(top_val | top_val << WDOG_TIMEOUT_RANGE_TOPINIT_SHIFT, |
115 | dw_wdt.regs + WDOG_TIMEOUT_RANGE_REG_OFFSET); | |
c9353ae1 JI |
116 | |
117 | dw_wdt_set_next_heartbeat(); | |
118 | ||
119 | return dw_wdt_top_in_seconds(top_val); | |
120 | } | |
121 | ||
122 | static void dw_wdt_keepalive(void) | |
123 | { | |
124 | writel(WDOG_COUNTER_RESTART_KICK_VALUE, dw_wdt.regs + | |
125 | WDOG_COUNTER_RESTART_REG_OFFSET); | |
126 | } | |
127 | ||
31228f43 JZ |
128 | static int dw_wdt_restart_handle(struct notifier_block *this, |
129 | unsigned long mode, void *cmd) | |
130 | { | |
131 | u32 val; | |
132 | ||
133 | writel(0, dw_wdt.regs + WDOG_TIMEOUT_RANGE_REG_OFFSET); | |
134 | val = readl(dw_wdt.regs + WDOG_CONTROL_REG_OFFSET); | |
135 | if (val & WDOG_CONTROL_REG_WDT_EN_MASK) | |
136 | writel(WDOG_COUNTER_RESTART_KICK_VALUE, dw_wdt.regs + | |
137 | WDOG_COUNTER_RESTART_REG_OFFSET); | |
138 | else | |
139 | writel(WDOG_CONTROL_REG_WDT_EN_MASK, | |
140 | dw_wdt.regs + WDOG_CONTROL_REG_OFFSET); | |
141 | ||
142 | /* wait for reset to assert... */ | |
143 | mdelay(500); | |
144 | ||
145 | return NOTIFY_DONE; | |
146 | } | |
147 | ||
c9353ae1 JI |
148 | static void dw_wdt_ping(unsigned long data) |
149 | { | |
150 | if (time_before(jiffies, dw_wdt.next_heartbeat) || | |
151 | (!nowayout && !dw_wdt.in_use)) { | |
152 | dw_wdt_keepalive(); | |
153 | mod_timer(&dw_wdt.timer, jiffies + WDT_TIMEOUT); | |
154 | } else | |
155 | pr_crit("keepalive missed, machine will reset\n"); | |
156 | } | |
157 | ||
158 | static int dw_wdt_open(struct inode *inode, struct file *filp) | |
159 | { | |
160 | if (test_and_set_bit(0, &dw_wdt.in_use)) | |
161 | return -EBUSY; | |
162 | ||
163 | /* Make sure we don't get unloaded. */ | |
164 | __module_get(THIS_MODULE); | |
165 | ||
166 | spin_lock(&dw_wdt.lock); | |
167 | if (!dw_wdt_is_enabled()) { | |
168 | /* | |
169 | * The watchdog is not currently enabled. Set the timeout to | |
170 | * the maximum and then start it. | |
171 | */ | |
172 | dw_wdt_set_top(DW_WDT_MAX_TOP); | |
173 | writel(WDOG_CONTROL_REG_WDT_EN_MASK, | |
174 | dw_wdt.regs + WDOG_CONTROL_REG_OFFSET); | |
175 | } | |
176 | ||
177 | dw_wdt_set_next_heartbeat(); | |
178 | ||
179 | spin_unlock(&dw_wdt.lock); | |
180 | ||
181 | return nonseekable_open(inode, filp); | |
182 | } | |
183 | ||
0b930261 SK |
184 | static ssize_t dw_wdt_write(struct file *filp, const char __user *buf, |
185 | size_t len, loff_t *offset) | |
c9353ae1 JI |
186 | { |
187 | if (!len) | |
188 | return 0; | |
189 | ||
190 | if (!nowayout) { | |
191 | size_t i; | |
192 | ||
193 | dw_wdt.expect_close = 0; | |
194 | ||
195 | for (i = 0; i < len; ++i) { | |
196 | char c; | |
197 | ||
198 | if (get_user(c, buf + i)) | |
199 | return -EFAULT; | |
200 | ||
201 | if (c == 'V') { | |
202 | dw_wdt.expect_close = 1; | |
203 | break; | |
204 | } | |
205 | } | |
206 | } | |
207 | ||
208 | dw_wdt_set_next_heartbeat(); | |
209 | mod_timer(&dw_wdt.timer, jiffies + WDT_TIMEOUT); | |
210 | ||
211 | return len; | |
212 | } | |
213 | ||
214 | static u32 dw_wdt_time_left(void) | |
215 | { | |
216 | return readl(dw_wdt.regs + WDOG_CURRENT_COUNT_REG_OFFSET) / | |
217 | clk_get_rate(dw_wdt.clk); | |
218 | } | |
219 | ||
220 | static const struct watchdog_info dw_wdt_ident = { | |
221 | .options = WDIOF_KEEPALIVEPING | WDIOF_SETTIMEOUT | | |
222 | WDIOF_MAGICCLOSE, | |
223 | .identity = "Synopsys DesignWare Watchdog", | |
224 | }; | |
225 | ||
226 | static long dw_wdt_ioctl(struct file *filp, unsigned int cmd, unsigned long arg) | |
227 | { | |
228 | unsigned long val; | |
229 | int timeout; | |
230 | ||
231 | switch (cmd) { | |
232 | case WDIOC_GETSUPPORT: | |
60295507 | 233 | return copy_to_user((void __user *)arg, &dw_wdt_ident, |
c9353ae1 JI |
234 | sizeof(dw_wdt_ident)) ? -EFAULT : 0; |
235 | ||
236 | case WDIOC_GETSTATUS: | |
237 | case WDIOC_GETBOOTSTATUS: | |
60295507 | 238 | return put_user(0, (int __user *)arg); |
c9353ae1 JI |
239 | |
240 | case WDIOC_KEEPALIVE: | |
241 | dw_wdt_set_next_heartbeat(); | |
242 | return 0; | |
243 | ||
244 | case WDIOC_SETTIMEOUT: | |
245 | if (get_user(val, (int __user *)arg)) | |
246 | return -EFAULT; | |
247 | timeout = dw_wdt_set_top(val); | |
248 | return put_user(timeout , (int __user *)arg); | |
249 | ||
250 | case WDIOC_GETTIMEOUT: | |
251 | return put_user(dw_wdt_get_top(), (int __user *)arg); | |
252 | ||
253 | case WDIOC_GETTIMELEFT: | |
254 | /* Get the time left until expiry. */ | |
255 | if (get_user(val, (int __user *)arg)) | |
256 | return -EFAULT; | |
257 | return put_user(dw_wdt_time_left(), (int __user *)arg); | |
258 | ||
259 | default: | |
260 | return -ENOTTY; | |
261 | } | |
262 | } | |
263 | ||
264 | static int dw_wdt_release(struct inode *inode, struct file *filp) | |
265 | { | |
266 | clear_bit(0, &dw_wdt.in_use); | |
267 | ||
268 | if (!dw_wdt.expect_close) { | |
269 | del_timer(&dw_wdt.timer); | |
270 | ||
271 | if (!nowayout) | |
272 | pr_crit("unexpected close, system will reboot soon\n"); | |
273 | else | |
274 | pr_crit("watchdog cannot be disabled, system will reboot soon\n"); | |
275 | } | |
276 | ||
277 | dw_wdt.expect_close = 0; | |
278 | ||
279 | return 0; | |
280 | } | |
281 | ||
ad83c6cb | 282 | #ifdef CONFIG_PM_SLEEP |
c9353ae1 JI |
283 | static int dw_wdt_suspend(struct device *dev) |
284 | { | |
280103e6 | 285 | clk_disable_unprepare(dw_wdt.clk); |
c9353ae1 JI |
286 | |
287 | return 0; | |
288 | } | |
289 | ||
290 | static int dw_wdt_resume(struct device *dev) | |
291 | { | |
280103e6 | 292 | int err = clk_prepare_enable(dw_wdt.clk); |
c9353ae1 JI |
293 | |
294 | if (err) | |
295 | return err; | |
296 | ||
297 | dw_wdt_keepalive(); | |
298 | ||
299 | return 0; | |
300 | } | |
ad83c6cb | 301 | #endif /* CONFIG_PM_SLEEP */ |
c9353ae1 | 302 | |
ad83c6cb | 303 | static SIMPLE_DEV_PM_OPS(dw_wdt_pm_ops, dw_wdt_suspend, dw_wdt_resume); |
c9353ae1 JI |
304 | |
305 | static const struct file_operations wdt_fops = { | |
306 | .owner = THIS_MODULE, | |
307 | .llseek = no_llseek, | |
308 | .open = dw_wdt_open, | |
309 | .write = dw_wdt_write, | |
310 | .unlocked_ioctl = dw_wdt_ioctl, | |
311 | .release = dw_wdt_release | |
312 | }; | |
313 | ||
314 | static struct miscdevice dw_wdt_miscdev = { | |
315 | .fops = &wdt_fops, | |
316 | .name = "watchdog", | |
317 | .minor = WATCHDOG_MINOR, | |
318 | }; | |
319 | ||
2d991a16 | 320 | static int dw_wdt_drv_probe(struct platform_device *pdev) |
c9353ae1 JI |
321 | { |
322 | int ret; | |
323 | struct resource *mem = platform_get_resource(pdev, IORESOURCE_MEM, 0); | |
324 | ||
4c271bb6 TR |
325 | dw_wdt.regs = devm_ioremap_resource(&pdev->dev, mem); |
326 | if (IS_ERR(dw_wdt.regs)) | |
327 | return PTR_ERR(dw_wdt.regs); | |
c9353ae1 | 328 | |
cf3cc8c2 | 329 | dw_wdt.clk = devm_clk_get(&pdev->dev, NULL); |
c9353ae1 JI |
330 | if (IS_ERR(dw_wdt.clk)) |
331 | return PTR_ERR(dw_wdt.clk); | |
332 | ||
280103e6 | 333 | ret = clk_prepare_enable(dw_wdt.clk); |
c9353ae1 | 334 | if (ret) |
cf3cc8c2 | 335 | return ret; |
c9353ae1 JI |
336 | |
337 | spin_lock_init(&dw_wdt.lock); | |
338 | ||
339 | ret = misc_register(&dw_wdt_miscdev); | |
340 | if (ret) | |
341 | goto out_disable_clk; | |
342 | ||
31228f43 JZ |
343 | dw_wdt.restart_handler.notifier_call = dw_wdt_restart_handle; |
344 | dw_wdt.restart_handler.priority = 128; | |
345 | ret = register_restart_handler(&dw_wdt.restart_handler); | |
346 | if (ret) | |
347 | pr_warn("cannot register restart handler\n"); | |
348 | ||
c9353ae1 JI |
349 | dw_wdt_set_next_heartbeat(); |
350 | setup_timer(&dw_wdt.timer, dw_wdt_ping, 0); | |
351 | mod_timer(&dw_wdt.timer, jiffies + WDT_TIMEOUT); | |
352 | ||
353 | return 0; | |
354 | ||
355 | out_disable_clk: | |
280103e6 | 356 | clk_disable_unprepare(dw_wdt.clk); |
c9353ae1 JI |
357 | |
358 | return ret; | |
359 | } | |
360 | ||
4b12b896 | 361 | static int dw_wdt_drv_remove(struct platform_device *pdev) |
c9353ae1 | 362 | { |
31228f43 JZ |
363 | unregister_restart_handler(&dw_wdt.restart_handler); |
364 | ||
c9353ae1 JI |
365 | misc_deregister(&dw_wdt_miscdev); |
366 | ||
280103e6 | 367 | clk_disable_unprepare(dw_wdt.clk); |
c9353ae1 JI |
368 | |
369 | return 0; | |
370 | } | |
371 | ||
58e56373 DN |
372 | #ifdef CONFIG_OF |
373 | static const struct of_device_id dw_wdt_of_match[] = { | |
374 | { .compatible = "snps,dw-wdt", }, | |
375 | { /* sentinel */ } | |
376 | }; | |
377 | MODULE_DEVICE_TABLE(of, dw_wdt_of_match); | |
378 | #endif | |
379 | ||
c9353ae1 JI |
380 | static struct platform_driver dw_wdt_driver = { |
381 | .probe = dw_wdt_drv_probe, | |
82268714 | 382 | .remove = dw_wdt_drv_remove, |
c9353ae1 JI |
383 | .driver = { |
384 | .name = "dw_wdt", | |
58e56373 | 385 | .of_match_table = of_match_ptr(dw_wdt_of_match), |
c9353ae1 | 386 | .pm = &dw_wdt_pm_ops, |
c9353ae1 JI |
387 | }, |
388 | }; | |
389 | ||
b8ec6118 | 390 | module_platform_driver(dw_wdt_driver); |
c9353ae1 JI |
391 | |
392 | MODULE_AUTHOR("Jamie Iles"); | |
393 | MODULE_DESCRIPTION("Synopsys DesignWare Watchdog Driver"); | |
394 | MODULE_LICENSE("GPL"); |