[deliverable/linux.git] / drivers / watchdog / dw_wdt.c

/*
 * Copyright 2010-2011 Picochip Ltd., Jamie Iles
 * http://www.picochip.com
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License
 * as published by the Free Software Foundation; either version
 * 2 of the License, or (at your option) any later version.
 *
 * This file implements a driver for the Synopsys DesignWare watchdog device
 * in the many subsystems. The watchdog has 16 different timeout periods
 * and these are a function of the input clock frequency.
 *
 * The DesignWare watchdog cannot be stopped once it has been started so we
 * use a software timer to implement a ping that will keep the watchdog alive.
 * If we receive an expected close for the watchdog then we keep the timer
 * running, otherwise the timer is stopped and the watchdog will expire.
 */

#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt

#include <linux/bitops.h>
#include <linux/clk.h>
#include <linux/device.h>
#include <linux/err.h>
#include <linux/fs.h>
#include <linux/io.h>
#include <linux/kernel.h>
#include <linux/miscdevice.h>
#include <linux/module.h>
#include <linux/moduleparam.h>
#include <linux/of.h>
#include <linux/pm.h>
#include <linux/platform_device.h>
#include <linux/spinlock.h>
#include <linux/timer.h>
#include <linux/uaccess.h>
#include <linux/watchdog.h>

#define WDOG_CONTROL_REG_OFFSET		    0x00
#define WDOG_CONTROL_REG_WDT_EN_MASK	    0x01
#define WDOG_TIMEOUT_RANGE_REG_OFFSET	    0x04
#define WDOG_CURRENT_COUNT_REG_OFFSET	    0x08
#define WDOG_COUNTER_RESTART_REG_OFFSET     0x0c
#define WDOG_COUNTER_RESTART_KICK_VALUE	    0x76

/* The maximum TOP (timeout period) value that can be set in the watchdog. */
#define DW_WDT_MAX_TOP		15

static bool nowayout = WATCHDOG_NOWAYOUT;
module_param(nowayout, bool, 0);
MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started "
		 "(default=" __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");

#define WDT_TIMEOUT		(HZ / 2)

static struct {
	spinlock_t		lock;
	void __iomem		*regs;
	struct clk		*clk;
	unsigned long		in_use;
	unsigned long		next_heartbeat;
	struct timer_list	timer;
	int			expect_close;
} dw_wdt;

static inline int dw_wdt_is_enabled(void)
{
	return readl(dw_wdt.regs + WDOG_CONTROL_REG_OFFSET) &
		WDOG_CONTROL_REG_WDT_EN_MASK;
}

static inline int dw_wdt_top_in_seconds(unsigned top)
{
	/*
	 * There are 16 possible timeout values in 0..15 where the number of
	 * cycles is 2 ^ (16 + i) and the watchdog counts down.
	 */
	return (1 << (16 + top)) / clk_get_rate(dw_wdt.clk);
}

static int dw_wdt_get_top(void)
{
	int top = readl(dw_wdt.regs + WDOG_TIMEOUT_RANGE_REG_OFFSET) & 0xF;

	return dw_wdt_top_in_seconds(top);
}

static inline void dw_wdt_set_next_heartbeat(void)
{
	dw_wdt.next_heartbeat = jiffies + dw_wdt_get_top() * HZ;
}

static int dw_wdt_set_top(unsigned top_s)
{
	int i, top_val = DW_WDT_MAX_TOP;

	/*
	 * Iterate over the timeout values until we find the closest match. We
	 * always look for >=.
	 */
	for (i = 0; i <= DW_WDT_MAX_TOP; ++i)
		if (dw_wdt_top_in_seconds(i) >= top_s) {
			top_val = i;
			break;
		}

	/* Set the new value in the watchdog. */
	writel(top_val, dw_wdt.regs + WDOG_TIMEOUT_RANGE_REG_OFFSET);

	dw_wdt_set_next_heartbeat();

	return dw_wdt_top_in_seconds(top_val);
}

static void dw_wdt_keepalive(void)
{
	writel(WDOG_COUNTER_RESTART_KICK_VALUE, dw_wdt.regs +
	       WDOG_COUNTER_RESTART_REG_OFFSET);
}

static void dw_wdt_ping(unsigned long data)
{
	if (time_before(jiffies, dw_wdt.next_heartbeat) ||
	    (!nowayout && !dw_wdt.in_use)) {
		dw_wdt_keepalive();
		mod_timer(&dw_wdt.timer, jiffies + WDT_TIMEOUT);
	} else
		pr_crit("keepalive missed, machine will reset\n");
}

static int dw_wdt_open(struct inode *inode, struct file *filp)
{
	if (test_and_set_bit(0, &dw_wdt.in_use))
		return -EBUSY;

	/* Make sure we don't get unloaded. */
	__module_get(THIS_MODULE);

	spin_lock(&dw_wdt.lock);
	if (!dw_wdt_is_enabled()) {
		/*
		 * The watchdog is not currently enabled. Set the timeout to
		 * the maximum and then start it.
		 */
		dw_wdt_set_top(DW_WDT_MAX_TOP);
		writel(WDOG_CONTROL_REG_WDT_EN_MASK,
		       dw_wdt.regs + WDOG_CONTROL_REG_OFFSET);
	}

	dw_wdt_set_next_heartbeat();

	spin_unlock(&dw_wdt.lock);

	return nonseekable_open(inode, filp);
}

static ssize_t dw_wdt_write(struct file *filp, const char __user *buf,
			    size_t len, loff_t *offset)
{
	if (!len)
		return 0;

	if (!nowayout) {
		size_t i;

		dw_wdt.expect_close = 0;

		for (i = 0; i < len; ++i) {
			char c;

			if (get_user(c, buf + i))
				return -EFAULT;

			if (c == 'V') {
				dw_wdt.expect_close = 1;
				break;
			}
		}
	}

	dw_wdt_set_next_heartbeat();
	mod_timer(&dw_wdt.timer, jiffies + WDT_TIMEOUT);

	return len;
}

static u32 dw_wdt_time_left(void)
{
	return readl(dw_wdt.regs + WDOG_CURRENT_COUNT_REG_OFFSET) /
		clk_get_rate(dw_wdt.clk);
}

static const struct watchdog_info dw_wdt_ident = {
	.options	= WDIOF_KEEPALIVEPING | WDIOF_SETTIMEOUT |
			  WDIOF_MAGICCLOSE,
	.identity	= "Synopsys DesignWare Watchdog",
};

static long dw_wdt_ioctl(struct file *filp, unsigned int cmd, unsigned long arg)
{
	unsigned long val;
	int timeout;

	switch (cmd) {
	case WDIOC_GETSUPPORT:
		return copy_to_user((void __user *)arg, &dw_wdt_ident,
				    sizeof(dw_wdt_ident)) ? -EFAULT : 0;

	case WDIOC_GETSTATUS:
	case WDIOC_GETBOOTSTATUS:
		return put_user(0, (int __user *)arg);

	case WDIOC_KEEPALIVE:
		dw_wdt_set_next_heartbeat();
		return 0;

	case WDIOC_SETTIMEOUT:
		if (get_user(val, (int __user *)arg))
			return -EFAULT;
		timeout = dw_wdt_set_top(val);
		return put_user(timeout , (int __user *)arg);

	case WDIOC_GETTIMEOUT:
		return put_user(dw_wdt_get_top(), (int __user *)arg);

	case WDIOC_GETTIMELEFT:
		/* Get the time left until expiry. */
		if (get_user(val, (int __user *)arg))
			return -EFAULT;
		return put_user(dw_wdt_time_left(), (int __user *)arg);

	default:
		return -ENOTTY;
	}
}

static int dw_wdt_release(struct inode *inode, struct file *filp)
{
	clear_bit(0, &dw_wdt.in_use);

	if (!dw_wdt.expect_close) {
		del_timer(&dw_wdt.timer);

		if (!nowayout)
			pr_crit("unexpected close, system will reboot soon\n");
		else
			pr_crit("watchdog cannot be disabled, system will reboot soon\n");
	}

	dw_wdt.expect_close = 0;

	return 0;
}

#ifdef CONFIG_PM_SLEEP
static int dw_wdt_suspend(struct device *dev)
{
	clk_disable_unprepare(dw_wdt.clk);

	return 0;
}

static int dw_wdt_resume(struct device *dev)
{
	int err = clk_prepare_enable(dw_wdt.clk);

	if (err)
		return err;

	dw_wdt_keepalive();

	return 0;
}
#endif /* CONFIG_PM_SLEEP */

static SIMPLE_DEV_PM_OPS(dw_wdt_pm_ops, dw_wdt_suspend, dw_wdt_resume);

static const struct file_operations wdt_fops = {
	.owner		= THIS_MODULE,
	.llseek		= no_llseek,
	.open		= dw_wdt_open,
	.write		= dw_wdt_write,
	.unlocked_ioctl	= dw_wdt_ioctl,
	.release	= dw_wdt_release
};

static struct miscdevice dw_wdt_miscdev = {
	.fops		= &wdt_fops,
	.name		= "watchdog",
	.minor		= WATCHDOG_MINOR,
};

static int dw_wdt_drv_probe(struct platform_device *pdev)
{
	int ret;
	struct resource *mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);

	dw_wdt.regs = devm_ioremap_resource(&pdev->dev, mem);
	if (IS_ERR(dw_wdt.regs))
		return PTR_ERR(dw_wdt.regs);

	dw_wdt.clk = devm_clk_get(&pdev->dev, NULL);
	if (IS_ERR(dw_wdt.clk))
		return PTR_ERR(dw_wdt.clk);

	ret = clk_prepare_enable(dw_wdt.clk);
	if (ret)
		return ret;

	spin_lock_init(&dw_wdt.lock);

	ret = misc_register(&dw_wdt_miscdev);
	if (ret)
		goto out_disable_clk;

	dw_wdt_set_next_heartbeat();
	setup_timer(&dw_wdt.timer, dw_wdt_ping, 0);
	mod_timer(&dw_wdt.timer, jiffies + WDT_TIMEOUT);

	return 0;

out_disable_clk:
	clk_disable_unprepare(dw_wdt.clk);

	return ret;
}

static int dw_wdt_drv_remove(struct platform_device *pdev)
{
	misc_deregister(&dw_wdt_miscdev);

	clk_disable_unprepare(dw_wdt.clk);

	return 0;
}

#ifdef CONFIG_OF
static const struct of_device_id dw_wdt_of_match[] = {
	{ .compatible = "snps,dw-wdt", },
	{ /* sentinel */ }
};
MODULE_DEVICE_TABLE(of, dw_wdt_of_match);
#endif

static struct platform_driver dw_wdt_driver = {
	.probe		= dw_wdt_drv_probe,
	.remove		= dw_wdt_drv_remove,
	.driver		= {
		.name	= "dw_wdt",
		.owner	= THIS_MODULE,
		.of_match_table = of_match_ptr(dw_wdt_of_match),
		.pm	= &dw_wdt_pm_ops,
	},
};

module_platform_driver(dw_wdt_driver);

MODULE_AUTHOR("Jamie Iles");
MODULE_DESCRIPTION("Synopsys DesignWare Watchdog Driver");
MODULE_LICENSE("GPL");
Commit	Line	Data
c9353ae1 JI	1	/*
	2	* Copyright 2010-2011 Picochip Ltd., Jamie Iles
	3	* http://www.picochip.com
	4	*
	5	* This program is free software; you can redistribute it and/or
	6	* modify it under the terms of the GNU General Public License
	7	* as published by the Free Software Foundation; either version
	8	* 2 of the License, or (at your option) any later version.
	9	*
	10	* This file implements a driver for the Synopsys DesignWare watchdog device
58a251f2	11	* in the many subsystems. The watchdog has 16 different timeout periods
c9353ae1 JI	12	* and these are a function of the input clock frequency.
	13	*
	14	* The DesignWare watchdog cannot be stopped once it has been started so we
	15	* use a software timer to implement a ping that will keep the watchdog alive.
	16	* If we receive an expected close for the watchdog then we keep the timer
	17	* running, otherwise the timer is stopped and the watchdog will expire.
	18	*/
27c766aa JP	19
27c766aa JP	20	#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
c9353ae1 JI	21
	22	#include <linux/bitops.h>
	23	#include <linux/clk.h>
	24	#include <linux/device.h>
	25	#include <linux/err.h>
	26	#include <linux/fs.h>
	27	#include <linux/io.h>
	28	#include <linux/kernel.h>
	29	#include <linux/miscdevice.h>
	30	#include <linux/module.h>
	31	#include <linux/moduleparam.h>
58e56373	32	#include <linux/of.h>
c9353ae1 JI	33	#include <linux/pm.h>
	34	#include <linux/platform_device.h>
	35	#include <linux/spinlock.h>
	36	#include <linux/timer.h>
	37	#include <linux/uaccess.h>
	38	#include <linux/watchdog.h>
	39
	40	#define WDOG_CONTROL_REG_OFFSET 0x00
	41	#define WDOG_CONTROL_REG_WDT_EN_MASK 0x01
	42	#define WDOG_TIMEOUT_RANGE_REG_OFFSET 0x04
	43	#define WDOG_CURRENT_COUNT_REG_OFFSET 0x08
	44	#define WDOG_COUNTER_RESTART_REG_OFFSET 0x0c
	45	#define WDOG_COUNTER_RESTART_KICK_VALUE 0x76
	46
	47	/* The maximum TOP (timeout period) value that can be set in the watchdog. */
	48	#define DW_WDT_MAX_TOP 15
	49
86a1e189 WVS	50	static bool nowayout = WATCHDOG_NOWAYOUT;
86a1e189 WVS	51	module_param(nowayout, bool, 0);
c9353ae1 JI	52	MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started "
	53	"(default=" __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
	54
	55	#define WDT_TIMEOUT (HZ / 2)
	56
	57	static struct {
	58	spinlock_t lock;
	59	void __iomem *regs;
	60	struct clk *clk;
	61	unsigned long in_use;
	62	unsigned long next_heartbeat;
	63	struct timer_list timer;
	64	int expect_close;
	65	} dw_wdt;
	66
	67	static inline int dw_wdt_is_enabled(void)
	68	{
	69	return readl(dw_wdt.regs + WDOG_CONTROL_REG_OFFSET) &
	70	WDOG_CONTROL_REG_WDT_EN_MASK;
	71	}
	72
	73	static inline int dw_wdt_top_in_seconds(unsigned top)
	74	{
	75	/*
	76	* There are 16 possible timeout values in 0..15 where the number of
	77	* cycles is 2 ^ (16 + i) and the watchdog counts down.
	78	*/
	79	return (1 << (16 + top)) / clk_get_rate(dw_wdt.clk);
	80	}
	81
	82	static int dw_wdt_get_top(void)
	83	{
	84	int top = readl(dw_wdt.regs + WDOG_TIMEOUT_RANGE_REG_OFFSET) & 0xF;
	85
	86	return dw_wdt_top_in_seconds(top);
	87	}
	88
	89	static inline void dw_wdt_set_next_heartbeat(void)
	90	{
	91	dw_wdt.next_heartbeat = jiffies + dw_wdt_get_top() * HZ;
	92	}
	93
	94	static int dw_wdt_set_top(unsigned top_s)
	95	{
	96	int i, top_val = DW_WDT_MAX_TOP;
	97
	98	/*
	99	* Iterate over the timeout values until we find the closest match. We
	100	* always look for >=.
	101	*/
	102	for (i = 0; i <= DW_WDT_MAX_TOP; ++i)
	103	if (dw_wdt_top_in_seconds(i) >= top_s) {
	104	top_val = i;
	105	break;
	106	}
	107
	108	/* Set the new value in the watchdog. */
	109	writel(top_val, dw_wdt.regs + WDOG_TIMEOUT_RANGE_REG_OFFSET);
	110
	111	dw_wdt_set_next_heartbeat();
	112
	113	return dw_wdt_top_in_seconds(top_val);
	114	}
	115
116	static void dw_wdt_keepalive(void)
117	{
118	writel(WDOG_COUNTER_RESTART_KICK_VALUE, dw_wdt.regs +
119	WDOG_COUNTER_RESTART_REG_OFFSET);
120	}
121
122	static void dw_wdt_ping(unsigned long data)
123	{
124	if (time_before(jiffies, dw_wdt.next_heartbeat) \|\|
125	(!nowayout && !dw_wdt.in_use)) {
126	dw_wdt_keepalive();
127	mod_timer(&dw_wdt.timer, jiffies + WDT_TIMEOUT);
128	} else
129	pr_crit("keepalive missed, machine will reset\n");
130	}
131
132	static int dw_wdt_open(struct inode inode, struct file filp)
133	{
134	if (test_and_set_bit(0, &dw_wdt.in_use))
135	return -EBUSY;
136
137	/* Make sure we don't get unloaded. */
138	__module_get(THIS_MODULE);
139
140	spin_lock(&dw_wdt.lock);
141	if (!dw_wdt_is_enabled()) {
142	/*
143	* The watchdog is not currently enabled. Set the timeout to
144	* the maximum and then start it.
145	*/
146	dw_wdt_set_top(DW_WDT_MAX_TOP);
147	writel(WDOG_CONTROL_REG_WDT_EN_MASK,
148	dw_wdt.regs + WDOG_CONTROL_REG_OFFSET);
149	}
150
151	dw_wdt_set_next_heartbeat();
152
153	spin_unlock(&dw_wdt.lock);
154
155	return nonseekable_open(inode, filp);
156	}
157
0b930261 SK	158	static ssize_t dw_wdt_write(struct file filp, const char __user buf,
0b930261 SK	159	size_t len, loff_t *offset)
c9353ae1 JI	160	{
	161	if (!len)
	162	return 0;
	163
	164	if (!nowayout) {
	165	size_t i;
	166
	167	dw_wdt.expect_close = 0;
	168
	169	for (i = 0; i < len; ++i) {
	170	char c;
	171
	172	if (get_user(c, buf + i))
	173	return -EFAULT;
	174
	175	if (c == 'V') {
	176	dw_wdt.expect_close = 1;
	177	break;
	178	}
	179	}
	180	}
	181
	182	dw_wdt_set_next_heartbeat();
	183	mod_timer(&dw_wdt.timer, jiffies + WDT_TIMEOUT);
	184
	185	return len;
	186	}
	187
	188	static u32 dw_wdt_time_left(void)
	189	{
	190	return readl(dw_wdt.regs + WDOG_CURRENT_COUNT_REG_OFFSET) /
	191	clk_get_rate(dw_wdt.clk);
	192	}
	193
	194	static const struct watchdog_info dw_wdt_ident = {
	195	.options = WDIOF_KEEPALIVEPING \| WDIOF_SETTIMEOUT \|
	196	WDIOF_MAGICCLOSE,
	197	.identity = "Synopsys DesignWare Watchdog",
	198	};
	199
	200	static long dw_wdt_ioctl(struct file *filp, unsigned int cmd, unsigned long arg)
	201	{
	202	unsigned long val;
	203	int timeout;
	204
	205	switch (cmd) {
	206	case WDIOC_GETSUPPORT:
60295507	207	return copy_to_user((void __user *)arg, &dw_wdt_ident,
c9353ae1 JI	208	sizeof(dw_wdt_ident)) ? -EFAULT : 0;
	209
	210	case WDIOC_GETSTATUS:
	211	case WDIOC_GETBOOTSTATUS:
60295507	212	return put_user(0, (int __user *)arg);
c9353ae1 JI	213
	214	case WDIOC_KEEPALIVE:
	215	dw_wdt_set_next_heartbeat();
	216	return 0;
	217
	218	case WDIOC_SETTIMEOUT:
	219	if (get_user(val, (int __user *)arg))
	220	return -EFAULT;
	221	timeout = dw_wdt_set_top(val);
	222	return put_user(timeout , (int __user *)arg);
	223
	224	case WDIOC_GETTIMEOUT:
	225	return put_user(dw_wdt_get_top(), (int __user *)arg);
	226
	227	case WDIOC_GETTIMELEFT:
	228	/* Get the time left until expiry. */
	229	if (get_user(val, (int __user *)arg))
	230	return -EFAULT;
	231	return put_user(dw_wdt_time_left(), (int __user *)arg);
	232
	233	default:
	234	return -ENOTTY;
	235	}
	236	}
	237
	238	static int dw_wdt_release(struct inode inode, struct file filp)
	239	{
	240	clear_bit(0, &dw_wdt.in_use);
	241
	242	if (!dw_wdt.expect_close) {
	243	del_timer(&dw_wdt.timer);
	244
	245	if (!nowayout)
	246	pr_crit("unexpected close, system will reboot soon\n");
	247	else
	248	pr_crit("watchdog cannot be disabled, system will reboot soon\n");
	249	}
	250
	251	dw_wdt.expect_close = 0;
	252
	253	return 0;
	254	}
	255
ad83c6cb	256	#ifdef CONFIG_PM_SLEEP
c9353ae1 JI	257	static int dw_wdt_suspend(struct device *dev)
c9353ae1 JI	258	{
280103e6	259	clk_disable_unprepare(dw_wdt.clk);
c9353ae1 JI	260
	261	return 0;
	262	}
	263
	264	static int dw_wdt_resume(struct device *dev)
	265	{
280103e6	266	int err = clk_prepare_enable(dw_wdt.clk);
c9353ae1 JI	267
	268	if (err)
	269	return err;
	270
	271	dw_wdt_keepalive();
	272
	273	return 0;
	274	}
ad83c6cb	275	#endif /* CONFIG_PM_SLEEP */
c9353ae1	276
ad83c6cb	277	static SIMPLE_DEV_PM_OPS(dw_wdt_pm_ops, dw_wdt_suspend, dw_wdt_resume);
c9353ae1 JI	278
	279	static const struct file_operations wdt_fops = {
	280	.owner = THIS_MODULE,
	281	.llseek = no_llseek,
	282	.open = dw_wdt_open,
	283	.write = dw_wdt_write,
	284	.unlocked_ioctl = dw_wdt_ioctl,
	285	.release = dw_wdt_release
	286	};
	287
	288	static struct miscdevice dw_wdt_miscdev = {
	289	.fops = &wdt_fops,
	290	.name = "watchdog",
	291	.minor = WATCHDOG_MINOR,
	292	};
	293
2d991a16	294	static int dw_wdt_drv_probe(struct platform_device *pdev)
c9353ae1 JI	295	{
	296	int ret;
	297	struct resource *mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
	298
4c271bb6 TR	299	dw_wdt.regs = devm_ioremap_resource(&pdev->dev, mem);
	300	if (IS_ERR(dw_wdt.regs))
	301	return PTR_ERR(dw_wdt.regs);
c9353ae1	302
cf3cc8c2	303	dw_wdt.clk = devm_clk_get(&pdev->dev, NULL);
c9353ae1 JI	304	if (IS_ERR(dw_wdt.clk))
	305	return PTR_ERR(dw_wdt.clk);
	306
280103e6	307	ret = clk_prepare_enable(dw_wdt.clk);
c9353ae1	308	if (ret)
cf3cc8c2	309	return ret;
c9353ae1 JI	310
	311	spin_lock_init(&dw_wdt.lock);
	312
	313	ret = misc_register(&dw_wdt_miscdev);
	314	if (ret)
	315	goto out_disable_clk;
	316
	317	dw_wdt_set_next_heartbeat();
	318	setup_timer(&dw_wdt.timer, dw_wdt_ping, 0);
	319	mod_timer(&dw_wdt.timer, jiffies + WDT_TIMEOUT);
	320
	321	return 0;
	322
	323	out_disable_clk:
280103e6	324	clk_disable_unprepare(dw_wdt.clk);
c9353ae1 JI	325
	326	return ret;
	327	}
	328
4b12b896	329	static int dw_wdt_drv_remove(struct platform_device *pdev)
c9353ae1 JI	330	{
	331	misc_deregister(&dw_wdt_miscdev);
	332
280103e6	333	clk_disable_unprepare(dw_wdt.clk);
c9353ae1 JI	334
	335	return 0;
	336	}
	337
58e56373 DN	338	#ifdef CONFIG_OF
	339	static const struct of_device_id dw_wdt_of_match[] = {
	340	{ .compatible = "snps,dw-wdt", },
	341	{ /* sentinel */ }
	342	};
	343	MODULE_DEVICE_TABLE(of, dw_wdt_of_match);
	344	#endif
	345
c9353ae1 JI	346	static struct platform_driver dw_wdt_driver = {
c9353ae1 JI	347	.probe = dw_wdt_drv_probe,
82268714	348	.remove = dw_wdt_drv_remove,
c9353ae1 JI	349	.driver = {
	350	.name = "dw_wdt",
	351	.owner = THIS_MODULE,
58e56373	352	.of_match_table = of_match_ptr(dw_wdt_of_match),
c9353ae1	353	.pm = &dw_wdt_pm_ops,
c9353ae1 JI	354	},
	355	};
	356
b8ec6118	357	module_platform_driver(dw_wdt_driver);
c9353ae1 JI	358
	359	MODULE_AUTHOR("Jamie Iles");
	360	MODULE_DESCRIPTION("Synopsys DesignWare Watchdog Driver");
	361	MODULE_LICENSE("GPL");